1
2
3 package ssa
4
5 import (
6 "cmd/internal/obj"
7 "cmd/internal/obj/arm"
8 "cmd/internal/obj/arm64"
9 "cmd/internal/obj/loong64"
10 "cmd/internal/obj/mips"
11 "cmd/internal/obj/ppc64"
12 "cmd/internal/obj/riscv"
13 "cmd/internal/obj/s390x"
14 "cmd/internal/obj/wasm"
15 "cmd/internal/obj/x86"
16 )
17
18 const (
19 BlockInvalid BlockKind = iota
20
21 Block386EQ
22 Block386NE
23 Block386LT
24 Block386LE
25 Block386GT
26 Block386GE
27 Block386OS
28 Block386OC
29 Block386ULT
30 Block386ULE
31 Block386UGT
32 Block386UGE
33 Block386EQF
34 Block386NEF
35 Block386ORD
36 Block386NAN
37
38 BlockAMD64EQ
39 BlockAMD64NE
40 BlockAMD64LT
41 BlockAMD64LE
42 BlockAMD64GT
43 BlockAMD64GE
44 BlockAMD64OS
45 BlockAMD64OC
46 BlockAMD64ULT
47 BlockAMD64ULE
48 BlockAMD64UGT
49 BlockAMD64UGE
50 BlockAMD64EQF
51 BlockAMD64NEF
52 BlockAMD64ORD
53 BlockAMD64NAN
54 BlockAMD64JUMPTABLE
55
56 BlockARMEQ
57 BlockARMNE
58 BlockARMLT
59 BlockARMLE
60 BlockARMGT
61 BlockARMGE
62 BlockARMULT
63 BlockARMULE
64 BlockARMUGT
65 BlockARMUGE
66 BlockARMLTnoov
67 BlockARMLEnoov
68 BlockARMGTnoov
69 BlockARMGEnoov
70
71 BlockARM64EQ
72 BlockARM64NE
73 BlockARM64LT
74 BlockARM64LE
75 BlockARM64GT
76 BlockARM64GE
77 BlockARM64ULT
78 BlockARM64ULE
79 BlockARM64UGT
80 BlockARM64UGE
81 BlockARM64Z
82 BlockARM64NZ
83 BlockARM64ZW
84 BlockARM64NZW
85 BlockARM64TBZ
86 BlockARM64TBNZ
87 BlockARM64FLT
88 BlockARM64FLE
89 BlockARM64FGT
90 BlockARM64FGE
91 BlockARM64LTnoov
92 BlockARM64LEnoov
93 BlockARM64GTnoov
94 BlockARM64GEnoov
95 BlockARM64JUMPTABLE
96
97 BlockLOONG64EQ
98 BlockLOONG64NE
99 BlockLOONG64LTZ
100 BlockLOONG64LEZ
101 BlockLOONG64GTZ
102 BlockLOONG64GEZ
103 BlockLOONG64FPT
104 BlockLOONG64FPF
105 BlockLOONG64BEQ
106 BlockLOONG64BNE
107 BlockLOONG64BGE
108 BlockLOONG64BLT
109 BlockLOONG64BGEU
110 BlockLOONG64BLTU
111
112 BlockMIPSEQ
113 BlockMIPSNE
114 BlockMIPSLTZ
115 BlockMIPSLEZ
116 BlockMIPSGTZ
117 BlockMIPSGEZ
118 BlockMIPSFPT
119 BlockMIPSFPF
120
121 BlockMIPS64EQ
122 BlockMIPS64NE
123 BlockMIPS64LTZ
124 BlockMIPS64LEZ
125 BlockMIPS64GTZ
126 BlockMIPS64GEZ
127 BlockMIPS64FPT
128 BlockMIPS64FPF
129
130 BlockPPC64EQ
131 BlockPPC64NE
132 BlockPPC64LT
133 BlockPPC64LE
134 BlockPPC64GT
135 BlockPPC64GE
136 BlockPPC64FLT
137 BlockPPC64FLE
138 BlockPPC64FGT
139 BlockPPC64FGE
140
141 BlockRISCV64BEQ
142 BlockRISCV64BNE
143 BlockRISCV64BLT
144 BlockRISCV64BGE
145 BlockRISCV64BLTU
146 BlockRISCV64BGEU
147 BlockRISCV64BEQZ
148 BlockRISCV64BNEZ
149 BlockRISCV64BLEZ
150 BlockRISCV64BGEZ
151 BlockRISCV64BLTZ
152 BlockRISCV64BGTZ
153
154 BlockS390XBRC
155 BlockS390XCRJ
156 BlockS390XCGRJ
157 BlockS390XCLRJ
158 BlockS390XCLGRJ
159 BlockS390XCIJ
160 BlockS390XCGIJ
161 BlockS390XCLIJ
162 BlockS390XCLGIJ
163
164 BlockPlain
165 BlockIf
166 BlockDefer
167 BlockRet
168 BlockRetJmp
169 BlockExit
170 BlockJumpTable
171 BlockFirst
172 )
173
174 var blockString = [...]string{
175 BlockInvalid: "BlockInvalid",
176
177 Block386EQ: "EQ",
178 Block386NE: "NE",
179 Block386LT: "LT",
180 Block386LE: "LE",
181 Block386GT: "GT",
182 Block386GE: "GE",
183 Block386OS: "OS",
184 Block386OC: "OC",
185 Block386ULT: "ULT",
186 Block386ULE: "ULE",
187 Block386UGT: "UGT",
188 Block386UGE: "UGE",
189 Block386EQF: "EQF",
190 Block386NEF: "NEF",
191 Block386ORD: "ORD",
192 Block386NAN: "NAN",
193
194 BlockAMD64EQ: "EQ",
195 BlockAMD64NE: "NE",
196 BlockAMD64LT: "LT",
197 BlockAMD64LE: "LE",
198 BlockAMD64GT: "GT",
199 BlockAMD64GE: "GE",
200 BlockAMD64OS: "OS",
201 BlockAMD64OC: "OC",
202 BlockAMD64ULT: "ULT",
203 BlockAMD64ULE: "ULE",
204 BlockAMD64UGT: "UGT",
205 BlockAMD64UGE: "UGE",
206 BlockAMD64EQF: "EQF",
207 BlockAMD64NEF: "NEF",
208 BlockAMD64ORD: "ORD",
209 BlockAMD64NAN: "NAN",
210 BlockAMD64JUMPTABLE: "JUMPTABLE",
211
212 BlockARMEQ: "EQ",
213 BlockARMNE: "NE",
214 BlockARMLT: "LT",
215 BlockARMLE: "LE",
216 BlockARMGT: "GT",
217 BlockARMGE: "GE",
218 BlockARMULT: "ULT",
219 BlockARMULE: "ULE",
220 BlockARMUGT: "UGT",
221 BlockARMUGE: "UGE",
222 BlockARMLTnoov: "LTnoov",
223 BlockARMLEnoov: "LEnoov",
224 BlockARMGTnoov: "GTnoov",
225 BlockARMGEnoov: "GEnoov",
226
227 BlockARM64EQ: "EQ",
228 BlockARM64NE: "NE",
229 BlockARM64LT: "LT",
230 BlockARM64LE: "LE",
231 BlockARM64GT: "GT",
232 BlockARM64GE: "GE",
233 BlockARM64ULT: "ULT",
234 BlockARM64ULE: "ULE",
235 BlockARM64UGT: "UGT",
236 BlockARM64UGE: "UGE",
237 BlockARM64Z: "Z",
238 BlockARM64NZ: "NZ",
239 BlockARM64ZW: "ZW",
240 BlockARM64NZW: "NZW",
241 BlockARM64TBZ: "TBZ",
242 BlockARM64TBNZ: "TBNZ",
243 BlockARM64FLT: "FLT",
244 BlockARM64FLE: "FLE",
245 BlockARM64FGT: "FGT",
246 BlockARM64FGE: "FGE",
247 BlockARM64LTnoov: "LTnoov",
248 BlockARM64LEnoov: "LEnoov",
249 BlockARM64GTnoov: "GTnoov",
250 BlockARM64GEnoov: "GEnoov",
251 BlockARM64JUMPTABLE: "JUMPTABLE",
252
253 BlockLOONG64EQ: "EQ",
254 BlockLOONG64NE: "NE",
255 BlockLOONG64LTZ: "LTZ",
256 BlockLOONG64LEZ: "LEZ",
257 BlockLOONG64GTZ: "GTZ",
258 BlockLOONG64GEZ: "GEZ",
259 BlockLOONG64FPT: "FPT",
260 BlockLOONG64FPF: "FPF",
261 BlockLOONG64BEQ: "BEQ",
262 BlockLOONG64BNE: "BNE",
263 BlockLOONG64BGE: "BGE",
264 BlockLOONG64BLT: "BLT",
265 BlockLOONG64BGEU: "BGEU",
266 BlockLOONG64BLTU: "BLTU",
267
268 BlockMIPSEQ: "EQ",
269 BlockMIPSNE: "NE",
270 BlockMIPSLTZ: "LTZ",
271 BlockMIPSLEZ: "LEZ",
272 BlockMIPSGTZ: "GTZ",
273 BlockMIPSGEZ: "GEZ",
274 BlockMIPSFPT: "FPT",
275 BlockMIPSFPF: "FPF",
276
277 BlockMIPS64EQ: "EQ",
278 BlockMIPS64NE: "NE",
279 BlockMIPS64LTZ: "LTZ",
280 BlockMIPS64LEZ: "LEZ",
281 BlockMIPS64GTZ: "GTZ",
282 BlockMIPS64GEZ: "GEZ",
283 BlockMIPS64FPT: "FPT",
284 BlockMIPS64FPF: "FPF",
285
286 BlockPPC64EQ: "EQ",
287 BlockPPC64NE: "NE",
288 BlockPPC64LT: "LT",
289 BlockPPC64LE: "LE",
290 BlockPPC64GT: "GT",
291 BlockPPC64GE: "GE",
292 BlockPPC64FLT: "FLT",
293 BlockPPC64FLE: "FLE",
294 BlockPPC64FGT: "FGT",
295 BlockPPC64FGE: "FGE",
296
297 BlockRISCV64BEQ: "BEQ",
298 BlockRISCV64BNE: "BNE",
299 BlockRISCV64BLT: "BLT",
300 BlockRISCV64BGE: "BGE",
301 BlockRISCV64BLTU: "BLTU",
302 BlockRISCV64BGEU: "BGEU",
303 BlockRISCV64BEQZ: "BEQZ",
304 BlockRISCV64BNEZ: "BNEZ",
305 BlockRISCV64BLEZ: "BLEZ",
306 BlockRISCV64BGEZ: "BGEZ",
307 BlockRISCV64BLTZ: "BLTZ",
308 BlockRISCV64BGTZ: "BGTZ",
309
310 BlockS390XBRC: "BRC",
311 BlockS390XCRJ: "CRJ",
312 BlockS390XCGRJ: "CGRJ",
313 BlockS390XCLRJ: "CLRJ",
314 BlockS390XCLGRJ: "CLGRJ",
315 BlockS390XCIJ: "CIJ",
316 BlockS390XCGIJ: "CGIJ",
317 BlockS390XCLIJ: "CLIJ",
318 BlockS390XCLGIJ: "CLGIJ",
319
320 BlockPlain: "Plain",
321 BlockIf: "If",
322 BlockDefer: "Defer",
323 BlockRet: "Ret",
324 BlockRetJmp: "RetJmp",
325 BlockExit: "Exit",
326 BlockJumpTable: "JumpTable",
327 BlockFirst: "First",
328 }
329
330 func (k BlockKind) String() string { return blockString[k] }
331 func (k BlockKind) AuxIntType() string {
332 switch k {
333 case BlockARM64TBZ:
334 return "int64"
335 case BlockARM64TBNZ:
336 return "int64"
337 case BlockS390XCIJ:
338 return "int8"
339 case BlockS390XCGIJ:
340 return "int8"
341 case BlockS390XCLIJ:
342 return "uint8"
343 case BlockS390XCLGIJ:
344 return "uint8"
345 }
346 return ""
347 }
348
349 const (
350 OpInvalid Op = iota
351
352 Op386ADDSS
353 Op386ADDSD
354 Op386SUBSS
355 Op386SUBSD
356 Op386MULSS
357 Op386MULSD
358 Op386DIVSS
359 Op386DIVSD
360 Op386MOVSSload
361 Op386MOVSDload
362 Op386MOVSSconst
363 Op386MOVSDconst
364 Op386MOVSSloadidx1
365 Op386MOVSSloadidx4
366 Op386MOVSDloadidx1
367 Op386MOVSDloadidx8
368 Op386MOVSSstore
369 Op386MOVSDstore
370 Op386MOVSSstoreidx1
371 Op386MOVSSstoreidx4
372 Op386MOVSDstoreidx1
373 Op386MOVSDstoreidx8
374 Op386ADDSSload
375 Op386ADDSDload
376 Op386SUBSSload
377 Op386SUBSDload
378 Op386MULSSload
379 Op386MULSDload
380 Op386DIVSSload
381 Op386DIVSDload
382 Op386ADDL
383 Op386ADDLconst
384 Op386ADDLcarry
385 Op386ADDLconstcarry
386 Op386ADCL
387 Op386ADCLconst
388 Op386SUBL
389 Op386SUBLconst
390 Op386SUBLcarry
391 Op386SUBLconstcarry
392 Op386SBBL
393 Op386SBBLconst
394 Op386MULL
395 Op386MULLconst
396 Op386MULLU
397 Op386HMULL
398 Op386HMULLU
399 Op386MULLQU
400 Op386AVGLU
401 Op386DIVL
402 Op386DIVW
403 Op386DIVLU
404 Op386DIVWU
405 Op386MODL
406 Op386MODW
407 Op386MODLU
408 Op386MODWU
409 Op386ANDL
410 Op386ANDLconst
411 Op386ORL
412 Op386ORLconst
413 Op386XORL
414 Op386XORLconst
415 Op386CMPL
416 Op386CMPW
417 Op386CMPB
418 Op386CMPLconst
419 Op386CMPWconst
420 Op386CMPBconst
421 Op386CMPLload
422 Op386CMPWload
423 Op386CMPBload
424 Op386CMPLconstload
425 Op386CMPWconstload
426 Op386CMPBconstload
427 Op386UCOMISS
428 Op386UCOMISD
429 Op386TESTL
430 Op386TESTW
431 Op386TESTB
432 Op386TESTLconst
433 Op386TESTWconst
434 Op386TESTBconst
435 Op386SHLL
436 Op386SHLLconst
437 Op386SHRL
438 Op386SHRW
439 Op386SHRB
440 Op386SHRLconst
441 Op386SHRWconst
442 Op386SHRBconst
443 Op386SARL
444 Op386SARW
445 Op386SARB
446 Op386SARLconst
447 Op386SARWconst
448 Op386SARBconst
449 Op386ROLL
450 Op386ROLW
451 Op386ROLB
452 Op386ROLLconst
453 Op386ROLWconst
454 Op386ROLBconst
455 Op386ADDLload
456 Op386SUBLload
457 Op386MULLload
458 Op386ANDLload
459 Op386ORLload
460 Op386XORLload
461 Op386ADDLloadidx4
462 Op386SUBLloadidx4
463 Op386MULLloadidx4
464 Op386ANDLloadidx4
465 Op386ORLloadidx4
466 Op386XORLloadidx4
467 Op386NEGL
468 Op386NOTL
469 Op386BSFL
470 Op386BSFW
471 Op386LoweredCtz32
472 Op386LoweredCtz64
473 Op386BSRL
474 Op386BSRW
475 Op386BSWAPL
476 Op386SQRTSD
477 Op386SQRTSS
478 Op386SBBLcarrymask
479 Op386SETEQ
480 Op386SETNE
481 Op386SETL
482 Op386SETLE
483 Op386SETG
484 Op386SETGE
485 Op386SETB
486 Op386SETBE
487 Op386SETA
488 Op386SETAE
489 Op386SETO
490 Op386SETEQF
491 Op386SETNEF
492 Op386SETORD
493 Op386SETNAN
494 Op386SETGF
495 Op386SETGEF
496 Op386MOVBLSX
497 Op386MOVBLZX
498 Op386MOVWLSX
499 Op386MOVWLZX
500 Op386MOVLconst
501 Op386CVTTSD2SL
502 Op386CVTTSS2SL
503 Op386CVTSL2SS
504 Op386CVTSL2SD
505 Op386CVTSD2SS
506 Op386CVTSS2SD
507 Op386PXOR
508 Op386LEAL
509 Op386LEAL1
510 Op386LEAL2
511 Op386LEAL4
512 Op386LEAL8
513 Op386MOVBload
514 Op386MOVBLSXload
515 Op386MOVWload
516 Op386MOVWLSXload
517 Op386MOVLload
518 Op386MOVBstore
519 Op386MOVWstore
520 Op386MOVLstore
521 Op386ADDLmodify
522 Op386SUBLmodify
523 Op386ANDLmodify
524 Op386ORLmodify
525 Op386XORLmodify
526 Op386ADDLmodifyidx4
527 Op386SUBLmodifyidx4
528 Op386ANDLmodifyidx4
529 Op386ORLmodifyidx4
530 Op386XORLmodifyidx4
531 Op386ADDLconstmodify
532 Op386ANDLconstmodify
533 Op386ORLconstmodify
534 Op386XORLconstmodify
535 Op386ADDLconstmodifyidx4
536 Op386ANDLconstmodifyidx4
537 Op386ORLconstmodifyidx4
538 Op386XORLconstmodifyidx4
539 Op386MOVBloadidx1
540 Op386MOVWloadidx1
541 Op386MOVWloadidx2
542 Op386MOVLloadidx1
543 Op386MOVLloadidx4
544 Op386MOVBstoreidx1
545 Op386MOVWstoreidx1
546 Op386MOVWstoreidx2
547 Op386MOVLstoreidx1
548 Op386MOVLstoreidx4
549 Op386MOVBstoreconst
550 Op386MOVWstoreconst
551 Op386MOVLstoreconst
552 Op386MOVBstoreconstidx1
553 Op386MOVWstoreconstidx1
554 Op386MOVWstoreconstidx2
555 Op386MOVLstoreconstidx1
556 Op386MOVLstoreconstidx4
557 Op386DUFFZERO
558 Op386REPSTOSL
559 Op386CALLstatic
560 Op386CALLtail
561 Op386CALLclosure
562 Op386CALLinter
563 Op386DUFFCOPY
564 Op386REPMOVSL
565 Op386InvertFlags
566 Op386LoweredGetG
567 Op386LoweredGetClosurePtr
568 Op386LoweredGetCallerPC
569 Op386LoweredGetCallerSP
570 Op386LoweredNilCheck
571 Op386LoweredWB
572 Op386LoweredPanicBoundsA
573 Op386LoweredPanicBoundsB
574 Op386LoweredPanicBoundsC
575 Op386LoweredPanicExtendA
576 Op386LoweredPanicExtendB
577 Op386LoweredPanicExtendC
578 Op386FlagEQ
579 Op386FlagLT_ULT
580 Op386FlagLT_UGT
581 Op386FlagGT_UGT
582 Op386FlagGT_ULT
583 Op386MOVSSconst1
584 Op386MOVSDconst1
585 Op386MOVSSconst2
586 Op386MOVSDconst2
587
588 OpAMD64ADDSS
589 OpAMD64ADDSD
590 OpAMD64SUBSS
591 OpAMD64SUBSD
592 OpAMD64MULSS
593 OpAMD64MULSD
594 OpAMD64DIVSS
595 OpAMD64DIVSD
596 OpAMD64MOVSSload
597 OpAMD64MOVSDload
598 OpAMD64MOVSSconst
599 OpAMD64MOVSDconst
600 OpAMD64MOVSSloadidx1
601 OpAMD64MOVSSloadidx4
602 OpAMD64MOVSDloadidx1
603 OpAMD64MOVSDloadidx8
604 OpAMD64MOVSSstore
605 OpAMD64MOVSDstore
606 OpAMD64MOVSSstoreidx1
607 OpAMD64MOVSSstoreidx4
608 OpAMD64MOVSDstoreidx1
609 OpAMD64MOVSDstoreidx8
610 OpAMD64ADDSSload
611 OpAMD64ADDSDload
612 OpAMD64SUBSSload
613 OpAMD64SUBSDload
614 OpAMD64MULSSload
615 OpAMD64MULSDload
616 OpAMD64DIVSSload
617 OpAMD64DIVSDload
618 OpAMD64ADDSSloadidx1
619 OpAMD64ADDSSloadidx4
620 OpAMD64ADDSDloadidx1
621 OpAMD64ADDSDloadidx8
622 OpAMD64SUBSSloadidx1
623 OpAMD64SUBSSloadidx4
624 OpAMD64SUBSDloadidx1
625 OpAMD64SUBSDloadidx8
626 OpAMD64MULSSloadidx1
627 OpAMD64MULSSloadidx4
628 OpAMD64MULSDloadidx1
629 OpAMD64MULSDloadidx8
630 OpAMD64DIVSSloadidx1
631 OpAMD64DIVSSloadidx4
632 OpAMD64DIVSDloadidx1
633 OpAMD64DIVSDloadidx8
634 OpAMD64ADDQ
635 OpAMD64ADDL
636 OpAMD64ADDQconst
637 OpAMD64ADDLconst
638 OpAMD64ADDQconstmodify
639 OpAMD64ADDLconstmodify
640 OpAMD64SUBQ
641 OpAMD64SUBL
642 OpAMD64SUBQconst
643 OpAMD64SUBLconst
644 OpAMD64MULQ
645 OpAMD64MULL
646 OpAMD64MULQconst
647 OpAMD64MULLconst
648 OpAMD64MULLU
649 OpAMD64MULQU
650 OpAMD64HMULQ
651 OpAMD64HMULL
652 OpAMD64HMULQU
653 OpAMD64HMULLU
654 OpAMD64AVGQU
655 OpAMD64DIVQ
656 OpAMD64DIVL
657 OpAMD64DIVW
658 OpAMD64DIVQU
659 OpAMD64DIVLU
660 OpAMD64DIVWU
661 OpAMD64NEGLflags
662 OpAMD64ADDQcarry
663 OpAMD64ADCQ
664 OpAMD64ADDQconstcarry
665 OpAMD64ADCQconst
666 OpAMD64SUBQborrow
667 OpAMD64SBBQ
668 OpAMD64SUBQconstborrow
669 OpAMD64SBBQconst
670 OpAMD64MULQU2
671 OpAMD64DIVQU2
672 OpAMD64ANDQ
673 OpAMD64ANDL
674 OpAMD64ANDQconst
675 OpAMD64ANDLconst
676 OpAMD64ANDQconstmodify
677 OpAMD64ANDLconstmodify
678 OpAMD64ORQ
679 OpAMD64ORL
680 OpAMD64ORQconst
681 OpAMD64ORLconst
682 OpAMD64ORQconstmodify
683 OpAMD64ORLconstmodify
684 OpAMD64XORQ
685 OpAMD64XORL
686 OpAMD64XORQconst
687 OpAMD64XORLconst
688 OpAMD64XORQconstmodify
689 OpAMD64XORLconstmodify
690 OpAMD64CMPQ
691 OpAMD64CMPL
692 OpAMD64CMPW
693 OpAMD64CMPB
694 OpAMD64CMPQconst
695 OpAMD64CMPLconst
696 OpAMD64CMPWconst
697 OpAMD64CMPBconst
698 OpAMD64CMPQload
699 OpAMD64CMPLload
700 OpAMD64CMPWload
701 OpAMD64CMPBload
702 OpAMD64CMPQconstload
703 OpAMD64CMPLconstload
704 OpAMD64CMPWconstload
705 OpAMD64CMPBconstload
706 OpAMD64CMPQloadidx8
707 OpAMD64CMPQloadidx1
708 OpAMD64CMPLloadidx4
709 OpAMD64CMPLloadidx1
710 OpAMD64CMPWloadidx2
711 OpAMD64CMPWloadidx1
712 OpAMD64CMPBloadidx1
713 OpAMD64CMPQconstloadidx8
714 OpAMD64CMPQconstloadidx1
715 OpAMD64CMPLconstloadidx4
716 OpAMD64CMPLconstloadidx1
717 OpAMD64CMPWconstloadidx2
718 OpAMD64CMPWconstloadidx1
719 OpAMD64CMPBconstloadidx1
720 OpAMD64UCOMISS
721 OpAMD64UCOMISD
722 OpAMD64BTL
723 OpAMD64BTQ
724 OpAMD64BTCL
725 OpAMD64BTCQ
726 OpAMD64BTRL
727 OpAMD64BTRQ
728 OpAMD64BTSL
729 OpAMD64BTSQ
730 OpAMD64BTLconst
731 OpAMD64BTQconst
732 OpAMD64BTCQconst
733 OpAMD64BTRQconst
734 OpAMD64BTSQconst
735 OpAMD64BTSQconstmodify
736 OpAMD64BTRQconstmodify
737 OpAMD64BTCQconstmodify
738 OpAMD64TESTQ
739 OpAMD64TESTL
740 OpAMD64TESTW
741 OpAMD64TESTB
742 OpAMD64TESTQconst
743 OpAMD64TESTLconst
744 OpAMD64TESTWconst
745 OpAMD64TESTBconst
746 OpAMD64SHLQ
747 OpAMD64SHLL
748 OpAMD64SHLQconst
749 OpAMD64SHLLconst
750 OpAMD64SHRQ
751 OpAMD64SHRL
752 OpAMD64SHRW
753 OpAMD64SHRB
754 OpAMD64SHRQconst
755 OpAMD64SHRLconst
756 OpAMD64SHRWconst
757 OpAMD64SHRBconst
758 OpAMD64SARQ
759 OpAMD64SARL
760 OpAMD64SARW
761 OpAMD64SARB
762 OpAMD64SARQconst
763 OpAMD64SARLconst
764 OpAMD64SARWconst
765 OpAMD64SARBconst
766 OpAMD64SHRDQ
767 OpAMD64SHLDQ
768 OpAMD64ROLQ
769 OpAMD64ROLL
770 OpAMD64ROLW
771 OpAMD64ROLB
772 OpAMD64RORQ
773 OpAMD64RORL
774 OpAMD64RORW
775 OpAMD64RORB
776 OpAMD64ROLQconst
777 OpAMD64ROLLconst
778 OpAMD64ROLWconst
779 OpAMD64ROLBconst
780 OpAMD64ADDLload
781 OpAMD64ADDQload
782 OpAMD64SUBQload
783 OpAMD64SUBLload
784 OpAMD64ANDLload
785 OpAMD64ANDQload
786 OpAMD64ORQload
787 OpAMD64ORLload
788 OpAMD64XORQload
789 OpAMD64XORLload
790 OpAMD64ADDLloadidx1
791 OpAMD64ADDLloadidx4
792 OpAMD64ADDLloadidx8
793 OpAMD64ADDQloadidx1
794 OpAMD64ADDQloadidx8
795 OpAMD64SUBLloadidx1
796 OpAMD64SUBLloadidx4
797 OpAMD64SUBLloadidx8
798 OpAMD64SUBQloadidx1
799 OpAMD64SUBQloadidx8
800 OpAMD64ANDLloadidx1
801 OpAMD64ANDLloadidx4
802 OpAMD64ANDLloadidx8
803 OpAMD64ANDQloadidx1
804 OpAMD64ANDQloadidx8
805 OpAMD64ORLloadidx1
806 OpAMD64ORLloadidx4
807 OpAMD64ORLloadidx8
808 OpAMD64ORQloadidx1
809 OpAMD64ORQloadidx8
810 OpAMD64XORLloadidx1
811 OpAMD64XORLloadidx4
812 OpAMD64XORLloadidx8
813 OpAMD64XORQloadidx1
814 OpAMD64XORQloadidx8
815 OpAMD64ADDQmodify
816 OpAMD64SUBQmodify
817 OpAMD64ANDQmodify
818 OpAMD64ORQmodify
819 OpAMD64XORQmodify
820 OpAMD64ADDLmodify
821 OpAMD64SUBLmodify
822 OpAMD64ANDLmodify
823 OpAMD64ORLmodify
824 OpAMD64XORLmodify
825 OpAMD64ADDQmodifyidx1
826 OpAMD64ADDQmodifyidx8
827 OpAMD64SUBQmodifyidx1
828 OpAMD64SUBQmodifyidx8
829 OpAMD64ANDQmodifyidx1
830 OpAMD64ANDQmodifyidx8
831 OpAMD64ORQmodifyidx1
832 OpAMD64ORQmodifyidx8
833 OpAMD64XORQmodifyidx1
834 OpAMD64XORQmodifyidx8
835 OpAMD64ADDLmodifyidx1
836 OpAMD64ADDLmodifyidx4
837 OpAMD64ADDLmodifyidx8
838 OpAMD64SUBLmodifyidx1
839 OpAMD64SUBLmodifyidx4
840 OpAMD64SUBLmodifyidx8
841 OpAMD64ANDLmodifyidx1
842 OpAMD64ANDLmodifyidx4
843 OpAMD64ANDLmodifyidx8
844 OpAMD64ORLmodifyidx1
845 OpAMD64ORLmodifyidx4
846 OpAMD64ORLmodifyidx8
847 OpAMD64XORLmodifyidx1
848 OpAMD64XORLmodifyidx4
849 OpAMD64XORLmodifyidx8
850 OpAMD64ADDQconstmodifyidx1
851 OpAMD64ADDQconstmodifyidx8
852 OpAMD64ANDQconstmodifyidx1
853 OpAMD64ANDQconstmodifyidx8
854 OpAMD64ORQconstmodifyidx1
855 OpAMD64ORQconstmodifyidx8
856 OpAMD64XORQconstmodifyidx1
857 OpAMD64XORQconstmodifyidx8
858 OpAMD64ADDLconstmodifyidx1
859 OpAMD64ADDLconstmodifyidx4
860 OpAMD64ADDLconstmodifyidx8
861 OpAMD64ANDLconstmodifyidx1
862 OpAMD64ANDLconstmodifyidx4
863 OpAMD64ANDLconstmodifyidx8
864 OpAMD64ORLconstmodifyidx1
865 OpAMD64ORLconstmodifyidx4
866 OpAMD64ORLconstmodifyidx8
867 OpAMD64XORLconstmodifyidx1
868 OpAMD64XORLconstmodifyidx4
869 OpAMD64XORLconstmodifyidx8
870 OpAMD64NEGQ
871 OpAMD64NEGL
872 OpAMD64NOTQ
873 OpAMD64NOTL
874 OpAMD64BSFQ
875 OpAMD64BSFL
876 OpAMD64BSRQ
877 OpAMD64BSRL
878 OpAMD64CMOVQEQ
879 OpAMD64CMOVQNE
880 OpAMD64CMOVQLT
881 OpAMD64CMOVQGT
882 OpAMD64CMOVQLE
883 OpAMD64CMOVQGE
884 OpAMD64CMOVQLS
885 OpAMD64CMOVQHI
886 OpAMD64CMOVQCC
887 OpAMD64CMOVQCS
888 OpAMD64CMOVLEQ
889 OpAMD64CMOVLNE
890 OpAMD64CMOVLLT
891 OpAMD64CMOVLGT
892 OpAMD64CMOVLLE
893 OpAMD64CMOVLGE
894 OpAMD64CMOVLLS
895 OpAMD64CMOVLHI
896 OpAMD64CMOVLCC
897 OpAMD64CMOVLCS
898 OpAMD64CMOVWEQ
899 OpAMD64CMOVWNE
900 OpAMD64CMOVWLT
901 OpAMD64CMOVWGT
902 OpAMD64CMOVWLE
903 OpAMD64CMOVWGE
904 OpAMD64CMOVWLS
905 OpAMD64CMOVWHI
906 OpAMD64CMOVWCC
907 OpAMD64CMOVWCS
908 OpAMD64CMOVQEQF
909 OpAMD64CMOVQNEF
910 OpAMD64CMOVQGTF
911 OpAMD64CMOVQGEF
912 OpAMD64CMOVLEQF
913 OpAMD64CMOVLNEF
914 OpAMD64CMOVLGTF
915 OpAMD64CMOVLGEF
916 OpAMD64CMOVWEQF
917 OpAMD64CMOVWNEF
918 OpAMD64CMOVWGTF
919 OpAMD64CMOVWGEF
920 OpAMD64BSWAPQ
921 OpAMD64BSWAPL
922 OpAMD64POPCNTQ
923 OpAMD64POPCNTL
924 OpAMD64SQRTSD
925 OpAMD64SQRTSS
926 OpAMD64ROUNDSD
927 OpAMD64VFMADD231SD
928 OpAMD64MINSD
929 OpAMD64MINSS
930 OpAMD64SBBQcarrymask
931 OpAMD64SBBLcarrymask
932 OpAMD64SETEQ
933 OpAMD64SETNE
934 OpAMD64SETL
935 OpAMD64SETLE
936 OpAMD64SETG
937 OpAMD64SETGE
938 OpAMD64SETB
939 OpAMD64SETBE
940 OpAMD64SETA
941 OpAMD64SETAE
942 OpAMD64SETO
943 OpAMD64SETEQstore
944 OpAMD64SETNEstore
945 OpAMD64SETLstore
946 OpAMD64SETLEstore
947 OpAMD64SETGstore
948 OpAMD64SETGEstore
949 OpAMD64SETBstore
950 OpAMD64SETBEstore
951 OpAMD64SETAstore
952 OpAMD64SETAEstore
953 OpAMD64SETEQstoreidx1
954 OpAMD64SETNEstoreidx1
955 OpAMD64SETLstoreidx1
956 OpAMD64SETLEstoreidx1
957 OpAMD64SETGstoreidx1
958 OpAMD64SETGEstoreidx1
959 OpAMD64SETBstoreidx1
960 OpAMD64SETBEstoreidx1
961 OpAMD64SETAstoreidx1
962 OpAMD64SETAEstoreidx1
963 OpAMD64SETEQF
964 OpAMD64SETNEF
965 OpAMD64SETORD
966 OpAMD64SETNAN
967 OpAMD64SETGF
968 OpAMD64SETGEF
969 OpAMD64MOVBQSX
970 OpAMD64MOVBQZX
971 OpAMD64MOVWQSX
972 OpAMD64MOVWQZX
973 OpAMD64MOVLQSX
974 OpAMD64MOVLQZX
975 OpAMD64MOVLconst
976 OpAMD64MOVQconst
977 OpAMD64CVTTSD2SL
978 OpAMD64CVTTSD2SQ
979 OpAMD64CVTTSS2SL
980 OpAMD64CVTTSS2SQ
981 OpAMD64CVTSL2SS
982 OpAMD64CVTSL2SD
983 OpAMD64CVTSQ2SS
984 OpAMD64CVTSQ2SD
985 OpAMD64CVTSD2SS
986 OpAMD64CVTSS2SD
987 OpAMD64MOVQi2f
988 OpAMD64MOVQf2i
989 OpAMD64MOVLi2f
990 OpAMD64MOVLf2i
991 OpAMD64PXOR
992 OpAMD64POR
993 OpAMD64LEAQ
994 OpAMD64LEAL
995 OpAMD64LEAW
996 OpAMD64LEAQ1
997 OpAMD64LEAL1
998 OpAMD64LEAW1
999 OpAMD64LEAQ2
1000 OpAMD64LEAL2
1001 OpAMD64LEAW2
1002 OpAMD64LEAQ4
1003 OpAMD64LEAL4
1004 OpAMD64LEAW4
1005 OpAMD64LEAQ8
1006 OpAMD64LEAL8
1007 OpAMD64LEAW8
1008 OpAMD64MOVBload
1009 OpAMD64MOVBQSXload
1010 OpAMD64MOVWload
1011 OpAMD64MOVWQSXload
1012 OpAMD64MOVLload
1013 OpAMD64MOVLQSXload
1014 OpAMD64MOVQload
1015 OpAMD64MOVBstore
1016 OpAMD64MOVWstore
1017 OpAMD64MOVLstore
1018 OpAMD64MOVQstore
1019 OpAMD64MOVOload
1020 OpAMD64MOVOstore
1021 OpAMD64MOVBloadidx1
1022 OpAMD64MOVWloadidx1
1023 OpAMD64MOVWloadidx2
1024 OpAMD64MOVLloadidx1
1025 OpAMD64MOVLloadidx4
1026 OpAMD64MOVLloadidx8
1027 OpAMD64MOVQloadidx1
1028 OpAMD64MOVQloadidx8
1029 OpAMD64MOVBstoreidx1
1030 OpAMD64MOVWstoreidx1
1031 OpAMD64MOVWstoreidx2
1032 OpAMD64MOVLstoreidx1
1033 OpAMD64MOVLstoreidx4
1034 OpAMD64MOVLstoreidx8
1035 OpAMD64MOVQstoreidx1
1036 OpAMD64MOVQstoreidx8
1037 OpAMD64MOVBstoreconst
1038 OpAMD64MOVWstoreconst
1039 OpAMD64MOVLstoreconst
1040 OpAMD64MOVQstoreconst
1041 OpAMD64MOVOstoreconst
1042 OpAMD64MOVBstoreconstidx1
1043 OpAMD64MOVWstoreconstidx1
1044 OpAMD64MOVWstoreconstidx2
1045 OpAMD64MOVLstoreconstidx1
1046 OpAMD64MOVLstoreconstidx4
1047 OpAMD64MOVQstoreconstidx1
1048 OpAMD64MOVQstoreconstidx8
1049 OpAMD64DUFFZERO
1050 OpAMD64REPSTOSQ
1051 OpAMD64CALLstatic
1052 OpAMD64CALLtail
1053 OpAMD64CALLclosure
1054 OpAMD64CALLinter
1055 OpAMD64DUFFCOPY
1056 OpAMD64REPMOVSQ
1057 OpAMD64InvertFlags
1058 OpAMD64LoweredGetG
1059 OpAMD64LoweredGetClosurePtr
1060 OpAMD64LoweredGetCallerPC
1061 OpAMD64LoweredGetCallerSP
1062 OpAMD64LoweredNilCheck
1063 OpAMD64LoweredWB
1064 OpAMD64LoweredHasCPUFeature
1065 OpAMD64LoweredPanicBoundsA
1066 OpAMD64LoweredPanicBoundsB
1067 OpAMD64LoweredPanicBoundsC
1068 OpAMD64FlagEQ
1069 OpAMD64FlagLT_ULT
1070 OpAMD64FlagLT_UGT
1071 OpAMD64FlagGT_UGT
1072 OpAMD64FlagGT_ULT
1073 OpAMD64MOVBatomicload
1074 OpAMD64MOVLatomicload
1075 OpAMD64MOVQatomicload
1076 OpAMD64XCHGB
1077 OpAMD64XCHGL
1078 OpAMD64XCHGQ
1079 OpAMD64XADDLlock
1080 OpAMD64XADDQlock
1081 OpAMD64AddTupleFirst32
1082 OpAMD64AddTupleFirst64
1083 OpAMD64CMPXCHGLlock
1084 OpAMD64CMPXCHGQlock
1085 OpAMD64ANDBlock
1086 OpAMD64ANDLlock
1087 OpAMD64ANDQlock
1088 OpAMD64ORBlock
1089 OpAMD64ORLlock
1090 OpAMD64ORQlock
1091 OpAMD64LoweredAtomicAnd64
1092 OpAMD64LoweredAtomicAnd32
1093 OpAMD64LoweredAtomicOr64
1094 OpAMD64LoweredAtomicOr32
1095 OpAMD64PrefetchT0
1096 OpAMD64PrefetchNTA
1097 OpAMD64ANDNQ
1098 OpAMD64ANDNL
1099 OpAMD64BLSIQ
1100 OpAMD64BLSIL
1101 OpAMD64BLSMSKQ
1102 OpAMD64BLSMSKL
1103 OpAMD64BLSRQ
1104 OpAMD64BLSRL
1105 OpAMD64TZCNTQ
1106 OpAMD64TZCNTL
1107 OpAMD64LZCNTQ
1108 OpAMD64LZCNTL
1109 OpAMD64MOVBEWstore
1110 OpAMD64MOVBELload
1111 OpAMD64MOVBELstore
1112 OpAMD64MOVBEQload
1113 OpAMD64MOVBEQstore
1114 OpAMD64MOVBELloadidx1
1115 OpAMD64MOVBELloadidx4
1116 OpAMD64MOVBELloadidx8
1117 OpAMD64MOVBEQloadidx1
1118 OpAMD64MOVBEQloadidx8
1119 OpAMD64MOVBEWstoreidx1
1120 OpAMD64MOVBEWstoreidx2
1121 OpAMD64MOVBELstoreidx1
1122 OpAMD64MOVBELstoreidx4
1123 OpAMD64MOVBELstoreidx8
1124 OpAMD64MOVBEQstoreidx1
1125 OpAMD64MOVBEQstoreidx8
1126 OpAMD64SARXQ
1127 OpAMD64SARXL
1128 OpAMD64SHLXQ
1129 OpAMD64SHLXL
1130 OpAMD64SHRXQ
1131 OpAMD64SHRXL
1132 OpAMD64SARXLload
1133 OpAMD64SARXQload
1134 OpAMD64SHLXLload
1135 OpAMD64SHLXQload
1136 OpAMD64SHRXLload
1137 OpAMD64SHRXQload
1138 OpAMD64SARXLloadidx1
1139 OpAMD64SARXLloadidx4
1140 OpAMD64SARXLloadidx8
1141 OpAMD64SARXQloadidx1
1142 OpAMD64SARXQloadidx8
1143 OpAMD64SHLXLloadidx1
1144 OpAMD64SHLXLloadidx4
1145 OpAMD64SHLXLloadidx8
1146 OpAMD64SHLXQloadidx1
1147 OpAMD64SHLXQloadidx8
1148 OpAMD64SHRXLloadidx1
1149 OpAMD64SHRXLloadidx4
1150 OpAMD64SHRXLloadidx8
1151 OpAMD64SHRXQloadidx1
1152 OpAMD64SHRXQloadidx8
1153
1154 OpARMADD
1155 OpARMADDconst
1156 OpARMSUB
1157 OpARMSUBconst
1158 OpARMRSB
1159 OpARMRSBconst
1160 OpARMMUL
1161 OpARMHMUL
1162 OpARMHMULU
1163 OpARMCALLudiv
1164 OpARMADDS
1165 OpARMADDSconst
1166 OpARMADC
1167 OpARMADCconst
1168 OpARMSUBS
1169 OpARMSUBSconst
1170 OpARMRSBSconst
1171 OpARMSBC
1172 OpARMSBCconst
1173 OpARMRSCconst
1174 OpARMMULLU
1175 OpARMMULA
1176 OpARMMULS
1177 OpARMADDF
1178 OpARMADDD
1179 OpARMSUBF
1180 OpARMSUBD
1181 OpARMMULF
1182 OpARMMULD
1183 OpARMNMULF
1184 OpARMNMULD
1185 OpARMDIVF
1186 OpARMDIVD
1187 OpARMMULAF
1188 OpARMMULAD
1189 OpARMMULSF
1190 OpARMMULSD
1191 OpARMFMULAD
1192 OpARMAND
1193 OpARMANDconst
1194 OpARMOR
1195 OpARMORconst
1196 OpARMXOR
1197 OpARMXORconst
1198 OpARMBIC
1199 OpARMBICconst
1200 OpARMBFX
1201 OpARMBFXU
1202 OpARMMVN
1203 OpARMNEGF
1204 OpARMNEGD
1205 OpARMSQRTD
1206 OpARMSQRTF
1207 OpARMABSD
1208 OpARMCLZ
1209 OpARMREV
1210 OpARMREV16
1211 OpARMRBIT
1212 OpARMSLL
1213 OpARMSLLconst
1214 OpARMSRL
1215 OpARMSRLconst
1216 OpARMSRA
1217 OpARMSRAconst
1218 OpARMSRR
1219 OpARMSRRconst
1220 OpARMADDshiftLL
1221 OpARMADDshiftRL
1222 OpARMADDshiftRA
1223 OpARMSUBshiftLL
1224 OpARMSUBshiftRL
1225 OpARMSUBshiftRA
1226 OpARMRSBshiftLL
1227 OpARMRSBshiftRL
1228 OpARMRSBshiftRA
1229 OpARMANDshiftLL
1230 OpARMANDshiftRL
1231 OpARMANDshiftRA
1232 OpARMORshiftLL
1233 OpARMORshiftRL
1234 OpARMORshiftRA
1235 OpARMXORshiftLL
1236 OpARMXORshiftRL
1237 OpARMXORshiftRA
1238 OpARMXORshiftRR
1239 OpARMBICshiftLL
1240 OpARMBICshiftRL
1241 OpARMBICshiftRA
1242 OpARMMVNshiftLL
1243 OpARMMVNshiftRL
1244 OpARMMVNshiftRA
1245 OpARMADCshiftLL
1246 OpARMADCshiftRL
1247 OpARMADCshiftRA
1248 OpARMSBCshiftLL
1249 OpARMSBCshiftRL
1250 OpARMSBCshiftRA
1251 OpARMRSCshiftLL
1252 OpARMRSCshiftRL
1253 OpARMRSCshiftRA
1254 OpARMADDSshiftLL
1255 OpARMADDSshiftRL
1256 OpARMADDSshiftRA
1257 OpARMSUBSshiftLL
1258 OpARMSUBSshiftRL
1259 OpARMSUBSshiftRA
1260 OpARMRSBSshiftLL
1261 OpARMRSBSshiftRL
1262 OpARMRSBSshiftRA
1263 OpARMADDshiftLLreg
1264 OpARMADDshiftRLreg
1265 OpARMADDshiftRAreg
1266 OpARMSUBshiftLLreg
1267 OpARMSUBshiftRLreg
1268 OpARMSUBshiftRAreg
1269 OpARMRSBshiftLLreg
1270 OpARMRSBshiftRLreg
1271 OpARMRSBshiftRAreg
1272 OpARMANDshiftLLreg
1273 OpARMANDshiftRLreg
1274 OpARMANDshiftRAreg
1275 OpARMORshiftLLreg
1276 OpARMORshiftRLreg
1277 OpARMORshiftRAreg
1278 OpARMXORshiftLLreg
1279 OpARMXORshiftRLreg
1280 OpARMXORshiftRAreg
1281 OpARMBICshiftLLreg
1282 OpARMBICshiftRLreg
1283 OpARMBICshiftRAreg
1284 OpARMMVNshiftLLreg
1285 OpARMMVNshiftRLreg
1286 OpARMMVNshiftRAreg
1287 OpARMADCshiftLLreg
1288 OpARMADCshiftRLreg
1289 OpARMADCshiftRAreg
1290 OpARMSBCshiftLLreg
1291 OpARMSBCshiftRLreg
1292 OpARMSBCshiftRAreg
1293 OpARMRSCshiftLLreg
1294 OpARMRSCshiftRLreg
1295 OpARMRSCshiftRAreg
1296 OpARMADDSshiftLLreg
1297 OpARMADDSshiftRLreg
1298 OpARMADDSshiftRAreg
1299 OpARMSUBSshiftLLreg
1300 OpARMSUBSshiftRLreg
1301 OpARMSUBSshiftRAreg
1302 OpARMRSBSshiftLLreg
1303 OpARMRSBSshiftRLreg
1304 OpARMRSBSshiftRAreg
1305 OpARMCMP
1306 OpARMCMPconst
1307 OpARMCMN
1308 OpARMCMNconst
1309 OpARMTST
1310 OpARMTSTconst
1311 OpARMTEQ
1312 OpARMTEQconst
1313 OpARMCMPF
1314 OpARMCMPD
1315 OpARMCMPshiftLL
1316 OpARMCMPshiftRL
1317 OpARMCMPshiftRA
1318 OpARMCMNshiftLL
1319 OpARMCMNshiftRL
1320 OpARMCMNshiftRA
1321 OpARMTSTshiftLL
1322 OpARMTSTshiftRL
1323 OpARMTSTshiftRA
1324 OpARMTEQshiftLL
1325 OpARMTEQshiftRL
1326 OpARMTEQshiftRA
1327 OpARMCMPshiftLLreg
1328 OpARMCMPshiftRLreg
1329 OpARMCMPshiftRAreg
1330 OpARMCMNshiftLLreg
1331 OpARMCMNshiftRLreg
1332 OpARMCMNshiftRAreg
1333 OpARMTSTshiftLLreg
1334 OpARMTSTshiftRLreg
1335 OpARMTSTshiftRAreg
1336 OpARMTEQshiftLLreg
1337 OpARMTEQshiftRLreg
1338 OpARMTEQshiftRAreg
1339 OpARMCMPF0
1340 OpARMCMPD0
1341 OpARMMOVWconst
1342 OpARMMOVFconst
1343 OpARMMOVDconst
1344 OpARMMOVWaddr
1345 OpARMMOVBload
1346 OpARMMOVBUload
1347 OpARMMOVHload
1348 OpARMMOVHUload
1349 OpARMMOVWload
1350 OpARMMOVFload
1351 OpARMMOVDload
1352 OpARMMOVBstore
1353 OpARMMOVHstore
1354 OpARMMOVWstore
1355 OpARMMOVFstore
1356 OpARMMOVDstore
1357 OpARMMOVWloadidx
1358 OpARMMOVWloadshiftLL
1359 OpARMMOVWloadshiftRL
1360 OpARMMOVWloadshiftRA
1361 OpARMMOVBUloadidx
1362 OpARMMOVBloadidx
1363 OpARMMOVHUloadidx
1364 OpARMMOVHloadidx
1365 OpARMMOVWstoreidx
1366 OpARMMOVWstoreshiftLL
1367 OpARMMOVWstoreshiftRL
1368 OpARMMOVWstoreshiftRA
1369 OpARMMOVBstoreidx
1370 OpARMMOVHstoreidx
1371 OpARMMOVBreg
1372 OpARMMOVBUreg
1373 OpARMMOVHreg
1374 OpARMMOVHUreg
1375 OpARMMOVWreg
1376 OpARMMOVWnop
1377 OpARMMOVWF
1378 OpARMMOVWD
1379 OpARMMOVWUF
1380 OpARMMOVWUD
1381 OpARMMOVFW
1382 OpARMMOVDW
1383 OpARMMOVFWU
1384 OpARMMOVDWU
1385 OpARMMOVFD
1386 OpARMMOVDF
1387 OpARMCMOVWHSconst
1388 OpARMCMOVWLSconst
1389 OpARMSRAcond
1390 OpARMCALLstatic
1391 OpARMCALLtail
1392 OpARMCALLclosure
1393 OpARMCALLinter
1394 OpARMLoweredNilCheck
1395 OpARMEqual
1396 OpARMNotEqual
1397 OpARMLessThan
1398 OpARMLessEqual
1399 OpARMGreaterThan
1400 OpARMGreaterEqual
1401 OpARMLessThanU
1402 OpARMLessEqualU
1403 OpARMGreaterThanU
1404 OpARMGreaterEqualU
1405 OpARMDUFFZERO
1406 OpARMDUFFCOPY
1407 OpARMLoweredZero
1408 OpARMLoweredMove
1409 OpARMLoweredGetClosurePtr
1410 OpARMLoweredGetCallerSP
1411 OpARMLoweredGetCallerPC
1412 OpARMLoweredPanicBoundsA
1413 OpARMLoweredPanicBoundsB
1414 OpARMLoweredPanicBoundsC
1415 OpARMLoweredPanicExtendA
1416 OpARMLoweredPanicExtendB
1417 OpARMLoweredPanicExtendC
1418 OpARMFlagConstant
1419 OpARMInvertFlags
1420 OpARMLoweredWB
1421
1422 OpARM64ADCSflags
1423 OpARM64ADCzerocarry
1424 OpARM64ADD
1425 OpARM64ADDconst
1426 OpARM64ADDSconstflags
1427 OpARM64ADDSflags
1428 OpARM64SUB
1429 OpARM64SUBconst
1430 OpARM64SBCSflags
1431 OpARM64SUBSflags
1432 OpARM64MUL
1433 OpARM64MULW
1434 OpARM64MNEG
1435 OpARM64MNEGW
1436 OpARM64MULH
1437 OpARM64UMULH
1438 OpARM64MULL
1439 OpARM64UMULL
1440 OpARM64DIV
1441 OpARM64UDIV
1442 OpARM64DIVW
1443 OpARM64UDIVW
1444 OpARM64MOD
1445 OpARM64UMOD
1446 OpARM64MODW
1447 OpARM64UMODW
1448 OpARM64FADDS
1449 OpARM64FADDD
1450 OpARM64FSUBS
1451 OpARM64FSUBD
1452 OpARM64FMULS
1453 OpARM64FMULD
1454 OpARM64FNMULS
1455 OpARM64FNMULD
1456 OpARM64FDIVS
1457 OpARM64FDIVD
1458 OpARM64AND
1459 OpARM64ANDconst
1460 OpARM64OR
1461 OpARM64ORconst
1462 OpARM64XOR
1463 OpARM64XORconst
1464 OpARM64BIC
1465 OpARM64EON
1466 OpARM64ORN
1467 OpARM64MVN
1468 OpARM64NEG
1469 OpARM64NEGSflags
1470 OpARM64NGCzerocarry
1471 OpARM64FABSD
1472 OpARM64FNEGS
1473 OpARM64FNEGD
1474 OpARM64FSQRTD
1475 OpARM64FSQRTS
1476 OpARM64FMIND
1477 OpARM64FMINS
1478 OpARM64FMAXD
1479 OpARM64FMAXS
1480 OpARM64REV
1481 OpARM64REVW
1482 OpARM64REV16
1483 OpARM64REV16W
1484 OpARM64RBIT
1485 OpARM64RBITW
1486 OpARM64CLZ
1487 OpARM64CLZW
1488 OpARM64VCNT
1489 OpARM64VUADDLV
1490 OpARM64LoweredRound32F
1491 OpARM64LoweredRound64F
1492 OpARM64FMADDS
1493 OpARM64FMADDD
1494 OpARM64FNMADDS
1495 OpARM64FNMADDD
1496 OpARM64FMSUBS
1497 OpARM64FMSUBD
1498 OpARM64FNMSUBS
1499 OpARM64FNMSUBD
1500 OpARM64MADD
1501 OpARM64MADDW
1502 OpARM64MSUB
1503 OpARM64MSUBW
1504 OpARM64SLL
1505 OpARM64SLLconst
1506 OpARM64SRL
1507 OpARM64SRLconst
1508 OpARM64SRA
1509 OpARM64SRAconst
1510 OpARM64ROR
1511 OpARM64RORW
1512 OpARM64RORconst
1513 OpARM64RORWconst
1514 OpARM64EXTRconst
1515 OpARM64EXTRWconst
1516 OpARM64CMP
1517 OpARM64CMPconst
1518 OpARM64CMPW
1519 OpARM64CMPWconst
1520 OpARM64CMN
1521 OpARM64CMNconst
1522 OpARM64CMNW
1523 OpARM64CMNWconst
1524 OpARM64TST
1525 OpARM64TSTconst
1526 OpARM64TSTW
1527 OpARM64TSTWconst
1528 OpARM64FCMPS
1529 OpARM64FCMPD
1530 OpARM64FCMPS0
1531 OpARM64FCMPD0
1532 OpARM64MVNshiftLL
1533 OpARM64MVNshiftRL
1534 OpARM64MVNshiftRA
1535 OpARM64MVNshiftRO
1536 OpARM64NEGshiftLL
1537 OpARM64NEGshiftRL
1538 OpARM64NEGshiftRA
1539 OpARM64ADDshiftLL
1540 OpARM64ADDshiftRL
1541 OpARM64ADDshiftRA
1542 OpARM64SUBshiftLL
1543 OpARM64SUBshiftRL
1544 OpARM64SUBshiftRA
1545 OpARM64ANDshiftLL
1546 OpARM64ANDshiftRL
1547 OpARM64ANDshiftRA
1548 OpARM64ANDshiftRO
1549 OpARM64ORshiftLL
1550 OpARM64ORshiftRL
1551 OpARM64ORshiftRA
1552 OpARM64ORshiftRO
1553 OpARM64XORshiftLL
1554 OpARM64XORshiftRL
1555 OpARM64XORshiftRA
1556 OpARM64XORshiftRO
1557 OpARM64BICshiftLL
1558 OpARM64BICshiftRL
1559 OpARM64BICshiftRA
1560 OpARM64BICshiftRO
1561 OpARM64EONshiftLL
1562 OpARM64EONshiftRL
1563 OpARM64EONshiftRA
1564 OpARM64EONshiftRO
1565 OpARM64ORNshiftLL
1566 OpARM64ORNshiftRL
1567 OpARM64ORNshiftRA
1568 OpARM64ORNshiftRO
1569 OpARM64CMPshiftLL
1570 OpARM64CMPshiftRL
1571 OpARM64CMPshiftRA
1572 OpARM64CMNshiftLL
1573 OpARM64CMNshiftRL
1574 OpARM64CMNshiftRA
1575 OpARM64TSTshiftLL
1576 OpARM64TSTshiftRL
1577 OpARM64TSTshiftRA
1578 OpARM64TSTshiftRO
1579 OpARM64BFI
1580 OpARM64BFXIL
1581 OpARM64SBFIZ
1582 OpARM64SBFX
1583 OpARM64UBFIZ
1584 OpARM64UBFX
1585 OpARM64MOVDconst
1586 OpARM64FMOVSconst
1587 OpARM64FMOVDconst
1588 OpARM64MOVDaddr
1589 OpARM64MOVBload
1590 OpARM64MOVBUload
1591 OpARM64MOVHload
1592 OpARM64MOVHUload
1593 OpARM64MOVWload
1594 OpARM64MOVWUload
1595 OpARM64MOVDload
1596 OpARM64LDP
1597 OpARM64FMOVSload
1598 OpARM64FMOVDload
1599 OpARM64MOVDloadidx
1600 OpARM64MOVWloadidx
1601 OpARM64MOVWUloadidx
1602 OpARM64MOVHloadidx
1603 OpARM64MOVHUloadidx
1604 OpARM64MOVBloadidx
1605 OpARM64MOVBUloadidx
1606 OpARM64FMOVSloadidx
1607 OpARM64FMOVDloadidx
1608 OpARM64MOVHloadidx2
1609 OpARM64MOVHUloadidx2
1610 OpARM64MOVWloadidx4
1611 OpARM64MOVWUloadidx4
1612 OpARM64MOVDloadidx8
1613 OpARM64FMOVSloadidx4
1614 OpARM64FMOVDloadidx8
1615 OpARM64MOVBstore
1616 OpARM64MOVHstore
1617 OpARM64MOVWstore
1618 OpARM64MOVDstore
1619 OpARM64STP
1620 OpARM64FMOVSstore
1621 OpARM64FMOVDstore
1622 OpARM64MOVBstoreidx
1623 OpARM64MOVHstoreidx
1624 OpARM64MOVWstoreidx
1625 OpARM64MOVDstoreidx
1626 OpARM64FMOVSstoreidx
1627 OpARM64FMOVDstoreidx
1628 OpARM64MOVHstoreidx2
1629 OpARM64MOVWstoreidx4
1630 OpARM64MOVDstoreidx8
1631 OpARM64FMOVSstoreidx4
1632 OpARM64FMOVDstoreidx8
1633 OpARM64MOVBstorezero
1634 OpARM64MOVHstorezero
1635 OpARM64MOVWstorezero
1636 OpARM64MOVDstorezero
1637 OpARM64MOVQstorezero
1638 OpARM64MOVBstorezeroidx
1639 OpARM64MOVHstorezeroidx
1640 OpARM64MOVWstorezeroidx
1641 OpARM64MOVDstorezeroidx
1642 OpARM64MOVHstorezeroidx2
1643 OpARM64MOVWstorezeroidx4
1644 OpARM64MOVDstorezeroidx8
1645 OpARM64FMOVDgpfp
1646 OpARM64FMOVDfpgp
1647 OpARM64FMOVSgpfp
1648 OpARM64FMOVSfpgp
1649 OpARM64MOVBreg
1650 OpARM64MOVBUreg
1651 OpARM64MOVHreg
1652 OpARM64MOVHUreg
1653 OpARM64MOVWreg
1654 OpARM64MOVWUreg
1655 OpARM64MOVDreg
1656 OpARM64MOVDnop
1657 OpARM64SCVTFWS
1658 OpARM64SCVTFWD
1659 OpARM64UCVTFWS
1660 OpARM64UCVTFWD
1661 OpARM64SCVTFS
1662 OpARM64SCVTFD
1663 OpARM64UCVTFS
1664 OpARM64UCVTFD
1665 OpARM64FCVTZSSW
1666 OpARM64FCVTZSDW
1667 OpARM64FCVTZUSW
1668 OpARM64FCVTZUDW
1669 OpARM64FCVTZSS
1670 OpARM64FCVTZSD
1671 OpARM64FCVTZUS
1672 OpARM64FCVTZUD
1673 OpARM64FCVTSD
1674 OpARM64FCVTDS
1675 OpARM64FRINTAD
1676 OpARM64FRINTMD
1677 OpARM64FRINTND
1678 OpARM64FRINTPD
1679 OpARM64FRINTZD
1680 OpARM64CSEL
1681 OpARM64CSEL0
1682 OpARM64CSINC
1683 OpARM64CSINV
1684 OpARM64CSNEG
1685 OpARM64CSETM
1686 OpARM64CALLstatic
1687 OpARM64CALLtail
1688 OpARM64CALLclosure
1689 OpARM64CALLinter
1690 OpARM64LoweredNilCheck
1691 OpARM64Equal
1692 OpARM64NotEqual
1693 OpARM64LessThan
1694 OpARM64LessEqual
1695 OpARM64GreaterThan
1696 OpARM64GreaterEqual
1697 OpARM64LessThanU
1698 OpARM64LessEqualU
1699 OpARM64GreaterThanU
1700 OpARM64GreaterEqualU
1701 OpARM64LessThanF
1702 OpARM64LessEqualF
1703 OpARM64GreaterThanF
1704 OpARM64GreaterEqualF
1705 OpARM64NotLessThanF
1706 OpARM64NotLessEqualF
1707 OpARM64NotGreaterThanF
1708 OpARM64NotGreaterEqualF
1709 OpARM64LessThanNoov
1710 OpARM64GreaterEqualNoov
1711 OpARM64DUFFZERO
1712 OpARM64LoweredZero
1713 OpARM64DUFFCOPY
1714 OpARM64LoweredMove
1715 OpARM64LoweredGetClosurePtr
1716 OpARM64LoweredGetCallerSP
1717 OpARM64LoweredGetCallerPC
1718 OpARM64FlagConstant
1719 OpARM64InvertFlags
1720 OpARM64LDAR
1721 OpARM64LDARB
1722 OpARM64LDARW
1723 OpARM64STLRB
1724 OpARM64STLR
1725 OpARM64STLRW
1726 OpARM64LoweredAtomicExchange64
1727 OpARM64LoweredAtomicExchange32
1728 OpARM64LoweredAtomicExchange8
1729 OpARM64LoweredAtomicExchange64Variant
1730 OpARM64LoweredAtomicExchange32Variant
1731 OpARM64LoweredAtomicExchange8Variant
1732 OpARM64LoweredAtomicAdd64
1733 OpARM64LoweredAtomicAdd32
1734 OpARM64LoweredAtomicAdd64Variant
1735 OpARM64LoweredAtomicAdd32Variant
1736 OpARM64LoweredAtomicCas64
1737 OpARM64LoweredAtomicCas32
1738 OpARM64LoweredAtomicCas64Variant
1739 OpARM64LoweredAtomicCas32Variant
1740 OpARM64LoweredAtomicAnd8
1741 OpARM64LoweredAtomicOr8
1742 OpARM64LoweredAtomicAnd64
1743 OpARM64LoweredAtomicOr64
1744 OpARM64LoweredAtomicAnd32
1745 OpARM64LoweredAtomicOr32
1746 OpARM64LoweredAtomicAnd8Variant
1747 OpARM64LoweredAtomicOr8Variant
1748 OpARM64LoweredAtomicAnd64Variant
1749 OpARM64LoweredAtomicOr64Variant
1750 OpARM64LoweredAtomicAnd32Variant
1751 OpARM64LoweredAtomicOr32Variant
1752 OpARM64LoweredWB
1753 OpARM64LoweredPanicBoundsA
1754 OpARM64LoweredPanicBoundsB
1755 OpARM64LoweredPanicBoundsC
1756 OpARM64PRFM
1757 OpARM64DMB
1758
1759 OpLOONG64NEGV
1760 OpLOONG64NEGF
1761 OpLOONG64NEGD
1762 OpLOONG64SQRTD
1763 OpLOONG64SQRTF
1764 OpLOONG64ABSD
1765 OpLOONG64CLZW
1766 OpLOONG64CLZV
1767 OpLOONG64CTZW
1768 OpLOONG64CTZV
1769 OpLOONG64REVB2H
1770 OpLOONG64REVB2W
1771 OpLOONG64REVBV
1772 OpLOONG64BITREV4B
1773 OpLOONG64BITREVW
1774 OpLOONG64BITREVV
1775 OpLOONG64VPCNT64
1776 OpLOONG64VPCNT32
1777 OpLOONG64VPCNT16
1778 OpLOONG64ADDV
1779 OpLOONG64ADDVconst
1780 OpLOONG64SUBV
1781 OpLOONG64SUBVconst
1782 OpLOONG64MULV
1783 OpLOONG64MULHV
1784 OpLOONG64MULHVU
1785 OpLOONG64DIVV
1786 OpLOONG64DIVVU
1787 OpLOONG64REMV
1788 OpLOONG64REMVU
1789 OpLOONG64ADDF
1790 OpLOONG64ADDD
1791 OpLOONG64SUBF
1792 OpLOONG64SUBD
1793 OpLOONG64MULF
1794 OpLOONG64MULD
1795 OpLOONG64DIVF
1796 OpLOONG64DIVD
1797 OpLOONG64AND
1798 OpLOONG64ANDconst
1799 OpLOONG64OR
1800 OpLOONG64ORconst
1801 OpLOONG64XOR
1802 OpLOONG64XORconst
1803 OpLOONG64NOR
1804 OpLOONG64NORconst
1805 OpLOONG64FMADDF
1806 OpLOONG64FMADDD
1807 OpLOONG64FMSUBF
1808 OpLOONG64FMSUBD
1809 OpLOONG64FNMADDF
1810 OpLOONG64FNMADDD
1811 OpLOONG64FNMSUBF
1812 OpLOONG64FNMSUBD
1813 OpLOONG64FMINF
1814 OpLOONG64FMIND
1815 OpLOONG64FMAXF
1816 OpLOONG64FMAXD
1817 OpLOONG64MASKEQZ
1818 OpLOONG64MASKNEZ
1819 OpLOONG64FCOPYSGD
1820 OpLOONG64SLLV
1821 OpLOONG64SLLVconst
1822 OpLOONG64SRLV
1823 OpLOONG64SRLVconst
1824 OpLOONG64SRAV
1825 OpLOONG64SRAVconst
1826 OpLOONG64ROTR
1827 OpLOONG64ROTRV
1828 OpLOONG64ROTRconst
1829 OpLOONG64ROTRVconst
1830 OpLOONG64SGT
1831 OpLOONG64SGTconst
1832 OpLOONG64SGTU
1833 OpLOONG64SGTUconst
1834 OpLOONG64CMPEQF
1835 OpLOONG64CMPEQD
1836 OpLOONG64CMPGEF
1837 OpLOONG64CMPGED
1838 OpLOONG64CMPGTF
1839 OpLOONG64CMPGTD
1840 OpLOONG64BSTRPICKW
1841 OpLOONG64BSTRPICKV
1842 OpLOONG64MOVVconst
1843 OpLOONG64MOVFconst
1844 OpLOONG64MOVDconst
1845 OpLOONG64MOVVaddr
1846 OpLOONG64MOVBload
1847 OpLOONG64MOVBUload
1848 OpLOONG64MOVHload
1849 OpLOONG64MOVHUload
1850 OpLOONG64MOVWload
1851 OpLOONG64MOVWUload
1852 OpLOONG64MOVVload
1853 OpLOONG64MOVFload
1854 OpLOONG64MOVDload
1855 OpLOONG64MOVVloadidx
1856 OpLOONG64MOVWloadidx
1857 OpLOONG64MOVWUloadidx
1858 OpLOONG64MOVHloadidx
1859 OpLOONG64MOVHUloadidx
1860 OpLOONG64MOVBloadidx
1861 OpLOONG64MOVBUloadidx
1862 OpLOONG64MOVFloadidx
1863 OpLOONG64MOVDloadidx
1864 OpLOONG64MOVBstore
1865 OpLOONG64MOVHstore
1866 OpLOONG64MOVWstore
1867 OpLOONG64MOVVstore
1868 OpLOONG64MOVFstore
1869 OpLOONG64MOVDstore
1870 OpLOONG64MOVBstoreidx
1871 OpLOONG64MOVHstoreidx
1872 OpLOONG64MOVWstoreidx
1873 OpLOONG64MOVVstoreidx
1874 OpLOONG64MOVFstoreidx
1875 OpLOONG64MOVDstoreidx
1876 OpLOONG64MOVBstorezero
1877 OpLOONG64MOVHstorezero
1878 OpLOONG64MOVWstorezero
1879 OpLOONG64MOVVstorezero
1880 OpLOONG64MOVBstorezeroidx
1881 OpLOONG64MOVHstorezeroidx
1882 OpLOONG64MOVWstorezeroidx
1883 OpLOONG64MOVVstorezeroidx
1884 OpLOONG64MOVWfpgp
1885 OpLOONG64MOVWgpfp
1886 OpLOONG64MOVVfpgp
1887 OpLOONG64MOVVgpfp
1888 OpLOONG64MOVBreg
1889 OpLOONG64MOVBUreg
1890 OpLOONG64MOVHreg
1891 OpLOONG64MOVHUreg
1892 OpLOONG64MOVWreg
1893 OpLOONG64MOVWUreg
1894 OpLOONG64MOVVreg
1895 OpLOONG64MOVVnop
1896 OpLOONG64MOVWF
1897 OpLOONG64MOVWD
1898 OpLOONG64MOVVF
1899 OpLOONG64MOVVD
1900 OpLOONG64TRUNCFW
1901 OpLOONG64TRUNCDW
1902 OpLOONG64TRUNCFV
1903 OpLOONG64TRUNCDV
1904 OpLOONG64MOVFD
1905 OpLOONG64MOVDF
1906 OpLOONG64LoweredRound32F
1907 OpLOONG64LoweredRound64F
1908 OpLOONG64CALLstatic
1909 OpLOONG64CALLtail
1910 OpLOONG64CALLclosure
1911 OpLOONG64CALLinter
1912 OpLOONG64DUFFZERO
1913 OpLOONG64DUFFCOPY
1914 OpLOONG64LoweredZero
1915 OpLOONG64LoweredMove
1916 OpLOONG64LoweredAtomicLoad8
1917 OpLOONG64LoweredAtomicLoad32
1918 OpLOONG64LoweredAtomicLoad64
1919 OpLOONG64LoweredAtomicStore8
1920 OpLOONG64LoweredAtomicStore32
1921 OpLOONG64LoweredAtomicStore64
1922 OpLOONG64LoweredAtomicStore8Variant
1923 OpLOONG64LoweredAtomicStore32Variant
1924 OpLOONG64LoweredAtomicStore64Variant
1925 OpLOONG64LoweredAtomicExchange32
1926 OpLOONG64LoweredAtomicExchange64
1927 OpLOONG64LoweredAtomicAdd32
1928 OpLOONG64LoweredAtomicAdd64
1929 OpLOONG64LoweredAtomicCas32
1930 OpLOONG64LoweredAtomicCas64
1931 OpLOONG64LoweredAtomicAnd32
1932 OpLOONG64LoweredAtomicOr32
1933 OpLOONG64LoweredAtomicAnd32value
1934 OpLOONG64LoweredAtomicAnd64value
1935 OpLOONG64LoweredAtomicOr32value
1936 OpLOONG64LoweredAtomicOr64value
1937 OpLOONG64LoweredNilCheck
1938 OpLOONG64FPFlagTrue
1939 OpLOONG64FPFlagFalse
1940 OpLOONG64LoweredGetClosurePtr
1941 OpLOONG64LoweredGetCallerSP
1942 OpLOONG64LoweredGetCallerPC
1943 OpLOONG64LoweredWB
1944 OpLOONG64LoweredPubBarrier
1945 OpLOONG64LoweredPanicBoundsA
1946 OpLOONG64LoweredPanicBoundsB
1947 OpLOONG64LoweredPanicBoundsC
1948
1949 OpMIPSADD
1950 OpMIPSADDconst
1951 OpMIPSSUB
1952 OpMIPSSUBconst
1953 OpMIPSMUL
1954 OpMIPSMULT
1955 OpMIPSMULTU
1956 OpMIPSDIV
1957 OpMIPSDIVU
1958 OpMIPSADDF
1959 OpMIPSADDD
1960 OpMIPSSUBF
1961 OpMIPSSUBD
1962 OpMIPSMULF
1963 OpMIPSMULD
1964 OpMIPSDIVF
1965 OpMIPSDIVD
1966 OpMIPSAND
1967 OpMIPSANDconst
1968 OpMIPSOR
1969 OpMIPSORconst
1970 OpMIPSXOR
1971 OpMIPSXORconst
1972 OpMIPSNOR
1973 OpMIPSNORconst
1974 OpMIPSNEG
1975 OpMIPSNEGF
1976 OpMIPSNEGD
1977 OpMIPSABSD
1978 OpMIPSSQRTD
1979 OpMIPSSQRTF
1980 OpMIPSSLL
1981 OpMIPSSLLconst
1982 OpMIPSSRL
1983 OpMIPSSRLconst
1984 OpMIPSSRA
1985 OpMIPSSRAconst
1986 OpMIPSCLZ
1987 OpMIPSSGT
1988 OpMIPSSGTconst
1989 OpMIPSSGTzero
1990 OpMIPSSGTU
1991 OpMIPSSGTUconst
1992 OpMIPSSGTUzero
1993 OpMIPSCMPEQF
1994 OpMIPSCMPEQD
1995 OpMIPSCMPGEF
1996 OpMIPSCMPGED
1997 OpMIPSCMPGTF
1998 OpMIPSCMPGTD
1999 OpMIPSMOVWconst
2000 OpMIPSMOVFconst
2001 OpMIPSMOVDconst
2002 OpMIPSMOVWaddr
2003 OpMIPSMOVBload
2004 OpMIPSMOVBUload
2005 OpMIPSMOVHload
2006 OpMIPSMOVHUload
2007 OpMIPSMOVWload
2008 OpMIPSMOVFload
2009 OpMIPSMOVDload
2010 OpMIPSMOVBstore
2011 OpMIPSMOVHstore
2012 OpMIPSMOVWstore
2013 OpMIPSMOVFstore
2014 OpMIPSMOVDstore
2015 OpMIPSMOVBstorezero
2016 OpMIPSMOVHstorezero
2017 OpMIPSMOVWstorezero
2018 OpMIPSMOVWfpgp
2019 OpMIPSMOVWgpfp
2020 OpMIPSMOVBreg
2021 OpMIPSMOVBUreg
2022 OpMIPSMOVHreg
2023 OpMIPSMOVHUreg
2024 OpMIPSMOVWreg
2025 OpMIPSMOVWnop
2026 OpMIPSCMOVZ
2027 OpMIPSCMOVZzero
2028 OpMIPSMOVWF
2029 OpMIPSMOVWD
2030 OpMIPSTRUNCFW
2031 OpMIPSTRUNCDW
2032 OpMIPSMOVFD
2033 OpMIPSMOVDF
2034 OpMIPSCALLstatic
2035 OpMIPSCALLtail
2036 OpMIPSCALLclosure
2037 OpMIPSCALLinter
2038 OpMIPSLoweredAtomicLoad8
2039 OpMIPSLoweredAtomicLoad32
2040 OpMIPSLoweredAtomicStore8
2041 OpMIPSLoweredAtomicStore32
2042 OpMIPSLoweredAtomicStorezero
2043 OpMIPSLoweredAtomicExchange
2044 OpMIPSLoweredAtomicAdd
2045 OpMIPSLoweredAtomicAddconst
2046 OpMIPSLoweredAtomicCas
2047 OpMIPSLoweredAtomicAnd
2048 OpMIPSLoweredAtomicOr
2049 OpMIPSLoweredZero
2050 OpMIPSLoweredMove
2051 OpMIPSLoweredNilCheck
2052 OpMIPSFPFlagTrue
2053 OpMIPSFPFlagFalse
2054 OpMIPSLoweredGetClosurePtr
2055 OpMIPSLoweredGetCallerSP
2056 OpMIPSLoweredGetCallerPC
2057 OpMIPSLoweredWB
2058 OpMIPSLoweredPanicBoundsA
2059 OpMIPSLoweredPanicBoundsB
2060 OpMIPSLoweredPanicBoundsC
2061 OpMIPSLoweredPanicExtendA
2062 OpMIPSLoweredPanicExtendB
2063 OpMIPSLoweredPanicExtendC
2064
2065 OpMIPS64ADDV
2066 OpMIPS64ADDVconst
2067 OpMIPS64SUBV
2068 OpMIPS64SUBVconst
2069 OpMIPS64MULV
2070 OpMIPS64MULVU
2071 OpMIPS64DIVV
2072 OpMIPS64DIVVU
2073 OpMIPS64ADDF
2074 OpMIPS64ADDD
2075 OpMIPS64SUBF
2076 OpMIPS64SUBD
2077 OpMIPS64MULF
2078 OpMIPS64MULD
2079 OpMIPS64DIVF
2080 OpMIPS64DIVD
2081 OpMIPS64AND
2082 OpMIPS64ANDconst
2083 OpMIPS64OR
2084 OpMIPS64ORconst
2085 OpMIPS64XOR
2086 OpMIPS64XORconst
2087 OpMIPS64NOR
2088 OpMIPS64NORconst
2089 OpMIPS64NEGV
2090 OpMIPS64NEGF
2091 OpMIPS64NEGD
2092 OpMIPS64ABSD
2093 OpMIPS64SQRTD
2094 OpMIPS64SQRTF
2095 OpMIPS64SLLV
2096 OpMIPS64SLLVconst
2097 OpMIPS64SRLV
2098 OpMIPS64SRLVconst
2099 OpMIPS64SRAV
2100 OpMIPS64SRAVconst
2101 OpMIPS64SGT
2102 OpMIPS64SGTconst
2103 OpMIPS64SGTU
2104 OpMIPS64SGTUconst
2105 OpMIPS64CMPEQF
2106 OpMIPS64CMPEQD
2107 OpMIPS64CMPGEF
2108 OpMIPS64CMPGED
2109 OpMIPS64CMPGTF
2110 OpMIPS64CMPGTD
2111 OpMIPS64MOVVconst
2112 OpMIPS64MOVFconst
2113 OpMIPS64MOVDconst
2114 OpMIPS64MOVVaddr
2115 OpMIPS64MOVBload
2116 OpMIPS64MOVBUload
2117 OpMIPS64MOVHload
2118 OpMIPS64MOVHUload
2119 OpMIPS64MOVWload
2120 OpMIPS64MOVWUload
2121 OpMIPS64MOVVload
2122 OpMIPS64MOVFload
2123 OpMIPS64MOVDload
2124 OpMIPS64MOVBstore
2125 OpMIPS64MOVHstore
2126 OpMIPS64MOVWstore
2127 OpMIPS64MOVVstore
2128 OpMIPS64MOVFstore
2129 OpMIPS64MOVDstore
2130 OpMIPS64MOVBstorezero
2131 OpMIPS64MOVHstorezero
2132 OpMIPS64MOVWstorezero
2133 OpMIPS64MOVVstorezero
2134 OpMIPS64MOVWfpgp
2135 OpMIPS64MOVWgpfp
2136 OpMIPS64MOVVfpgp
2137 OpMIPS64MOVVgpfp
2138 OpMIPS64MOVBreg
2139 OpMIPS64MOVBUreg
2140 OpMIPS64MOVHreg
2141 OpMIPS64MOVHUreg
2142 OpMIPS64MOVWreg
2143 OpMIPS64MOVWUreg
2144 OpMIPS64MOVVreg
2145 OpMIPS64MOVVnop
2146 OpMIPS64MOVWF
2147 OpMIPS64MOVWD
2148 OpMIPS64MOVVF
2149 OpMIPS64MOVVD
2150 OpMIPS64TRUNCFW
2151 OpMIPS64TRUNCDW
2152 OpMIPS64TRUNCFV
2153 OpMIPS64TRUNCDV
2154 OpMIPS64MOVFD
2155 OpMIPS64MOVDF
2156 OpMIPS64CALLstatic
2157 OpMIPS64CALLtail
2158 OpMIPS64CALLclosure
2159 OpMIPS64CALLinter
2160 OpMIPS64DUFFZERO
2161 OpMIPS64DUFFCOPY
2162 OpMIPS64LoweredZero
2163 OpMIPS64LoweredMove
2164 OpMIPS64LoweredAtomicAnd32
2165 OpMIPS64LoweredAtomicOr32
2166 OpMIPS64LoweredAtomicLoad8
2167 OpMIPS64LoweredAtomicLoad32
2168 OpMIPS64LoweredAtomicLoad64
2169 OpMIPS64LoweredAtomicStore8
2170 OpMIPS64LoweredAtomicStore32
2171 OpMIPS64LoweredAtomicStore64
2172 OpMIPS64LoweredAtomicStorezero32
2173 OpMIPS64LoweredAtomicStorezero64
2174 OpMIPS64LoweredAtomicExchange32
2175 OpMIPS64LoweredAtomicExchange64
2176 OpMIPS64LoweredAtomicAdd32
2177 OpMIPS64LoweredAtomicAdd64
2178 OpMIPS64LoweredAtomicAddconst32
2179 OpMIPS64LoweredAtomicAddconst64
2180 OpMIPS64LoweredAtomicCas32
2181 OpMIPS64LoweredAtomicCas64
2182 OpMIPS64LoweredNilCheck
2183 OpMIPS64FPFlagTrue
2184 OpMIPS64FPFlagFalse
2185 OpMIPS64LoweredGetClosurePtr
2186 OpMIPS64LoweredGetCallerSP
2187 OpMIPS64LoweredGetCallerPC
2188 OpMIPS64LoweredWB
2189 OpMIPS64LoweredPanicBoundsA
2190 OpMIPS64LoweredPanicBoundsB
2191 OpMIPS64LoweredPanicBoundsC
2192
2193 OpPPC64ADD
2194 OpPPC64ADDCC
2195 OpPPC64ADDconst
2196 OpPPC64ADDCCconst
2197 OpPPC64FADD
2198 OpPPC64FADDS
2199 OpPPC64SUB
2200 OpPPC64SUBCC
2201 OpPPC64SUBFCconst
2202 OpPPC64FSUB
2203 OpPPC64FSUBS
2204 OpPPC64XSMINJDP
2205 OpPPC64XSMAXJDP
2206 OpPPC64MULLD
2207 OpPPC64MULLW
2208 OpPPC64MULLDconst
2209 OpPPC64MULLWconst
2210 OpPPC64MADDLD
2211 OpPPC64MULHD
2212 OpPPC64MULHW
2213 OpPPC64MULHDU
2214 OpPPC64MULHDUCC
2215 OpPPC64MULHWU
2216 OpPPC64FMUL
2217 OpPPC64FMULS
2218 OpPPC64FMADD
2219 OpPPC64FMADDS
2220 OpPPC64FMSUB
2221 OpPPC64FMSUBS
2222 OpPPC64SRAD
2223 OpPPC64SRAW
2224 OpPPC64SRD
2225 OpPPC64SRW
2226 OpPPC64SLD
2227 OpPPC64SLW
2228 OpPPC64ROTL
2229 OpPPC64ROTLW
2230 OpPPC64CLRLSLWI
2231 OpPPC64CLRLSLDI
2232 OpPPC64ADDC
2233 OpPPC64SUBC
2234 OpPPC64ADDCconst
2235 OpPPC64SUBCconst
2236 OpPPC64ADDE
2237 OpPPC64ADDZE
2238 OpPPC64SUBE
2239 OpPPC64ADDZEzero
2240 OpPPC64SUBZEzero
2241 OpPPC64SRADconst
2242 OpPPC64SRAWconst
2243 OpPPC64SRDconst
2244 OpPPC64SRWconst
2245 OpPPC64SLDconst
2246 OpPPC64SLWconst
2247 OpPPC64ROTLconst
2248 OpPPC64ROTLWconst
2249 OpPPC64EXTSWSLconst
2250 OpPPC64RLWINM
2251 OpPPC64RLWNM
2252 OpPPC64RLWMI
2253 OpPPC64RLDICL
2254 OpPPC64RLDICLCC
2255 OpPPC64RLDICR
2256 OpPPC64CNTLZD
2257 OpPPC64CNTLZDCC
2258 OpPPC64CNTLZW
2259 OpPPC64CNTTZD
2260 OpPPC64CNTTZW
2261 OpPPC64POPCNTD
2262 OpPPC64POPCNTW
2263 OpPPC64POPCNTB
2264 OpPPC64FDIV
2265 OpPPC64FDIVS
2266 OpPPC64DIVD
2267 OpPPC64DIVW
2268 OpPPC64DIVDU
2269 OpPPC64DIVWU
2270 OpPPC64MODUD
2271 OpPPC64MODSD
2272 OpPPC64MODUW
2273 OpPPC64MODSW
2274 OpPPC64FCTIDZ
2275 OpPPC64FCTIWZ
2276 OpPPC64FCFID
2277 OpPPC64FCFIDS
2278 OpPPC64FRSP
2279 OpPPC64MFVSRD
2280 OpPPC64MTVSRD
2281 OpPPC64AND
2282 OpPPC64ANDN
2283 OpPPC64ANDNCC
2284 OpPPC64ANDCC
2285 OpPPC64OR
2286 OpPPC64ORN
2287 OpPPC64ORCC
2288 OpPPC64NOR
2289 OpPPC64NORCC
2290 OpPPC64XOR
2291 OpPPC64XORCC
2292 OpPPC64EQV
2293 OpPPC64NEG
2294 OpPPC64NEGCC
2295 OpPPC64BRD
2296 OpPPC64BRW
2297 OpPPC64BRH
2298 OpPPC64FNEG
2299 OpPPC64FSQRT
2300 OpPPC64FSQRTS
2301 OpPPC64FFLOOR
2302 OpPPC64FCEIL
2303 OpPPC64FTRUNC
2304 OpPPC64FROUND
2305 OpPPC64FABS
2306 OpPPC64FNABS
2307 OpPPC64FCPSGN
2308 OpPPC64ORconst
2309 OpPPC64XORconst
2310 OpPPC64ANDCCconst
2311 OpPPC64ANDconst
2312 OpPPC64MOVBreg
2313 OpPPC64MOVBZreg
2314 OpPPC64MOVHreg
2315 OpPPC64MOVHZreg
2316 OpPPC64MOVWreg
2317 OpPPC64MOVWZreg
2318 OpPPC64MOVBZload
2319 OpPPC64MOVHload
2320 OpPPC64MOVHZload
2321 OpPPC64MOVWload
2322 OpPPC64MOVWZload
2323 OpPPC64MOVDload
2324 OpPPC64MOVDBRload
2325 OpPPC64MOVWBRload
2326 OpPPC64MOVHBRload
2327 OpPPC64MOVBZloadidx
2328 OpPPC64MOVHloadidx
2329 OpPPC64MOVHZloadidx
2330 OpPPC64MOVWloadidx
2331 OpPPC64MOVWZloadidx
2332 OpPPC64MOVDloadidx
2333 OpPPC64MOVHBRloadidx
2334 OpPPC64MOVWBRloadidx
2335 OpPPC64MOVDBRloadidx
2336 OpPPC64FMOVDloadidx
2337 OpPPC64FMOVSloadidx
2338 OpPPC64DCBT
2339 OpPPC64MOVDBRstore
2340 OpPPC64MOVWBRstore
2341 OpPPC64MOVHBRstore
2342 OpPPC64FMOVDload
2343 OpPPC64FMOVSload
2344 OpPPC64MOVBstore
2345 OpPPC64MOVHstore
2346 OpPPC64MOVWstore
2347 OpPPC64MOVDstore
2348 OpPPC64FMOVDstore
2349 OpPPC64FMOVSstore
2350 OpPPC64MOVBstoreidx
2351 OpPPC64MOVHstoreidx
2352 OpPPC64MOVWstoreidx
2353 OpPPC64MOVDstoreidx
2354 OpPPC64FMOVDstoreidx
2355 OpPPC64FMOVSstoreidx
2356 OpPPC64MOVHBRstoreidx
2357 OpPPC64MOVWBRstoreidx
2358 OpPPC64MOVDBRstoreidx
2359 OpPPC64MOVBstorezero
2360 OpPPC64MOVHstorezero
2361 OpPPC64MOVWstorezero
2362 OpPPC64MOVDstorezero
2363 OpPPC64MOVDaddr
2364 OpPPC64MOVDconst
2365 OpPPC64FMOVDconst
2366 OpPPC64FMOVSconst
2367 OpPPC64FCMPU
2368 OpPPC64CMP
2369 OpPPC64CMPU
2370 OpPPC64CMPW
2371 OpPPC64CMPWU
2372 OpPPC64CMPconst
2373 OpPPC64CMPUconst
2374 OpPPC64CMPWconst
2375 OpPPC64CMPWUconst
2376 OpPPC64ISEL
2377 OpPPC64ISELZ
2378 OpPPC64SETBC
2379 OpPPC64SETBCR
2380 OpPPC64Equal
2381 OpPPC64NotEqual
2382 OpPPC64LessThan
2383 OpPPC64FLessThan
2384 OpPPC64LessEqual
2385 OpPPC64FLessEqual
2386 OpPPC64GreaterThan
2387 OpPPC64FGreaterThan
2388 OpPPC64GreaterEqual
2389 OpPPC64FGreaterEqual
2390 OpPPC64LoweredGetClosurePtr
2391 OpPPC64LoweredGetCallerSP
2392 OpPPC64LoweredGetCallerPC
2393 OpPPC64LoweredNilCheck
2394 OpPPC64LoweredRound32F
2395 OpPPC64LoweredRound64F
2396 OpPPC64CALLstatic
2397 OpPPC64CALLtail
2398 OpPPC64CALLclosure
2399 OpPPC64CALLinter
2400 OpPPC64LoweredZero
2401 OpPPC64LoweredZeroShort
2402 OpPPC64LoweredQuadZeroShort
2403 OpPPC64LoweredQuadZero
2404 OpPPC64LoweredMove
2405 OpPPC64LoweredMoveShort
2406 OpPPC64LoweredQuadMove
2407 OpPPC64LoweredQuadMoveShort
2408 OpPPC64LoweredAtomicStore8
2409 OpPPC64LoweredAtomicStore32
2410 OpPPC64LoweredAtomicStore64
2411 OpPPC64LoweredAtomicLoad8
2412 OpPPC64LoweredAtomicLoad32
2413 OpPPC64LoweredAtomicLoad64
2414 OpPPC64LoweredAtomicLoadPtr
2415 OpPPC64LoweredAtomicAdd32
2416 OpPPC64LoweredAtomicAdd64
2417 OpPPC64LoweredAtomicExchange8
2418 OpPPC64LoweredAtomicExchange32
2419 OpPPC64LoweredAtomicExchange64
2420 OpPPC64LoweredAtomicCas64
2421 OpPPC64LoweredAtomicCas32
2422 OpPPC64LoweredAtomicAnd8
2423 OpPPC64LoweredAtomicAnd32
2424 OpPPC64LoweredAtomicOr8
2425 OpPPC64LoweredAtomicOr32
2426 OpPPC64LoweredWB
2427 OpPPC64LoweredPubBarrier
2428 OpPPC64LoweredPanicBoundsA
2429 OpPPC64LoweredPanicBoundsB
2430 OpPPC64LoweredPanicBoundsC
2431 OpPPC64InvertFlags
2432 OpPPC64FlagEQ
2433 OpPPC64FlagLT
2434 OpPPC64FlagGT
2435
2436 OpRISCV64ADD
2437 OpRISCV64ADDI
2438 OpRISCV64ADDIW
2439 OpRISCV64NEG
2440 OpRISCV64NEGW
2441 OpRISCV64SUB
2442 OpRISCV64SUBW
2443 OpRISCV64MUL
2444 OpRISCV64MULW
2445 OpRISCV64MULH
2446 OpRISCV64MULHU
2447 OpRISCV64LoweredMuluhilo
2448 OpRISCV64LoweredMuluover
2449 OpRISCV64DIV
2450 OpRISCV64DIVU
2451 OpRISCV64DIVW
2452 OpRISCV64DIVUW
2453 OpRISCV64REM
2454 OpRISCV64REMU
2455 OpRISCV64REMW
2456 OpRISCV64REMUW
2457 OpRISCV64MOVaddr
2458 OpRISCV64MOVDconst
2459 OpRISCV64MOVBload
2460 OpRISCV64MOVHload
2461 OpRISCV64MOVWload
2462 OpRISCV64MOVDload
2463 OpRISCV64MOVBUload
2464 OpRISCV64MOVHUload
2465 OpRISCV64MOVWUload
2466 OpRISCV64MOVBstore
2467 OpRISCV64MOVHstore
2468 OpRISCV64MOVWstore
2469 OpRISCV64MOVDstore
2470 OpRISCV64MOVBstorezero
2471 OpRISCV64MOVHstorezero
2472 OpRISCV64MOVWstorezero
2473 OpRISCV64MOVDstorezero
2474 OpRISCV64MOVBreg
2475 OpRISCV64MOVHreg
2476 OpRISCV64MOVWreg
2477 OpRISCV64MOVDreg
2478 OpRISCV64MOVBUreg
2479 OpRISCV64MOVHUreg
2480 OpRISCV64MOVWUreg
2481 OpRISCV64MOVDnop
2482 OpRISCV64SLL
2483 OpRISCV64SLLW
2484 OpRISCV64SRA
2485 OpRISCV64SRAW
2486 OpRISCV64SRL
2487 OpRISCV64SRLW
2488 OpRISCV64SLLI
2489 OpRISCV64SLLIW
2490 OpRISCV64SRAI
2491 OpRISCV64SRAIW
2492 OpRISCV64SRLI
2493 OpRISCV64SRLIW
2494 OpRISCV64SH1ADD
2495 OpRISCV64SH2ADD
2496 OpRISCV64SH3ADD
2497 OpRISCV64AND
2498 OpRISCV64ANDN
2499 OpRISCV64ANDI
2500 OpRISCV64NOT
2501 OpRISCV64OR
2502 OpRISCV64ORN
2503 OpRISCV64ORI
2504 OpRISCV64ROL
2505 OpRISCV64ROLW
2506 OpRISCV64ROR
2507 OpRISCV64RORI
2508 OpRISCV64RORIW
2509 OpRISCV64RORW
2510 OpRISCV64XNOR
2511 OpRISCV64XOR
2512 OpRISCV64XORI
2513 OpRISCV64MIN
2514 OpRISCV64MAX
2515 OpRISCV64MINU
2516 OpRISCV64MAXU
2517 OpRISCV64SEQZ
2518 OpRISCV64SNEZ
2519 OpRISCV64SLT
2520 OpRISCV64SLTI
2521 OpRISCV64SLTU
2522 OpRISCV64SLTIU
2523 OpRISCV64LoweredRound32F
2524 OpRISCV64LoweredRound64F
2525 OpRISCV64CALLstatic
2526 OpRISCV64CALLtail
2527 OpRISCV64CALLclosure
2528 OpRISCV64CALLinter
2529 OpRISCV64DUFFZERO
2530 OpRISCV64DUFFCOPY
2531 OpRISCV64LoweredZero
2532 OpRISCV64LoweredMove
2533 OpRISCV64LoweredAtomicLoad8
2534 OpRISCV64LoweredAtomicLoad32
2535 OpRISCV64LoweredAtomicLoad64
2536 OpRISCV64LoweredAtomicStore8
2537 OpRISCV64LoweredAtomicStore32
2538 OpRISCV64LoweredAtomicStore64
2539 OpRISCV64LoweredAtomicExchange32
2540 OpRISCV64LoweredAtomicExchange64
2541 OpRISCV64LoweredAtomicAdd32
2542 OpRISCV64LoweredAtomicAdd64
2543 OpRISCV64LoweredAtomicCas32
2544 OpRISCV64LoweredAtomicCas64
2545 OpRISCV64LoweredAtomicAnd32
2546 OpRISCV64LoweredAtomicOr32
2547 OpRISCV64LoweredNilCheck
2548 OpRISCV64LoweredGetClosurePtr
2549 OpRISCV64LoweredGetCallerSP
2550 OpRISCV64LoweredGetCallerPC
2551 OpRISCV64LoweredWB
2552 OpRISCV64LoweredPubBarrier
2553 OpRISCV64LoweredPanicBoundsA
2554 OpRISCV64LoweredPanicBoundsB
2555 OpRISCV64LoweredPanicBoundsC
2556 OpRISCV64FADDS
2557 OpRISCV64FSUBS
2558 OpRISCV64FMULS
2559 OpRISCV64FDIVS
2560 OpRISCV64FMADDS
2561 OpRISCV64FMSUBS
2562 OpRISCV64FNMADDS
2563 OpRISCV64FNMSUBS
2564 OpRISCV64FSQRTS
2565 OpRISCV64FNEGS
2566 OpRISCV64FMVSX
2567 OpRISCV64FCVTSW
2568 OpRISCV64FCVTSL
2569 OpRISCV64FCVTWS
2570 OpRISCV64FCVTLS
2571 OpRISCV64FMOVWload
2572 OpRISCV64FMOVWstore
2573 OpRISCV64FEQS
2574 OpRISCV64FNES
2575 OpRISCV64FLTS
2576 OpRISCV64FLES
2577 OpRISCV64LoweredFMAXS
2578 OpRISCV64LoweredFMINS
2579 OpRISCV64FADDD
2580 OpRISCV64FSUBD
2581 OpRISCV64FMULD
2582 OpRISCV64FDIVD
2583 OpRISCV64FMADDD
2584 OpRISCV64FMSUBD
2585 OpRISCV64FNMADDD
2586 OpRISCV64FNMSUBD
2587 OpRISCV64FSQRTD
2588 OpRISCV64FNEGD
2589 OpRISCV64FABSD
2590 OpRISCV64FSGNJD
2591 OpRISCV64FMVDX
2592 OpRISCV64FCVTDW
2593 OpRISCV64FCVTDL
2594 OpRISCV64FCVTWD
2595 OpRISCV64FCVTLD
2596 OpRISCV64FCVTDS
2597 OpRISCV64FCVTSD
2598 OpRISCV64FMOVDload
2599 OpRISCV64FMOVDstore
2600 OpRISCV64FEQD
2601 OpRISCV64FNED
2602 OpRISCV64FLTD
2603 OpRISCV64FLED
2604 OpRISCV64LoweredFMIND
2605 OpRISCV64LoweredFMAXD
2606
2607 OpS390XFADDS
2608 OpS390XFADD
2609 OpS390XFSUBS
2610 OpS390XFSUB
2611 OpS390XFMULS
2612 OpS390XFMUL
2613 OpS390XFDIVS
2614 OpS390XFDIV
2615 OpS390XFNEGS
2616 OpS390XFNEG
2617 OpS390XFMADDS
2618 OpS390XFMADD
2619 OpS390XFMSUBS
2620 OpS390XFMSUB
2621 OpS390XLPDFR
2622 OpS390XLNDFR
2623 OpS390XCPSDR
2624 OpS390XFIDBR
2625 OpS390XFMOVSload
2626 OpS390XFMOVDload
2627 OpS390XFMOVSconst
2628 OpS390XFMOVDconst
2629 OpS390XFMOVSloadidx
2630 OpS390XFMOVDloadidx
2631 OpS390XFMOVSstore
2632 OpS390XFMOVDstore
2633 OpS390XFMOVSstoreidx
2634 OpS390XFMOVDstoreidx
2635 OpS390XADD
2636 OpS390XADDW
2637 OpS390XADDconst
2638 OpS390XADDWconst
2639 OpS390XADDload
2640 OpS390XADDWload
2641 OpS390XSUB
2642 OpS390XSUBW
2643 OpS390XSUBconst
2644 OpS390XSUBWconst
2645 OpS390XSUBload
2646 OpS390XSUBWload
2647 OpS390XMULLD
2648 OpS390XMULLW
2649 OpS390XMULLDconst
2650 OpS390XMULLWconst
2651 OpS390XMULLDload
2652 OpS390XMULLWload
2653 OpS390XMULHD
2654 OpS390XMULHDU
2655 OpS390XDIVD
2656 OpS390XDIVW
2657 OpS390XDIVDU
2658 OpS390XDIVWU
2659 OpS390XMODD
2660 OpS390XMODW
2661 OpS390XMODDU
2662 OpS390XMODWU
2663 OpS390XAND
2664 OpS390XANDW
2665 OpS390XANDconst
2666 OpS390XANDWconst
2667 OpS390XANDload
2668 OpS390XANDWload
2669 OpS390XOR
2670 OpS390XORW
2671 OpS390XORconst
2672 OpS390XORWconst
2673 OpS390XORload
2674 OpS390XORWload
2675 OpS390XXOR
2676 OpS390XXORW
2677 OpS390XXORconst
2678 OpS390XXORWconst
2679 OpS390XXORload
2680 OpS390XXORWload
2681 OpS390XADDC
2682 OpS390XADDCconst
2683 OpS390XADDE
2684 OpS390XSUBC
2685 OpS390XSUBE
2686 OpS390XCMP
2687 OpS390XCMPW
2688 OpS390XCMPU
2689 OpS390XCMPWU
2690 OpS390XCMPconst
2691 OpS390XCMPWconst
2692 OpS390XCMPUconst
2693 OpS390XCMPWUconst
2694 OpS390XFCMPS
2695 OpS390XFCMP
2696 OpS390XLTDBR
2697 OpS390XLTEBR
2698 OpS390XSLD
2699 OpS390XSLW
2700 OpS390XSLDconst
2701 OpS390XSLWconst
2702 OpS390XSRD
2703 OpS390XSRW
2704 OpS390XSRDconst
2705 OpS390XSRWconst
2706 OpS390XSRAD
2707 OpS390XSRAW
2708 OpS390XSRADconst
2709 OpS390XSRAWconst
2710 OpS390XRLLG
2711 OpS390XRLL
2712 OpS390XRLLconst
2713 OpS390XRXSBG
2714 OpS390XRISBGZ
2715 OpS390XNEG
2716 OpS390XNEGW
2717 OpS390XNOT
2718 OpS390XNOTW
2719 OpS390XFSQRT
2720 OpS390XFSQRTS
2721 OpS390XLOCGR
2722 OpS390XMOVBreg
2723 OpS390XMOVBZreg
2724 OpS390XMOVHreg
2725 OpS390XMOVHZreg
2726 OpS390XMOVWreg
2727 OpS390XMOVWZreg
2728 OpS390XMOVDconst
2729 OpS390XLDGR
2730 OpS390XLGDR
2731 OpS390XCFDBRA
2732 OpS390XCGDBRA
2733 OpS390XCFEBRA
2734 OpS390XCGEBRA
2735 OpS390XCEFBRA
2736 OpS390XCDFBRA
2737 OpS390XCEGBRA
2738 OpS390XCDGBRA
2739 OpS390XCLFEBR
2740 OpS390XCLFDBR
2741 OpS390XCLGEBR
2742 OpS390XCLGDBR
2743 OpS390XCELFBR
2744 OpS390XCDLFBR
2745 OpS390XCELGBR
2746 OpS390XCDLGBR
2747 OpS390XLEDBR
2748 OpS390XLDEBR
2749 OpS390XMOVDaddr
2750 OpS390XMOVDaddridx
2751 OpS390XMOVBZload
2752 OpS390XMOVBload
2753 OpS390XMOVHZload
2754 OpS390XMOVHload
2755 OpS390XMOVWZload
2756 OpS390XMOVWload
2757 OpS390XMOVDload
2758 OpS390XMOVWBR
2759 OpS390XMOVDBR
2760 OpS390XMOVHBRload
2761 OpS390XMOVWBRload
2762 OpS390XMOVDBRload
2763 OpS390XMOVBstore
2764 OpS390XMOVHstore
2765 OpS390XMOVWstore
2766 OpS390XMOVDstore
2767 OpS390XMOVHBRstore
2768 OpS390XMOVWBRstore
2769 OpS390XMOVDBRstore
2770 OpS390XMVC
2771 OpS390XMOVBZloadidx
2772 OpS390XMOVBloadidx
2773 OpS390XMOVHZloadidx
2774 OpS390XMOVHloadidx
2775 OpS390XMOVWZloadidx
2776 OpS390XMOVWloadidx
2777 OpS390XMOVDloadidx
2778 OpS390XMOVHBRloadidx
2779 OpS390XMOVWBRloadidx
2780 OpS390XMOVDBRloadidx
2781 OpS390XMOVBstoreidx
2782 OpS390XMOVHstoreidx
2783 OpS390XMOVWstoreidx
2784 OpS390XMOVDstoreidx
2785 OpS390XMOVHBRstoreidx
2786 OpS390XMOVWBRstoreidx
2787 OpS390XMOVDBRstoreidx
2788 OpS390XMOVBstoreconst
2789 OpS390XMOVHstoreconst
2790 OpS390XMOVWstoreconst
2791 OpS390XMOVDstoreconst
2792 OpS390XCLEAR
2793 OpS390XCALLstatic
2794 OpS390XCALLtail
2795 OpS390XCALLclosure
2796 OpS390XCALLinter
2797 OpS390XInvertFlags
2798 OpS390XLoweredGetG
2799 OpS390XLoweredGetClosurePtr
2800 OpS390XLoweredGetCallerSP
2801 OpS390XLoweredGetCallerPC
2802 OpS390XLoweredNilCheck
2803 OpS390XLoweredRound32F
2804 OpS390XLoweredRound64F
2805 OpS390XLoweredWB
2806 OpS390XLoweredPanicBoundsA
2807 OpS390XLoweredPanicBoundsB
2808 OpS390XLoweredPanicBoundsC
2809 OpS390XFlagEQ
2810 OpS390XFlagLT
2811 OpS390XFlagGT
2812 OpS390XFlagOV
2813 OpS390XSYNC
2814 OpS390XMOVBZatomicload
2815 OpS390XMOVWZatomicload
2816 OpS390XMOVDatomicload
2817 OpS390XMOVBatomicstore
2818 OpS390XMOVWatomicstore
2819 OpS390XMOVDatomicstore
2820 OpS390XLAA
2821 OpS390XLAAG
2822 OpS390XAddTupleFirst32
2823 OpS390XAddTupleFirst64
2824 OpS390XLAN
2825 OpS390XLANfloor
2826 OpS390XLAO
2827 OpS390XLAOfloor
2828 OpS390XLoweredAtomicCas32
2829 OpS390XLoweredAtomicCas64
2830 OpS390XLoweredAtomicExchange32
2831 OpS390XLoweredAtomicExchange64
2832 OpS390XFLOGR
2833 OpS390XPOPCNT
2834 OpS390XMLGR
2835 OpS390XSumBytes2
2836 OpS390XSumBytes4
2837 OpS390XSumBytes8
2838 OpS390XSTMG2
2839 OpS390XSTMG3
2840 OpS390XSTMG4
2841 OpS390XSTM2
2842 OpS390XSTM3
2843 OpS390XSTM4
2844 OpS390XLoweredMove
2845 OpS390XLoweredZero
2846
2847 OpWasmLoweredStaticCall
2848 OpWasmLoweredTailCall
2849 OpWasmLoweredClosureCall
2850 OpWasmLoweredInterCall
2851 OpWasmLoweredAddr
2852 OpWasmLoweredMove
2853 OpWasmLoweredZero
2854 OpWasmLoweredGetClosurePtr
2855 OpWasmLoweredGetCallerPC
2856 OpWasmLoweredGetCallerSP
2857 OpWasmLoweredNilCheck
2858 OpWasmLoweredWB
2859 OpWasmLoweredConvert
2860 OpWasmSelect
2861 OpWasmI64Load8U
2862 OpWasmI64Load8S
2863 OpWasmI64Load16U
2864 OpWasmI64Load16S
2865 OpWasmI64Load32U
2866 OpWasmI64Load32S
2867 OpWasmI64Load
2868 OpWasmI64Store8
2869 OpWasmI64Store16
2870 OpWasmI64Store32
2871 OpWasmI64Store
2872 OpWasmF32Load
2873 OpWasmF64Load
2874 OpWasmF32Store
2875 OpWasmF64Store
2876 OpWasmI64Const
2877 OpWasmF32Const
2878 OpWasmF64Const
2879 OpWasmI64Eqz
2880 OpWasmI64Eq
2881 OpWasmI64Ne
2882 OpWasmI64LtS
2883 OpWasmI64LtU
2884 OpWasmI64GtS
2885 OpWasmI64GtU
2886 OpWasmI64LeS
2887 OpWasmI64LeU
2888 OpWasmI64GeS
2889 OpWasmI64GeU
2890 OpWasmF32Eq
2891 OpWasmF32Ne
2892 OpWasmF32Lt
2893 OpWasmF32Gt
2894 OpWasmF32Le
2895 OpWasmF32Ge
2896 OpWasmF64Eq
2897 OpWasmF64Ne
2898 OpWasmF64Lt
2899 OpWasmF64Gt
2900 OpWasmF64Le
2901 OpWasmF64Ge
2902 OpWasmI64Add
2903 OpWasmI64AddConst
2904 OpWasmI64Sub
2905 OpWasmI64Mul
2906 OpWasmI64DivS
2907 OpWasmI64DivU
2908 OpWasmI64RemS
2909 OpWasmI64RemU
2910 OpWasmI64And
2911 OpWasmI64Or
2912 OpWasmI64Xor
2913 OpWasmI64Shl
2914 OpWasmI64ShrS
2915 OpWasmI64ShrU
2916 OpWasmF32Neg
2917 OpWasmF32Add
2918 OpWasmF32Sub
2919 OpWasmF32Mul
2920 OpWasmF32Div
2921 OpWasmF64Neg
2922 OpWasmF64Add
2923 OpWasmF64Sub
2924 OpWasmF64Mul
2925 OpWasmF64Div
2926 OpWasmI64TruncSatF64S
2927 OpWasmI64TruncSatF64U
2928 OpWasmI64TruncSatF32S
2929 OpWasmI64TruncSatF32U
2930 OpWasmF32ConvertI64S
2931 OpWasmF32ConvertI64U
2932 OpWasmF64ConvertI64S
2933 OpWasmF64ConvertI64U
2934 OpWasmF32DemoteF64
2935 OpWasmF64PromoteF32
2936 OpWasmI64Extend8S
2937 OpWasmI64Extend16S
2938 OpWasmI64Extend32S
2939 OpWasmF32Sqrt
2940 OpWasmF32Trunc
2941 OpWasmF32Ceil
2942 OpWasmF32Floor
2943 OpWasmF32Nearest
2944 OpWasmF32Abs
2945 OpWasmF32Copysign
2946 OpWasmF64Sqrt
2947 OpWasmF64Trunc
2948 OpWasmF64Ceil
2949 OpWasmF64Floor
2950 OpWasmF64Nearest
2951 OpWasmF64Abs
2952 OpWasmF64Copysign
2953 OpWasmI64Ctz
2954 OpWasmI64Clz
2955 OpWasmI32Rotl
2956 OpWasmI64Rotl
2957 OpWasmI64Popcnt
2958
2959 OpAdd8
2960 OpAdd16
2961 OpAdd32
2962 OpAdd64
2963 OpAddPtr
2964 OpAdd32F
2965 OpAdd64F
2966 OpSub8
2967 OpSub16
2968 OpSub32
2969 OpSub64
2970 OpSubPtr
2971 OpSub32F
2972 OpSub64F
2973 OpMul8
2974 OpMul16
2975 OpMul32
2976 OpMul64
2977 OpMul32F
2978 OpMul64F
2979 OpDiv32F
2980 OpDiv64F
2981 OpHmul32
2982 OpHmul32u
2983 OpHmul64
2984 OpHmul64u
2985 OpMul32uhilo
2986 OpMul64uhilo
2987 OpMul32uover
2988 OpMul64uover
2989 OpAvg32u
2990 OpAvg64u
2991 OpDiv8
2992 OpDiv8u
2993 OpDiv16
2994 OpDiv16u
2995 OpDiv32
2996 OpDiv32u
2997 OpDiv64
2998 OpDiv64u
2999 OpDiv128u
3000 OpMod8
3001 OpMod8u
3002 OpMod16
3003 OpMod16u
3004 OpMod32
3005 OpMod32u
3006 OpMod64
3007 OpMod64u
3008 OpAnd8
3009 OpAnd16
3010 OpAnd32
3011 OpAnd64
3012 OpOr8
3013 OpOr16
3014 OpOr32
3015 OpOr64
3016 OpXor8
3017 OpXor16
3018 OpXor32
3019 OpXor64
3020 OpLsh8x8
3021 OpLsh8x16
3022 OpLsh8x32
3023 OpLsh8x64
3024 OpLsh16x8
3025 OpLsh16x16
3026 OpLsh16x32
3027 OpLsh16x64
3028 OpLsh32x8
3029 OpLsh32x16
3030 OpLsh32x32
3031 OpLsh32x64
3032 OpLsh64x8
3033 OpLsh64x16
3034 OpLsh64x32
3035 OpLsh64x64
3036 OpRsh8x8
3037 OpRsh8x16
3038 OpRsh8x32
3039 OpRsh8x64
3040 OpRsh16x8
3041 OpRsh16x16
3042 OpRsh16x32
3043 OpRsh16x64
3044 OpRsh32x8
3045 OpRsh32x16
3046 OpRsh32x32
3047 OpRsh32x64
3048 OpRsh64x8
3049 OpRsh64x16
3050 OpRsh64x32
3051 OpRsh64x64
3052 OpRsh8Ux8
3053 OpRsh8Ux16
3054 OpRsh8Ux32
3055 OpRsh8Ux64
3056 OpRsh16Ux8
3057 OpRsh16Ux16
3058 OpRsh16Ux32
3059 OpRsh16Ux64
3060 OpRsh32Ux8
3061 OpRsh32Ux16
3062 OpRsh32Ux32
3063 OpRsh32Ux64
3064 OpRsh64Ux8
3065 OpRsh64Ux16
3066 OpRsh64Ux32
3067 OpRsh64Ux64
3068 OpEq8
3069 OpEq16
3070 OpEq32
3071 OpEq64
3072 OpEqPtr
3073 OpEqInter
3074 OpEqSlice
3075 OpEq32F
3076 OpEq64F
3077 OpNeq8
3078 OpNeq16
3079 OpNeq32
3080 OpNeq64
3081 OpNeqPtr
3082 OpNeqInter
3083 OpNeqSlice
3084 OpNeq32F
3085 OpNeq64F
3086 OpLess8
3087 OpLess8U
3088 OpLess16
3089 OpLess16U
3090 OpLess32
3091 OpLess32U
3092 OpLess64
3093 OpLess64U
3094 OpLess32F
3095 OpLess64F
3096 OpLeq8
3097 OpLeq8U
3098 OpLeq16
3099 OpLeq16U
3100 OpLeq32
3101 OpLeq32U
3102 OpLeq64
3103 OpLeq64U
3104 OpLeq32F
3105 OpLeq64F
3106 OpCondSelect
3107 OpAndB
3108 OpOrB
3109 OpEqB
3110 OpNeqB
3111 OpNot
3112 OpNeg8
3113 OpNeg16
3114 OpNeg32
3115 OpNeg64
3116 OpNeg32F
3117 OpNeg64F
3118 OpCom8
3119 OpCom16
3120 OpCom32
3121 OpCom64
3122 OpCtz8
3123 OpCtz16
3124 OpCtz32
3125 OpCtz64
3126 OpCtz64On32
3127 OpCtz8NonZero
3128 OpCtz16NonZero
3129 OpCtz32NonZero
3130 OpCtz64NonZero
3131 OpBitLen8
3132 OpBitLen16
3133 OpBitLen32
3134 OpBitLen64
3135 OpBswap16
3136 OpBswap32
3137 OpBswap64
3138 OpBitRev8
3139 OpBitRev16
3140 OpBitRev32
3141 OpBitRev64
3142 OpPopCount8
3143 OpPopCount16
3144 OpPopCount32
3145 OpPopCount64
3146 OpRotateLeft64
3147 OpRotateLeft32
3148 OpRotateLeft16
3149 OpRotateLeft8
3150 OpSqrt
3151 OpSqrt32
3152 OpFloor
3153 OpCeil
3154 OpTrunc
3155 OpRound
3156 OpRoundToEven
3157 OpAbs
3158 OpCopysign
3159 OpMin64
3160 OpMax64
3161 OpMin64u
3162 OpMax64u
3163 OpMin64F
3164 OpMin32F
3165 OpMax64F
3166 OpMax32F
3167 OpFMA
3168 OpPhi
3169 OpCopy
3170 OpConvert
3171 OpConstBool
3172 OpConstString
3173 OpConstNil
3174 OpConst8
3175 OpConst16
3176 OpConst32
3177 OpConst64
3178 OpConst32F
3179 OpConst64F
3180 OpConstInterface
3181 OpConstSlice
3182 OpInitMem
3183 OpArg
3184 OpArgIntReg
3185 OpArgFloatReg
3186 OpAddr
3187 OpLocalAddr
3188 OpSP
3189 OpSB
3190 OpSPanchored
3191 OpLoad
3192 OpDereference
3193 OpStore
3194 OpMove
3195 OpZero
3196 OpStoreWB
3197 OpMoveWB
3198 OpZeroWB
3199 OpWBend
3200 OpWB
3201 OpHasCPUFeature
3202 OpPanicBounds
3203 OpPanicExtend
3204 OpClosureCall
3205 OpStaticCall
3206 OpInterCall
3207 OpTailCall
3208 OpClosureLECall
3209 OpStaticLECall
3210 OpInterLECall
3211 OpTailLECall
3212 OpSignExt8to16
3213 OpSignExt8to32
3214 OpSignExt8to64
3215 OpSignExt16to32
3216 OpSignExt16to64
3217 OpSignExt32to64
3218 OpZeroExt8to16
3219 OpZeroExt8to32
3220 OpZeroExt8to64
3221 OpZeroExt16to32
3222 OpZeroExt16to64
3223 OpZeroExt32to64
3224 OpTrunc16to8
3225 OpTrunc32to8
3226 OpTrunc32to16
3227 OpTrunc64to8
3228 OpTrunc64to16
3229 OpTrunc64to32
3230 OpCvt32to32F
3231 OpCvt32to64F
3232 OpCvt64to32F
3233 OpCvt64to64F
3234 OpCvt32Fto32
3235 OpCvt32Fto64
3236 OpCvt64Fto32
3237 OpCvt64Fto64
3238 OpCvt32Fto64F
3239 OpCvt64Fto32F
3240 OpCvtBoolToUint8
3241 OpRound32F
3242 OpRound64F
3243 OpIsNonNil
3244 OpIsInBounds
3245 OpIsSliceInBounds
3246 OpNilCheck
3247 OpGetG
3248 OpGetClosurePtr
3249 OpGetCallerPC
3250 OpGetCallerSP
3251 OpPtrIndex
3252 OpOffPtr
3253 OpSliceMake
3254 OpSlicePtr
3255 OpSliceLen
3256 OpSliceCap
3257 OpSlicePtrUnchecked
3258 OpComplexMake
3259 OpComplexReal
3260 OpComplexImag
3261 OpStringMake
3262 OpStringPtr
3263 OpStringLen
3264 OpIMake
3265 OpITab
3266 OpIData
3267 OpStructMake
3268 OpStructSelect
3269 OpArrayMake0
3270 OpArrayMake1
3271 OpArraySelect
3272 OpStoreReg
3273 OpLoadReg
3274 OpFwdRef
3275 OpUnknown
3276 OpVarDef
3277 OpVarLive
3278 OpKeepAlive
3279 OpInlMark
3280 OpInt64Make
3281 OpInt64Hi
3282 OpInt64Lo
3283 OpAdd32carry
3284 OpAdd32withcarry
3285 OpSub32carry
3286 OpSub32withcarry
3287 OpAdd64carry
3288 OpSub64borrow
3289 OpSignmask
3290 OpZeromask
3291 OpSlicemask
3292 OpSpectreIndex
3293 OpSpectreSliceIndex
3294 OpCvt32Uto32F
3295 OpCvt32Uto64F
3296 OpCvt32Fto32U
3297 OpCvt64Fto32U
3298 OpCvt64Uto32F
3299 OpCvt64Uto64F
3300 OpCvt32Fto64U
3301 OpCvt64Fto64U
3302 OpSelect0
3303 OpSelect1
3304 OpSelectN
3305 OpSelectNAddr
3306 OpMakeResult
3307 OpAtomicLoad8
3308 OpAtomicLoad32
3309 OpAtomicLoad64
3310 OpAtomicLoadPtr
3311 OpAtomicLoadAcq32
3312 OpAtomicLoadAcq64
3313 OpAtomicStore8
3314 OpAtomicStore32
3315 OpAtomicStore64
3316 OpAtomicStorePtrNoWB
3317 OpAtomicStoreRel32
3318 OpAtomicStoreRel64
3319 OpAtomicExchange8
3320 OpAtomicExchange32
3321 OpAtomicExchange64
3322 OpAtomicAdd32
3323 OpAtomicAdd64
3324 OpAtomicCompareAndSwap32
3325 OpAtomicCompareAndSwap64
3326 OpAtomicCompareAndSwapRel32
3327 OpAtomicAnd8
3328 OpAtomicOr8
3329 OpAtomicAnd32
3330 OpAtomicOr32
3331 OpAtomicAnd64value
3332 OpAtomicAnd32value
3333 OpAtomicAnd8value
3334 OpAtomicOr64value
3335 OpAtomicOr32value
3336 OpAtomicOr8value
3337 OpAtomicStore8Variant
3338 OpAtomicStore32Variant
3339 OpAtomicStore64Variant
3340 OpAtomicAdd32Variant
3341 OpAtomicAdd64Variant
3342 OpAtomicExchange8Variant
3343 OpAtomicExchange32Variant
3344 OpAtomicExchange64Variant
3345 OpAtomicCompareAndSwap32Variant
3346 OpAtomicCompareAndSwap64Variant
3347 OpAtomicAnd64valueVariant
3348 OpAtomicOr64valueVariant
3349 OpAtomicAnd32valueVariant
3350 OpAtomicOr32valueVariant
3351 OpAtomicAnd8valueVariant
3352 OpAtomicOr8valueVariant
3353 OpPubBarrier
3354 OpClobber
3355 OpClobberReg
3356 OpPrefetchCache
3357 OpPrefetchCacheStreamed
3358 )
3359
3360 var opcodeTable = [...]opInfo{
3361 {name: "OpInvalid"},
3362
3363 {
3364 name: "ADDSS",
3365 argLen: 2,
3366 commutative: true,
3367 resultInArg0: true,
3368 asm: x86.AADDSS,
3369 reg: regInfo{
3370 inputs: []inputInfo{
3371 {0, 65280},
3372 {1, 65280},
3373 },
3374 outputs: []outputInfo{
3375 {0, 65280},
3376 },
3377 },
3378 },
3379 {
3380 name: "ADDSD",
3381 argLen: 2,
3382 commutative: true,
3383 resultInArg0: true,
3384 asm: x86.AADDSD,
3385 reg: regInfo{
3386 inputs: []inputInfo{
3387 {0, 65280},
3388 {1, 65280},
3389 },
3390 outputs: []outputInfo{
3391 {0, 65280},
3392 },
3393 },
3394 },
3395 {
3396 name: "SUBSS",
3397 argLen: 2,
3398 resultInArg0: true,
3399 asm: x86.ASUBSS,
3400 reg: regInfo{
3401 inputs: []inputInfo{
3402 {0, 65280},
3403 {1, 65280},
3404 },
3405 outputs: []outputInfo{
3406 {0, 65280},
3407 },
3408 },
3409 },
3410 {
3411 name: "SUBSD",
3412 argLen: 2,
3413 resultInArg0: true,
3414 asm: x86.ASUBSD,
3415 reg: regInfo{
3416 inputs: []inputInfo{
3417 {0, 65280},
3418 {1, 65280},
3419 },
3420 outputs: []outputInfo{
3421 {0, 65280},
3422 },
3423 },
3424 },
3425 {
3426 name: "MULSS",
3427 argLen: 2,
3428 commutative: true,
3429 resultInArg0: true,
3430 asm: x86.AMULSS,
3431 reg: regInfo{
3432 inputs: []inputInfo{
3433 {0, 65280},
3434 {1, 65280},
3435 },
3436 outputs: []outputInfo{
3437 {0, 65280},
3438 },
3439 },
3440 },
3441 {
3442 name: "MULSD",
3443 argLen: 2,
3444 commutative: true,
3445 resultInArg0: true,
3446 asm: x86.AMULSD,
3447 reg: regInfo{
3448 inputs: []inputInfo{
3449 {0, 65280},
3450 {1, 65280},
3451 },
3452 outputs: []outputInfo{
3453 {0, 65280},
3454 },
3455 },
3456 },
3457 {
3458 name: "DIVSS",
3459 argLen: 2,
3460 resultInArg0: true,
3461 asm: x86.ADIVSS,
3462 reg: regInfo{
3463 inputs: []inputInfo{
3464 {0, 65280},
3465 {1, 65280},
3466 },
3467 outputs: []outputInfo{
3468 {0, 65280},
3469 },
3470 },
3471 },
3472 {
3473 name: "DIVSD",
3474 argLen: 2,
3475 resultInArg0: true,
3476 asm: x86.ADIVSD,
3477 reg: regInfo{
3478 inputs: []inputInfo{
3479 {0, 65280},
3480 {1, 65280},
3481 },
3482 outputs: []outputInfo{
3483 {0, 65280},
3484 },
3485 },
3486 },
3487 {
3488 name: "MOVSSload",
3489 auxType: auxSymOff,
3490 argLen: 2,
3491 faultOnNilArg0: true,
3492 symEffect: SymRead,
3493 asm: x86.AMOVSS,
3494 reg: regInfo{
3495 inputs: []inputInfo{
3496 {0, 65791},
3497 },
3498 outputs: []outputInfo{
3499 {0, 65280},
3500 },
3501 },
3502 },
3503 {
3504 name: "MOVSDload",
3505 auxType: auxSymOff,
3506 argLen: 2,
3507 faultOnNilArg0: true,
3508 symEffect: SymRead,
3509 asm: x86.AMOVSD,
3510 reg: regInfo{
3511 inputs: []inputInfo{
3512 {0, 65791},
3513 },
3514 outputs: []outputInfo{
3515 {0, 65280},
3516 },
3517 },
3518 },
3519 {
3520 name: "MOVSSconst",
3521 auxType: auxFloat32,
3522 argLen: 0,
3523 rematerializeable: true,
3524 asm: x86.AMOVSS,
3525 reg: regInfo{
3526 outputs: []outputInfo{
3527 {0, 65280},
3528 },
3529 },
3530 },
3531 {
3532 name: "MOVSDconst",
3533 auxType: auxFloat64,
3534 argLen: 0,
3535 rematerializeable: true,
3536 asm: x86.AMOVSD,
3537 reg: regInfo{
3538 outputs: []outputInfo{
3539 {0, 65280},
3540 },
3541 },
3542 },
3543 {
3544 name: "MOVSSloadidx1",
3545 auxType: auxSymOff,
3546 argLen: 3,
3547 symEffect: SymRead,
3548 asm: x86.AMOVSS,
3549 reg: regInfo{
3550 inputs: []inputInfo{
3551 {1, 255},
3552 {0, 65791},
3553 },
3554 outputs: []outputInfo{
3555 {0, 65280},
3556 },
3557 },
3558 },
3559 {
3560 name: "MOVSSloadidx4",
3561 auxType: auxSymOff,
3562 argLen: 3,
3563 symEffect: SymRead,
3564 asm: x86.AMOVSS,
3565 reg: regInfo{
3566 inputs: []inputInfo{
3567 {1, 255},
3568 {0, 65791},
3569 },
3570 outputs: []outputInfo{
3571 {0, 65280},
3572 },
3573 },
3574 },
3575 {
3576 name: "MOVSDloadidx1",
3577 auxType: auxSymOff,
3578 argLen: 3,
3579 symEffect: SymRead,
3580 asm: x86.AMOVSD,
3581 reg: regInfo{
3582 inputs: []inputInfo{
3583 {1, 255},
3584 {0, 65791},
3585 },
3586 outputs: []outputInfo{
3587 {0, 65280},
3588 },
3589 },
3590 },
3591 {
3592 name: "MOVSDloadidx8",
3593 auxType: auxSymOff,
3594 argLen: 3,
3595 symEffect: SymRead,
3596 asm: x86.AMOVSD,
3597 reg: regInfo{
3598 inputs: []inputInfo{
3599 {1, 255},
3600 {0, 65791},
3601 },
3602 outputs: []outputInfo{
3603 {0, 65280},
3604 },
3605 },
3606 },
3607 {
3608 name: "MOVSSstore",
3609 auxType: auxSymOff,
3610 argLen: 3,
3611 faultOnNilArg0: true,
3612 symEffect: SymWrite,
3613 asm: x86.AMOVSS,
3614 reg: regInfo{
3615 inputs: []inputInfo{
3616 {1, 65280},
3617 {0, 65791},
3618 },
3619 },
3620 },
3621 {
3622 name: "MOVSDstore",
3623 auxType: auxSymOff,
3624 argLen: 3,
3625 faultOnNilArg0: true,
3626 symEffect: SymWrite,
3627 asm: x86.AMOVSD,
3628 reg: regInfo{
3629 inputs: []inputInfo{
3630 {1, 65280},
3631 {0, 65791},
3632 },
3633 },
3634 },
3635 {
3636 name: "MOVSSstoreidx1",
3637 auxType: auxSymOff,
3638 argLen: 4,
3639 symEffect: SymWrite,
3640 asm: x86.AMOVSS,
3641 reg: regInfo{
3642 inputs: []inputInfo{
3643 {1, 255},
3644 {2, 65280},
3645 {0, 65791},
3646 },
3647 },
3648 },
3649 {
3650 name: "MOVSSstoreidx4",
3651 auxType: auxSymOff,
3652 argLen: 4,
3653 symEffect: SymWrite,
3654 asm: x86.AMOVSS,
3655 reg: regInfo{
3656 inputs: []inputInfo{
3657 {1, 255},
3658 {2, 65280},
3659 {0, 65791},
3660 },
3661 },
3662 },
3663 {
3664 name: "MOVSDstoreidx1",
3665 auxType: auxSymOff,
3666 argLen: 4,
3667 symEffect: SymWrite,
3668 asm: x86.AMOVSD,
3669 reg: regInfo{
3670 inputs: []inputInfo{
3671 {1, 255},
3672 {2, 65280},
3673 {0, 65791},
3674 },
3675 },
3676 },
3677 {
3678 name: "MOVSDstoreidx8",
3679 auxType: auxSymOff,
3680 argLen: 4,
3681 symEffect: SymWrite,
3682 asm: x86.AMOVSD,
3683 reg: regInfo{
3684 inputs: []inputInfo{
3685 {1, 255},
3686 {2, 65280},
3687 {0, 65791},
3688 },
3689 },
3690 },
3691 {
3692 name: "ADDSSload",
3693 auxType: auxSymOff,
3694 argLen: 3,
3695 resultInArg0: true,
3696 faultOnNilArg1: true,
3697 symEffect: SymRead,
3698 asm: x86.AADDSS,
3699 reg: regInfo{
3700 inputs: []inputInfo{
3701 {0, 65280},
3702 {1, 65791},
3703 },
3704 outputs: []outputInfo{
3705 {0, 65280},
3706 },
3707 },
3708 },
3709 {
3710 name: "ADDSDload",
3711 auxType: auxSymOff,
3712 argLen: 3,
3713 resultInArg0: true,
3714 faultOnNilArg1: true,
3715 symEffect: SymRead,
3716 asm: x86.AADDSD,
3717 reg: regInfo{
3718 inputs: []inputInfo{
3719 {0, 65280},
3720 {1, 65791},
3721 },
3722 outputs: []outputInfo{
3723 {0, 65280},
3724 },
3725 },
3726 },
3727 {
3728 name: "SUBSSload",
3729 auxType: auxSymOff,
3730 argLen: 3,
3731 resultInArg0: true,
3732 faultOnNilArg1: true,
3733 symEffect: SymRead,
3734 asm: x86.ASUBSS,
3735 reg: regInfo{
3736 inputs: []inputInfo{
3737 {0, 65280},
3738 {1, 65791},
3739 },
3740 outputs: []outputInfo{
3741 {0, 65280},
3742 },
3743 },
3744 },
3745 {
3746 name: "SUBSDload",
3747 auxType: auxSymOff,
3748 argLen: 3,
3749 resultInArg0: true,
3750 faultOnNilArg1: true,
3751 symEffect: SymRead,
3752 asm: x86.ASUBSD,
3753 reg: regInfo{
3754 inputs: []inputInfo{
3755 {0, 65280},
3756 {1, 65791},
3757 },
3758 outputs: []outputInfo{
3759 {0, 65280},
3760 },
3761 },
3762 },
3763 {
3764 name: "MULSSload",
3765 auxType: auxSymOff,
3766 argLen: 3,
3767 resultInArg0: true,
3768 faultOnNilArg1: true,
3769 symEffect: SymRead,
3770 asm: x86.AMULSS,
3771 reg: regInfo{
3772 inputs: []inputInfo{
3773 {0, 65280},
3774 {1, 65791},
3775 },
3776 outputs: []outputInfo{
3777 {0, 65280},
3778 },
3779 },
3780 },
3781 {
3782 name: "MULSDload",
3783 auxType: auxSymOff,
3784 argLen: 3,
3785 resultInArg0: true,
3786 faultOnNilArg1: true,
3787 symEffect: SymRead,
3788 asm: x86.AMULSD,
3789 reg: regInfo{
3790 inputs: []inputInfo{
3791 {0, 65280},
3792 {1, 65791},
3793 },
3794 outputs: []outputInfo{
3795 {0, 65280},
3796 },
3797 },
3798 },
3799 {
3800 name: "DIVSSload",
3801 auxType: auxSymOff,
3802 argLen: 3,
3803 resultInArg0: true,
3804 faultOnNilArg1: true,
3805 symEffect: SymRead,
3806 asm: x86.ADIVSS,
3807 reg: regInfo{
3808 inputs: []inputInfo{
3809 {0, 65280},
3810 {1, 65791},
3811 },
3812 outputs: []outputInfo{
3813 {0, 65280},
3814 },
3815 },
3816 },
3817 {
3818 name: "DIVSDload",
3819 auxType: auxSymOff,
3820 argLen: 3,
3821 resultInArg0: true,
3822 faultOnNilArg1: true,
3823 symEffect: SymRead,
3824 asm: x86.ADIVSD,
3825 reg: regInfo{
3826 inputs: []inputInfo{
3827 {0, 65280},
3828 {1, 65791},
3829 },
3830 outputs: []outputInfo{
3831 {0, 65280},
3832 },
3833 },
3834 },
3835 {
3836 name: "ADDL",
3837 argLen: 2,
3838 commutative: true,
3839 clobberFlags: true,
3840 asm: x86.AADDL,
3841 reg: regInfo{
3842 inputs: []inputInfo{
3843 {1, 239},
3844 {0, 255},
3845 },
3846 outputs: []outputInfo{
3847 {0, 239},
3848 },
3849 },
3850 },
3851 {
3852 name: "ADDLconst",
3853 auxType: auxInt32,
3854 argLen: 1,
3855 clobberFlags: true,
3856 asm: x86.AADDL,
3857 reg: regInfo{
3858 inputs: []inputInfo{
3859 {0, 255},
3860 },
3861 outputs: []outputInfo{
3862 {0, 239},
3863 },
3864 },
3865 },
3866 {
3867 name: "ADDLcarry",
3868 argLen: 2,
3869 commutative: true,
3870 resultInArg0: true,
3871 asm: x86.AADDL,
3872 reg: regInfo{
3873 inputs: []inputInfo{
3874 {0, 239},
3875 {1, 239},
3876 },
3877 outputs: []outputInfo{
3878 {1, 0},
3879 {0, 239},
3880 },
3881 },
3882 },
3883 {
3884 name: "ADDLconstcarry",
3885 auxType: auxInt32,
3886 argLen: 1,
3887 resultInArg0: true,
3888 asm: x86.AADDL,
3889 reg: regInfo{
3890 inputs: []inputInfo{
3891 {0, 239},
3892 },
3893 outputs: []outputInfo{
3894 {1, 0},
3895 {0, 239},
3896 },
3897 },
3898 },
3899 {
3900 name: "ADCL",
3901 argLen: 3,
3902 commutative: true,
3903 resultInArg0: true,
3904 clobberFlags: true,
3905 asm: x86.AADCL,
3906 reg: regInfo{
3907 inputs: []inputInfo{
3908 {0, 239},
3909 {1, 239},
3910 },
3911 outputs: []outputInfo{
3912 {0, 239},
3913 },
3914 },
3915 },
3916 {
3917 name: "ADCLconst",
3918 auxType: auxInt32,
3919 argLen: 2,
3920 resultInArg0: true,
3921 clobberFlags: true,
3922 asm: x86.AADCL,
3923 reg: regInfo{
3924 inputs: []inputInfo{
3925 {0, 239},
3926 },
3927 outputs: []outputInfo{
3928 {0, 239},
3929 },
3930 },
3931 },
3932 {
3933 name: "SUBL",
3934 argLen: 2,
3935 resultInArg0: true,
3936 clobberFlags: true,
3937 asm: x86.ASUBL,
3938 reg: regInfo{
3939 inputs: []inputInfo{
3940 {0, 239},
3941 {1, 239},
3942 },
3943 outputs: []outputInfo{
3944 {0, 239},
3945 },
3946 },
3947 },
3948 {
3949 name: "SUBLconst",
3950 auxType: auxInt32,
3951 argLen: 1,
3952 resultInArg0: true,
3953 clobberFlags: true,
3954 asm: x86.ASUBL,
3955 reg: regInfo{
3956 inputs: []inputInfo{
3957 {0, 239},
3958 },
3959 outputs: []outputInfo{
3960 {0, 239},
3961 },
3962 },
3963 },
3964 {
3965 name: "SUBLcarry",
3966 argLen: 2,
3967 resultInArg0: true,
3968 asm: x86.ASUBL,
3969 reg: regInfo{
3970 inputs: []inputInfo{
3971 {0, 239},
3972 {1, 239},
3973 },
3974 outputs: []outputInfo{
3975 {1, 0},
3976 {0, 239},
3977 },
3978 },
3979 },
3980 {
3981 name: "SUBLconstcarry",
3982 auxType: auxInt32,
3983 argLen: 1,
3984 resultInArg0: true,
3985 asm: x86.ASUBL,
3986 reg: regInfo{
3987 inputs: []inputInfo{
3988 {0, 239},
3989 },
3990 outputs: []outputInfo{
3991 {1, 0},
3992 {0, 239},
3993 },
3994 },
3995 },
3996 {
3997 name: "SBBL",
3998 argLen: 3,
3999 resultInArg0: true,
4000 clobberFlags: true,
4001 asm: x86.ASBBL,
4002 reg: regInfo{
4003 inputs: []inputInfo{
4004 {0, 239},
4005 {1, 239},
4006 },
4007 outputs: []outputInfo{
4008 {0, 239},
4009 },
4010 },
4011 },
4012 {
4013 name: "SBBLconst",
4014 auxType: auxInt32,
4015 argLen: 2,
4016 resultInArg0: true,
4017 clobberFlags: true,
4018 asm: x86.ASBBL,
4019 reg: regInfo{
4020 inputs: []inputInfo{
4021 {0, 239},
4022 },
4023 outputs: []outputInfo{
4024 {0, 239},
4025 },
4026 },
4027 },
4028 {
4029 name: "MULL",
4030 argLen: 2,
4031 commutative: true,
4032 resultInArg0: true,
4033 clobberFlags: true,
4034 asm: x86.AIMULL,
4035 reg: regInfo{
4036 inputs: []inputInfo{
4037 {0, 239},
4038 {1, 239},
4039 },
4040 outputs: []outputInfo{
4041 {0, 239},
4042 },
4043 },
4044 },
4045 {
4046 name: "MULLconst",
4047 auxType: auxInt32,
4048 argLen: 1,
4049 clobberFlags: true,
4050 asm: x86.AIMUL3L,
4051 reg: regInfo{
4052 inputs: []inputInfo{
4053 {0, 239},
4054 },
4055 outputs: []outputInfo{
4056 {0, 239},
4057 },
4058 },
4059 },
4060 {
4061 name: "MULLU",
4062 argLen: 2,
4063 commutative: true,
4064 clobberFlags: true,
4065 asm: x86.AMULL,
4066 reg: regInfo{
4067 inputs: []inputInfo{
4068 {0, 1},
4069 {1, 255},
4070 },
4071 clobbers: 4,
4072 outputs: []outputInfo{
4073 {1, 0},
4074 {0, 1},
4075 },
4076 },
4077 },
4078 {
4079 name: "HMULL",
4080 argLen: 2,
4081 commutative: true,
4082 clobberFlags: true,
4083 asm: x86.AIMULL,
4084 reg: regInfo{
4085 inputs: []inputInfo{
4086 {0, 1},
4087 {1, 255},
4088 },
4089 clobbers: 1,
4090 outputs: []outputInfo{
4091 {0, 4},
4092 },
4093 },
4094 },
4095 {
4096 name: "HMULLU",
4097 argLen: 2,
4098 commutative: true,
4099 clobberFlags: true,
4100 asm: x86.AMULL,
4101 reg: regInfo{
4102 inputs: []inputInfo{
4103 {0, 1},
4104 {1, 255},
4105 },
4106 clobbers: 1,
4107 outputs: []outputInfo{
4108 {0, 4},
4109 },
4110 },
4111 },
4112 {
4113 name: "MULLQU",
4114 argLen: 2,
4115 commutative: true,
4116 clobberFlags: true,
4117 asm: x86.AMULL,
4118 reg: regInfo{
4119 inputs: []inputInfo{
4120 {0, 1},
4121 {1, 255},
4122 },
4123 outputs: []outputInfo{
4124 {0, 4},
4125 {1, 1},
4126 },
4127 },
4128 },
4129 {
4130 name: "AVGLU",
4131 argLen: 2,
4132 commutative: true,
4133 resultInArg0: true,
4134 clobberFlags: true,
4135 reg: regInfo{
4136 inputs: []inputInfo{
4137 {0, 239},
4138 {1, 239},
4139 },
4140 outputs: []outputInfo{
4141 {0, 239},
4142 },
4143 },
4144 },
4145 {
4146 name: "DIVL",
4147 auxType: auxBool,
4148 argLen: 2,
4149 clobberFlags: true,
4150 asm: x86.AIDIVL,
4151 reg: regInfo{
4152 inputs: []inputInfo{
4153 {0, 1},
4154 {1, 251},
4155 },
4156 clobbers: 4,
4157 outputs: []outputInfo{
4158 {0, 1},
4159 },
4160 },
4161 },
4162 {
4163 name: "DIVW",
4164 auxType: auxBool,
4165 argLen: 2,
4166 clobberFlags: true,
4167 asm: x86.AIDIVW,
4168 reg: regInfo{
4169 inputs: []inputInfo{
4170 {0, 1},
4171 {1, 251},
4172 },
4173 clobbers: 4,
4174 outputs: []outputInfo{
4175 {0, 1},
4176 },
4177 },
4178 },
4179 {
4180 name: "DIVLU",
4181 argLen: 2,
4182 clobberFlags: true,
4183 asm: x86.ADIVL,
4184 reg: regInfo{
4185 inputs: []inputInfo{
4186 {0, 1},
4187 {1, 251},
4188 },
4189 clobbers: 4,
4190 outputs: []outputInfo{
4191 {0, 1},
4192 },
4193 },
4194 },
4195 {
4196 name: "DIVWU",
4197 argLen: 2,
4198 clobberFlags: true,
4199 asm: x86.ADIVW,
4200 reg: regInfo{
4201 inputs: []inputInfo{
4202 {0, 1},
4203 {1, 251},
4204 },
4205 clobbers: 4,
4206 outputs: []outputInfo{
4207 {0, 1},
4208 },
4209 },
4210 },
4211 {
4212 name: "MODL",
4213 auxType: auxBool,
4214 argLen: 2,
4215 clobberFlags: true,
4216 asm: x86.AIDIVL,
4217 reg: regInfo{
4218 inputs: []inputInfo{
4219 {0, 1},
4220 {1, 251},
4221 },
4222 clobbers: 1,
4223 outputs: []outputInfo{
4224 {0, 4},
4225 },
4226 },
4227 },
4228 {
4229 name: "MODW",
4230 auxType: auxBool,
4231 argLen: 2,
4232 clobberFlags: true,
4233 asm: x86.AIDIVW,
4234 reg: regInfo{
4235 inputs: []inputInfo{
4236 {0, 1},
4237 {1, 251},
4238 },
4239 clobbers: 1,
4240 outputs: []outputInfo{
4241 {0, 4},
4242 },
4243 },
4244 },
4245 {
4246 name: "MODLU",
4247 argLen: 2,
4248 clobberFlags: true,
4249 asm: x86.ADIVL,
4250 reg: regInfo{
4251 inputs: []inputInfo{
4252 {0, 1},
4253 {1, 251},
4254 },
4255 clobbers: 1,
4256 outputs: []outputInfo{
4257 {0, 4},
4258 },
4259 },
4260 },
4261 {
4262 name: "MODWU",
4263 argLen: 2,
4264 clobberFlags: true,
4265 asm: x86.ADIVW,
4266 reg: regInfo{
4267 inputs: []inputInfo{
4268 {0, 1},
4269 {1, 251},
4270 },
4271 clobbers: 1,
4272 outputs: []outputInfo{
4273 {0, 4},
4274 },
4275 },
4276 },
4277 {
4278 name: "ANDL",
4279 argLen: 2,
4280 commutative: true,
4281 resultInArg0: true,
4282 clobberFlags: true,
4283 asm: x86.AANDL,
4284 reg: regInfo{
4285 inputs: []inputInfo{
4286 {0, 239},
4287 {1, 239},
4288 },
4289 outputs: []outputInfo{
4290 {0, 239},
4291 },
4292 },
4293 },
4294 {
4295 name: "ANDLconst",
4296 auxType: auxInt32,
4297 argLen: 1,
4298 resultInArg0: true,
4299 clobberFlags: true,
4300 asm: x86.AANDL,
4301 reg: regInfo{
4302 inputs: []inputInfo{
4303 {0, 239},
4304 },
4305 outputs: []outputInfo{
4306 {0, 239},
4307 },
4308 },
4309 },
4310 {
4311 name: "ORL",
4312 argLen: 2,
4313 commutative: true,
4314 resultInArg0: true,
4315 clobberFlags: true,
4316 asm: x86.AORL,
4317 reg: regInfo{
4318 inputs: []inputInfo{
4319 {0, 239},
4320 {1, 239},
4321 },
4322 outputs: []outputInfo{
4323 {0, 239},
4324 },
4325 },
4326 },
4327 {
4328 name: "ORLconst",
4329 auxType: auxInt32,
4330 argLen: 1,
4331 resultInArg0: true,
4332 clobberFlags: true,
4333 asm: x86.AORL,
4334 reg: regInfo{
4335 inputs: []inputInfo{
4336 {0, 239},
4337 },
4338 outputs: []outputInfo{
4339 {0, 239},
4340 },
4341 },
4342 },
4343 {
4344 name: "XORL",
4345 argLen: 2,
4346 commutative: true,
4347 resultInArg0: true,
4348 clobberFlags: true,
4349 asm: x86.AXORL,
4350 reg: regInfo{
4351 inputs: []inputInfo{
4352 {0, 239},
4353 {1, 239},
4354 },
4355 outputs: []outputInfo{
4356 {0, 239},
4357 },
4358 },
4359 },
4360 {
4361 name: "XORLconst",
4362 auxType: auxInt32,
4363 argLen: 1,
4364 resultInArg0: true,
4365 clobberFlags: true,
4366 asm: x86.AXORL,
4367 reg: regInfo{
4368 inputs: []inputInfo{
4369 {0, 239},
4370 },
4371 outputs: []outputInfo{
4372 {0, 239},
4373 },
4374 },
4375 },
4376 {
4377 name: "CMPL",
4378 argLen: 2,
4379 asm: x86.ACMPL,
4380 reg: regInfo{
4381 inputs: []inputInfo{
4382 {0, 255},
4383 {1, 255},
4384 },
4385 },
4386 },
4387 {
4388 name: "CMPW",
4389 argLen: 2,
4390 asm: x86.ACMPW,
4391 reg: regInfo{
4392 inputs: []inputInfo{
4393 {0, 255},
4394 {1, 255},
4395 },
4396 },
4397 },
4398 {
4399 name: "CMPB",
4400 argLen: 2,
4401 asm: x86.ACMPB,
4402 reg: regInfo{
4403 inputs: []inputInfo{
4404 {0, 255},
4405 {1, 255},
4406 },
4407 },
4408 },
4409 {
4410 name: "CMPLconst",
4411 auxType: auxInt32,
4412 argLen: 1,
4413 asm: x86.ACMPL,
4414 reg: regInfo{
4415 inputs: []inputInfo{
4416 {0, 255},
4417 },
4418 },
4419 },
4420 {
4421 name: "CMPWconst",
4422 auxType: auxInt16,
4423 argLen: 1,
4424 asm: x86.ACMPW,
4425 reg: regInfo{
4426 inputs: []inputInfo{
4427 {0, 255},
4428 },
4429 },
4430 },
4431 {
4432 name: "CMPBconst",
4433 auxType: auxInt8,
4434 argLen: 1,
4435 asm: x86.ACMPB,
4436 reg: regInfo{
4437 inputs: []inputInfo{
4438 {0, 255},
4439 },
4440 },
4441 },
4442 {
4443 name: "CMPLload",
4444 auxType: auxSymOff,
4445 argLen: 3,
4446 faultOnNilArg0: true,
4447 symEffect: SymRead,
4448 asm: x86.ACMPL,
4449 reg: regInfo{
4450 inputs: []inputInfo{
4451 {1, 255},
4452 {0, 65791},
4453 },
4454 },
4455 },
4456 {
4457 name: "CMPWload",
4458 auxType: auxSymOff,
4459 argLen: 3,
4460 faultOnNilArg0: true,
4461 symEffect: SymRead,
4462 asm: x86.ACMPW,
4463 reg: regInfo{
4464 inputs: []inputInfo{
4465 {1, 255},
4466 {0, 65791},
4467 },
4468 },
4469 },
4470 {
4471 name: "CMPBload",
4472 auxType: auxSymOff,
4473 argLen: 3,
4474 faultOnNilArg0: true,
4475 symEffect: SymRead,
4476 asm: x86.ACMPB,
4477 reg: regInfo{
4478 inputs: []inputInfo{
4479 {1, 255},
4480 {0, 65791},
4481 },
4482 },
4483 },
4484 {
4485 name: "CMPLconstload",
4486 auxType: auxSymValAndOff,
4487 argLen: 2,
4488 faultOnNilArg0: true,
4489 symEffect: SymRead,
4490 asm: x86.ACMPL,
4491 reg: regInfo{
4492 inputs: []inputInfo{
4493 {0, 65791},
4494 },
4495 },
4496 },
4497 {
4498 name: "CMPWconstload",
4499 auxType: auxSymValAndOff,
4500 argLen: 2,
4501 faultOnNilArg0: true,
4502 symEffect: SymRead,
4503 asm: x86.ACMPW,
4504 reg: regInfo{
4505 inputs: []inputInfo{
4506 {0, 65791},
4507 },
4508 },
4509 },
4510 {
4511 name: "CMPBconstload",
4512 auxType: auxSymValAndOff,
4513 argLen: 2,
4514 faultOnNilArg0: true,
4515 symEffect: SymRead,
4516 asm: x86.ACMPB,
4517 reg: regInfo{
4518 inputs: []inputInfo{
4519 {0, 65791},
4520 },
4521 },
4522 },
4523 {
4524 name: "UCOMISS",
4525 argLen: 2,
4526 asm: x86.AUCOMISS,
4527 reg: regInfo{
4528 inputs: []inputInfo{
4529 {0, 65280},
4530 {1, 65280},
4531 },
4532 },
4533 },
4534 {
4535 name: "UCOMISD",
4536 argLen: 2,
4537 asm: x86.AUCOMISD,
4538 reg: regInfo{
4539 inputs: []inputInfo{
4540 {0, 65280},
4541 {1, 65280},
4542 },
4543 },
4544 },
4545 {
4546 name: "TESTL",
4547 argLen: 2,
4548 commutative: true,
4549 asm: x86.ATESTL,
4550 reg: regInfo{
4551 inputs: []inputInfo{
4552 {0, 255},
4553 {1, 255},
4554 },
4555 },
4556 },
4557 {
4558 name: "TESTW",
4559 argLen: 2,
4560 commutative: true,
4561 asm: x86.ATESTW,
4562 reg: regInfo{
4563 inputs: []inputInfo{
4564 {0, 255},
4565 {1, 255},
4566 },
4567 },
4568 },
4569 {
4570 name: "TESTB",
4571 argLen: 2,
4572 commutative: true,
4573 asm: x86.ATESTB,
4574 reg: regInfo{
4575 inputs: []inputInfo{
4576 {0, 255},
4577 {1, 255},
4578 },
4579 },
4580 },
4581 {
4582 name: "TESTLconst",
4583 auxType: auxInt32,
4584 argLen: 1,
4585 asm: x86.ATESTL,
4586 reg: regInfo{
4587 inputs: []inputInfo{
4588 {0, 255},
4589 },
4590 },
4591 },
4592 {
4593 name: "TESTWconst",
4594 auxType: auxInt16,
4595 argLen: 1,
4596 asm: x86.ATESTW,
4597 reg: regInfo{
4598 inputs: []inputInfo{
4599 {0, 255},
4600 },
4601 },
4602 },
4603 {
4604 name: "TESTBconst",
4605 auxType: auxInt8,
4606 argLen: 1,
4607 asm: x86.ATESTB,
4608 reg: regInfo{
4609 inputs: []inputInfo{
4610 {0, 255},
4611 },
4612 },
4613 },
4614 {
4615 name: "SHLL",
4616 argLen: 2,
4617 resultInArg0: true,
4618 clobberFlags: true,
4619 asm: x86.ASHLL,
4620 reg: regInfo{
4621 inputs: []inputInfo{
4622 {1, 2},
4623 {0, 239},
4624 },
4625 outputs: []outputInfo{
4626 {0, 239},
4627 },
4628 },
4629 },
4630 {
4631 name: "SHLLconst",
4632 auxType: auxInt32,
4633 argLen: 1,
4634 resultInArg0: true,
4635 clobberFlags: true,
4636 asm: x86.ASHLL,
4637 reg: regInfo{
4638 inputs: []inputInfo{
4639 {0, 239},
4640 },
4641 outputs: []outputInfo{
4642 {0, 239},
4643 },
4644 },
4645 },
4646 {
4647 name: "SHRL",
4648 argLen: 2,
4649 resultInArg0: true,
4650 clobberFlags: true,
4651 asm: x86.ASHRL,
4652 reg: regInfo{
4653 inputs: []inputInfo{
4654 {1, 2},
4655 {0, 239},
4656 },
4657 outputs: []outputInfo{
4658 {0, 239},
4659 },
4660 },
4661 },
4662 {
4663 name: "SHRW",
4664 argLen: 2,
4665 resultInArg0: true,
4666 clobberFlags: true,
4667 asm: x86.ASHRW,
4668 reg: regInfo{
4669 inputs: []inputInfo{
4670 {1, 2},
4671 {0, 239},
4672 },
4673 outputs: []outputInfo{
4674 {0, 239},
4675 },
4676 },
4677 },
4678 {
4679 name: "SHRB",
4680 argLen: 2,
4681 resultInArg0: true,
4682 clobberFlags: true,
4683 asm: x86.ASHRB,
4684 reg: regInfo{
4685 inputs: []inputInfo{
4686 {1, 2},
4687 {0, 239},
4688 },
4689 outputs: []outputInfo{
4690 {0, 239},
4691 },
4692 },
4693 },
4694 {
4695 name: "SHRLconst",
4696 auxType: auxInt32,
4697 argLen: 1,
4698 resultInArg0: true,
4699 clobberFlags: true,
4700 asm: x86.ASHRL,
4701 reg: regInfo{
4702 inputs: []inputInfo{
4703 {0, 239},
4704 },
4705 outputs: []outputInfo{
4706 {0, 239},
4707 },
4708 },
4709 },
4710 {
4711 name: "SHRWconst",
4712 auxType: auxInt16,
4713 argLen: 1,
4714 resultInArg0: true,
4715 clobberFlags: true,
4716 asm: x86.ASHRW,
4717 reg: regInfo{
4718 inputs: []inputInfo{
4719 {0, 239},
4720 },
4721 outputs: []outputInfo{
4722 {0, 239},
4723 },
4724 },
4725 },
4726 {
4727 name: "SHRBconst",
4728 auxType: auxInt8,
4729 argLen: 1,
4730 resultInArg0: true,
4731 clobberFlags: true,
4732 asm: x86.ASHRB,
4733 reg: regInfo{
4734 inputs: []inputInfo{
4735 {0, 239},
4736 },
4737 outputs: []outputInfo{
4738 {0, 239},
4739 },
4740 },
4741 },
4742 {
4743 name: "SARL",
4744 argLen: 2,
4745 resultInArg0: true,
4746 clobberFlags: true,
4747 asm: x86.ASARL,
4748 reg: regInfo{
4749 inputs: []inputInfo{
4750 {1, 2},
4751 {0, 239},
4752 },
4753 outputs: []outputInfo{
4754 {0, 239},
4755 },
4756 },
4757 },
4758 {
4759 name: "SARW",
4760 argLen: 2,
4761 resultInArg0: true,
4762 clobberFlags: true,
4763 asm: x86.ASARW,
4764 reg: regInfo{
4765 inputs: []inputInfo{
4766 {1, 2},
4767 {0, 239},
4768 },
4769 outputs: []outputInfo{
4770 {0, 239},
4771 },
4772 },
4773 },
4774 {
4775 name: "SARB",
4776 argLen: 2,
4777 resultInArg0: true,
4778 clobberFlags: true,
4779 asm: x86.ASARB,
4780 reg: regInfo{
4781 inputs: []inputInfo{
4782 {1, 2},
4783 {0, 239},
4784 },
4785 outputs: []outputInfo{
4786 {0, 239},
4787 },
4788 },
4789 },
4790 {
4791 name: "SARLconst",
4792 auxType: auxInt32,
4793 argLen: 1,
4794 resultInArg0: true,
4795 clobberFlags: true,
4796 asm: x86.ASARL,
4797 reg: regInfo{
4798 inputs: []inputInfo{
4799 {0, 239},
4800 },
4801 outputs: []outputInfo{
4802 {0, 239},
4803 },
4804 },
4805 },
4806 {
4807 name: "SARWconst",
4808 auxType: auxInt16,
4809 argLen: 1,
4810 resultInArg0: true,
4811 clobberFlags: true,
4812 asm: x86.ASARW,
4813 reg: regInfo{
4814 inputs: []inputInfo{
4815 {0, 239},
4816 },
4817 outputs: []outputInfo{
4818 {0, 239},
4819 },
4820 },
4821 },
4822 {
4823 name: "SARBconst",
4824 auxType: auxInt8,
4825 argLen: 1,
4826 resultInArg0: true,
4827 clobberFlags: true,
4828 asm: x86.ASARB,
4829 reg: regInfo{
4830 inputs: []inputInfo{
4831 {0, 239},
4832 },
4833 outputs: []outputInfo{
4834 {0, 239},
4835 },
4836 },
4837 },
4838 {
4839 name: "ROLL",
4840 argLen: 2,
4841 resultInArg0: true,
4842 clobberFlags: true,
4843 asm: x86.AROLL,
4844 reg: regInfo{
4845 inputs: []inputInfo{
4846 {1, 2},
4847 {0, 239},
4848 },
4849 outputs: []outputInfo{
4850 {0, 239},
4851 },
4852 },
4853 },
4854 {
4855 name: "ROLW",
4856 argLen: 2,
4857 resultInArg0: true,
4858 clobberFlags: true,
4859 asm: x86.AROLW,
4860 reg: regInfo{
4861 inputs: []inputInfo{
4862 {1, 2},
4863 {0, 239},
4864 },
4865 outputs: []outputInfo{
4866 {0, 239},
4867 },
4868 },
4869 },
4870 {
4871 name: "ROLB",
4872 argLen: 2,
4873 resultInArg0: true,
4874 clobberFlags: true,
4875 asm: x86.AROLB,
4876 reg: regInfo{
4877 inputs: []inputInfo{
4878 {1, 2},
4879 {0, 239},
4880 },
4881 outputs: []outputInfo{
4882 {0, 239},
4883 },
4884 },
4885 },
4886 {
4887 name: "ROLLconst",
4888 auxType: auxInt32,
4889 argLen: 1,
4890 resultInArg0: true,
4891 clobberFlags: true,
4892 asm: x86.AROLL,
4893 reg: regInfo{
4894 inputs: []inputInfo{
4895 {0, 239},
4896 },
4897 outputs: []outputInfo{
4898 {0, 239},
4899 },
4900 },
4901 },
4902 {
4903 name: "ROLWconst",
4904 auxType: auxInt16,
4905 argLen: 1,
4906 resultInArg0: true,
4907 clobberFlags: true,
4908 asm: x86.AROLW,
4909 reg: regInfo{
4910 inputs: []inputInfo{
4911 {0, 239},
4912 },
4913 outputs: []outputInfo{
4914 {0, 239},
4915 },
4916 },
4917 },
4918 {
4919 name: "ROLBconst",
4920 auxType: auxInt8,
4921 argLen: 1,
4922 resultInArg0: true,
4923 clobberFlags: true,
4924 asm: x86.AROLB,
4925 reg: regInfo{
4926 inputs: []inputInfo{
4927 {0, 239},
4928 },
4929 outputs: []outputInfo{
4930 {0, 239},
4931 },
4932 },
4933 },
4934 {
4935 name: "ADDLload",
4936 auxType: auxSymOff,
4937 argLen: 3,
4938 resultInArg0: true,
4939 clobberFlags: true,
4940 faultOnNilArg1: true,
4941 symEffect: SymRead,
4942 asm: x86.AADDL,
4943 reg: regInfo{
4944 inputs: []inputInfo{
4945 {0, 239},
4946 {1, 65791},
4947 },
4948 outputs: []outputInfo{
4949 {0, 239},
4950 },
4951 },
4952 },
4953 {
4954 name: "SUBLload",
4955 auxType: auxSymOff,
4956 argLen: 3,
4957 resultInArg0: true,
4958 clobberFlags: true,
4959 faultOnNilArg1: true,
4960 symEffect: SymRead,
4961 asm: x86.ASUBL,
4962 reg: regInfo{
4963 inputs: []inputInfo{
4964 {0, 239},
4965 {1, 65791},
4966 },
4967 outputs: []outputInfo{
4968 {0, 239},
4969 },
4970 },
4971 },
4972 {
4973 name: "MULLload",
4974 auxType: auxSymOff,
4975 argLen: 3,
4976 resultInArg0: true,
4977 clobberFlags: true,
4978 faultOnNilArg1: true,
4979 symEffect: SymRead,
4980 asm: x86.AIMULL,
4981 reg: regInfo{
4982 inputs: []inputInfo{
4983 {0, 239},
4984 {1, 65791},
4985 },
4986 outputs: []outputInfo{
4987 {0, 239},
4988 },
4989 },
4990 },
4991 {
4992 name: "ANDLload",
4993 auxType: auxSymOff,
4994 argLen: 3,
4995 resultInArg0: true,
4996 clobberFlags: true,
4997 faultOnNilArg1: true,
4998 symEffect: SymRead,
4999 asm: x86.AANDL,
5000 reg: regInfo{
5001 inputs: []inputInfo{
5002 {0, 239},
5003 {1, 65791},
5004 },
5005 outputs: []outputInfo{
5006 {0, 239},
5007 },
5008 },
5009 },
5010 {
5011 name: "ORLload",
5012 auxType: auxSymOff,
5013 argLen: 3,
5014 resultInArg0: true,
5015 clobberFlags: true,
5016 faultOnNilArg1: true,
5017 symEffect: SymRead,
5018 asm: x86.AORL,
5019 reg: regInfo{
5020 inputs: []inputInfo{
5021 {0, 239},
5022 {1, 65791},
5023 },
5024 outputs: []outputInfo{
5025 {0, 239},
5026 },
5027 },
5028 },
5029 {
5030 name: "XORLload",
5031 auxType: auxSymOff,
5032 argLen: 3,
5033 resultInArg0: true,
5034 clobberFlags: true,
5035 faultOnNilArg1: true,
5036 symEffect: SymRead,
5037 asm: x86.AXORL,
5038 reg: regInfo{
5039 inputs: []inputInfo{
5040 {0, 239},
5041 {1, 65791},
5042 },
5043 outputs: []outputInfo{
5044 {0, 239},
5045 },
5046 },
5047 },
5048 {
5049 name: "ADDLloadidx4",
5050 auxType: auxSymOff,
5051 argLen: 4,
5052 resultInArg0: true,
5053 clobberFlags: true,
5054 symEffect: SymRead,
5055 asm: x86.AADDL,
5056 reg: regInfo{
5057 inputs: []inputInfo{
5058 {0, 239},
5059 {2, 255},
5060 {1, 65791},
5061 },
5062 outputs: []outputInfo{
5063 {0, 239},
5064 },
5065 },
5066 },
5067 {
5068 name: "SUBLloadidx4",
5069 auxType: auxSymOff,
5070 argLen: 4,
5071 resultInArg0: true,
5072 clobberFlags: true,
5073 symEffect: SymRead,
5074 asm: x86.ASUBL,
5075 reg: regInfo{
5076 inputs: []inputInfo{
5077 {0, 239},
5078 {2, 255},
5079 {1, 65791},
5080 },
5081 outputs: []outputInfo{
5082 {0, 239},
5083 },
5084 },
5085 },
5086 {
5087 name: "MULLloadidx4",
5088 auxType: auxSymOff,
5089 argLen: 4,
5090 resultInArg0: true,
5091 clobberFlags: true,
5092 symEffect: SymRead,
5093 asm: x86.AIMULL,
5094 reg: regInfo{
5095 inputs: []inputInfo{
5096 {0, 239},
5097 {2, 255},
5098 {1, 65791},
5099 },
5100 outputs: []outputInfo{
5101 {0, 239},
5102 },
5103 },
5104 },
5105 {
5106 name: "ANDLloadidx4",
5107 auxType: auxSymOff,
5108 argLen: 4,
5109 resultInArg0: true,
5110 clobberFlags: true,
5111 symEffect: SymRead,
5112 asm: x86.AANDL,
5113 reg: regInfo{
5114 inputs: []inputInfo{
5115 {0, 239},
5116 {2, 255},
5117 {1, 65791},
5118 },
5119 outputs: []outputInfo{
5120 {0, 239},
5121 },
5122 },
5123 },
5124 {
5125 name: "ORLloadidx4",
5126 auxType: auxSymOff,
5127 argLen: 4,
5128 resultInArg0: true,
5129 clobberFlags: true,
5130 symEffect: SymRead,
5131 asm: x86.AORL,
5132 reg: regInfo{
5133 inputs: []inputInfo{
5134 {0, 239},
5135 {2, 255},
5136 {1, 65791},
5137 },
5138 outputs: []outputInfo{
5139 {0, 239},
5140 },
5141 },
5142 },
5143 {
5144 name: "XORLloadidx4",
5145 auxType: auxSymOff,
5146 argLen: 4,
5147 resultInArg0: true,
5148 clobberFlags: true,
5149 symEffect: SymRead,
5150 asm: x86.AXORL,
5151 reg: regInfo{
5152 inputs: []inputInfo{
5153 {0, 239},
5154 {2, 255},
5155 {1, 65791},
5156 },
5157 outputs: []outputInfo{
5158 {0, 239},
5159 },
5160 },
5161 },
5162 {
5163 name: "NEGL",
5164 argLen: 1,
5165 resultInArg0: true,
5166 clobberFlags: true,
5167 asm: x86.ANEGL,
5168 reg: regInfo{
5169 inputs: []inputInfo{
5170 {0, 239},
5171 },
5172 outputs: []outputInfo{
5173 {0, 239},
5174 },
5175 },
5176 },
5177 {
5178 name: "NOTL",
5179 argLen: 1,
5180 resultInArg0: true,
5181 asm: x86.ANOTL,
5182 reg: regInfo{
5183 inputs: []inputInfo{
5184 {0, 239},
5185 },
5186 outputs: []outputInfo{
5187 {0, 239},
5188 },
5189 },
5190 },
5191 {
5192 name: "BSFL",
5193 argLen: 1,
5194 clobberFlags: true,
5195 asm: x86.ABSFL,
5196 reg: regInfo{
5197 inputs: []inputInfo{
5198 {0, 239},
5199 },
5200 outputs: []outputInfo{
5201 {0, 239},
5202 },
5203 },
5204 },
5205 {
5206 name: "BSFW",
5207 argLen: 1,
5208 clobberFlags: true,
5209 asm: x86.ABSFW,
5210 reg: regInfo{
5211 inputs: []inputInfo{
5212 {0, 239},
5213 },
5214 outputs: []outputInfo{
5215 {0, 239},
5216 },
5217 },
5218 },
5219 {
5220 name: "LoweredCtz32",
5221 argLen: 1,
5222 clobberFlags: true,
5223 reg: regInfo{
5224 inputs: []inputInfo{
5225 {0, 239},
5226 },
5227 outputs: []outputInfo{
5228 {0, 239},
5229 },
5230 },
5231 },
5232 {
5233 name: "LoweredCtz64",
5234 argLen: 2,
5235 resultNotInArgs: true,
5236 clobberFlags: true,
5237 reg: regInfo{
5238 inputs: []inputInfo{
5239 {0, 239},
5240 {1, 239},
5241 },
5242 outputs: []outputInfo{
5243 {0, 239},
5244 },
5245 },
5246 },
5247 {
5248 name: "BSRL",
5249 argLen: 1,
5250 clobberFlags: true,
5251 asm: x86.ABSRL,
5252 reg: regInfo{
5253 inputs: []inputInfo{
5254 {0, 239},
5255 },
5256 outputs: []outputInfo{
5257 {0, 239},
5258 },
5259 },
5260 },
5261 {
5262 name: "BSRW",
5263 argLen: 1,
5264 clobberFlags: true,
5265 asm: x86.ABSRW,
5266 reg: regInfo{
5267 inputs: []inputInfo{
5268 {0, 239},
5269 },
5270 outputs: []outputInfo{
5271 {0, 239},
5272 },
5273 },
5274 },
5275 {
5276 name: "BSWAPL",
5277 argLen: 1,
5278 resultInArg0: true,
5279 asm: x86.ABSWAPL,
5280 reg: regInfo{
5281 inputs: []inputInfo{
5282 {0, 239},
5283 },
5284 outputs: []outputInfo{
5285 {0, 239},
5286 },
5287 },
5288 },
5289 {
5290 name: "SQRTSD",
5291 argLen: 1,
5292 asm: x86.ASQRTSD,
5293 reg: regInfo{
5294 inputs: []inputInfo{
5295 {0, 65280},
5296 },
5297 outputs: []outputInfo{
5298 {0, 65280},
5299 },
5300 },
5301 },
5302 {
5303 name: "SQRTSS",
5304 argLen: 1,
5305 asm: x86.ASQRTSS,
5306 reg: regInfo{
5307 inputs: []inputInfo{
5308 {0, 65280},
5309 },
5310 outputs: []outputInfo{
5311 {0, 65280},
5312 },
5313 },
5314 },
5315 {
5316 name: "SBBLcarrymask",
5317 argLen: 1,
5318 asm: x86.ASBBL,
5319 reg: regInfo{
5320 outputs: []outputInfo{
5321 {0, 239},
5322 },
5323 },
5324 },
5325 {
5326 name: "SETEQ",
5327 argLen: 1,
5328 asm: x86.ASETEQ,
5329 reg: regInfo{
5330 outputs: []outputInfo{
5331 {0, 239},
5332 },
5333 },
5334 },
5335 {
5336 name: "SETNE",
5337 argLen: 1,
5338 asm: x86.ASETNE,
5339 reg: regInfo{
5340 outputs: []outputInfo{
5341 {0, 239},
5342 },
5343 },
5344 },
5345 {
5346 name: "SETL",
5347 argLen: 1,
5348 asm: x86.ASETLT,
5349 reg: regInfo{
5350 outputs: []outputInfo{
5351 {0, 239},
5352 },
5353 },
5354 },
5355 {
5356 name: "SETLE",
5357 argLen: 1,
5358 asm: x86.ASETLE,
5359 reg: regInfo{
5360 outputs: []outputInfo{
5361 {0, 239},
5362 },
5363 },
5364 },
5365 {
5366 name: "SETG",
5367 argLen: 1,
5368 asm: x86.ASETGT,
5369 reg: regInfo{
5370 outputs: []outputInfo{
5371 {0, 239},
5372 },
5373 },
5374 },
5375 {
5376 name: "SETGE",
5377 argLen: 1,
5378 asm: x86.ASETGE,
5379 reg: regInfo{
5380 outputs: []outputInfo{
5381 {0, 239},
5382 },
5383 },
5384 },
5385 {
5386 name: "SETB",
5387 argLen: 1,
5388 asm: x86.ASETCS,
5389 reg: regInfo{
5390 outputs: []outputInfo{
5391 {0, 239},
5392 },
5393 },
5394 },
5395 {
5396 name: "SETBE",
5397 argLen: 1,
5398 asm: x86.ASETLS,
5399 reg: regInfo{
5400 outputs: []outputInfo{
5401 {0, 239},
5402 },
5403 },
5404 },
5405 {
5406 name: "SETA",
5407 argLen: 1,
5408 asm: x86.ASETHI,
5409 reg: regInfo{
5410 outputs: []outputInfo{
5411 {0, 239},
5412 },
5413 },
5414 },
5415 {
5416 name: "SETAE",
5417 argLen: 1,
5418 asm: x86.ASETCC,
5419 reg: regInfo{
5420 outputs: []outputInfo{
5421 {0, 239},
5422 },
5423 },
5424 },
5425 {
5426 name: "SETO",
5427 argLen: 1,
5428 asm: x86.ASETOS,
5429 reg: regInfo{
5430 outputs: []outputInfo{
5431 {0, 239},
5432 },
5433 },
5434 },
5435 {
5436 name: "SETEQF",
5437 argLen: 1,
5438 clobberFlags: true,
5439 asm: x86.ASETEQ,
5440 reg: regInfo{
5441 clobbers: 1,
5442 outputs: []outputInfo{
5443 {0, 238},
5444 },
5445 },
5446 },
5447 {
5448 name: "SETNEF",
5449 argLen: 1,
5450 clobberFlags: true,
5451 asm: x86.ASETNE,
5452 reg: regInfo{
5453 clobbers: 1,
5454 outputs: []outputInfo{
5455 {0, 238},
5456 },
5457 },
5458 },
5459 {
5460 name: "SETORD",
5461 argLen: 1,
5462 asm: x86.ASETPC,
5463 reg: regInfo{
5464 outputs: []outputInfo{
5465 {0, 239},
5466 },
5467 },
5468 },
5469 {
5470 name: "SETNAN",
5471 argLen: 1,
5472 asm: x86.ASETPS,
5473 reg: regInfo{
5474 outputs: []outputInfo{
5475 {0, 239},
5476 },
5477 },
5478 },
5479 {
5480 name: "SETGF",
5481 argLen: 1,
5482 asm: x86.ASETHI,
5483 reg: regInfo{
5484 outputs: []outputInfo{
5485 {0, 239},
5486 },
5487 },
5488 },
5489 {
5490 name: "SETGEF",
5491 argLen: 1,
5492 asm: x86.ASETCC,
5493 reg: regInfo{
5494 outputs: []outputInfo{
5495 {0, 239},
5496 },
5497 },
5498 },
5499 {
5500 name: "MOVBLSX",
5501 argLen: 1,
5502 asm: x86.AMOVBLSX,
5503 reg: regInfo{
5504 inputs: []inputInfo{
5505 {0, 239},
5506 },
5507 outputs: []outputInfo{
5508 {0, 239},
5509 },
5510 },
5511 },
5512 {
5513 name: "MOVBLZX",
5514 argLen: 1,
5515 asm: x86.AMOVBLZX,
5516 reg: regInfo{
5517 inputs: []inputInfo{
5518 {0, 239},
5519 },
5520 outputs: []outputInfo{
5521 {0, 239},
5522 },
5523 },
5524 },
5525 {
5526 name: "MOVWLSX",
5527 argLen: 1,
5528 asm: x86.AMOVWLSX,
5529 reg: regInfo{
5530 inputs: []inputInfo{
5531 {0, 239},
5532 },
5533 outputs: []outputInfo{
5534 {0, 239},
5535 },
5536 },
5537 },
5538 {
5539 name: "MOVWLZX",
5540 argLen: 1,
5541 asm: x86.AMOVWLZX,
5542 reg: regInfo{
5543 inputs: []inputInfo{
5544 {0, 239},
5545 },
5546 outputs: []outputInfo{
5547 {0, 239},
5548 },
5549 },
5550 },
5551 {
5552 name: "MOVLconst",
5553 auxType: auxInt32,
5554 argLen: 0,
5555 rematerializeable: true,
5556 asm: x86.AMOVL,
5557 reg: regInfo{
5558 outputs: []outputInfo{
5559 {0, 239},
5560 },
5561 },
5562 },
5563 {
5564 name: "CVTTSD2SL",
5565 argLen: 1,
5566 asm: x86.ACVTTSD2SL,
5567 reg: regInfo{
5568 inputs: []inputInfo{
5569 {0, 65280},
5570 },
5571 outputs: []outputInfo{
5572 {0, 239},
5573 },
5574 },
5575 },
5576 {
5577 name: "CVTTSS2SL",
5578 argLen: 1,
5579 asm: x86.ACVTTSS2SL,
5580 reg: regInfo{
5581 inputs: []inputInfo{
5582 {0, 65280},
5583 },
5584 outputs: []outputInfo{
5585 {0, 239},
5586 },
5587 },
5588 },
5589 {
5590 name: "CVTSL2SS",
5591 argLen: 1,
5592 asm: x86.ACVTSL2SS,
5593 reg: regInfo{
5594 inputs: []inputInfo{
5595 {0, 239},
5596 },
5597 outputs: []outputInfo{
5598 {0, 65280},
5599 },
5600 },
5601 },
5602 {
5603 name: "CVTSL2SD",
5604 argLen: 1,
5605 asm: x86.ACVTSL2SD,
5606 reg: regInfo{
5607 inputs: []inputInfo{
5608 {0, 239},
5609 },
5610 outputs: []outputInfo{
5611 {0, 65280},
5612 },
5613 },
5614 },
5615 {
5616 name: "CVTSD2SS",
5617 argLen: 1,
5618 asm: x86.ACVTSD2SS,
5619 reg: regInfo{
5620 inputs: []inputInfo{
5621 {0, 65280},
5622 },
5623 outputs: []outputInfo{
5624 {0, 65280},
5625 },
5626 },
5627 },
5628 {
5629 name: "CVTSS2SD",
5630 argLen: 1,
5631 asm: x86.ACVTSS2SD,
5632 reg: regInfo{
5633 inputs: []inputInfo{
5634 {0, 65280},
5635 },
5636 outputs: []outputInfo{
5637 {0, 65280},
5638 },
5639 },
5640 },
5641 {
5642 name: "PXOR",
5643 argLen: 2,
5644 commutative: true,
5645 resultInArg0: true,
5646 asm: x86.APXOR,
5647 reg: regInfo{
5648 inputs: []inputInfo{
5649 {0, 65280},
5650 {1, 65280},
5651 },
5652 outputs: []outputInfo{
5653 {0, 65280},
5654 },
5655 },
5656 },
5657 {
5658 name: "LEAL",
5659 auxType: auxSymOff,
5660 argLen: 1,
5661 rematerializeable: true,
5662 symEffect: SymAddr,
5663 reg: regInfo{
5664 inputs: []inputInfo{
5665 {0, 65791},
5666 },
5667 outputs: []outputInfo{
5668 {0, 239},
5669 },
5670 },
5671 },
5672 {
5673 name: "LEAL1",
5674 auxType: auxSymOff,
5675 argLen: 2,
5676 commutative: true,
5677 symEffect: SymAddr,
5678 reg: regInfo{
5679 inputs: []inputInfo{
5680 {1, 255},
5681 {0, 65791},
5682 },
5683 outputs: []outputInfo{
5684 {0, 239},
5685 },
5686 },
5687 },
5688 {
5689 name: "LEAL2",
5690 auxType: auxSymOff,
5691 argLen: 2,
5692 symEffect: SymAddr,
5693 reg: regInfo{
5694 inputs: []inputInfo{
5695 {1, 255},
5696 {0, 65791},
5697 },
5698 outputs: []outputInfo{
5699 {0, 239},
5700 },
5701 },
5702 },
5703 {
5704 name: "LEAL4",
5705 auxType: auxSymOff,
5706 argLen: 2,
5707 symEffect: SymAddr,
5708 reg: regInfo{
5709 inputs: []inputInfo{
5710 {1, 255},
5711 {0, 65791},
5712 },
5713 outputs: []outputInfo{
5714 {0, 239},
5715 },
5716 },
5717 },
5718 {
5719 name: "LEAL8",
5720 auxType: auxSymOff,
5721 argLen: 2,
5722 symEffect: SymAddr,
5723 reg: regInfo{
5724 inputs: []inputInfo{
5725 {1, 255},
5726 {0, 65791},
5727 },
5728 outputs: []outputInfo{
5729 {0, 239},
5730 },
5731 },
5732 },
5733 {
5734 name: "MOVBload",
5735 auxType: auxSymOff,
5736 argLen: 2,
5737 faultOnNilArg0: true,
5738 symEffect: SymRead,
5739 asm: x86.AMOVBLZX,
5740 reg: regInfo{
5741 inputs: []inputInfo{
5742 {0, 65791},
5743 },
5744 outputs: []outputInfo{
5745 {0, 239},
5746 },
5747 },
5748 },
5749 {
5750 name: "MOVBLSXload",
5751 auxType: auxSymOff,
5752 argLen: 2,
5753 faultOnNilArg0: true,
5754 symEffect: SymRead,
5755 asm: x86.AMOVBLSX,
5756 reg: regInfo{
5757 inputs: []inputInfo{
5758 {0, 65791},
5759 },
5760 outputs: []outputInfo{
5761 {0, 239},
5762 },
5763 },
5764 },
5765 {
5766 name: "MOVWload",
5767 auxType: auxSymOff,
5768 argLen: 2,
5769 faultOnNilArg0: true,
5770 symEffect: SymRead,
5771 asm: x86.AMOVWLZX,
5772 reg: regInfo{
5773 inputs: []inputInfo{
5774 {0, 65791},
5775 },
5776 outputs: []outputInfo{
5777 {0, 239},
5778 },
5779 },
5780 },
5781 {
5782 name: "MOVWLSXload",
5783 auxType: auxSymOff,
5784 argLen: 2,
5785 faultOnNilArg0: true,
5786 symEffect: SymRead,
5787 asm: x86.AMOVWLSX,
5788 reg: regInfo{
5789 inputs: []inputInfo{
5790 {0, 65791},
5791 },
5792 outputs: []outputInfo{
5793 {0, 239},
5794 },
5795 },
5796 },
5797 {
5798 name: "MOVLload",
5799 auxType: auxSymOff,
5800 argLen: 2,
5801 faultOnNilArg0: true,
5802 symEffect: SymRead,
5803 asm: x86.AMOVL,
5804 reg: regInfo{
5805 inputs: []inputInfo{
5806 {0, 65791},
5807 },
5808 outputs: []outputInfo{
5809 {0, 239},
5810 },
5811 },
5812 },
5813 {
5814 name: "MOVBstore",
5815 auxType: auxSymOff,
5816 argLen: 3,
5817 faultOnNilArg0: true,
5818 symEffect: SymWrite,
5819 asm: x86.AMOVB,
5820 reg: regInfo{
5821 inputs: []inputInfo{
5822 {1, 255},
5823 {0, 65791},
5824 },
5825 },
5826 },
5827 {
5828 name: "MOVWstore",
5829 auxType: auxSymOff,
5830 argLen: 3,
5831 faultOnNilArg0: true,
5832 symEffect: SymWrite,
5833 asm: x86.AMOVW,
5834 reg: regInfo{
5835 inputs: []inputInfo{
5836 {1, 255},
5837 {0, 65791},
5838 },
5839 },
5840 },
5841 {
5842 name: "MOVLstore",
5843 auxType: auxSymOff,
5844 argLen: 3,
5845 faultOnNilArg0: true,
5846 symEffect: SymWrite,
5847 asm: x86.AMOVL,
5848 reg: regInfo{
5849 inputs: []inputInfo{
5850 {1, 255},
5851 {0, 65791},
5852 },
5853 },
5854 },
5855 {
5856 name: "ADDLmodify",
5857 auxType: auxSymOff,
5858 argLen: 3,
5859 clobberFlags: true,
5860 faultOnNilArg0: true,
5861 symEffect: SymRead | SymWrite,
5862 asm: x86.AADDL,
5863 reg: regInfo{
5864 inputs: []inputInfo{
5865 {1, 255},
5866 {0, 65791},
5867 },
5868 },
5869 },
5870 {
5871 name: "SUBLmodify",
5872 auxType: auxSymOff,
5873 argLen: 3,
5874 clobberFlags: true,
5875 faultOnNilArg0: true,
5876 symEffect: SymRead | SymWrite,
5877 asm: x86.ASUBL,
5878 reg: regInfo{
5879 inputs: []inputInfo{
5880 {1, 255},
5881 {0, 65791},
5882 },
5883 },
5884 },
5885 {
5886 name: "ANDLmodify",
5887 auxType: auxSymOff,
5888 argLen: 3,
5889 clobberFlags: true,
5890 faultOnNilArg0: true,
5891 symEffect: SymRead | SymWrite,
5892 asm: x86.AANDL,
5893 reg: regInfo{
5894 inputs: []inputInfo{
5895 {1, 255},
5896 {0, 65791},
5897 },
5898 },
5899 },
5900 {
5901 name: "ORLmodify",
5902 auxType: auxSymOff,
5903 argLen: 3,
5904 clobberFlags: true,
5905 faultOnNilArg0: true,
5906 symEffect: SymRead | SymWrite,
5907 asm: x86.AORL,
5908 reg: regInfo{
5909 inputs: []inputInfo{
5910 {1, 255},
5911 {0, 65791},
5912 },
5913 },
5914 },
5915 {
5916 name: "XORLmodify",
5917 auxType: auxSymOff,
5918 argLen: 3,
5919 clobberFlags: true,
5920 faultOnNilArg0: true,
5921 symEffect: SymRead | SymWrite,
5922 asm: x86.AXORL,
5923 reg: regInfo{
5924 inputs: []inputInfo{
5925 {1, 255},
5926 {0, 65791},
5927 },
5928 },
5929 },
5930 {
5931 name: "ADDLmodifyidx4",
5932 auxType: auxSymOff,
5933 argLen: 4,
5934 clobberFlags: true,
5935 symEffect: SymRead | SymWrite,
5936 asm: x86.AADDL,
5937 reg: regInfo{
5938 inputs: []inputInfo{
5939 {1, 255},
5940 {2, 255},
5941 {0, 65791},
5942 },
5943 },
5944 },
5945 {
5946 name: "SUBLmodifyidx4",
5947 auxType: auxSymOff,
5948 argLen: 4,
5949 clobberFlags: true,
5950 symEffect: SymRead | SymWrite,
5951 asm: x86.ASUBL,
5952 reg: regInfo{
5953 inputs: []inputInfo{
5954 {1, 255},
5955 {2, 255},
5956 {0, 65791},
5957 },
5958 },
5959 },
5960 {
5961 name: "ANDLmodifyidx4",
5962 auxType: auxSymOff,
5963 argLen: 4,
5964 clobberFlags: true,
5965 symEffect: SymRead | SymWrite,
5966 asm: x86.AANDL,
5967 reg: regInfo{
5968 inputs: []inputInfo{
5969 {1, 255},
5970 {2, 255},
5971 {0, 65791},
5972 },
5973 },
5974 },
5975 {
5976 name: "ORLmodifyidx4",
5977 auxType: auxSymOff,
5978 argLen: 4,
5979 clobberFlags: true,
5980 symEffect: SymRead | SymWrite,
5981 asm: x86.AORL,
5982 reg: regInfo{
5983 inputs: []inputInfo{
5984 {1, 255},
5985 {2, 255},
5986 {0, 65791},
5987 },
5988 },
5989 },
5990 {
5991 name: "XORLmodifyidx4",
5992 auxType: auxSymOff,
5993 argLen: 4,
5994 clobberFlags: true,
5995 symEffect: SymRead | SymWrite,
5996 asm: x86.AXORL,
5997 reg: regInfo{
5998 inputs: []inputInfo{
5999 {1, 255},
6000 {2, 255},
6001 {0, 65791},
6002 },
6003 },
6004 },
6005 {
6006 name: "ADDLconstmodify",
6007 auxType: auxSymValAndOff,
6008 argLen: 2,
6009 clobberFlags: true,
6010 faultOnNilArg0: true,
6011 symEffect: SymRead | SymWrite,
6012 asm: x86.AADDL,
6013 reg: regInfo{
6014 inputs: []inputInfo{
6015 {0, 65791},
6016 },
6017 },
6018 },
6019 {
6020 name: "ANDLconstmodify",
6021 auxType: auxSymValAndOff,
6022 argLen: 2,
6023 clobberFlags: true,
6024 faultOnNilArg0: true,
6025 symEffect: SymRead | SymWrite,
6026 asm: x86.AANDL,
6027 reg: regInfo{
6028 inputs: []inputInfo{
6029 {0, 65791},
6030 },
6031 },
6032 },
6033 {
6034 name: "ORLconstmodify",
6035 auxType: auxSymValAndOff,
6036 argLen: 2,
6037 clobberFlags: true,
6038 faultOnNilArg0: true,
6039 symEffect: SymRead | SymWrite,
6040 asm: x86.AORL,
6041 reg: regInfo{
6042 inputs: []inputInfo{
6043 {0, 65791},
6044 },
6045 },
6046 },
6047 {
6048 name: "XORLconstmodify",
6049 auxType: auxSymValAndOff,
6050 argLen: 2,
6051 clobberFlags: true,
6052 faultOnNilArg0: true,
6053 symEffect: SymRead | SymWrite,
6054 asm: x86.AXORL,
6055 reg: regInfo{
6056 inputs: []inputInfo{
6057 {0, 65791},
6058 },
6059 },
6060 },
6061 {
6062 name: "ADDLconstmodifyidx4",
6063 auxType: auxSymValAndOff,
6064 argLen: 3,
6065 clobberFlags: true,
6066 symEffect: SymRead | SymWrite,
6067 asm: x86.AADDL,
6068 reg: regInfo{
6069 inputs: []inputInfo{
6070 {1, 255},
6071 {0, 65791},
6072 },
6073 },
6074 },
6075 {
6076 name: "ANDLconstmodifyidx4",
6077 auxType: auxSymValAndOff,
6078 argLen: 3,
6079 clobberFlags: true,
6080 symEffect: SymRead | SymWrite,
6081 asm: x86.AANDL,
6082 reg: regInfo{
6083 inputs: []inputInfo{
6084 {1, 255},
6085 {0, 65791},
6086 },
6087 },
6088 },
6089 {
6090 name: "ORLconstmodifyidx4",
6091 auxType: auxSymValAndOff,
6092 argLen: 3,
6093 clobberFlags: true,
6094 symEffect: SymRead | SymWrite,
6095 asm: x86.AORL,
6096 reg: regInfo{
6097 inputs: []inputInfo{
6098 {1, 255},
6099 {0, 65791},
6100 },
6101 },
6102 },
6103 {
6104 name: "XORLconstmodifyidx4",
6105 auxType: auxSymValAndOff,
6106 argLen: 3,
6107 clobberFlags: true,
6108 symEffect: SymRead | SymWrite,
6109 asm: x86.AXORL,
6110 reg: regInfo{
6111 inputs: []inputInfo{
6112 {1, 255},
6113 {0, 65791},
6114 },
6115 },
6116 },
6117 {
6118 name: "MOVBloadidx1",
6119 auxType: auxSymOff,
6120 argLen: 3,
6121 commutative: true,
6122 symEffect: SymRead,
6123 asm: x86.AMOVBLZX,
6124 reg: regInfo{
6125 inputs: []inputInfo{
6126 {1, 255},
6127 {0, 65791},
6128 },
6129 outputs: []outputInfo{
6130 {0, 239},
6131 },
6132 },
6133 },
6134 {
6135 name: "MOVWloadidx1",
6136 auxType: auxSymOff,
6137 argLen: 3,
6138 commutative: true,
6139 symEffect: SymRead,
6140 asm: x86.AMOVWLZX,
6141 reg: regInfo{
6142 inputs: []inputInfo{
6143 {1, 255},
6144 {0, 65791},
6145 },
6146 outputs: []outputInfo{
6147 {0, 239},
6148 },
6149 },
6150 },
6151 {
6152 name: "MOVWloadidx2",
6153 auxType: auxSymOff,
6154 argLen: 3,
6155 symEffect: SymRead,
6156 asm: x86.AMOVWLZX,
6157 reg: regInfo{
6158 inputs: []inputInfo{
6159 {1, 255},
6160 {0, 65791},
6161 },
6162 outputs: []outputInfo{
6163 {0, 239},
6164 },
6165 },
6166 },
6167 {
6168 name: "MOVLloadidx1",
6169 auxType: auxSymOff,
6170 argLen: 3,
6171 commutative: true,
6172 symEffect: SymRead,
6173 asm: x86.AMOVL,
6174 reg: regInfo{
6175 inputs: []inputInfo{
6176 {1, 255},
6177 {0, 65791},
6178 },
6179 outputs: []outputInfo{
6180 {0, 239},
6181 },
6182 },
6183 },
6184 {
6185 name: "MOVLloadidx4",
6186 auxType: auxSymOff,
6187 argLen: 3,
6188 symEffect: SymRead,
6189 asm: x86.AMOVL,
6190 reg: regInfo{
6191 inputs: []inputInfo{
6192 {1, 255},
6193 {0, 65791},
6194 },
6195 outputs: []outputInfo{
6196 {0, 239},
6197 },
6198 },
6199 },
6200 {
6201 name: "MOVBstoreidx1",
6202 auxType: auxSymOff,
6203 argLen: 4,
6204 commutative: true,
6205 symEffect: SymWrite,
6206 asm: x86.AMOVB,
6207 reg: regInfo{
6208 inputs: []inputInfo{
6209 {1, 255},
6210 {2, 255},
6211 {0, 65791},
6212 },
6213 },
6214 },
6215 {
6216 name: "MOVWstoreidx1",
6217 auxType: auxSymOff,
6218 argLen: 4,
6219 commutative: true,
6220 symEffect: SymWrite,
6221 asm: x86.AMOVW,
6222 reg: regInfo{
6223 inputs: []inputInfo{
6224 {1, 255},
6225 {2, 255},
6226 {0, 65791},
6227 },
6228 },
6229 },
6230 {
6231 name: "MOVWstoreidx2",
6232 auxType: auxSymOff,
6233 argLen: 4,
6234 symEffect: SymWrite,
6235 asm: x86.AMOVW,
6236 reg: regInfo{
6237 inputs: []inputInfo{
6238 {1, 255},
6239 {2, 255},
6240 {0, 65791},
6241 },
6242 },
6243 },
6244 {
6245 name: "MOVLstoreidx1",
6246 auxType: auxSymOff,
6247 argLen: 4,
6248 commutative: true,
6249 symEffect: SymWrite,
6250 asm: x86.AMOVL,
6251 reg: regInfo{
6252 inputs: []inputInfo{
6253 {1, 255},
6254 {2, 255},
6255 {0, 65791},
6256 },
6257 },
6258 },
6259 {
6260 name: "MOVLstoreidx4",
6261 auxType: auxSymOff,
6262 argLen: 4,
6263 symEffect: SymWrite,
6264 asm: x86.AMOVL,
6265 reg: regInfo{
6266 inputs: []inputInfo{
6267 {1, 255},
6268 {2, 255},
6269 {0, 65791},
6270 },
6271 },
6272 },
6273 {
6274 name: "MOVBstoreconst",
6275 auxType: auxSymValAndOff,
6276 argLen: 2,
6277 faultOnNilArg0: true,
6278 symEffect: SymWrite,
6279 asm: x86.AMOVB,
6280 reg: regInfo{
6281 inputs: []inputInfo{
6282 {0, 65791},
6283 },
6284 },
6285 },
6286 {
6287 name: "MOVWstoreconst",
6288 auxType: auxSymValAndOff,
6289 argLen: 2,
6290 faultOnNilArg0: true,
6291 symEffect: SymWrite,
6292 asm: x86.AMOVW,
6293 reg: regInfo{
6294 inputs: []inputInfo{
6295 {0, 65791},
6296 },
6297 },
6298 },
6299 {
6300 name: "MOVLstoreconst",
6301 auxType: auxSymValAndOff,
6302 argLen: 2,
6303 faultOnNilArg0: true,
6304 symEffect: SymWrite,
6305 asm: x86.AMOVL,
6306 reg: regInfo{
6307 inputs: []inputInfo{
6308 {0, 65791},
6309 },
6310 },
6311 },
6312 {
6313 name: "MOVBstoreconstidx1",
6314 auxType: auxSymValAndOff,
6315 argLen: 3,
6316 symEffect: SymWrite,
6317 asm: x86.AMOVB,
6318 reg: regInfo{
6319 inputs: []inputInfo{
6320 {1, 255},
6321 {0, 65791},
6322 },
6323 },
6324 },
6325 {
6326 name: "MOVWstoreconstidx1",
6327 auxType: auxSymValAndOff,
6328 argLen: 3,
6329 symEffect: SymWrite,
6330 asm: x86.AMOVW,
6331 reg: regInfo{
6332 inputs: []inputInfo{
6333 {1, 255},
6334 {0, 65791},
6335 },
6336 },
6337 },
6338 {
6339 name: "MOVWstoreconstidx2",
6340 auxType: auxSymValAndOff,
6341 argLen: 3,
6342 symEffect: SymWrite,
6343 asm: x86.AMOVW,
6344 reg: regInfo{
6345 inputs: []inputInfo{
6346 {1, 255},
6347 {0, 65791},
6348 },
6349 },
6350 },
6351 {
6352 name: "MOVLstoreconstidx1",
6353 auxType: auxSymValAndOff,
6354 argLen: 3,
6355 symEffect: SymWrite,
6356 asm: x86.AMOVL,
6357 reg: regInfo{
6358 inputs: []inputInfo{
6359 {1, 255},
6360 {0, 65791},
6361 },
6362 },
6363 },
6364 {
6365 name: "MOVLstoreconstidx4",
6366 auxType: auxSymValAndOff,
6367 argLen: 3,
6368 symEffect: SymWrite,
6369 asm: x86.AMOVL,
6370 reg: regInfo{
6371 inputs: []inputInfo{
6372 {1, 255},
6373 {0, 65791},
6374 },
6375 },
6376 },
6377 {
6378 name: "DUFFZERO",
6379 auxType: auxInt64,
6380 argLen: 3,
6381 faultOnNilArg0: true,
6382 reg: regInfo{
6383 inputs: []inputInfo{
6384 {0, 128},
6385 {1, 1},
6386 },
6387 clobbers: 130,
6388 },
6389 },
6390 {
6391 name: "REPSTOSL",
6392 argLen: 4,
6393 faultOnNilArg0: true,
6394 reg: regInfo{
6395 inputs: []inputInfo{
6396 {0, 128},
6397 {1, 2},
6398 {2, 1},
6399 },
6400 clobbers: 130,
6401 },
6402 },
6403 {
6404 name: "CALLstatic",
6405 auxType: auxCallOff,
6406 argLen: 1,
6407 clobberFlags: true,
6408 call: true,
6409 reg: regInfo{
6410 clobbers: 65519,
6411 },
6412 },
6413 {
6414 name: "CALLtail",
6415 auxType: auxCallOff,
6416 argLen: 1,
6417 clobberFlags: true,
6418 call: true,
6419 tailCall: true,
6420 reg: regInfo{
6421 clobbers: 65519,
6422 },
6423 },
6424 {
6425 name: "CALLclosure",
6426 auxType: auxCallOff,
6427 argLen: 3,
6428 clobberFlags: true,
6429 call: true,
6430 reg: regInfo{
6431 inputs: []inputInfo{
6432 {1, 4},
6433 {0, 255},
6434 },
6435 clobbers: 65519,
6436 },
6437 },
6438 {
6439 name: "CALLinter",
6440 auxType: auxCallOff,
6441 argLen: 2,
6442 clobberFlags: true,
6443 call: true,
6444 reg: regInfo{
6445 inputs: []inputInfo{
6446 {0, 239},
6447 },
6448 clobbers: 65519,
6449 },
6450 },
6451 {
6452 name: "DUFFCOPY",
6453 auxType: auxInt64,
6454 argLen: 3,
6455 clobberFlags: true,
6456 faultOnNilArg0: true,
6457 faultOnNilArg1: true,
6458 reg: regInfo{
6459 inputs: []inputInfo{
6460 {0, 128},
6461 {1, 64},
6462 },
6463 clobbers: 194,
6464 },
6465 },
6466 {
6467 name: "REPMOVSL",
6468 argLen: 4,
6469 faultOnNilArg0: true,
6470 faultOnNilArg1: true,
6471 reg: regInfo{
6472 inputs: []inputInfo{
6473 {0, 128},
6474 {1, 64},
6475 {2, 2},
6476 },
6477 clobbers: 194,
6478 },
6479 },
6480 {
6481 name: "InvertFlags",
6482 argLen: 1,
6483 reg: regInfo{},
6484 },
6485 {
6486 name: "LoweredGetG",
6487 argLen: 1,
6488 reg: regInfo{
6489 outputs: []outputInfo{
6490 {0, 239},
6491 },
6492 },
6493 },
6494 {
6495 name: "LoweredGetClosurePtr",
6496 argLen: 0,
6497 zeroWidth: true,
6498 reg: regInfo{
6499 outputs: []outputInfo{
6500 {0, 4},
6501 },
6502 },
6503 },
6504 {
6505 name: "LoweredGetCallerPC",
6506 argLen: 0,
6507 rematerializeable: true,
6508 reg: regInfo{
6509 outputs: []outputInfo{
6510 {0, 239},
6511 },
6512 },
6513 },
6514 {
6515 name: "LoweredGetCallerSP",
6516 argLen: 1,
6517 rematerializeable: true,
6518 reg: regInfo{
6519 outputs: []outputInfo{
6520 {0, 239},
6521 },
6522 },
6523 },
6524 {
6525 name: "LoweredNilCheck",
6526 argLen: 2,
6527 clobberFlags: true,
6528 nilCheck: true,
6529 faultOnNilArg0: true,
6530 reg: regInfo{
6531 inputs: []inputInfo{
6532 {0, 255},
6533 },
6534 },
6535 },
6536 {
6537 name: "LoweredWB",
6538 auxType: auxInt64,
6539 argLen: 1,
6540 clobberFlags: true,
6541 reg: regInfo{
6542 clobbers: 65280,
6543 outputs: []outputInfo{
6544 {0, 128},
6545 },
6546 },
6547 },
6548 {
6549 name: "LoweredPanicBoundsA",
6550 auxType: auxInt64,
6551 argLen: 3,
6552 call: true,
6553 reg: regInfo{
6554 inputs: []inputInfo{
6555 {0, 4},
6556 {1, 8},
6557 },
6558 },
6559 },
6560 {
6561 name: "LoweredPanicBoundsB",
6562 auxType: auxInt64,
6563 argLen: 3,
6564 call: true,
6565 reg: regInfo{
6566 inputs: []inputInfo{
6567 {0, 2},
6568 {1, 4},
6569 },
6570 },
6571 },
6572 {
6573 name: "LoweredPanicBoundsC",
6574 auxType: auxInt64,
6575 argLen: 3,
6576 call: true,
6577 reg: regInfo{
6578 inputs: []inputInfo{
6579 {0, 1},
6580 {1, 2},
6581 },
6582 },
6583 },
6584 {
6585 name: "LoweredPanicExtendA",
6586 auxType: auxInt64,
6587 argLen: 4,
6588 call: true,
6589 reg: regInfo{
6590 inputs: []inputInfo{
6591 {0, 64},
6592 {1, 4},
6593 {2, 8},
6594 },
6595 },
6596 },
6597 {
6598 name: "LoweredPanicExtendB",
6599 auxType: auxInt64,
6600 argLen: 4,
6601 call: true,
6602 reg: regInfo{
6603 inputs: []inputInfo{
6604 {0, 64},
6605 {1, 2},
6606 {2, 4},
6607 },
6608 },
6609 },
6610 {
6611 name: "LoweredPanicExtendC",
6612 auxType: auxInt64,
6613 argLen: 4,
6614 call: true,
6615 reg: regInfo{
6616 inputs: []inputInfo{
6617 {0, 64},
6618 {1, 1},
6619 {2, 2},
6620 },
6621 },
6622 },
6623 {
6624 name: "FlagEQ",
6625 argLen: 0,
6626 reg: regInfo{},
6627 },
6628 {
6629 name: "FlagLT_ULT",
6630 argLen: 0,
6631 reg: regInfo{},
6632 },
6633 {
6634 name: "FlagLT_UGT",
6635 argLen: 0,
6636 reg: regInfo{},
6637 },
6638 {
6639 name: "FlagGT_UGT",
6640 argLen: 0,
6641 reg: regInfo{},
6642 },
6643 {
6644 name: "FlagGT_ULT",
6645 argLen: 0,
6646 reg: regInfo{},
6647 },
6648 {
6649 name: "MOVSSconst1",
6650 auxType: auxFloat32,
6651 argLen: 0,
6652 reg: regInfo{
6653 outputs: []outputInfo{
6654 {0, 239},
6655 },
6656 },
6657 },
6658 {
6659 name: "MOVSDconst1",
6660 auxType: auxFloat64,
6661 argLen: 0,
6662 reg: regInfo{
6663 outputs: []outputInfo{
6664 {0, 239},
6665 },
6666 },
6667 },
6668 {
6669 name: "MOVSSconst2",
6670 argLen: 1,
6671 asm: x86.AMOVSS,
6672 reg: regInfo{
6673 inputs: []inputInfo{
6674 {0, 239},
6675 },
6676 outputs: []outputInfo{
6677 {0, 65280},
6678 },
6679 },
6680 },
6681 {
6682 name: "MOVSDconst2",
6683 argLen: 1,
6684 asm: x86.AMOVSD,
6685 reg: regInfo{
6686 inputs: []inputInfo{
6687 {0, 239},
6688 },
6689 outputs: []outputInfo{
6690 {0, 65280},
6691 },
6692 },
6693 },
6694
6695 {
6696 name: "ADDSS",
6697 argLen: 2,
6698 commutative: true,
6699 resultInArg0: true,
6700 asm: x86.AADDSS,
6701 reg: regInfo{
6702 inputs: []inputInfo{
6703 {0, 2147418112},
6704 {1, 2147418112},
6705 },
6706 outputs: []outputInfo{
6707 {0, 2147418112},
6708 },
6709 },
6710 },
6711 {
6712 name: "ADDSD",
6713 argLen: 2,
6714 commutative: true,
6715 resultInArg0: true,
6716 asm: x86.AADDSD,
6717 reg: regInfo{
6718 inputs: []inputInfo{
6719 {0, 2147418112},
6720 {1, 2147418112},
6721 },
6722 outputs: []outputInfo{
6723 {0, 2147418112},
6724 },
6725 },
6726 },
6727 {
6728 name: "SUBSS",
6729 argLen: 2,
6730 resultInArg0: true,
6731 asm: x86.ASUBSS,
6732 reg: regInfo{
6733 inputs: []inputInfo{
6734 {0, 2147418112},
6735 {1, 2147418112},
6736 },
6737 outputs: []outputInfo{
6738 {0, 2147418112},
6739 },
6740 },
6741 },
6742 {
6743 name: "SUBSD",
6744 argLen: 2,
6745 resultInArg0: true,
6746 asm: x86.ASUBSD,
6747 reg: regInfo{
6748 inputs: []inputInfo{
6749 {0, 2147418112},
6750 {1, 2147418112},
6751 },
6752 outputs: []outputInfo{
6753 {0, 2147418112},
6754 },
6755 },
6756 },
6757 {
6758 name: "MULSS",
6759 argLen: 2,
6760 commutative: true,
6761 resultInArg0: true,
6762 asm: x86.AMULSS,
6763 reg: regInfo{
6764 inputs: []inputInfo{
6765 {0, 2147418112},
6766 {1, 2147418112},
6767 },
6768 outputs: []outputInfo{
6769 {0, 2147418112},
6770 },
6771 },
6772 },
6773 {
6774 name: "MULSD",
6775 argLen: 2,
6776 commutative: true,
6777 resultInArg0: true,
6778 asm: x86.AMULSD,
6779 reg: regInfo{
6780 inputs: []inputInfo{
6781 {0, 2147418112},
6782 {1, 2147418112},
6783 },
6784 outputs: []outputInfo{
6785 {0, 2147418112},
6786 },
6787 },
6788 },
6789 {
6790 name: "DIVSS",
6791 argLen: 2,
6792 resultInArg0: true,
6793 asm: x86.ADIVSS,
6794 reg: regInfo{
6795 inputs: []inputInfo{
6796 {0, 2147418112},
6797 {1, 2147418112},
6798 },
6799 outputs: []outputInfo{
6800 {0, 2147418112},
6801 },
6802 },
6803 },
6804 {
6805 name: "DIVSD",
6806 argLen: 2,
6807 resultInArg0: true,
6808 asm: x86.ADIVSD,
6809 reg: regInfo{
6810 inputs: []inputInfo{
6811 {0, 2147418112},
6812 {1, 2147418112},
6813 },
6814 outputs: []outputInfo{
6815 {0, 2147418112},
6816 },
6817 },
6818 },
6819 {
6820 name: "MOVSSload",
6821 auxType: auxSymOff,
6822 argLen: 2,
6823 faultOnNilArg0: true,
6824 symEffect: SymRead,
6825 asm: x86.AMOVSS,
6826 reg: regInfo{
6827 inputs: []inputInfo{
6828 {0, 4295016447},
6829 },
6830 outputs: []outputInfo{
6831 {0, 2147418112},
6832 },
6833 },
6834 },
6835 {
6836 name: "MOVSDload",
6837 auxType: auxSymOff,
6838 argLen: 2,
6839 faultOnNilArg0: true,
6840 symEffect: SymRead,
6841 asm: x86.AMOVSD,
6842 reg: regInfo{
6843 inputs: []inputInfo{
6844 {0, 4295016447},
6845 },
6846 outputs: []outputInfo{
6847 {0, 2147418112},
6848 },
6849 },
6850 },
6851 {
6852 name: "MOVSSconst",
6853 auxType: auxFloat32,
6854 argLen: 0,
6855 rematerializeable: true,
6856 asm: x86.AMOVSS,
6857 reg: regInfo{
6858 outputs: []outputInfo{
6859 {0, 2147418112},
6860 },
6861 },
6862 },
6863 {
6864 name: "MOVSDconst",
6865 auxType: auxFloat64,
6866 argLen: 0,
6867 rematerializeable: true,
6868 asm: x86.AMOVSD,
6869 reg: regInfo{
6870 outputs: []outputInfo{
6871 {0, 2147418112},
6872 },
6873 },
6874 },
6875 {
6876 name: "MOVSSloadidx1",
6877 auxType: auxSymOff,
6878 argLen: 3,
6879 symEffect: SymRead,
6880 asm: x86.AMOVSS,
6881 scale: 1,
6882 reg: regInfo{
6883 inputs: []inputInfo{
6884 {1, 49151},
6885 {0, 4295016447},
6886 },
6887 outputs: []outputInfo{
6888 {0, 2147418112},
6889 },
6890 },
6891 },
6892 {
6893 name: "MOVSSloadidx4",
6894 auxType: auxSymOff,
6895 argLen: 3,
6896 symEffect: SymRead,
6897 asm: x86.AMOVSS,
6898 scale: 4,
6899 reg: regInfo{
6900 inputs: []inputInfo{
6901 {1, 49151},
6902 {0, 4295016447},
6903 },
6904 outputs: []outputInfo{
6905 {0, 2147418112},
6906 },
6907 },
6908 },
6909 {
6910 name: "MOVSDloadidx1",
6911 auxType: auxSymOff,
6912 argLen: 3,
6913 symEffect: SymRead,
6914 asm: x86.AMOVSD,
6915 scale: 1,
6916 reg: regInfo{
6917 inputs: []inputInfo{
6918 {1, 49151},
6919 {0, 4295016447},
6920 },
6921 outputs: []outputInfo{
6922 {0, 2147418112},
6923 },
6924 },
6925 },
6926 {
6927 name: "MOVSDloadidx8",
6928 auxType: auxSymOff,
6929 argLen: 3,
6930 symEffect: SymRead,
6931 asm: x86.AMOVSD,
6932 scale: 8,
6933 reg: regInfo{
6934 inputs: []inputInfo{
6935 {1, 49151},
6936 {0, 4295016447},
6937 },
6938 outputs: []outputInfo{
6939 {0, 2147418112},
6940 },
6941 },
6942 },
6943 {
6944 name: "MOVSSstore",
6945 auxType: auxSymOff,
6946 argLen: 3,
6947 faultOnNilArg0: true,
6948 symEffect: SymWrite,
6949 asm: x86.AMOVSS,
6950 reg: regInfo{
6951 inputs: []inputInfo{
6952 {1, 2147418112},
6953 {0, 4295016447},
6954 },
6955 },
6956 },
6957 {
6958 name: "MOVSDstore",
6959 auxType: auxSymOff,
6960 argLen: 3,
6961 faultOnNilArg0: true,
6962 symEffect: SymWrite,
6963 asm: x86.AMOVSD,
6964 reg: regInfo{
6965 inputs: []inputInfo{
6966 {1, 2147418112},
6967 {0, 4295016447},
6968 },
6969 },
6970 },
6971 {
6972 name: "MOVSSstoreidx1",
6973 auxType: auxSymOff,
6974 argLen: 4,
6975 symEffect: SymWrite,
6976 asm: x86.AMOVSS,
6977 scale: 1,
6978 reg: regInfo{
6979 inputs: []inputInfo{
6980 {1, 49151},
6981 {2, 2147418112},
6982 {0, 4295016447},
6983 },
6984 },
6985 },
6986 {
6987 name: "MOVSSstoreidx4",
6988 auxType: auxSymOff,
6989 argLen: 4,
6990 symEffect: SymWrite,
6991 asm: x86.AMOVSS,
6992 scale: 4,
6993 reg: regInfo{
6994 inputs: []inputInfo{
6995 {1, 49151},
6996 {2, 2147418112},
6997 {0, 4295016447},
6998 },
6999 },
7000 },
7001 {
7002 name: "MOVSDstoreidx1",
7003 auxType: auxSymOff,
7004 argLen: 4,
7005 symEffect: SymWrite,
7006 asm: x86.AMOVSD,
7007 scale: 1,
7008 reg: regInfo{
7009 inputs: []inputInfo{
7010 {1, 49151},
7011 {2, 2147418112},
7012 {0, 4295016447},
7013 },
7014 },
7015 },
7016 {
7017 name: "MOVSDstoreidx8",
7018 auxType: auxSymOff,
7019 argLen: 4,
7020 symEffect: SymWrite,
7021 asm: x86.AMOVSD,
7022 scale: 8,
7023 reg: regInfo{
7024 inputs: []inputInfo{
7025 {1, 49151},
7026 {2, 2147418112},
7027 {0, 4295016447},
7028 },
7029 },
7030 },
7031 {
7032 name: "ADDSSload",
7033 auxType: auxSymOff,
7034 argLen: 3,
7035 resultInArg0: true,
7036 faultOnNilArg1: true,
7037 symEffect: SymRead,
7038 asm: x86.AADDSS,
7039 reg: regInfo{
7040 inputs: []inputInfo{
7041 {0, 2147418112},
7042 {1, 4295032831},
7043 },
7044 outputs: []outputInfo{
7045 {0, 2147418112},
7046 },
7047 },
7048 },
7049 {
7050 name: "ADDSDload",
7051 auxType: auxSymOff,
7052 argLen: 3,
7053 resultInArg0: true,
7054 faultOnNilArg1: true,
7055 symEffect: SymRead,
7056 asm: x86.AADDSD,
7057 reg: regInfo{
7058 inputs: []inputInfo{
7059 {0, 2147418112},
7060 {1, 4295032831},
7061 },
7062 outputs: []outputInfo{
7063 {0, 2147418112},
7064 },
7065 },
7066 },
7067 {
7068 name: "SUBSSload",
7069 auxType: auxSymOff,
7070 argLen: 3,
7071 resultInArg0: true,
7072 faultOnNilArg1: true,
7073 symEffect: SymRead,
7074 asm: x86.ASUBSS,
7075 reg: regInfo{
7076 inputs: []inputInfo{
7077 {0, 2147418112},
7078 {1, 4295032831},
7079 },
7080 outputs: []outputInfo{
7081 {0, 2147418112},
7082 },
7083 },
7084 },
7085 {
7086 name: "SUBSDload",
7087 auxType: auxSymOff,
7088 argLen: 3,
7089 resultInArg0: true,
7090 faultOnNilArg1: true,
7091 symEffect: SymRead,
7092 asm: x86.ASUBSD,
7093 reg: regInfo{
7094 inputs: []inputInfo{
7095 {0, 2147418112},
7096 {1, 4295032831},
7097 },
7098 outputs: []outputInfo{
7099 {0, 2147418112},
7100 },
7101 },
7102 },
7103 {
7104 name: "MULSSload",
7105 auxType: auxSymOff,
7106 argLen: 3,
7107 resultInArg0: true,
7108 faultOnNilArg1: true,
7109 symEffect: SymRead,
7110 asm: x86.AMULSS,
7111 reg: regInfo{
7112 inputs: []inputInfo{
7113 {0, 2147418112},
7114 {1, 4295032831},
7115 },
7116 outputs: []outputInfo{
7117 {0, 2147418112},
7118 },
7119 },
7120 },
7121 {
7122 name: "MULSDload",
7123 auxType: auxSymOff,
7124 argLen: 3,
7125 resultInArg0: true,
7126 faultOnNilArg1: true,
7127 symEffect: SymRead,
7128 asm: x86.AMULSD,
7129 reg: regInfo{
7130 inputs: []inputInfo{
7131 {0, 2147418112},
7132 {1, 4295032831},
7133 },
7134 outputs: []outputInfo{
7135 {0, 2147418112},
7136 },
7137 },
7138 },
7139 {
7140 name: "DIVSSload",
7141 auxType: auxSymOff,
7142 argLen: 3,
7143 resultInArg0: true,
7144 faultOnNilArg1: true,
7145 symEffect: SymRead,
7146 asm: x86.ADIVSS,
7147 reg: regInfo{
7148 inputs: []inputInfo{
7149 {0, 2147418112},
7150 {1, 4295032831},
7151 },
7152 outputs: []outputInfo{
7153 {0, 2147418112},
7154 },
7155 },
7156 },
7157 {
7158 name: "DIVSDload",
7159 auxType: auxSymOff,
7160 argLen: 3,
7161 resultInArg0: true,
7162 faultOnNilArg1: true,
7163 symEffect: SymRead,
7164 asm: x86.ADIVSD,
7165 reg: regInfo{
7166 inputs: []inputInfo{
7167 {0, 2147418112},
7168 {1, 4295032831},
7169 },
7170 outputs: []outputInfo{
7171 {0, 2147418112},
7172 },
7173 },
7174 },
7175 {
7176 name: "ADDSSloadidx1",
7177 auxType: auxSymOff,
7178 argLen: 4,
7179 resultInArg0: true,
7180 symEffect: SymRead,
7181 asm: x86.AADDSS,
7182 scale: 1,
7183 reg: regInfo{
7184 inputs: []inputInfo{
7185 {0, 2147418112},
7186 {2, 4295016447},
7187 {1, 4295032831},
7188 },
7189 outputs: []outputInfo{
7190 {0, 2147418112},
7191 },
7192 },
7193 },
7194 {
7195 name: "ADDSSloadidx4",
7196 auxType: auxSymOff,
7197 argLen: 4,
7198 resultInArg0: true,
7199 symEffect: SymRead,
7200 asm: x86.AADDSS,
7201 scale: 4,
7202 reg: regInfo{
7203 inputs: []inputInfo{
7204 {0, 2147418112},
7205 {2, 4295016447},
7206 {1, 4295032831},
7207 },
7208 outputs: []outputInfo{
7209 {0, 2147418112},
7210 },
7211 },
7212 },
7213 {
7214 name: "ADDSDloadidx1",
7215 auxType: auxSymOff,
7216 argLen: 4,
7217 resultInArg0: true,
7218 symEffect: SymRead,
7219 asm: x86.AADDSD,
7220 scale: 1,
7221 reg: regInfo{
7222 inputs: []inputInfo{
7223 {0, 2147418112},
7224 {2, 4295016447},
7225 {1, 4295032831},
7226 },
7227 outputs: []outputInfo{
7228 {0, 2147418112},
7229 },
7230 },
7231 },
7232 {
7233 name: "ADDSDloadidx8",
7234 auxType: auxSymOff,
7235 argLen: 4,
7236 resultInArg0: true,
7237 symEffect: SymRead,
7238 asm: x86.AADDSD,
7239 scale: 8,
7240 reg: regInfo{
7241 inputs: []inputInfo{
7242 {0, 2147418112},
7243 {2, 4295016447},
7244 {1, 4295032831},
7245 },
7246 outputs: []outputInfo{
7247 {0, 2147418112},
7248 },
7249 },
7250 },
7251 {
7252 name: "SUBSSloadidx1",
7253 auxType: auxSymOff,
7254 argLen: 4,
7255 resultInArg0: true,
7256 symEffect: SymRead,
7257 asm: x86.ASUBSS,
7258 scale: 1,
7259 reg: regInfo{
7260 inputs: []inputInfo{
7261 {0, 2147418112},
7262 {2, 4295016447},
7263 {1, 4295032831},
7264 },
7265 outputs: []outputInfo{
7266 {0, 2147418112},
7267 },
7268 },
7269 },
7270 {
7271 name: "SUBSSloadidx4",
7272 auxType: auxSymOff,
7273 argLen: 4,
7274 resultInArg0: true,
7275 symEffect: SymRead,
7276 asm: x86.ASUBSS,
7277 scale: 4,
7278 reg: regInfo{
7279 inputs: []inputInfo{
7280 {0, 2147418112},
7281 {2, 4295016447},
7282 {1, 4295032831},
7283 },
7284 outputs: []outputInfo{
7285 {0, 2147418112},
7286 },
7287 },
7288 },
7289 {
7290 name: "SUBSDloadidx1",
7291 auxType: auxSymOff,
7292 argLen: 4,
7293 resultInArg0: true,
7294 symEffect: SymRead,
7295 asm: x86.ASUBSD,
7296 scale: 1,
7297 reg: regInfo{
7298 inputs: []inputInfo{
7299 {0, 2147418112},
7300 {2, 4295016447},
7301 {1, 4295032831},
7302 },
7303 outputs: []outputInfo{
7304 {0, 2147418112},
7305 },
7306 },
7307 },
7308 {
7309 name: "SUBSDloadidx8",
7310 auxType: auxSymOff,
7311 argLen: 4,
7312 resultInArg0: true,
7313 symEffect: SymRead,
7314 asm: x86.ASUBSD,
7315 scale: 8,
7316 reg: regInfo{
7317 inputs: []inputInfo{
7318 {0, 2147418112},
7319 {2, 4295016447},
7320 {1, 4295032831},
7321 },
7322 outputs: []outputInfo{
7323 {0, 2147418112},
7324 },
7325 },
7326 },
7327 {
7328 name: "MULSSloadidx1",
7329 auxType: auxSymOff,
7330 argLen: 4,
7331 resultInArg0: true,
7332 symEffect: SymRead,
7333 asm: x86.AMULSS,
7334 scale: 1,
7335 reg: regInfo{
7336 inputs: []inputInfo{
7337 {0, 2147418112},
7338 {2, 4295016447},
7339 {1, 4295032831},
7340 },
7341 outputs: []outputInfo{
7342 {0, 2147418112},
7343 },
7344 },
7345 },
7346 {
7347 name: "MULSSloadidx4",
7348 auxType: auxSymOff,
7349 argLen: 4,
7350 resultInArg0: true,
7351 symEffect: SymRead,
7352 asm: x86.AMULSS,
7353 scale: 4,
7354 reg: regInfo{
7355 inputs: []inputInfo{
7356 {0, 2147418112},
7357 {2, 4295016447},
7358 {1, 4295032831},
7359 },
7360 outputs: []outputInfo{
7361 {0, 2147418112},
7362 },
7363 },
7364 },
7365 {
7366 name: "MULSDloadidx1",
7367 auxType: auxSymOff,
7368 argLen: 4,
7369 resultInArg0: true,
7370 symEffect: SymRead,
7371 asm: x86.AMULSD,
7372 scale: 1,
7373 reg: regInfo{
7374 inputs: []inputInfo{
7375 {0, 2147418112},
7376 {2, 4295016447},
7377 {1, 4295032831},
7378 },
7379 outputs: []outputInfo{
7380 {0, 2147418112},
7381 },
7382 },
7383 },
7384 {
7385 name: "MULSDloadidx8",
7386 auxType: auxSymOff,
7387 argLen: 4,
7388 resultInArg0: true,
7389 symEffect: SymRead,
7390 asm: x86.AMULSD,
7391 scale: 8,
7392 reg: regInfo{
7393 inputs: []inputInfo{
7394 {0, 2147418112},
7395 {2, 4295016447},
7396 {1, 4295032831},
7397 },
7398 outputs: []outputInfo{
7399 {0, 2147418112},
7400 },
7401 },
7402 },
7403 {
7404 name: "DIVSSloadidx1",
7405 auxType: auxSymOff,
7406 argLen: 4,
7407 resultInArg0: true,
7408 symEffect: SymRead,
7409 asm: x86.ADIVSS,
7410 scale: 1,
7411 reg: regInfo{
7412 inputs: []inputInfo{
7413 {0, 2147418112},
7414 {2, 4295016447},
7415 {1, 4295032831},
7416 },
7417 outputs: []outputInfo{
7418 {0, 2147418112},
7419 },
7420 },
7421 },
7422 {
7423 name: "DIVSSloadidx4",
7424 auxType: auxSymOff,
7425 argLen: 4,
7426 resultInArg0: true,
7427 symEffect: SymRead,
7428 asm: x86.ADIVSS,
7429 scale: 4,
7430 reg: regInfo{
7431 inputs: []inputInfo{
7432 {0, 2147418112},
7433 {2, 4295016447},
7434 {1, 4295032831},
7435 },
7436 outputs: []outputInfo{
7437 {0, 2147418112},
7438 },
7439 },
7440 },
7441 {
7442 name: "DIVSDloadidx1",
7443 auxType: auxSymOff,
7444 argLen: 4,
7445 resultInArg0: true,
7446 symEffect: SymRead,
7447 asm: x86.ADIVSD,
7448 scale: 1,
7449 reg: regInfo{
7450 inputs: []inputInfo{
7451 {0, 2147418112},
7452 {2, 4295016447},
7453 {1, 4295032831},
7454 },
7455 outputs: []outputInfo{
7456 {0, 2147418112},
7457 },
7458 },
7459 },
7460 {
7461 name: "DIVSDloadidx8",
7462 auxType: auxSymOff,
7463 argLen: 4,
7464 resultInArg0: true,
7465 symEffect: SymRead,
7466 asm: x86.ADIVSD,
7467 scale: 8,
7468 reg: regInfo{
7469 inputs: []inputInfo{
7470 {0, 2147418112},
7471 {2, 4295016447},
7472 {1, 4295032831},
7473 },
7474 outputs: []outputInfo{
7475 {0, 2147418112},
7476 },
7477 },
7478 },
7479 {
7480 name: "ADDQ",
7481 argLen: 2,
7482 commutative: true,
7483 clobberFlags: true,
7484 asm: x86.AADDQ,
7485 reg: regInfo{
7486 inputs: []inputInfo{
7487 {1, 49135},
7488 {0, 49151},
7489 },
7490 outputs: []outputInfo{
7491 {0, 49135},
7492 },
7493 },
7494 },
7495 {
7496 name: "ADDL",
7497 argLen: 2,
7498 commutative: true,
7499 clobberFlags: true,
7500 asm: x86.AADDL,
7501 reg: regInfo{
7502 inputs: []inputInfo{
7503 {1, 49135},
7504 {0, 49151},
7505 },
7506 outputs: []outputInfo{
7507 {0, 49135},
7508 },
7509 },
7510 },
7511 {
7512 name: "ADDQconst",
7513 auxType: auxInt32,
7514 argLen: 1,
7515 clobberFlags: true,
7516 asm: x86.AADDQ,
7517 reg: regInfo{
7518 inputs: []inputInfo{
7519 {0, 49151},
7520 },
7521 outputs: []outputInfo{
7522 {0, 49135},
7523 },
7524 },
7525 },
7526 {
7527 name: "ADDLconst",
7528 auxType: auxInt32,
7529 argLen: 1,
7530 clobberFlags: true,
7531 asm: x86.AADDL,
7532 reg: regInfo{
7533 inputs: []inputInfo{
7534 {0, 49151},
7535 },
7536 outputs: []outputInfo{
7537 {0, 49135},
7538 },
7539 },
7540 },
7541 {
7542 name: "ADDQconstmodify",
7543 auxType: auxSymValAndOff,
7544 argLen: 2,
7545 clobberFlags: true,
7546 faultOnNilArg0: true,
7547 symEffect: SymRead | SymWrite,
7548 asm: x86.AADDQ,
7549 reg: regInfo{
7550 inputs: []inputInfo{
7551 {0, 4295032831},
7552 },
7553 },
7554 },
7555 {
7556 name: "ADDLconstmodify",
7557 auxType: auxSymValAndOff,
7558 argLen: 2,
7559 clobberFlags: true,
7560 faultOnNilArg0: true,
7561 symEffect: SymRead | SymWrite,
7562 asm: x86.AADDL,
7563 reg: regInfo{
7564 inputs: []inputInfo{
7565 {0, 4295032831},
7566 },
7567 },
7568 },
7569 {
7570 name: "SUBQ",
7571 argLen: 2,
7572 resultInArg0: true,
7573 clobberFlags: true,
7574 asm: x86.ASUBQ,
7575 reg: regInfo{
7576 inputs: []inputInfo{
7577 {0, 49135},
7578 {1, 49135},
7579 },
7580 outputs: []outputInfo{
7581 {0, 49135},
7582 },
7583 },
7584 },
7585 {
7586 name: "SUBL",
7587 argLen: 2,
7588 resultInArg0: true,
7589 clobberFlags: true,
7590 asm: x86.ASUBL,
7591 reg: regInfo{
7592 inputs: []inputInfo{
7593 {0, 49135},
7594 {1, 49135},
7595 },
7596 outputs: []outputInfo{
7597 {0, 49135},
7598 },
7599 },
7600 },
7601 {
7602 name: "SUBQconst",
7603 auxType: auxInt32,
7604 argLen: 1,
7605 resultInArg0: true,
7606 clobberFlags: true,
7607 asm: x86.ASUBQ,
7608 reg: regInfo{
7609 inputs: []inputInfo{
7610 {0, 49135},
7611 },
7612 outputs: []outputInfo{
7613 {0, 49135},
7614 },
7615 },
7616 },
7617 {
7618 name: "SUBLconst",
7619 auxType: auxInt32,
7620 argLen: 1,
7621 resultInArg0: true,
7622 clobberFlags: true,
7623 asm: x86.ASUBL,
7624 reg: regInfo{
7625 inputs: []inputInfo{
7626 {0, 49135},
7627 },
7628 outputs: []outputInfo{
7629 {0, 49135},
7630 },
7631 },
7632 },
7633 {
7634 name: "MULQ",
7635 argLen: 2,
7636 commutative: true,
7637 resultInArg0: true,
7638 clobberFlags: true,
7639 asm: x86.AIMULQ,
7640 reg: regInfo{
7641 inputs: []inputInfo{
7642 {0, 49135},
7643 {1, 49135},
7644 },
7645 outputs: []outputInfo{
7646 {0, 49135},
7647 },
7648 },
7649 },
7650 {
7651 name: "MULL",
7652 argLen: 2,
7653 commutative: true,
7654 resultInArg0: true,
7655 clobberFlags: true,
7656 asm: x86.AIMULL,
7657 reg: regInfo{
7658 inputs: []inputInfo{
7659 {0, 49135},
7660 {1, 49135},
7661 },
7662 outputs: []outputInfo{
7663 {0, 49135},
7664 },
7665 },
7666 },
7667 {
7668 name: "MULQconst",
7669 auxType: auxInt32,
7670 argLen: 1,
7671 clobberFlags: true,
7672 asm: x86.AIMUL3Q,
7673 reg: regInfo{
7674 inputs: []inputInfo{
7675 {0, 49135},
7676 },
7677 outputs: []outputInfo{
7678 {0, 49135},
7679 },
7680 },
7681 },
7682 {
7683 name: "MULLconst",
7684 auxType: auxInt32,
7685 argLen: 1,
7686 clobberFlags: true,
7687 asm: x86.AIMUL3L,
7688 reg: regInfo{
7689 inputs: []inputInfo{
7690 {0, 49135},
7691 },
7692 outputs: []outputInfo{
7693 {0, 49135},
7694 },
7695 },
7696 },
7697 {
7698 name: "MULLU",
7699 argLen: 2,
7700 commutative: true,
7701 clobberFlags: true,
7702 asm: x86.AMULL,
7703 reg: regInfo{
7704 inputs: []inputInfo{
7705 {0, 1},
7706 {1, 49151},
7707 },
7708 clobbers: 4,
7709 outputs: []outputInfo{
7710 {1, 0},
7711 {0, 1},
7712 },
7713 },
7714 },
7715 {
7716 name: "MULQU",
7717 argLen: 2,
7718 commutative: true,
7719 clobberFlags: true,
7720 asm: x86.AMULQ,
7721 reg: regInfo{
7722 inputs: []inputInfo{
7723 {0, 1},
7724 {1, 49151},
7725 },
7726 clobbers: 4,
7727 outputs: []outputInfo{
7728 {1, 0},
7729 {0, 1},
7730 },
7731 },
7732 },
7733 {
7734 name: "HMULQ",
7735 argLen: 2,
7736 clobberFlags: true,
7737 asm: x86.AIMULQ,
7738 reg: regInfo{
7739 inputs: []inputInfo{
7740 {0, 1},
7741 {1, 49151},
7742 },
7743 clobbers: 1,
7744 outputs: []outputInfo{
7745 {0, 4},
7746 },
7747 },
7748 },
7749 {
7750 name: "HMULL",
7751 argLen: 2,
7752 clobberFlags: true,
7753 asm: x86.AIMULL,
7754 reg: regInfo{
7755 inputs: []inputInfo{
7756 {0, 1},
7757 {1, 49151},
7758 },
7759 clobbers: 1,
7760 outputs: []outputInfo{
7761 {0, 4},
7762 },
7763 },
7764 },
7765 {
7766 name: "HMULQU",
7767 argLen: 2,
7768 clobberFlags: true,
7769 asm: x86.AMULQ,
7770 reg: regInfo{
7771 inputs: []inputInfo{
7772 {0, 1},
7773 {1, 49151},
7774 },
7775 clobbers: 1,
7776 outputs: []outputInfo{
7777 {0, 4},
7778 },
7779 },
7780 },
7781 {
7782 name: "HMULLU",
7783 argLen: 2,
7784 clobberFlags: true,
7785 asm: x86.AMULL,
7786 reg: regInfo{
7787 inputs: []inputInfo{
7788 {0, 1},
7789 {1, 49151},
7790 },
7791 clobbers: 1,
7792 outputs: []outputInfo{
7793 {0, 4},
7794 },
7795 },
7796 },
7797 {
7798 name: "AVGQU",
7799 argLen: 2,
7800 commutative: true,
7801 resultInArg0: true,
7802 clobberFlags: true,
7803 reg: regInfo{
7804 inputs: []inputInfo{
7805 {0, 49135},
7806 {1, 49135},
7807 },
7808 outputs: []outputInfo{
7809 {0, 49135},
7810 },
7811 },
7812 },
7813 {
7814 name: "DIVQ",
7815 auxType: auxBool,
7816 argLen: 2,
7817 clobberFlags: true,
7818 asm: x86.AIDIVQ,
7819 reg: regInfo{
7820 inputs: []inputInfo{
7821 {0, 1},
7822 {1, 49147},
7823 },
7824 outputs: []outputInfo{
7825 {0, 1},
7826 {1, 4},
7827 },
7828 },
7829 },
7830 {
7831 name: "DIVL",
7832 auxType: auxBool,
7833 argLen: 2,
7834 clobberFlags: true,
7835 asm: x86.AIDIVL,
7836 reg: regInfo{
7837 inputs: []inputInfo{
7838 {0, 1},
7839 {1, 49147},
7840 },
7841 outputs: []outputInfo{
7842 {0, 1},
7843 {1, 4},
7844 },
7845 },
7846 },
7847 {
7848 name: "DIVW",
7849 auxType: auxBool,
7850 argLen: 2,
7851 clobberFlags: true,
7852 asm: x86.AIDIVW,
7853 reg: regInfo{
7854 inputs: []inputInfo{
7855 {0, 1},
7856 {1, 49147},
7857 },
7858 outputs: []outputInfo{
7859 {0, 1},
7860 {1, 4},
7861 },
7862 },
7863 },
7864 {
7865 name: "DIVQU",
7866 argLen: 2,
7867 clobberFlags: true,
7868 asm: x86.ADIVQ,
7869 reg: regInfo{
7870 inputs: []inputInfo{
7871 {0, 1},
7872 {1, 49147},
7873 },
7874 outputs: []outputInfo{
7875 {0, 1},
7876 {1, 4},
7877 },
7878 },
7879 },
7880 {
7881 name: "DIVLU",
7882 argLen: 2,
7883 clobberFlags: true,
7884 asm: x86.ADIVL,
7885 reg: regInfo{
7886 inputs: []inputInfo{
7887 {0, 1},
7888 {1, 49147},
7889 },
7890 outputs: []outputInfo{
7891 {0, 1},
7892 {1, 4},
7893 },
7894 },
7895 },
7896 {
7897 name: "DIVWU",
7898 argLen: 2,
7899 clobberFlags: true,
7900 asm: x86.ADIVW,
7901 reg: regInfo{
7902 inputs: []inputInfo{
7903 {0, 1},
7904 {1, 49147},
7905 },
7906 outputs: []outputInfo{
7907 {0, 1},
7908 {1, 4},
7909 },
7910 },
7911 },
7912 {
7913 name: "NEGLflags",
7914 argLen: 1,
7915 resultInArg0: true,
7916 asm: x86.ANEGL,
7917 reg: regInfo{
7918 inputs: []inputInfo{
7919 {0, 49135},
7920 },
7921 outputs: []outputInfo{
7922 {1, 0},
7923 {0, 49135},
7924 },
7925 },
7926 },
7927 {
7928 name: "ADDQcarry",
7929 argLen: 2,
7930 commutative: true,
7931 resultInArg0: true,
7932 asm: x86.AADDQ,
7933 reg: regInfo{
7934 inputs: []inputInfo{
7935 {0, 49135},
7936 {1, 49135},
7937 },
7938 outputs: []outputInfo{
7939 {1, 0},
7940 {0, 49135},
7941 },
7942 },
7943 },
7944 {
7945 name: "ADCQ",
7946 argLen: 3,
7947 commutative: true,
7948 resultInArg0: true,
7949 asm: x86.AADCQ,
7950 reg: regInfo{
7951 inputs: []inputInfo{
7952 {0, 49135},
7953 {1, 49135},
7954 },
7955 outputs: []outputInfo{
7956 {1, 0},
7957 {0, 49135},
7958 },
7959 },
7960 },
7961 {
7962 name: "ADDQconstcarry",
7963 auxType: auxInt32,
7964 argLen: 1,
7965 resultInArg0: true,
7966 asm: x86.AADDQ,
7967 reg: regInfo{
7968 inputs: []inputInfo{
7969 {0, 49135},
7970 },
7971 outputs: []outputInfo{
7972 {1, 0},
7973 {0, 49135},
7974 },
7975 },
7976 },
7977 {
7978 name: "ADCQconst",
7979 auxType: auxInt32,
7980 argLen: 2,
7981 resultInArg0: true,
7982 asm: x86.AADCQ,
7983 reg: regInfo{
7984 inputs: []inputInfo{
7985 {0, 49135},
7986 },
7987 outputs: []outputInfo{
7988 {1, 0},
7989 {0, 49135},
7990 },
7991 },
7992 },
7993 {
7994 name: "SUBQborrow",
7995 argLen: 2,
7996 resultInArg0: true,
7997 asm: x86.ASUBQ,
7998 reg: regInfo{
7999 inputs: []inputInfo{
8000 {0, 49135},
8001 {1, 49135},
8002 },
8003 outputs: []outputInfo{
8004 {1, 0},
8005 {0, 49135},
8006 },
8007 },
8008 },
8009 {
8010 name: "SBBQ",
8011 argLen: 3,
8012 resultInArg0: true,
8013 asm: x86.ASBBQ,
8014 reg: regInfo{
8015 inputs: []inputInfo{
8016 {0, 49135},
8017 {1, 49135},
8018 },
8019 outputs: []outputInfo{
8020 {1, 0},
8021 {0, 49135},
8022 },
8023 },
8024 },
8025 {
8026 name: "SUBQconstborrow",
8027 auxType: auxInt32,
8028 argLen: 1,
8029 resultInArg0: true,
8030 asm: x86.ASUBQ,
8031 reg: regInfo{
8032 inputs: []inputInfo{
8033 {0, 49135},
8034 },
8035 outputs: []outputInfo{
8036 {1, 0},
8037 {0, 49135},
8038 },
8039 },
8040 },
8041 {
8042 name: "SBBQconst",
8043 auxType: auxInt32,
8044 argLen: 2,
8045 resultInArg0: true,
8046 asm: x86.ASBBQ,
8047 reg: regInfo{
8048 inputs: []inputInfo{
8049 {0, 49135},
8050 },
8051 outputs: []outputInfo{
8052 {1, 0},
8053 {0, 49135},
8054 },
8055 },
8056 },
8057 {
8058 name: "MULQU2",
8059 argLen: 2,
8060 commutative: true,
8061 clobberFlags: true,
8062 asm: x86.AMULQ,
8063 reg: regInfo{
8064 inputs: []inputInfo{
8065 {0, 1},
8066 {1, 49151},
8067 },
8068 outputs: []outputInfo{
8069 {0, 4},
8070 {1, 1},
8071 },
8072 },
8073 },
8074 {
8075 name: "DIVQU2",
8076 argLen: 3,
8077 clobberFlags: true,
8078 asm: x86.ADIVQ,
8079 reg: regInfo{
8080 inputs: []inputInfo{
8081 {0, 4},
8082 {1, 1},
8083 {2, 49151},
8084 },
8085 outputs: []outputInfo{
8086 {0, 1},
8087 {1, 4},
8088 },
8089 },
8090 },
8091 {
8092 name: "ANDQ",
8093 argLen: 2,
8094 commutative: true,
8095 resultInArg0: true,
8096 clobberFlags: true,
8097 asm: x86.AANDQ,
8098 reg: regInfo{
8099 inputs: []inputInfo{
8100 {0, 49135},
8101 {1, 49135},
8102 },
8103 outputs: []outputInfo{
8104 {0, 49135},
8105 },
8106 },
8107 },
8108 {
8109 name: "ANDL",
8110 argLen: 2,
8111 commutative: true,
8112 resultInArg0: true,
8113 clobberFlags: true,
8114 asm: x86.AANDL,
8115 reg: regInfo{
8116 inputs: []inputInfo{
8117 {0, 49135},
8118 {1, 49135},
8119 },
8120 outputs: []outputInfo{
8121 {0, 49135},
8122 },
8123 },
8124 },
8125 {
8126 name: "ANDQconst",
8127 auxType: auxInt32,
8128 argLen: 1,
8129 resultInArg0: true,
8130 clobberFlags: true,
8131 asm: x86.AANDQ,
8132 reg: regInfo{
8133 inputs: []inputInfo{
8134 {0, 49135},
8135 },
8136 outputs: []outputInfo{
8137 {0, 49135},
8138 },
8139 },
8140 },
8141 {
8142 name: "ANDLconst",
8143 auxType: auxInt32,
8144 argLen: 1,
8145 resultInArg0: true,
8146 clobberFlags: true,
8147 asm: x86.AANDL,
8148 reg: regInfo{
8149 inputs: []inputInfo{
8150 {0, 49135},
8151 },
8152 outputs: []outputInfo{
8153 {0, 49135},
8154 },
8155 },
8156 },
8157 {
8158 name: "ANDQconstmodify",
8159 auxType: auxSymValAndOff,
8160 argLen: 2,
8161 clobberFlags: true,
8162 faultOnNilArg0: true,
8163 symEffect: SymRead | SymWrite,
8164 asm: x86.AANDQ,
8165 reg: regInfo{
8166 inputs: []inputInfo{
8167 {0, 4295032831},
8168 },
8169 },
8170 },
8171 {
8172 name: "ANDLconstmodify",
8173 auxType: auxSymValAndOff,
8174 argLen: 2,
8175 clobberFlags: true,
8176 faultOnNilArg0: true,
8177 symEffect: SymRead | SymWrite,
8178 asm: x86.AANDL,
8179 reg: regInfo{
8180 inputs: []inputInfo{
8181 {0, 4295032831},
8182 },
8183 },
8184 },
8185 {
8186 name: "ORQ",
8187 argLen: 2,
8188 commutative: true,
8189 resultInArg0: true,
8190 clobberFlags: true,
8191 asm: x86.AORQ,
8192 reg: regInfo{
8193 inputs: []inputInfo{
8194 {0, 49135},
8195 {1, 49135},
8196 },
8197 outputs: []outputInfo{
8198 {0, 49135},
8199 },
8200 },
8201 },
8202 {
8203 name: "ORL",
8204 argLen: 2,
8205 commutative: true,
8206 resultInArg0: true,
8207 clobberFlags: true,
8208 asm: x86.AORL,
8209 reg: regInfo{
8210 inputs: []inputInfo{
8211 {0, 49135},
8212 {1, 49135},
8213 },
8214 outputs: []outputInfo{
8215 {0, 49135},
8216 },
8217 },
8218 },
8219 {
8220 name: "ORQconst",
8221 auxType: auxInt32,
8222 argLen: 1,
8223 resultInArg0: true,
8224 clobberFlags: true,
8225 asm: x86.AORQ,
8226 reg: regInfo{
8227 inputs: []inputInfo{
8228 {0, 49135},
8229 },
8230 outputs: []outputInfo{
8231 {0, 49135},
8232 },
8233 },
8234 },
8235 {
8236 name: "ORLconst",
8237 auxType: auxInt32,
8238 argLen: 1,
8239 resultInArg0: true,
8240 clobberFlags: true,
8241 asm: x86.AORL,
8242 reg: regInfo{
8243 inputs: []inputInfo{
8244 {0, 49135},
8245 },
8246 outputs: []outputInfo{
8247 {0, 49135},
8248 },
8249 },
8250 },
8251 {
8252 name: "ORQconstmodify",
8253 auxType: auxSymValAndOff,
8254 argLen: 2,
8255 clobberFlags: true,
8256 faultOnNilArg0: true,
8257 symEffect: SymRead | SymWrite,
8258 asm: x86.AORQ,
8259 reg: regInfo{
8260 inputs: []inputInfo{
8261 {0, 4295032831},
8262 },
8263 },
8264 },
8265 {
8266 name: "ORLconstmodify",
8267 auxType: auxSymValAndOff,
8268 argLen: 2,
8269 clobberFlags: true,
8270 faultOnNilArg0: true,
8271 symEffect: SymRead | SymWrite,
8272 asm: x86.AORL,
8273 reg: regInfo{
8274 inputs: []inputInfo{
8275 {0, 4295032831},
8276 },
8277 },
8278 },
8279 {
8280 name: "XORQ",
8281 argLen: 2,
8282 commutative: true,
8283 resultInArg0: true,
8284 clobberFlags: true,
8285 asm: x86.AXORQ,
8286 reg: regInfo{
8287 inputs: []inputInfo{
8288 {0, 49135},
8289 {1, 49135},
8290 },
8291 outputs: []outputInfo{
8292 {0, 49135},
8293 },
8294 },
8295 },
8296 {
8297 name: "XORL",
8298 argLen: 2,
8299 commutative: true,
8300 resultInArg0: true,
8301 clobberFlags: true,
8302 asm: x86.AXORL,
8303 reg: regInfo{
8304 inputs: []inputInfo{
8305 {0, 49135},
8306 {1, 49135},
8307 },
8308 outputs: []outputInfo{
8309 {0, 49135},
8310 },
8311 },
8312 },
8313 {
8314 name: "XORQconst",
8315 auxType: auxInt32,
8316 argLen: 1,
8317 resultInArg0: true,
8318 clobberFlags: true,
8319 asm: x86.AXORQ,
8320 reg: regInfo{
8321 inputs: []inputInfo{
8322 {0, 49135},
8323 },
8324 outputs: []outputInfo{
8325 {0, 49135},
8326 },
8327 },
8328 },
8329 {
8330 name: "XORLconst",
8331 auxType: auxInt32,
8332 argLen: 1,
8333 resultInArg0: true,
8334 clobberFlags: true,
8335 asm: x86.AXORL,
8336 reg: regInfo{
8337 inputs: []inputInfo{
8338 {0, 49135},
8339 },
8340 outputs: []outputInfo{
8341 {0, 49135},
8342 },
8343 },
8344 },
8345 {
8346 name: "XORQconstmodify",
8347 auxType: auxSymValAndOff,
8348 argLen: 2,
8349 clobberFlags: true,
8350 faultOnNilArg0: true,
8351 symEffect: SymRead | SymWrite,
8352 asm: x86.AXORQ,
8353 reg: regInfo{
8354 inputs: []inputInfo{
8355 {0, 4295032831},
8356 },
8357 },
8358 },
8359 {
8360 name: "XORLconstmodify",
8361 auxType: auxSymValAndOff,
8362 argLen: 2,
8363 clobberFlags: true,
8364 faultOnNilArg0: true,
8365 symEffect: SymRead | SymWrite,
8366 asm: x86.AXORL,
8367 reg: regInfo{
8368 inputs: []inputInfo{
8369 {0, 4295032831},
8370 },
8371 },
8372 },
8373 {
8374 name: "CMPQ",
8375 argLen: 2,
8376 asm: x86.ACMPQ,
8377 reg: regInfo{
8378 inputs: []inputInfo{
8379 {0, 49151},
8380 {1, 49151},
8381 },
8382 },
8383 },
8384 {
8385 name: "CMPL",
8386 argLen: 2,
8387 asm: x86.ACMPL,
8388 reg: regInfo{
8389 inputs: []inputInfo{
8390 {0, 49151},
8391 {1, 49151},
8392 },
8393 },
8394 },
8395 {
8396 name: "CMPW",
8397 argLen: 2,
8398 asm: x86.ACMPW,
8399 reg: regInfo{
8400 inputs: []inputInfo{
8401 {0, 49151},
8402 {1, 49151},
8403 },
8404 },
8405 },
8406 {
8407 name: "CMPB",
8408 argLen: 2,
8409 asm: x86.ACMPB,
8410 reg: regInfo{
8411 inputs: []inputInfo{
8412 {0, 49151},
8413 {1, 49151},
8414 },
8415 },
8416 },
8417 {
8418 name: "CMPQconst",
8419 auxType: auxInt32,
8420 argLen: 1,
8421 asm: x86.ACMPQ,
8422 reg: regInfo{
8423 inputs: []inputInfo{
8424 {0, 49151},
8425 },
8426 },
8427 },
8428 {
8429 name: "CMPLconst",
8430 auxType: auxInt32,
8431 argLen: 1,
8432 asm: x86.ACMPL,
8433 reg: regInfo{
8434 inputs: []inputInfo{
8435 {0, 49151},
8436 },
8437 },
8438 },
8439 {
8440 name: "CMPWconst",
8441 auxType: auxInt16,
8442 argLen: 1,
8443 asm: x86.ACMPW,
8444 reg: regInfo{
8445 inputs: []inputInfo{
8446 {0, 49151},
8447 },
8448 },
8449 },
8450 {
8451 name: "CMPBconst",
8452 auxType: auxInt8,
8453 argLen: 1,
8454 asm: x86.ACMPB,
8455 reg: regInfo{
8456 inputs: []inputInfo{
8457 {0, 49151},
8458 },
8459 },
8460 },
8461 {
8462 name: "CMPQload",
8463 auxType: auxSymOff,
8464 argLen: 3,
8465 faultOnNilArg0: true,
8466 symEffect: SymRead,
8467 asm: x86.ACMPQ,
8468 reg: regInfo{
8469 inputs: []inputInfo{
8470 {1, 49151},
8471 {0, 4295032831},
8472 },
8473 },
8474 },
8475 {
8476 name: "CMPLload",
8477 auxType: auxSymOff,
8478 argLen: 3,
8479 faultOnNilArg0: true,
8480 symEffect: SymRead,
8481 asm: x86.ACMPL,
8482 reg: regInfo{
8483 inputs: []inputInfo{
8484 {1, 49151},
8485 {0, 4295032831},
8486 },
8487 },
8488 },
8489 {
8490 name: "CMPWload",
8491 auxType: auxSymOff,
8492 argLen: 3,
8493 faultOnNilArg0: true,
8494 symEffect: SymRead,
8495 asm: x86.ACMPW,
8496 reg: regInfo{
8497 inputs: []inputInfo{
8498 {1, 49151},
8499 {0, 4295032831},
8500 },
8501 },
8502 },
8503 {
8504 name: "CMPBload",
8505 auxType: auxSymOff,
8506 argLen: 3,
8507 faultOnNilArg0: true,
8508 symEffect: SymRead,
8509 asm: x86.ACMPB,
8510 reg: regInfo{
8511 inputs: []inputInfo{
8512 {1, 49151},
8513 {0, 4295032831},
8514 },
8515 },
8516 },
8517 {
8518 name: "CMPQconstload",
8519 auxType: auxSymValAndOff,
8520 argLen: 2,
8521 faultOnNilArg0: true,
8522 symEffect: SymRead,
8523 asm: x86.ACMPQ,
8524 reg: regInfo{
8525 inputs: []inputInfo{
8526 {0, 4295032831},
8527 },
8528 },
8529 },
8530 {
8531 name: "CMPLconstload",
8532 auxType: auxSymValAndOff,
8533 argLen: 2,
8534 faultOnNilArg0: true,
8535 symEffect: SymRead,
8536 asm: x86.ACMPL,
8537 reg: regInfo{
8538 inputs: []inputInfo{
8539 {0, 4295032831},
8540 },
8541 },
8542 },
8543 {
8544 name: "CMPWconstload",
8545 auxType: auxSymValAndOff,
8546 argLen: 2,
8547 faultOnNilArg0: true,
8548 symEffect: SymRead,
8549 asm: x86.ACMPW,
8550 reg: regInfo{
8551 inputs: []inputInfo{
8552 {0, 4295032831},
8553 },
8554 },
8555 },
8556 {
8557 name: "CMPBconstload",
8558 auxType: auxSymValAndOff,
8559 argLen: 2,
8560 faultOnNilArg0: true,
8561 symEffect: SymRead,
8562 asm: x86.ACMPB,
8563 reg: regInfo{
8564 inputs: []inputInfo{
8565 {0, 4295032831},
8566 },
8567 },
8568 },
8569 {
8570 name: "CMPQloadidx8",
8571 auxType: auxSymOff,
8572 argLen: 4,
8573 symEffect: SymRead,
8574 asm: x86.ACMPQ,
8575 scale: 8,
8576 reg: regInfo{
8577 inputs: []inputInfo{
8578 {1, 49151},
8579 {2, 49151},
8580 {0, 4295032831},
8581 },
8582 },
8583 },
8584 {
8585 name: "CMPQloadidx1",
8586 auxType: auxSymOff,
8587 argLen: 4,
8588 commutative: true,
8589 symEffect: SymRead,
8590 asm: x86.ACMPQ,
8591 scale: 1,
8592 reg: regInfo{
8593 inputs: []inputInfo{
8594 {1, 49151},
8595 {2, 49151},
8596 {0, 4295032831},
8597 },
8598 },
8599 },
8600 {
8601 name: "CMPLloadidx4",
8602 auxType: auxSymOff,
8603 argLen: 4,
8604 symEffect: SymRead,
8605 asm: x86.ACMPL,
8606 scale: 4,
8607 reg: regInfo{
8608 inputs: []inputInfo{
8609 {1, 49151},
8610 {2, 49151},
8611 {0, 4295032831},
8612 },
8613 },
8614 },
8615 {
8616 name: "CMPLloadidx1",
8617 auxType: auxSymOff,
8618 argLen: 4,
8619 commutative: true,
8620 symEffect: SymRead,
8621 asm: x86.ACMPL,
8622 scale: 1,
8623 reg: regInfo{
8624 inputs: []inputInfo{
8625 {1, 49151},
8626 {2, 49151},
8627 {0, 4295032831},
8628 },
8629 },
8630 },
8631 {
8632 name: "CMPWloadidx2",
8633 auxType: auxSymOff,
8634 argLen: 4,
8635 symEffect: SymRead,
8636 asm: x86.ACMPW,
8637 scale: 2,
8638 reg: regInfo{
8639 inputs: []inputInfo{
8640 {1, 49151},
8641 {2, 49151},
8642 {0, 4295032831},
8643 },
8644 },
8645 },
8646 {
8647 name: "CMPWloadidx1",
8648 auxType: auxSymOff,
8649 argLen: 4,
8650 commutative: true,
8651 symEffect: SymRead,
8652 asm: x86.ACMPW,
8653 scale: 1,
8654 reg: regInfo{
8655 inputs: []inputInfo{
8656 {1, 49151},
8657 {2, 49151},
8658 {0, 4295032831},
8659 },
8660 },
8661 },
8662 {
8663 name: "CMPBloadidx1",
8664 auxType: auxSymOff,
8665 argLen: 4,
8666 commutative: true,
8667 symEffect: SymRead,
8668 asm: x86.ACMPB,
8669 scale: 1,
8670 reg: regInfo{
8671 inputs: []inputInfo{
8672 {1, 49151},
8673 {2, 49151},
8674 {0, 4295032831},
8675 },
8676 },
8677 },
8678 {
8679 name: "CMPQconstloadidx8",
8680 auxType: auxSymValAndOff,
8681 argLen: 3,
8682 symEffect: SymRead,
8683 asm: x86.ACMPQ,
8684 scale: 8,
8685 reg: regInfo{
8686 inputs: []inputInfo{
8687 {1, 49151},
8688 {0, 4295032831},
8689 },
8690 },
8691 },
8692 {
8693 name: "CMPQconstloadidx1",
8694 auxType: auxSymValAndOff,
8695 argLen: 3,
8696 commutative: true,
8697 symEffect: SymRead,
8698 asm: x86.ACMPQ,
8699 scale: 1,
8700 reg: regInfo{
8701 inputs: []inputInfo{
8702 {1, 49151},
8703 {0, 4295032831},
8704 },
8705 },
8706 },
8707 {
8708 name: "CMPLconstloadidx4",
8709 auxType: auxSymValAndOff,
8710 argLen: 3,
8711 symEffect: SymRead,
8712 asm: x86.ACMPL,
8713 scale: 4,
8714 reg: regInfo{
8715 inputs: []inputInfo{
8716 {1, 49151},
8717 {0, 4295032831},
8718 },
8719 },
8720 },
8721 {
8722 name: "CMPLconstloadidx1",
8723 auxType: auxSymValAndOff,
8724 argLen: 3,
8725 commutative: true,
8726 symEffect: SymRead,
8727 asm: x86.ACMPL,
8728 scale: 1,
8729 reg: regInfo{
8730 inputs: []inputInfo{
8731 {1, 49151},
8732 {0, 4295032831},
8733 },
8734 },
8735 },
8736 {
8737 name: "CMPWconstloadidx2",
8738 auxType: auxSymValAndOff,
8739 argLen: 3,
8740 symEffect: SymRead,
8741 asm: x86.ACMPW,
8742 scale: 2,
8743 reg: regInfo{
8744 inputs: []inputInfo{
8745 {1, 49151},
8746 {0, 4295032831},
8747 },
8748 },
8749 },
8750 {
8751 name: "CMPWconstloadidx1",
8752 auxType: auxSymValAndOff,
8753 argLen: 3,
8754 commutative: true,
8755 symEffect: SymRead,
8756 asm: x86.ACMPW,
8757 scale: 1,
8758 reg: regInfo{
8759 inputs: []inputInfo{
8760 {1, 49151},
8761 {0, 4295032831},
8762 },
8763 },
8764 },
8765 {
8766 name: "CMPBconstloadidx1",
8767 auxType: auxSymValAndOff,
8768 argLen: 3,
8769 commutative: true,
8770 symEffect: SymRead,
8771 asm: x86.ACMPB,
8772 scale: 1,
8773 reg: regInfo{
8774 inputs: []inputInfo{
8775 {1, 49151},
8776 {0, 4295032831},
8777 },
8778 },
8779 },
8780 {
8781 name: "UCOMISS",
8782 argLen: 2,
8783 asm: x86.AUCOMISS,
8784 reg: regInfo{
8785 inputs: []inputInfo{
8786 {0, 2147418112},
8787 {1, 2147418112},
8788 },
8789 },
8790 },
8791 {
8792 name: "UCOMISD",
8793 argLen: 2,
8794 asm: x86.AUCOMISD,
8795 reg: regInfo{
8796 inputs: []inputInfo{
8797 {0, 2147418112},
8798 {1, 2147418112},
8799 },
8800 },
8801 },
8802 {
8803 name: "BTL",
8804 argLen: 2,
8805 asm: x86.ABTL,
8806 reg: regInfo{
8807 inputs: []inputInfo{
8808 {0, 49151},
8809 {1, 49151},
8810 },
8811 },
8812 },
8813 {
8814 name: "BTQ",
8815 argLen: 2,
8816 asm: x86.ABTQ,
8817 reg: regInfo{
8818 inputs: []inputInfo{
8819 {0, 49151},
8820 {1, 49151},
8821 },
8822 },
8823 },
8824 {
8825 name: "BTCL",
8826 argLen: 2,
8827 resultInArg0: true,
8828 clobberFlags: true,
8829 asm: x86.ABTCL,
8830 reg: regInfo{
8831 inputs: []inputInfo{
8832 {0, 49135},
8833 {1, 49135},
8834 },
8835 outputs: []outputInfo{
8836 {0, 49135},
8837 },
8838 },
8839 },
8840 {
8841 name: "BTCQ",
8842 argLen: 2,
8843 resultInArg0: true,
8844 clobberFlags: true,
8845 asm: x86.ABTCQ,
8846 reg: regInfo{
8847 inputs: []inputInfo{
8848 {0, 49135},
8849 {1, 49135},
8850 },
8851 outputs: []outputInfo{
8852 {0, 49135},
8853 },
8854 },
8855 },
8856 {
8857 name: "BTRL",
8858 argLen: 2,
8859 resultInArg0: true,
8860 clobberFlags: true,
8861 asm: x86.ABTRL,
8862 reg: regInfo{
8863 inputs: []inputInfo{
8864 {0, 49135},
8865 {1, 49135},
8866 },
8867 outputs: []outputInfo{
8868 {0, 49135},
8869 },
8870 },
8871 },
8872 {
8873 name: "BTRQ",
8874 argLen: 2,
8875 resultInArg0: true,
8876 clobberFlags: true,
8877 asm: x86.ABTRQ,
8878 reg: regInfo{
8879 inputs: []inputInfo{
8880 {0, 49135},
8881 {1, 49135},
8882 },
8883 outputs: []outputInfo{
8884 {0, 49135},
8885 },
8886 },
8887 },
8888 {
8889 name: "BTSL",
8890 argLen: 2,
8891 resultInArg0: true,
8892 clobberFlags: true,
8893 asm: x86.ABTSL,
8894 reg: regInfo{
8895 inputs: []inputInfo{
8896 {0, 49135},
8897 {1, 49135},
8898 },
8899 outputs: []outputInfo{
8900 {0, 49135},
8901 },
8902 },
8903 },
8904 {
8905 name: "BTSQ",
8906 argLen: 2,
8907 resultInArg0: true,
8908 clobberFlags: true,
8909 asm: x86.ABTSQ,
8910 reg: regInfo{
8911 inputs: []inputInfo{
8912 {0, 49135},
8913 {1, 49135},
8914 },
8915 outputs: []outputInfo{
8916 {0, 49135},
8917 },
8918 },
8919 },
8920 {
8921 name: "BTLconst",
8922 auxType: auxInt8,
8923 argLen: 1,
8924 asm: x86.ABTL,
8925 reg: regInfo{
8926 inputs: []inputInfo{
8927 {0, 49151},
8928 },
8929 },
8930 },
8931 {
8932 name: "BTQconst",
8933 auxType: auxInt8,
8934 argLen: 1,
8935 asm: x86.ABTQ,
8936 reg: regInfo{
8937 inputs: []inputInfo{
8938 {0, 49151},
8939 },
8940 },
8941 },
8942 {
8943 name: "BTCQconst",
8944 auxType: auxInt8,
8945 argLen: 1,
8946 resultInArg0: true,
8947 clobberFlags: true,
8948 asm: x86.ABTCQ,
8949 reg: regInfo{
8950 inputs: []inputInfo{
8951 {0, 49135},
8952 },
8953 outputs: []outputInfo{
8954 {0, 49135},
8955 },
8956 },
8957 },
8958 {
8959 name: "BTRQconst",
8960 auxType: auxInt8,
8961 argLen: 1,
8962 resultInArg0: true,
8963 clobberFlags: true,
8964 asm: x86.ABTRQ,
8965 reg: regInfo{
8966 inputs: []inputInfo{
8967 {0, 49135},
8968 },
8969 outputs: []outputInfo{
8970 {0, 49135},
8971 },
8972 },
8973 },
8974 {
8975 name: "BTSQconst",
8976 auxType: auxInt8,
8977 argLen: 1,
8978 resultInArg0: true,
8979 clobberFlags: true,
8980 asm: x86.ABTSQ,
8981 reg: regInfo{
8982 inputs: []inputInfo{
8983 {0, 49135},
8984 },
8985 outputs: []outputInfo{
8986 {0, 49135},
8987 },
8988 },
8989 },
8990 {
8991 name: "BTSQconstmodify",
8992 auxType: auxSymValAndOff,
8993 argLen: 2,
8994 clobberFlags: true,
8995 faultOnNilArg0: true,
8996 symEffect: SymRead | SymWrite,
8997 asm: x86.ABTSQ,
8998 reg: regInfo{
8999 inputs: []inputInfo{
9000 {0, 4295032831},
9001 },
9002 },
9003 },
9004 {
9005 name: "BTRQconstmodify",
9006 auxType: auxSymValAndOff,
9007 argLen: 2,
9008 clobberFlags: true,
9009 faultOnNilArg0: true,
9010 symEffect: SymRead | SymWrite,
9011 asm: x86.ABTRQ,
9012 reg: regInfo{
9013 inputs: []inputInfo{
9014 {0, 4295032831},
9015 },
9016 },
9017 },
9018 {
9019 name: "BTCQconstmodify",
9020 auxType: auxSymValAndOff,
9021 argLen: 2,
9022 clobberFlags: true,
9023 faultOnNilArg0: true,
9024 symEffect: SymRead | SymWrite,
9025 asm: x86.ABTCQ,
9026 reg: regInfo{
9027 inputs: []inputInfo{
9028 {0, 4295032831},
9029 },
9030 },
9031 },
9032 {
9033 name: "TESTQ",
9034 argLen: 2,
9035 commutative: true,
9036 asm: x86.ATESTQ,
9037 reg: regInfo{
9038 inputs: []inputInfo{
9039 {0, 49151},
9040 {1, 49151},
9041 },
9042 },
9043 },
9044 {
9045 name: "TESTL",
9046 argLen: 2,
9047 commutative: true,
9048 asm: x86.ATESTL,
9049 reg: regInfo{
9050 inputs: []inputInfo{
9051 {0, 49151},
9052 {1, 49151},
9053 },
9054 },
9055 },
9056 {
9057 name: "TESTW",
9058 argLen: 2,
9059 commutative: true,
9060 asm: x86.ATESTW,
9061 reg: regInfo{
9062 inputs: []inputInfo{
9063 {0, 49151},
9064 {1, 49151},
9065 },
9066 },
9067 },
9068 {
9069 name: "TESTB",
9070 argLen: 2,
9071 commutative: true,
9072 asm: x86.ATESTB,
9073 reg: regInfo{
9074 inputs: []inputInfo{
9075 {0, 49151},
9076 {1, 49151},
9077 },
9078 },
9079 },
9080 {
9081 name: "TESTQconst",
9082 auxType: auxInt32,
9083 argLen: 1,
9084 asm: x86.ATESTQ,
9085 reg: regInfo{
9086 inputs: []inputInfo{
9087 {0, 49151},
9088 },
9089 },
9090 },
9091 {
9092 name: "TESTLconst",
9093 auxType: auxInt32,
9094 argLen: 1,
9095 asm: x86.ATESTL,
9096 reg: regInfo{
9097 inputs: []inputInfo{
9098 {0, 49151},
9099 },
9100 },
9101 },
9102 {
9103 name: "TESTWconst",
9104 auxType: auxInt16,
9105 argLen: 1,
9106 asm: x86.ATESTW,
9107 reg: regInfo{
9108 inputs: []inputInfo{
9109 {0, 49151},
9110 },
9111 },
9112 },
9113 {
9114 name: "TESTBconst",
9115 auxType: auxInt8,
9116 argLen: 1,
9117 asm: x86.ATESTB,
9118 reg: regInfo{
9119 inputs: []inputInfo{
9120 {0, 49151},
9121 },
9122 },
9123 },
9124 {
9125 name: "SHLQ",
9126 argLen: 2,
9127 resultInArg0: true,
9128 clobberFlags: true,
9129 asm: x86.ASHLQ,
9130 reg: regInfo{
9131 inputs: []inputInfo{
9132 {1, 2},
9133 {0, 49135},
9134 },
9135 outputs: []outputInfo{
9136 {0, 49135},
9137 },
9138 },
9139 },
9140 {
9141 name: "SHLL",
9142 argLen: 2,
9143 resultInArg0: true,
9144 clobberFlags: true,
9145 asm: x86.ASHLL,
9146 reg: regInfo{
9147 inputs: []inputInfo{
9148 {1, 2},
9149 {0, 49135},
9150 },
9151 outputs: []outputInfo{
9152 {0, 49135},
9153 },
9154 },
9155 },
9156 {
9157 name: "SHLQconst",
9158 auxType: auxInt8,
9159 argLen: 1,
9160 resultInArg0: true,
9161 clobberFlags: true,
9162 asm: x86.ASHLQ,
9163 reg: regInfo{
9164 inputs: []inputInfo{
9165 {0, 49135},
9166 },
9167 outputs: []outputInfo{
9168 {0, 49135},
9169 },
9170 },
9171 },
9172 {
9173 name: "SHLLconst",
9174 auxType: auxInt8,
9175 argLen: 1,
9176 resultInArg0: true,
9177 clobberFlags: true,
9178 asm: x86.ASHLL,
9179 reg: regInfo{
9180 inputs: []inputInfo{
9181 {0, 49135},
9182 },
9183 outputs: []outputInfo{
9184 {0, 49135},
9185 },
9186 },
9187 },
9188 {
9189 name: "SHRQ",
9190 argLen: 2,
9191 resultInArg0: true,
9192 clobberFlags: true,
9193 asm: x86.ASHRQ,
9194 reg: regInfo{
9195 inputs: []inputInfo{
9196 {1, 2},
9197 {0, 49135},
9198 },
9199 outputs: []outputInfo{
9200 {0, 49135},
9201 },
9202 },
9203 },
9204 {
9205 name: "SHRL",
9206 argLen: 2,
9207 resultInArg0: true,
9208 clobberFlags: true,
9209 asm: x86.ASHRL,
9210 reg: regInfo{
9211 inputs: []inputInfo{
9212 {1, 2},
9213 {0, 49135},
9214 },
9215 outputs: []outputInfo{
9216 {0, 49135},
9217 },
9218 },
9219 },
9220 {
9221 name: "SHRW",
9222 argLen: 2,
9223 resultInArg0: true,
9224 clobberFlags: true,
9225 asm: x86.ASHRW,
9226 reg: regInfo{
9227 inputs: []inputInfo{
9228 {1, 2},
9229 {0, 49135},
9230 },
9231 outputs: []outputInfo{
9232 {0, 49135},
9233 },
9234 },
9235 },
9236 {
9237 name: "SHRB",
9238 argLen: 2,
9239 resultInArg0: true,
9240 clobberFlags: true,
9241 asm: x86.ASHRB,
9242 reg: regInfo{
9243 inputs: []inputInfo{
9244 {1, 2},
9245 {0, 49135},
9246 },
9247 outputs: []outputInfo{
9248 {0, 49135},
9249 },
9250 },
9251 },
9252 {
9253 name: "SHRQconst",
9254 auxType: auxInt8,
9255 argLen: 1,
9256 resultInArg0: true,
9257 clobberFlags: true,
9258 asm: x86.ASHRQ,
9259 reg: regInfo{
9260 inputs: []inputInfo{
9261 {0, 49135},
9262 },
9263 outputs: []outputInfo{
9264 {0, 49135},
9265 },
9266 },
9267 },
9268 {
9269 name: "SHRLconst",
9270 auxType: auxInt8,
9271 argLen: 1,
9272 resultInArg0: true,
9273 clobberFlags: true,
9274 asm: x86.ASHRL,
9275 reg: regInfo{
9276 inputs: []inputInfo{
9277 {0, 49135},
9278 },
9279 outputs: []outputInfo{
9280 {0, 49135},
9281 },
9282 },
9283 },
9284 {
9285 name: "SHRWconst",
9286 auxType: auxInt8,
9287 argLen: 1,
9288 resultInArg0: true,
9289 clobberFlags: true,
9290 asm: x86.ASHRW,
9291 reg: regInfo{
9292 inputs: []inputInfo{
9293 {0, 49135},
9294 },
9295 outputs: []outputInfo{
9296 {0, 49135},
9297 },
9298 },
9299 },
9300 {
9301 name: "SHRBconst",
9302 auxType: auxInt8,
9303 argLen: 1,
9304 resultInArg0: true,
9305 clobberFlags: true,
9306 asm: x86.ASHRB,
9307 reg: regInfo{
9308 inputs: []inputInfo{
9309 {0, 49135},
9310 },
9311 outputs: []outputInfo{
9312 {0, 49135},
9313 },
9314 },
9315 },
9316 {
9317 name: "SARQ",
9318 argLen: 2,
9319 resultInArg0: true,
9320 clobberFlags: true,
9321 asm: x86.ASARQ,
9322 reg: regInfo{
9323 inputs: []inputInfo{
9324 {1, 2},
9325 {0, 49135},
9326 },
9327 outputs: []outputInfo{
9328 {0, 49135},
9329 },
9330 },
9331 },
9332 {
9333 name: "SARL",
9334 argLen: 2,
9335 resultInArg0: true,
9336 clobberFlags: true,
9337 asm: x86.ASARL,
9338 reg: regInfo{
9339 inputs: []inputInfo{
9340 {1, 2},
9341 {0, 49135},
9342 },
9343 outputs: []outputInfo{
9344 {0, 49135},
9345 },
9346 },
9347 },
9348 {
9349 name: "SARW",
9350 argLen: 2,
9351 resultInArg0: true,
9352 clobberFlags: true,
9353 asm: x86.ASARW,
9354 reg: regInfo{
9355 inputs: []inputInfo{
9356 {1, 2},
9357 {0, 49135},
9358 },
9359 outputs: []outputInfo{
9360 {0, 49135},
9361 },
9362 },
9363 },
9364 {
9365 name: "SARB",
9366 argLen: 2,
9367 resultInArg0: true,
9368 clobberFlags: true,
9369 asm: x86.ASARB,
9370 reg: regInfo{
9371 inputs: []inputInfo{
9372 {1, 2},
9373 {0, 49135},
9374 },
9375 outputs: []outputInfo{
9376 {0, 49135},
9377 },
9378 },
9379 },
9380 {
9381 name: "SARQconst",
9382 auxType: auxInt8,
9383 argLen: 1,
9384 resultInArg0: true,
9385 clobberFlags: true,
9386 asm: x86.ASARQ,
9387 reg: regInfo{
9388 inputs: []inputInfo{
9389 {0, 49135},
9390 },
9391 outputs: []outputInfo{
9392 {0, 49135},
9393 },
9394 },
9395 },
9396 {
9397 name: "SARLconst",
9398 auxType: auxInt8,
9399 argLen: 1,
9400 resultInArg0: true,
9401 clobberFlags: true,
9402 asm: x86.ASARL,
9403 reg: regInfo{
9404 inputs: []inputInfo{
9405 {0, 49135},
9406 },
9407 outputs: []outputInfo{
9408 {0, 49135},
9409 },
9410 },
9411 },
9412 {
9413 name: "SARWconst",
9414 auxType: auxInt8,
9415 argLen: 1,
9416 resultInArg0: true,
9417 clobberFlags: true,
9418 asm: x86.ASARW,
9419 reg: regInfo{
9420 inputs: []inputInfo{
9421 {0, 49135},
9422 },
9423 outputs: []outputInfo{
9424 {0, 49135},
9425 },
9426 },
9427 },
9428 {
9429 name: "SARBconst",
9430 auxType: auxInt8,
9431 argLen: 1,
9432 resultInArg0: true,
9433 clobberFlags: true,
9434 asm: x86.ASARB,
9435 reg: regInfo{
9436 inputs: []inputInfo{
9437 {0, 49135},
9438 },
9439 outputs: []outputInfo{
9440 {0, 49135},
9441 },
9442 },
9443 },
9444 {
9445 name: "SHRDQ",
9446 argLen: 3,
9447 resultInArg0: true,
9448 clobberFlags: true,
9449 asm: x86.ASHRQ,
9450 reg: regInfo{
9451 inputs: []inputInfo{
9452 {2, 2},
9453 {0, 49135},
9454 {1, 49135},
9455 },
9456 outputs: []outputInfo{
9457 {0, 49135},
9458 },
9459 },
9460 },
9461 {
9462 name: "SHLDQ",
9463 argLen: 3,
9464 resultInArg0: true,
9465 clobberFlags: true,
9466 asm: x86.ASHLQ,
9467 reg: regInfo{
9468 inputs: []inputInfo{
9469 {2, 2},
9470 {0, 49135},
9471 {1, 49135},
9472 },
9473 outputs: []outputInfo{
9474 {0, 49135},
9475 },
9476 },
9477 },
9478 {
9479 name: "ROLQ",
9480 argLen: 2,
9481 resultInArg0: true,
9482 clobberFlags: true,
9483 asm: x86.AROLQ,
9484 reg: regInfo{
9485 inputs: []inputInfo{
9486 {1, 2},
9487 {0, 49135},
9488 },
9489 outputs: []outputInfo{
9490 {0, 49135},
9491 },
9492 },
9493 },
9494 {
9495 name: "ROLL",
9496 argLen: 2,
9497 resultInArg0: true,
9498 clobberFlags: true,
9499 asm: x86.AROLL,
9500 reg: regInfo{
9501 inputs: []inputInfo{
9502 {1, 2},
9503 {0, 49135},
9504 },
9505 outputs: []outputInfo{
9506 {0, 49135},
9507 },
9508 },
9509 },
9510 {
9511 name: "ROLW",
9512 argLen: 2,
9513 resultInArg0: true,
9514 clobberFlags: true,
9515 asm: x86.AROLW,
9516 reg: regInfo{
9517 inputs: []inputInfo{
9518 {1, 2},
9519 {0, 49135},
9520 },
9521 outputs: []outputInfo{
9522 {0, 49135},
9523 },
9524 },
9525 },
9526 {
9527 name: "ROLB",
9528 argLen: 2,
9529 resultInArg0: true,
9530 clobberFlags: true,
9531 asm: x86.AROLB,
9532 reg: regInfo{
9533 inputs: []inputInfo{
9534 {1, 2},
9535 {0, 49135},
9536 },
9537 outputs: []outputInfo{
9538 {0, 49135},
9539 },
9540 },
9541 },
9542 {
9543 name: "RORQ",
9544 argLen: 2,
9545 resultInArg0: true,
9546 clobberFlags: true,
9547 asm: x86.ARORQ,
9548 reg: regInfo{
9549 inputs: []inputInfo{
9550 {1, 2},
9551 {0, 49135},
9552 },
9553 outputs: []outputInfo{
9554 {0, 49135},
9555 },
9556 },
9557 },
9558 {
9559 name: "RORL",
9560 argLen: 2,
9561 resultInArg0: true,
9562 clobberFlags: true,
9563 asm: x86.ARORL,
9564 reg: regInfo{
9565 inputs: []inputInfo{
9566 {1, 2},
9567 {0, 49135},
9568 },
9569 outputs: []outputInfo{
9570 {0, 49135},
9571 },
9572 },
9573 },
9574 {
9575 name: "RORW",
9576 argLen: 2,
9577 resultInArg0: true,
9578 clobberFlags: true,
9579 asm: x86.ARORW,
9580 reg: regInfo{
9581 inputs: []inputInfo{
9582 {1, 2},
9583 {0, 49135},
9584 },
9585 outputs: []outputInfo{
9586 {0, 49135},
9587 },
9588 },
9589 },
9590 {
9591 name: "RORB",
9592 argLen: 2,
9593 resultInArg0: true,
9594 clobberFlags: true,
9595 asm: x86.ARORB,
9596 reg: regInfo{
9597 inputs: []inputInfo{
9598 {1, 2},
9599 {0, 49135},
9600 },
9601 outputs: []outputInfo{
9602 {0, 49135},
9603 },
9604 },
9605 },
9606 {
9607 name: "ROLQconst",
9608 auxType: auxInt8,
9609 argLen: 1,
9610 resultInArg0: true,
9611 clobberFlags: true,
9612 asm: x86.AROLQ,
9613 reg: regInfo{
9614 inputs: []inputInfo{
9615 {0, 49135},
9616 },
9617 outputs: []outputInfo{
9618 {0, 49135},
9619 },
9620 },
9621 },
9622 {
9623 name: "ROLLconst",
9624 auxType: auxInt8,
9625 argLen: 1,
9626 resultInArg0: true,
9627 clobberFlags: true,
9628 asm: x86.AROLL,
9629 reg: regInfo{
9630 inputs: []inputInfo{
9631 {0, 49135},
9632 },
9633 outputs: []outputInfo{
9634 {0, 49135},
9635 },
9636 },
9637 },
9638 {
9639 name: "ROLWconst",
9640 auxType: auxInt8,
9641 argLen: 1,
9642 resultInArg0: true,
9643 clobberFlags: true,
9644 asm: x86.AROLW,
9645 reg: regInfo{
9646 inputs: []inputInfo{
9647 {0, 49135},
9648 },
9649 outputs: []outputInfo{
9650 {0, 49135},
9651 },
9652 },
9653 },
9654 {
9655 name: "ROLBconst",
9656 auxType: auxInt8,
9657 argLen: 1,
9658 resultInArg0: true,
9659 clobberFlags: true,
9660 asm: x86.AROLB,
9661 reg: regInfo{
9662 inputs: []inputInfo{
9663 {0, 49135},
9664 },
9665 outputs: []outputInfo{
9666 {0, 49135},
9667 },
9668 },
9669 },
9670 {
9671 name: "ADDLload",
9672 auxType: auxSymOff,
9673 argLen: 3,
9674 resultInArg0: true,
9675 clobberFlags: true,
9676 faultOnNilArg1: true,
9677 symEffect: SymRead,
9678 asm: x86.AADDL,
9679 reg: regInfo{
9680 inputs: []inputInfo{
9681 {0, 49135},
9682 {1, 4295032831},
9683 },
9684 outputs: []outputInfo{
9685 {0, 49135},
9686 },
9687 },
9688 },
9689 {
9690 name: "ADDQload",
9691 auxType: auxSymOff,
9692 argLen: 3,
9693 resultInArg0: true,
9694 clobberFlags: true,
9695 faultOnNilArg1: true,
9696 symEffect: SymRead,
9697 asm: x86.AADDQ,
9698 reg: regInfo{
9699 inputs: []inputInfo{
9700 {0, 49135},
9701 {1, 4295032831},
9702 },
9703 outputs: []outputInfo{
9704 {0, 49135},
9705 },
9706 },
9707 },
9708 {
9709 name: "SUBQload",
9710 auxType: auxSymOff,
9711 argLen: 3,
9712 resultInArg0: true,
9713 clobberFlags: true,
9714 faultOnNilArg1: true,
9715 symEffect: SymRead,
9716 asm: x86.ASUBQ,
9717 reg: regInfo{
9718 inputs: []inputInfo{
9719 {0, 49135},
9720 {1, 4295032831},
9721 },
9722 outputs: []outputInfo{
9723 {0, 49135},
9724 },
9725 },
9726 },
9727 {
9728 name: "SUBLload",
9729 auxType: auxSymOff,
9730 argLen: 3,
9731 resultInArg0: true,
9732 clobberFlags: true,
9733 faultOnNilArg1: true,
9734 symEffect: SymRead,
9735 asm: x86.ASUBL,
9736 reg: regInfo{
9737 inputs: []inputInfo{
9738 {0, 49135},
9739 {1, 4295032831},
9740 },
9741 outputs: []outputInfo{
9742 {0, 49135},
9743 },
9744 },
9745 },
9746 {
9747 name: "ANDLload",
9748 auxType: auxSymOff,
9749 argLen: 3,
9750 resultInArg0: true,
9751 clobberFlags: true,
9752 faultOnNilArg1: true,
9753 symEffect: SymRead,
9754 asm: x86.AANDL,
9755 reg: regInfo{
9756 inputs: []inputInfo{
9757 {0, 49135},
9758 {1, 4295032831},
9759 },
9760 outputs: []outputInfo{
9761 {0, 49135},
9762 },
9763 },
9764 },
9765 {
9766 name: "ANDQload",
9767 auxType: auxSymOff,
9768 argLen: 3,
9769 resultInArg0: true,
9770 clobberFlags: true,
9771 faultOnNilArg1: true,
9772 symEffect: SymRead,
9773 asm: x86.AANDQ,
9774 reg: regInfo{
9775 inputs: []inputInfo{
9776 {0, 49135},
9777 {1, 4295032831},
9778 },
9779 outputs: []outputInfo{
9780 {0, 49135},
9781 },
9782 },
9783 },
9784 {
9785 name: "ORQload",
9786 auxType: auxSymOff,
9787 argLen: 3,
9788 resultInArg0: true,
9789 clobberFlags: true,
9790 faultOnNilArg1: true,
9791 symEffect: SymRead,
9792 asm: x86.AORQ,
9793 reg: regInfo{
9794 inputs: []inputInfo{
9795 {0, 49135},
9796 {1, 4295032831},
9797 },
9798 outputs: []outputInfo{
9799 {0, 49135},
9800 },
9801 },
9802 },
9803 {
9804 name: "ORLload",
9805 auxType: auxSymOff,
9806 argLen: 3,
9807 resultInArg0: true,
9808 clobberFlags: true,
9809 faultOnNilArg1: true,
9810 symEffect: SymRead,
9811 asm: x86.AORL,
9812 reg: regInfo{
9813 inputs: []inputInfo{
9814 {0, 49135},
9815 {1, 4295032831},
9816 },
9817 outputs: []outputInfo{
9818 {0, 49135},
9819 },
9820 },
9821 },
9822 {
9823 name: "XORQload",
9824 auxType: auxSymOff,
9825 argLen: 3,
9826 resultInArg0: true,
9827 clobberFlags: true,
9828 faultOnNilArg1: true,
9829 symEffect: SymRead,
9830 asm: x86.AXORQ,
9831 reg: regInfo{
9832 inputs: []inputInfo{
9833 {0, 49135},
9834 {1, 4295032831},
9835 },
9836 outputs: []outputInfo{
9837 {0, 49135},
9838 },
9839 },
9840 },
9841 {
9842 name: "XORLload",
9843 auxType: auxSymOff,
9844 argLen: 3,
9845 resultInArg0: true,
9846 clobberFlags: true,
9847 faultOnNilArg1: true,
9848 symEffect: SymRead,
9849 asm: x86.AXORL,
9850 reg: regInfo{
9851 inputs: []inputInfo{
9852 {0, 49135},
9853 {1, 4295032831},
9854 },
9855 outputs: []outputInfo{
9856 {0, 49135},
9857 },
9858 },
9859 },
9860 {
9861 name: "ADDLloadidx1",
9862 auxType: auxSymOff,
9863 argLen: 4,
9864 resultInArg0: true,
9865 clobberFlags: true,
9866 symEffect: SymRead,
9867 asm: x86.AADDL,
9868 scale: 1,
9869 reg: regInfo{
9870 inputs: []inputInfo{
9871 {0, 49135},
9872 {2, 49151},
9873 {1, 4295032831},
9874 },
9875 outputs: []outputInfo{
9876 {0, 49135},
9877 },
9878 },
9879 },
9880 {
9881 name: "ADDLloadidx4",
9882 auxType: auxSymOff,
9883 argLen: 4,
9884 resultInArg0: true,
9885 clobberFlags: true,
9886 symEffect: SymRead,
9887 asm: x86.AADDL,
9888 scale: 4,
9889 reg: regInfo{
9890 inputs: []inputInfo{
9891 {0, 49135},
9892 {2, 49151},
9893 {1, 4295032831},
9894 },
9895 outputs: []outputInfo{
9896 {0, 49135},
9897 },
9898 },
9899 },
9900 {
9901 name: "ADDLloadidx8",
9902 auxType: auxSymOff,
9903 argLen: 4,
9904 resultInArg0: true,
9905 clobberFlags: true,
9906 symEffect: SymRead,
9907 asm: x86.AADDL,
9908 scale: 8,
9909 reg: regInfo{
9910 inputs: []inputInfo{
9911 {0, 49135},
9912 {2, 49151},
9913 {1, 4295032831},
9914 },
9915 outputs: []outputInfo{
9916 {0, 49135},
9917 },
9918 },
9919 },
9920 {
9921 name: "ADDQloadidx1",
9922 auxType: auxSymOff,
9923 argLen: 4,
9924 resultInArg0: true,
9925 clobberFlags: true,
9926 symEffect: SymRead,
9927 asm: x86.AADDQ,
9928 scale: 1,
9929 reg: regInfo{
9930 inputs: []inputInfo{
9931 {0, 49135},
9932 {2, 49151},
9933 {1, 4295032831},
9934 },
9935 outputs: []outputInfo{
9936 {0, 49135},
9937 },
9938 },
9939 },
9940 {
9941 name: "ADDQloadidx8",
9942 auxType: auxSymOff,
9943 argLen: 4,
9944 resultInArg0: true,
9945 clobberFlags: true,
9946 symEffect: SymRead,
9947 asm: x86.AADDQ,
9948 scale: 8,
9949 reg: regInfo{
9950 inputs: []inputInfo{
9951 {0, 49135},
9952 {2, 49151},
9953 {1, 4295032831},
9954 },
9955 outputs: []outputInfo{
9956 {0, 49135},
9957 },
9958 },
9959 },
9960 {
9961 name: "SUBLloadidx1",
9962 auxType: auxSymOff,
9963 argLen: 4,
9964 resultInArg0: true,
9965 clobberFlags: true,
9966 symEffect: SymRead,
9967 asm: x86.ASUBL,
9968 scale: 1,
9969 reg: regInfo{
9970 inputs: []inputInfo{
9971 {0, 49135},
9972 {2, 49151},
9973 {1, 4295032831},
9974 },
9975 outputs: []outputInfo{
9976 {0, 49135},
9977 },
9978 },
9979 },
9980 {
9981 name: "SUBLloadidx4",
9982 auxType: auxSymOff,
9983 argLen: 4,
9984 resultInArg0: true,
9985 clobberFlags: true,
9986 symEffect: SymRead,
9987 asm: x86.ASUBL,
9988 scale: 4,
9989 reg: regInfo{
9990 inputs: []inputInfo{
9991 {0, 49135},
9992 {2, 49151},
9993 {1, 4295032831},
9994 },
9995 outputs: []outputInfo{
9996 {0, 49135},
9997 },
9998 },
9999 },
10000 {
10001 name: "SUBLloadidx8",
10002 auxType: auxSymOff,
10003 argLen: 4,
10004 resultInArg0: true,
10005 clobberFlags: true,
10006 symEffect: SymRead,
10007 asm: x86.ASUBL,
10008 scale: 8,
10009 reg: regInfo{
10010 inputs: []inputInfo{
10011 {0, 49135},
10012 {2, 49151},
10013 {1, 4295032831},
10014 },
10015 outputs: []outputInfo{
10016 {0, 49135},
10017 },
10018 },
10019 },
10020 {
10021 name: "SUBQloadidx1",
10022 auxType: auxSymOff,
10023 argLen: 4,
10024 resultInArg0: true,
10025 clobberFlags: true,
10026 symEffect: SymRead,
10027 asm: x86.ASUBQ,
10028 scale: 1,
10029 reg: regInfo{
10030 inputs: []inputInfo{
10031 {0, 49135},
10032 {2, 49151},
10033 {1, 4295032831},
10034 },
10035 outputs: []outputInfo{
10036 {0, 49135},
10037 },
10038 },
10039 },
10040 {
10041 name: "SUBQloadidx8",
10042 auxType: auxSymOff,
10043 argLen: 4,
10044 resultInArg0: true,
10045 clobberFlags: true,
10046 symEffect: SymRead,
10047 asm: x86.ASUBQ,
10048 scale: 8,
10049 reg: regInfo{
10050 inputs: []inputInfo{
10051 {0, 49135},
10052 {2, 49151},
10053 {1, 4295032831},
10054 },
10055 outputs: []outputInfo{
10056 {0, 49135},
10057 },
10058 },
10059 },
10060 {
10061 name: "ANDLloadidx1",
10062 auxType: auxSymOff,
10063 argLen: 4,
10064 resultInArg0: true,
10065 clobberFlags: true,
10066 symEffect: SymRead,
10067 asm: x86.AANDL,
10068 scale: 1,
10069 reg: regInfo{
10070 inputs: []inputInfo{
10071 {0, 49135},
10072 {2, 49151},
10073 {1, 4295032831},
10074 },
10075 outputs: []outputInfo{
10076 {0, 49135},
10077 },
10078 },
10079 },
10080 {
10081 name: "ANDLloadidx4",
10082 auxType: auxSymOff,
10083 argLen: 4,
10084 resultInArg0: true,
10085 clobberFlags: true,
10086 symEffect: SymRead,
10087 asm: x86.AANDL,
10088 scale: 4,
10089 reg: regInfo{
10090 inputs: []inputInfo{
10091 {0, 49135},
10092 {2, 49151},
10093 {1, 4295032831},
10094 },
10095 outputs: []outputInfo{
10096 {0, 49135},
10097 },
10098 },
10099 },
10100 {
10101 name: "ANDLloadidx8",
10102 auxType: auxSymOff,
10103 argLen: 4,
10104 resultInArg0: true,
10105 clobberFlags: true,
10106 symEffect: SymRead,
10107 asm: x86.AANDL,
10108 scale: 8,
10109 reg: regInfo{
10110 inputs: []inputInfo{
10111 {0, 49135},
10112 {2, 49151},
10113 {1, 4295032831},
10114 },
10115 outputs: []outputInfo{
10116 {0, 49135},
10117 },
10118 },
10119 },
10120 {
10121 name: "ANDQloadidx1",
10122 auxType: auxSymOff,
10123 argLen: 4,
10124 resultInArg0: true,
10125 clobberFlags: true,
10126 symEffect: SymRead,
10127 asm: x86.AANDQ,
10128 scale: 1,
10129 reg: regInfo{
10130 inputs: []inputInfo{
10131 {0, 49135},
10132 {2, 49151},
10133 {1, 4295032831},
10134 },
10135 outputs: []outputInfo{
10136 {0, 49135},
10137 },
10138 },
10139 },
10140 {
10141 name: "ANDQloadidx8",
10142 auxType: auxSymOff,
10143 argLen: 4,
10144 resultInArg0: true,
10145 clobberFlags: true,
10146 symEffect: SymRead,
10147 asm: x86.AANDQ,
10148 scale: 8,
10149 reg: regInfo{
10150 inputs: []inputInfo{
10151 {0, 49135},
10152 {2, 49151},
10153 {1, 4295032831},
10154 },
10155 outputs: []outputInfo{
10156 {0, 49135},
10157 },
10158 },
10159 },
10160 {
10161 name: "ORLloadidx1",
10162 auxType: auxSymOff,
10163 argLen: 4,
10164 resultInArg0: true,
10165 clobberFlags: true,
10166 symEffect: SymRead,
10167 asm: x86.AORL,
10168 scale: 1,
10169 reg: regInfo{
10170 inputs: []inputInfo{
10171 {0, 49135},
10172 {2, 49151},
10173 {1, 4295032831},
10174 },
10175 outputs: []outputInfo{
10176 {0, 49135},
10177 },
10178 },
10179 },
10180 {
10181 name: "ORLloadidx4",
10182 auxType: auxSymOff,
10183 argLen: 4,
10184 resultInArg0: true,
10185 clobberFlags: true,
10186 symEffect: SymRead,
10187 asm: x86.AORL,
10188 scale: 4,
10189 reg: regInfo{
10190 inputs: []inputInfo{
10191 {0, 49135},
10192 {2, 49151},
10193 {1, 4295032831},
10194 },
10195 outputs: []outputInfo{
10196 {0, 49135},
10197 },
10198 },
10199 },
10200 {
10201 name: "ORLloadidx8",
10202 auxType: auxSymOff,
10203 argLen: 4,
10204 resultInArg0: true,
10205 clobberFlags: true,
10206 symEffect: SymRead,
10207 asm: x86.AORL,
10208 scale: 8,
10209 reg: regInfo{
10210 inputs: []inputInfo{
10211 {0, 49135},
10212 {2, 49151},
10213 {1, 4295032831},
10214 },
10215 outputs: []outputInfo{
10216 {0, 49135},
10217 },
10218 },
10219 },
10220 {
10221 name: "ORQloadidx1",
10222 auxType: auxSymOff,
10223 argLen: 4,
10224 resultInArg0: true,
10225 clobberFlags: true,
10226 symEffect: SymRead,
10227 asm: x86.AORQ,
10228 scale: 1,
10229 reg: regInfo{
10230 inputs: []inputInfo{
10231 {0, 49135},
10232 {2, 49151},
10233 {1, 4295032831},
10234 },
10235 outputs: []outputInfo{
10236 {0, 49135},
10237 },
10238 },
10239 },
10240 {
10241 name: "ORQloadidx8",
10242 auxType: auxSymOff,
10243 argLen: 4,
10244 resultInArg0: true,
10245 clobberFlags: true,
10246 symEffect: SymRead,
10247 asm: x86.AORQ,
10248 scale: 8,
10249 reg: regInfo{
10250 inputs: []inputInfo{
10251 {0, 49135},
10252 {2, 49151},
10253 {1, 4295032831},
10254 },
10255 outputs: []outputInfo{
10256 {0, 49135},
10257 },
10258 },
10259 },
10260 {
10261 name: "XORLloadidx1",
10262 auxType: auxSymOff,
10263 argLen: 4,
10264 resultInArg0: true,
10265 clobberFlags: true,
10266 symEffect: SymRead,
10267 asm: x86.AXORL,
10268 scale: 1,
10269 reg: regInfo{
10270 inputs: []inputInfo{
10271 {0, 49135},
10272 {2, 49151},
10273 {1, 4295032831},
10274 },
10275 outputs: []outputInfo{
10276 {0, 49135},
10277 },
10278 },
10279 },
10280 {
10281 name: "XORLloadidx4",
10282 auxType: auxSymOff,
10283 argLen: 4,
10284 resultInArg0: true,
10285 clobberFlags: true,
10286 symEffect: SymRead,
10287 asm: x86.AXORL,
10288 scale: 4,
10289 reg: regInfo{
10290 inputs: []inputInfo{
10291 {0, 49135},
10292 {2, 49151},
10293 {1, 4295032831},
10294 },
10295 outputs: []outputInfo{
10296 {0, 49135},
10297 },
10298 },
10299 },
10300 {
10301 name: "XORLloadidx8",
10302 auxType: auxSymOff,
10303 argLen: 4,
10304 resultInArg0: true,
10305 clobberFlags: true,
10306 symEffect: SymRead,
10307 asm: x86.AXORL,
10308 scale: 8,
10309 reg: regInfo{
10310 inputs: []inputInfo{
10311 {0, 49135},
10312 {2, 49151},
10313 {1, 4295032831},
10314 },
10315 outputs: []outputInfo{
10316 {0, 49135},
10317 },
10318 },
10319 },
10320 {
10321 name: "XORQloadidx1",
10322 auxType: auxSymOff,
10323 argLen: 4,
10324 resultInArg0: true,
10325 clobberFlags: true,
10326 symEffect: SymRead,
10327 asm: x86.AXORQ,
10328 scale: 1,
10329 reg: regInfo{
10330 inputs: []inputInfo{
10331 {0, 49135},
10332 {2, 49151},
10333 {1, 4295032831},
10334 },
10335 outputs: []outputInfo{
10336 {0, 49135},
10337 },
10338 },
10339 },
10340 {
10341 name: "XORQloadidx8",
10342 auxType: auxSymOff,
10343 argLen: 4,
10344 resultInArg0: true,
10345 clobberFlags: true,
10346 symEffect: SymRead,
10347 asm: x86.AXORQ,
10348 scale: 8,
10349 reg: regInfo{
10350 inputs: []inputInfo{
10351 {0, 49135},
10352 {2, 49151},
10353 {1, 4295032831},
10354 },
10355 outputs: []outputInfo{
10356 {0, 49135},
10357 },
10358 },
10359 },
10360 {
10361 name: "ADDQmodify",
10362 auxType: auxSymOff,
10363 argLen: 3,
10364 clobberFlags: true,
10365 faultOnNilArg0: true,
10366 symEffect: SymRead | SymWrite,
10367 asm: x86.AADDQ,
10368 reg: regInfo{
10369 inputs: []inputInfo{
10370 {1, 49151},
10371 {0, 4295032831},
10372 },
10373 },
10374 },
10375 {
10376 name: "SUBQmodify",
10377 auxType: auxSymOff,
10378 argLen: 3,
10379 clobberFlags: true,
10380 faultOnNilArg0: true,
10381 symEffect: SymRead | SymWrite,
10382 asm: x86.ASUBQ,
10383 reg: regInfo{
10384 inputs: []inputInfo{
10385 {1, 49151},
10386 {0, 4295032831},
10387 },
10388 },
10389 },
10390 {
10391 name: "ANDQmodify",
10392 auxType: auxSymOff,
10393 argLen: 3,
10394 clobberFlags: true,
10395 faultOnNilArg0: true,
10396 symEffect: SymRead | SymWrite,
10397 asm: x86.AANDQ,
10398 reg: regInfo{
10399 inputs: []inputInfo{
10400 {1, 49151},
10401 {0, 4295032831},
10402 },
10403 },
10404 },
10405 {
10406 name: "ORQmodify",
10407 auxType: auxSymOff,
10408 argLen: 3,
10409 clobberFlags: true,
10410 faultOnNilArg0: true,
10411 symEffect: SymRead | SymWrite,
10412 asm: x86.AORQ,
10413 reg: regInfo{
10414 inputs: []inputInfo{
10415 {1, 49151},
10416 {0, 4295032831},
10417 },
10418 },
10419 },
10420 {
10421 name: "XORQmodify",
10422 auxType: auxSymOff,
10423 argLen: 3,
10424 clobberFlags: true,
10425 faultOnNilArg0: true,
10426 symEffect: SymRead | SymWrite,
10427 asm: x86.AXORQ,
10428 reg: regInfo{
10429 inputs: []inputInfo{
10430 {1, 49151},
10431 {0, 4295032831},
10432 },
10433 },
10434 },
10435 {
10436 name: "ADDLmodify",
10437 auxType: auxSymOff,
10438 argLen: 3,
10439 clobberFlags: true,
10440 faultOnNilArg0: true,
10441 symEffect: SymRead | SymWrite,
10442 asm: x86.AADDL,
10443 reg: regInfo{
10444 inputs: []inputInfo{
10445 {1, 49151},
10446 {0, 4295032831},
10447 },
10448 },
10449 },
10450 {
10451 name: "SUBLmodify",
10452 auxType: auxSymOff,
10453 argLen: 3,
10454 clobberFlags: true,
10455 faultOnNilArg0: true,
10456 symEffect: SymRead | SymWrite,
10457 asm: x86.ASUBL,
10458 reg: regInfo{
10459 inputs: []inputInfo{
10460 {1, 49151},
10461 {0, 4295032831},
10462 },
10463 },
10464 },
10465 {
10466 name: "ANDLmodify",
10467 auxType: auxSymOff,
10468 argLen: 3,
10469 clobberFlags: true,
10470 faultOnNilArg0: true,
10471 symEffect: SymRead | SymWrite,
10472 asm: x86.AANDL,
10473 reg: regInfo{
10474 inputs: []inputInfo{
10475 {1, 49151},
10476 {0, 4295032831},
10477 },
10478 },
10479 },
10480 {
10481 name: "ORLmodify",
10482 auxType: auxSymOff,
10483 argLen: 3,
10484 clobberFlags: true,
10485 faultOnNilArg0: true,
10486 symEffect: SymRead | SymWrite,
10487 asm: x86.AORL,
10488 reg: regInfo{
10489 inputs: []inputInfo{
10490 {1, 49151},
10491 {0, 4295032831},
10492 },
10493 },
10494 },
10495 {
10496 name: "XORLmodify",
10497 auxType: auxSymOff,
10498 argLen: 3,
10499 clobberFlags: true,
10500 faultOnNilArg0: true,
10501 symEffect: SymRead | SymWrite,
10502 asm: x86.AXORL,
10503 reg: regInfo{
10504 inputs: []inputInfo{
10505 {1, 49151},
10506 {0, 4295032831},
10507 },
10508 },
10509 },
10510 {
10511 name: "ADDQmodifyidx1",
10512 auxType: auxSymOff,
10513 argLen: 4,
10514 clobberFlags: true,
10515 symEffect: SymRead | SymWrite,
10516 asm: x86.AADDQ,
10517 scale: 1,
10518 reg: regInfo{
10519 inputs: []inputInfo{
10520 {1, 49151},
10521 {2, 49151},
10522 {0, 4295032831},
10523 },
10524 },
10525 },
10526 {
10527 name: "ADDQmodifyidx8",
10528 auxType: auxSymOff,
10529 argLen: 4,
10530 clobberFlags: true,
10531 symEffect: SymRead | SymWrite,
10532 asm: x86.AADDQ,
10533 scale: 8,
10534 reg: regInfo{
10535 inputs: []inputInfo{
10536 {1, 49151},
10537 {2, 49151},
10538 {0, 4295032831},
10539 },
10540 },
10541 },
10542 {
10543 name: "SUBQmodifyidx1",
10544 auxType: auxSymOff,
10545 argLen: 4,
10546 clobberFlags: true,
10547 symEffect: SymRead | SymWrite,
10548 asm: x86.ASUBQ,
10549 scale: 1,
10550 reg: regInfo{
10551 inputs: []inputInfo{
10552 {1, 49151},
10553 {2, 49151},
10554 {0, 4295032831},
10555 },
10556 },
10557 },
10558 {
10559 name: "SUBQmodifyidx8",
10560 auxType: auxSymOff,
10561 argLen: 4,
10562 clobberFlags: true,
10563 symEffect: SymRead | SymWrite,
10564 asm: x86.ASUBQ,
10565 scale: 8,
10566 reg: regInfo{
10567 inputs: []inputInfo{
10568 {1, 49151},
10569 {2, 49151},
10570 {0, 4295032831},
10571 },
10572 },
10573 },
10574 {
10575 name: "ANDQmodifyidx1",
10576 auxType: auxSymOff,
10577 argLen: 4,
10578 clobberFlags: true,
10579 symEffect: SymRead | SymWrite,
10580 asm: x86.AANDQ,
10581 scale: 1,
10582 reg: regInfo{
10583 inputs: []inputInfo{
10584 {1, 49151},
10585 {2, 49151},
10586 {0, 4295032831},
10587 },
10588 },
10589 },
10590 {
10591 name: "ANDQmodifyidx8",
10592 auxType: auxSymOff,
10593 argLen: 4,
10594 clobberFlags: true,
10595 symEffect: SymRead | SymWrite,
10596 asm: x86.AANDQ,
10597 scale: 8,
10598 reg: regInfo{
10599 inputs: []inputInfo{
10600 {1, 49151},
10601 {2, 49151},
10602 {0, 4295032831},
10603 },
10604 },
10605 },
10606 {
10607 name: "ORQmodifyidx1",
10608 auxType: auxSymOff,
10609 argLen: 4,
10610 clobberFlags: true,
10611 symEffect: SymRead | SymWrite,
10612 asm: x86.AORQ,
10613 scale: 1,
10614 reg: regInfo{
10615 inputs: []inputInfo{
10616 {1, 49151},
10617 {2, 49151},
10618 {0, 4295032831},
10619 },
10620 },
10621 },
10622 {
10623 name: "ORQmodifyidx8",
10624 auxType: auxSymOff,
10625 argLen: 4,
10626 clobberFlags: true,
10627 symEffect: SymRead | SymWrite,
10628 asm: x86.AORQ,
10629 scale: 8,
10630 reg: regInfo{
10631 inputs: []inputInfo{
10632 {1, 49151},
10633 {2, 49151},
10634 {0, 4295032831},
10635 },
10636 },
10637 },
10638 {
10639 name: "XORQmodifyidx1",
10640 auxType: auxSymOff,
10641 argLen: 4,
10642 clobberFlags: true,
10643 symEffect: SymRead | SymWrite,
10644 asm: x86.AXORQ,
10645 scale: 1,
10646 reg: regInfo{
10647 inputs: []inputInfo{
10648 {1, 49151},
10649 {2, 49151},
10650 {0, 4295032831},
10651 },
10652 },
10653 },
10654 {
10655 name: "XORQmodifyidx8",
10656 auxType: auxSymOff,
10657 argLen: 4,
10658 clobberFlags: true,
10659 symEffect: SymRead | SymWrite,
10660 asm: x86.AXORQ,
10661 scale: 8,
10662 reg: regInfo{
10663 inputs: []inputInfo{
10664 {1, 49151},
10665 {2, 49151},
10666 {0, 4295032831},
10667 },
10668 },
10669 },
10670 {
10671 name: "ADDLmodifyidx1",
10672 auxType: auxSymOff,
10673 argLen: 4,
10674 clobberFlags: true,
10675 symEffect: SymRead | SymWrite,
10676 asm: x86.AADDL,
10677 scale: 1,
10678 reg: regInfo{
10679 inputs: []inputInfo{
10680 {1, 49151},
10681 {2, 49151},
10682 {0, 4295032831},
10683 },
10684 },
10685 },
10686 {
10687 name: "ADDLmodifyidx4",
10688 auxType: auxSymOff,
10689 argLen: 4,
10690 clobberFlags: true,
10691 symEffect: SymRead | SymWrite,
10692 asm: x86.AADDL,
10693 scale: 4,
10694 reg: regInfo{
10695 inputs: []inputInfo{
10696 {1, 49151},
10697 {2, 49151},
10698 {0, 4295032831},
10699 },
10700 },
10701 },
10702 {
10703 name: "ADDLmodifyidx8",
10704 auxType: auxSymOff,
10705 argLen: 4,
10706 clobberFlags: true,
10707 symEffect: SymRead | SymWrite,
10708 asm: x86.AADDL,
10709 scale: 8,
10710 reg: regInfo{
10711 inputs: []inputInfo{
10712 {1, 49151},
10713 {2, 49151},
10714 {0, 4295032831},
10715 },
10716 },
10717 },
10718 {
10719 name: "SUBLmodifyidx1",
10720 auxType: auxSymOff,
10721 argLen: 4,
10722 clobberFlags: true,
10723 symEffect: SymRead | SymWrite,
10724 asm: x86.ASUBL,
10725 scale: 1,
10726 reg: regInfo{
10727 inputs: []inputInfo{
10728 {1, 49151},
10729 {2, 49151},
10730 {0, 4295032831},
10731 },
10732 },
10733 },
10734 {
10735 name: "SUBLmodifyidx4",
10736 auxType: auxSymOff,
10737 argLen: 4,
10738 clobberFlags: true,
10739 symEffect: SymRead | SymWrite,
10740 asm: x86.ASUBL,
10741 scale: 4,
10742 reg: regInfo{
10743 inputs: []inputInfo{
10744 {1, 49151},
10745 {2, 49151},
10746 {0, 4295032831},
10747 },
10748 },
10749 },
10750 {
10751 name: "SUBLmodifyidx8",
10752 auxType: auxSymOff,
10753 argLen: 4,
10754 clobberFlags: true,
10755 symEffect: SymRead | SymWrite,
10756 asm: x86.ASUBL,
10757 scale: 8,
10758 reg: regInfo{
10759 inputs: []inputInfo{
10760 {1, 49151},
10761 {2, 49151},
10762 {0, 4295032831},
10763 },
10764 },
10765 },
10766 {
10767 name: "ANDLmodifyidx1",
10768 auxType: auxSymOff,
10769 argLen: 4,
10770 clobberFlags: true,
10771 symEffect: SymRead | SymWrite,
10772 asm: x86.AANDL,
10773 scale: 1,
10774 reg: regInfo{
10775 inputs: []inputInfo{
10776 {1, 49151},
10777 {2, 49151},
10778 {0, 4295032831},
10779 },
10780 },
10781 },
10782 {
10783 name: "ANDLmodifyidx4",
10784 auxType: auxSymOff,
10785 argLen: 4,
10786 clobberFlags: true,
10787 symEffect: SymRead | SymWrite,
10788 asm: x86.AANDL,
10789 scale: 4,
10790 reg: regInfo{
10791 inputs: []inputInfo{
10792 {1, 49151},
10793 {2, 49151},
10794 {0, 4295032831},
10795 },
10796 },
10797 },
10798 {
10799 name: "ANDLmodifyidx8",
10800 auxType: auxSymOff,
10801 argLen: 4,
10802 clobberFlags: true,
10803 symEffect: SymRead | SymWrite,
10804 asm: x86.AANDL,
10805 scale: 8,
10806 reg: regInfo{
10807 inputs: []inputInfo{
10808 {1, 49151},
10809 {2, 49151},
10810 {0, 4295032831},
10811 },
10812 },
10813 },
10814 {
10815 name: "ORLmodifyidx1",
10816 auxType: auxSymOff,
10817 argLen: 4,
10818 clobberFlags: true,
10819 symEffect: SymRead | SymWrite,
10820 asm: x86.AORL,
10821 scale: 1,
10822 reg: regInfo{
10823 inputs: []inputInfo{
10824 {1, 49151},
10825 {2, 49151},
10826 {0, 4295032831},
10827 },
10828 },
10829 },
10830 {
10831 name: "ORLmodifyidx4",
10832 auxType: auxSymOff,
10833 argLen: 4,
10834 clobberFlags: true,
10835 symEffect: SymRead | SymWrite,
10836 asm: x86.AORL,
10837 scale: 4,
10838 reg: regInfo{
10839 inputs: []inputInfo{
10840 {1, 49151},
10841 {2, 49151},
10842 {0, 4295032831},
10843 },
10844 },
10845 },
10846 {
10847 name: "ORLmodifyidx8",
10848 auxType: auxSymOff,
10849 argLen: 4,
10850 clobberFlags: true,
10851 symEffect: SymRead | SymWrite,
10852 asm: x86.AORL,
10853 scale: 8,
10854 reg: regInfo{
10855 inputs: []inputInfo{
10856 {1, 49151},
10857 {2, 49151},
10858 {0, 4295032831},
10859 },
10860 },
10861 },
10862 {
10863 name: "XORLmodifyidx1",
10864 auxType: auxSymOff,
10865 argLen: 4,
10866 clobberFlags: true,
10867 symEffect: SymRead | SymWrite,
10868 asm: x86.AXORL,
10869 scale: 1,
10870 reg: regInfo{
10871 inputs: []inputInfo{
10872 {1, 49151},
10873 {2, 49151},
10874 {0, 4295032831},
10875 },
10876 },
10877 },
10878 {
10879 name: "XORLmodifyidx4",
10880 auxType: auxSymOff,
10881 argLen: 4,
10882 clobberFlags: true,
10883 symEffect: SymRead | SymWrite,
10884 asm: x86.AXORL,
10885 scale: 4,
10886 reg: regInfo{
10887 inputs: []inputInfo{
10888 {1, 49151},
10889 {2, 49151},
10890 {0, 4295032831},
10891 },
10892 },
10893 },
10894 {
10895 name: "XORLmodifyidx8",
10896 auxType: auxSymOff,
10897 argLen: 4,
10898 clobberFlags: true,
10899 symEffect: SymRead | SymWrite,
10900 asm: x86.AXORL,
10901 scale: 8,
10902 reg: regInfo{
10903 inputs: []inputInfo{
10904 {1, 49151},
10905 {2, 49151},
10906 {0, 4295032831},
10907 },
10908 },
10909 },
10910 {
10911 name: "ADDQconstmodifyidx1",
10912 auxType: auxSymValAndOff,
10913 argLen: 3,
10914 clobberFlags: true,
10915 symEffect: SymRead | SymWrite,
10916 asm: x86.AADDQ,
10917 scale: 1,
10918 reg: regInfo{
10919 inputs: []inputInfo{
10920 {1, 49151},
10921 {0, 4295032831},
10922 },
10923 },
10924 },
10925 {
10926 name: "ADDQconstmodifyidx8",
10927 auxType: auxSymValAndOff,
10928 argLen: 3,
10929 clobberFlags: true,
10930 symEffect: SymRead | SymWrite,
10931 asm: x86.AADDQ,
10932 scale: 8,
10933 reg: regInfo{
10934 inputs: []inputInfo{
10935 {1, 49151},
10936 {0, 4295032831},
10937 },
10938 },
10939 },
10940 {
10941 name: "ANDQconstmodifyidx1",
10942 auxType: auxSymValAndOff,
10943 argLen: 3,
10944 clobberFlags: true,
10945 symEffect: SymRead | SymWrite,
10946 asm: x86.AANDQ,
10947 scale: 1,
10948 reg: regInfo{
10949 inputs: []inputInfo{
10950 {1, 49151},
10951 {0, 4295032831},
10952 },
10953 },
10954 },
10955 {
10956 name: "ANDQconstmodifyidx8",
10957 auxType: auxSymValAndOff,
10958 argLen: 3,
10959 clobberFlags: true,
10960 symEffect: SymRead | SymWrite,
10961 asm: x86.AANDQ,
10962 scale: 8,
10963 reg: regInfo{
10964 inputs: []inputInfo{
10965 {1, 49151},
10966 {0, 4295032831},
10967 },
10968 },
10969 },
10970 {
10971 name: "ORQconstmodifyidx1",
10972 auxType: auxSymValAndOff,
10973 argLen: 3,
10974 clobberFlags: true,
10975 symEffect: SymRead | SymWrite,
10976 asm: x86.AORQ,
10977 scale: 1,
10978 reg: regInfo{
10979 inputs: []inputInfo{
10980 {1, 49151},
10981 {0, 4295032831},
10982 },
10983 },
10984 },
10985 {
10986 name: "ORQconstmodifyidx8",
10987 auxType: auxSymValAndOff,
10988 argLen: 3,
10989 clobberFlags: true,
10990 symEffect: SymRead | SymWrite,
10991 asm: x86.AORQ,
10992 scale: 8,
10993 reg: regInfo{
10994 inputs: []inputInfo{
10995 {1, 49151},
10996 {0, 4295032831},
10997 },
10998 },
10999 },
11000 {
11001 name: "XORQconstmodifyidx1",
11002 auxType: auxSymValAndOff,
11003 argLen: 3,
11004 clobberFlags: true,
11005 symEffect: SymRead | SymWrite,
11006 asm: x86.AXORQ,
11007 scale: 1,
11008 reg: regInfo{
11009 inputs: []inputInfo{
11010 {1, 49151},
11011 {0, 4295032831},
11012 },
11013 },
11014 },
11015 {
11016 name: "XORQconstmodifyidx8",
11017 auxType: auxSymValAndOff,
11018 argLen: 3,
11019 clobberFlags: true,
11020 symEffect: SymRead | SymWrite,
11021 asm: x86.AXORQ,
11022 scale: 8,
11023 reg: regInfo{
11024 inputs: []inputInfo{
11025 {1, 49151},
11026 {0, 4295032831},
11027 },
11028 },
11029 },
11030 {
11031 name: "ADDLconstmodifyidx1",
11032 auxType: auxSymValAndOff,
11033 argLen: 3,
11034 clobberFlags: true,
11035 symEffect: SymRead | SymWrite,
11036 asm: x86.AADDL,
11037 scale: 1,
11038 reg: regInfo{
11039 inputs: []inputInfo{
11040 {1, 49151},
11041 {0, 4295032831},
11042 },
11043 },
11044 },
11045 {
11046 name: "ADDLconstmodifyidx4",
11047 auxType: auxSymValAndOff,
11048 argLen: 3,
11049 clobberFlags: true,
11050 symEffect: SymRead | SymWrite,
11051 asm: x86.AADDL,
11052 scale: 4,
11053 reg: regInfo{
11054 inputs: []inputInfo{
11055 {1, 49151},
11056 {0, 4295032831},
11057 },
11058 },
11059 },
11060 {
11061 name: "ADDLconstmodifyidx8",
11062 auxType: auxSymValAndOff,
11063 argLen: 3,
11064 clobberFlags: true,
11065 symEffect: SymRead | SymWrite,
11066 asm: x86.AADDL,
11067 scale: 8,
11068 reg: regInfo{
11069 inputs: []inputInfo{
11070 {1, 49151},
11071 {0, 4295032831},
11072 },
11073 },
11074 },
11075 {
11076 name: "ANDLconstmodifyidx1",
11077 auxType: auxSymValAndOff,
11078 argLen: 3,
11079 clobberFlags: true,
11080 symEffect: SymRead | SymWrite,
11081 asm: x86.AANDL,
11082 scale: 1,
11083 reg: regInfo{
11084 inputs: []inputInfo{
11085 {1, 49151},
11086 {0, 4295032831},
11087 },
11088 },
11089 },
11090 {
11091 name: "ANDLconstmodifyidx4",
11092 auxType: auxSymValAndOff,
11093 argLen: 3,
11094 clobberFlags: true,
11095 symEffect: SymRead | SymWrite,
11096 asm: x86.AANDL,
11097 scale: 4,
11098 reg: regInfo{
11099 inputs: []inputInfo{
11100 {1, 49151},
11101 {0, 4295032831},
11102 },
11103 },
11104 },
11105 {
11106 name: "ANDLconstmodifyidx8",
11107 auxType: auxSymValAndOff,
11108 argLen: 3,
11109 clobberFlags: true,
11110 symEffect: SymRead | SymWrite,
11111 asm: x86.AANDL,
11112 scale: 8,
11113 reg: regInfo{
11114 inputs: []inputInfo{
11115 {1, 49151},
11116 {0, 4295032831},
11117 },
11118 },
11119 },
11120 {
11121 name: "ORLconstmodifyidx1",
11122 auxType: auxSymValAndOff,
11123 argLen: 3,
11124 clobberFlags: true,
11125 symEffect: SymRead | SymWrite,
11126 asm: x86.AORL,
11127 scale: 1,
11128 reg: regInfo{
11129 inputs: []inputInfo{
11130 {1, 49151},
11131 {0, 4295032831},
11132 },
11133 },
11134 },
11135 {
11136 name: "ORLconstmodifyidx4",
11137 auxType: auxSymValAndOff,
11138 argLen: 3,
11139 clobberFlags: true,
11140 symEffect: SymRead | SymWrite,
11141 asm: x86.AORL,
11142 scale: 4,
11143 reg: regInfo{
11144 inputs: []inputInfo{
11145 {1, 49151},
11146 {0, 4295032831},
11147 },
11148 },
11149 },
11150 {
11151 name: "ORLconstmodifyidx8",
11152 auxType: auxSymValAndOff,
11153 argLen: 3,
11154 clobberFlags: true,
11155 symEffect: SymRead | SymWrite,
11156 asm: x86.AORL,
11157 scale: 8,
11158 reg: regInfo{
11159 inputs: []inputInfo{
11160 {1, 49151},
11161 {0, 4295032831},
11162 },
11163 },
11164 },
11165 {
11166 name: "XORLconstmodifyidx1",
11167 auxType: auxSymValAndOff,
11168 argLen: 3,
11169 clobberFlags: true,
11170 symEffect: SymRead | SymWrite,
11171 asm: x86.AXORL,
11172 scale: 1,
11173 reg: regInfo{
11174 inputs: []inputInfo{
11175 {1, 49151},
11176 {0, 4295032831},
11177 },
11178 },
11179 },
11180 {
11181 name: "XORLconstmodifyidx4",
11182 auxType: auxSymValAndOff,
11183 argLen: 3,
11184 clobberFlags: true,
11185 symEffect: SymRead | SymWrite,
11186 asm: x86.AXORL,
11187 scale: 4,
11188 reg: regInfo{
11189 inputs: []inputInfo{
11190 {1, 49151},
11191 {0, 4295032831},
11192 },
11193 },
11194 },
11195 {
11196 name: "XORLconstmodifyidx8",
11197 auxType: auxSymValAndOff,
11198 argLen: 3,
11199 clobberFlags: true,
11200 symEffect: SymRead | SymWrite,
11201 asm: x86.AXORL,
11202 scale: 8,
11203 reg: regInfo{
11204 inputs: []inputInfo{
11205 {1, 49151},
11206 {0, 4295032831},
11207 },
11208 },
11209 },
11210 {
11211 name: "NEGQ",
11212 argLen: 1,
11213 resultInArg0: true,
11214 clobberFlags: true,
11215 asm: x86.ANEGQ,
11216 reg: regInfo{
11217 inputs: []inputInfo{
11218 {0, 49135},
11219 },
11220 outputs: []outputInfo{
11221 {0, 49135},
11222 },
11223 },
11224 },
11225 {
11226 name: "NEGL",
11227 argLen: 1,
11228 resultInArg0: true,
11229 clobberFlags: true,
11230 asm: x86.ANEGL,
11231 reg: regInfo{
11232 inputs: []inputInfo{
11233 {0, 49135},
11234 },
11235 outputs: []outputInfo{
11236 {0, 49135},
11237 },
11238 },
11239 },
11240 {
11241 name: "NOTQ",
11242 argLen: 1,
11243 resultInArg0: true,
11244 asm: x86.ANOTQ,
11245 reg: regInfo{
11246 inputs: []inputInfo{
11247 {0, 49135},
11248 },
11249 outputs: []outputInfo{
11250 {0, 49135},
11251 },
11252 },
11253 },
11254 {
11255 name: "NOTL",
11256 argLen: 1,
11257 resultInArg0: true,
11258 asm: x86.ANOTL,
11259 reg: regInfo{
11260 inputs: []inputInfo{
11261 {0, 49135},
11262 },
11263 outputs: []outputInfo{
11264 {0, 49135},
11265 },
11266 },
11267 },
11268 {
11269 name: "BSFQ",
11270 argLen: 1,
11271 asm: x86.ABSFQ,
11272 reg: regInfo{
11273 inputs: []inputInfo{
11274 {0, 49135},
11275 },
11276 outputs: []outputInfo{
11277 {1, 0},
11278 {0, 49135},
11279 },
11280 },
11281 },
11282 {
11283 name: "BSFL",
11284 argLen: 1,
11285 clobberFlags: true,
11286 asm: x86.ABSFL,
11287 reg: regInfo{
11288 inputs: []inputInfo{
11289 {0, 49135},
11290 },
11291 outputs: []outputInfo{
11292 {0, 49135},
11293 },
11294 },
11295 },
11296 {
11297 name: "BSRQ",
11298 argLen: 1,
11299 asm: x86.ABSRQ,
11300 reg: regInfo{
11301 inputs: []inputInfo{
11302 {0, 49135},
11303 },
11304 outputs: []outputInfo{
11305 {1, 0},
11306 {0, 49135},
11307 },
11308 },
11309 },
11310 {
11311 name: "BSRL",
11312 argLen: 1,
11313 clobberFlags: true,
11314 asm: x86.ABSRL,
11315 reg: regInfo{
11316 inputs: []inputInfo{
11317 {0, 49135},
11318 },
11319 outputs: []outputInfo{
11320 {0, 49135},
11321 },
11322 },
11323 },
11324 {
11325 name: "CMOVQEQ",
11326 argLen: 3,
11327 resultInArg0: true,
11328 asm: x86.ACMOVQEQ,
11329 reg: regInfo{
11330 inputs: []inputInfo{
11331 {0, 49135},
11332 {1, 49135},
11333 },
11334 outputs: []outputInfo{
11335 {0, 49135},
11336 },
11337 },
11338 },
11339 {
11340 name: "CMOVQNE",
11341 argLen: 3,
11342 resultInArg0: true,
11343 asm: x86.ACMOVQNE,
11344 reg: regInfo{
11345 inputs: []inputInfo{
11346 {0, 49135},
11347 {1, 49135},
11348 },
11349 outputs: []outputInfo{
11350 {0, 49135},
11351 },
11352 },
11353 },
11354 {
11355 name: "CMOVQLT",
11356 argLen: 3,
11357 resultInArg0: true,
11358 asm: x86.ACMOVQLT,
11359 reg: regInfo{
11360 inputs: []inputInfo{
11361 {0, 49135},
11362 {1, 49135},
11363 },
11364 outputs: []outputInfo{
11365 {0, 49135},
11366 },
11367 },
11368 },
11369 {
11370 name: "CMOVQGT",
11371 argLen: 3,
11372 resultInArg0: true,
11373 asm: x86.ACMOVQGT,
11374 reg: regInfo{
11375 inputs: []inputInfo{
11376 {0, 49135},
11377 {1, 49135},
11378 },
11379 outputs: []outputInfo{
11380 {0, 49135},
11381 },
11382 },
11383 },
11384 {
11385 name: "CMOVQLE",
11386 argLen: 3,
11387 resultInArg0: true,
11388 asm: x86.ACMOVQLE,
11389 reg: regInfo{
11390 inputs: []inputInfo{
11391 {0, 49135},
11392 {1, 49135},
11393 },
11394 outputs: []outputInfo{
11395 {0, 49135},
11396 },
11397 },
11398 },
11399 {
11400 name: "CMOVQGE",
11401 argLen: 3,
11402 resultInArg0: true,
11403 asm: x86.ACMOVQGE,
11404 reg: regInfo{
11405 inputs: []inputInfo{
11406 {0, 49135},
11407 {1, 49135},
11408 },
11409 outputs: []outputInfo{
11410 {0, 49135},
11411 },
11412 },
11413 },
11414 {
11415 name: "CMOVQLS",
11416 argLen: 3,
11417 resultInArg0: true,
11418 asm: x86.ACMOVQLS,
11419 reg: regInfo{
11420 inputs: []inputInfo{
11421 {0, 49135},
11422 {1, 49135},
11423 },
11424 outputs: []outputInfo{
11425 {0, 49135},
11426 },
11427 },
11428 },
11429 {
11430 name: "CMOVQHI",
11431 argLen: 3,
11432 resultInArg0: true,
11433 asm: x86.ACMOVQHI,
11434 reg: regInfo{
11435 inputs: []inputInfo{
11436 {0, 49135},
11437 {1, 49135},
11438 },
11439 outputs: []outputInfo{
11440 {0, 49135},
11441 },
11442 },
11443 },
11444 {
11445 name: "CMOVQCC",
11446 argLen: 3,
11447 resultInArg0: true,
11448 asm: x86.ACMOVQCC,
11449 reg: regInfo{
11450 inputs: []inputInfo{
11451 {0, 49135},
11452 {1, 49135},
11453 },
11454 outputs: []outputInfo{
11455 {0, 49135},
11456 },
11457 },
11458 },
11459 {
11460 name: "CMOVQCS",
11461 argLen: 3,
11462 resultInArg0: true,
11463 asm: x86.ACMOVQCS,
11464 reg: regInfo{
11465 inputs: []inputInfo{
11466 {0, 49135},
11467 {1, 49135},
11468 },
11469 outputs: []outputInfo{
11470 {0, 49135},
11471 },
11472 },
11473 },
11474 {
11475 name: "CMOVLEQ",
11476 argLen: 3,
11477 resultInArg0: true,
11478 asm: x86.ACMOVLEQ,
11479 reg: regInfo{
11480 inputs: []inputInfo{
11481 {0, 49135},
11482 {1, 49135},
11483 },
11484 outputs: []outputInfo{
11485 {0, 49135},
11486 },
11487 },
11488 },
11489 {
11490 name: "CMOVLNE",
11491 argLen: 3,
11492 resultInArg0: true,
11493 asm: x86.ACMOVLNE,
11494 reg: regInfo{
11495 inputs: []inputInfo{
11496 {0, 49135},
11497 {1, 49135},
11498 },
11499 outputs: []outputInfo{
11500 {0, 49135},
11501 },
11502 },
11503 },
11504 {
11505 name: "CMOVLLT",
11506 argLen: 3,
11507 resultInArg0: true,
11508 asm: x86.ACMOVLLT,
11509 reg: regInfo{
11510 inputs: []inputInfo{
11511 {0, 49135},
11512 {1, 49135},
11513 },
11514 outputs: []outputInfo{
11515 {0, 49135},
11516 },
11517 },
11518 },
11519 {
11520 name: "CMOVLGT",
11521 argLen: 3,
11522 resultInArg0: true,
11523 asm: x86.ACMOVLGT,
11524 reg: regInfo{
11525 inputs: []inputInfo{
11526 {0, 49135},
11527 {1, 49135},
11528 },
11529 outputs: []outputInfo{
11530 {0, 49135},
11531 },
11532 },
11533 },
11534 {
11535 name: "CMOVLLE",
11536 argLen: 3,
11537 resultInArg0: true,
11538 asm: x86.ACMOVLLE,
11539 reg: regInfo{
11540 inputs: []inputInfo{
11541 {0, 49135},
11542 {1, 49135},
11543 },
11544 outputs: []outputInfo{
11545 {0, 49135},
11546 },
11547 },
11548 },
11549 {
11550 name: "CMOVLGE",
11551 argLen: 3,
11552 resultInArg0: true,
11553 asm: x86.ACMOVLGE,
11554 reg: regInfo{
11555 inputs: []inputInfo{
11556 {0, 49135},
11557 {1, 49135},
11558 },
11559 outputs: []outputInfo{
11560 {0, 49135},
11561 },
11562 },
11563 },
11564 {
11565 name: "CMOVLLS",
11566 argLen: 3,
11567 resultInArg0: true,
11568 asm: x86.ACMOVLLS,
11569 reg: regInfo{
11570 inputs: []inputInfo{
11571 {0, 49135},
11572 {1, 49135},
11573 },
11574 outputs: []outputInfo{
11575 {0, 49135},
11576 },
11577 },
11578 },
11579 {
11580 name: "CMOVLHI",
11581 argLen: 3,
11582 resultInArg0: true,
11583 asm: x86.ACMOVLHI,
11584 reg: regInfo{
11585 inputs: []inputInfo{
11586 {0, 49135},
11587 {1, 49135},
11588 },
11589 outputs: []outputInfo{
11590 {0, 49135},
11591 },
11592 },
11593 },
11594 {
11595 name: "CMOVLCC",
11596 argLen: 3,
11597 resultInArg0: true,
11598 asm: x86.ACMOVLCC,
11599 reg: regInfo{
11600 inputs: []inputInfo{
11601 {0, 49135},
11602 {1, 49135},
11603 },
11604 outputs: []outputInfo{
11605 {0, 49135},
11606 },
11607 },
11608 },
11609 {
11610 name: "CMOVLCS",
11611 argLen: 3,
11612 resultInArg0: true,
11613 asm: x86.ACMOVLCS,
11614 reg: regInfo{
11615 inputs: []inputInfo{
11616 {0, 49135},
11617 {1, 49135},
11618 },
11619 outputs: []outputInfo{
11620 {0, 49135},
11621 },
11622 },
11623 },
11624 {
11625 name: "CMOVWEQ",
11626 argLen: 3,
11627 resultInArg0: true,
11628 asm: x86.ACMOVWEQ,
11629 reg: regInfo{
11630 inputs: []inputInfo{
11631 {0, 49135},
11632 {1, 49135},
11633 },
11634 outputs: []outputInfo{
11635 {0, 49135},
11636 },
11637 },
11638 },
11639 {
11640 name: "CMOVWNE",
11641 argLen: 3,
11642 resultInArg0: true,
11643 asm: x86.ACMOVWNE,
11644 reg: regInfo{
11645 inputs: []inputInfo{
11646 {0, 49135},
11647 {1, 49135},
11648 },
11649 outputs: []outputInfo{
11650 {0, 49135},
11651 },
11652 },
11653 },
11654 {
11655 name: "CMOVWLT",
11656 argLen: 3,
11657 resultInArg0: true,
11658 asm: x86.ACMOVWLT,
11659 reg: regInfo{
11660 inputs: []inputInfo{
11661 {0, 49135},
11662 {1, 49135},
11663 },
11664 outputs: []outputInfo{
11665 {0, 49135},
11666 },
11667 },
11668 },
11669 {
11670 name: "CMOVWGT",
11671 argLen: 3,
11672 resultInArg0: true,
11673 asm: x86.ACMOVWGT,
11674 reg: regInfo{
11675 inputs: []inputInfo{
11676 {0, 49135},
11677 {1, 49135},
11678 },
11679 outputs: []outputInfo{
11680 {0, 49135},
11681 },
11682 },
11683 },
11684 {
11685 name: "CMOVWLE",
11686 argLen: 3,
11687 resultInArg0: true,
11688 asm: x86.ACMOVWLE,
11689 reg: regInfo{
11690 inputs: []inputInfo{
11691 {0, 49135},
11692 {1, 49135},
11693 },
11694 outputs: []outputInfo{
11695 {0, 49135},
11696 },
11697 },
11698 },
11699 {
11700 name: "CMOVWGE",
11701 argLen: 3,
11702 resultInArg0: true,
11703 asm: x86.ACMOVWGE,
11704 reg: regInfo{
11705 inputs: []inputInfo{
11706 {0, 49135},
11707 {1, 49135},
11708 },
11709 outputs: []outputInfo{
11710 {0, 49135},
11711 },
11712 },
11713 },
11714 {
11715 name: "CMOVWLS",
11716 argLen: 3,
11717 resultInArg0: true,
11718 asm: x86.ACMOVWLS,
11719 reg: regInfo{
11720 inputs: []inputInfo{
11721 {0, 49135},
11722 {1, 49135},
11723 },
11724 outputs: []outputInfo{
11725 {0, 49135},
11726 },
11727 },
11728 },
11729 {
11730 name: "CMOVWHI",
11731 argLen: 3,
11732 resultInArg0: true,
11733 asm: x86.ACMOVWHI,
11734 reg: regInfo{
11735 inputs: []inputInfo{
11736 {0, 49135},
11737 {1, 49135},
11738 },
11739 outputs: []outputInfo{
11740 {0, 49135},
11741 },
11742 },
11743 },
11744 {
11745 name: "CMOVWCC",
11746 argLen: 3,
11747 resultInArg0: true,
11748 asm: x86.ACMOVWCC,
11749 reg: regInfo{
11750 inputs: []inputInfo{
11751 {0, 49135},
11752 {1, 49135},
11753 },
11754 outputs: []outputInfo{
11755 {0, 49135},
11756 },
11757 },
11758 },
11759 {
11760 name: "CMOVWCS",
11761 argLen: 3,
11762 resultInArg0: true,
11763 asm: x86.ACMOVWCS,
11764 reg: regInfo{
11765 inputs: []inputInfo{
11766 {0, 49135},
11767 {1, 49135},
11768 },
11769 outputs: []outputInfo{
11770 {0, 49135},
11771 },
11772 },
11773 },
11774 {
11775 name: "CMOVQEQF",
11776 argLen: 3,
11777 resultInArg0: true,
11778 needIntTemp: true,
11779 asm: x86.ACMOVQNE,
11780 reg: regInfo{
11781 inputs: []inputInfo{
11782 {0, 49135},
11783 {1, 49135},
11784 },
11785 outputs: []outputInfo{
11786 {0, 49135},
11787 },
11788 },
11789 },
11790 {
11791 name: "CMOVQNEF",
11792 argLen: 3,
11793 resultInArg0: true,
11794 asm: x86.ACMOVQNE,
11795 reg: regInfo{
11796 inputs: []inputInfo{
11797 {0, 49135},
11798 {1, 49135},
11799 },
11800 outputs: []outputInfo{
11801 {0, 49135},
11802 },
11803 },
11804 },
11805 {
11806 name: "CMOVQGTF",
11807 argLen: 3,
11808 resultInArg0: true,
11809 asm: x86.ACMOVQHI,
11810 reg: regInfo{
11811 inputs: []inputInfo{
11812 {0, 49135},
11813 {1, 49135},
11814 },
11815 outputs: []outputInfo{
11816 {0, 49135},
11817 },
11818 },
11819 },
11820 {
11821 name: "CMOVQGEF",
11822 argLen: 3,
11823 resultInArg0: true,
11824 asm: x86.ACMOVQCC,
11825 reg: regInfo{
11826 inputs: []inputInfo{
11827 {0, 49135},
11828 {1, 49135},
11829 },
11830 outputs: []outputInfo{
11831 {0, 49135},
11832 },
11833 },
11834 },
11835 {
11836 name: "CMOVLEQF",
11837 argLen: 3,
11838 resultInArg0: true,
11839 needIntTemp: true,
11840 asm: x86.ACMOVLNE,
11841 reg: regInfo{
11842 inputs: []inputInfo{
11843 {0, 49135},
11844 {1, 49135},
11845 },
11846 outputs: []outputInfo{
11847 {0, 49135},
11848 },
11849 },
11850 },
11851 {
11852 name: "CMOVLNEF",
11853 argLen: 3,
11854 resultInArg0: true,
11855 asm: x86.ACMOVLNE,
11856 reg: regInfo{
11857 inputs: []inputInfo{
11858 {0, 49135},
11859 {1, 49135},
11860 },
11861 outputs: []outputInfo{
11862 {0, 49135},
11863 },
11864 },
11865 },
11866 {
11867 name: "CMOVLGTF",
11868 argLen: 3,
11869 resultInArg0: true,
11870 asm: x86.ACMOVLHI,
11871 reg: regInfo{
11872 inputs: []inputInfo{
11873 {0, 49135},
11874 {1, 49135},
11875 },
11876 outputs: []outputInfo{
11877 {0, 49135},
11878 },
11879 },
11880 },
11881 {
11882 name: "CMOVLGEF",
11883 argLen: 3,
11884 resultInArg0: true,
11885 asm: x86.ACMOVLCC,
11886 reg: regInfo{
11887 inputs: []inputInfo{
11888 {0, 49135},
11889 {1, 49135},
11890 },
11891 outputs: []outputInfo{
11892 {0, 49135},
11893 },
11894 },
11895 },
11896 {
11897 name: "CMOVWEQF",
11898 argLen: 3,
11899 resultInArg0: true,
11900 needIntTemp: true,
11901 asm: x86.ACMOVWNE,
11902 reg: regInfo{
11903 inputs: []inputInfo{
11904 {0, 49135},
11905 {1, 49135},
11906 },
11907 outputs: []outputInfo{
11908 {0, 49135},
11909 },
11910 },
11911 },
11912 {
11913 name: "CMOVWNEF",
11914 argLen: 3,
11915 resultInArg0: true,
11916 asm: x86.ACMOVWNE,
11917 reg: regInfo{
11918 inputs: []inputInfo{
11919 {0, 49135},
11920 {1, 49135},
11921 },
11922 outputs: []outputInfo{
11923 {0, 49135},
11924 },
11925 },
11926 },
11927 {
11928 name: "CMOVWGTF",
11929 argLen: 3,
11930 resultInArg0: true,
11931 asm: x86.ACMOVWHI,
11932 reg: regInfo{
11933 inputs: []inputInfo{
11934 {0, 49135},
11935 {1, 49135},
11936 },
11937 outputs: []outputInfo{
11938 {0, 49135},
11939 },
11940 },
11941 },
11942 {
11943 name: "CMOVWGEF",
11944 argLen: 3,
11945 resultInArg0: true,
11946 asm: x86.ACMOVWCC,
11947 reg: regInfo{
11948 inputs: []inputInfo{
11949 {0, 49135},
11950 {1, 49135},
11951 },
11952 outputs: []outputInfo{
11953 {0, 49135},
11954 },
11955 },
11956 },
11957 {
11958 name: "BSWAPQ",
11959 argLen: 1,
11960 resultInArg0: true,
11961 asm: x86.ABSWAPQ,
11962 reg: regInfo{
11963 inputs: []inputInfo{
11964 {0, 49135},
11965 },
11966 outputs: []outputInfo{
11967 {0, 49135},
11968 },
11969 },
11970 },
11971 {
11972 name: "BSWAPL",
11973 argLen: 1,
11974 resultInArg0: true,
11975 asm: x86.ABSWAPL,
11976 reg: regInfo{
11977 inputs: []inputInfo{
11978 {0, 49135},
11979 },
11980 outputs: []outputInfo{
11981 {0, 49135},
11982 },
11983 },
11984 },
11985 {
11986 name: "POPCNTQ",
11987 argLen: 1,
11988 clobberFlags: true,
11989 asm: x86.APOPCNTQ,
11990 reg: regInfo{
11991 inputs: []inputInfo{
11992 {0, 49135},
11993 },
11994 outputs: []outputInfo{
11995 {0, 49135},
11996 },
11997 },
11998 },
11999 {
12000 name: "POPCNTL",
12001 argLen: 1,
12002 clobberFlags: true,
12003 asm: x86.APOPCNTL,
12004 reg: regInfo{
12005 inputs: []inputInfo{
12006 {0, 49135},
12007 },
12008 outputs: []outputInfo{
12009 {0, 49135},
12010 },
12011 },
12012 },
12013 {
12014 name: "SQRTSD",
12015 argLen: 1,
12016 asm: x86.ASQRTSD,
12017 reg: regInfo{
12018 inputs: []inputInfo{
12019 {0, 2147418112},
12020 },
12021 outputs: []outputInfo{
12022 {0, 2147418112},
12023 },
12024 },
12025 },
12026 {
12027 name: "SQRTSS",
12028 argLen: 1,
12029 asm: x86.ASQRTSS,
12030 reg: regInfo{
12031 inputs: []inputInfo{
12032 {0, 2147418112},
12033 },
12034 outputs: []outputInfo{
12035 {0, 2147418112},
12036 },
12037 },
12038 },
12039 {
12040 name: "ROUNDSD",
12041 auxType: auxInt8,
12042 argLen: 1,
12043 asm: x86.AROUNDSD,
12044 reg: regInfo{
12045 inputs: []inputInfo{
12046 {0, 2147418112},
12047 },
12048 outputs: []outputInfo{
12049 {0, 2147418112},
12050 },
12051 },
12052 },
12053 {
12054 name: "VFMADD231SD",
12055 argLen: 3,
12056 resultInArg0: true,
12057 asm: x86.AVFMADD231SD,
12058 reg: regInfo{
12059 inputs: []inputInfo{
12060 {0, 2147418112},
12061 {1, 2147418112},
12062 {2, 2147418112},
12063 },
12064 outputs: []outputInfo{
12065 {0, 2147418112},
12066 },
12067 },
12068 },
12069 {
12070 name: "MINSD",
12071 argLen: 2,
12072 resultInArg0: true,
12073 asm: x86.AMINSD,
12074 reg: regInfo{
12075 inputs: []inputInfo{
12076 {0, 2147418112},
12077 {1, 2147418112},
12078 },
12079 outputs: []outputInfo{
12080 {0, 2147418112},
12081 },
12082 },
12083 },
12084 {
12085 name: "MINSS",
12086 argLen: 2,
12087 resultInArg0: true,
12088 asm: x86.AMINSS,
12089 reg: regInfo{
12090 inputs: []inputInfo{
12091 {0, 2147418112},
12092 {1, 2147418112},
12093 },
12094 outputs: []outputInfo{
12095 {0, 2147418112},
12096 },
12097 },
12098 },
12099 {
12100 name: "SBBQcarrymask",
12101 argLen: 1,
12102 asm: x86.ASBBQ,
12103 reg: regInfo{
12104 outputs: []outputInfo{
12105 {0, 49135},
12106 },
12107 },
12108 },
12109 {
12110 name: "SBBLcarrymask",
12111 argLen: 1,
12112 asm: x86.ASBBL,
12113 reg: regInfo{
12114 outputs: []outputInfo{
12115 {0, 49135},
12116 },
12117 },
12118 },
12119 {
12120 name: "SETEQ",
12121 argLen: 1,
12122 asm: x86.ASETEQ,
12123 reg: regInfo{
12124 outputs: []outputInfo{
12125 {0, 49135},
12126 },
12127 },
12128 },
12129 {
12130 name: "SETNE",
12131 argLen: 1,
12132 asm: x86.ASETNE,
12133 reg: regInfo{
12134 outputs: []outputInfo{
12135 {0, 49135},
12136 },
12137 },
12138 },
12139 {
12140 name: "SETL",
12141 argLen: 1,
12142 asm: x86.ASETLT,
12143 reg: regInfo{
12144 outputs: []outputInfo{
12145 {0, 49135},
12146 },
12147 },
12148 },
12149 {
12150 name: "SETLE",
12151 argLen: 1,
12152 asm: x86.ASETLE,
12153 reg: regInfo{
12154 outputs: []outputInfo{
12155 {0, 49135},
12156 },
12157 },
12158 },
12159 {
12160 name: "SETG",
12161 argLen: 1,
12162 asm: x86.ASETGT,
12163 reg: regInfo{
12164 outputs: []outputInfo{
12165 {0, 49135},
12166 },
12167 },
12168 },
12169 {
12170 name: "SETGE",
12171 argLen: 1,
12172 asm: x86.ASETGE,
12173 reg: regInfo{
12174 outputs: []outputInfo{
12175 {0, 49135},
12176 },
12177 },
12178 },
12179 {
12180 name: "SETB",
12181 argLen: 1,
12182 asm: x86.ASETCS,
12183 reg: regInfo{
12184 outputs: []outputInfo{
12185 {0, 49135},
12186 },
12187 },
12188 },
12189 {
12190 name: "SETBE",
12191 argLen: 1,
12192 asm: x86.ASETLS,
12193 reg: regInfo{
12194 outputs: []outputInfo{
12195 {0, 49135},
12196 },
12197 },
12198 },
12199 {
12200 name: "SETA",
12201 argLen: 1,
12202 asm: x86.ASETHI,
12203 reg: regInfo{
12204 outputs: []outputInfo{
12205 {0, 49135},
12206 },
12207 },
12208 },
12209 {
12210 name: "SETAE",
12211 argLen: 1,
12212 asm: x86.ASETCC,
12213 reg: regInfo{
12214 outputs: []outputInfo{
12215 {0, 49135},
12216 },
12217 },
12218 },
12219 {
12220 name: "SETO",
12221 argLen: 1,
12222 asm: x86.ASETOS,
12223 reg: regInfo{
12224 outputs: []outputInfo{
12225 {0, 49135},
12226 },
12227 },
12228 },
12229 {
12230 name: "SETEQstore",
12231 auxType: auxSymOff,
12232 argLen: 3,
12233 faultOnNilArg0: true,
12234 symEffect: SymWrite,
12235 asm: x86.ASETEQ,
12236 reg: regInfo{
12237 inputs: []inputInfo{
12238 {0, 4295032831},
12239 },
12240 },
12241 },
12242 {
12243 name: "SETNEstore",
12244 auxType: auxSymOff,
12245 argLen: 3,
12246 faultOnNilArg0: true,
12247 symEffect: SymWrite,
12248 asm: x86.ASETNE,
12249 reg: regInfo{
12250 inputs: []inputInfo{
12251 {0, 4295032831},
12252 },
12253 },
12254 },
12255 {
12256 name: "SETLstore",
12257 auxType: auxSymOff,
12258 argLen: 3,
12259 faultOnNilArg0: true,
12260 symEffect: SymWrite,
12261 asm: x86.ASETLT,
12262 reg: regInfo{
12263 inputs: []inputInfo{
12264 {0, 4295032831},
12265 },
12266 },
12267 },
12268 {
12269 name: "SETLEstore",
12270 auxType: auxSymOff,
12271 argLen: 3,
12272 faultOnNilArg0: true,
12273 symEffect: SymWrite,
12274 asm: x86.ASETLE,
12275 reg: regInfo{
12276 inputs: []inputInfo{
12277 {0, 4295032831},
12278 },
12279 },
12280 },
12281 {
12282 name: "SETGstore",
12283 auxType: auxSymOff,
12284 argLen: 3,
12285 faultOnNilArg0: true,
12286 symEffect: SymWrite,
12287 asm: x86.ASETGT,
12288 reg: regInfo{
12289 inputs: []inputInfo{
12290 {0, 4295032831},
12291 },
12292 },
12293 },
12294 {
12295 name: "SETGEstore",
12296 auxType: auxSymOff,
12297 argLen: 3,
12298 faultOnNilArg0: true,
12299 symEffect: SymWrite,
12300 asm: x86.ASETGE,
12301 reg: regInfo{
12302 inputs: []inputInfo{
12303 {0, 4295032831},
12304 },
12305 },
12306 },
12307 {
12308 name: "SETBstore",
12309 auxType: auxSymOff,
12310 argLen: 3,
12311 faultOnNilArg0: true,
12312 symEffect: SymWrite,
12313 asm: x86.ASETCS,
12314 reg: regInfo{
12315 inputs: []inputInfo{
12316 {0, 4295032831},
12317 },
12318 },
12319 },
12320 {
12321 name: "SETBEstore",
12322 auxType: auxSymOff,
12323 argLen: 3,
12324 faultOnNilArg0: true,
12325 symEffect: SymWrite,
12326 asm: x86.ASETLS,
12327 reg: regInfo{
12328 inputs: []inputInfo{
12329 {0, 4295032831},
12330 },
12331 },
12332 },
12333 {
12334 name: "SETAstore",
12335 auxType: auxSymOff,
12336 argLen: 3,
12337 faultOnNilArg0: true,
12338 symEffect: SymWrite,
12339 asm: x86.ASETHI,
12340 reg: regInfo{
12341 inputs: []inputInfo{
12342 {0, 4295032831},
12343 },
12344 },
12345 },
12346 {
12347 name: "SETAEstore",
12348 auxType: auxSymOff,
12349 argLen: 3,
12350 faultOnNilArg0: true,
12351 symEffect: SymWrite,
12352 asm: x86.ASETCC,
12353 reg: regInfo{
12354 inputs: []inputInfo{
12355 {0, 4295032831},
12356 },
12357 },
12358 },
12359 {
12360 name: "SETEQstoreidx1",
12361 auxType: auxSymOff,
12362 argLen: 4,
12363 commutative: true,
12364 symEffect: SymWrite,
12365 asm: x86.ASETEQ,
12366 scale: 1,
12367 reg: regInfo{
12368 inputs: []inputInfo{
12369 {1, 49151},
12370 {0, 4295032831},
12371 },
12372 },
12373 },
12374 {
12375 name: "SETNEstoreidx1",
12376 auxType: auxSymOff,
12377 argLen: 4,
12378 commutative: true,
12379 symEffect: SymWrite,
12380 asm: x86.ASETNE,
12381 scale: 1,
12382 reg: regInfo{
12383 inputs: []inputInfo{
12384 {1, 49151},
12385 {0, 4295032831},
12386 },
12387 },
12388 },
12389 {
12390 name: "SETLstoreidx1",
12391 auxType: auxSymOff,
12392 argLen: 4,
12393 commutative: true,
12394 symEffect: SymWrite,
12395 asm: x86.ASETLT,
12396 scale: 1,
12397 reg: regInfo{
12398 inputs: []inputInfo{
12399 {1, 49151},
12400 {0, 4295032831},
12401 },
12402 },
12403 },
12404 {
12405 name: "SETLEstoreidx1",
12406 auxType: auxSymOff,
12407 argLen: 4,
12408 commutative: true,
12409 symEffect: SymWrite,
12410 asm: x86.ASETLE,
12411 scale: 1,
12412 reg: regInfo{
12413 inputs: []inputInfo{
12414 {1, 49151},
12415 {0, 4295032831},
12416 },
12417 },
12418 },
12419 {
12420 name: "SETGstoreidx1",
12421 auxType: auxSymOff,
12422 argLen: 4,
12423 commutative: true,
12424 symEffect: SymWrite,
12425 asm: x86.ASETGT,
12426 scale: 1,
12427 reg: regInfo{
12428 inputs: []inputInfo{
12429 {1, 49151},
12430 {0, 4295032831},
12431 },
12432 },
12433 },
12434 {
12435 name: "SETGEstoreidx1",
12436 auxType: auxSymOff,
12437 argLen: 4,
12438 commutative: true,
12439 symEffect: SymWrite,
12440 asm: x86.ASETGE,
12441 scale: 1,
12442 reg: regInfo{
12443 inputs: []inputInfo{
12444 {1, 49151},
12445 {0, 4295032831},
12446 },
12447 },
12448 },
12449 {
12450 name: "SETBstoreidx1",
12451 auxType: auxSymOff,
12452 argLen: 4,
12453 commutative: true,
12454 symEffect: SymWrite,
12455 asm: x86.ASETCS,
12456 scale: 1,
12457 reg: regInfo{
12458 inputs: []inputInfo{
12459 {1, 49151},
12460 {0, 4295032831},
12461 },
12462 },
12463 },
12464 {
12465 name: "SETBEstoreidx1",
12466 auxType: auxSymOff,
12467 argLen: 4,
12468 commutative: true,
12469 symEffect: SymWrite,
12470 asm: x86.ASETLS,
12471 scale: 1,
12472 reg: regInfo{
12473 inputs: []inputInfo{
12474 {1, 49151},
12475 {0, 4295032831},
12476 },
12477 },
12478 },
12479 {
12480 name: "SETAstoreidx1",
12481 auxType: auxSymOff,
12482 argLen: 4,
12483 commutative: true,
12484 symEffect: SymWrite,
12485 asm: x86.ASETHI,
12486 scale: 1,
12487 reg: regInfo{
12488 inputs: []inputInfo{
12489 {1, 49151},
12490 {0, 4295032831},
12491 },
12492 },
12493 },
12494 {
12495 name: "SETAEstoreidx1",
12496 auxType: auxSymOff,
12497 argLen: 4,
12498 commutative: true,
12499 symEffect: SymWrite,
12500 asm: x86.ASETCC,
12501 scale: 1,
12502 reg: regInfo{
12503 inputs: []inputInfo{
12504 {1, 49151},
12505 {0, 4295032831},
12506 },
12507 },
12508 },
12509 {
12510 name: "SETEQF",
12511 argLen: 1,
12512 clobberFlags: true,
12513 needIntTemp: true,
12514 asm: x86.ASETEQ,
12515 reg: regInfo{
12516 outputs: []outputInfo{
12517 {0, 49135},
12518 },
12519 },
12520 },
12521 {
12522 name: "SETNEF",
12523 argLen: 1,
12524 clobberFlags: true,
12525 needIntTemp: true,
12526 asm: x86.ASETNE,
12527 reg: regInfo{
12528 outputs: []outputInfo{
12529 {0, 49135},
12530 },
12531 },
12532 },
12533 {
12534 name: "SETORD",
12535 argLen: 1,
12536 asm: x86.ASETPC,
12537 reg: regInfo{
12538 outputs: []outputInfo{
12539 {0, 49135},
12540 },
12541 },
12542 },
12543 {
12544 name: "SETNAN",
12545 argLen: 1,
12546 asm: x86.ASETPS,
12547 reg: regInfo{
12548 outputs: []outputInfo{
12549 {0, 49135},
12550 },
12551 },
12552 },
12553 {
12554 name: "SETGF",
12555 argLen: 1,
12556 asm: x86.ASETHI,
12557 reg: regInfo{
12558 outputs: []outputInfo{
12559 {0, 49135},
12560 },
12561 },
12562 },
12563 {
12564 name: "SETGEF",
12565 argLen: 1,
12566 asm: x86.ASETCC,
12567 reg: regInfo{
12568 outputs: []outputInfo{
12569 {0, 49135},
12570 },
12571 },
12572 },
12573 {
12574 name: "MOVBQSX",
12575 argLen: 1,
12576 asm: x86.AMOVBQSX,
12577 reg: regInfo{
12578 inputs: []inputInfo{
12579 {0, 49135},
12580 },
12581 outputs: []outputInfo{
12582 {0, 49135},
12583 },
12584 },
12585 },
12586 {
12587 name: "MOVBQZX",
12588 argLen: 1,
12589 asm: x86.AMOVBLZX,
12590 reg: regInfo{
12591 inputs: []inputInfo{
12592 {0, 49135},
12593 },
12594 outputs: []outputInfo{
12595 {0, 49135},
12596 },
12597 },
12598 },
12599 {
12600 name: "MOVWQSX",
12601 argLen: 1,
12602 asm: x86.AMOVWQSX,
12603 reg: regInfo{
12604 inputs: []inputInfo{
12605 {0, 49135},
12606 },
12607 outputs: []outputInfo{
12608 {0, 49135},
12609 },
12610 },
12611 },
12612 {
12613 name: "MOVWQZX",
12614 argLen: 1,
12615 asm: x86.AMOVWLZX,
12616 reg: regInfo{
12617 inputs: []inputInfo{
12618 {0, 49135},
12619 },
12620 outputs: []outputInfo{
12621 {0, 49135},
12622 },
12623 },
12624 },
12625 {
12626 name: "MOVLQSX",
12627 argLen: 1,
12628 asm: x86.AMOVLQSX,
12629 reg: regInfo{
12630 inputs: []inputInfo{
12631 {0, 49135},
12632 },
12633 outputs: []outputInfo{
12634 {0, 49135},
12635 },
12636 },
12637 },
12638 {
12639 name: "MOVLQZX",
12640 argLen: 1,
12641 asm: x86.AMOVL,
12642 reg: regInfo{
12643 inputs: []inputInfo{
12644 {0, 49135},
12645 },
12646 outputs: []outputInfo{
12647 {0, 49135},
12648 },
12649 },
12650 },
12651 {
12652 name: "MOVLconst",
12653 auxType: auxInt32,
12654 argLen: 0,
12655 rematerializeable: true,
12656 asm: x86.AMOVL,
12657 reg: regInfo{
12658 outputs: []outputInfo{
12659 {0, 49135},
12660 },
12661 },
12662 },
12663 {
12664 name: "MOVQconst",
12665 auxType: auxInt64,
12666 argLen: 0,
12667 rematerializeable: true,
12668 asm: x86.AMOVQ,
12669 reg: regInfo{
12670 outputs: []outputInfo{
12671 {0, 49135},
12672 },
12673 },
12674 },
12675 {
12676 name: "CVTTSD2SL",
12677 argLen: 1,
12678 asm: x86.ACVTTSD2SL,
12679 reg: regInfo{
12680 inputs: []inputInfo{
12681 {0, 2147418112},
12682 },
12683 outputs: []outputInfo{
12684 {0, 49135},
12685 },
12686 },
12687 },
12688 {
12689 name: "CVTTSD2SQ",
12690 argLen: 1,
12691 asm: x86.ACVTTSD2SQ,
12692 reg: regInfo{
12693 inputs: []inputInfo{
12694 {0, 2147418112},
12695 },
12696 outputs: []outputInfo{
12697 {0, 49135},
12698 },
12699 },
12700 },
12701 {
12702 name: "CVTTSS2SL",
12703 argLen: 1,
12704 asm: x86.ACVTTSS2SL,
12705 reg: regInfo{
12706 inputs: []inputInfo{
12707 {0, 2147418112},
12708 },
12709 outputs: []outputInfo{
12710 {0, 49135},
12711 },
12712 },
12713 },
12714 {
12715 name: "CVTTSS2SQ",
12716 argLen: 1,
12717 asm: x86.ACVTTSS2SQ,
12718 reg: regInfo{
12719 inputs: []inputInfo{
12720 {0, 2147418112},
12721 },
12722 outputs: []outputInfo{
12723 {0, 49135},
12724 },
12725 },
12726 },
12727 {
12728 name: "CVTSL2SS",
12729 argLen: 1,
12730 asm: x86.ACVTSL2SS,
12731 reg: regInfo{
12732 inputs: []inputInfo{
12733 {0, 49135},
12734 },
12735 outputs: []outputInfo{
12736 {0, 2147418112},
12737 },
12738 },
12739 },
12740 {
12741 name: "CVTSL2SD",
12742 argLen: 1,
12743 asm: x86.ACVTSL2SD,
12744 reg: regInfo{
12745 inputs: []inputInfo{
12746 {0, 49135},
12747 },
12748 outputs: []outputInfo{
12749 {0, 2147418112},
12750 },
12751 },
12752 },
12753 {
12754 name: "CVTSQ2SS",
12755 argLen: 1,
12756 asm: x86.ACVTSQ2SS,
12757 reg: regInfo{
12758 inputs: []inputInfo{
12759 {0, 49135},
12760 },
12761 outputs: []outputInfo{
12762 {0, 2147418112},
12763 },
12764 },
12765 },
12766 {
12767 name: "CVTSQ2SD",
12768 argLen: 1,
12769 asm: x86.ACVTSQ2SD,
12770 reg: regInfo{
12771 inputs: []inputInfo{
12772 {0, 49135},
12773 },
12774 outputs: []outputInfo{
12775 {0, 2147418112},
12776 },
12777 },
12778 },
12779 {
12780 name: "CVTSD2SS",
12781 argLen: 1,
12782 asm: x86.ACVTSD2SS,
12783 reg: regInfo{
12784 inputs: []inputInfo{
12785 {0, 2147418112},
12786 },
12787 outputs: []outputInfo{
12788 {0, 2147418112},
12789 },
12790 },
12791 },
12792 {
12793 name: "CVTSS2SD",
12794 argLen: 1,
12795 asm: x86.ACVTSS2SD,
12796 reg: regInfo{
12797 inputs: []inputInfo{
12798 {0, 2147418112},
12799 },
12800 outputs: []outputInfo{
12801 {0, 2147418112},
12802 },
12803 },
12804 },
12805 {
12806 name: "MOVQi2f",
12807 argLen: 1,
12808 reg: regInfo{
12809 inputs: []inputInfo{
12810 {0, 49135},
12811 },
12812 outputs: []outputInfo{
12813 {0, 2147418112},
12814 },
12815 },
12816 },
12817 {
12818 name: "MOVQf2i",
12819 argLen: 1,
12820 reg: regInfo{
12821 inputs: []inputInfo{
12822 {0, 2147418112},
12823 },
12824 outputs: []outputInfo{
12825 {0, 49135},
12826 },
12827 },
12828 },
12829 {
12830 name: "MOVLi2f",
12831 argLen: 1,
12832 reg: regInfo{
12833 inputs: []inputInfo{
12834 {0, 49135},
12835 },
12836 outputs: []outputInfo{
12837 {0, 2147418112},
12838 },
12839 },
12840 },
12841 {
12842 name: "MOVLf2i",
12843 argLen: 1,
12844 reg: regInfo{
12845 inputs: []inputInfo{
12846 {0, 2147418112},
12847 },
12848 outputs: []outputInfo{
12849 {0, 49135},
12850 },
12851 },
12852 },
12853 {
12854 name: "PXOR",
12855 argLen: 2,
12856 commutative: true,
12857 resultInArg0: true,
12858 asm: x86.APXOR,
12859 reg: regInfo{
12860 inputs: []inputInfo{
12861 {0, 2147418112},
12862 {1, 2147418112},
12863 },
12864 outputs: []outputInfo{
12865 {0, 2147418112},
12866 },
12867 },
12868 },
12869 {
12870 name: "POR",
12871 argLen: 2,
12872 commutative: true,
12873 resultInArg0: true,
12874 asm: x86.APOR,
12875 reg: regInfo{
12876 inputs: []inputInfo{
12877 {0, 2147418112},
12878 {1, 2147418112},
12879 },
12880 outputs: []outputInfo{
12881 {0, 2147418112},
12882 },
12883 },
12884 },
12885 {
12886 name: "LEAQ",
12887 auxType: auxSymOff,
12888 argLen: 1,
12889 rematerializeable: true,
12890 symEffect: SymAddr,
12891 asm: x86.ALEAQ,
12892 reg: regInfo{
12893 inputs: []inputInfo{
12894 {0, 4295032831},
12895 },
12896 outputs: []outputInfo{
12897 {0, 49135},
12898 },
12899 },
12900 },
12901 {
12902 name: "LEAL",
12903 auxType: auxSymOff,
12904 argLen: 1,
12905 rematerializeable: true,
12906 symEffect: SymAddr,
12907 asm: x86.ALEAL,
12908 reg: regInfo{
12909 inputs: []inputInfo{
12910 {0, 4295032831},
12911 },
12912 outputs: []outputInfo{
12913 {0, 49135},
12914 },
12915 },
12916 },
12917 {
12918 name: "LEAW",
12919 auxType: auxSymOff,
12920 argLen: 1,
12921 rematerializeable: true,
12922 symEffect: SymAddr,
12923 asm: x86.ALEAW,
12924 reg: regInfo{
12925 inputs: []inputInfo{
12926 {0, 4295032831},
12927 },
12928 outputs: []outputInfo{
12929 {0, 49135},
12930 },
12931 },
12932 },
12933 {
12934 name: "LEAQ1",
12935 auxType: auxSymOff,
12936 argLen: 2,
12937 commutative: true,
12938 symEffect: SymAddr,
12939 asm: x86.ALEAQ,
12940 scale: 1,
12941 reg: regInfo{
12942 inputs: []inputInfo{
12943 {1, 49151},
12944 {0, 4295032831},
12945 },
12946 outputs: []outputInfo{
12947 {0, 49135},
12948 },
12949 },
12950 },
12951 {
12952 name: "LEAL1",
12953 auxType: auxSymOff,
12954 argLen: 2,
12955 commutative: true,
12956 symEffect: SymAddr,
12957 asm: x86.ALEAL,
12958 scale: 1,
12959 reg: regInfo{
12960 inputs: []inputInfo{
12961 {1, 49151},
12962 {0, 4295032831},
12963 },
12964 outputs: []outputInfo{
12965 {0, 49135},
12966 },
12967 },
12968 },
12969 {
12970 name: "LEAW1",
12971 auxType: auxSymOff,
12972 argLen: 2,
12973 commutative: true,
12974 symEffect: SymAddr,
12975 asm: x86.ALEAW,
12976 scale: 1,
12977 reg: regInfo{
12978 inputs: []inputInfo{
12979 {1, 49151},
12980 {0, 4295032831},
12981 },
12982 outputs: []outputInfo{
12983 {0, 49135},
12984 },
12985 },
12986 },
12987 {
12988 name: "LEAQ2",
12989 auxType: auxSymOff,
12990 argLen: 2,
12991 symEffect: SymAddr,
12992 asm: x86.ALEAQ,
12993 scale: 2,
12994 reg: regInfo{
12995 inputs: []inputInfo{
12996 {1, 49151},
12997 {0, 4295032831},
12998 },
12999 outputs: []outputInfo{
13000 {0, 49135},
13001 },
13002 },
13003 },
13004 {
13005 name: "LEAL2",
13006 auxType: auxSymOff,
13007 argLen: 2,
13008 symEffect: SymAddr,
13009 asm: x86.ALEAL,
13010 scale: 2,
13011 reg: regInfo{
13012 inputs: []inputInfo{
13013 {1, 49151},
13014 {0, 4295032831},
13015 },
13016 outputs: []outputInfo{
13017 {0, 49135},
13018 },
13019 },
13020 },
13021 {
13022 name: "LEAW2",
13023 auxType: auxSymOff,
13024 argLen: 2,
13025 symEffect: SymAddr,
13026 asm: x86.ALEAW,
13027 scale: 2,
13028 reg: regInfo{
13029 inputs: []inputInfo{
13030 {1, 49151},
13031 {0, 4295032831},
13032 },
13033 outputs: []outputInfo{
13034 {0, 49135},
13035 },
13036 },
13037 },
13038 {
13039 name: "LEAQ4",
13040 auxType: auxSymOff,
13041 argLen: 2,
13042 symEffect: SymAddr,
13043 asm: x86.ALEAQ,
13044 scale: 4,
13045 reg: regInfo{
13046 inputs: []inputInfo{
13047 {1, 49151},
13048 {0, 4295032831},
13049 },
13050 outputs: []outputInfo{
13051 {0, 49135},
13052 },
13053 },
13054 },
13055 {
13056 name: "LEAL4",
13057 auxType: auxSymOff,
13058 argLen: 2,
13059 symEffect: SymAddr,
13060 asm: x86.ALEAL,
13061 scale: 4,
13062 reg: regInfo{
13063 inputs: []inputInfo{
13064 {1, 49151},
13065 {0, 4295032831},
13066 },
13067 outputs: []outputInfo{
13068 {0, 49135},
13069 },
13070 },
13071 },
13072 {
13073 name: "LEAW4",
13074 auxType: auxSymOff,
13075 argLen: 2,
13076 symEffect: SymAddr,
13077 asm: x86.ALEAW,
13078 scale: 4,
13079 reg: regInfo{
13080 inputs: []inputInfo{
13081 {1, 49151},
13082 {0, 4295032831},
13083 },
13084 outputs: []outputInfo{
13085 {0, 49135},
13086 },
13087 },
13088 },
13089 {
13090 name: "LEAQ8",
13091 auxType: auxSymOff,
13092 argLen: 2,
13093 symEffect: SymAddr,
13094 asm: x86.ALEAQ,
13095 scale: 8,
13096 reg: regInfo{
13097 inputs: []inputInfo{
13098 {1, 49151},
13099 {0, 4295032831},
13100 },
13101 outputs: []outputInfo{
13102 {0, 49135},
13103 },
13104 },
13105 },
13106 {
13107 name: "LEAL8",
13108 auxType: auxSymOff,
13109 argLen: 2,
13110 symEffect: SymAddr,
13111 asm: x86.ALEAL,
13112 scale: 8,
13113 reg: regInfo{
13114 inputs: []inputInfo{
13115 {1, 49151},
13116 {0, 4295032831},
13117 },
13118 outputs: []outputInfo{
13119 {0, 49135},
13120 },
13121 },
13122 },
13123 {
13124 name: "LEAW8",
13125 auxType: auxSymOff,
13126 argLen: 2,
13127 symEffect: SymAddr,
13128 asm: x86.ALEAW,
13129 scale: 8,
13130 reg: regInfo{
13131 inputs: []inputInfo{
13132 {1, 49151},
13133 {0, 4295032831},
13134 },
13135 outputs: []outputInfo{
13136 {0, 49135},
13137 },
13138 },
13139 },
13140 {
13141 name: "MOVBload",
13142 auxType: auxSymOff,
13143 argLen: 2,
13144 faultOnNilArg0: true,
13145 symEffect: SymRead,
13146 asm: x86.AMOVBLZX,
13147 reg: regInfo{
13148 inputs: []inputInfo{
13149 {0, 4295032831},
13150 },
13151 outputs: []outputInfo{
13152 {0, 49135},
13153 },
13154 },
13155 },
13156 {
13157 name: "MOVBQSXload",
13158 auxType: auxSymOff,
13159 argLen: 2,
13160 faultOnNilArg0: true,
13161 symEffect: SymRead,
13162 asm: x86.AMOVBQSX,
13163 reg: regInfo{
13164 inputs: []inputInfo{
13165 {0, 4295032831},
13166 },
13167 outputs: []outputInfo{
13168 {0, 49135},
13169 },
13170 },
13171 },
13172 {
13173 name: "MOVWload",
13174 auxType: auxSymOff,
13175 argLen: 2,
13176 faultOnNilArg0: true,
13177 symEffect: SymRead,
13178 asm: x86.AMOVWLZX,
13179 reg: regInfo{
13180 inputs: []inputInfo{
13181 {0, 4295032831},
13182 },
13183 outputs: []outputInfo{
13184 {0, 49135},
13185 },
13186 },
13187 },
13188 {
13189 name: "MOVWQSXload",
13190 auxType: auxSymOff,
13191 argLen: 2,
13192 faultOnNilArg0: true,
13193 symEffect: SymRead,
13194 asm: x86.AMOVWQSX,
13195 reg: regInfo{
13196 inputs: []inputInfo{
13197 {0, 4295032831},
13198 },
13199 outputs: []outputInfo{
13200 {0, 49135},
13201 },
13202 },
13203 },
13204 {
13205 name: "MOVLload",
13206 auxType: auxSymOff,
13207 argLen: 2,
13208 faultOnNilArg0: true,
13209 symEffect: SymRead,
13210 asm: x86.AMOVL,
13211 reg: regInfo{
13212 inputs: []inputInfo{
13213 {0, 4295032831},
13214 },
13215 outputs: []outputInfo{
13216 {0, 49135},
13217 },
13218 },
13219 },
13220 {
13221 name: "MOVLQSXload",
13222 auxType: auxSymOff,
13223 argLen: 2,
13224 faultOnNilArg0: true,
13225 symEffect: SymRead,
13226 asm: x86.AMOVLQSX,
13227 reg: regInfo{
13228 inputs: []inputInfo{
13229 {0, 4295032831},
13230 },
13231 outputs: []outputInfo{
13232 {0, 49135},
13233 },
13234 },
13235 },
13236 {
13237 name: "MOVQload",
13238 auxType: auxSymOff,
13239 argLen: 2,
13240 faultOnNilArg0: true,
13241 symEffect: SymRead,
13242 asm: x86.AMOVQ,
13243 reg: regInfo{
13244 inputs: []inputInfo{
13245 {0, 4295032831},
13246 },
13247 outputs: []outputInfo{
13248 {0, 49135},
13249 },
13250 },
13251 },
13252 {
13253 name: "MOVBstore",
13254 auxType: auxSymOff,
13255 argLen: 3,
13256 faultOnNilArg0: true,
13257 symEffect: SymWrite,
13258 asm: x86.AMOVB,
13259 reg: regInfo{
13260 inputs: []inputInfo{
13261 {1, 49151},
13262 {0, 4295032831},
13263 },
13264 },
13265 },
13266 {
13267 name: "MOVWstore",
13268 auxType: auxSymOff,
13269 argLen: 3,
13270 faultOnNilArg0: true,
13271 symEffect: SymWrite,
13272 asm: x86.AMOVW,
13273 reg: regInfo{
13274 inputs: []inputInfo{
13275 {1, 49151},
13276 {0, 4295032831},
13277 },
13278 },
13279 },
13280 {
13281 name: "MOVLstore",
13282 auxType: auxSymOff,
13283 argLen: 3,
13284 faultOnNilArg0: true,
13285 symEffect: SymWrite,
13286 asm: x86.AMOVL,
13287 reg: regInfo{
13288 inputs: []inputInfo{
13289 {1, 49151},
13290 {0, 4295032831},
13291 },
13292 },
13293 },
13294 {
13295 name: "MOVQstore",
13296 auxType: auxSymOff,
13297 argLen: 3,
13298 faultOnNilArg0: true,
13299 symEffect: SymWrite,
13300 asm: x86.AMOVQ,
13301 reg: regInfo{
13302 inputs: []inputInfo{
13303 {1, 49151},
13304 {0, 4295032831},
13305 },
13306 },
13307 },
13308 {
13309 name: "MOVOload",
13310 auxType: auxSymOff,
13311 argLen: 2,
13312 faultOnNilArg0: true,
13313 symEffect: SymRead,
13314 asm: x86.AMOVUPS,
13315 reg: regInfo{
13316 inputs: []inputInfo{
13317 {0, 4295016447},
13318 },
13319 outputs: []outputInfo{
13320 {0, 2147418112},
13321 },
13322 },
13323 },
13324 {
13325 name: "MOVOstore",
13326 auxType: auxSymOff,
13327 argLen: 3,
13328 faultOnNilArg0: true,
13329 symEffect: SymWrite,
13330 asm: x86.AMOVUPS,
13331 reg: regInfo{
13332 inputs: []inputInfo{
13333 {1, 2147418112},
13334 {0, 4295016447},
13335 },
13336 },
13337 },
13338 {
13339 name: "MOVBloadidx1",
13340 auxType: auxSymOff,
13341 argLen: 3,
13342 commutative: true,
13343 symEffect: SymRead,
13344 asm: x86.AMOVBLZX,
13345 scale: 1,
13346 reg: regInfo{
13347 inputs: []inputInfo{
13348 {1, 49151},
13349 {0, 4295032831},
13350 },
13351 outputs: []outputInfo{
13352 {0, 49135},
13353 },
13354 },
13355 },
13356 {
13357 name: "MOVWloadidx1",
13358 auxType: auxSymOff,
13359 argLen: 3,
13360 commutative: true,
13361 symEffect: SymRead,
13362 asm: x86.AMOVWLZX,
13363 scale: 1,
13364 reg: regInfo{
13365 inputs: []inputInfo{
13366 {1, 49151},
13367 {0, 4295032831},
13368 },
13369 outputs: []outputInfo{
13370 {0, 49135},
13371 },
13372 },
13373 },
13374 {
13375 name: "MOVWloadidx2",
13376 auxType: auxSymOff,
13377 argLen: 3,
13378 symEffect: SymRead,
13379 asm: x86.AMOVWLZX,
13380 scale: 2,
13381 reg: regInfo{
13382 inputs: []inputInfo{
13383 {1, 49151},
13384 {0, 4295032831},
13385 },
13386 outputs: []outputInfo{
13387 {0, 49135},
13388 },
13389 },
13390 },
13391 {
13392 name: "MOVLloadidx1",
13393 auxType: auxSymOff,
13394 argLen: 3,
13395 commutative: true,
13396 symEffect: SymRead,
13397 asm: x86.AMOVL,
13398 scale: 1,
13399 reg: regInfo{
13400 inputs: []inputInfo{
13401 {1, 49151},
13402 {0, 4295032831},
13403 },
13404 outputs: []outputInfo{
13405 {0, 49135},
13406 },
13407 },
13408 },
13409 {
13410 name: "MOVLloadidx4",
13411 auxType: auxSymOff,
13412 argLen: 3,
13413 symEffect: SymRead,
13414 asm: x86.AMOVL,
13415 scale: 4,
13416 reg: regInfo{
13417 inputs: []inputInfo{
13418 {1, 49151},
13419 {0, 4295032831},
13420 },
13421 outputs: []outputInfo{
13422 {0, 49135},
13423 },
13424 },
13425 },
13426 {
13427 name: "MOVLloadidx8",
13428 auxType: auxSymOff,
13429 argLen: 3,
13430 symEffect: SymRead,
13431 asm: x86.AMOVL,
13432 scale: 8,
13433 reg: regInfo{
13434 inputs: []inputInfo{
13435 {1, 49151},
13436 {0, 4295032831},
13437 },
13438 outputs: []outputInfo{
13439 {0, 49135},
13440 },
13441 },
13442 },
13443 {
13444 name: "MOVQloadidx1",
13445 auxType: auxSymOff,
13446 argLen: 3,
13447 commutative: true,
13448 symEffect: SymRead,
13449 asm: x86.AMOVQ,
13450 scale: 1,
13451 reg: regInfo{
13452 inputs: []inputInfo{
13453 {1, 49151},
13454 {0, 4295032831},
13455 },
13456 outputs: []outputInfo{
13457 {0, 49135},
13458 },
13459 },
13460 },
13461 {
13462 name: "MOVQloadidx8",
13463 auxType: auxSymOff,
13464 argLen: 3,
13465 symEffect: SymRead,
13466 asm: x86.AMOVQ,
13467 scale: 8,
13468 reg: regInfo{
13469 inputs: []inputInfo{
13470 {1, 49151},
13471 {0, 4295032831},
13472 },
13473 outputs: []outputInfo{
13474 {0, 49135},
13475 },
13476 },
13477 },
13478 {
13479 name: "MOVBstoreidx1",
13480 auxType: auxSymOff,
13481 argLen: 4,
13482 commutative: true,
13483 symEffect: SymWrite,
13484 asm: x86.AMOVB,
13485 scale: 1,
13486 reg: regInfo{
13487 inputs: []inputInfo{
13488 {1, 49151},
13489 {2, 49151},
13490 {0, 4295032831},
13491 },
13492 },
13493 },
13494 {
13495 name: "MOVWstoreidx1",
13496 auxType: auxSymOff,
13497 argLen: 4,
13498 commutative: true,
13499 symEffect: SymWrite,
13500 asm: x86.AMOVW,
13501 scale: 1,
13502 reg: regInfo{
13503 inputs: []inputInfo{
13504 {1, 49151},
13505 {2, 49151},
13506 {0, 4295032831},
13507 },
13508 },
13509 },
13510 {
13511 name: "MOVWstoreidx2",
13512 auxType: auxSymOff,
13513 argLen: 4,
13514 symEffect: SymWrite,
13515 asm: x86.AMOVW,
13516 scale: 2,
13517 reg: regInfo{
13518 inputs: []inputInfo{
13519 {1, 49151},
13520 {2, 49151},
13521 {0, 4295032831},
13522 },
13523 },
13524 },
13525 {
13526 name: "MOVLstoreidx1",
13527 auxType: auxSymOff,
13528 argLen: 4,
13529 commutative: true,
13530 symEffect: SymWrite,
13531 asm: x86.AMOVL,
13532 scale: 1,
13533 reg: regInfo{
13534 inputs: []inputInfo{
13535 {1, 49151},
13536 {2, 49151},
13537 {0, 4295032831},
13538 },
13539 },
13540 },
13541 {
13542 name: "MOVLstoreidx4",
13543 auxType: auxSymOff,
13544 argLen: 4,
13545 symEffect: SymWrite,
13546 asm: x86.AMOVL,
13547 scale: 4,
13548 reg: regInfo{
13549 inputs: []inputInfo{
13550 {1, 49151},
13551 {2, 49151},
13552 {0, 4295032831},
13553 },
13554 },
13555 },
13556 {
13557 name: "MOVLstoreidx8",
13558 auxType: auxSymOff,
13559 argLen: 4,
13560 symEffect: SymWrite,
13561 asm: x86.AMOVL,
13562 scale: 8,
13563 reg: regInfo{
13564 inputs: []inputInfo{
13565 {1, 49151},
13566 {2, 49151},
13567 {0, 4295032831},
13568 },
13569 },
13570 },
13571 {
13572 name: "MOVQstoreidx1",
13573 auxType: auxSymOff,
13574 argLen: 4,
13575 commutative: true,
13576 symEffect: SymWrite,
13577 asm: x86.AMOVQ,
13578 scale: 1,
13579 reg: regInfo{
13580 inputs: []inputInfo{
13581 {1, 49151},
13582 {2, 49151},
13583 {0, 4295032831},
13584 },
13585 },
13586 },
13587 {
13588 name: "MOVQstoreidx8",
13589 auxType: auxSymOff,
13590 argLen: 4,
13591 symEffect: SymWrite,
13592 asm: x86.AMOVQ,
13593 scale: 8,
13594 reg: regInfo{
13595 inputs: []inputInfo{
13596 {1, 49151},
13597 {2, 49151},
13598 {0, 4295032831},
13599 },
13600 },
13601 },
13602 {
13603 name: "MOVBstoreconst",
13604 auxType: auxSymValAndOff,
13605 argLen: 2,
13606 faultOnNilArg0: true,
13607 symEffect: SymWrite,
13608 asm: x86.AMOVB,
13609 reg: regInfo{
13610 inputs: []inputInfo{
13611 {0, 4295032831},
13612 },
13613 },
13614 },
13615 {
13616 name: "MOVWstoreconst",
13617 auxType: auxSymValAndOff,
13618 argLen: 2,
13619 faultOnNilArg0: true,
13620 symEffect: SymWrite,
13621 asm: x86.AMOVW,
13622 reg: regInfo{
13623 inputs: []inputInfo{
13624 {0, 4295032831},
13625 },
13626 },
13627 },
13628 {
13629 name: "MOVLstoreconst",
13630 auxType: auxSymValAndOff,
13631 argLen: 2,
13632 faultOnNilArg0: true,
13633 symEffect: SymWrite,
13634 asm: x86.AMOVL,
13635 reg: regInfo{
13636 inputs: []inputInfo{
13637 {0, 4295032831},
13638 },
13639 },
13640 },
13641 {
13642 name: "MOVQstoreconst",
13643 auxType: auxSymValAndOff,
13644 argLen: 2,
13645 faultOnNilArg0: true,
13646 symEffect: SymWrite,
13647 asm: x86.AMOVQ,
13648 reg: regInfo{
13649 inputs: []inputInfo{
13650 {0, 4295032831},
13651 },
13652 },
13653 },
13654 {
13655 name: "MOVOstoreconst",
13656 auxType: auxSymValAndOff,
13657 argLen: 2,
13658 faultOnNilArg0: true,
13659 symEffect: SymWrite,
13660 asm: x86.AMOVUPS,
13661 reg: regInfo{
13662 inputs: []inputInfo{
13663 {0, 4295032831},
13664 },
13665 },
13666 },
13667 {
13668 name: "MOVBstoreconstidx1",
13669 auxType: auxSymValAndOff,
13670 argLen: 3,
13671 commutative: true,
13672 symEffect: SymWrite,
13673 asm: x86.AMOVB,
13674 scale: 1,
13675 reg: regInfo{
13676 inputs: []inputInfo{
13677 {1, 49151},
13678 {0, 4295032831},
13679 },
13680 },
13681 },
13682 {
13683 name: "MOVWstoreconstidx1",
13684 auxType: auxSymValAndOff,
13685 argLen: 3,
13686 commutative: true,
13687 symEffect: SymWrite,
13688 asm: x86.AMOVW,
13689 scale: 1,
13690 reg: regInfo{
13691 inputs: []inputInfo{
13692 {1, 49151},
13693 {0, 4295032831},
13694 },
13695 },
13696 },
13697 {
13698 name: "MOVWstoreconstidx2",
13699 auxType: auxSymValAndOff,
13700 argLen: 3,
13701 symEffect: SymWrite,
13702 asm: x86.AMOVW,
13703 scale: 2,
13704 reg: regInfo{
13705 inputs: []inputInfo{
13706 {1, 49151},
13707 {0, 4295032831},
13708 },
13709 },
13710 },
13711 {
13712 name: "MOVLstoreconstidx1",
13713 auxType: auxSymValAndOff,
13714 argLen: 3,
13715 commutative: true,
13716 symEffect: SymWrite,
13717 asm: x86.AMOVL,
13718 scale: 1,
13719 reg: regInfo{
13720 inputs: []inputInfo{
13721 {1, 49151},
13722 {0, 4295032831},
13723 },
13724 },
13725 },
13726 {
13727 name: "MOVLstoreconstidx4",
13728 auxType: auxSymValAndOff,
13729 argLen: 3,
13730 symEffect: SymWrite,
13731 asm: x86.AMOVL,
13732 scale: 4,
13733 reg: regInfo{
13734 inputs: []inputInfo{
13735 {1, 49151},
13736 {0, 4295032831},
13737 },
13738 },
13739 },
13740 {
13741 name: "MOVQstoreconstidx1",
13742 auxType: auxSymValAndOff,
13743 argLen: 3,
13744 commutative: true,
13745 symEffect: SymWrite,
13746 asm: x86.AMOVQ,
13747 scale: 1,
13748 reg: regInfo{
13749 inputs: []inputInfo{
13750 {1, 49151},
13751 {0, 4295032831},
13752 },
13753 },
13754 },
13755 {
13756 name: "MOVQstoreconstidx8",
13757 auxType: auxSymValAndOff,
13758 argLen: 3,
13759 symEffect: SymWrite,
13760 asm: x86.AMOVQ,
13761 scale: 8,
13762 reg: regInfo{
13763 inputs: []inputInfo{
13764 {1, 49151},
13765 {0, 4295032831},
13766 },
13767 },
13768 },
13769 {
13770 name: "DUFFZERO",
13771 auxType: auxInt64,
13772 argLen: 2,
13773 faultOnNilArg0: true,
13774 unsafePoint: true,
13775 reg: regInfo{
13776 inputs: []inputInfo{
13777 {0, 128},
13778 },
13779 clobbers: 128,
13780 },
13781 },
13782 {
13783 name: "REPSTOSQ",
13784 argLen: 4,
13785 faultOnNilArg0: true,
13786 reg: regInfo{
13787 inputs: []inputInfo{
13788 {0, 128},
13789 {1, 2},
13790 {2, 1},
13791 },
13792 clobbers: 130,
13793 },
13794 },
13795 {
13796 name: "CALLstatic",
13797 auxType: auxCallOff,
13798 argLen: -1,
13799 clobberFlags: true,
13800 call: true,
13801 reg: regInfo{
13802 clobbers: 2147483631,
13803 },
13804 },
13805 {
13806 name: "CALLtail",
13807 auxType: auxCallOff,
13808 argLen: -1,
13809 clobberFlags: true,
13810 call: true,
13811 tailCall: true,
13812 reg: regInfo{
13813 clobbers: 2147483631,
13814 },
13815 },
13816 {
13817 name: "CALLclosure",
13818 auxType: auxCallOff,
13819 argLen: -1,
13820 clobberFlags: true,
13821 call: true,
13822 reg: regInfo{
13823 inputs: []inputInfo{
13824 {1, 4},
13825 {0, 49151},
13826 },
13827 clobbers: 2147483631,
13828 },
13829 },
13830 {
13831 name: "CALLinter",
13832 auxType: auxCallOff,
13833 argLen: -1,
13834 clobberFlags: true,
13835 call: true,
13836 reg: regInfo{
13837 inputs: []inputInfo{
13838 {0, 49135},
13839 },
13840 clobbers: 2147483631,
13841 },
13842 },
13843 {
13844 name: "DUFFCOPY",
13845 auxType: auxInt64,
13846 argLen: 3,
13847 clobberFlags: true,
13848 faultOnNilArg0: true,
13849 faultOnNilArg1: true,
13850 unsafePoint: true,
13851 reg: regInfo{
13852 inputs: []inputInfo{
13853 {0, 128},
13854 {1, 64},
13855 },
13856 clobbers: 65728,
13857 },
13858 },
13859 {
13860 name: "REPMOVSQ",
13861 argLen: 4,
13862 faultOnNilArg0: true,
13863 faultOnNilArg1: true,
13864 reg: regInfo{
13865 inputs: []inputInfo{
13866 {0, 128},
13867 {1, 64},
13868 {2, 2},
13869 },
13870 clobbers: 194,
13871 },
13872 },
13873 {
13874 name: "InvertFlags",
13875 argLen: 1,
13876 reg: regInfo{},
13877 },
13878 {
13879 name: "LoweredGetG",
13880 argLen: 1,
13881 reg: regInfo{
13882 outputs: []outputInfo{
13883 {0, 49135},
13884 },
13885 },
13886 },
13887 {
13888 name: "LoweredGetClosurePtr",
13889 argLen: 0,
13890 zeroWidth: true,
13891 reg: regInfo{
13892 outputs: []outputInfo{
13893 {0, 4},
13894 },
13895 },
13896 },
13897 {
13898 name: "LoweredGetCallerPC",
13899 argLen: 0,
13900 rematerializeable: true,
13901 reg: regInfo{
13902 outputs: []outputInfo{
13903 {0, 49135},
13904 },
13905 },
13906 },
13907 {
13908 name: "LoweredGetCallerSP",
13909 argLen: 1,
13910 rematerializeable: true,
13911 reg: regInfo{
13912 outputs: []outputInfo{
13913 {0, 49135},
13914 },
13915 },
13916 },
13917 {
13918 name: "LoweredNilCheck",
13919 argLen: 2,
13920 clobberFlags: true,
13921 nilCheck: true,
13922 faultOnNilArg0: true,
13923 reg: regInfo{
13924 inputs: []inputInfo{
13925 {0, 49151},
13926 },
13927 },
13928 },
13929 {
13930 name: "LoweredWB",
13931 auxType: auxInt64,
13932 argLen: 1,
13933 clobberFlags: true,
13934 reg: regInfo{
13935 clobbers: 2147418112,
13936 outputs: []outputInfo{
13937 {0, 2048},
13938 },
13939 },
13940 },
13941 {
13942 name: "LoweredHasCPUFeature",
13943 auxType: auxSym,
13944 argLen: 0,
13945 rematerializeable: true,
13946 symEffect: SymNone,
13947 reg: regInfo{
13948 outputs: []outputInfo{
13949 {0, 49135},
13950 },
13951 },
13952 },
13953 {
13954 name: "LoweredPanicBoundsA",
13955 auxType: auxInt64,
13956 argLen: 3,
13957 call: true,
13958 reg: regInfo{
13959 inputs: []inputInfo{
13960 {0, 4},
13961 {1, 8},
13962 },
13963 },
13964 },
13965 {
13966 name: "LoweredPanicBoundsB",
13967 auxType: auxInt64,
13968 argLen: 3,
13969 call: true,
13970 reg: regInfo{
13971 inputs: []inputInfo{
13972 {0, 2},
13973 {1, 4},
13974 },
13975 },
13976 },
13977 {
13978 name: "LoweredPanicBoundsC",
13979 auxType: auxInt64,
13980 argLen: 3,
13981 call: true,
13982 reg: regInfo{
13983 inputs: []inputInfo{
13984 {0, 1},
13985 {1, 2},
13986 },
13987 },
13988 },
13989 {
13990 name: "FlagEQ",
13991 argLen: 0,
13992 reg: regInfo{},
13993 },
13994 {
13995 name: "FlagLT_ULT",
13996 argLen: 0,
13997 reg: regInfo{},
13998 },
13999 {
14000 name: "FlagLT_UGT",
14001 argLen: 0,
14002 reg: regInfo{},
14003 },
14004 {
14005 name: "FlagGT_UGT",
14006 argLen: 0,
14007 reg: regInfo{},
14008 },
14009 {
14010 name: "FlagGT_ULT",
14011 argLen: 0,
14012 reg: regInfo{},
14013 },
14014 {
14015 name: "MOVBatomicload",
14016 auxType: auxSymOff,
14017 argLen: 2,
14018 faultOnNilArg0: true,
14019 symEffect: SymRead,
14020 asm: x86.AMOVB,
14021 reg: regInfo{
14022 inputs: []inputInfo{
14023 {0, 4295032831},
14024 },
14025 outputs: []outputInfo{
14026 {0, 49135},
14027 },
14028 },
14029 },
14030 {
14031 name: "MOVLatomicload",
14032 auxType: auxSymOff,
14033 argLen: 2,
14034 faultOnNilArg0: true,
14035 symEffect: SymRead,
14036 asm: x86.AMOVL,
14037 reg: regInfo{
14038 inputs: []inputInfo{
14039 {0, 4295032831},
14040 },
14041 outputs: []outputInfo{
14042 {0, 49135},
14043 },
14044 },
14045 },
14046 {
14047 name: "MOVQatomicload",
14048 auxType: auxSymOff,
14049 argLen: 2,
14050 faultOnNilArg0: true,
14051 symEffect: SymRead,
14052 asm: x86.AMOVQ,
14053 reg: regInfo{
14054 inputs: []inputInfo{
14055 {0, 4295032831},
14056 },
14057 outputs: []outputInfo{
14058 {0, 49135},
14059 },
14060 },
14061 },
14062 {
14063 name: "XCHGB",
14064 auxType: auxSymOff,
14065 argLen: 3,
14066 resultInArg0: true,
14067 faultOnNilArg1: true,
14068 hasSideEffects: true,
14069 symEffect: SymRdWr,
14070 asm: x86.AXCHGB,
14071 reg: regInfo{
14072 inputs: []inputInfo{
14073 {0, 49135},
14074 {1, 4295032831},
14075 },
14076 outputs: []outputInfo{
14077 {0, 49135},
14078 },
14079 },
14080 },
14081 {
14082 name: "XCHGL",
14083 auxType: auxSymOff,
14084 argLen: 3,
14085 resultInArg0: true,
14086 faultOnNilArg1: true,
14087 hasSideEffects: true,
14088 symEffect: SymRdWr,
14089 asm: x86.AXCHGL,
14090 reg: regInfo{
14091 inputs: []inputInfo{
14092 {0, 49135},
14093 {1, 4295032831},
14094 },
14095 outputs: []outputInfo{
14096 {0, 49135},
14097 },
14098 },
14099 },
14100 {
14101 name: "XCHGQ",
14102 auxType: auxSymOff,
14103 argLen: 3,
14104 resultInArg0: true,
14105 faultOnNilArg1: true,
14106 hasSideEffects: true,
14107 symEffect: SymRdWr,
14108 asm: x86.AXCHGQ,
14109 reg: regInfo{
14110 inputs: []inputInfo{
14111 {0, 49135},
14112 {1, 4295032831},
14113 },
14114 outputs: []outputInfo{
14115 {0, 49135},
14116 },
14117 },
14118 },
14119 {
14120 name: "XADDLlock",
14121 auxType: auxSymOff,
14122 argLen: 3,
14123 resultInArg0: true,
14124 clobberFlags: true,
14125 faultOnNilArg1: true,
14126 hasSideEffects: true,
14127 symEffect: SymRdWr,
14128 asm: x86.AXADDL,
14129 reg: regInfo{
14130 inputs: []inputInfo{
14131 {0, 49135},
14132 {1, 4295032831},
14133 },
14134 outputs: []outputInfo{
14135 {0, 49135},
14136 },
14137 },
14138 },
14139 {
14140 name: "XADDQlock",
14141 auxType: auxSymOff,
14142 argLen: 3,
14143 resultInArg0: true,
14144 clobberFlags: true,
14145 faultOnNilArg1: true,
14146 hasSideEffects: true,
14147 symEffect: SymRdWr,
14148 asm: x86.AXADDQ,
14149 reg: regInfo{
14150 inputs: []inputInfo{
14151 {0, 49135},
14152 {1, 4295032831},
14153 },
14154 outputs: []outputInfo{
14155 {0, 49135},
14156 },
14157 },
14158 },
14159 {
14160 name: "AddTupleFirst32",
14161 argLen: 2,
14162 reg: regInfo{},
14163 },
14164 {
14165 name: "AddTupleFirst64",
14166 argLen: 2,
14167 reg: regInfo{},
14168 },
14169 {
14170 name: "CMPXCHGLlock",
14171 auxType: auxSymOff,
14172 argLen: 4,
14173 clobberFlags: true,
14174 faultOnNilArg0: true,
14175 hasSideEffects: true,
14176 symEffect: SymRdWr,
14177 asm: x86.ACMPXCHGL,
14178 reg: regInfo{
14179 inputs: []inputInfo{
14180 {1, 1},
14181 {0, 49135},
14182 {2, 49135},
14183 },
14184 clobbers: 1,
14185 outputs: []outputInfo{
14186 {1, 0},
14187 {0, 49135},
14188 },
14189 },
14190 },
14191 {
14192 name: "CMPXCHGQlock",
14193 auxType: auxSymOff,
14194 argLen: 4,
14195 clobberFlags: true,
14196 faultOnNilArg0: true,
14197 hasSideEffects: true,
14198 symEffect: SymRdWr,
14199 asm: x86.ACMPXCHGQ,
14200 reg: regInfo{
14201 inputs: []inputInfo{
14202 {1, 1},
14203 {0, 49135},
14204 {2, 49135},
14205 },
14206 clobbers: 1,
14207 outputs: []outputInfo{
14208 {1, 0},
14209 {0, 49135},
14210 },
14211 },
14212 },
14213 {
14214 name: "ANDBlock",
14215 auxType: auxSymOff,
14216 argLen: 3,
14217 clobberFlags: true,
14218 faultOnNilArg0: true,
14219 hasSideEffects: true,
14220 symEffect: SymRdWr,
14221 asm: x86.AANDB,
14222 reg: regInfo{
14223 inputs: []inputInfo{
14224 {1, 49151},
14225 {0, 4295032831},
14226 },
14227 },
14228 },
14229 {
14230 name: "ANDLlock",
14231 auxType: auxSymOff,
14232 argLen: 3,
14233 clobberFlags: true,
14234 faultOnNilArg0: true,
14235 hasSideEffects: true,
14236 symEffect: SymRdWr,
14237 asm: x86.AANDL,
14238 reg: regInfo{
14239 inputs: []inputInfo{
14240 {1, 49151},
14241 {0, 4295032831},
14242 },
14243 },
14244 },
14245 {
14246 name: "ANDQlock",
14247 auxType: auxSymOff,
14248 argLen: 3,
14249 clobberFlags: true,
14250 faultOnNilArg0: true,
14251 hasSideEffects: true,
14252 symEffect: SymRdWr,
14253 asm: x86.AANDQ,
14254 reg: regInfo{
14255 inputs: []inputInfo{
14256 {1, 49151},
14257 {0, 4295032831},
14258 },
14259 },
14260 },
14261 {
14262 name: "ORBlock",
14263 auxType: auxSymOff,
14264 argLen: 3,
14265 clobberFlags: true,
14266 faultOnNilArg0: true,
14267 hasSideEffects: true,
14268 symEffect: SymRdWr,
14269 asm: x86.AORB,
14270 reg: regInfo{
14271 inputs: []inputInfo{
14272 {1, 49151},
14273 {0, 4295032831},
14274 },
14275 },
14276 },
14277 {
14278 name: "ORLlock",
14279 auxType: auxSymOff,
14280 argLen: 3,
14281 clobberFlags: true,
14282 faultOnNilArg0: true,
14283 hasSideEffects: true,
14284 symEffect: SymRdWr,
14285 asm: x86.AORL,
14286 reg: regInfo{
14287 inputs: []inputInfo{
14288 {1, 49151},
14289 {0, 4295032831},
14290 },
14291 },
14292 },
14293 {
14294 name: "ORQlock",
14295 auxType: auxSymOff,
14296 argLen: 3,
14297 clobberFlags: true,
14298 faultOnNilArg0: true,
14299 hasSideEffects: true,
14300 symEffect: SymRdWr,
14301 asm: x86.AORQ,
14302 reg: regInfo{
14303 inputs: []inputInfo{
14304 {1, 49151},
14305 {0, 4295032831},
14306 },
14307 },
14308 },
14309 {
14310 name: "LoweredAtomicAnd64",
14311 auxType: auxSymOff,
14312 argLen: 3,
14313 resultNotInArgs: true,
14314 clobberFlags: true,
14315 needIntTemp: true,
14316 faultOnNilArg0: true,
14317 hasSideEffects: true,
14318 unsafePoint: true,
14319 symEffect: SymRdWr,
14320 asm: x86.AANDQ,
14321 reg: regInfo{
14322 inputs: []inputInfo{
14323 {0, 49134},
14324 {1, 49134},
14325 },
14326 outputs: []outputInfo{
14327 {1, 0},
14328 {0, 1},
14329 },
14330 },
14331 },
14332 {
14333 name: "LoweredAtomicAnd32",
14334 auxType: auxSymOff,
14335 argLen: 3,
14336 resultNotInArgs: true,
14337 clobberFlags: true,
14338 needIntTemp: true,
14339 faultOnNilArg0: true,
14340 hasSideEffects: true,
14341 unsafePoint: true,
14342 symEffect: SymRdWr,
14343 asm: x86.AANDL,
14344 reg: regInfo{
14345 inputs: []inputInfo{
14346 {0, 49134},
14347 {1, 49134},
14348 },
14349 outputs: []outputInfo{
14350 {1, 0},
14351 {0, 1},
14352 },
14353 },
14354 },
14355 {
14356 name: "LoweredAtomicOr64",
14357 auxType: auxSymOff,
14358 argLen: 3,
14359 resultNotInArgs: true,
14360 clobberFlags: true,
14361 needIntTemp: true,
14362 faultOnNilArg0: true,
14363 hasSideEffects: true,
14364 unsafePoint: true,
14365 symEffect: SymRdWr,
14366 asm: x86.AORQ,
14367 reg: regInfo{
14368 inputs: []inputInfo{
14369 {0, 49134},
14370 {1, 49134},
14371 },
14372 outputs: []outputInfo{
14373 {1, 0},
14374 {0, 1},
14375 },
14376 },
14377 },
14378 {
14379 name: "LoweredAtomicOr32",
14380 auxType: auxSymOff,
14381 argLen: 3,
14382 resultNotInArgs: true,
14383 clobberFlags: true,
14384 needIntTemp: true,
14385 faultOnNilArg0: true,
14386 hasSideEffects: true,
14387 unsafePoint: true,
14388 symEffect: SymRdWr,
14389 asm: x86.AORL,
14390 reg: regInfo{
14391 inputs: []inputInfo{
14392 {0, 49134},
14393 {1, 49134},
14394 },
14395 outputs: []outputInfo{
14396 {1, 0},
14397 {0, 1},
14398 },
14399 },
14400 },
14401 {
14402 name: "PrefetchT0",
14403 argLen: 2,
14404 hasSideEffects: true,
14405 asm: x86.APREFETCHT0,
14406 reg: regInfo{
14407 inputs: []inputInfo{
14408 {0, 4295032831},
14409 },
14410 },
14411 },
14412 {
14413 name: "PrefetchNTA",
14414 argLen: 2,
14415 hasSideEffects: true,
14416 asm: x86.APREFETCHNTA,
14417 reg: regInfo{
14418 inputs: []inputInfo{
14419 {0, 4295032831},
14420 },
14421 },
14422 },
14423 {
14424 name: "ANDNQ",
14425 argLen: 2,
14426 clobberFlags: true,
14427 asm: x86.AANDNQ,
14428 reg: regInfo{
14429 inputs: []inputInfo{
14430 {0, 49135},
14431 {1, 49135},
14432 },
14433 outputs: []outputInfo{
14434 {0, 49135},
14435 },
14436 },
14437 },
14438 {
14439 name: "ANDNL",
14440 argLen: 2,
14441 clobberFlags: true,
14442 asm: x86.AANDNL,
14443 reg: regInfo{
14444 inputs: []inputInfo{
14445 {0, 49135},
14446 {1, 49135},
14447 },
14448 outputs: []outputInfo{
14449 {0, 49135},
14450 },
14451 },
14452 },
14453 {
14454 name: "BLSIQ",
14455 argLen: 1,
14456 clobberFlags: true,
14457 asm: x86.ABLSIQ,
14458 reg: regInfo{
14459 inputs: []inputInfo{
14460 {0, 49135},
14461 },
14462 outputs: []outputInfo{
14463 {0, 49135},
14464 },
14465 },
14466 },
14467 {
14468 name: "BLSIL",
14469 argLen: 1,
14470 clobberFlags: true,
14471 asm: x86.ABLSIL,
14472 reg: regInfo{
14473 inputs: []inputInfo{
14474 {0, 49135},
14475 },
14476 outputs: []outputInfo{
14477 {0, 49135},
14478 },
14479 },
14480 },
14481 {
14482 name: "BLSMSKQ",
14483 argLen: 1,
14484 clobberFlags: true,
14485 asm: x86.ABLSMSKQ,
14486 reg: regInfo{
14487 inputs: []inputInfo{
14488 {0, 49135},
14489 },
14490 outputs: []outputInfo{
14491 {0, 49135},
14492 },
14493 },
14494 },
14495 {
14496 name: "BLSMSKL",
14497 argLen: 1,
14498 clobberFlags: true,
14499 asm: x86.ABLSMSKL,
14500 reg: regInfo{
14501 inputs: []inputInfo{
14502 {0, 49135},
14503 },
14504 outputs: []outputInfo{
14505 {0, 49135},
14506 },
14507 },
14508 },
14509 {
14510 name: "BLSRQ",
14511 argLen: 1,
14512 asm: x86.ABLSRQ,
14513 reg: regInfo{
14514 inputs: []inputInfo{
14515 {0, 49135},
14516 },
14517 outputs: []outputInfo{
14518 {1, 0},
14519 {0, 49135},
14520 },
14521 },
14522 },
14523 {
14524 name: "BLSRL",
14525 argLen: 1,
14526 asm: x86.ABLSRL,
14527 reg: regInfo{
14528 inputs: []inputInfo{
14529 {0, 49135},
14530 },
14531 outputs: []outputInfo{
14532 {1, 0},
14533 {0, 49135},
14534 },
14535 },
14536 },
14537 {
14538 name: "TZCNTQ",
14539 argLen: 1,
14540 clobberFlags: true,
14541 asm: x86.ATZCNTQ,
14542 reg: regInfo{
14543 inputs: []inputInfo{
14544 {0, 49135},
14545 },
14546 outputs: []outputInfo{
14547 {0, 49135},
14548 },
14549 },
14550 },
14551 {
14552 name: "TZCNTL",
14553 argLen: 1,
14554 clobberFlags: true,
14555 asm: x86.ATZCNTL,
14556 reg: regInfo{
14557 inputs: []inputInfo{
14558 {0, 49135},
14559 },
14560 outputs: []outputInfo{
14561 {0, 49135},
14562 },
14563 },
14564 },
14565 {
14566 name: "LZCNTQ",
14567 argLen: 1,
14568 clobberFlags: true,
14569 asm: x86.ALZCNTQ,
14570 reg: regInfo{
14571 inputs: []inputInfo{
14572 {0, 49135},
14573 },
14574 outputs: []outputInfo{
14575 {0, 49135},
14576 },
14577 },
14578 },
14579 {
14580 name: "LZCNTL",
14581 argLen: 1,
14582 clobberFlags: true,
14583 asm: x86.ALZCNTL,
14584 reg: regInfo{
14585 inputs: []inputInfo{
14586 {0, 49135},
14587 },
14588 outputs: []outputInfo{
14589 {0, 49135},
14590 },
14591 },
14592 },
14593 {
14594 name: "MOVBEWstore",
14595 auxType: auxSymOff,
14596 argLen: 3,
14597 faultOnNilArg0: true,
14598 symEffect: SymWrite,
14599 asm: x86.AMOVBEW,
14600 reg: regInfo{
14601 inputs: []inputInfo{
14602 {1, 49151},
14603 {0, 4295032831},
14604 },
14605 },
14606 },
14607 {
14608 name: "MOVBELload",
14609 auxType: auxSymOff,
14610 argLen: 2,
14611 faultOnNilArg0: true,
14612 symEffect: SymRead,
14613 asm: x86.AMOVBEL,
14614 reg: regInfo{
14615 inputs: []inputInfo{
14616 {0, 4295032831},
14617 },
14618 outputs: []outputInfo{
14619 {0, 49135},
14620 },
14621 },
14622 },
14623 {
14624 name: "MOVBELstore",
14625 auxType: auxSymOff,
14626 argLen: 3,
14627 faultOnNilArg0: true,
14628 symEffect: SymWrite,
14629 asm: x86.AMOVBEL,
14630 reg: regInfo{
14631 inputs: []inputInfo{
14632 {1, 49151},
14633 {0, 4295032831},
14634 },
14635 },
14636 },
14637 {
14638 name: "MOVBEQload",
14639 auxType: auxSymOff,
14640 argLen: 2,
14641 faultOnNilArg0: true,
14642 symEffect: SymRead,
14643 asm: x86.AMOVBEQ,
14644 reg: regInfo{
14645 inputs: []inputInfo{
14646 {0, 4295032831},
14647 },
14648 outputs: []outputInfo{
14649 {0, 49135},
14650 },
14651 },
14652 },
14653 {
14654 name: "MOVBEQstore",
14655 auxType: auxSymOff,
14656 argLen: 3,
14657 faultOnNilArg0: true,
14658 symEffect: SymWrite,
14659 asm: x86.AMOVBEQ,
14660 reg: regInfo{
14661 inputs: []inputInfo{
14662 {1, 49151},
14663 {0, 4295032831},
14664 },
14665 },
14666 },
14667 {
14668 name: "MOVBELloadidx1",
14669 auxType: auxSymOff,
14670 argLen: 3,
14671 commutative: true,
14672 symEffect: SymRead,
14673 asm: x86.AMOVBEL,
14674 scale: 1,
14675 reg: regInfo{
14676 inputs: []inputInfo{
14677 {1, 49151},
14678 {0, 4295032831},
14679 },
14680 outputs: []outputInfo{
14681 {0, 49135},
14682 },
14683 },
14684 },
14685 {
14686 name: "MOVBELloadidx4",
14687 auxType: auxSymOff,
14688 argLen: 3,
14689 symEffect: SymRead,
14690 asm: x86.AMOVBEL,
14691 scale: 4,
14692 reg: regInfo{
14693 inputs: []inputInfo{
14694 {1, 49151},
14695 {0, 4295032831},
14696 },
14697 outputs: []outputInfo{
14698 {0, 49135},
14699 },
14700 },
14701 },
14702 {
14703 name: "MOVBELloadidx8",
14704 auxType: auxSymOff,
14705 argLen: 3,
14706 symEffect: SymRead,
14707 asm: x86.AMOVBEL,
14708 scale: 8,
14709 reg: regInfo{
14710 inputs: []inputInfo{
14711 {1, 49151},
14712 {0, 4295032831},
14713 },
14714 outputs: []outputInfo{
14715 {0, 49135},
14716 },
14717 },
14718 },
14719 {
14720 name: "MOVBEQloadidx1",
14721 auxType: auxSymOff,
14722 argLen: 3,
14723 commutative: true,
14724 symEffect: SymRead,
14725 asm: x86.AMOVBEQ,
14726 scale: 1,
14727 reg: regInfo{
14728 inputs: []inputInfo{
14729 {1, 49151},
14730 {0, 4295032831},
14731 },
14732 outputs: []outputInfo{
14733 {0, 49135},
14734 },
14735 },
14736 },
14737 {
14738 name: "MOVBEQloadidx8",
14739 auxType: auxSymOff,
14740 argLen: 3,
14741 symEffect: SymRead,
14742 asm: x86.AMOVBEQ,
14743 scale: 8,
14744 reg: regInfo{
14745 inputs: []inputInfo{
14746 {1, 49151},
14747 {0, 4295032831},
14748 },
14749 outputs: []outputInfo{
14750 {0, 49135},
14751 },
14752 },
14753 },
14754 {
14755 name: "MOVBEWstoreidx1",
14756 auxType: auxSymOff,
14757 argLen: 4,
14758 commutative: true,
14759 symEffect: SymWrite,
14760 asm: x86.AMOVBEW,
14761 scale: 1,
14762 reg: regInfo{
14763 inputs: []inputInfo{
14764 {1, 49151},
14765 {2, 49151},
14766 {0, 4295032831},
14767 },
14768 },
14769 },
14770 {
14771 name: "MOVBEWstoreidx2",
14772 auxType: auxSymOff,
14773 argLen: 4,
14774 symEffect: SymWrite,
14775 asm: x86.AMOVBEW,
14776 scale: 2,
14777 reg: regInfo{
14778 inputs: []inputInfo{
14779 {1, 49151},
14780 {2, 49151},
14781 {0, 4295032831},
14782 },
14783 },
14784 },
14785 {
14786 name: "MOVBELstoreidx1",
14787 auxType: auxSymOff,
14788 argLen: 4,
14789 commutative: true,
14790 symEffect: SymWrite,
14791 asm: x86.AMOVBEL,
14792 scale: 1,
14793 reg: regInfo{
14794 inputs: []inputInfo{
14795 {1, 49151},
14796 {2, 49151},
14797 {0, 4295032831},
14798 },
14799 },
14800 },
14801 {
14802 name: "MOVBELstoreidx4",
14803 auxType: auxSymOff,
14804 argLen: 4,
14805 symEffect: SymWrite,
14806 asm: x86.AMOVBEL,
14807 scale: 4,
14808 reg: regInfo{
14809 inputs: []inputInfo{
14810 {1, 49151},
14811 {2, 49151},
14812 {0, 4295032831},
14813 },
14814 },
14815 },
14816 {
14817 name: "MOVBELstoreidx8",
14818 auxType: auxSymOff,
14819 argLen: 4,
14820 symEffect: SymWrite,
14821 asm: x86.AMOVBEL,
14822 scale: 8,
14823 reg: regInfo{
14824 inputs: []inputInfo{
14825 {1, 49151},
14826 {2, 49151},
14827 {0, 4295032831},
14828 },
14829 },
14830 },
14831 {
14832 name: "MOVBEQstoreidx1",
14833 auxType: auxSymOff,
14834 argLen: 4,
14835 commutative: true,
14836 symEffect: SymWrite,
14837 asm: x86.AMOVBEQ,
14838 scale: 1,
14839 reg: regInfo{
14840 inputs: []inputInfo{
14841 {1, 49151},
14842 {2, 49151},
14843 {0, 4295032831},
14844 },
14845 },
14846 },
14847 {
14848 name: "MOVBEQstoreidx8",
14849 auxType: auxSymOff,
14850 argLen: 4,
14851 symEffect: SymWrite,
14852 asm: x86.AMOVBEQ,
14853 scale: 8,
14854 reg: regInfo{
14855 inputs: []inputInfo{
14856 {1, 49151},
14857 {2, 49151},
14858 {0, 4295032831},
14859 },
14860 },
14861 },
14862 {
14863 name: "SARXQ",
14864 argLen: 2,
14865 asm: x86.ASARXQ,
14866 reg: regInfo{
14867 inputs: []inputInfo{
14868 {0, 49135},
14869 {1, 49135},
14870 },
14871 outputs: []outputInfo{
14872 {0, 49135},
14873 },
14874 },
14875 },
14876 {
14877 name: "SARXL",
14878 argLen: 2,
14879 asm: x86.ASARXL,
14880 reg: regInfo{
14881 inputs: []inputInfo{
14882 {0, 49135},
14883 {1, 49135},
14884 },
14885 outputs: []outputInfo{
14886 {0, 49135},
14887 },
14888 },
14889 },
14890 {
14891 name: "SHLXQ",
14892 argLen: 2,
14893 asm: x86.ASHLXQ,
14894 reg: regInfo{
14895 inputs: []inputInfo{
14896 {0, 49135},
14897 {1, 49135},
14898 },
14899 outputs: []outputInfo{
14900 {0, 49135},
14901 },
14902 },
14903 },
14904 {
14905 name: "SHLXL",
14906 argLen: 2,
14907 asm: x86.ASHLXL,
14908 reg: regInfo{
14909 inputs: []inputInfo{
14910 {0, 49135},
14911 {1, 49135},
14912 },
14913 outputs: []outputInfo{
14914 {0, 49135},
14915 },
14916 },
14917 },
14918 {
14919 name: "SHRXQ",
14920 argLen: 2,
14921 asm: x86.ASHRXQ,
14922 reg: regInfo{
14923 inputs: []inputInfo{
14924 {0, 49135},
14925 {1, 49135},
14926 },
14927 outputs: []outputInfo{
14928 {0, 49135},
14929 },
14930 },
14931 },
14932 {
14933 name: "SHRXL",
14934 argLen: 2,
14935 asm: x86.ASHRXL,
14936 reg: regInfo{
14937 inputs: []inputInfo{
14938 {0, 49135},
14939 {1, 49135},
14940 },
14941 outputs: []outputInfo{
14942 {0, 49135},
14943 },
14944 },
14945 },
14946 {
14947 name: "SARXLload",
14948 auxType: auxSymOff,
14949 argLen: 3,
14950 faultOnNilArg0: true,
14951 symEffect: SymRead,
14952 asm: x86.ASARXL,
14953 reg: regInfo{
14954 inputs: []inputInfo{
14955 {1, 49135},
14956 {0, 4295032831},
14957 },
14958 outputs: []outputInfo{
14959 {0, 49135},
14960 },
14961 },
14962 },
14963 {
14964 name: "SARXQload",
14965 auxType: auxSymOff,
14966 argLen: 3,
14967 faultOnNilArg0: true,
14968 symEffect: SymRead,
14969 asm: x86.ASARXQ,
14970 reg: regInfo{
14971 inputs: []inputInfo{
14972 {1, 49135},
14973 {0, 4295032831},
14974 },
14975 outputs: []outputInfo{
14976 {0, 49135},
14977 },
14978 },
14979 },
14980 {
14981 name: "SHLXLload",
14982 auxType: auxSymOff,
14983 argLen: 3,
14984 faultOnNilArg0: true,
14985 symEffect: SymRead,
14986 asm: x86.ASHLXL,
14987 reg: regInfo{
14988 inputs: []inputInfo{
14989 {1, 49135},
14990 {0, 4295032831},
14991 },
14992 outputs: []outputInfo{
14993 {0, 49135},
14994 },
14995 },
14996 },
14997 {
14998 name: "SHLXQload",
14999 auxType: auxSymOff,
15000 argLen: 3,
15001 faultOnNilArg0: true,
15002 symEffect: SymRead,
15003 asm: x86.ASHLXQ,
15004 reg: regInfo{
15005 inputs: []inputInfo{
15006 {1, 49135},
15007 {0, 4295032831},
15008 },
15009 outputs: []outputInfo{
15010 {0, 49135},
15011 },
15012 },
15013 },
15014 {
15015 name: "SHRXLload",
15016 auxType: auxSymOff,
15017 argLen: 3,
15018 faultOnNilArg0: true,
15019 symEffect: SymRead,
15020 asm: x86.ASHRXL,
15021 reg: regInfo{
15022 inputs: []inputInfo{
15023 {1, 49135},
15024 {0, 4295032831},
15025 },
15026 outputs: []outputInfo{
15027 {0, 49135},
15028 },
15029 },
15030 },
15031 {
15032 name: "SHRXQload",
15033 auxType: auxSymOff,
15034 argLen: 3,
15035 faultOnNilArg0: true,
15036 symEffect: SymRead,
15037 asm: x86.ASHRXQ,
15038 reg: regInfo{
15039 inputs: []inputInfo{
15040 {1, 49135},
15041 {0, 4295032831},
15042 },
15043 outputs: []outputInfo{
15044 {0, 49135},
15045 },
15046 },
15047 },
15048 {
15049 name: "SARXLloadidx1",
15050 auxType: auxSymOff,
15051 argLen: 4,
15052 faultOnNilArg0: true,
15053 symEffect: SymRead,
15054 asm: x86.ASARXL,
15055 scale: 1,
15056 reg: regInfo{
15057 inputs: []inputInfo{
15058 {2, 49135},
15059 {1, 49151},
15060 {0, 4295032831},
15061 },
15062 outputs: []outputInfo{
15063 {0, 49135},
15064 },
15065 },
15066 },
15067 {
15068 name: "SARXLloadidx4",
15069 auxType: auxSymOff,
15070 argLen: 4,
15071 faultOnNilArg0: true,
15072 symEffect: SymRead,
15073 asm: x86.ASARXL,
15074 scale: 4,
15075 reg: regInfo{
15076 inputs: []inputInfo{
15077 {2, 49135},
15078 {1, 49151},
15079 {0, 4295032831},
15080 },
15081 outputs: []outputInfo{
15082 {0, 49135},
15083 },
15084 },
15085 },
15086 {
15087 name: "SARXLloadidx8",
15088 auxType: auxSymOff,
15089 argLen: 4,
15090 faultOnNilArg0: true,
15091 symEffect: SymRead,
15092 asm: x86.ASARXL,
15093 scale: 8,
15094 reg: regInfo{
15095 inputs: []inputInfo{
15096 {2, 49135},
15097 {1, 49151},
15098 {0, 4295032831},
15099 },
15100 outputs: []outputInfo{
15101 {0, 49135},
15102 },
15103 },
15104 },
15105 {
15106 name: "SARXQloadidx1",
15107 auxType: auxSymOff,
15108 argLen: 4,
15109 faultOnNilArg0: true,
15110 symEffect: SymRead,
15111 asm: x86.ASARXQ,
15112 scale: 1,
15113 reg: regInfo{
15114 inputs: []inputInfo{
15115 {2, 49135},
15116 {1, 49151},
15117 {0, 4295032831},
15118 },
15119 outputs: []outputInfo{
15120 {0, 49135},
15121 },
15122 },
15123 },
15124 {
15125 name: "SARXQloadidx8",
15126 auxType: auxSymOff,
15127 argLen: 4,
15128 faultOnNilArg0: true,
15129 symEffect: SymRead,
15130 asm: x86.ASARXQ,
15131 scale: 8,
15132 reg: regInfo{
15133 inputs: []inputInfo{
15134 {2, 49135},
15135 {1, 49151},
15136 {0, 4295032831},
15137 },
15138 outputs: []outputInfo{
15139 {0, 49135},
15140 },
15141 },
15142 },
15143 {
15144 name: "SHLXLloadidx1",
15145 auxType: auxSymOff,
15146 argLen: 4,
15147 faultOnNilArg0: true,
15148 symEffect: SymRead,
15149 asm: x86.ASHLXL,
15150 scale: 1,
15151 reg: regInfo{
15152 inputs: []inputInfo{
15153 {2, 49135},
15154 {1, 49151},
15155 {0, 4295032831},
15156 },
15157 outputs: []outputInfo{
15158 {0, 49135},
15159 },
15160 },
15161 },
15162 {
15163 name: "SHLXLloadidx4",
15164 auxType: auxSymOff,
15165 argLen: 4,
15166 faultOnNilArg0: true,
15167 symEffect: SymRead,
15168 asm: x86.ASHLXL,
15169 scale: 4,
15170 reg: regInfo{
15171 inputs: []inputInfo{
15172 {2, 49135},
15173 {1, 49151},
15174 {0, 4295032831},
15175 },
15176 outputs: []outputInfo{
15177 {0, 49135},
15178 },
15179 },
15180 },
15181 {
15182 name: "SHLXLloadidx8",
15183 auxType: auxSymOff,
15184 argLen: 4,
15185 faultOnNilArg0: true,
15186 symEffect: SymRead,
15187 asm: x86.ASHLXL,
15188 scale: 8,
15189 reg: regInfo{
15190 inputs: []inputInfo{
15191 {2, 49135},
15192 {1, 49151},
15193 {0, 4295032831},
15194 },
15195 outputs: []outputInfo{
15196 {0, 49135},
15197 },
15198 },
15199 },
15200 {
15201 name: "SHLXQloadidx1",
15202 auxType: auxSymOff,
15203 argLen: 4,
15204 faultOnNilArg0: true,
15205 symEffect: SymRead,
15206 asm: x86.ASHLXQ,
15207 scale: 1,
15208 reg: regInfo{
15209 inputs: []inputInfo{
15210 {2, 49135},
15211 {1, 49151},
15212 {0, 4295032831},
15213 },
15214 outputs: []outputInfo{
15215 {0, 49135},
15216 },
15217 },
15218 },
15219 {
15220 name: "SHLXQloadidx8",
15221 auxType: auxSymOff,
15222 argLen: 4,
15223 faultOnNilArg0: true,
15224 symEffect: SymRead,
15225 asm: x86.ASHLXQ,
15226 scale: 8,
15227 reg: regInfo{
15228 inputs: []inputInfo{
15229 {2, 49135},
15230 {1, 49151},
15231 {0, 4295032831},
15232 },
15233 outputs: []outputInfo{
15234 {0, 49135},
15235 },
15236 },
15237 },
15238 {
15239 name: "SHRXLloadidx1",
15240 auxType: auxSymOff,
15241 argLen: 4,
15242 faultOnNilArg0: true,
15243 symEffect: SymRead,
15244 asm: x86.ASHRXL,
15245 scale: 1,
15246 reg: regInfo{
15247 inputs: []inputInfo{
15248 {2, 49135},
15249 {1, 49151},
15250 {0, 4295032831},
15251 },
15252 outputs: []outputInfo{
15253 {0, 49135},
15254 },
15255 },
15256 },
15257 {
15258 name: "SHRXLloadidx4",
15259 auxType: auxSymOff,
15260 argLen: 4,
15261 faultOnNilArg0: true,
15262 symEffect: SymRead,
15263 asm: x86.ASHRXL,
15264 scale: 4,
15265 reg: regInfo{
15266 inputs: []inputInfo{
15267 {2, 49135},
15268 {1, 49151},
15269 {0, 4295032831},
15270 },
15271 outputs: []outputInfo{
15272 {0, 49135},
15273 },
15274 },
15275 },
15276 {
15277 name: "SHRXLloadidx8",
15278 auxType: auxSymOff,
15279 argLen: 4,
15280 faultOnNilArg0: true,
15281 symEffect: SymRead,
15282 asm: x86.ASHRXL,
15283 scale: 8,
15284 reg: regInfo{
15285 inputs: []inputInfo{
15286 {2, 49135},
15287 {1, 49151},
15288 {0, 4295032831},
15289 },
15290 outputs: []outputInfo{
15291 {0, 49135},
15292 },
15293 },
15294 },
15295 {
15296 name: "SHRXQloadidx1",
15297 auxType: auxSymOff,
15298 argLen: 4,
15299 faultOnNilArg0: true,
15300 symEffect: SymRead,
15301 asm: x86.ASHRXQ,
15302 scale: 1,
15303 reg: regInfo{
15304 inputs: []inputInfo{
15305 {2, 49135},
15306 {1, 49151},
15307 {0, 4295032831},
15308 },
15309 outputs: []outputInfo{
15310 {0, 49135},
15311 },
15312 },
15313 },
15314 {
15315 name: "SHRXQloadidx8",
15316 auxType: auxSymOff,
15317 argLen: 4,
15318 faultOnNilArg0: true,
15319 symEffect: SymRead,
15320 asm: x86.ASHRXQ,
15321 scale: 8,
15322 reg: regInfo{
15323 inputs: []inputInfo{
15324 {2, 49135},
15325 {1, 49151},
15326 {0, 4295032831},
15327 },
15328 outputs: []outputInfo{
15329 {0, 49135},
15330 },
15331 },
15332 },
15333
15334 {
15335 name: "ADD",
15336 argLen: 2,
15337 commutative: true,
15338 asm: arm.AADD,
15339 reg: regInfo{
15340 inputs: []inputInfo{
15341 {0, 22527},
15342 {1, 22527},
15343 },
15344 outputs: []outputInfo{
15345 {0, 21503},
15346 },
15347 },
15348 },
15349 {
15350 name: "ADDconst",
15351 auxType: auxInt32,
15352 argLen: 1,
15353 asm: arm.AADD,
15354 reg: regInfo{
15355 inputs: []inputInfo{
15356 {0, 30719},
15357 },
15358 outputs: []outputInfo{
15359 {0, 21503},
15360 },
15361 },
15362 },
15363 {
15364 name: "SUB",
15365 argLen: 2,
15366 asm: arm.ASUB,
15367 reg: regInfo{
15368 inputs: []inputInfo{
15369 {0, 22527},
15370 {1, 22527},
15371 },
15372 outputs: []outputInfo{
15373 {0, 21503},
15374 },
15375 },
15376 },
15377 {
15378 name: "SUBconst",
15379 auxType: auxInt32,
15380 argLen: 1,
15381 asm: arm.ASUB,
15382 reg: regInfo{
15383 inputs: []inputInfo{
15384 {0, 22527},
15385 },
15386 outputs: []outputInfo{
15387 {0, 21503},
15388 },
15389 },
15390 },
15391 {
15392 name: "RSB",
15393 argLen: 2,
15394 asm: arm.ARSB,
15395 reg: regInfo{
15396 inputs: []inputInfo{
15397 {0, 22527},
15398 {1, 22527},
15399 },
15400 outputs: []outputInfo{
15401 {0, 21503},
15402 },
15403 },
15404 },
15405 {
15406 name: "RSBconst",
15407 auxType: auxInt32,
15408 argLen: 1,
15409 asm: arm.ARSB,
15410 reg: regInfo{
15411 inputs: []inputInfo{
15412 {0, 22527},
15413 },
15414 outputs: []outputInfo{
15415 {0, 21503},
15416 },
15417 },
15418 },
15419 {
15420 name: "MUL",
15421 argLen: 2,
15422 commutative: true,
15423 asm: arm.AMUL,
15424 reg: regInfo{
15425 inputs: []inputInfo{
15426 {0, 22527},
15427 {1, 22527},
15428 },
15429 outputs: []outputInfo{
15430 {0, 21503},
15431 },
15432 },
15433 },
15434 {
15435 name: "HMUL",
15436 argLen: 2,
15437 commutative: true,
15438 asm: arm.AMULL,
15439 reg: regInfo{
15440 inputs: []inputInfo{
15441 {0, 22527},
15442 {1, 22527},
15443 },
15444 outputs: []outputInfo{
15445 {0, 21503},
15446 },
15447 },
15448 },
15449 {
15450 name: "HMULU",
15451 argLen: 2,
15452 commutative: true,
15453 asm: arm.AMULLU,
15454 reg: regInfo{
15455 inputs: []inputInfo{
15456 {0, 22527},
15457 {1, 22527},
15458 },
15459 outputs: []outputInfo{
15460 {0, 21503},
15461 },
15462 },
15463 },
15464 {
15465 name: "CALLudiv",
15466 argLen: 2,
15467 clobberFlags: true,
15468 reg: regInfo{
15469 inputs: []inputInfo{
15470 {0, 2},
15471 {1, 1},
15472 },
15473 clobbers: 20492,
15474 outputs: []outputInfo{
15475 {0, 1},
15476 {1, 2},
15477 },
15478 },
15479 },
15480 {
15481 name: "ADDS",
15482 argLen: 2,
15483 commutative: true,
15484 asm: arm.AADD,
15485 reg: regInfo{
15486 inputs: []inputInfo{
15487 {0, 22527},
15488 {1, 22527},
15489 },
15490 outputs: []outputInfo{
15491 {1, 0},
15492 {0, 21503},
15493 },
15494 },
15495 },
15496 {
15497 name: "ADDSconst",
15498 auxType: auxInt32,
15499 argLen: 1,
15500 asm: arm.AADD,
15501 reg: regInfo{
15502 inputs: []inputInfo{
15503 {0, 22527},
15504 },
15505 outputs: []outputInfo{
15506 {1, 0},
15507 {0, 21503},
15508 },
15509 },
15510 },
15511 {
15512 name: "ADC",
15513 argLen: 3,
15514 commutative: true,
15515 asm: arm.AADC,
15516 reg: regInfo{
15517 inputs: []inputInfo{
15518 {0, 21503},
15519 {1, 21503},
15520 },
15521 outputs: []outputInfo{
15522 {0, 21503},
15523 },
15524 },
15525 },
15526 {
15527 name: "ADCconst",
15528 auxType: auxInt32,
15529 argLen: 2,
15530 asm: arm.AADC,
15531 reg: regInfo{
15532 inputs: []inputInfo{
15533 {0, 21503},
15534 },
15535 outputs: []outputInfo{
15536 {0, 21503},
15537 },
15538 },
15539 },
15540 {
15541 name: "SUBS",
15542 argLen: 2,
15543 asm: arm.ASUB,
15544 reg: regInfo{
15545 inputs: []inputInfo{
15546 {0, 22527},
15547 {1, 22527},
15548 },
15549 outputs: []outputInfo{
15550 {1, 0},
15551 {0, 21503},
15552 },
15553 },
15554 },
15555 {
15556 name: "SUBSconst",
15557 auxType: auxInt32,
15558 argLen: 1,
15559 asm: arm.ASUB,
15560 reg: regInfo{
15561 inputs: []inputInfo{
15562 {0, 22527},
15563 },
15564 outputs: []outputInfo{
15565 {1, 0},
15566 {0, 21503},
15567 },
15568 },
15569 },
15570 {
15571 name: "RSBSconst",
15572 auxType: auxInt32,
15573 argLen: 1,
15574 asm: arm.ARSB,
15575 reg: regInfo{
15576 inputs: []inputInfo{
15577 {0, 22527},
15578 },
15579 outputs: []outputInfo{
15580 {1, 0},
15581 {0, 21503},
15582 },
15583 },
15584 },
15585 {
15586 name: "SBC",
15587 argLen: 3,
15588 asm: arm.ASBC,
15589 reg: regInfo{
15590 inputs: []inputInfo{
15591 {0, 21503},
15592 {1, 21503},
15593 },
15594 outputs: []outputInfo{
15595 {0, 21503},
15596 },
15597 },
15598 },
15599 {
15600 name: "SBCconst",
15601 auxType: auxInt32,
15602 argLen: 2,
15603 asm: arm.ASBC,
15604 reg: regInfo{
15605 inputs: []inputInfo{
15606 {0, 21503},
15607 },
15608 outputs: []outputInfo{
15609 {0, 21503},
15610 },
15611 },
15612 },
15613 {
15614 name: "RSCconst",
15615 auxType: auxInt32,
15616 argLen: 2,
15617 asm: arm.ARSC,
15618 reg: regInfo{
15619 inputs: []inputInfo{
15620 {0, 21503},
15621 },
15622 outputs: []outputInfo{
15623 {0, 21503},
15624 },
15625 },
15626 },
15627 {
15628 name: "MULLU",
15629 argLen: 2,
15630 commutative: true,
15631 asm: arm.AMULLU,
15632 reg: regInfo{
15633 inputs: []inputInfo{
15634 {0, 22527},
15635 {1, 22527},
15636 },
15637 outputs: []outputInfo{
15638 {0, 21503},
15639 {1, 21503},
15640 },
15641 },
15642 },
15643 {
15644 name: "MULA",
15645 argLen: 3,
15646 asm: arm.AMULA,
15647 reg: regInfo{
15648 inputs: []inputInfo{
15649 {0, 21503},
15650 {1, 21503},
15651 {2, 21503},
15652 },
15653 outputs: []outputInfo{
15654 {0, 21503},
15655 },
15656 },
15657 },
15658 {
15659 name: "MULS",
15660 argLen: 3,
15661 asm: arm.AMULS,
15662 reg: regInfo{
15663 inputs: []inputInfo{
15664 {0, 21503},
15665 {1, 21503},
15666 {2, 21503},
15667 },
15668 outputs: []outputInfo{
15669 {0, 21503},
15670 },
15671 },
15672 },
15673 {
15674 name: "ADDF",
15675 argLen: 2,
15676 commutative: true,
15677 asm: arm.AADDF,
15678 reg: regInfo{
15679 inputs: []inputInfo{
15680 {0, 4294901760},
15681 {1, 4294901760},
15682 },
15683 outputs: []outputInfo{
15684 {0, 4294901760},
15685 },
15686 },
15687 },
15688 {
15689 name: "ADDD",
15690 argLen: 2,
15691 commutative: true,
15692 asm: arm.AADDD,
15693 reg: regInfo{
15694 inputs: []inputInfo{
15695 {0, 4294901760},
15696 {1, 4294901760},
15697 },
15698 outputs: []outputInfo{
15699 {0, 4294901760},
15700 },
15701 },
15702 },
15703 {
15704 name: "SUBF",
15705 argLen: 2,
15706 asm: arm.ASUBF,
15707 reg: regInfo{
15708 inputs: []inputInfo{
15709 {0, 4294901760},
15710 {1, 4294901760},
15711 },
15712 outputs: []outputInfo{
15713 {0, 4294901760},
15714 },
15715 },
15716 },
15717 {
15718 name: "SUBD",
15719 argLen: 2,
15720 asm: arm.ASUBD,
15721 reg: regInfo{
15722 inputs: []inputInfo{
15723 {0, 4294901760},
15724 {1, 4294901760},
15725 },
15726 outputs: []outputInfo{
15727 {0, 4294901760},
15728 },
15729 },
15730 },
15731 {
15732 name: "MULF",
15733 argLen: 2,
15734 commutative: true,
15735 asm: arm.AMULF,
15736 reg: regInfo{
15737 inputs: []inputInfo{
15738 {0, 4294901760},
15739 {1, 4294901760},
15740 },
15741 outputs: []outputInfo{
15742 {0, 4294901760},
15743 },
15744 },
15745 },
15746 {
15747 name: "MULD",
15748 argLen: 2,
15749 commutative: true,
15750 asm: arm.AMULD,
15751 reg: regInfo{
15752 inputs: []inputInfo{
15753 {0, 4294901760},
15754 {1, 4294901760},
15755 },
15756 outputs: []outputInfo{
15757 {0, 4294901760},
15758 },
15759 },
15760 },
15761 {
15762 name: "NMULF",
15763 argLen: 2,
15764 commutative: true,
15765 asm: arm.ANMULF,
15766 reg: regInfo{
15767 inputs: []inputInfo{
15768 {0, 4294901760},
15769 {1, 4294901760},
15770 },
15771 outputs: []outputInfo{
15772 {0, 4294901760},
15773 },
15774 },
15775 },
15776 {
15777 name: "NMULD",
15778 argLen: 2,
15779 commutative: true,
15780 asm: arm.ANMULD,
15781 reg: regInfo{
15782 inputs: []inputInfo{
15783 {0, 4294901760},
15784 {1, 4294901760},
15785 },
15786 outputs: []outputInfo{
15787 {0, 4294901760},
15788 },
15789 },
15790 },
15791 {
15792 name: "DIVF",
15793 argLen: 2,
15794 asm: arm.ADIVF,
15795 reg: regInfo{
15796 inputs: []inputInfo{
15797 {0, 4294901760},
15798 {1, 4294901760},
15799 },
15800 outputs: []outputInfo{
15801 {0, 4294901760},
15802 },
15803 },
15804 },
15805 {
15806 name: "DIVD",
15807 argLen: 2,
15808 asm: arm.ADIVD,
15809 reg: regInfo{
15810 inputs: []inputInfo{
15811 {0, 4294901760},
15812 {1, 4294901760},
15813 },
15814 outputs: []outputInfo{
15815 {0, 4294901760},
15816 },
15817 },
15818 },
15819 {
15820 name: "MULAF",
15821 argLen: 3,
15822 resultInArg0: true,
15823 asm: arm.AMULAF,
15824 reg: regInfo{
15825 inputs: []inputInfo{
15826 {0, 4294901760},
15827 {1, 4294901760},
15828 {2, 4294901760},
15829 },
15830 outputs: []outputInfo{
15831 {0, 4294901760},
15832 },
15833 },
15834 },
15835 {
15836 name: "MULAD",
15837 argLen: 3,
15838 resultInArg0: true,
15839 asm: arm.AMULAD,
15840 reg: regInfo{
15841 inputs: []inputInfo{
15842 {0, 4294901760},
15843 {1, 4294901760},
15844 {2, 4294901760},
15845 },
15846 outputs: []outputInfo{
15847 {0, 4294901760},
15848 },
15849 },
15850 },
15851 {
15852 name: "MULSF",
15853 argLen: 3,
15854 resultInArg0: true,
15855 asm: arm.AMULSF,
15856 reg: regInfo{
15857 inputs: []inputInfo{
15858 {0, 4294901760},
15859 {1, 4294901760},
15860 {2, 4294901760},
15861 },
15862 outputs: []outputInfo{
15863 {0, 4294901760},
15864 },
15865 },
15866 },
15867 {
15868 name: "MULSD",
15869 argLen: 3,
15870 resultInArg0: true,
15871 asm: arm.AMULSD,
15872 reg: regInfo{
15873 inputs: []inputInfo{
15874 {0, 4294901760},
15875 {1, 4294901760},
15876 {2, 4294901760},
15877 },
15878 outputs: []outputInfo{
15879 {0, 4294901760},
15880 },
15881 },
15882 },
15883 {
15884 name: "FMULAD",
15885 argLen: 3,
15886 resultInArg0: true,
15887 asm: arm.AFMULAD,
15888 reg: regInfo{
15889 inputs: []inputInfo{
15890 {0, 4294901760},
15891 {1, 4294901760},
15892 {2, 4294901760},
15893 },
15894 outputs: []outputInfo{
15895 {0, 4294901760},
15896 },
15897 },
15898 },
15899 {
15900 name: "AND",
15901 argLen: 2,
15902 commutative: true,
15903 asm: arm.AAND,
15904 reg: regInfo{
15905 inputs: []inputInfo{
15906 {0, 22527},
15907 {1, 22527},
15908 },
15909 outputs: []outputInfo{
15910 {0, 21503},
15911 },
15912 },
15913 },
15914 {
15915 name: "ANDconst",
15916 auxType: auxInt32,
15917 argLen: 1,
15918 asm: arm.AAND,
15919 reg: regInfo{
15920 inputs: []inputInfo{
15921 {0, 22527},
15922 },
15923 outputs: []outputInfo{
15924 {0, 21503},
15925 },
15926 },
15927 },
15928 {
15929 name: "OR",
15930 argLen: 2,
15931 commutative: true,
15932 asm: arm.AORR,
15933 reg: regInfo{
15934 inputs: []inputInfo{
15935 {0, 22527},
15936 {1, 22527},
15937 },
15938 outputs: []outputInfo{
15939 {0, 21503},
15940 },
15941 },
15942 },
15943 {
15944 name: "ORconst",
15945 auxType: auxInt32,
15946 argLen: 1,
15947 asm: arm.AORR,
15948 reg: regInfo{
15949 inputs: []inputInfo{
15950 {0, 22527},
15951 },
15952 outputs: []outputInfo{
15953 {0, 21503},
15954 },
15955 },
15956 },
15957 {
15958 name: "XOR",
15959 argLen: 2,
15960 commutative: true,
15961 asm: arm.AEOR,
15962 reg: regInfo{
15963 inputs: []inputInfo{
15964 {0, 22527},
15965 {1, 22527},
15966 },
15967 outputs: []outputInfo{
15968 {0, 21503},
15969 },
15970 },
15971 },
15972 {
15973 name: "XORconst",
15974 auxType: auxInt32,
15975 argLen: 1,
15976 asm: arm.AEOR,
15977 reg: regInfo{
15978 inputs: []inputInfo{
15979 {0, 22527},
15980 },
15981 outputs: []outputInfo{
15982 {0, 21503},
15983 },
15984 },
15985 },
15986 {
15987 name: "BIC",
15988 argLen: 2,
15989 asm: arm.ABIC,
15990 reg: regInfo{
15991 inputs: []inputInfo{
15992 {0, 22527},
15993 {1, 22527},
15994 },
15995 outputs: []outputInfo{
15996 {0, 21503},
15997 },
15998 },
15999 },
16000 {
16001 name: "BICconst",
16002 auxType: auxInt32,
16003 argLen: 1,
16004 asm: arm.ABIC,
16005 reg: regInfo{
16006 inputs: []inputInfo{
16007 {0, 22527},
16008 },
16009 outputs: []outputInfo{
16010 {0, 21503},
16011 },
16012 },
16013 },
16014 {
16015 name: "BFX",
16016 auxType: auxInt32,
16017 argLen: 1,
16018 asm: arm.ABFX,
16019 reg: regInfo{
16020 inputs: []inputInfo{
16021 {0, 22527},
16022 },
16023 outputs: []outputInfo{
16024 {0, 21503},
16025 },
16026 },
16027 },
16028 {
16029 name: "BFXU",
16030 auxType: auxInt32,
16031 argLen: 1,
16032 asm: arm.ABFXU,
16033 reg: regInfo{
16034 inputs: []inputInfo{
16035 {0, 22527},
16036 },
16037 outputs: []outputInfo{
16038 {0, 21503},
16039 },
16040 },
16041 },
16042 {
16043 name: "MVN",
16044 argLen: 1,
16045 asm: arm.AMVN,
16046 reg: regInfo{
16047 inputs: []inputInfo{
16048 {0, 22527},
16049 },
16050 outputs: []outputInfo{
16051 {0, 21503},
16052 },
16053 },
16054 },
16055 {
16056 name: "NEGF",
16057 argLen: 1,
16058 asm: arm.ANEGF,
16059 reg: regInfo{
16060 inputs: []inputInfo{
16061 {0, 4294901760},
16062 },
16063 outputs: []outputInfo{
16064 {0, 4294901760},
16065 },
16066 },
16067 },
16068 {
16069 name: "NEGD",
16070 argLen: 1,
16071 asm: arm.ANEGD,
16072 reg: regInfo{
16073 inputs: []inputInfo{
16074 {0, 4294901760},
16075 },
16076 outputs: []outputInfo{
16077 {0, 4294901760},
16078 },
16079 },
16080 },
16081 {
16082 name: "SQRTD",
16083 argLen: 1,
16084 asm: arm.ASQRTD,
16085 reg: regInfo{
16086 inputs: []inputInfo{
16087 {0, 4294901760},
16088 },
16089 outputs: []outputInfo{
16090 {0, 4294901760},
16091 },
16092 },
16093 },
16094 {
16095 name: "SQRTF",
16096 argLen: 1,
16097 asm: arm.ASQRTF,
16098 reg: regInfo{
16099 inputs: []inputInfo{
16100 {0, 4294901760},
16101 },
16102 outputs: []outputInfo{
16103 {0, 4294901760},
16104 },
16105 },
16106 },
16107 {
16108 name: "ABSD",
16109 argLen: 1,
16110 asm: arm.AABSD,
16111 reg: regInfo{
16112 inputs: []inputInfo{
16113 {0, 4294901760},
16114 },
16115 outputs: []outputInfo{
16116 {0, 4294901760},
16117 },
16118 },
16119 },
16120 {
16121 name: "CLZ",
16122 argLen: 1,
16123 asm: arm.ACLZ,
16124 reg: regInfo{
16125 inputs: []inputInfo{
16126 {0, 22527},
16127 },
16128 outputs: []outputInfo{
16129 {0, 21503},
16130 },
16131 },
16132 },
16133 {
16134 name: "REV",
16135 argLen: 1,
16136 asm: arm.AREV,
16137 reg: regInfo{
16138 inputs: []inputInfo{
16139 {0, 22527},
16140 },
16141 outputs: []outputInfo{
16142 {0, 21503},
16143 },
16144 },
16145 },
16146 {
16147 name: "REV16",
16148 argLen: 1,
16149 asm: arm.AREV16,
16150 reg: regInfo{
16151 inputs: []inputInfo{
16152 {0, 22527},
16153 },
16154 outputs: []outputInfo{
16155 {0, 21503},
16156 },
16157 },
16158 },
16159 {
16160 name: "RBIT",
16161 argLen: 1,
16162 asm: arm.ARBIT,
16163 reg: regInfo{
16164 inputs: []inputInfo{
16165 {0, 22527},
16166 },
16167 outputs: []outputInfo{
16168 {0, 21503},
16169 },
16170 },
16171 },
16172 {
16173 name: "SLL",
16174 argLen: 2,
16175 asm: arm.ASLL,
16176 reg: regInfo{
16177 inputs: []inputInfo{
16178 {0, 22527},
16179 {1, 22527},
16180 },
16181 outputs: []outputInfo{
16182 {0, 21503},
16183 },
16184 },
16185 },
16186 {
16187 name: "SLLconst",
16188 auxType: auxInt32,
16189 argLen: 1,
16190 asm: arm.ASLL,
16191 reg: regInfo{
16192 inputs: []inputInfo{
16193 {0, 22527},
16194 },
16195 outputs: []outputInfo{
16196 {0, 21503},
16197 },
16198 },
16199 },
16200 {
16201 name: "SRL",
16202 argLen: 2,
16203 asm: arm.ASRL,
16204 reg: regInfo{
16205 inputs: []inputInfo{
16206 {0, 22527},
16207 {1, 22527},
16208 },
16209 outputs: []outputInfo{
16210 {0, 21503},
16211 },
16212 },
16213 },
16214 {
16215 name: "SRLconst",
16216 auxType: auxInt32,
16217 argLen: 1,
16218 asm: arm.ASRL,
16219 reg: regInfo{
16220 inputs: []inputInfo{
16221 {0, 22527},
16222 },
16223 outputs: []outputInfo{
16224 {0, 21503},
16225 },
16226 },
16227 },
16228 {
16229 name: "SRA",
16230 argLen: 2,
16231 asm: arm.ASRA,
16232 reg: regInfo{
16233 inputs: []inputInfo{
16234 {0, 22527},
16235 {1, 22527},
16236 },
16237 outputs: []outputInfo{
16238 {0, 21503},
16239 },
16240 },
16241 },
16242 {
16243 name: "SRAconst",
16244 auxType: auxInt32,
16245 argLen: 1,
16246 asm: arm.ASRA,
16247 reg: regInfo{
16248 inputs: []inputInfo{
16249 {0, 22527},
16250 },
16251 outputs: []outputInfo{
16252 {0, 21503},
16253 },
16254 },
16255 },
16256 {
16257 name: "SRR",
16258 argLen: 2,
16259 reg: regInfo{
16260 inputs: []inputInfo{
16261 {0, 22527},
16262 {1, 22527},
16263 },
16264 outputs: []outputInfo{
16265 {0, 21503},
16266 },
16267 },
16268 },
16269 {
16270 name: "SRRconst",
16271 auxType: auxInt32,
16272 argLen: 1,
16273 reg: regInfo{
16274 inputs: []inputInfo{
16275 {0, 22527},
16276 },
16277 outputs: []outputInfo{
16278 {0, 21503},
16279 },
16280 },
16281 },
16282 {
16283 name: "ADDshiftLL",
16284 auxType: auxInt32,
16285 argLen: 2,
16286 asm: arm.AADD,
16287 reg: regInfo{
16288 inputs: []inputInfo{
16289 {0, 22527},
16290 {1, 22527},
16291 },
16292 outputs: []outputInfo{
16293 {0, 21503},
16294 },
16295 },
16296 },
16297 {
16298 name: "ADDshiftRL",
16299 auxType: auxInt32,
16300 argLen: 2,
16301 asm: arm.AADD,
16302 reg: regInfo{
16303 inputs: []inputInfo{
16304 {0, 22527},
16305 {1, 22527},
16306 },
16307 outputs: []outputInfo{
16308 {0, 21503},
16309 },
16310 },
16311 },
16312 {
16313 name: "ADDshiftRA",
16314 auxType: auxInt32,
16315 argLen: 2,
16316 asm: arm.AADD,
16317 reg: regInfo{
16318 inputs: []inputInfo{
16319 {0, 22527},
16320 {1, 22527},
16321 },
16322 outputs: []outputInfo{
16323 {0, 21503},
16324 },
16325 },
16326 },
16327 {
16328 name: "SUBshiftLL",
16329 auxType: auxInt32,
16330 argLen: 2,
16331 asm: arm.ASUB,
16332 reg: regInfo{
16333 inputs: []inputInfo{
16334 {0, 22527},
16335 {1, 22527},
16336 },
16337 outputs: []outputInfo{
16338 {0, 21503},
16339 },
16340 },
16341 },
16342 {
16343 name: "SUBshiftRL",
16344 auxType: auxInt32,
16345 argLen: 2,
16346 asm: arm.ASUB,
16347 reg: regInfo{
16348 inputs: []inputInfo{
16349 {0, 22527},
16350 {1, 22527},
16351 },
16352 outputs: []outputInfo{
16353 {0, 21503},
16354 },
16355 },
16356 },
16357 {
16358 name: "SUBshiftRA",
16359 auxType: auxInt32,
16360 argLen: 2,
16361 asm: arm.ASUB,
16362 reg: regInfo{
16363 inputs: []inputInfo{
16364 {0, 22527},
16365 {1, 22527},
16366 },
16367 outputs: []outputInfo{
16368 {0, 21503},
16369 },
16370 },
16371 },
16372 {
16373 name: "RSBshiftLL",
16374 auxType: auxInt32,
16375 argLen: 2,
16376 asm: arm.ARSB,
16377 reg: regInfo{
16378 inputs: []inputInfo{
16379 {0, 22527},
16380 {1, 22527},
16381 },
16382 outputs: []outputInfo{
16383 {0, 21503},
16384 },
16385 },
16386 },
16387 {
16388 name: "RSBshiftRL",
16389 auxType: auxInt32,
16390 argLen: 2,
16391 asm: arm.ARSB,
16392 reg: regInfo{
16393 inputs: []inputInfo{
16394 {0, 22527},
16395 {1, 22527},
16396 },
16397 outputs: []outputInfo{
16398 {0, 21503},
16399 },
16400 },
16401 },
16402 {
16403 name: "RSBshiftRA",
16404 auxType: auxInt32,
16405 argLen: 2,
16406 asm: arm.ARSB,
16407 reg: regInfo{
16408 inputs: []inputInfo{
16409 {0, 22527},
16410 {1, 22527},
16411 },
16412 outputs: []outputInfo{
16413 {0, 21503},
16414 },
16415 },
16416 },
16417 {
16418 name: "ANDshiftLL",
16419 auxType: auxInt32,
16420 argLen: 2,
16421 asm: arm.AAND,
16422 reg: regInfo{
16423 inputs: []inputInfo{
16424 {0, 22527},
16425 {1, 22527},
16426 },
16427 outputs: []outputInfo{
16428 {0, 21503},
16429 },
16430 },
16431 },
16432 {
16433 name: "ANDshiftRL",
16434 auxType: auxInt32,
16435 argLen: 2,
16436 asm: arm.AAND,
16437 reg: regInfo{
16438 inputs: []inputInfo{
16439 {0, 22527},
16440 {1, 22527},
16441 },
16442 outputs: []outputInfo{
16443 {0, 21503},
16444 },
16445 },
16446 },
16447 {
16448 name: "ANDshiftRA",
16449 auxType: auxInt32,
16450 argLen: 2,
16451 asm: arm.AAND,
16452 reg: regInfo{
16453 inputs: []inputInfo{
16454 {0, 22527},
16455 {1, 22527},
16456 },
16457 outputs: []outputInfo{
16458 {0, 21503},
16459 },
16460 },
16461 },
16462 {
16463 name: "ORshiftLL",
16464 auxType: auxInt32,
16465 argLen: 2,
16466 asm: arm.AORR,
16467 reg: regInfo{
16468 inputs: []inputInfo{
16469 {0, 22527},
16470 {1, 22527},
16471 },
16472 outputs: []outputInfo{
16473 {0, 21503},
16474 },
16475 },
16476 },
16477 {
16478 name: "ORshiftRL",
16479 auxType: auxInt32,
16480 argLen: 2,
16481 asm: arm.AORR,
16482 reg: regInfo{
16483 inputs: []inputInfo{
16484 {0, 22527},
16485 {1, 22527},
16486 },
16487 outputs: []outputInfo{
16488 {0, 21503},
16489 },
16490 },
16491 },
16492 {
16493 name: "ORshiftRA",
16494 auxType: auxInt32,
16495 argLen: 2,
16496 asm: arm.AORR,
16497 reg: regInfo{
16498 inputs: []inputInfo{
16499 {0, 22527},
16500 {1, 22527},
16501 },
16502 outputs: []outputInfo{
16503 {0, 21503},
16504 },
16505 },
16506 },
16507 {
16508 name: "XORshiftLL",
16509 auxType: auxInt32,
16510 argLen: 2,
16511 asm: arm.AEOR,
16512 reg: regInfo{
16513 inputs: []inputInfo{
16514 {0, 22527},
16515 {1, 22527},
16516 },
16517 outputs: []outputInfo{
16518 {0, 21503},
16519 },
16520 },
16521 },
16522 {
16523 name: "XORshiftRL",
16524 auxType: auxInt32,
16525 argLen: 2,
16526 asm: arm.AEOR,
16527 reg: regInfo{
16528 inputs: []inputInfo{
16529 {0, 22527},
16530 {1, 22527},
16531 },
16532 outputs: []outputInfo{
16533 {0, 21503},
16534 },
16535 },
16536 },
16537 {
16538 name: "XORshiftRA",
16539 auxType: auxInt32,
16540 argLen: 2,
16541 asm: arm.AEOR,
16542 reg: regInfo{
16543 inputs: []inputInfo{
16544 {0, 22527},
16545 {1, 22527},
16546 },
16547 outputs: []outputInfo{
16548 {0, 21503},
16549 },
16550 },
16551 },
16552 {
16553 name: "XORshiftRR",
16554 auxType: auxInt32,
16555 argLen: 2,
16556 asm: arm.AEOR,
16557 reg: regInfo{
16558 inputs: []inputInfo{
16559 {0, 22527},
16560 {1, 22527},
16561 },
16562 outputs: []outputInfo{
16563 {0, 21503},
16564 },
16565 },
16566 },
16567 {
16568 name: "BICshiftLL",
16569 auxType: auxInt32,
16570 argLen: 2,
16571 asm: arm.ABIC,
16572 reg: regInfo{
16573 inputs: []inputInfo{
16574 {0, 22527},
16575 {1, 22527},
16576 },
16577 outputs: []outputInfo{
16578 {0, 21503},
16579 },
16580 },
16581 },
16582 {
16583 name: "BICshiftRL",
16584 auxType: auxInt32,
16585 argLen: 2,
16586 asm: arm.ABIC,
16587 reg: regInfo{
16588 inputs: []inputInfo{
16589 {0, 22527},
16590 {1, 22527},
16591 },
16592 outputs: []outputInfo{
16593 {0, 21503},
16594 },
16595 },
16596 },
16597 {
16598 name: "BICshiftRA",
16599 auxType: auxInt32,
16600 argLen: 2,
16601 asm: arm.ABIC,
16602 reg: regInfo{
16603 inputs: []inputInfo{
16604 {0, 22527},
16605 {1, 22527},
16606 },
16607 outputs: []outputInfo{
16608 {0, 21503},
16609 },
16610 },
16611 },
16612 {
16613 name: "MVNshiftLL",
16614 auxType: auxInt32,
16615 argLen: 1,
16616 asm: arm.AMVN,
16617 reg: regInfo{
16618 inputs: []inputInfo{
16619 {0, 22527},
16620 },
16621 outputs: []outputInfo{
16622 {0, 21503},
16623 },
16624 },
16625 },
16626 {
16627 name: "MVNshiftRL",
16628 auxType: auxInt32,
16629 argLen: 1,
16630 asm: arm.AMVN,
16631 reg: regInfo{
16632 inputs: []inputInfo{
16633 {0, 22527},
16634 },
16635 outputs: []outputInfo{
16636 {0, 21503},
16637 },
16638 },
16639 },
16640 {
16641 name: "MVNshiftRA",
16642 auxType: auxInt32,
16643 argLen: 1,
16644 asm: arm.AMVN,
16645 reg: regInfo{
16646 inputs: []inputInfo{
16647 {0, 22527},
16648 },
16649 outputs: []outputInfo{
16650 {0, 21503},
16651 },
16652 },
16653 },
16654 {
16655 name: "ADCshiftLL",
16656 auxType: auxInt32,
16657 argLen: 3,
16658 asm: arm.AADC,
16659 reg: regInfo{
16660 inputs: []inputInfo{
16661 {0, 21503},
16662 {1, 21503},
16663 },
16664 outputs: []outputInfo{
16665 {0, 21503},
16666 },
16667 },
16668 },
16669 {
16670 name: "ADCshiftRL",
16671 auxType: auxInt32,
16672 argLen: 3,
16673 asm: arm.AADC,
16674 reg: regInfo{
16675 inputs: []inputInfo{
16676 {0, 21503},
16677 {1, 21503},
16678 },
16679 outputs: []outputInfo{
16680 {0, 21503},
16681 },
16682 },
16683 },
16684 {
16685 name: "ADCshiftRA",
16686 auxType: auxInt32,
16687 argLen: 3,
16688 asm: arm.AADC,
16689 reg: regInfo{
16690 inputs: []inputInfo{
16691 {0, 21503},
16692 {1, 21503},
16693 },
16694 outputs: []outputInfo{
16695 {0, 21503},
16696 },
16697 },
16698 },
16699 {
16700 name: "SBCshiftLL",
16701 auxType: auxInt32,
16702 argLen: 3,
16703 asm: arm.ASBC,
16704 reg: regInfo{
16705 inputs: []inputInfo{
16706 {0, 21503},
16707 {1, 21503},
16708 },
16709 outputs: []outputInfo{
16710 {0, 21503},
16711 },
16712 },
16713 },
16714 {
16715 name: "SBCshiftRL",
16716 auxType: auxInt32,
16717 argLen: 3,
16718 asm: arm.ASBC,
16719 reg: regInfo{
16720 inputs: []inputInfo{
16721 {0, 21503},
16722 {1, 21503},
16723 },
16724 outputs: []outputInfo{
16725 {0, 21503},
16726 },
16727 },
16728 },
16729 {
16730 name: "SBCshiftRA",
16731 auxType: auxInt32,
16732 argLen: 3,
16733 asm: arm.ASBC,
16734 reg: regInfo{
16735 inputs: []inputInfo{
16736 {0, 21503},
16737 {1, 21503},
16738 },
16739 outputs: []outputInfo{
16740 {0, 21503},
16741 },
16742 },
16743 },
16744 {
16745 name: "RSCshiftLL",
16746 auxType: auxInt32,
16747 argLen: 3,
16748 asm: arm.ARSC,
16749 reg: regInfo{
16750 inputs: []inputInfo{
16751 {0, 21503},
16752 {1, 21503},
16753 },
16754 outputs: []outputInfo{
16755 {0, 21503},
16756 },
16757 },
16758 },
16759 {
16760 name: "RSCshiftRL",
16761 auxType: auxInt32,
16762 argLen: 3,
16763 asm: arm.ARSC,
16764 reg: regInfo{
16765 inputs: []inputInfo{
16766 {0, 21503},
16767 {1, 21503},
16768 },
16769 outputs: []outputInfo{
16770 {0, 21503},
16771 },
16772 },
16773 },
16774 {
16775 name: "RSCshiftRA",
16776 auxType: auxInt32,
16777 argLen: 3,
16778 asm: arm.ARSC,
16779 reg: regInfo{
16780 inputs: []inputInfo{
16781 {0, 21503},
16782 {1, 21503},
16783 },
16784 outputs: []outputInfo{
16785 {0, 21503},
16786 },
16787 },
16788 },
16789 {
16790 name: "ADDSshiftLL",
16791 auxType: auxInt32,
16792 argLen: 2,
16793 asm: arm.AADD,
16794 reg: regInfo{
16795 inputs: []inputInfo{
16796 {0, 22527},
16797 {1, 22527},
16798 },
16799 outputs: []outputInfo{
16800 {1, 0},
16801 {0, 21503},
16802 },
16803 },
16804 },
16805 {
16806 name: "ADDSshiftRL",
16807 auxType: auxInt32,
16808 argLen: 2,
16809 asm: arm.AADD,
16810 reg: regInfo{
16811 inputs: []inputInfo{
16812 {0, 22527},
16813 {1, 22527},
16814 },
16815 outputs: []outputInfo{
16816 {1, 0},
16817 {0, 21503},
16818 },
16819 },
16820 },
16821 {
16822 name: "ADDSshiftRA",
16823 auxType: auxInt32,
16824 argLen: 2,
16825 asm: arm.AADD,
16826 reg: regInfo{
16827 inputs: []inputInfo{
16828 {0, 22527},
16829 {1, 22527},
16830 },
16831 outputs: []outputInfo{
16832 {1, 0},
16833 {0, 21503},
16834 },
16835 },
16836 },
16837 {
16838 name: "SUBSshiftLL",
16839 auxType: auxInt32,
16840 argLen: 2,
16841 asm: arm.ASUB,
16842 reg: regInfo{
16843 inputs: []inputInfo{
16844 {0, 22527},
16845 {1, 22527},
16846 },
16847 outputs: []outputInfo{
16848 {1, 0},
16849 {0, 21503},
16850 },
16851 },
16852 },
16853 {
16854 name: "SUBSshiftRL",
16855 auxType: auxInt32,
16856 argLen: 2,
16857 asm: arm.ASUB,
16858 reg: regInfo{
16859 inputs: []inputInfo{
16860 {0, 22527},
16861 {1, 22527},
16862 },
16863 outputs: []outputInfo{
16864 {1, 0},
16865 {0, 21503},
16866 },
16867 },
16868 },
16869 {
16870 name: "SUBSshiftRA",
16871 auxType: auxInt32,
16872 argLen: 2,
16873 asm: arm.ASUB,
16874 reg: regInfo{
16875 inputs: []inputInfo{
16876 {0, 22527},
16877 {1, 22527},
16878 },
16879 outputs: []outputInfo{
16880 {1, 0},
16881 {0, 21503},
16882 },
16883 },
16884 },
16885 {
16886 name: "RSBSshiftLL",
16887 auxType: auxInt32,
16888 argLen: 2,
16889 asm: arm.ARSB,
16890 reg: regInfo{
16891 inputs: []inputInfo{
16892 {0, 22527},
16893 {1, 22527},
16894 },
16895 outputs: []outputInfo{
16896 {1, 0},
16897 {0, 21503},
16898 },
16899 },
16900 },
16901 {
16902 name: "RSBSshiftRL",
16903 auxType: auxInt32,
16904 argLen: 2,
16905 asm: arm.ARSB,
16906 reg: regInfo{
16907 inputs: []inputInfo{
16908 {0, 22527},
16909 {1, 22527},
16910 },
16911 outputs: []outputInfo{
16912 {1, 0},
16913 {0, 21503},
16914 },
16915 },
16916 },
16917 {
16918 name: "RSBSshiftRA",
16919 auxType: auxInt32,
16920 argLen: 2,
16921 asm: arm.ARSB,
16922 reg: regInfo{
16923 inputs: []inputInfo{
16924 {0, 22527},
16925 {1, 22527},
16926 },
16927 outputs: []outputInfo{
16928 {1, 0},
16929 {0, 21503},
16930 },
16931 },
16932 },
16933 {
16934 name: "ADDshiftLLreg",
16935 argLen: 3,
16936 asm: arm.AADD,
16937 reg: regInfo{
16938 inputs: []inputInfo{
16939 {0, 21503},
16940 {1, 21503},
16941 {2, 21503},
16942 },
16943 outputs: []outputInfo{
16944 {0, 21503},
16945 },
16946 },
16947 },
16948 {
16949 name: "ADDshiftRLreg",
16950 argLen: 3,
16951 asm: arm.AADD,
16952 reg: regInfo{
16953 inputs: []inputInfo{
16954 {0, 21503},
16955 {1, 21503},
16956 {2, 21503},
16957 },
16958 outputs: []outputInfo{
16959 {0, 21503},
16960 },
16961 },
16962 },
16963 {
16964 name: "ADDshiftRAreg",
16965 argLen: 3,
16966 asm: arm.AADD,
16967 reg: regInfo{
16968 inputs: []inputInfo{
16969 {0, 21503},
16970 {1, 21503},
16971 {2, 21503},
16972 },
16973 outputs: []outputInfo{
16974 {0, 21503},
16975 },
16976 },
16977 },
16978 {
16979 name: "SUBshiftLLreg",
16980 argLen: 3,
16981 asm: arm.ASUB,
16982 reg: regInfo{
16983 inputs: []inputInfo{
16984 {0, 21503},
16985 {1, 21503},
16986 {2, 21503},
16987 },
16988 outputs: []outputInfo{
16989 {0, 21503},
16990 },
16991 },
16992 },
16993 {
16994 name: "SUBshiftRLreg",
16995 argLen: 3,
16996 asm: arm.ASUB,
16997 reg: regInfo{
16998 inputs: []inputInfo{
16999 {0, 21503},
17000 {1, 21503},
17001 {2, 21503},
17002 },
17003 outputs: []outputInfo{
17004 {0, 21503},
17005 },
17006 },
17007 },
17008 {
17009 name: "SUBshiftRAreg",
17010 argLen: 3,
17011 asm: arm.ASUB,
17012 reg: regInfo{
17013 inputs: []inputInfo{
17014 {0, 21503},
17015 {1, 21503},
17016 {2, 21503},
17017 },
17018 outputs: []outputInfo{
17019 {0, 21503},
17020 },
17021 },
17022 },
17023 {
17024 name: "RSBshiftLLreg",
17025 argLen: 3,
17026 asm: arm.ARSB,
17027 reg: regInfo{
17028 inputs: []inputInfo{
17029 {0, 21503},
17030 {1, 21503},
17031 {2, 21503},
17032 },
17033 outputs: []outputInfo{
17034 {0, 21503},
17035 },
17036 },
17037 },
17038 {
17039 name: "RSBshiftRLreg",
17040 argLen: 3,
17041 asm: arm.ARSB,
17042 reg: regInfo{
17043 inputs: []inputInfo{
17044 {0, 21503},
17045 {1, 21503},
17046 {2, 21503},
17047 },
17048 outputs: []outputInfo{
17049 {0, 21503},
17050 },
17051 },
17052 },
17053 {
17054 name: "RSBshiftRAreg",
17055 argLen: 3,
17056 asm: arm.ARSB,
17057 reg: regInfo{
17058 inputs: []inputInfo{
17059 {0, 21503},
17060 {1, 21503},
17061 {2, 21503},
17062 },
17063 outputs: []outputInfo{
17064 {0, 21503},
17065 },
17066 },
17067 },
17068 {
17069 name: "ANDshiftLLreg",
17070 argLen: 3,
17071 asm: arm.AAND,
17072 reg: regInfo{
17073 inputs: []inputInfo{
17074 {0, 21503},
17075 {1, 21503},
17076 {2, 21503},
17077 },
17078 outputs: []outputInfo{
17079 {0, 21503},
17080 },
17081 },
17082 },
17083 {
17084 name: "ANDshiftRLreg",
17085 argLen: 3,
17086 asm: arm.AAND,
17087 reg: regInfo{
17088 inputs: []inputInfo{
17089 {0, 21503},
17090 {1, 21503},
17091 {2, 21503},
17092 },
17093 outputs: []outputInfo{
17094 {0, 21503},
17095 },
17096 },
17097 },
17098 {
17099 name: "ANDshiftRAreg",
17100 argLen: 3,
17101 asm: arm.AAND,
17102 reg: regInfo{
17103 inputs: []inputInfo{
17104 {0, 21503},
17105 {1, 21503},
17106 {2, 21503},
17107 },
17108 outputs: []outputInfo{
17109 {0, 21503},
17110 },
17111 },
17112 },
17113 {
17114 name: "ORshiftLLreg",
17115 argLen: 3,
17116 asm: arm.AORR,
17117 reg: regInfo{
17118 inputs: []inputInfo{
17119 {0, 21503},
17120 {1, 21503},
17121 {2, 21503},
17122 },
17123 outputs: []outputInfo{
17124 {0, 21503},
17125 },
17126 },
17127 },
17128 {
17129 name: "ORshiftRLreg",
17130 argLen: 3,
17131 asm: arm.AORR,
17132 reg: regInfo{
17133 inputs: []inputInfo{
17134 {0, 21503},
17135 {1, 21503},
17136 {2, 21503},
17137 },
17138 outputs: []outputInfo{
17139 {0, 21503},
17140 },
17141 },
17142 },
17143 {
17144 name: "ORshiftRAreg",
17145 argLen: 3,
17146 asm: arm.AORR,
17147 reg: regInfo{
17148 inputs: []inputInfo{
17149 {0, 21503},
17150 {1, 21503},
17151 {2, 21503},
17152 },
17153 outputs: []outputInfo{
17154 {0, 21503},
17155 },
17156 },
17157 },
17158 {
17159 name: "XORshiftLLreg",
17160 argLen: 3,
17161 asm: arm.AEOR,
17162 reg: regInfo{
17163 inputs: []inputInfo{
17164 {0, 21503},
17165 {1, 21503},
17166 {2, 21503},
17167 },
17168 outputs: []outputInfo{
17169 {0, 21503},
17170 },
17171 },
17172 },
17173 {
17174 name: "XORshiftRLreg",
17175 argLen: 3,
17176 asm: arm.AEOR,
17177 reg: regInfo{
17178 inputs: []inputInfo{
17179 {0, 21503},
17180 {1, 21503},
17181 {2, 21503},
17182 },
17183 outputs: []outputInfo{
17184 {0, 21503},
17185 },
17186 },
17187 },
17188 {
17189 name: "XORshiftRAreg",
17190 argLen: 3,
17191 asm: arm.AEOR,
17192 reg: regInfo{
17193 inputs: []inputInfo{
17194 {0, 21503},
17195 {1, 21503},
17196 {2, 21503},
17197 },
17198 outputs: []outputInfo{
17199 {0, 21503},
17200 },
17201 },
17202 },
17203 {
17204 name: "BICshiftLLreg",
17205 argLen: 3,
17206 asm: arm.ABIC,
17207 reg: regInfo{
17208 inputs: []inputInfo{
17209 {0, 21503},
17210 {1, 21503},
17211 {2, 21503},
17212 },
17213 outputs: []outputInfo{
17214 {0, 21503},
17215 },
17216 },
17217 },
17218 {
17219 name: "BICshiftRLreg",
17220 argLen: 3,
17221 asm: arm.ABIC,
17222 reg: regInfo{
17223 inputs: []inputInfo{
17224 {0, 21503},
17225 {1, 21503},
17226 {2, 21503},
17227 },
17228 outputs: []outputInfo{
17229 {0, 21503},
17230 },
17231 },
17232 },
17233 {
17234 name: "BICshiftRAreg",
17235 argLen: 3,
17236 asm: arm.ABIC,
17237 reg: regInfo{
17238 inputs: []inputInfo{
17239 {0, 21503},
17240 {1, 21503},
17241 {2, 21503},
17242 },
17243 outputs: []outputInfo{
17244 {0, 21503},
17245 },
17246 },
17247 },
17248 {
17249 name: "MVNshiftLLreg",
17250 argLen: 2,
17251 asm: arm.AMVN,
17252 reg: regInfo{
17253 inputs: []inputInfo{
17254 {0, 22527},
17255 {1, 22527},
17256 },
17257 outputs: []outputInfo{
17258 {0, 21503},
17259 },
17260 },
17261 },
17262 {
17263 name: "MVNshiftRLreg",
17264 argLen: 2,
17265 asm: arm.AMVN,
17266 reg: regInfo{
17267 inputs: []inputInfo{
17268 {0, 22527},
17269 {1, 22527},
17270 },
17271 outputs: []outputInfo{
17272 {0, 21503},
17273 },
17274 },
17275 },
17276 {
17277 name: "MVNshiftRAreg",
17278 argLen: 2,
17279 asm: arm.AMVN,
17280 reg: regInfo{
17281 inputs: []inputInfo{
17282 {0, 22527},
17283 {1, 22527},
17284 },
17285 outputs: []outputInfo{
17286 {0, 21503},
17287 },
17288 },
17289 },
17290 {
17291 name: "ADCshiftLLreg",
17292 argLen: 4,
17293 asm: arm.AADC,
17294 reg: regInfo{
17295 inputs: []inputInfo{
17296 {0, 21503},
17297 {1, 21503},
17298 {2, 21503},
17299 },
17300 outputs: []outputInfo{
17301 {0, 21503},
17302 },
17303 },
17304 },
17305 {
17306 name: "ADCshiftRLreg",
17307 argLen: 4,
17308 asm: arm.AADC,
17309 reg: regInfo{
17310 inputs: []inputInfo{
17311 {0, 21503},
17312 {1, 21503},
17313 {2, 21503},
17314 },
17315 outputs: []outputInfo{
17316 {0, 21503},
17317 },
17318 },
17319 },
17320 {
17321 name: "ADCshiftRAreg",
17322 argLen: 4,
17323 asm: arm.AADC,
17324 reg: regInfo{
17325 inputs: []inputInfo{
17326 {0, 21503},
17327 {1, 21503},
17328 {2, 21503},
17329 },
17330 outputs: []outputInfo{
17331 {0, 21503},
17332 },
17333 },
17334 },
17335 {
17336 name: "SBCshiftLLreg",
17337 argLen: 4,
17338 asm: arm.ASBC,
17339 reg: regInfo{
17340 inputs: []inputInfo{
17341 {0, 21503},
17342 {1, 21503},
17343 {2, 21503},
17344 },
17345 outputs: []outputInfo{
17346 {0, 21503},
17347 },
17348 },
17349 },
17350 {
17351 name: "SBCshiftRLreg",
17352 argLen: 4,
17353 asm: arm.ASBC,
17354 reg: regInfo{
17355 inputs: []inputInfo{
17356 {0, 21503},
17357 {1, 21503},
17358 {2, 21503},
17359 },
17360 outputs: []outputInfo{
17361 {0, 21503},
17362 },
17363 },
17364 },
17365 {
17366 name: "SBCshiftRAreg",
17367 argLen: 4,
17368 asm: arm.ASBC,
17369 reg: regInfo{
17370 inputs: []inputInfo{
17371 {0, 21503},
17372 {1, 21503},
17373 {2, 21503},
17374 },
17375 outputs: []outputInfo{
17376 {0, 21503},
17377 },
17378 },
17379 },
17380 {
17381 name: "RSCshiftLLreg",
17382 argLen: 4,
17383 asm: arm.ARSC,
17384 reg: regInfo{
17385 inputs: []inputInfo{
17386 {0, 21503},
17387 {1, 21503},
17388 {2, 21503},
17389 },
17390 outputs: []outputInfo{
17391 {0, 21503},
17392 },
17393 },
17394 },
17395 {
17396 name: "RSCshiftRLreg",
17397 argLen: 4,
17398 asm: arm.ARSC,
17399 reg: regInfo{
17400 inputs: []inputInfo{
17401 {0, 21503},
17402 {1, 21503},
17403 {2, 21503},
17404 },
17405 outputs: []outputInfo{
17406 {0, 21503},
17407 },
17408 },
17409 },
17410 {
17411 name: "RSCshiftRAreg",
17412 argLen: 4,
17413 asm: arm.ARSC,
17414 reg: regInfo{
17415 inputs: []inputInfo{
17416 {0, 21503},
17417 {1, 21503},
17418 {2, 21503},
17419 },
17420 outputs: []outputInfo{
17421 {0, 21503},
17422 },
17423 },
17424 },
17425 {
17426 name: "ADDSshiftLLreg",
17427 argLen: 3,
17428 asm: arm.AADD,
17429 reg: regInfo{
17430 inputs: []inputInfo{
17431 {0, 21503},
17432 {1, 21503},
17433 {2, 21503},
17434 },
17435 outputs: []outputInfo{
17436 {1, 0},
17437 {0, 21503},
17438 },
17439 },
17440 },
17441 {
17442 name: "ADDSshiftRLreg",
17443 argLen: 3,
17444 asm: arm.AADD,
17445 reg: regInfo{
17446 inputs: []inputInfo{
17447 {0, 21503},
17448 {1, 21503},
17449 {2, 21503},
17450 },
17451 outputs: []outputInfo{
17452 {1, 0},
17453 {0, 21503},
17454 },
17455 },
17456 },
17457 {
17458 name: "ADDSshiftRAreg",
17459 argLen: 3,
17460 asm: arm.AADD,
17461 reg: regInfo{
17462 inputs: []inputInfo{
17463 {0, 21503},
17464 {1, 21503},
17465 {2, 21503},
17466 },
17467 outputs: []outputInfo{
17468 {1, 0},
17469 {0, 21503},
17470 },
17471 },
17472 },
17473 {
17474 name: "SUBSshiftLLreg",
17475 argLen: 3,
17476 asm: arm.ASUB,
17477 reg: regInfo{
17478 inputs: []inputInfo{
17479 {0, 21503},
17480 {1, 21503},
17481 {2, 21503},
17482 },
17483 outputs: []outputInfo{
17484 {1, 0},
17485 {0, 21503},
17486 },
17487 },
17488 },
17489 {
17490 name: "SUBSshiftRLreg",
17491 argLen: 3,
17492 asm: arm.ASUB,
17493 reg: regInfo{
17494 inputs: []inputInfo{
17495 {0, 21503},
17496 {1, 21503},
17497 {2, 21503},
17498 },
17499 outputs: []outputInfo{
17500 {1, 0},
17501 {0, 21503},
17502 },
17503 },
17504 },
17505 {
17506 name: "SUBSshiftRAreg",
17507 argLen: 3,
17508 asm: arm.ASUB,
17509 reg: regInfo{
17510 inputs: []inputInfo{
17511 {0, 21503},
17512 {1, 21503},
17513 {2, 21503},
17514 },
17515 outputs: []outputInfo{
17516 {1, 0},
17517 {0, 21503},
17518 },
17519 },
17520 },
17521 {
17522 name: "RSBSshiftLLreg",
17523 argLen: 3,
17524 asm: arm.ARSB,
17525 reg: regInfo{
17526 inputs: []inputInfo{
17527 {0, 21503},
17528 {1, 21503},
17529 {2, 21503},
17530 },
17531 outputs: []outputInfo{
17532 {1, 0},
17533 {0, 21503},
17534 },
17535 },
17536 },
17537 {
17538 name: "RSBSshiftRLreg",
17539 argLen: 3,
17540 asm: arm.ARSB,
17541 reg: regInfo{
17542 inputs: []inputInfo{
17543 {0, 21503},
17544 {1, 21503},
17545 {2, 21503},
17546 },
17547 outputs: []outputInfo{
17548 {1, 0},
17549 {0, 21503},
17550 },
17551 },
17552 },
17553 {
17554 name: "RSBSshiftRAreg",
17555 argLen: 3,
17556 asm: arm.ARSB,
17557 reg: regInfo{
17558 inputs: []inputInfo{
17559 {0, 21503},
17560 {1, 21503},
17561 {2, 21503},
17562 },
17563 outputs: []outputInfo{
17564 {1, 0},
17565 {0, 21503},
17566 },
17567 },
17568 },
17569 {
17570 name: "CMP",
17571 argLen: 2,
17572 asm: arm.ACMP,
17573 reg: regInfo{
17574 inputs: []inputInfo{
17575 {0, 22527},
17576 {1, 22527},
17577 },
17578 },
17579 },
17580 {
17581 name: "CMPconst",
17582 auxType: auxInt32,
17583 argLen: 1,
17584 asm: arm.ACMP,
17585 reg: regInfo{
17586 inputs: []inputInfo{
17587 {0, 22527},
17588 },
17589 },
17590 },
17591 {
17592 name: "CMN",
17593 argLen: 2,
17594 commutative: true,
17595 asm: arm.ACMN,
17596 reg: regInfo{
17597 inputs: []inputInfo{
17598 {0, 22527},
17599 {1, 22527},
17600 },
17601 },
17602 },
17603 {
17604 name: "CMNconst",
17605 auxType: auxInt32,
17606 argLen: 1,
17607 asm: arm.ACMN,
17608 reg: regInfo{
17609 inputs: []inputInfo{
17610 {0, 22527},
17611 },
17612 },
17613 },
17614 {
17615 name: "TST",
17616 argLen: 2,
17617 commutative: true,
17618 asm: arm.ATST,
17619 reg: regInfo{
17620 inputs: []inputInfo{
17621 {0, 22527},
17622 {1, 22527},
17623 },
17624 },
17625 },
17626 {
17627 name: "TSTconst",
17628 auxType: auxInt32,
17629 argLen: 1,
17630 asm: arm.ATST,
17631 reg: regInfo{
17632 inputs: []inputInfo{
17633 {0, 22527},
17634 },
17635 },
17636 },
17637 {
17638 name: "TEQ",
17639 argLen: 2,
17640 commutative: true,
17641 asm: arm.ATEQ,
17642 reg: regInfo{
17643 inputs: []inputInfo{
17644 {0, 22527},
17645 {1, 22527},
17646 },
17647 },
17648 },
17649 {
17650 name: "TEQconst",
17651 auxType: auxInt32,
17652 argLen: 1,
17653 asm: arm.ATEQ,
17654 reg: regInfo{
17655 inputs: []inputInfo{
17656 {0, 22527},
17657 },
17658 },
17659 },
17660 {
17661 name: "CMPF",
17662 argLen: 2,
17663 asm: arm.ACMPF,
17664 reg: regInfo{
17665 inputs: []inputInfo{
17666 {0, 4294901760},
17667 {1, 4294901760},
17668 },
17669 },
17670 },
17671 {
17672 name: "CMPD",
17673 argLen: 2,
17674 asm: arm.ACMPD,
17675 reg: regInfo{
17676 inputs: []inputInfo{
17677 {0, 4294901760},
17678 {1, 4294901760},
17679 },
17680 },
17681 },
17682 {
17683 name: "CMPshiftLL",
17684 auxType: auxInt32,
17685 argLen: 2,
17686 asm: arm.ACMP,
17687 reg: regInfo{
17688 inputs: []inputInfo{
17689 {0, 22527},
17690 {1, 22527},
17691 },
17692 },
17693 },
17694 {
17695 name: "CMPshiftRL",
17696 auxType: auxInt32,
17697 argLen: 2,
17698 asm: arm.ACMP,
17699 reg: regInfo{
17700 inputs: []inputInfo{
17701 {0, 22527},
17702 {1, 22527},
17703 },
17704 },
17705 },
17706 {
17707 name: "CMPshiftRA",
17708 auxType: auxInt32,
17709 argLen: 2,
17710 asm: arm.ACMP,
17711 reg: regInfo{
17712 inputs: []inputInfo{
17713 {0, 22527},
17714 {1, 22527},
17715 },
17716 },
17717 },
17718 {
17719 name: "CMNshiftLL",
17720 auxType: auxInt32,
17721 argLen: 2,
17722 asm: arm.ACMN,
17723 reg: regInfo{
17724 inputs: []inputInfo{
17725 {0, 22527},
17726 {1, 22527},
17727 },
17728 },
17729 },
17730 {
17731 name: "CMNshiftRL",
17732 auxType: auxInt32,
17733 argLen: 2,
17734 asm: arm.ACMN,
17735 reg: regInfo{
17736 inputs: []inputInfo{
17737 {0, 22527},
17738 {1, 22527},
17739 },
17740 },
17741 },
17742 {
17743 name: "CMNshiftRA",
17744 auxType: auxInt32,
17745 argLen: 2,
17746 asm: arm.ACMN,
17747 reg: regInfo{
17748 inputs: []inputInfo{
17749 {0, 22527},
17750 {1, 22527},
17751 },
17752 },
17753 },
17754 {
17755 name: "TSTshiftLL",
17756 auxType: auxInt32,
17757 argLen: 2,
17758 asm: arm.ATST,
17759 reg: regInfo{
17760 inputs: []inputInfo{
17761 {0, 22527},
17762 {1, 22527},
17763 },
17764 },
17765 },
17766 {
17767 name: "TSTshiftRL",
17768 auxType: auxInt32,
17769 argLen: 2,
17770 asm: arm.ATST,
17771 reg: regInfo{
17772 inputs: []inputInfo{
17773 {0, 22527},
17774 {1, 22527},
17775 },
17776 },
17777 },
17778 {
17779 name: "TSTshiftRA",
17780 auxType: auxInt32,
17781 argLen: 2,
17782 asm: arm.ATST,
17783 reg: regInfo{
17784 inputs: []inputInfo{
17785 {0, 22527},
17786 {1, 22527},
17787 },
17788 },
17789 },
17790 {
17791 name: "TEQshiftLL",
17792 auxType: auxInt32,
17793 argLen: 2,
17794 asm: arm.ATEQ,
17795 reg: regInfo{
17796 inputs: []inputInfo{
17797 {0, 22527},
17798 {1, 22527},
17799 },
17800 },
17801 },
17802 {
17803 name: "TEQshiftRL",
17804 auxType: auxInt32,
17805 argLen: 2,
17806 asm: arm.ATEQ,
17807 reg: regInfo{
17808 inputs: []inputInfo{
17809 {0, 22527},
17810 {1, 22527},
17811 },
17812 },
17813 },
17814 {
17815 name: "TEQshiftRA",
17816 auxType: auxInt32,
17817 argLen: 2,
17818 asm: arm.ATEQ,
17819 reg: regInfo{
17820 inputs: []inputInfo{
17821 {0, 22527},
17822 {1, 22527},
17823 },
17824 },
17825 },
17826 {
17827 name: "CMPshiftLLreg",
17828 argLen: 3,
17829 asm: arm.ACMP,
17830 reg: regInfo{
17831 inputs: []inputInfo{
17832 {0, 21503},
17833 {1, 21503},
17834 {2, 21503},
17835 },
17836 },
17837 },
17838 {
17839 name: "CMPshiftRLreg",
17840 argLen: 3,
17841 asm: arm.ACMP,
17842 reg: regInfo{
17843 inputs: []inputInfo{
17844 {0, 21503},
17845 {1, 21503},
17846 {2, 21503},
17847 },
17848 },
17849 },
17850 {
17851 name: "CMPshiftRAreg",
17852 argLen: 3,
17853 asm: arm.ACMP,
17854 reg: regInfo{
17855 inputs: []inputInfo{
17856 {0, 21503},
17857 {1, 21503},
17858 {2, 21503},
17859 },
17860 },
17861 },
17862 {
17863 name: "CMNshiftLLreg",
17864 argLen: 3,
17865 asm: arm.ACMN,
17866 reg: regInfo{
17867 inputs: []inputInfo{
17868 {0, 21503},
17869 {1, 21503},
17870 {2, 21503},
17871 },
17872 },
17873 },
17874 {
17875 name: "CMNshiftRLreg",
17876 argLen: 3,
17877 asm: arm.ACMN,
17878 reg: regInfo{
17879 inputs: []inputInfo{
17880 {0, 21503},
17881 {1, 21503},
17882 {2, 21503},
17883 },
17884 },
17885 },
17886 {
17887 name: "CMNshiftRAreg",
17888 argLen: 3,
17889 asm: arm.ACMN,
17890 reg: regInfo{
17891 inputs: []inputInfo{
17892 {0, 21503},
17893 {1, 21503},
17894 {2, 21503},
17895 },
17896 },
17897 },
17898 {
17899 name: "TSTshiftLLreg",
17900 argLen: 3,
17901 asm: arm.ATST,
17902 reg: regInfo{
17903 inputs: []inputInfo{
17904 {0, 21503},
17905 {1, 21503},
17906 {2, 21503},
17907 },
17908 },
17909 },
17910 {
17911 name: "TSTshiftRLreg",
17912 argLen: 3,
17913 asm: arm.ATST,
17914 reg: regInfo{
17915 inputs: []inputInfo{
17916 {0, 21503},
17917 {1, 21503},
17918 {2, 21503},
17919 },
17920 },
17921 },
17922 {
17923 name: "TSTshiftRAreg",
17924 argLen: 3,
17925 asm: arm.ATST,
17926 reg: regInfo{
17927 inputs: []inputInfo{
17928 {0, 21503},
17929 {1, 21503},
17930 {2, 21503},
17931 },
17932 },
17933 },
17934 {
17935 name: "TEQshiftLLreg",
17936 argLen: 3,
17937 asm: arm.ATEQ,
17938 reg: regInfo{
17939 inputs: []inputInfo{
17940 {0, 21503},
17941 {1, 21503},
17942 {2, 21503},
17943 },
17944 },
17945 },
17946 {
17947 name: "TEQshiftRLreg",
17948 argLen: 3,
17949 asm: arm.ATEQ,
17950 reg: regInfo{
17951 inputs: []inputInfo{
17952 {0, 21503},
17953 {1, 21503},
17954 {2, 21503},
17955 },
17956 },
17957 },
17958 {
17959 name: "TEQshiftRAreg",
17960 argLen: 3,
17961 asm: arm.ATEQ,
17962 reg: regInfo{
17963 inputs: []inputInfo{
17964 {0, 21503},
17965 {1, 21503},
17966 {2, 21503},
17967 },
17968 },
17969 },
17970 {
17971 name: "CMPF0",
17972 argLen: 1,
17973 asm: arm.ACMPF,
17974 reg: regInfo{
17975 inputs: []inputInfo{
17976 {0, 4294901760},
17977 },
17978 },
17979 },
17980 {
17981 name: "CMPD0",
17982 argLen: 1,
17983 asm: arm.ACMPD,
17984 reg: regInfo{
17985 inputs: []inputInfo{
17986 {0, 4294901760},
17987 },
17988 },
17989 },
17990 {
17991 name: "MOVWconst",
17992 auxType: auxInt32,
17993 argLen: 0,
17994 rematerializeable: true,
17995 asm: arm.AMOVW,
17996 reg: regInfo{
17997 outputs: []outputInfo{
17998 {0, 21503},
17999 },
18000 },
18001 },
18002 {
18003 name: "MOVFconst",
18004 auxType: auxFloat64,
18005 argLen: 0,
18006 rematerializeable: true,
18007 asm: arm.AMOVF,
18008 reg: regInfo{
18009 outputs: []outputInfo{
18010 {0, 4294901760},
18011 },
18012 },
18013 },
18014 {
18015 name: "MOVDconst",
18016 auxType: auxFloat64,
18017 argLen: 0,
18018 rematerializeable: true,
18019 asm: arm.AMOVD,
18020 reg: regInfo{
18021 outputs: []outputInfo{
18022 {0, 4294901760},
18023 },
18024 },
18025 },
18026 {
18027 name: "MOVWaddr",
18028 auxType: auxSymOff,
18029 argLen: 1,
18030 rematerializeable: true,
18031 symEffect: SymAddr,
18032 asm: arm.AMOVW,
18033 reg: regInfo{
18034 inputs: []inputInfo{
18035 {0, 4294975488},
18036 },
18037 outputs: []outputInfo{
18038 {0, 21503},
18039 },
18040 },
18041 },
18042 {
18043 name: "MOVBload",
18044 auxType: auxSymOff,
18045 argLen: 2,
18046 faultOnNilArg0: true,
18047 symEffect: SymRead,
18048 asm: arm.AMOVB,
18049 reg: regInfo{
18050 inputs: []inputInfo{
18051 {0, 4294998015},
18052 },
18053 outputs: []outputInfo{
18054 {0, 21503},
18055 },
18056 },
18057 },
18058 {
18059 name: "MOVBUload",
18060 auxType: auxSymOff,
18061 argLen: 2,
18062 faultOnNilArg0: true,
18063 symEffect: SymRead,
18064 asm: arm.AMOVBU,
18065 reg: regInfo{
18066 inputs: []inputInfo{
18067 {0, 4294998015},
18068 },
18069 outputs: []outputInfo{
18070 {0, 21503},
18071 },
18072 },
18073 },
18074 {
18075 name: "MOVHload",
18076 auxType: auxSymOff,
18077 argLen: 2,
18078 faultOnNilArg0: true,
18079 symEffect: SymRead,
18080 asm: arm.AMOVH,
18081 reg: regInfo{
18082 inputs: []inputInfo{
18083 {0, 4294998015},
18084 },
18085 outputs: []outputInfo{
18086 {0, 21503},
18087 },
18088 },
18089 },
18090 {
18091 name: "MOVHUload",
18092 auxType: auxSymOff,
18093 argLen: 2,
18094 faultOnNilArg0: true,
18095 symEffect: SymRead,
18096 asm: arm.AMOVHU,
18097 reg: regInfo{
18098 inputs: []inputInfo{
18099 {0, 4294998015},
18100 },
18101 outputs: []outputInfo{
18102 {0, 21503},
18103 },
18104 },
18105 },
18106 {
18107 name: "MOVWload",
18108 auxType: auxSymOff,
18109 argLen: 2,
18110 faultOnNilArg0: true,
18111 symEffect: SymRead,
18112 asm: arm.AMOVW,
18113 reg: regInfo{
18114 inputs: []inputInfo{
18115 {0, 4294998015},
18116 },
18117 outputs: []outputInfo{
18118 {0, 21503},
18119 },
18120 },
18121 },
18122 {
18123 name: "MOVFload",
18124 auxType: auxSymOff,
18125 argLen: 2,
18126 faultOnNilArg0: true,
18127 symEffect: SymRead,
18128 asm: arm.AMOVF,
18129 reg: regInfo{
18130 inputs: []inputInfo{
18131 {0, 4294998015},
18132 },
18133 outputs: []outputInfo{
18134 {0, 4294901760},
18135 },
18136 },
18137 },
18138 {
18139 name: "MOVDload",
18140 auxType: auxSymOff,
18141 argLen: 2,
18142 faultOnNilArg0: true,
18143 symEffect: SymRead,
18144 asm: arm.AMOVD,
18145 reg: regInfo{
18146 inputs: []inputInfo{
18147 {0, 4294998015},
18148 },
18149 outputs: []outputInfo{
18150 {0, 4294901760},
18151 },
18152 },
18153 },
18154 {
18155 name: "MOVBstore",
18156 auxType: auxSymOff,
18157 argLen: 3,
18158 faultOnNilArg0: true,
18159 symEffect: SymWrite,
18160 asm: arm.AMOVB,
18161 reg: regInfo{
18162 inputs: []inputInfo{
18163 {1, 22527},
18164 {0, 4294998015},
18165 },
18166 },
18167 },
18168 {
18169 name: "MOVHstore",
18170 auxType: auxSymOff,
18171 argLen: 3,
18172 faultOnNilArg0: true,
18173 symEffect: SymWrite,
18174 asm: arm.AMOVH,
18175 reg: regInfo{
18176 inputs: []inputInfo{
18177 {1, 22527},
18178 {0, 4294998015},
18179 },
18180 },
18181 },
18182 {
18183 name: "MOVWstore",
18184 auxType: auxSymOff,
18185 argLen: 3,
18186 faultOnNilArg0: true,
18187 symEffect: SymWrite,
18188 asm: arm.AMOVW,
18189 reg: regInfo{
18190 inputs: []inputInfo{
18191 {1, 22527},
18192 {0, 4294998015},
18193 },
18194 },
18195 },
18196 {
18197 name: "MOVFstore",
18198 auxType: auxSymOff,
18199 argLen: 3,
18200 faultOnNilArg0: true,
18201 symEffect: SymWrite,
18202 asm: arm.AMOVF,
18203 reg: regInfo{
18204 inputs: []inputInfo{
18205 {0, 4294998015},
18206 {1, 4294901760},
18207 },
18208 },
18209 },
18210 {
18211 name: "MOVDstore",
18212 auxType: auxSymOff,
18213 argLen: 3,
18214 faultOnNilArg0: true,
18215 symEffect: SymWrite,
18216 asm: arm.AMOVD,
18217 reg: regInfo{
18218 inputs: []inputInfo{
18219 {0, 4294998015},
18220 {1, 4294901760},
18221 },
18222 },
18223 },
18224 {
18225 name: "MOVWloadidx",
18226 argLen: 3,
18227 asm: arm.AMOVW,
18228 reg: regInfo{
18229 inputs: []inputInfo{
18230 {1, 22527},
18231 {0, 4294998015},
18232 },
18233 outputs: []outputInfo{
18234 {0, 21503},
18235 },
18236 },
18237 },
18238 {
18239 name: "MOVWloadshiftLL",
18240 auxType: auxInt32,
18241 argLen: 3,
18242 asm: arm.AMOVW,
18243 reg: regInfo{
18244 inputs: []inputInfo{
18245 {1, 22527},
18246 {0, 4294998015},
18247 },
18248 outputs: []outputInfo{
18249 {0, 21503},
18250 },
18251 },
18252 },
18253 {
18254 name: "MOVWloadshiftRL",
18255 auxType: auxInt32,
18256 argLen: 3,
18257 asm: arm.AMOVW,
18258 reg: regInfo{
18259 inputs: []inputInfo{
18260 {1, 22527},
18261 {0, 4294998015},
18262 },
18263 outputs: []outputInfo{
18264 {0, 21503},
18265 },
18266 },
18267 },
18268 {
18269 name: "MOVWloadshiftRA",
18270 auxType: auxInt32,
18271 argLen: 3,
18272 asm: arm.AMOVW,
18273 reg: regInfo{
18274 inputs: []inputInfo{
18275 {1, 22527},
18276 {0, 4294998015},
18277 },
18278 outputs: []outputInfo{
18279 {0, 21503},
18280 },
18281 },
18282 },
18283 {
18284 name: "MOVBUloadidx",
18285 argLen: 3,
18286 asm: arm.AMOVBU,
18287 reg: regInfo{
18288 inputs: []inputInfo{
18289 {1, 22527},
18290 {0, 4294998015},
18291 },
18292 outputs: []outputInfo{
18293 {0, 21503},
18294 },
18295 },
18296 },
18297 {
18298 name: "MOVBloadidx",
18299 argLen: 3,
18300 asm: arm.AMOVB,
18301 reg: regInfo{
18302 inputs: []inputInfo{
18303 {1, 22527},
18304 {0, 4294998015},
18305 },
18306 outputs: []outputInfo{
18307 {0, 21503},
18308 },
18309 },
18310 },
18311 {
18312 name: "MOVHUloadidx",
18313 argLen: 3,
18314 asm: arm.AMOVHU,
18315 reg: regInfo{
18316 inputs: []inputInfo{
18317 {1, 22527},
18318 {0, 4294998015},
18319 },
18320 outputs: []outputInfo{
18321 {0, 21503},
18322 },
18323 },
18324 },
18325 {
18326 name: "MOVHloadidx",
18327 argLen: 3,
18328 asm: arm.AMOVH,
18329 reg: regInfo{
18330 inputs: []inputInfo{
18331 {1, 22527},
18332 {0, 4294998015},
18333 },
18334 outputs: []outputInfo{
18335 {0, 21503},
18336 },
18337 },
18338 },
18339 {
18340 name: "MOVWstoreidx",
18341 argLen: 4,
18342 asm: arm.AMOVW,
18343 reg: regInfo{
18344 inputs: []inputInfo{
18345 {1, 22527},
18346 {2, 22527},
18347 {0, 4294998015},
18348 },
18349 },
18350 },
18351 {
18352 name: "MOVWstoreshiftLL",
18353 auxType: auxInt32,
18354 argLen: 4,
18355 asm: arm.AMOVW,
18356 reg: regInfo{
18357 inputs: []inputInfo{
18358 {1, 22527},
18359 {2, 22527},
18360 {0, 4294998015},
18361 },
18362 },
18363 },
18364 {
18365 name: "MOVWstoreshiftRL",
18366 auxType: auxInt32,
18367 argLen: 4,
18368 asm: arm.AMOVW,
18369 reg: regInfo{
18370 inputs: []inputInfo{
18371 {1, 22527},
18372 {2, 22527},
18373 {0, 4294998015},
18374 },
18375 },
18376 },
18377 {
18378 name: "MOVWstoreshiftRA",
18379 auxType: auxInt32,
18380 argLen: 4,
18381 asm: arm.AMOVW,
18382 reg: regInfo{
18383 inputs: []inputInfo{
18384 {1, 22527},
18385 {2, 22527},
18386 {0, 4294998015},
18387 },
18388 },
18389 },
18390 {
18391 name: "MOVBstoreidx",
18392 argLen: 4,
18393 asm: arm.AMOVB,
18394 reg: regInfo{
18395 inputs: []inputInfo{
18396 {1, 22527},
18397 {2, 22527},
18398 {0, 4294998015},
18399 },
18400 },
18401 },
18402 {
18403 name: "MOVHstoreidx",
18404 argLen: 4,
18405 asm: arm.AMOVH,
18406 reg: regInfo{
18407 inputs: []inputInfo{
18408 {1, 22527},
18409 {2, 22527},
18410 {0, 4294998015},
18411 },
18412 },
18413 },
18414 {
18415 name: "MOVBreg",
18416 argLen: 1,
18417 asm: arm.AMOVBS,
18418 reg: regInfo{
18419 inputs: []inputInfo{
18420 {0, 22527},
18421 },
18422 outputs: []outputInfo{
18423 {0, 21503},
18424 },
18425 },
18426 },
18427 {
18428 name: "MOVBUreg",
18429 argLen: 1,
18430 asm: arm.AMOVBU,
18431 reg: regInfo{
18432 inputs: []inputInfo{
18433 {0, 22527},
18434 },
18435 outputs: []outputInfo{
18436 {0, 21503},
18437 },
18438 },
18439 },
18440 {
18441 name: "MOVHreg",
18442 argLen: 1,
18443 asm: arm.AMOVHS,
18444 reg: regInfo{
18445 inputs: []inputInfo{
18446 {0, 22527},
18447 },
18448 outputs: []outputInfo{
18449 {0, 21503},
18450 },
18451 },
18452 },
18453 {
18454 name: "MOVHUreg",
18455 argLen: 1,
18456 asm: arm.AMOVHU,
18457 reg: regInfo{
18458 inputs: []inputInfo{
18459 {0, 22527},
18460 },
18461 outputs: []outputInfo{
18462 {0, 21503},
18463 },
18464 },
18465 },
18466 {
18467 name: "MOVWreg",
18468 argLen: 1,
18469 asm: arm.AMOVW,
18470 reg: regInfo{
18471 inputs: []inputInfo{
18472 {0, 22527},
18473 },
18474 outputs: []outputInfo{
18475 {0, 21503},
18476 },
18477 },
18478 },
18479 {
18480 name: "MOVWnop",
18481 argLen: 1,
18482 resultInArg0: true,
18483 reg: regInfo{
18484 inputs: []inputInfo{
18485 {0, 21503},
18486 },
18487 outputs: []outputInfo{
18488 {0, 21503},
18489 },
18490 },
18491 },
18492 {
18493 name: "MOVWF",
18494 argLen: 1,
18495 asm: arm.AMOVWF,
18496 reg: regInfo{
18497 inputs: []inputInfo{
18498 {0, 21503},
18499 },
18500 clobbers: 2147483648,
18501 outputs: []outputInfo{
18502 {0, 4294901760},
18503 },
18504 },
18505 },
18506 {
18507 name: "MOVWD",
18508 argLen: 1,
18509 asm: arm.AMOVWD,
18510 reg: regInfo{
18511 inputs: []inputInfo{
18512 {0, 21503},
18513 },
18514 clobbers: 2147483648,
18515 outputs: []outputInfo{
18516 {0, 4294901760},
18517 },
18518 },
18519 },
18520 {
18521 name: "MOVWUF",
18522 argLen: 1,
18523 asm: arm.AMOVWF,
18524 reg: regInfo{
18525 inputs: []inputInfo{
18526 {0, 21503},
18527 },
18528 clobbers: 2147483648,
18529 outputs: []outputInfo{
18530 {0, 4294901760},
18531 },
18532 },
18533 },
18534 {
18535 name: "MOVWUD",
18536 argLen: 1,
18537 asm: arm.AMOVWD,
18538 reg: regInfo{
18539 inputs: []inputInfo{
18540 {0, 21503},
18541 },
18542 clobbers: 2147483648,
18543 outputs: []outputInfo{
18544 {0, 4294901760},
18545 },
18546 },
18547 },
18548 {
18549 name: "MOVFW",
18550 argLen: 1,
18551 asm: arm.AMOVFW,
18552 reg: regInfo{
18553 inputs: []inputInfo{
18554 {0, 4294901760},
18555 },
18556 clobbers: 2147483648,
18557 outputs: []outputInfo{
18558 {0, 21503},
18559 },
18560 },
18561 },
18562 {
18563 name: "MOVDW",
18564 argLen: 1,
18565 asm: arm.AMOVDW,
18566 reg: regInfo{
18567 inputs: []inputInfo{
18568 {0, 4294901760},
18569 },
18570 clobbers: 2147483648,
18571 outputs: []outputInfo{
18572 {0, 21503},
18573 },
18574 },
18575 },
18576 {
18577 name: "MOVFWU",
18578 argLen: 1,
18579 asm: arm.AMOVFW,
18580 reg: regInfo{
18581 inputs: []inputInfo{
18582 {0, 4294901760},
18583 },
18584 clobbers: 2147483648,
18585 outputs: []outputInfo{
18586 {0, 21503},
18587 },
18588 },
18589 },
18590 {
18591 name: "MOVDWU",
18592 argLen: 1,
18593 asm: arm.AMOVDW,
18594 reg: regInfo{
18595 inputs: []inputInfo{
18596 {0, 4294901760},
18597 },
18598 clobbers: 2147483648,
18599 outputs: []outputInfo{
18600 {0, 21503},
18601 },
18602 },
18603 },
18604 {
18605 name: "MOVFD",
18606 argLen: 1,
18607 asm: arm.AMOVFD,
18608 reg: regInfo{
18609 inputs: []inputInfo{
18610 {0, 4294901760},
18611 },
18612 outputs: []outputInfo{
18613 {0, 4294901760},
18614 },
18615 },
18616 },
18617 {
18618 name: "MOVDF",
18619 argLen: 1,
18620 asm: arm.AMOVDF,
18621 reg: regInfo{
18622 inputs: []inputInfo{
18623 {0, 4294901760},
18624 },
18625 outputs: []outputInfo{
18626 {0, 4294901760},
18627 },
18628 },
18629 },
18630 {
18631 name: "CMOVWHSconst",
18632 auxType: auxInt32,
18633 argLen: 2,
18634 resultInArg0: true,
18635 asm: arm.AMOVW,
18636 reg: regInfo{
18637 inputs: []inputInfo{
18638 {0, 21503},
18639 },
18640 outputs: []outputInfo{
18641 {0, 21503},
18642 },
18643 },
18644 },
18645 {
18646 name: "CMOVWLSconst",
18647 auxType: auxInt32,
18648 argLen: 2,
18649 resultInArg0: true,
18650 asm: arm.AMOVW,
18651 reg: regInfo{
18652 inputs: []inputInfo{
18653 {0, 21503},
18654 },
18655 outputs: []outputInfo{
18656 {0, 21503},
18657 },
18658 },
18659 },
18660 {
18661 name: "SRAcond",
18662 argLen: 3,
18663 asm: arm.ASRA,
18664 reg: regInfo{
18665 inputs: []inputInfo{
18666 {0, 21503},
18667 {1, 21503},
18668 },
18669 outputs: []outputInfo{
18670 {0, 21503},
18671 },
18672 },
18673 },
18674 {
18675 name: "CALLstatic",
18676 auxType: auxCallOff,
18677 argLen: 1,
18678 clobberFlags: true,
18679 call: true,
18680 reg: regInfo{
18681 clobbers: 4294924287,
18682 },
18683 },
18684 {
18685 name: "CALLtail",
18686 auxType: auxCallOff,
18687 argLen: 1,
18688 clobberFlags: true,
18689 call: true,
18690 tailCall: true,
18691 reg: regInfo{
18692 clobbers: 4294924287,
18693 },
18694 },
18695 {
18696 name: "CALLclosure",
18697 auxType: auxCallOff,
18698 argLen: 3,
18699 clobberFlags: true,
18700 call: true,
18701 reg: regInfo{
18702 inputs: []inputInfo{
18703 {1, 128},
18704 {0, 29695},
18705 },
18706 clobbers: 4294924287,
18707 },
18708 },
18709 {
18710 name: "CALLinter",
18711 auxType: auxCallOff,
18712 argLen: 2,
18713 clobberFlags: true,
18714 call: true,
18715 reg: regInfo{
18716 inputs: []inputInfo{
18717 {0, 21503},
18718 },
18719 clobbers: 4294924287,
18720 },
18721 },
18722 {
18723 name: "LoweredNilCheck",
18724 argLen: 2,
18725 nilCheck: true,
18726 faultOnNilArg0: true,
18727 reg: regInfo{
18728 inputs: []inputInfo{
18729 {0, 22527},
18730 },
18731 },
18732 },
18733 {
18734 name: "Equal",
18735 argLen: 1,
18736 reg: regInfo{
18737 outputs: []outputInfo{
18738 {0, 21503},
18739 },
18740 },
18741 },
18742 {
18743 name: "NotEqual",
18744 argLen: 1,
18745 reg: regInfo{
18746 outputs: []outputInfo{
18747 {0, 21503},
18748 },
18749 },
18750 },
18751 {
18752 name: "LessThan",
18753 argLen: 1,
18754 reg: regInfo{
18755 outputs: []outputInfo{
18756 {0, 21503},
18757 },
18758 },
18759 },
18760 {
18761 name: "LessEqual",
18762 argLen: 1,
18763 reg: regInfo{
18764 outputs: []outputInfo{
18765 {0, 21503},
18766 },
18767 },
18768 },
18769 {
18770 name: "GreaterThan",
18771 argLen: 1,
18772 reg: regInfo{
18773 outputs: []outputInfo{
18774 {0, 21503},
18775 },
18776 },
18777 },
18778 {
18779 name: "GreaterEqual",
18780 argLen: 1,
18781 reg: regInfo{
18782 outputs: []outputInfo{
18783 {0, 21503},
18784 },
18785 },
18786 },
18787 {
18788 name: "LessThanU",
18789 argLen: 1,
18790 reg: regInfo{
18791 outputs: []outputInfo{
18792 {0, 21503},
18793 },
18794 },
18795 },
18796 {
18797 name: "LessEqualU",
18798 argLen: 1,
18799 reg: regInfo{
18800 outputs: []outputInfo{
18801 {0, 21503},
18802 },
18803 },
18804 },
18805 {
18806 name: "GreaterThanU",
18807 argLen: 1,
18808 reg: regInfo{
18809 outputs: []outputInfo{
18810 {0, 21503},
18811 },
18812 },
18813 },
18814 {
18815 name: "GreaterEqualU",
18816 argLen: 1,
18817 reg: regInfo{
18818 outputs: []outputInfo{
18819 {0, 21503},
18820 },
18821 },
18822 },
18823 {
18824 name: "DUFFZERO",
18825 auxType: auxInt64,
18826 argLen: 3,
18827 faultOnNilArg0: true,
18828 reg: regInfo{
18829 inputs: []inputInfo{
18830 {0, 2},
18831 {1, 1},
18832 },
18833 clobbers: 20482,
18834 },
18835 },
18836 {
18837 name: "DUFFCOPY",
18838 auxType: auxInt64,
18839 argLen: 3,
18840 faultOnNilArg0: true,
18841 faultOnNilArg1: true,
18842 reg: regInfo{
18843 inputs: []inputInfo{
18844 {0, 4},
18845 {1, 2},
18846 },
18847 clobbers: 20487,
18848 },
18849 },
18850 {
18851 name: "LoweredZero",
18852 auxType: auxInt64,
18853 argLen: 4,
18854 clobberFlags: true,
18855 faultOnNilArg0: true,
18856 reg: regInfo{
18857 inputs: []inputInfo{
18858 {0, 2},
18859 {1, 21503},
18860 {2, 21503},
18861 },
18862 clobbers: 2,
18863 },
18864 },
18865 {
18866 name: "LoweredMove",
18867 auxType: auxInt64,
18868 argLen: 4,
18869 clobberFlags: true,
18870 faultOnNilArg0: true,
18871 faultOnNilArg1: true,
18872 reg: regInfo{
18873 inputs: []inputInfo{
18874 {0, 4},
18875 {1, 2},
18876 {2, 21503},
18877 },
18878 clobbers: 6,
18879 },
18880 },
18881 {
18882 name: "LoweredGetClosurePtr",
18883 argLen: 0,
18884 zeroWidth: true,
18885 reg: regInfo{
18886 outputs: []outputInfo{
18887 {0, 128},
18888 },
18889 },
18890 },
18891 {
18892 name: "LoweredGetCallerSP",
18893 argLen: 1,
18894 rematerializeable: true,
18895 reg: regInfo{
18896 outputs: []outputInfo{
18897 {0, 21503},
18898 },
18899 },
18900 },
18901 {
18902 name: "LoweredGetCallerPC",
18903 argLen: 0,
18904 rematerializeable: true,
18905 reg: regInfo{
18906 outputs: []outputInfo{
18907 {0, 21503},
18908 },
18909 },
18910 },
18911 {
18912 name: "LoweredPanicBoundsA",
18913 auxType: auxInt64,
18914 argLen: 3,
18915 call: true,
18916 reg: regInfo{
18917 inputs: []inputInfo{
18918 {0, 4},
18919 {1, 8},
18920 },
18921 },
18922 },
18923 {
18924 name: "LoweredPanicBoundsB",
18925 auxType: auxInt64,
18926 argLen: 3,
18927 call: true,
18928 reg: regInfo{
18929 inputs: []inputInfo{
18930 {0, 2},
18931 {1, 4},
18932 },
18933 },
18934 },
18935 {
18936 name: "LoweredPanicBoundsC",
18937 auxType: auxInt64,
18938 argLen: 3,
18939 call: true,
18940 reg: regInfo{
18941 inputs: []inputInfo{
18942 {0, 1},
18943 {1, 2},
18944 },
18945 },
18946 },
18947 {
18948 name: "LoweredPanicExtendA",
18949 auxType: auxInt64,
18950 argLen: 4,
18951 call: true,
18952 reg: regInfo{
18953 inputs: []inputInfo{
18954 {0, 16},
18955 {1, 4},
18956 {2, 8},
18957 },
18958 },
18959 },
18960 {
18961 name: "LoweredPanicExtendB",
18962 auxType: auxInt64,
18963 argLen: 4,
18964 call: true,
18965 reg: regInfo{
18966 inputs: []inputInfo{
18967 {0, 16},
18968 {1, 2},
18969 {2, 4},
18970 },
18971 },
18972 },
18973 {
18974 name: "LoweredPanicExtendC",
18975 auxType: auxInt64,
18976 argLen: 4,
18977 call: true,
18978 reg: regInfo{
18979 inputs: []inputInfo{
18980 {0, 16},
18981 {1, 1},
18982 {2, 2},
18983 },
18984 },
18985 },
18986 {
18987 name: "FlagConstant",
18988 auxType: auxFlagConstant,
18989 argLen: 0,
18990 reg: regInfo{},
18991 },
18992 {
18993 name: "InvertFlags",
18994 argLen: 1,
18995 reg: regInfo{},
18996 },
18997 {
18998 name: "LoweredWB",
18999 auxType: auxInt64,
19000 argLen: 1,
19001 clobberFlags: true,
19002 reg: regInfo{
19003 clobbers: 4294922240,
19004 outputs: []outputInfo{
19005 {0, 256},
19006 },
19007 },
19008 },
19009
19010 {
19011 name: "ADCSflags",
19012 argLen: 3,
19013 commutative: true,
19014 asm: arm64.AADCS,
19015 reg: regInfo{
19016 inputs: []inputInfo{
19017 {0, 670826495},
19018 {1, 670826495},
19019 },
19020 outputs: []outputInfo{
19021 {1, 0},
19022 {0, 670826495},
19023 },
19024 },
19025 },
19026 {
19027 name: "ADCzerocarry",
19028 argLen: 1,
19029 asm: arm64.AADC,
19030 reg: regInfo{
19031 outputs: []outputInfo{
19032 {0, 670826495},
19033 },
19034 },
19035 },
19036 {
19037 name: "ADD",
19038 argLen: 2,
19039 commutative: true,
19040 asm: arm64.AADD,
19041 reg: regInfo{
19042 inputs: []inputInfo{
19043 {0, 805044223},
19044 {1, 805044223},
19045 },
19046 outputs: []outputInfo{
19047 {0, 670826495},
19048 },
19049 },
19050 },
19051 {
19052 name: "ADDconst",
19053 auxType: auxInt64,
19054 argLen: 1,
19055 asm: arm64.AADD,
19056 reg: regInfo{
19057 inputs: []inputInfo{
19058 {0, 1878786047},
19059 },
19060 outputs: []outputInfo{
19061 {0, 670826495},
19062 },
19063 },
19064 },
19065 {
19066 name: "ADDSconstflags",
19067 auxType: auxInt64,
19068 argLen: 1,
19069 asm: arm64.AADDS,
19070 reg: regInfo{
19071 inputs: []inputInfo{
19072 {0, 805044223},
19073 },
19074 outputs: []outputInfo{
19075 {1, 0},
19076 {0, 670826495},
19077 },
19078 },
19079 },
19080 {
19081 name: "ADDSflags",
19082 argLen: 2,
19083 commutative: true,
19084 asm: arm64.AADDS,
19085 reg: regInfo{
19086 inputs: []inputInfo{
19087 {0, 670826495},
19088 {1, 670826495},
19089 },
19090 outputs: []outputInfo{
19091 {1, 0},
19092 {0, 670826495},
19093 },
19094 },
19095 },
19096 {
19097 name: "SUB",
19098 argLen: 2,
19099 asm: arm64.ASUB,
19100 reg: regInfo{
19101 inputs: []inputInfo{
19102 {0, 805044223},
19103 {1, 805044223},
19104 },
19105 outputs: []outputInfo{
19106 {0, 670826495},
19107 },
19108 },
19109 },
19110 {
19111 name: "SUBconst",
19112 auxType: auxInt64,
19113 argLen: 1,
19114 asm: arm64.ASUB,
19115 reg: regInfo{
19116 inputs: []inputInfo{
19117 {0, 805044223},
19118 },
19119 outputs: []outputInfo{
19120 {0, 670826495},
19121 },
19122 },
19123 },
19124 {
19125 name: "SBCSflags",
19126 argLen: 3,
19127 asm: arm64.ASBCS,
19128 reg: regInfo{
19129 inputs: []inputInfo{
19130 {0, 670826495},
19131 {1, 670826495},
19132 },
19133 outputs: []outputInfo{
19134 {1, 0},
19135 {0, 670826495},
19136 },
19137 },
19138 },
19139 {
19140 name: "SUBSflags",
19141 argLen: 2,
19142 asm: arm64.ASUBS,
19143 reg: regInfo{
19144 inputs: []inputInfo{
19145 {0, 670826495},
19146 {1, 670826495},
19147 },
19148 outputs: []outputInfo{
19149 {1, 0},
19150 {0, 670826495},
19151 },
19152 },
19153 },
19154 {
19155 name: "MUL",
19156 argLen: 2,
19157 commutative: true,
19158 asm: arm64.AMUL,
19159 reg: regInfo{
19160 inputs: []inputInfo{
19161 {0, 805044223},
19162 {1, 805044223},
19163 },
19164 outputs: []outputInfo{
19165 {0, 670826495},
19166 },
19167 },
19168 },
19169 {
19170 name: "MULW",
19171 argLen: 2,
19172 commutative: true,
19173 asm: arm64.AMULW,
19174 reg: regInfo{
19175 inputs: []inputInfo{
19176 {0, 805044223},
19177 {1, 805044223},
19178 },
19179 outputs: []outputInfo{
19180 {0, 670826495},
19181 },
19182 },
19183 },
19184 {
19185 name: "MNEG",
19186 argLen: 2,
19187 commutative: true,
19188 asm: arm64.AMNEG,
19189 reg: regInfo{
19190 inputs: []inputInfo{
19191 {0, 805044223},
19192 {1, 805044223},
19193 },
19194 outputs: []outputInfo{
19195 {0, 670826495},
19196 },
19197 },
19198 },
19199 {
19200 name: "MNEGW",
19201 argLen: 2,
19202 commutative: true,
19203 asm: arm64.AMNEGW,
19204 reg: regInfo{
19205 inputs: []inputInfo{
19206 {0, 805044223},
19207 {1, 805044223},
19208 },
19209 outputs: []outputInfo{
19210 {0, 670826495},
19211 },
19212 },
19213 },
19214 {
19215 name: "MULH",
19216 argLen: 2,
19217 commutative: true,
19218 asm: arm64.ASMULH,
19219 reg: regInfo{
19220 inputs: []inputInfo{
19221 {0, 805044223},
19222 {1, 805044223},
19223 },
19224 outputs: []outputInfo{
19225 {0, 670826495},
19226 },
19227 },
19228 },
19229 {
19230 name: "UMULH",
19231 argLen: 2,
19232 commutative: true,
19233 asm: arm64.AUMULH,
19234 reg: regInfo{
19235 inputs: []inputInfo{
19236 {0, 805044223},
19237 {1, 805044223},
19238 },
19239 outputs: []outputInfo{
19240 {0, 670826495},
19241 },
19242 },
19243 },
19244 {
19245 name: "MULL",
19246 argLen: 2,
19247 commutative: true,
19248 asm: arm64.ASMULL,
19249 reg: regInfo{
19250 inputs: []inputInfo{
19251 {0, 805044223},
19252 {1, 805044223},
19253 },
19254 outputs: []outputInfo{
19255 {0, 670826495},
19256 },
19257 },
19258 },
19259 {
19260 name: "UMULL",
19261 argLen: 2,
19262 commutative: true,
19263 asm: arm64.AUMULL,
19264 reg: regInfo{
19265 inputs: []inputInfo{
19266 {0, 805044223},
19267 {1, 805044223},
19268 },
19269 outputs: []outputInfo{
19270 {0, 670826495},
19271 },
19272 },
19273 },
19274 {
19275 name: "DIV",
19276 argLen: 2,
19277 asm: arm64.ASDIV,
19278 reg: regInfo{
19279 inputs: []inputInfo{
19280 {0, 805044223},
19281 {1, 805044223},
19282 },
19283 outputs: []outputInfo{
19284 {0, 670826495},
19285 },
19286 },
19287 },
19288 {
19289 name: "UDIV",
19290 argLen: 2,
19291 asm: arm64.AUDIV,
19292 reg: regInfo{
19293 inputs: []inputInfo{
19294 {0, 805044223},
19295 {1, 805044223},
19296 },
19297 outputs: []outputInfo{
19298 {0, 670826495},
19299 },
19300 },
19301 },
19302 {
19303 name: "DIVW",
19304 argLen: 2,
19305 asm: arm64.ASDIVW,
19306 reg: regInfo{
19307 inputs: []inputInfo{
19308 {0, 805044223},
19309 {1, 805044223},
19310 },
19311 outputs: []outputInfo{
19312 {0, 670826495},
19313 },
19314 },
19315 },
19316 {
19317 name: "UDIVW",
19318 argLen: 2,
19319 asm: arm64.AUDIVW,
19320 reg: regInfo{
19321 inputs: []inputInfo{
19322 {0, 805044223},
19323 {1, 805044223},
19324 },
19325 outputs: []outputInfo{
19326 {0, 670826495},
19327 },
19328 },
19329 },
19330 {
19331 name: "MOD",
19332 argLen: 2,
19333 asm: arm64.AREM,
19334 reg: regInfo{
19335 inputs: []inputInfo{
19336 {0, 805044223},
19337 {1, 805044223},
19338 },
19339 outputs: []outputInfo{
19340 {0, 670826495},
19341 },
19342 },
19343 },
19344 {
19345 name: "UMOD",
19346 argLen: 2,
19347 asm: arm64.AUREM,
19348 reg: regInfo{
19349 inputs: []inputInfo{
19350 {0, 805044223},
19351 {1, 805044223},
19352 },
19353 outputs: []outputInfo{
19354 {0, 670826495},
19355 },
19356 },
19357 },
19358 {
19359 name: "MODW",
19360 argLen: 2,
19361 asm: arm64.AREMW,
19362 reg: regInfo{
19363 inputs: []inputInfo{
19364 {0, 805044223},
19365 {1, 805044223},
19366 },
19367 outputs: []outputInfo{
19368 {0, 670826495},
19369 },
19370 },
19371 },
19372 {
19373 name: "UMODW",
19374 argLen: 2,
19375 asm: arm64.AUREMW,
19376 reg: regInfo{
19377 inputs: []inputInfo{
19378 {0, 805044223},
19379 {1, 805044223},
19380 },
19381 outputs: []outputInfo{
19382 {0, 670826495},
19383 },
19384 },
19385 },
19386 {
19387 name: "FADDS",
19388 argLen: 2,
19389 commutative: true,
19390 asm: arm64.AFADDS,
19391 reg: regInfo{
19392 inputs: []inputInfo{
19393 {0, 9223372034707292160},
19394 {1, 9223372034707292160},
19395 },
19396 outputs: []outputInfo{
19397 {0, 9223372034707292160},
19398 },
19399 },
19400 },
19401 {
19402 name: "FADDD",
19403 argLen: 2,
19404 commutative: true,
19405 asm: arm64.AFADDD,
19406 reg: regInfo{
19407 inputs: []inputInfo{
19408 {0, 9223372034707292160},
19409 {1, 9223372034707292160},
19410 },
19411 outputs: []outputInfo{
19412 {0, 9223372034707292160},
19413 },
19414 },
19415 },
19416 {
19417 name: "FSUBS",
19418 argLen: 2,
19419 asm: arm64.AFSUBS,
19420 reg: regInfo{
19421 inputs: []inputInfo{
19422 {0, 9223372034707292160},
19423 {1, 9223372034707292160},
19424 },
19425 outputs: []outputInfo{
19426 {0, 9223372034707292160},
19427 },
19428 },
19429 },
19430 {
19431 name: "FSUBD",
19432 argLen: 2,
19433 asm: arm64.AFSUBD,
19434 reg: regInfo{
19435 inputs: []inputInfo{
19436 {0, 9223372034707292160},
19437 {1, 9223372034707292160},
19438 },
19439 outputs: []outputInfo{
19440 {0, 9223372034707292160},
19441 },
19442 },
19443 },
19444 {
19445 name: "FMULS",
19446 argLen: 2,
19447 commutative: true,
19448 asm: arm64.AFMULS,
19449 reg: regInfo{
19450 inputs: []inputInfo{
19451 {0, 9223372034707292160},
19452 {1, 9223372034707292160},
19453 },
19454 outputs: []outputInfo{
19455 {0, 9223372034707292160},
19456 },
19457 },
19458 },
19459 {
19460 name: "FMULD",
19461 argLen: 2,
19462 commutative: true,
19463 asm: arm64.AFMULD,
19464 reg: regInfo{
19465 inputs: []inputInfo{
19466 {0, 9223372034707292160},
19467 {1, 9223372034707292160},
19468 },
19469 outputs: []outputInfo{
19470 {0, 9223372034707292160},
19471 },
19472 },
19473 },
19474 {
19475 name: "FNMULS",
19476 argLen: 2,
19477 commutative: true,
19478 asm: arm64.AFNMULS,
19479 reg: regInfo{
19480 inputs: []inputInfo{
19481 {0, 9223372034707292160},
19482 {1, 9223372034707292160},
19483 },
19484 outputs: []outputInfo{
19485 {0, 9223372034707292160},
19486 },
19487 },
19488 },
19489 {
19490 name: "FNMULD",
19491 argLen: 2,
19492 commutative: true,
19493 asm: arm64.AFNMULD,
19494 reg: regInfo{
19495 inputs: []inputInfo{
19496 {0, 9223372034707292160},
19497 {1, 9223372034707292160},
19498 },
19499 outputs: []outputInfo{
19500 {0, 9223372034707292160},
19501 },
19502 },
19503 },
19504 {
19505 name: "FDIVS",
19506 argLen: 2,
19507 asm: arm64.AFDIVS,
19508 reg: regInfo{
19509 inputs: []inputInfo{
19510 {0, 9223372034707292160},
19511 {1, 9223372034707292160},
19512 },
19513 outputs: []outputInfo{
19514 {0, 9223372034707292160},
19515 },
19516 },
19517 },
19518 {
19519 name: "FDIVD",
19520 argLen: 2,
19521 asm: arm64.AFDIVD,
19522 reg: regInfo{
19523 inputs: []inputInfo{
19524 {0, 9223372034707292160},
19525 {1, 9223372034707292160},
19526 },
19527 outputs: []outputInfo{
19528 {0, 9223372034707292160},
19529 },
19530 },
19531 },
19532 {
19533 name: "AND",
19534 argLen: 2,
19535 commutative: true,
19536 asm: arm64.AAND,
19537 reg: regInfo{
19538 inputs: []inputInfo{
19539 {0, 805044223},
19540 {1, 805044223},
19541 },
19542 outputs: []outputInfo{
19543 {0, 670826495},
19544 },
19545 },
19546 },
19547 {
19548 name: "ANDconst",
19549 auxType: auxInt64,
19550 argLen: 1,
19551 asm: arm64.AAND,
19552 reg: regInfo{
19553 inputs: []inputInfo{
19554 {0, 805044223},
19555 },
19556 outputs: []outputInfo{
19557 {0, 670826495},
19558 },
19559 },
19560 },
19561 {
19562 name: "OR",
19563 argLen: 2,
19564 commutative: true,
19565 asm: arm64.AORR,
19566 reg: regInfo{
19567 inputs: []inputInfo{
19568 {0, 805044223},
19569 {1, 805044223},
19570 },
19571 outputs: []outputInfo{
19572 {0, 670826495},
19573 },
19574 },
19575 },
19576 {
19577 name: "ORconst",
19578 auxType: auxInt64,
19579 argLen: 1,
19580 asm: arm64.AORR,
19581 reg: regInfo{
19582 inputs: []inputInfo{
19583 {0, 805044223},
19584 },
19585 outputs: []outputInfo{
19586 {0, 670826495},
19587 },
19588 },
19589 },
19590 {
19591 name: "XOR",
19592 argLen: 2,
19593 commutative: true,
19594 asm: arm64.AEOR,
19595 reg: regInfo{
19596 inputs: []inputInfo{
19597 {0, 805044223},
19598 {1, 805044223},
19599 },
19600 outputs: []outputInfo{
19601 {0, 670826495},
19602 },
19603 },
19604 },
19605 {
19606 name: "XORconst",
19607 auxType: auxInt64,
19608 argLen: 1,
19609 asm: arm64.AEOR,
19610 reg: regInfo{
19611 inputs: []inputInfo{
19612 {0, 805044223},
19613 },
19614 outputs: []outputInfo{
19615 {0, 670826495},
19616 },
19617 },
19618 },
19619 {
19620 name: "BIC",
19621 argLen: 2,
19622 asm: arm64.ABIC,
19623 reg: regInfo{
19624 inputs: []inputInfo{
19625 {0, 805044223},
19626 {1, 805044223},
19627 },
19628 outputs: []outputInfo{
19629 {0, 670826495},
19630 },
19631 },
19632 },
19633 {
19634 name: "EON",
19635 argLen: 2,
19636 asm: arm64.AEON,
19637 reg: regInfo{
19638 inputs: []inputInfo{
19639 {0, 805044223},
19640 {1, 805044223},
19641 },
19642 outputs: []outputInfo{
19643 {0, 670826495},
19644 },
19645 },
19646 },
19647 {
19648 name: "ORN",
19649 argLen: 2,
19650 asm: arm64.AORN,
19651 reg: regInfo{
19652 inputs: []inputInfo{
19653 {0, 805044223},
19654 {1, 805044223},
19655 },
19656 outputs: []outputInfo{
19657 {0, 670826495},
19658 },
19659 },
19660 },
19661 {
19662 name: "MVN",
19663 argLen: 1,
19664 asm: arm64.AMVN,
19665 reg: regInfo{
19666 inputs: []inputInfo{
19667 {0, 805044223},
19668 },
19669 outputs: []outputInfo{
19670 {0, 670826495},
19671 },
19672 },
19673 },
19674 {
19675 name: "NEG",
19676 argLen: 1,
19677 asm: arm64.ANEG,
19678 reg: regInfo{
19679 inputs: []inputInfo{
19680 {0, 805044223},
19681 },
19682 outputs: []outputInfo{
19683 {0, 670826495},
19684 },
19685 },
19686 },
19687 {
19688 name: "NEGSflags",
19689 argLen: 1,
19690 asm: arm64.ANEGS,
19691 reg: regInfo{
19692 inputs: []inputInfo{
19693 {0, 805044223},
19694 },
19695 outputs: []outputInfo{
19696 {1, 0},
19697 {0, 670826495},
19698 },
19699 },
19700 },
19701 {
19702 name: "NGCzerocarry",
19703 argLen: 1,
19704 asm: arm64.ANGC,
19705 reg: regInfo{
19706 outputs: []outputInfo{
19707 {0, 670826495},
19708 },
19709 },
19710 },
19711 {
19712 name: "FABSD",
19713 argLen: 1,
19714 asm: arm64.AFABSD,
19715 reg: regInfo{
19716 inputs: []inputInfo{
19717 {0, 9223372034707292160},
19718 },
19719 outputs: []outputInfo{
19720 {0, 9223372034707292160},
19721 },
19722 },
19723 },
19724 {
19725 name: "FNEGS",
19726 argLen: 1,
19727 asm: arm64.AFNEGS,
19728 reg: regInfo{
19729 inputs: []inputInfo{
19730 {0, 9223372034707292160},
19731 },
19732 outputs: []outputInfo{
19733 {0, 9223372034707292160},
19734 },
19735 },
19736 },
19737 {
19738 name: "FNEGD",
19739 argLen: 1,
19740 asm: arm64.AFNEGD,
19741 reg: regInfo{
19742 inputs: []inputInfo{
19743 {0, 9223372034707292160},
19744 },
19745 outputs: []outputInfo{
19746 {0, 9223372034707292160},
19747 },
19748 },
19749 },
19750 {
19751 name: "FSQRTD",
19752 argLen: 1,
19753 asm: arm64.AFSQRTD,
19754 reg: regInfo{
19755 inputs: []inputInfo{
19756 {0, 9223372034707292160},
19757 },
19758 outputs: []outputInfo{
19759 {0, 9223372034707292160},
19760 },
19761 },
19762 },
19763 {
19764 name: "FSQRTS",
19765 argLen: 1,
19766 asm: arm64.AFSQRTS,
19767 reg: regInfo{
19768 inputs: []inputInfo{
19769 {0, 9223372034707292160},
19770 },
19771 outputs: []outputInfo{
19772 {0, 9223372034707292160},
19773 },
19774 },
19775 },
19776 {
19777 name: "FMIND",
19778 argLen: 2,
19779 asm: arm64.AFMIND,
19780 reg: regInfo{
19781 inputs: []inputInfo{
19782 {0, 9223372034707292160},
19783 {1, 9223372034707292160},
19784 },
19785 outputs: []outputInfo{
19786 {0, 9223372034707292160},
19787 },
19788 },
19789 },
19790 {
19791 name: "FMINS",
19792 argLen: 2,
19793 asm: arm64.AFMINS,
19794 reg: regInfo{
19795 inputs: []inputInfo{
19796 {0, 9223372034707292160},
19797 {1, 9223372034707292160},
19798 },
19799 outputs: []outputInfo{
19800 {0, 9223372034707292160},
19801 },
19802 },
19803 },
19804 {
19805 name: "FMAXD",
19806 argLen: 2,
19807 asm: arm64.AFMAXD,
19808 reg: regInfo{
19809 inputs: []inputInfo{
19810 {0, 9223372034707292160},
19811 {1, 9223372034707292160},
19812 },
19813 outputs: []outputInfo{
19814 {0, 9223372034707292160},
19815 },
19816 },
19817 },
19818 {
19819 name: "FMAXS",
19820 argLen: 2,
19821 asm: arm64.AFMAXS,
19822 reg: regInfo{
19823 inputs: []inputInfo{
19824 {0, 9223372034707292160},
19825 {1, 9223372034707292160},
19826 },
19827 outputs: []outputInfo{
19828 {0, 9223372034707292160},
19829 },
19830 },
19831 },
19832 {
19833 name: "REV",
19834 argLen: 1,
19835 asm: arm64.AREV,
19836 reg: regInfo{
19837 inputs: []inputInfo{
19838 {0, 805044223},
19839 },
19840 outputs: []outputInfo{
19841 {0, 670826495},
19842 },
19843 },
19844 },
19845 {
19846 name: "REVW",
19847 argLen: 1,
19848 asm: arm64.AREVW,
19849 reg: regInfo{
19850 inputs: []inputInfo{
19851 {0, 805044223},
19852 },
19853 outputs: []outputInfo{
19854 {0, 670826495},
19855 },
19856 },
19857 },
19858 {
19859 name: "REV16",
19860 argLen: 1,
19861 asm: arm64.AREV16,
19862 reg: regInfo{
19863 inputs: []inputInfo{
19864 {0, 805044223},
19865 },
19866 outputs: []outputInfo{
19867 {0, 670826495},
19868 },
19869 },
19870 },
19871 {
19872 name: "REV16W",
19873 argLen: 1,
19874 asm: arm64.AREV16W,
19875 reg: regInfo{
19876 inputs: []inputInfo{
19877 {0, 805044223},
19878 },
19879 outputs: []outputInfo{
19880 {0, 670826495},
19881 },
19882 },
19883 },
19884 {
19885 name: "RBIT",
19886 argLen: 1,
19887 asm: arm64.ARBIT,
19888 reg: regInfo{
19889 inputs: []inputInfo{
19890 {0, 805044223},
19891 },
19892 outputs: []outputInfo{
19893 {0, 670826495},
19894 },
19895 },
19896 },
19897 {
19898 name: "RBITW",
19899 argLen: 1,
19900 asm: arm64.ARBITW,
19901 reg: regInfo{
19902 inputs: []inputInfo{
19903 {0, 805044223},
19904 },
19905 outputs: []outputInfo{
19906 {0, 670826495},
19907 },
19908 },
19909 },
19910 {
19911 name: "CLZ",
19912 argLen: 1,
19913 asm: arm64.ACLZ,
19914 reg: regInfo{
19915 inputs: []inputInfo{
19916 {0, 805044223},
19917 },
19918 outputs: []outputInfo{
19919 {0, 670826495},
19920 },
19921 },
19922 },
19923 {
19924 name: "CLZW",
19925 argLen: 1,
19926 asm: arm64.ACLZW,
19927 reg: regInfo{
19928 inputs: []inputInfo{
19929 {0, 805044223},
19930 },
19931 outputs: []outputInfo{
19932 {0, 670826495},
19933 },
19934 },
19935 },
19936 {
19937 name: "VCNT",
19938 argLen: 1,
19939 asm: arm64.AVCNT,
19940 reg: regInfo{
19941 inputs: []inputInfo{
19942 {0, 9223372034707292160},
19943 },
19944 outputs: []outputInfo{
19945 {0, 9223372034707292160},
19946 },
19947 },
19948 },
19949 {
19950 name: "VUADDLV",
19951 argLen: 1,
19952 asm: arm64.AVUADDLV,
19953 reg: regInfo{
19954 inputs: []inputInfo{
19955 {0, 9223372034707292160},
19956 },
19957 outputs: []outputInfo{
19958 {0, 9223372034707292160},
19959 },
19960 },
19961 },
19962 {
19963 name: "LoweredRound32F",
19964 argLen: 1,
19965 resultInArg0: true,
19966 zeroWidth: true,
19967 reg: regInfo{
19968 inputs: []inputInfo{
19969 {0, 9223372034707292160},
19970 },
19971 outputs: []outputInfo{
19972 {0, 9223372034707292160},
19973 },
19974 },
19975 },
19976 {
19977 name: "LoweredRound64F",
19978 argLen: 1,
19979 resultInArg0: true,
19980 zeroWidth: true,
19981 reg: regInfo{
19982 inputs: []inputInfo{
19983 {0, 9223372034707292160},
19984 },
19985 outputs: []outputInfo{
19986 {0, 9223372034707292160},
19987 },
19988 },
19989 },
19990 {
19991 name: "FMADDS",
19992 argLen: 3,
19993 asm: arm64.AFMADDS,
19994 reg: regInfo{
19995 inputs: []inputInfo{
19996 {0, 9223372034707292160},
19997 {1, 9223372034707292160},
19998 {2, 9223372034707292160},
19999 },
20000 outputs: []outputInfo{
20001 {0, 9223372034707292160},
20002 },
20003 },
20004 },
20005 {
20006 name: "FMADDD",
20007 argLen: 3,
20008 asm: arm64.AFMADDD,
20009 reg: regInfo{
20010 inputs: []inputInfo{
20011 {0, 9223372034707292160},
20012 {1, 9223372034707292160},
20013 {2, 9223372034707292160},
20014 },
20015 outputs: []outputInfo{
20016 {0, 9223372034707292160},
20017 },
20018 },
20019 },
20020 {
20021 name: "FNMADDS",
20022 argLen: 3,
20023 asm: arm64.AFNMADDS,
20024 reg: regInfo{
20025 inputs: []inputInfo{
20026 {0, 9223372034707292160},
20027 {1, 9223372034707292160},
20028 {2, 9223372034707292160},
20029 },
20030 outputs: []outputInfo{
20031 {0, 9223372034707292160},
20032 },
20033 },
20034 },
20035 {
20036 name: "FNMADDD",
20037 argLen: 3,
20038 asm: arm64.AFNMADDD,
20039 reg: regInfo{
20040 inputs: []inputInfo{
20041 {0, 9223372034707292160},
20042 {1, 9223372034707292160},
20043 {2, 9223372034707292160},
20044 },
20045 outputs: []outputInfo{
20046 {0, 9223372034707292160},
20047 },
20048 },
20049 },
20050 {
20051 name: "FMSUBS",
20052 argLen: 3,
20053 asm: arm64.AFMSUBS,
20054 reg: regInfo{
20055 inputs: []inputInfo{
20056 {0, 9223372034707292160},
20057 {1, 9223372034707292160},
20058 {2, 9223372034707292160},
20059 },
20060 outputs: []outputInfo{
20061 {0, 9223372034707292160},
20062 },
20063 },
20064 },
20065 {
20066 name: "FMSUBD",
20067 argLen: 3,
20068 asm: arm64.AFMSUBD,
20069 reg: regInfo{
20070 inputs: []inputInfo{
20071 {0, 9223372034707292160},
20072 {1, 9223372034707292160},
20073 {2, 9223372034707292160},
20074 },
20075 outputs: []outputInfo{
20076 {0, 9223372034707292160},
20077 },
20078 },
20079 },
20080 {
20081 name: "FNMSUBS",
20082 argLen: 3,
20083 asm: arm64.AFNMSUBS,
20084 reg: regInfo{
20085 inputs: []inputInfo{
20086 {0, 9223372034707292160},
20087 {1, 9223372034707292160},
20088 {2, 9223372034707292160},
20089 },
20090 outputs: []outputInfo{
20091 {0, 9223372034707292160},
20092 },
20093 },
20094 },
20095 {
20096 name: "FNMSUBD",
20097 argLen: 3,
20098 asm: arm64.AFNMSUBD,
20099 reg: regInfo{
20100 inputs: []inputInfo{
20101 {0, 9223372034707292160},
20102 {1, 9223372034707292160},
20103 {2, 9223372034707292160},
20104 },
20105 outputs: []outputInfo{
20106 {0, 9223372034707292160},
20107 },
20108 },
20109 },
20110 {
20111 name: "MADD",
20112 argLen: 3,
20113 asm: arm64.AMADD,
20114 reg: regInfo{
20115 inputs: []inputInfo{
20116 {0, 805044223},
20117 {1, 805044223},
20118 {2, 805044223},
20119 },
20120 outputs: []outputInfo{
20121 {0, 670826495},
20122 },
20123 },
20124 },
20125 {
20126 name: "MADDW",
20127 argLen: 3,
20128 asm: arm64.AMADDW,
20129 reg: regInfo{
20130 inputs: []inputInfo{
20131 {0, 805044223},
20132 {1, 805044223},
20133 {2, 805044223},
20134 },
20135 outputs: []outputInfo{
20136 {0, 670826495},
20137 },
20138 },
20139 },
20140 {
20141 name: "MSUB",
20142 argLen: 3,
20143 asm: arm64.AMSUB,
20144 reg: regInfo{
20145 inputs: []inputInfo{
20146 {0, 805044223},
20147 {1, 805044223},
20148 {2, 805044223},
20149 },
20150 outputs: []outputInfo{
20151 {0, 670826495},
20152 },
20153 },
20154 },
20155 {
20156 name: "MSUBW",
20157 argLen: 3,
20158 asm: arm64.AMSUBW,
20159 reg: regInfo{
20160 inputs: []inputInfo{
20161 {0, 805044223},
20162 {1, 805044223},
20163 {2, 805044223},
20164 },
20165 outputs: []outputInfo{
20166 {0, 670826495},
20167 },
20168 },
20169 },
20170 {
20171 name: "SLL",
20172 argLen: 2,
20173 asm: arm64.ALSL,
20174 reg: regInfo{
20175 inputs: []inputInfo{
20176 {0, 805044223},
20177 {1, 805044223},
20178 },
20179 outputs: []outputInfo{
20180 {0, 670826495},
20181 },
20182 },
20183 },
20184 {
20185 name: "SLLconst",
20186 auxType: auxInt64,
20187 argLen: 1,
20188 asm: arm64.ALSL,
20189 reg: regInfo{
20190 inputs: []inputInfo{
20191 {0, 805044223},
20192 },
20193 outputs: []outputInfo{
20194 {0, 670826495},
20195 },
20196 },
20197 },
20198 {
20199 name: "SRL",
20200 argLen: 2,
20201 asm: arm64.ALSR,
20202 reg: regInfo{
20203 inputs: []inputInfo{
20204 {0, 805044223},
20205 {1, 805044223},
20206 },
20207 outputs: []outputInfo{
20208 {0, 670826495},
20209 },
20210 },
20211 },
20212 {
20213 name: "SRLconst",
20214 auxType: auxInt64,
20215 argLen: 1,
20216 asm: arm64.ALSR,
20217 reg: regInfo{
20218 inputs: []inputInfo{
20219 {0, 805044223},
20220 },
20221 outputs: []outputInfo{
20222 {0, 670826495},
20223 },
20224 },
20225 },
20226 {
20227 name: "SRA",
20228 argLen: 2,
20229 asm: arm64.AASR,
20230 reg: regInfo{
20231 inputs: []inputInfo{
20232 {0, 805044223},
20233 {1, 805044223},
20234 },
20235 outputs: []outputInfo{
20236 {0, 670826495},
20237 },
20238 },
20239 },
20240 {
20241 name: "SRAconst",
20242 auxType: auxInt64,
20243 argLen: 1,
20244 asm: arm64.AASR,
20245 reg: regInfo{
20246 inputs: []inputInfo{
20247 {0, 805044223},
20248 },
20249 outputs: []outputInfo{
20250 {0, 670826495},
20251 },
20252 },
20253 },
20254 {
20255 name: "ROR",
20256 argLen: 2,
20257 asm: arm64.AROR,
20258 reg: regInfo{
20259 inputs: []inputInfo{
20260 {0, 805044223},
20261 {1, 805044223},
20262 },
20263 outputs: []outputInfo{
20264 {0, 670826495},
20265 },
20266 },
20267 },
20268 {
20269 name: "RORW",
20270 argLen: 2,
20271 asm: arm64.ARORW,
20272 reg: regInfo{
20273 inputs: []inputInfo{
20274 {0, 805044223},
20275 {1, 805044223},
20276 },
20277 outputs: []outputInfo{
20278 {0, 670826495},
20279 },
20280 },
20281 },
20282 {
20283 name: "RORconst",
20284 auxType: auxInt64,
20285 argLen: 1,
20286 asm: arm64.AROR,
20287 reg: regInfo{
20288 inputs: []inputInfo{
20289 {0, 805044223},
20290 },
20291 outputs: []outputInfo{
20292 {0, 670826495},
20293 },
20294 },
20295 },
20296 {
20297 name: "RORWconst",
20298 auxType: auxInt64,
20299 argLen: 1,
20300 asm: arm64.ARORW,
20301 reg: regInfo{
20302 inputs: []inputInfo{
20303 {0, 805044223},
20304 },
20305 outputs: []outputInfo{
20306 {0, 670826495},
20307 },
20308 },
20309 },
20310 {
20311 name: "EXTRconst",
20312 auxType: auxInt64,
20313 argLen: 2,
20314 asm: arm64.AEXTR,
20315 reg: regInfo{
20316 inputs: []inputInfo{
20317 {0, 805044223},
20318 {1, 805044223},
20319 },
20320 outputs: []outputInfo{
20321 {0, 670826495},
20322 },
20323 },
20324 },
20325 {
20326 name: "EXTRWconst",
20327 auxType: auxInt64,
20328 argLen: 2,
20329 asm: arm64.AEXTRW,
20330 reg: regInfo{
20331 inputs: []inputInfo{
20332 {0, 805044223},
20333 {1, 805044223},
20334 },
20335 outputs: []outputInfo{
20336 {0, 670826495},
20337 },
20338 },
20339 },
20340 {
20341 name: "CMP",
20342 argLen: 2,
20343 asm: arm64.ACMP,
20344 reg: regInfo{
20345 inputs: []inputInfo{
20346 {0, 805044223},
20347 {1, 805044223},
20348 },
20349 },
20350 },
20351 {
20352 name: "CMPconst",
20353 auxType: auxInt64,
20354 argLen: 1,
20355 asm: arm64.ACMP,
20356 reg: regInfo{
20357 inputs: []inputInfo{
20358 {0, 805044223},
20359 },
20360 },
20361 },
20362 {
20363 name: "CMPW",
20364 argLen: 2,
20365 asm: arm64.ACMPW,
20366 reg: regInfo{
20367 inputs: []inputInfo{
20368 {0, 805044223},
20369 {1, 805044223},
20370 },
20371 },
20372 },
20373 {
20374 name: "CMPWconst",
20375 auxType: auxInt32,
20376 argLen: 1,
20377 asm: arm64.ACMPW,
20378 reg: regInfo{
20379 inputs: []inputInfo{
20380 {0, 805044223},
20381 },
20382 },
20383 },
20384 {
20385 name: "CMN",
20386 argLen: 2,
20387 commutative: true,
20388 asm: arm64.ACMN,
20389 reg: regInfo{
20390 inputs: []inputInfo{
20391 {0, 805044223},
20392 {1, 805044223},
20393 },
20394 },
20395 },
20396 {
20397 name: "CMNconst",
20398 auxType: auxInt64,
20399 argLen: 1,
20400 asm: arm64.ACMN,
20401 reg: regInfo{
20402 inputs: []inputInfo{
20403 {0, 805044223},
20404 },
20405 },
20406 },
20407 {
20408 name: "CMNW",
20409 argLen: 2,
20410 commutative: true,
20411 asm: arm64.ACMNW,
20412 reg: regInfo{
20413 inputs: []inputInfo{
20414 {0, 805044223},
20415 {1, 805044223},
20416 },
20417 },
20418 },
20419 {
20420 name: "CMNWconst",
20421 auxType: auxInt32,
20422 argLen: 1,
20423 asm: arm64.ACMNW,
20424 reg: regInfo{
20425 inputs: []inputInfo{
20426 {0, 805044223},
20427 },
20428 },
20429 },
20430 {
20431 name: "TST",
20432 argLen: 2,
20433 commutative: true,
20434 asm: arm64.ATST,
20435 reg: regInfo{
20436 inputs: []inputInfo{
20437 {0, 805044223},
20438 {1, 805044223},
20439 },
20440 },
20441 },
20442 {
20443 name: "TSTconst",
20444 auxType: auxInt64,
20445 argLen: 1,
20446 asm: arm64.ATST,
20447 reg: regInfo{
20448 inputs: []inputInfo{
20449 {0, 805044223},
20450 },
20451 },
20452 },
20453 {
20454 name: "TSTW",
20455 argLen: 2,
20456 commutative: true,
20457 asm: arm64.ATSTW,
20458 reg: regInfo{
20459 inputs: []inputInfo{
20460 {0, 805044223},
20461 {1, 805044223},
20462 },
20463 },
20464 },
20465 {
20466 name: "TSTWconst",
20467 auxType: auxInt32,
20468 argLen: 1,
20469 asm: arm64.ATSTW,
20470 reg: regInfo{
20471 inputs: []inputInfo{
20472 {0, 805044223},
20473 },
20474 },
20475 },
20476 {
20477 name: "FCMPS",
20478 argLen: 2,
20479 asm: arm64.AFCMPS,
20480 reg: regInfo{
20481 inputs: []inputInfo{
20482 {0, 9223372034707292160},
20483 {1, 9223372034707292160},
20484 },
20485 },
20486 },
20487 {
20488 name: "FCMPD",
20489 argLen: 2,
20490 asm: arm64.AFCMPD,
20491 reg: regInfo{
20492 inputs: []inputInfo{
20493 {0, 9223372034707292160},
20494 {1, 9223372034707292160},
20495 },
20496 },
20497 },
20498 {
20499 name: "FCMPS0",
20500 argLen: 1,
20501 asm: arm64.AFCMPS,
20502 reg: regInfo{
20503 inputs: []inputInfo{
20504 {0, 9223372034707292160},
20505 },
20506 },
20507 },
20508 {
20509 name: "FCMPD0",
20510 argLen: 1,
20511 asm: arm64.AFCMPD,
20512 reg: regInfo{
20513 inputs: []inputInfo{
20514 {0, 9223372034707292160},
20515 },
20516 },
20517 },
20518 {
20519 name: "MVNshiftLL",
20520 auxType: auxInt64,
20521 argLen: 1,
20522 asm: arm64.AMVN,
20523 reg: regInfo{
20524 inputs: []inputInfo{
20525 {0, 805044223},
20526 },
20527 outputs: []outputInfo{
20528 {0, 670826495},
20529 },
20530 },
20531 },
20532 {
20533 name: "MVNshiftRL",
20534 auxType: auxInt64,
20535 argLen: 1,
20536 asm: arm64.AMVN,
20537 reg: regInfo{
20538 inputs: []inputInfo{
20539 {0, 805044223},
20540 },
20541 outputs: []outputInfo{
20542 {0, 670826495},
20543 },
20544 },
20545 },
20546 {
20547 name: "MVNshiftRA",
20548 auxType: auxInt64,
20549 argLen: 1,
20550 asm: arm64.AMVN,
20551 reg: regInfo{
20552 inputs: []inputInfo{
20553 {0, 805044223},
20554 },
20555 outputs: []outputInfo{
20556 {0, 670826495},
20557 },
20558 },
20559 },
20560 {
20561 name: "MVNshiftRO",
20562 auxType: auxInt64,
20563 argLen: 1,
20564 asm: arm64.AMVN,
20565 reg: regInfo{
20566 inputs: []inputInfo{
20567 {0, 805044223},
20568 },
20569 outputs: []outputInfo{
20570 {0, 670826495},
20571 },
20572 },
20573 },
20574 {
20575 name: "NEGshiftLL",
20576 auxType: auxInt64,
20577 argLen: 1,
20578 asm: arm64.ANEG,
20579 reg: regInfo{
20580 inputs: []inputInfo{
20581 {0, 805044223},
20582 },
20583 outputs: []outputInfo{
20584 {0, 670826495},
20585 },
20586 },
20587 },
20588 {
20589 name: "NEGshiftRL",
20590 auxType: auxInt64,
20591 argLen: 1,
20592 asm: arm64.ANEG,
20593 reg: regInfo{
20594 inputs: []inputInfo{
20595 {0, 805044223},
20596 },
20597 outputs: []outputInfo{
20598 {0, 670826495},
20599 },
20600 },
20601 },
20602 {
20603 name: "NEGshiftRA",
20604 auxType: auxInt64,
20605 argLen: 1,
20606 asm: arm64.ANEG,
20607 reg: regInfo{
20608 inputs: []inputInfo{
20609 {0, 805044223},
20610 },
20611 outputs: []outputInfo{
20612 {0, 670826495},
20613 },
20614 },
20615 },
20616 {
20617 name: "ADDshiftLL",
20618 auxType: auxInt64,
20619 argLen: 2,
20620 asm: arm64.AADD,
20621 reg: regInfo{
20622 inputs: []inputInfo{
20623 {0, 805044223},
20624 {1, 805044223},
20625 },
20626 outputs: []outputInfo{
20627 {0, 670826495},
20628 },
20629 },
20630 },
20631 {
20632 name: "ADDshiftRL",
20633 auxType: auxInt64,
20634 argLen: 2,
20635 asm: arm64.AADD,
20636 reg: regInfo{
20637 inputs: []inputInfo{
20638 {0, 805044223},
20639 {1, 805044223},
20640 },
20641 outputs: []outputInfo{
20642 {0, 670826495},
20643 },
20644 },
20645 },
20646 {
20647 name: "ADDshiftRA",
20648 auxType: auxInt64,
20649 argLen: 2,
20650 asm: arm64.AADD,
20651 reg: regInfo{
20652 inputs: []inputInfo{
20653 {0, 805044223},
20654 {1, 805044223},
20655 },
20656 outputs: []outputInfo{
20657 {0, 670826495},
20658 },
20659 },
20660 },
20661 {
20662 name: "SUBshiftLL",
20663 auxType: auxInt64,
20664 argLen: 2,
20665 asm: arm64.ASUB,
20666 reg: regInfo{
20667 inputs: []inputInfo{
20668 {0, 805044223},
20669 {1, 805044223},
20670 },
20671 outputs: []outputInfo{
20672 {0, 670826495},
20673 },
20674 },
20675 },
20676 {
20677 name: "SUBshiftRL",
20678 auxType: auxInt64,
20679 argLen: 2,
20680 asm: arm64.ASUB,
20681 reg: regInfo{
20682 inputs: []inputInfo{
20683 {0, 805044223},
20684 {1, 805044223},
20685 },
20686 outputs: []outputInfo{
20687 {0, 670826495},
20688 },
20689 },
20690 },
20691 {
20692 name: "SUBshiftRA",
20693 auxType: auxInt64,
20694 argLen: 2,
20695 asm: arm64.ASUB,
20696 reg: regInfo{
20697 inputs: []inputInfo{
20698 {0, 805044223},
20699 {1, 805044223},
20700 },
20701 outputs: []outputInfo{
20702 {0, 670826495},
20703 },
20704 },
20705 },
20706 {
20707 name: "ANDshiftLL",
20708 auxType: auxInt64,
20709 argLen: 2,
20710 asm: arm64.AAND,
20711 reg: regInfo{
20712 inputs: []inputInfo{
20713 {0, 805044223},
20714 {1, 805044223},
20715 },
20716 outputs: []outputInfo{
20717 {0, 670826495},
20718 },
20719 },
20720 },
20721 {
20722 name: "ANDshiftRL",
20723 auxType: auxInt64,
20724 argLen: 2,
20725 asm: arm64.AAND,
20726 reg: regInfo{
20727 inputs: []inputInfo{
20728 {0, 805044223},
20729 {1, 805044223},
20730 },
20731 outputs: []outputInfo{
20732 {0, 670826495},
20733 },
20734 },
20735 },
20736 {
20737 name: "ANDshiftRA",
20738 auxType: auxInt64,
20739 argLen: 2,
20740 asm: arm64.AAND,
20741 reg: regInfo{
20742 inputs: []inputInfo{
20743 {0, 805044223},
20744 {1, 805044223},
20745 },
20746 outputs: []outputInfo{
20747 {0, 670826495},
20748 },
20749 },
20750 },
20751 {
20752 name: "ANDshiftRO",
20753 auxType: auxInt64,
20754 argLen: 2,
20755 asm: arm64.AAND,
20756 reg: regInfo{
20757 inputs: []inputInfo{
20758 {0, 805044223},
20759 {1, 805044223},
20760 },
20761 outputs: []outputInfo{
20762 {0, 670826495},
20763 },
20764 },
20765 },
20766 {
20767 name: "ORshiftLL",
20768 auxType: auxInt64,
20769 argLen: 2,
20770 asm: arm64.AORR,
20771 reg: regInfo{
20772 inputs: []inputInfo{
20773 {0, 805044223},
20774 {1, 805044223},
20775 },
20776 outputs: []outputInfo{
20777 {0, 670826495},
20778 },
20779 },
20780 },
20781 {
20782 name: "ORshiftRL",
20783 auxType: auxInt64,
20784 argLen: 2,
20785 asm: arm64.AORR,
20786 reg: regInfo{
20787 inputs: []inputInfo{
20788 {0, 805044223},
20789 {1, 805044223},
20790 },
20791 outputs: []outputInfo{
20792 {0, 670826495},
20793 },
20794 },
20795 },
20796 {
20797 name: "ORshiftRA",
20798 auxType: auxInt64,
20799 argLen: 2,
20800 asm: arm64.AORR,
20801 reg: regInfo{
20802 inputs: []inputInfo{
20803 {0, 805044223},
20804 {1, 805044223},
20805 },
20806 outputs: []outputInfo{
20807 {0, 670826495},
20808 },
20809 },
20810 },
20811 {
20812 name: "ORshiftRO",
20813 auxType: auxInt64,
20814 argLen: 2,
20815 asm: arm64.AORR,
20816 reg: regInfo{
20817 inputs: []inputInfo{
20818 {0, 805044223},
20819 {1, 805044223},
20820 },
20821 outputs: []outputInfo{
20822 {0, 670826495},
20823 },
20824 },
20825 },
20826 {
20827 name: "XORshiftLL",
20828 auxType: auxInt64,
20829 argLen: 2,
20830 asm: arm64.AEOR,
20831 reg: regInfo{
20832 inputs: []inputInfo{
20833 {0, 805044223},
20834 {1, 805044223},
20835 },
20836 outputs: []outputInfo{
20837 {0, 670826495},
20838 },
20839 },
20840 },
20841 {
20842 name: "XORshiftRL",
20843 auxType: auxInt64,
20844 argLen: 2,
20845 asm: arm64.AEOR,
20846 reg: regInfo{
20847 inputs: []inputInfo{
20848 {0, 805044223},
20849 {1, 805044223},
20850 },
20851 outputs: []outputInfo{
20852 {0, 670826495},
20853 },
20854 },
20855 },
20856 {
20857 name: "XORshiftRA",
20858 auxType: auxInt64,
20859 argLen: 2,
20860 asm: arm64.AEOR,
20861 reg: regInfo{
20862 inputs: []inputInfo{
20863 {0, 805044223},
20864 {1, 805044223},
20865 },
20866 outputs: []outputInfo{
20867 {0, 670826495},
20868 },
20869 },
20870 },
20871 {
20872 name: "XORshiftRO",
20873 auxType: auxInt64,
20874 argLen: 2,
20875 asm: arm64.AEOR,
20876 reg: regInfo{
20877 inputs: []inputInfo{
20878 {0, 805044223},
20879 {1, 805044223},
20880 },
20881 outputs: []outputInfo{
20882 {0, 670826495},
20883 },
20884 },
20885 },
20886 {
20887 name: "BICshiftLL",
20888 auxType: auxInt64,
20889 argLen: 2,
20890 asm: arm64.ABIC,
20891 reg: regInfo{
20892 inputs: []inputInfo{
20893 {0, 805044223},
20894 {1, 805044223},
20895 },
20896 outputs: []outputInfo{
20897 {0, 670826495},
20898 },
20899 },
20900 },
20901 {
20902 name: "BICshiftRL",
20903 auxType: auxInt64,
20904 argLen: 2,
20905 asm: arm64.ABIC,
20906 reg: regInfo{
20907 inputs: []inputInfo{
20908 {0, 805044223},
20909 {1, 805044223},
20910 },
20911 outputs: []outputInfo{
20912 {0, 670826495},
20913 },
20914 },
20915 },
20916 {
20917 name: "BICshiftRA",
20918 auxType: auxInt64,
20919 argLen: 2,
20920 asm: arm64.ABIC,
20921 reg: regInfo{
20922 inputs: []inputInfo{
20923 {0, 805044223},
20924 {1, 805044223},
20925 },
20926 outputs: []outputInfo{
20927 {0, 670826495},
20928 },
20929 },
20930 },
20931 {
20932 name: "BICshiftRO",
20933 auxType: auxInt64,
20934 argLen: 2,
20935 asm: arm64.ABIC,
20936 reg: regInfo{
20937 inputs: []inputInfo{
20938 {0, 805044223},
20939 {1, 805044223},
20940 },
20941 outputs: []outputInfo{
20942 {0, 670826495},
20943 },
20944 },
20945 },
20946 {
20947 name: "EONshiftLL",
20948 auxType: auxInt64,
20949 argLen: 2,
20950 asm: arm64.AEON,
20951 reg: regInfo{
20952 inputs: []inputInfo{
20953 {0, 805044223},
20954 {1, 805044223},
20955 },
20956 outputs: []outputInfo{
20957 {0, 670826495},
20958 },
20959 },
20960 },
20961 {
20962 name: "EONshiftRL",
20963 auxType: auxInt64,
20964 argLen: 2,
20965 asm: arm64.AEON,
20966 reg: regInfo{
20967 inputs: []inputInfo{
20968 {0, 805044223},
20969 {1, 805044223},
20970 },
20971 outputs: []outputInfo{
20972 {0, 670826495},
20973 },
20974 },
20975 },
20976 {
20977 name: "EONshiftRA",
20978 auxType: auxInt64,
20979 argLen: 2,
20980 asm: arm64.AEON,
20981 reg: regInfo{
20982 inputs: []inputInfo{
20983 {0, 805044223},
20984 {1, 805044223},
20985 },
20986 outputs: []outputInfo{
20987 {0, 670826495},
20988 },
20989 },
20990 },
20991 {
20992 name: "EONshiftRO",
20993 auxType: auxInt64,
20994 argLen: 2,
20995 asm: arm64.AEON,
20996 reg: regInfo{
20997 inputs: []inputInfo{
20998 {0, 805044223},
20999 {1, 805044223},
21000 },
21001 outputs: []outputInfo{
21002 {0, 670826495},
21003 },
21004 },
21005 },
21006 {
21007 name: "ORNshiftLL",
21008 auxType: auxInt64,
21009 argLen: 2,
21010 asm: arm64.AORN,
21011 reg: regInfo{
21012 inputs: []inputInfo{
21013 {0, 805044223},
21014 {1, 805044223},
21015 },
21016 outputs: []outputInfo{
21017 {0, 670826495},
21018 },
21019 },
21020 },
21021 {
21022 name: "ORNshiftRL",
21023 auxType: auxInt64,
21024 argLen: 2,
21025 asm: arm64.AORN,
21026 reg: regInfo{
21027 inputs: []inputInfo{
21028 {0, 805044223},
21029 {1, 805044223},
21030 },
21031 outputs: []outputInfo{
21032 {0, 670826495},
21033 },
21034 },
21035 },
21036 {
21037 name: "ORNshiftRA",
21038 auxType: auxInt64,
21039 argLen: 2,
21040 asm: arm64.AORN,
21041 reg: regInfo{
21042 inputs: []inputInfo{
21043 {0, 805044223},
21044 {1, 805044223},
21045 },
21046 outputs: []outputInfo{
21047 {0, 670826495},
21048 },
21049 },
21050 },
21051 {
21052 name: "ORNshiftRO",
21053 auxType: auxInt64,
21054 argLen: 2,
21055 asm: arm64.AORN,
21056 reg: regInfo{
21057 inputs: []inputInfo{
21058 {0, 805044223},
21059 {1, 805044223},
21060 },
21061 outputs: []outputInfo{
21062 {0, 670826495},
21063 },
21064 },
21065 },
21066 {
21067 name: "CMPshiftLL",
21068 auxType: auxInt64,
21069 argLen: 2,
21070 asm: arm64.ACMP,
21071 reg: regInfo{
21072 inputs: []inputInfo{
21073 {0, 805044223},
21074 {1, 805044223},
21075 },
21076 },
21077 },
21078 {
21079 name: "CMPshiftRL",
21080 auxType: auxInt64,
21081 argLen: 2,
21082 asm: arm64.ACMP,
21083 reg: regInfo{
21084 inputs: []inputInfo{
21085 {0, 805044223},
21086 {1, 805044223},
21087 },
21088 },
21089 },
21090 {
21091 name: "CMPshiftRA",
21092 auxType: auxInt64,
21093 argLen: 2,
21094 asm: arm64.ACMP,
21095 reg: regInfo{
21096 inputs: []inputInfo{
21097 {0, 805044223},
21098 {1, 805044223},
21099 },
21100 },
21101 },
21102 {
21103 name: "CMNshiftLL",
21104 auxType: auxInt64,
21105 argLen: 2,
21106 asm: arm64.ACMN,
21107 reg: regInfo{
21108 inputs: []inputInfo{
21109 {0, 805044223},
21110 {1, 805044223},
21111 },
21112 },
21113 },
21114 {
21115 name: "CMNshiftRL",
21116 auxType: auxInt64,
21117 argLen: 2,
21118 asm: arm64.ACMN,
21119 reg: regInfo{
21120 inputs: []inputInfo{
21121 {0, 805044223},
21122 {1, 805044223},
21123 },
21124 },
21125 },
21126 {
21127 name: "CMNshiftRA",
21128 auxType: auxInt64,
21129 argLen: 2,
21130 asm: arm64.ACMN,
21131 reg: regInfo{
21132 inputs: []inputInfo{
21133 {0, 805044223},
21134 {1, 805044223},
21135 },
21136 },
21137 },
21138 {
21139 name: "TSTshiftLL",
21140 auxType: auxInt64,
21141 argLen: 2,
21142 asm: arm64.ATST,
21143 reg: regInfo{
21144 inputs: []inputInfo{
21145 {0, 805044223},
21146 {1, 805044223},
21147 },
21148 },
21149 },
21150 {
21151 name: "TSTshiftRL",
21152 auxType: auxInt64,
21153 argLen: 2,
21154 asm: arm64.ATST,
21155 reg: regInfo{
21156 inputs: []inputInfo{
21157 {0, 805044223},
21158 {1, 805044223},
21159 },
21160 },
21161 },
21162 {
21163 name: "TSTshiftRA",
21164 auxType: auxInt64,
21165 argLen: 2,
21166 asm: arm64.ATST,
21167 reg: regInfo{
21168 inputs: []inputInfo{
21169 {0, 805044223},
21170 {1, 805044223},
21171 },
21172 },
21173 },
21174 {
21175 name: "TSTshiftRO",
21176 auxType: auxInt64,
21177 argLen: 2,
21178 asm: arm64.ATST,
21179 reg: regInfo{
21180 inputs: []inputInfo{
21181 {0, 805044223},
21182 {1, 805044223},
21183 },
21184 },
21185 },
21186 {
21187 name: "BFI",
21188 auxType: auxARM64BitField,
21189 argLen: 2,
21190 resultInArg0: true,
21191 asm: arm64.ABFI,
21192 reg: regInfo{
21193 inputs: []inputInfo{
21194 {0, 670826495},
21195 {1, 670826495},
21196 },
21197 outputs: []outputInfo{
21198 {0, 670826495},
21199 },
21200 },
21201 },
21202 {
21203 name: "BFXIL",
21204 auxType: auxARM64BitField,
21205 argLen: 2,
21206 resultInArg0: true,
21207 asm: arm64.ABFXIL,
21208 reg: regInfo{
21209 inputs: []inputInfo{
21210 {0, 670826495},
21211 {1, 670826495},
21212 },
21213 outputs: []outputInfo{
21214 {0, 670826495},
21215 },
21216 },
21217 },
21218 {
21219 name: "SBFIZ",
21220 auxType: auxARM64BitField,
21221 argLen: 1,
21222 asm: arm64.ASBFIZ,
21223 reg: regInfo{
21224 inputs: []inputInfo{
21225 {0, 805044223},
21226 },
21227 outputs: []outputInfo{
21228 {0, 670826495},
21229 },
21230 },
21231 },
21232 {
21233 name: "SBFX",
21234 auxType: auxARM64BitField,
21235 argLen: 1,
21236 asm: arm64.ASBFX,
21237 reg: regInfo{
21238 inputs: []inputInfo{
21239 {0, 805044223},
21240 },
21241 outputs: []outputInfo{
21242 {0, 670826495},
21243 },
21244 },
21245 },
21246 {
21247 name: "UBFIZ",
21248 auxType: auxARM64BitField,
21249 argLen: 1,
21250 asm: arm64.AUBFIZ,
21251 reg: regInfo{
21252 inputs: []inputInfo{
21253 {0, 805044223},
21254 },
21255 outputs: []outputInfo{
21256 {0, 670826495},
21257 },
21258 },
21259 },
21260 {
21261 name: "UBFX",
21262 auxType: auxARM64BitField,
21263 argLen: 1,
21264 asm: arm64.AUBFX,
21265 reg: regInfo{
21266 inputs: []inputInfo{
21267 {0, 805044223},
21268 },
21269 outputs: []outputInfo{
21270 {0, 670826495},
21271 },
21272 },
21273 },
21274 {
21275 name: "MOVDconst",
21276 auxType: auxInt64,
21277 argLen: 0,
21278 rematerializeable: true,
21279 asm: arm64.AMOVD,
21280 reg: regInfo{
21281 outputs: []outputInfo{
21282 {0, 670826495},
21283 },
21284 },
21285 },
21286 {
21287 name: "FMOVSconst",
21288 auxType: auxFloat64,
21289 argLen: 0,
21290 rematerializeable: true,
21291 asm: arm64.AFMOVS,
21292 reg: regInfo{
21293 outputs: []outputInfo{
21294 {0, 9223372034707292160},
21295 },
21296 },
21297 },
21298 {
21299 name: "FMOVDconst",
21300 auxType: auxFloat64,
21301 argLen: 0,
21302 rematerializeable: true,
21303 asm: arm64.AFMOVD,
21304 reg: regInfo{
21305 outputs: []outputInfo{
21306 {0, 9223372034707292160},
21307 },
21308 },
21309 },
21310 {
21311 name: "MOVDaddr",
21312 auxType: auxSymOff,
21313 argLen: 1,
21314 rematerializeable: true,
21315 symEffect: SymAddr,
21316 asm: arm64.AMOVD,
21317 reg: regInfo{
21318 inputs: []inputInfo{
21319 {0, 9223372037928517632},
21320 },
21321 outputs: []outputInfo{
21322 {0, 670826495},
21323 },
21324 },
21325 },
21326 {
21327 name: "MOVBload",
21328 auxType: auxSymOff,
21329 argLen: 2,
21330 faultOnNilArg0: true,
21331 symEffect: SymRead,
21332 asm: arm64.AMOVB,
21333 reg: regInfo{
21334 inputs: []inputInfo{
21335 {0, 9223372038733561855},
21336 },
21337 outputs: []outputInfo{
21338 {0, 670826495},
21339 },
21340 },
21341 },
21342 {
21343 name: "MOVBUload",
21344 auxType: auxSymOff,
21345 argLen: 2,
21346 faultOnNilArg0: true,
21347 symEffect: SymRead,
21348 asm: arm64.AMOVBU,
21349 reg: regInfo{
21350 inputs: []inputInfo{
21351 {0, 9223372038733561855},
21352 },
21353 outputs: []outputInfo{
21354 {0, 670826495},
21355 },
21356 },
21357 },
21358 {
21359 name: "MOVHload",
21360 auxType: auxSymOff,
21361 argLen: 2,
21362 faultOnNilArg0: true,
21363 symEffect: SymRead,
21364 asm: arm64.AMOVH,
21365 reg: regInfo{
21366 inputs: []inputInfo{
21367 {0, 9223372038733561855},
21368 },
21369 outputs: []outputInfo{
21370 {0, 670826495},
21371 },
21372 },
21373 },
21374 {
21375 name: "MOVHUload",
21376 auxType: auxSymOff,
21377 argLen: 2,
21378 faultOnNilArg0: true,
21379 symEffect: SymRead,
21380 asm: arm64.AMOVHU,
21381 reg: regInfo{
21382 inputs: []inputInfo{
21383 {0, 9223372038733561855},
21384 },
21385 outputs: []outputInfo{
21386 {0, 670826495},
21387 },
21388 },
21389 },
21390 {
21391 name: "MOVWload",
21392 auxType: auxSymOff,
21393 argLen: 2,
21394 faultOnNilArg0: true,
21395 symEffect: SymRead,
21396 asm: arm64.AMOVW,
21397 reg: regInfo{
21398 inputs: []inputInfo{
21399 {0, 9223372038733561855},
21400 },
21401 outputs: []outputInfo{
21402 {0, 670826495},
21403 },
21404 },
21405 },
21406 {
21407 name: "MOVWUload",
21408 auxType: auxSymOff,
21409 argLen: 2,
21410 faultOnNilArg0: true,
21411 symEffect: SymRead,
21412 asm: arm64.AMOVWU,
21413 reg: regInfo{
21414 inputs: []inputInfo{
21415 {0, 9223372038733561855},
21416 },
21417 outputs: []outputInfo{
21418 {0, 670826495},
21419 },
21420 },
21421 },
21422 {
21423 name: "MOVDload",
21424 auxType: auxSymOff,
21425 argLen: 2,
21426 faultOnNilArg0: true,
21427 symEffect: SymRead,
21428 asm: arm64.AMOVD,
21429 reg: regInfo{
21430 inputs: []inputInfo{
21431 {0, 9223372038733561855},
21432 },
21433 outputs: []outputInfo{
21434 {0, 670826495},
21435 },
21436 },
21437 },
21438 {
21439 name: "LDP",
21440 auxType: auxSymOff,
21441 argLen: 2,
21442 faultOnNilArg0: true,
21443 symEffect: SymRead,
21444 asm: arm64.ALDP,
21445 reg: regInfo{
21446 inputs: []inputInfo{
21447 {0, 9223372038733561855},
21448 },
21449 outputs: []outputInfo{
21450 {0, 805044223},
21451 {1, 805044223},
21452 },
21453 },
21454 },
21455 {
21456 name: "FMOVSload",
21457 auxType: auxSymOff,
21458 argLen: 2,
21459 faultOnNilArg0: true,
21460 symEffect: SymRead,
21461 asm: arm64.AFMOVS,
21462 reg: regInfo{
21463 inputs: []inputInfo{
21464 {0, 9223372038733561855},
21465 },
21466 outputs: []outputInfo{
21467 {0, 9223372034707292160},
21468 },
21469 },
21470 },
21471 {
21472 name: "FMOVDload",
21473 auxType: auxSymOff,
21474 argLen: 2,
21475 faultOnNilArg0: true,
21476 symEffect: SymRead,
21477 asm: arm64.AFMOVD,
21478 reg: regInfo{
21479 inputs: []inputInfo{
21480 {0, 9223372038733561855},
21481 },
21482 outputs: []outputInfo{
21483 {0, 9223372034707292160},
21484 },
21485 },
21486 },
21487 {
21488 name: "MOVDloadidx",
21489 argLen: 3,
21490 asm: arm64.AMOVD,
21491 reg: regInfo{
21492 inputs: []inputInfo{
21493 {1, 805044223},
21494 {0, 9223372038733561855},
21495 },
21496 outputs: []outputInfo{
21497 {0, 670826495},
21498 },
21499 },
21500 },
21501 {
21502 name: "MOVWloadidx",
21503 argLen: 3,
21504 asm: arm64.AMOVW,
21505 reg: regInfo{
21506 inputs: []inputInfo{
21507 {1, 805044223},
21508 {0, 9223372038733561855},
21509 },
21510 outputs: []outputInfo{
21511 {0, 670826495},
21512 },
21513 },
21514 },
21515 {
21516 name: "MOVWUloadidx",
21517 argLen: 3,
21518 asm: arm64.AMOVWU,
21519 reg: regInfo{
21520 inputs: []inputInfo{
21521 {1, 805044223},
21522 {0, 9223372038733561855},
21523 },
21524 outputs: []outputInfo{
21525 {0, 670826495},
21526 },
21527 },
21528 },
21529 {
21530 name: "MOVHloadidx",
21531 argLen: 3,
21532 asm: arm64.AMOVH,
21533 reg: regInfo{
21534 inputs: []inputInfo{
21535 {1, 805044223},
21536 {0, 9223372038733561855},
21537 },
21538 outputs: []outputInfo{
21539 {0, 670826495},
21540 },
21541 },
21542 },
21543 {
21544 name: "MOVHUloadidx",
21545 argLen: 3,
21546 asm: arm64.AMOVHU,
21547 reg: regInfo{
21548 inputs: []inputInfo{
21549 {1, 805044223},
21550 {0, 9223372038733561855},
21551 },
21552 outputs: []outputInfo{
21553 {0, 670826495},
21554 },
21555 },
21556 },
21557 {
21558 name: "MOVBloadidx",
21559 argLen: 3,
21560 asm: arm64.AMOVB,
21561 reg: regInfo{
21562 inputs: []inputInfo{
21563 {1, 805044223},
21564 {0, 9223372038733561855},
21565 },
21566 outputs: []outputInfo{
21567 {0, 670826495},
21568 },
21569 },
21570 },
21571 {
21572 name: "MOVBUloadidx",
21573 argLen: 3,
21574 asm: arm64.AMOVBU,
21575 reg: regInfo{
21576 inputs: []inputInfo{
21577 {1, 805044223},
21578 {0, 9223372038733561855},
21579 },
21580 outputs: []outputInfo{
21581 {0, 670826495},
21582 },
21583 },
21584 },
21585 {
21586 name: "FMOVSloadidx",
21587 argLen: 3,
21588 asm: arm64.AFMOVS,
21589 reg: regInfo{
21590 inputs: []inputInfo{
21591 {1, 805044223},
21592 {0, 9223372038733561855},
21593 },
21594 outputs: []outputInfo{
21595 {0, 9223372034707292160},
21596 },
21597 },
21598 },
21599 {
21600 name: "FMOVDloadidx",
21601 argLen: 3,
21602 asm: arm64.AFMOVD,
21603 reg: regInfo{
21604 inputs: []inputInfo{
21605 {1, 805044223},
21606 {0, 9223372038733561855},
21607 },
21608 outputs: []outputInfo{
21609 {0, 9223372034707292160},
21610 },
21611 },
21612 },
21613 {
21614 name: "MOVHloadidx2",
21615 argLen: 3,
21616 asm: arm64.AMOVH,
21617 reg: regInfo{
21618 inputs: []inputInfo{
21619 {1, 805044223},
21620 {0, 9223372038733561855},
21621 },
21622 outputs: []outputInfo{
21623 {0, 670826495},
21624 },
21625 },
21626 },
21627 {
21628 name: "MOVHUloadidx2",
21629 argLen: 3,
21630 asm: arm64.AMOVHU,
21631 reg: regInfo{
21632 inputs: []inputInfo{
21633 {1, 805044223},
21634 {0, 9223372038733561855},
21635 },
21636 outputs: []outputInfo{
21637 {0, 670826495},
21638 },
21639 },
21640 },
21641 {
21642 name: "MOVWloadidx4",
21643 argLen: 3,
21644 asm: arm64.AMOVW,
21645 reg: regInfo{
21646 inputs: []inputInfo{
21647 {1, 805044223},
21648 {0, 9223372038733561855},
21649 },
21650 outputs: []outputInfo{
21651 {0, 670826495},
21652 },
21653 },
21654 },
21655 {
21656 name: "MOVWUloadidx4",
21657 argLen: 3,
21658 asm: arm64.AMOVWU,
21659 reg: regInfo{
21660 inputs: []inputInfo{
21661 {1, 805044223},
21662 {0, 9223372038733561855},
21663 },
21664 outputs: []outputInfo{
21665 {0, 670826495},
21666 },
21667 },
21668 },
21669 {
21670 name: "MOVDloadidx8",
21671 argLen: 3,
21672 asm: arm64.AMOVD,
21673 reg: regInfo{
21674 inputs: []inputInfo{
21675 {1, 805044223},
21676 {0, 9223372038733561855},
21677 },
21678 outputs: []outputInfo{
21679 {0, 670826495},
21680 },
21681 },
21682 },
21683 {
21684 name: "FMOVSloadidx4",
21685 argLen: 3,
21686 asm: arm64.AFMOVS,
21687 reg: regInfo{
21688 inputs: []inputInfo{
21689 {1, 805044223},
21690 {0, 9223372038733561855},
21691 },
21692 outputs: []outputInfo{
21693 {0, 9223372034707292160},
21694 },
21695 },
21696 },
21697 {
21698 name: "FMOVDloadidx8",
21699 argLen: 3,
21700 asm: arm64.AFMOVD,
21701 reg: regInfo{
21702 inputs: []inputInfo{
21703 {1, 805044223},
21704 {0, 9223372038733561855},
21705 },
21706 outputs: []outputInfo{
21707 {0, 9223372034707292160},
21708 },
21709 },
21710 },
21711 {
21712 name: "MOVBstore",
21713 auxType: auxSymOff,
21714 argLen: 3,
21715 faultOnNilArg0: true,
21716 symEffect: SymWrite,
21717 asm: arm64.AMOVB,
21718 reg: regInfo{
21719 inputs: []inputInfo{
21720 {1, 805044223},
21721 {0, 9223372038733561855},
21722 },
21723 },
21724 },
21725 {
21726 name: "MOVHstore",
21727 auxType: auxSymOff,
21728 argLen: 3,
21729 faultOnNilArg0: true,
21730 symEffect: SymWrite,
21731 asm: arm64.AMOVH,
21732 reg: regInfo{
21733 inputs: []inputInfo{
21734 {1, 805044223},
21735 {0, 9223372038733561855},
21736 },
21737 },
21738 },
21739 {
21740 name: "MOVWstore",
21741 auxType: auxSymOff,
21742 argLen: 3,
21743 faultOnNilArg0: true,
21744 symEffect: SymWrite,
21745 asm: arm64.AMOVW,
21746 reg: regInfo{
21747 inputs: []inputInfo{
21748 {1, 805044223},
21749 {0, 9223372038733561855},
21750 },
21751 },
21752 },
21753 {
21754 name: "MOVDstore",
21755 auxType: auxSymOff,
21756 argLen: 3,
21757 faultOnNilArg0: true,
21758 symEffect: SymWrite,
21759 asm: arm64.AMOVD,
21760 reg: regInfo{
21761 inputs: []inputInfo{
21762 {1, 805044223},
21763 {0, 9223372038733561855},
21764 },
21765 },
21766 },
21767 {
21768 name: "STP",
21769 auxType: auxSymOff,
21770 argLen: 4,
21771 faultOnNilArg0: true,
21772 symEffect: SymWrite,
21773 asm: arm64.ASTP,
21774 reg: regInfo{
21775 inputs: []inputInfo{
21776 {1, 805044223},
21777 {2, 805044223},
21778 {0, 9223372038733561855},
21779 },
21780 },
21781 },
21782 {
21783 name: "FMOVSstore",
21784 auxType: auxSymOff,
21785 argLen: 3,
21786 faultOnNilArg0: true,
21787 symEffect: SymWrite,
21788 asm: arm64.AFMOVS,
21789 reg: regInfo{
21790 inputs: []inputInfo{
21791 {0, 9223372038733561855},
21792 {1, 9223372034707292160},
21793 },
21794 },
21795 },
21796 {
21797 name: "FMOVDstore",
21798 auxType: auxSymOff,
21799 argLen: 3,
21800 faultOnNilArg0: true,
21801 symEffect: SymWrite,
21802 asm: arm64.AFMOVD,
21803 reg: regInfo{
21804 inputs: []inputInfo{
21805 {0, 9223372038733561855},
21806 {1, 9223372034707292160},
21807 },
21808 },
21809 },
21810 {
21811 name: "MOVBstoreidx",
21812 argLen: 4,
21813 asm: arm64.AMOVB,
21814 reg: regInfo{
21815 inputs: []inputInfo{
21816 {1, 805044223},
21817 {2, 805044223},
21818 {0, 9223372038733561855},
21819 },
21820 },
21821 },
21822 {
21823 name: "MOVHstoreidx",
21824 argLen: 4,
21825 asm: arm64.AMOVH,
21826 reg: regInfo{
21827 inputs: []inputInfo{
21828 {1, 805044223},
21829 {2, 805044223},
21830 {0, 9223372038733561855},
21831 },
21832 },
21833 },
21834 {
21835 name: "MOVWstoreidx",
21836 argLen: 4,
21837 asm: arm64.AMOVW,
21838 reg: regInfo{
21839 inputs: []inputInfo{
21840 {1, 805044223},
21841 {2, 805044223},
21842 {0, 9223372038733561855},
21843 },
21844 },
21845 },
21846 {
21847 name: "MOVDstoreidx",
21848 argLen: 4,
21849 asm: arm64.AMOVD,
21850 reg: regInfo{
21851 inputs: []inputInfo{
21852 {1, 805044223},
21853 {2, 805044223},
21854 {0, 9223372038733561855},
21855 },
21856 },
21857 },
21858 {
21859 name: "FMOVSstoreidx",
21860 argLen: 4,
21861 asm: arm64.AFMOVS,
21862 reg: regInfo{
21863 inputs: []inputInfo{
21864 {1, 805044223},
21865 {0, 9223372038733561855},
21866 {2, 9223372034707292160},
21867 },
21868 },
21869 },
21870 {
21871 name: "FMOVDstoreidx",
21872 argLen: 4,
21873 asm: arm64.AFMOVD,
21874 reg: regInfo{
21875 inputs: []inputInfo{
21876 {1, 805044223},
21877 {0, 9223372038733561855},
21878 {2, 9223372034707292160},
21879 },
21880 },
21881 },
21882 {
21883 name: "MOVHstoreidx2",
21884 argLen: 4,
21885 asm: arm64.AMOVH,
21886 reg: regInfo{
21887 inputs: []inputInfo{
21888 {1, 805044223},
21889 {2, 805044223},
21890 {0, 9223372038733561855},
21891 },
21892 },
21893 },
21894 {
21895 name: "MOVWstoreidx4",
21896 argLen: 4,
21897 asm: arm64.AMOVW,
21898 reg: regInfo{
21899 inputs: []inputInfo{
21900 {1, 805044223},
21901 {2, 805044223},
21902 {0, 9223372038733561855},
21903 },
21904 },
21905 },
21906 {
21907 name: "MOVDstoreidx8",
21908 argLen: 4,
21909 asm: arm64.AMOVD,
21910 reg: regInfo{
21911 inputs: []inputInfo{
21912 {1, 805044223},
21913 {2, 805044223},
21914 {0, 9223372038733561855},
21915 },
21916 },
21917 },
21918 {
21919 name: "FMOVSstoreidx4",
21920 argLen: 4,
21921 asm: arm64.AFMOVS,
21922 reg: regInfo{
21923 inputs: []inputInfo{
21924 {1, 805044223},
21925 {0, 9223372038733561855},
21926 {2, 9223372034707292160},
21927 },
21928 },
21929 },
21930 {
21931 name: "FMOVDstoreidx8",
21932 argLen: 4,
21933 asm: arm64.AFMOVD,
21934 reg: regInfo{
21935 inputs: []inputInfo{
21936 {1, 805044223},
21937 {0, 9223372038733561855},
21938 {2, 9223372034707292160},
21939 },
21940 },
21941 },
21942 {
21943 name: "MOVBstorezero",
21944 auxType: auxSymOff,
21945 argLen: 2,
21946 faultOnNilArg0: true,
21947 symEffect: SymWrite,
21948 asm: arm64.AMOVB,
21949 reg: regInfo{
21950 inputs: []inputInfo{
21951 {0, 9223372038733561855},
21952 },
21953 },
21954 },
21955 {
21956 name: "MOVHstorezero",
21957 auxType: auxSymOff,
21958 argLen: 2,
21959 faultOnNilArg0: true,
21960 symEffect: SymWrite,
21961 asm: arm64.AMOVH,
21962 reg: regInfo{
21963 inputs: []inputInfo{
21964 {0, 9223372038733561855},
21965 },
21966 },
21967 },
21968 {
21969 name: "MOVWstorezero",
21970 auxType: auxSymOff,
21971 argLen: 2,
21972 faultOnNilArg0: true,
21973 symEffect: SymWrite,
21974 asm: arm64.AMOVW,
21975 reg: regInfo{
21976 inputs: []inputInfo{
21977 {0, 9223372038733561855},
21978 },
21979 },
21980 },
21981 {
21982 name: "MOVDstorezero",
21983 auxType: auxSymOff,
21984 argLen: 2,
21985 faultOnNilArg0: true,
21986 symEffect: SymWrite,
21987 asm: arm64.AMOVD,
21988 reg: regInfo{
21989 inputs: []inputInfo{
21990 {0, 9223372038733561855},
21991 },
21992 },
21993 },
21994 {
21995 name: "MOVQstorezero",
21996 auxType: auxSymOff,
21997 argLen: 2,
21998 faultOnNilArg0: true,
21999 symEffect: SymWrite,
22000 asm: arm64.ASTP,
22001 reg: regInfo{
22002 inputs: []inputInfo{
22003 {0, 9223372038733561855},
22004 },
22005 },
22006 },
22007 {
22008 name: "MOVBstorezeroidx",
22009 argLen: 3,
22010 asm: arm64.AMOVB,
22011 reg: regInfo{
22012 inputs: []inputInfo{
22013 {1, 805044223},
22014 {0, 9223372038733561855},
22015 },
22016 },
22017 },
22018 {
22019 name: "MOVHstorezeroidx",
22020 argLen: 3,
22021 asm: arm64.AMOVH,
22022 reg: regInfo{
22023 inputs: []inputInfo{
22024 {1, 805044223},
22025 {0, 9223372038733561855},
22026 },
22027 },
22028 },
22029 {
22030 name: "MOVWstorezeroidx",
22031 argLen: 3,
22032 asm: arm64.AMOVW,
22033 reg: regInfo{
22034 inputs: []inputInfo{
22035 {1, 805044223},
22036 {0, 9223372038733561855},
22037 },
22038 },
22039 },
22040 {
22041 name: "MOVDstorezeroidx",
22042 argLen: 3,
22043 asm: arm64.AMOVD,
22044 reg: regInfo{
22045 inputs: []inputInfo{
22046 {1, 805044223},
22047 {0, 9223372038733561855},
22048 },
22049 },
22050 },
22051 {
22052 name: "MOVHstorezeroidx2",
22053 argLen: 3,
22054 asm: arm64.AMOVH,
22055 reg: regInfo{
22056 inputs: []inputInfo{
22057 {1, 805044223},
22058 {0, 9223372038733561855},
22059 },
22060 },
22061 },
22062 {
22063 name: "MOVWstorezeroidx4",
22064 argLen: 3,
22065 asm: arm64.AMOVW,
22066 reg: regInfo{
22067 inputs: []inputInfo{
22068 {1, 805044223},
22069 {0, 9223372038733561855},
22070 },
22071 },
22072 },
22073 {
22074 name: "MOVDstorezeroidx8",
22075 argLen: 3,
22076 asm: arm64.AMOVD,
22077 reg: regInfo{
22078 inputs: []inputInfo{
22079 {1, 805044223},
22080 {0, 9223372038733561855},
22081 },
22082 },
22083 },
22084 {
22085 name: "FMOVDgpfp",
22086 argLen: 1,
22087 asm: arm64.AFMOVD,
22088 reg: regInfo{
22089 inputs: []inputInfo{
22090 {0, 670826495},
22091 },
22092 outputs: []outputInfo{
22093 {0, 9223372034707292160},
22094 },
22095 },
22096 },
22097 {
22098 name: "FMOVDfpgp",
22099 argLen: 1,
22100 asm: arm64.AFMOVD,
22101 reg: regInfo{
22102 inputs: []inputInfo{
22103 {0, 9223372034707292160},
22104 },
22105 outputs: []outputInfo{
22106 {0, 670826495},
22107 },
22108 },
22109 },
22110 {
22111 name: "FMOVSgpfp",
22112 argLen: 1,
22113 asm: arm64.AFMOVS,
22114 reg: regInfo{
22115 inputs: []inputInfo{
22116 {0, 670826495},
22117 },
22118 outputs: []outputInfo{
22119 {0, 9223372034707292160},
22120 },
22121 },
22122 },
22123 {
22124 name: "FMOVSfpgp",
22125 argLen: 1,
22126 asm: arm64.AFMOVS,
22127 reg: regInfo{
22128 inputs: []inputInfo{
22129 {0, 9223372034707292160},
22130 },
22131 outputs: []outputInfo{
22132 {0, 670826495},
22133 },
22134 },
22135 },
22136 {
22137 name: "MOVBreg",
22138 argLen: 1,
22139 asm: arm64.AMOVB,
22140 reg: regInfo{
22141 inputs: []inputInfo{
22142 {0, 805044223},
22143 },
22144 outputs: []outputInfo{
22145 {0, 670826495},
22146 },
22147 },
22148 },
22149 {
22150 name: "MOVBUreg",
22151 argLen: 1,
22152 asm: arm64.AMOVBU,
22153 reg: regInfo{
22154 inputs: []inputInfo{
22155 {0, 805044223},
22156 },
22157 outputs: []outputInfo{
22158 {0, 670826495},
22159 },
22160 },
22161 },
22162 {
22163 name: "MOVHreg",
22164 argLen: 1,
22165 asm: arm64.AMOVH,
22166 reg: regInfo{
22167 inputs: []inputInfo{
22168 {0, 805044223},
22169 },
22170 outputs: []outputInfo{
22171 {0, 670826495},
22172 },
22173 },
22174 },
22175 {
22176 name: "MOVHUreg",
22177 argLen: 1,
22178 asm: arm64.AMOVHU,
22179 reg: regInfo{
22180 inputs: []inputInfo{
22181 {0, 805044223},
22182 },
22183 outputs: []outputInfo{
22184 {0, 670826495},
22185 },
22186 },
22187 },
22188 {
22189 name: "MOVWreg",
22190 argLen: 1,
22191 asm: arm64.AMOVW,
22192 reg: regInfo{
22193 inputs: []inputInfo{
22194 {0, 805044223},
22195 },
22196 outputs: []outputInfo{
22197 {0, 670826495},
22198 },
22199 },
22200 },
22201 {
22202 name: "MOVWUreg",
22203 argLen: 1,
22204 asm: arm64.AMOVWU,
22205 reg: regInfo{
22206 inputs: []inputInfo{
22207 {0, 805044223},
22208 },
22209 outputs: []outputInfo{
22210 {0, 670826495},
22211 },
22212 },
22213 },
22214 {
22215 name: "MOVDreg",
22216 argLen: 1,
22217 asm: arm64.AMOVD,
22218 reg: regInfo{
22219 inputs: []inputInfo{
22220 {0, 805044223},
22221 },
22222 outputs: []outputInfo{
22223 {0, 670826495},
22224 },
22225 },
22226 },
22227 {
22228 name: "MOVDnop",
22229 argLen: 1,
22230 resultInArg0: true,
22231 reg: regInfo{
22232 inputs: []inputInfo{
22233 {0, 670826495},
22234 },
22235 outputs: []outputInfo{
22236 {0, 670826495},
22237 },
22238 },
22239 },
22240 {
22241 name: "SCVTFWS",
22242 argLen: 1,
22243 asm: arm64.ASCVTFWS,
22244 reg: regInfo{
22245 inputs: []inputInfo{
22246 {0, 670826495},
22247 },
22248 outputs: []outputInfo{
22249 {0, 9223372034707292160},
22250 },
22251 },
22252 },
22253 {
22254 name: "SCVTFWD",
22255 argLen: 1,
22256 asm: arm64.ASCVTFWD,
22257 reg: regInfo{
22258 inputs: []inputInfo{
22259 {0, 670826495},
22260 },
22261 outputs: []outputInfo{
22262 {0, 9223372034707292160},
22263 },
22264 },
22265 },
22266 {
22267 name: "UCVTFWS",
22268 argLen: 1,
22269 asm: arm64.AUCVTFWS,
22270 reg: regInfo{
22271 inputs: []inputInfo{
22272 {0, 670826495},
22273 },
22274 outputs: []outputInfo{
22275 {0, 9223372034707292160},
22276 },
22277 },
22278 },
22279 {
22280 name: "UCVTFWD",
22281 argLen: 1,
22282 asm: arm64.AUCVTFWD,
22283 reg: regInfo{
22284 inputs: []inputInfo{
22285 {0, 670826495},
22286 },
22287 outputs: []outputInfo{
22288 {0, 9223372034707292160},
22289 },
22290 },
22291 },
22292 {
22293 name: "SCVTFS",
22294 argLen: 1,
22295 asm: arm64.ASCVTFS,
22296 reg: regInfo{
22297 inputs: []inputInfo{
22298 {0, 670826495},
22299 },
22300 outputs: []outputInfo{
22301 {0, 9223372034707292160},
22302 },
22303 },
22304 },
22305 {
22306 name: "SCVTFD",
22307 argLen: 1,
22308 asm: arm64.ASCVTFD,
22309 reg: regInfo{
22310 inputs: []inputInfo{
22311 {0, 670826495},
22312 },
22313 outputs: []outputInfo{
22314 {0, 9223372034707292160},
22315 },
22316 },
22317 },
22318 {
22319 name: "UCVTFS",
22320 argLen: 1,
22321 asm: arm64.AUCVTFS,
22322 reg: regInfo{
22323 inputs: []inputInfo{
22324 {0, 670826495},
22325 },
22326 outputs: []outputInfo{
22327 {0, 9223372034707292160},
22328 },
22329 },
22330 },
22331 {
22332 name: "UCVTFD",
22333 argLen: 1,
22334 asm: arm64.AUCVTFD,
22335 reg: regInfo{
22336 inputs: []inputInfo{
22337 {0, 670826495},
22338 },
22339 outputs: []outputInfo{
22340 {0, 9223372034707292160},
22341 },
22342 },
22343 },
22344 {
22345 name: "FCVTZSSW",
22346 argLen: 1,
22347 asm: arm64.AFCVTZSSW,
22348 reg: regInfo{
22349 inputs: []inputInfo{
22350 {0, 9223372034707292160},
22351 },
22352 outputs: []outputInfo{
22353 {0, 670826495},
22354 },
22355 },
22356 },
22357 {
22358 name: "FCVTZSDW",
22359 argLen: 1,
22360 asm: arm64.AFCVTZSDW,
22361 reg: regInfo{
22362 inputs: []inputInfo{
22363 {0, 9223372034707292160},
22364 },
22365 outputs: []outputInfo{
22366 {0, 670826495},
22367 },
22368 },
22369 },
22370 {
22371 name: "FCVTZUSW",
22372 argLen: 1,
22373 asm: arm64.AFCVTZUSW,
22374 reg: regInfo{
22375 inputs: []inputInfo{
22376 {0, 9223372034707292160},
22377 },
22378 outputs: []outputInfo{
22379 {0, 670826495},
22380 },
22381 },
22382 },
22383 {
22384 name: "FCVTZUDW",
22385 argLen: 1,
22386 asm: arm64.AFCVTZUDW,
22387 reg: regInfo{
22388 inputs: []inputInfo{
22389 {0, 9223372034707292160},
22390 },
22391 outputs: []outputInfo{
22392 {0, 670826495},
22393 },
22394 },
22395 },
22396 {
22397 name: "FCVTZSS",
22398 argLen: 1,
22399 asm: arm64.AFCVTZSS,
22400 reg: regInfo{
22401 inputs: []inputInfo{
22402 {0, 9223372034707292160},
22403 },
22404 outputs: []outputInfo{
22405 {0, 670826495},
22406 },
22407 },
22408 },
22409 {
22410 name: "FCVTZSD",
22411 argLen: 1,
22412 asm: arm64.AFCVTZSD,
22413 reg: regInfo{
22414 inputs: []inputInfo{
22415 {0, 9223372034707292160},
22416 },
22417 outputs: []outputInfo{
22418 {0, 670826495},
22419 },
22420 },
22421 },
22422 {
22423 name: "FCVTZUS",
22424 argLen: 1,
22425 asm: arm64.AFCVTZUS,
22426 reg: regInfo{
22427 inputs: []inputInfo{
22428 {0, 9223372034707292160},
22429 },
22430 outputs: []outputInfo{
22431 {0, 670826495},
22432 },
22433 },
22434 },
22435 {
22436 name: "FCVTZUD",
22437 argLen: 1,
22438 asm: arm64.AFCVTZUD,
22439 reg: regInfo{
22440 inputs: []inputInfo{
22441 {0, 9223372034707292160},
22442 },
22443 outputs: []outputInfo{
22444 {0, 670826495},
22445 },
22446 },
22447 },
22448 {
22449 name: "FCVTSD",
22450 argLen: 1,
22451 asm: arm64.AFCVTSD,
22452 reg: regInfo{
22453 inputs: []inputInfo{
22454 {0, 9223372034707292160},
22455 },
22456 outputs: []outputInfo{
22457 {0, 9223372034707292160},
22458 },
22459 },
22460 },
22461 {
22462 name: "FCVTDS",
22463 argLen: 1,
22464 asm: arm64.AFCVTDS,
22465 reg: regInfo{
22466 inputs: []inputInfo{
22467 {0, 9223372034707292160},
22468 },
22469 outputs: []outputInfo{
22470 {0, 9223372034707292160},
22471 },
22472 },
22473 },
22474 {
22475 name: "FRINTAD",
22476 argLen: 1,
22477 asm: arm64.AFRINTAD,
22478 reg: regInfo{
22479 inputs: []inputInfo{
22480 {0, 9223372034707292160},
22481 },
22482 outputs: []outputInfo{
22483 {0, 9223372034707292160},
22484 },
22485 },
22486 },
22487 {
22488 name: "FRINTMD",
22489 argLen: 1,
22490 asm: arm64.AFRINTMD,
22491 reg: regInfo{
22492 inputs: []inputInfo{
22493 {0, 9223372034707292160},
22494 },
22495 outputs: []outputInfo{
22496 {0, 9223372034707292160},
22497 },
22498 },
22499 },
22500 {
22501 name: "FRINTND",
22502 argLen: 1,
22503 asm: arm64.AFRINTND,
22504 reg: regInfo{
22505 inputs: []inputInfo{
22506 {0, 9223372034707292160},
22507 },
22508 outputs: []outputInfo{
22509 {0, 9223372034707292160},
22510 },
22511 },
22512 },
22513 {
22514 name: "FRINTPD",
22515 argLen: 1,
22516 asm: arm64.AFRINTPD,
22517 reg: regInfo{
22518 inputs: []inputInfo{
22519 {0, 9223372034707292160},
22520 },
22521 outputs: []outputInfo{
22522 {0, 9223372034707292160},
22523 },
22524 },
22525 },
22526 {
22527 name: "FRINTZD",
22528 argLen: 1,
22529 asm: arm64.AFRINTZD,
22530 reg: regInfo{
22531 inputs: []inputInfo{
22532 {0, 9223372034707292160},
22533 },
22534 outputs: []outputInfo{
22535 {0, 9223372034707292160},
22536 },
22537 },
22538 },
22539 {
22540 name: "CSEL",
22541 auxType: auxCCop,
22542 argLen: 3,
22543 asm: arm64.ACSEL,
22544 reg: regInfo{
22545 inputs: []inputInfo{
22546 {0, 670826495},
22547 {1, 670826495},
22548 },
22549 outputs: []outputInfo{
22550 {0, 670826495},
22551 },
22552 },
22553 },
22554 {
22555 name: "CSEL0",
22556 auxType: auxCCop,
22557 argLen: 2,
22558 asm: arm64.ACSEL,
22559 reg: regInfo{
22560 inputs: []inputInfo{
22561 {0, 805044223},
22562 },
22563 outputs: []outputInfo{
22564 {0, 670826495},
22565 },
22566 },
22567 },
22568 {
22569 name: "CSINC",
22570 auxType: auxCCop,
22571 argLen: 3,
22572 asm: arm64.ACSINC,
22573 reg: regInfo{
22574 inputs: []inputInfo{
22575 {0, 670826495},
22576 {1, 670826495},
22577 },
22578 outputs: []outputInfo{
22579 {0, 670826495},
22580 },
22581 },
22582 },
22583 {
22584 name: "CSINV",
22585 auxType: auxCCop,
22586 argLen: 3,
22587 asm: arm64.ACSINV,
22588 reg: regInfo{
22589 inputs: []inputInfo{
22590 {0, 670826495},
22591 {1, 670826495},
22592 },
22593 outputs: []outputInfo{
22594 {0, 670826495},
22595 },
22596 },
22597 },
22598 {
22599 name: "CSNEG",
22600 auxType: auxCCop,
22601 argLen: 3,
22602 asm: arm64.ACSNEG,
22603 reg: regInfo{
22604 inputs: []inputInfo{
22605 {0, 670826495},
22606 {1, 670826495},
22607 },
22608 outputs: []outputInfo{
22609 {0, 670826495},
22610 },
22611 },
22612 },
22613 {
22614 name: "CSETM",
22615 auxType: auxCCop,
22616 argLen: 1,
22617 asm: arm64.ACSETM,
22618 reg: regInfo{
22619 outputs: []outputInfo{
22620 {0, 670826495},
22621 },
22622 },
22623 },
22624 {
22625 name: "CALLstatic",
22626 auxType: auxCallOff,
22627 argLen: -1,
22628 clobberFlags: true,
22629 call: true,
22630 reg: regInfo{
22631 clobbers: 9223372035512336383,
22632 },
22633 },
22634 {
22635 name: "CALLtail",
22636 auxType: auxCallOff,
22637 argLen: -1,
22638 clobberFlags: true,
22639 call: true,
22640 tailCall: true,
22641 reg: regInfo{
22642 clobbers: 9223372035512336383,
22643 },
22644 },
22645 {
22646 name: "CALLclosure",
22647 auxType: auxCallOff,
22648 argLen: -1,
22649 clobberFlags: true,
22650 call: true,
22651 reg: regInfo{
22652 inputs: []inputInfo{
22653 {1, 67108864},
22654 {0, 1744568319},
22655 },
22656 clobbers: 9223372035512336383,
22657 },
22658 },
22659 {
22660 name: "CALLinter",
22661 auxType: auxCallOff,
22662 argLen: -1,
22663 clobberFlags: true,
22664 call: true,
22665 reg: regInfo{
22666 inputs: []inputInfo{
22667 {0, 670826495},
22668 },
22669 clobbers: 9223372035512336383,
22670 },
22671 },
22672 {
22673 name: "LoweredNilCheck",
22674 argLen: 2,
22675 nilCheck: true,
22676 faultOnNilArg0: true,
22677 reg: regInfo{
22678 inputs: []inputInfo{
22679 {0, 805044223},
22680 },
22681 },
22682 },
22683 {
22684 name: "Equal",
22685 argLen: 1,
22686 reg: regInfo{
22687 outputs: []outputInfo{
22688 {0, 670826495},
22689 },
22690 },
22691 },
22692 {
22693 name: "NotEqual",
22694 argLen: 1,
22695 reg: regInfo{
22696 outputs: []outputInfo{
22697 {0, 670826495},
22698 },
22699 },
22700 },
22701 {
22702 name: "LessThan",
22703 argLen: 1,
22704 reg: regInfo{
22705 outputs: []outputInfo{
22706 {0, 670826495},
22707 },
22708 },
22709 },
22710 {
22711 name: "LessEqual",
22712 argLen: 1,
22713 reg: regInfo{
22714 outputs: []outputInfo{
22715 {0, 670826495},
22716 },
22717 },
22718 },
22719 {
22720 name: "GreaterThan",
22721 argLen: 1,
22722 reg: regInfo{
22723 outputs: []outputInfo{
22724 {0, 670826495},
22725 },
22726 },
22727 },
22728 {
22729 name: "GreaterEqual",
22730 argLen: 1,
22731 reg: regInfo{
22732 outputs: []outputInfo{
22733 {0, 670826495},
22734 },
22735 },
22736 },
22737 {
22738 name: "LessThanU",
22739 argLen: 1,
22740 reg: regInfo{
22741 outputs: []outputInfo{
22742 {0, 670826495},
22743 },
22744 },
22745 },
22746 {
22747 name: "LessEqualU",
22748 argLen: 1,
22749 reg: regInfo{
22750 outputs: []outputInfo{
22751 {0, 670826495},
22752 },
22753 },
22754 },
22755 {
22756 name: "GreaterThanU",
22757 argLen: 1,
22758 reg: regInfo{
22759 outputs: []outputInfo{
22760 {0, 670826495},
22761 },
22762 },
22763 },
22764 {
22765 name: "GreaterEqualU",
22766 argLen: 1,
22767 reg: regInfo{
22768 outputs: []outputInfo{
22769 {0, 670826495},
22770 },
22771 },
22772 },
22773 {
22774 name: "LessThanF",
22775 argLen: 1,
22776 reg: regInfo{
22777 outputs: []outputInfo{
22778 {0, 670826495},
22779 },
22780 },
22781 },
22782 {
22783 name: "LessEqualF",
22784 argLen: 1,
22785 reg: regInfo{
22786 outputs: []outputInfo{
22787 {0, 670826495},
22788 },
22789 },
22790 },
22791 {
22792 name: "GreaterThanF",
22793 argLen: 1,
22794 reg: regInfo{
22795 outputs: []outputInfo{
22796 {0, 670826495},
22797 },
22798 },
22799 },
22800 {
22801 name: "GreaterEqualF",
22802 argLen: 1,
22803 reg: regInfo{
22804 outputs: []outputInfo{
22805 {0, 670826495},
22806 },
22807 },
22808 },
22809 {
22810 name: "NotLessThanF",
22811 argLen: 1,
22812 reg: regInfo{
22813 outputs: []outputInfo{
22814 {0, 670826495},
22815 },
22816 },
22817 },
22818 {
22819 name: "NotLessEqualF",
22820 argLen: 1,
22821 reg: regInfo{
22822 outputs: []outputInfo{
22823 {0, 670826495},
22824 },
22825 },
22826 },
22827 {
22828 name: "NotGreaterThanF",
22829 argLen: 1,
22830 reg: regInfo{
22831 outputs: []outputInfo{
22832 {0, 670826495},
22833 },
22834 },
22835 },
22836 {
22837 name: "NotGreaterEqualF",
22838 argLen: 1,
22839 reg: regInfo{
22840 outputs: []outputInfo{
22841 {0, 670826495},
22842 },
22843 },
22844 },
22845 {
22846 name: "LessThanNoov",
22847 argLen: 1,
22848 reg: regInfo{
22849 outputs: []outputInfo{
22850 {0, 670826495},
22851 },
22852 },
22853 },
22854 {
22855 name: "GreaterEqualNoov",
22856 argLen: 1,
22857 reg: regInfo{
22858 outputs: []outputInfo{
22859 {0, 670826495},
22860 },
22861 },
22862 },
22863 {
22864 name: "DUFFZERO",
22865 auxType: auxInt64,
22866 argLen: 2,
22867 faultOnNilArg0: true,
22868 unsafePoint: true,
22869 reg: regInfo{
22870 inputs: []inputInfo{
22871 {0, 1048576},
22872 },
22873 clobbers: 538116096,
22874 },
22875 },
22876 {
22877 name: "LoweredZero",
22878 argLen: 3,
22879 clobberFlags: true,
22880 faultOnNilArg0: true,
22881 reg: regInfo{
22882 inputs: []inputInfo{
22883 {0, 65536},
22884 {1, 670826495},
22885 },
22886 clobbers: 65536,
22887 },
22888 },
22889 {
22890 name: "DUFFCOPY",
22891 auxType: auxInt64,
22892 argLen: 3,
22893 faultOnNilArg0: true,
22894 faultOnNilArg1: true,
22895 unsafePoint: true,
22896 reg: regInfo{
22897 inputs: []inputInfo{
22898 {0, 2097152},
22899 {1, 1048576},
22900 },
22901 clobbers: 607322112,
22902 },
22903 },
22904 {
22905 name: "LoweredMove",
22906 argLen: 4,
22907 clobberFlags: true,
22908 faultOnNilArg0: true,
22909 faultOnNilArg1: true,
22910 reg: regInfo{
22911 inputs: []inputInfo{
22912 {0, 131072},
22913 {1, 65536},
22914 {2, 637272063},
22915 },
22916 clobbers: 33751040,
22917 },
22918 },
22919 {
22920 name: "LoweredGetClosurePtr",
22921 argLen: 0,
22922 zeroWidth: true,
22923 reg: regInfo{
22924 outputs: []outputInfo{
22925 {0, 67108864},
22926 },
22927 },
22928 },
22929 {
22930 name: "LoweredGetCallerSP",
22931 argLen: 1,
22932 rematerializeable: true,
22933 reg: regInfo{
22934 outputs: []outputInfo{
22935 {0, 670826495},
22936 },
22937 },
22938 },
22939 {
22940 name: "LoweredGetCallerPC",
22941 argLen: 0,
22942 rematerializeable: true,
22943 reg: regInfo{
22944 outputs: []outputInfo{
22945 {0, 670826495},
22946 },
22947 },
22948 },
22949 {
22950 name: "FlagConstant",
22951 auxType: auxFlagConstant,
22952 argLen: 0,
22953 reg: regInfo{},
22954 },
22955 {
22956 name: "InvertFlags",
22957 argLen: 1,
22958 reg: regInfo{},
22959 },
22960 {
22961 name: "LDAR",
22962 argLen: 2,
22963 faultOnNilArg0: true,
22964 asm: arm64.ALDAR,
22965 reg: regInfo{
22966 inputs: []inputInfo{
22967 {0, 9223372038733561855},
22968 },
22969 outputs: []outputInfo{
22970 {0, 670826495},
22971 },
22972 },
22973 },
22974 {
22975 name: "LDARB",
22976 argLen: 2,
22977 faultOnNilArg0: true,
22978 asm: arm64.ALDARB,
22979 reg: regInfo{
22980 inputs: []inputInfo{
22981 {0, 9223372038733561855},
22982 },
22983 outputs: []outputInfo{
22984 {0, 670826495},
22985 },
22986 },
22987 },
22988 {
22989 name: "LDARW",
22990 argLen: 2,
22991 faultOnNilArg0: true,
22992 asm: arm64.ALDARW,
22993 reg: regInfo{
22994 inputs: []inputInfo{
22995 {0, 9223372038733561855},
22996 },
22997 outputs: []outputInfo{
22998 {0, 670826495},
22999 },
23000 },
23001 },
23002 {
23003 name: "STLRB",
23004 argLen: 3,
23005 faultOnNilArg0: true,
23006 hasSideEffects: true,
23007 asm: arm64.ASTLRB,
23008 reg: regInfo{
23009 inputs: []inputInfo{
23010 {1, 805044223},
23011 {0, 9223372038733561855},
23012 },
23013 },
23014 },
23015 {
23016 name: "STLR",
23017 argLen: 3,
23018 faultOnNilArg0: true,
23019 hasSideEffects: true,
23020 asm: arm64.ASTLR,
23021 reg: regInfo{
23022 inputs: []inputInfo{
23023 {1, 805044223},
23024 {0, 9223372038733561855},
23025 },
23026 },
23027 },
23028 {
23029 name: "STLRW",
23030 argLen: 3,
23031 faultOnNilArg0: true,
23032 hasSideEffects: true,
23033 asm: arm64.ASTLRW,
23034 reg: regInfo{
23035 inputs: []inputInfo{
23036 {1, 805044223},
23037 {0, 9223372038733561855},
23038 },
23039 },
23040 },
23041 {
23042 name: "LoweredAtomicExchange64",
23043 argLen: 3,
23044 resultNotInArgs: true,
23045 faultOnNilArg0: true,
23046 hasSideEffects: true,
23047 unsafePoint: true,
23048 reg: regInfo{
23049 inputs: []inputInfo{
23050 {1, 805044223},
23051 {0, 9223372038733561855},
23052 },
23053 outputs: []outputInfo{
23054 {0, 670826495},
23055 },
23056 },
23057 },
23058 {
23059 name: "LoweredAtomicExchange32",
23060 argLen: 3,
23061 resultNotInArgs: true,
23062 faultOnNilArg0: true,
23063 hasSideEffects: true,
23064 unsafePoint: true,
23065 reg: regInfo{
23066 inputs: []inputInfo{
23067 {1, 805044223},
23068 {0, 9223372038733561855},
23069 },
23070 outputs: []outputInfo{
23071 {0, 670826495},
23072 },
23073 },
23074 },
23075 {
23076 name: "LoweredAtomicExchange8",
23077 argLen: 3,
23078 resultNotInArgs: true,
23079 faultOnNilArg0: true,
23080 hasSideEffects: true,
23081 unsafePoint: true,
23082 reg: regInfo{
23083 inputs: []inputInfo{
23084 {1, 805044223},
23085 {0, 9223372038733561855},
23086 },
23087 outputs: []outputInfo{
23088 {0, 670826495},
23089 },
23090 },
23091 },
23092 {
23093 name: "LoweredAtomicExchange64Variant",
23094 argLen: 3,
23095 resultNotInArgs: true,
23096 faultOnNilArg0: true,
23097 hasSideEffects: true,
23098 reg: regInfo{
23099 inputs: []inputInfo{
23100 {1, 805044223},
23101 {0, 9223372038733561855},
23102 },
23103 outputs: []outputInfo{
23104 {0, 670826495},
23105 },
23106 },
23107 },
23108 {
23109 name: "LoweredAtomicExchange32Variant",
23110 argLen: 3,
23111 resultNotInArgs: true,
23112 faultOnNilArg0: true,
23113 hasSideEffects: true,
23114 reg: regInfo{
23115 inputs: []inputInfo{
23116 {1, 805044223},
23117 {0, 9223372038733561855},
23118 },
23119 outputs: []outputInfo{
23120 {0, 670826495},
23121 },
23122 },
23123 },
23124 {
23125 name: "LoweredAtomicExchange8Variant",
23126 argLen: 3,
23127 resultNotInArgs: true,
23128 faultOnNilArg0: true,
23129 hasSideEffects: true,
23130 unsafePoint: true,
23131 reg: regInfo{
23132 inputs: []inputInfo{
23133 {1, 805044223},
23134 {0, 9223372038733561855},
23135 },
23136 outputs: []outputInfo{
23137 {0, 670826495},
23138 },
23139 },
23140 },
23141 {
23142 name: "LoweredAtomicAdd64",
23143 argLen: 3,
23144 resultNotInArgs: true,
23145 faultOnNilArg0: true,
23146 hasSideEffects: true,
23147 unsafePoint: true,
23148 reg: regInfo{
23149 inputs: []inputInfo{
23150 {1, 805044223},
23151 {0, 9223372038733561855},
23152 },
23153 outputs: []outputInfo{
23154 {0, 670826495},
23155 },
23156 },
23157 },
23158 {
23159 name: "LoweredAtomicAdd32",
23160 argLen: 3,
23161 resultNotInArgs: true,
23162 faultOnNilArg0: true,
23163 hasSideEffects: true,
23164 unsafePoint: true,
23165 reg: regInfo{
23166 inputs: []inputInfo{
23167 {1, 805044223},
23168 {0, 9223372038733561855},
23169 },
23170 outputs: []outputInfo{
23171 {0, 670826495},
23172 },
23173 },
23174 },
23175 {
23176 name: "LoweredAtomicAdd64Variant",
23177 argLen: 3,
23178 resultNotInArgs: true,
23179 faultOnNilArg0: true,
23180 hasSideEffects: true,
23181 reg: regInfo{
23182 inputs: []inputInfo{
23183 {1, 805044223},
23184 {0, 9223372038733561855},
23185 },
23186 outputs: []outputInfo{
23187 {0, 670826495},
23188 },
23189 },
23190 },
23191 {
23192 name: "LoweredAtomicAdd32Variant",
23193 argLen: 3,
23194 resultNotInArgs: true,
23195 faultOnNilArg0: true,
23196 hasSideEffects: true,
23197 reg: regInfo{
23198 inputs: []inputInfo{
23199 {1, 805044223},
23200 {0, 9223372038733561855},
23201 },
23202 outputs: []outputInfo{
23203 {0, 670826495},
23204 },
23205 },
23206 },
23207 {
23208 name: "LoweredAtomicCas64",
23209 argLen: 4,
23210 resultNotInArgs: true,
23211 clobberFlags: true,
23212 faultOnNilArg0: true,
23213 hasSideEffects: true,
23214 unsafePoint: true,
23215 reg: regInfo{
23216 inputs: []inputInfo{
23217 {1, 805044223},
23218 {2, 805044223},
23219 {0, 9223372038733561855},
23220 },
23221 outputs: []outputInfo{
23222 {0, 670826495},
23223 },
23224 },
23225 },
23226 {
23227 name: "LoweredAtomicCas32",
23228 argLen: 4,
23229 resultNotInArgs: true,
23230 clobberFlags: true,
23231 faultOnNilArg0: true,
23232 hasSideEffects: true,
23233 unsafePoint: true,
23234 reg: regInfo{
23235 inputs: []inputInfo{
23236 {1, 805044223},
23237 {2, 805044223},
23238 {0, 9223372038733561855},
23239 },
23240 outputs: []outputInfo{
23241 {0, 670826495},
23242 },
23243 },
23244 },
23245 {
23246 name: "LoweredAtomicCas64Variant",
23247 argLen: 4,
23248 resultNotInArgs: true,
23249 clobberFlags: true,
23250 faultOnNilArg0: true,
23251 hasSideEffects: true,
23252 unsafePoint: true,
23253 reg: regInfo{
23254 inputs: []inputInfo{
23255 {1, 805044223},
23256 {2, 805044223},
23257 {0, 9223372038733561855},
23258 },
23259 outputs: []outputInfo{
23260 {0, 670826495},
23261 },
23262 },
23263 },
23264 {
23265 name: "LoweredAtomicCas32Variant",
23266 argLen: 4,
23267 resultNotInArgs: true,
23268 clobberFlags: true,
23269 faultOnNilArg0: true,
23270 hasSideEffects: true,
23271 unsafePoint: true,
23272 reg: regInfo{
23273 inputs: []inputInfo{
23274 {1, 805044223},
23275 {2, 805044223},
23276 {0, 9223372038733561855},
23277 },
23278 outputs: []outputInfo{
23279 {0, 670826495},
23280 },
23281 },
23282 },
23283 {
23284 name: "LoweredAtomicAnd8",
23285 argLen: 3,
23286 resultNotInArgs: true,
23287 needIntTemp: true,
23288 faultOnNilArg0: true,
23289 hasSideEffects: true,
23290 unsafePoint: true,
23291 asm: arm64.AAND,
23292 reg: regInfo{
23293 inputs: []inputInfo{
23294 {1, 805044223},
23295 {0, 9223372038733561855},
23296 },
23297 outputs: []outputInfo{
23298 {0, 670826495},
23299 },
23300 },
23301 },
23302 {
23303 name: "LoweredAtomicOr8",
23304 argLen: 3,
23305 resultNotInArgs: true,
23306 needIntTemp: true,
23307 faultOnNilArg0: true,
23308 hasSideEffects: true,
23309 unsafePoint: true,
23310 asm: arm64.AORR,
23311 reg: regInfo{
23312 inputs: []inputInfo{
23313 {1, 805044223},
23314 {0, 9223372038733561855},
23315 },
23316 outputs: []outputInfo{
23317 {0, 670826495},
23318 },
23319 },
23320 },
23321 {
23322 name: "LoweredAtomicAnd64",
23323 argLen: 3,
23324 resultNotInArgs: true,
23325 needIntTemp: true,
23326 faultOnNilArg0: true,
23327 hasSideEffects: true,
23328 unsafePoint: true,
23329 asm: arm64.AAND,
23330 reg: regInfo{
23331 inputs: []inputInfo{
23332 {1, 805044223},
23333 {0, 9223372038733561855},
23334 },
23335 outputs: []outputInfo{
23336 {0, 670826495},
23337 },
23338 },
23339 },
23340 {
23341 name: "LoweredAtomicOr64",
23342 argLen: 3,
23343 resultNotInArgs: true,
23344 needIntTemp: true,
23345 faultOnNilArg0: true,
23346 hasSideEffects: true,
23347 unsafePoint: true,
23348 asm: arm64.AORR,
23349 reg: regInfo{
23350 inputs: []inputInfo{
23351 {1, 805044223},
23352 {0, 9223372038733561855},
23353 },
23354 outputs: []outputInfo{
23355 {0, 670826495},
23356 },
23357 },
23358 },
23359 {
23360 name: "LoweredAtomicAnd32",
23361 argLen: 3,
23362 resultNotInArgs: true,
23363 needIntTemp: true,
23364 faultOnNilArg0: true,
23365 hasSideEffects: true,
23366 unsafePoint: true,
23367 asm: arm64.AAND,
23368 reg: regInfo{
23369 inputs: []inputInfo{
23370 {1, 805044223},
23371 {0, 9223372038733561855},
23372 },
23373 outputs: []outputInfo{
23374 {0, 670826495},
23375 },
23376 },
23377 },
23378 {
23379 name: "LoweredAtomicOr32",
23380 argLen: 3,
23381 resultNotInArgs: true,
23382 needIntTemp: true,
23383 faultOnNilArg0: true,
23384 hasSideEffects: true,
23385 unsafePoint: true,
23386 asm: arm64.AORR,
23387 reg: regInfo{
23388 inputs: []inputInfo{
23389 {1, 805044223},
23390 {0, 9223372038733561855},
23391 },
23392 outputs: []outputInfo{
23393 {0, 670826495},
23394 },
23395 },
23396 },
23397 {
23398 name: "LoweredAtomicAnd8Variant",
23399 argLen: 3,
23400 resultNotInArgs: true,
23401 faultOnNilArg0: true,
23402 hasSideEffects: true,
23403 unsafePoint: true,
23404 reg: regInfo{
23405 inputs: []inputInfo{
23406 {1, 805044223},
23407 {0, 9223372038733561855},
23408 },
23409 outputs: []outputInfo{
23410 {0, 670826495},
23411 },
23412 },
23413 },
23414 {
23415 name: "LoweredAtomicOr8Variant",
23416 argLen: 3,
23417 resultNotInArgs: true,
23418 faultOnNilArg0: true,
23419 hasSideEffects: true,
23420 reg: regInfo{
23421 inputs: []inputInfo{
23422 {1, 805044223},
23423 {0, 9223372038733561855},
23424 },
23425 outputs: []outputInfo{
23426 {0, 670826495},
23427 },
23428 },
23429 },
23430 {
23431 name: "LoweredAtomicAnd64Variant",
23432 argLen: 3,
23433 resultNotInArgs: true,
23434 faultOnNilArg0: true,
23435 hasSideEffects: true,
23436 unsafePoint: true,
23437 reg: regInfo{
23438 inputs: []inputInfo{
23439 {1, 805044223},
23440 {0, 9223372038733561855},
23441 },
23442 outputs: []outputInfo{
23443 {0, 670826495},
23444 },
23445 },
23446 },
23447 {
23448 name: "LoweredAtomicOr64Variant",
23449 argLen: 3,
23450 resultNotInArgs: true,
23451 faultOnNilArg0: true,
23452 hasSideEffects: true,
23453 reg: regInfo{
23454 inputs: []inputInfo{
23455 {1, 805044223},
23456 {0, 9223372038733561855},
23457 },
23458 outputs: []outputInfo{
23459 {0, 670826495},
23460 },
23461 },
23462 },
23463 {
23464 name: "LoweredAtomicAnd32Variant",
23465 argLen: 3,
23466 resultNotInArgs: true,
23467 faultOnNilArg0: true,
23468 hasSideEffects: true,
23469 unsafePoint: true,
23470 reg: regInfo{
23471 inputs: []inputInfo{
23472 {1, 805044223},
23473 {0, 9223372038733561855},
23474 },
23475 outputs: []outputInfo{
23476 {0, 670826495},
23477 },
23478 },
23479 },
23480 {
23481 name: "LoweredAtomicOr32Variant",
23482 argLen: 3,
23483 resultNotInArgs: true,
23484 faultOnNilArg0: true,
23485 hasSideEffects: true,
23486 reg: regInfo{
23487 inputs: []inputInfo{
23488 {1, 805044223},
23489 {0, 9223372038733561855},
23490 },
23491 outputs: []outputInfo{
23492 {0, 670826495},
23493 },
23494 },
23495 },
23496 {
23497 name: "LoweredWB",
23498 auxType: auxInt64,
23499 argLen: 1,
23500 clobberFlags: true,
23501 reg: regInfo{
23502 clobbers: 9223372035244359680,
23503 outputs: []outputInfo{
23504 {0, 33554432},
23505 },
23506 },
23507 },
23508 {
23509 name: "LoweredPanicBoundsA",
23510 auxType: auxInt64,
23511 argLen: 3,
23512 call: true,
23513 reg: regInfo{
23514 inputs: []inputInfo{
23515 {0, 4},
23516 {1, 8},
23517 },
23518 },
23519 },
23520 {
23521 name: "LoweredPanicBoundsB",
23522 auxType: auxInt64,
23523 argLen: 3,
23524 call: true,
23525 reg: regInfo{
23526 inputs: []inputInfo{
23527 {0, 2},
23528 {1, 4},
23529 },
23530 },
23531 },
23532 {
23533 name: "LoweredPanicBoundsC",
23534 auxType: auxInt64,
23535 argLen: 3,
23536 call: true,
23537 reg: regInfo{
23538 inputs: []inputInfo{
23539 {0, 1},
23540 {1, 2},
23541 },
23542 },
23543 },
23544 {
23545 name: "PRFM",
23546 auxType: auxInt64,
23547 argLen: 2,
23548 hasSideEffects: true,
23549 asm: arm64.APRFM,
23550 reg: regInfo{
23551 inputs: []inputInfo{
23552 {0, 9223372038733561855},
23553 },
23554 },
23555 },
23556 {
23557 name: "DMB",
23558 auxType: auxInt64,
23559 argLen: 1,
23560 hasSideEffects: true,
23561 asm: arm64.ADMB,
23562 reg: regInfo{},
23563 },
23564
23565 {
23566 name: "NEGV",
23567 argLen: 1,
23568 reg: regInfo{
23569 inputs: []inputInfo{
23570 {0, 1073741816},
23571 },
23572 outputs: []outputInfo{
23573 {0, 1071644664},
23574 },
23575 },
23576 },
23577 {
23578 name: "NEGF",
23579 argLen: 1,
23580 asm: loong64.ANEGF,
23581 reg: regInfo{
23582 inputs: []inputInfo{
23583 {0, 4611686017353646080},
23584 },
23585 outputs: []outputInfo{
23586 {0, 4611686017353646080},
23587 },
23588 },
23589 },
23590 {
23591 name: "NEGD",
23592 argLen: 1,
23593 asm: loong64.ANEGD,
23594 reg: regInfo{
23595 inputs: []inputInfo{
23596 {0, 4611686017353646080},
23597 },
23598 outputs: []outputInfo{
23599 {0, 4611686017353646080},
23600 },
23601 },
23602 },
23603 {
23604 name: "SQRTD",
23605 argLen: 1,
23606 asm: loong64.ASQRTD,
23607 reg: regInfo{
23608 inputs: []inputInfo{
23609 {0, 4611686017353646080},
23610 },
23611 outputs: []outputInfo{
23612 {0, 4611686017353646080},
23613 },
23614 },
23615 },
23616 {
23617 name: "SQRTF",
23618 argLen: 1,
23619 asm: loong64.ASQRTF,
23620 reg: regInfo{
23621 inputs: []inputInfo{
23622 {0, 4611686017353646080},
23623 },
23624 outputs: []outputInfo{
23625 {0, 4611686017353646080},
23626 },
23627 },
23628 },
23629 {
23630 name: "ABSD",
23631 argLen: 1,
23632 asm: loong64.AABSD,
23633 reg: regInfo{
23634 inputs: []inputInfo{
23635 {0, 4611686017353646080},
23636 },
23637 outputs: []outputInfo{
23638 {0, 4611686017353646080},
23639 },
23640 },
23641 },
23642 {
23643 name: "CLZW",
23644 argLen: 1,
23645 asm: loong64.ACLZW,
23646 reg: regInfo{
23647 inputs: []inputInfo{
23648 {0, 1073741816},
23649 },
23650 outputs: []outputInfo{
23651 {0, 1071644664},
23652 },
23653 },
23654 },
23655 {
23656 name: "CLZV",
23657 argLen: 1,
23658 asm: loong64.ACLZV,
23659 reg: regInfo{
23660 inputs: []inputInfo{
23661 {0, 1073741816},
23662 },
23663 outputs: []outputInfo{
23664 {0, 1071644664},
23665 },
23666 },
23667 },
23668 {
23669 name: "CTZW",
23670 argLen: 1,
23671 asm: loong64.ACTZW,
23672 reg: regInfo{
23673 inputs: []inputInfo{
23674 {0, 1073741816},
23675 },
23676 outputs: []outputInfo{
23677 {0, 1071644664},
23678 },
23679 },
23680 },
23681 {
23682 name: "CTZV",
23683 argLen: 1,
23684 asm: loong64.ACTZV,
23685 reg: regInfo{
23686 inputs: []inputInfo{
23687 {0, 1073741816},
23688 },
23689 outputs: []outputInfo{
23690 {0, 1071644664},
23691 },
23692 },
23693 },
23694 {
23695 name: "REVB2H",
23696 argLen: 1,
23697 asm: loong64.AREVB2H,
23698 reg: regInfo{
23699 inputs: []inputInfo{
23700 {0, 1073741816},
23701 },
23702 outputs: []outputInfo{
23703 {0, 1071644664},
23704 },
23705 },
23706 },
23707 {
23708 name: "REVB2W",
23709 argLen: 1,
23710 asm: loong64.AREVB2W,
23711 reg: regInfo{
23712 inputs: []inputInfo{
23713 {0, 1073741816},
23714 },
23715 outputs: []outputInfo{
23716 {0, 1071644664},
23717 },
23718 },
23719 },
23720 {
23721 name: "REVBV",
23722 argLen: 1,
23723 asm: loong64.AREVBV,
23724 reg: regInfo{
23725 inputs: []inputInfo{
23726 {0, 1073741816},
23727 },
23728 outputs: []outputInfo{
23729 {0, 1071644664},
23730 },
23731 },
23732 },
23733 {
23734 name: "BITREV4B",
23735 argLen: 1,
23736 asm: loong64.ABITREV4B,
23737 reg: regInfo{
23738 inputs: []inputInfo{
23739 {0, 1073741816},
23740 },
23741 outputs: []outputInfo{
23742 {0, 1071644664},
23743 },
23744 },
23745 },
23746 {
23747 name: "BITREVW",
23748 argLen: 1,
23749 asm: loong64.ABITREVW,
23750 reg: regInfo{
23751 inputs: []inputInfo{
23752 {0, 1073741816},
23753 },
23754 outputs: []outputInfo{
23755 {0, 1071644664},
23756 },
23757 },
23758 },
23759 {
23760 name: "BITREVV",
23761 argLen: 1,
23762 asm: loong64.ABITREVV,
23763 reg: regInfo{
23764 inputs: []inputInfo{
23765 {0, 1073741816},
23766 },
23767 outputs: []outputInfo{
23768 {0, 1071644664},
23769 },
23770 },
23771 },
23772 {
23773 name: "VPCNT64",
23774 argLen: 1,
23775 asm: loong64.AVPCNTV,
23776 reg: regInfo{
23777 inputs: []inputInfo{
23778 {0, 4611686017353646080},
23779 },
23780 outputs: []outputInfo{
23781 {0, 4611686017353646080},
23782 },
23783 },
23784 },
23785 {
23786 name: "VPCNT32",
23787 argLen: 1,
23788 asm: loong64.AVPCNTW,
23789 reg: regInfo{
23790 inputs: []inputInfo{
23791 {0, 4611686017353646080},
23792 },
23793 outputs: []outputInfo{
23794 {0, 4611686017353646080},
23795 },
23796 },
23797 },
23798 {
23799 name: "VPCNT16",
23800 argLen: 1,
23801 asm: loong64.AVPCNTH,
23802 reg: regInfo{
23803 inputs: []inputInfo{
23804 {0, 4611686017353646080},
23805 },
23806 outputs: []outputInfo{
23807 {0, 4611686017353646080},
23808 },
23809 },
23810 },
23811 {
23812 name: "ADDV",
23813 argLen: 2,
23814 commutative: true,
23815 asm: loong64.AADDVU,
23816 reg: regInfo{
23817 inputs: []inputInfo{
23818 {0, 1073741816},
23819 {1, 1073741816},
23820 },
23821 outputs: []outputInfo{
23822 {0, 1071644664},
23823 },
23824 },
23825 },
23826 {
23827 name: "ADDVconst",
23828 auxType: auxInt64,
23829 argLen: 1,
23830 asm: loong64.AADDVU,
23831 reg: regInfo{
23832 inputs: []inputInfo{
23833 {0, 1073741820},
23834 },
23835 outputs: []outputInfo{
23836 {0, 1071644664},
23837 },
23838 },
23839 },
23840 {
23841 name: "SUBV",
23842 argLen: 2,
23843 asm: loong64.ASUBVU,
23844 reg: regInfo{
23845 inputs: []inputInfo{
23846 {0, 1073741816},
23847 {1, 1073741816},
23848 },
23849 outputs: []outputInfo{
23850 {0, 1071644664},
23851 },
23852 },
23853 },
23854 {
23855 name: "SUBVconst",
23856 auxType: auxInt64,
23857 argLen: 1,
23858 asm: loong64.ASUBVU,
23859 reg: regInfo{
23860 inputs: []inputInfo{
23861 {0, 1073741816},
23862 },
23863 outputs: []outputInfo{
23864 {0, 1071644664},
23865 },
23866 },
23867 },
23868 {
23869 name: "MULV",
23870 argLen: 2,
23871 commutative: true,
23872 asm: loong64.AMULV,
23873 reg: regInfo{
23874 inputs: []inputInfo{
23875 {0, 1073741816},
23876 {1, 1073741816},
23877 },
23878 outputs: []outputInfo{
23879 {0, 1071644664},
23880 },
23881 },
23882 },
23883 {
23884 name: "MULHV",
23885 argLen: 2,
23886 commutative: true,
23887 asm: loong64.AMULHV,
23888 reg: regInfo{
23889 inputs: []inputInfo{
23890 {0, 1073741816},
23891 {1, 1073741816},
23892 },
23893 outputs: []outputInfo{
23894 {0, 1071644664},
23895 },
23896 },
23897 },
23898 {
23899 name: "MULHVU",
23900 argLen: 2,
23901 commutative: true,
23902 asm: loong64.AMULHVU,
23903 reg: regInfo{
23904 inputs: []inputInfo{
23905 {0, 1073741816},
23906 {1, 1073741816},
23907 },
23908 outputs: []outputInfo{
23909 {0, 1071644664},
23910 },
23911 },
23912 },
23913 {
23914 name: "DIVV",
23915 argLen: 2,
23916 asm: loong64.ADIVV,
23917 reg: regInfo{
23918 inputs: []inputInfo{
23919 {0, 1073741816},
23920 {1, 1073741816},
23921 },
23922 outputs: []outputInfo{
23923 {0, 1071644664},
23924 },
23925 },
23926 },
23927 {
23928 name: "DIVVU",
23929 argLen: 2,
23930 asm: loong64.ADIVVU,
23931 reg: regInfo{
23932 inputs: []inputInfo{
23933 {0, 1073741816},
23934 {1, 1073741816},
23935 },
23936 outputs: []outputInfo{
23937 {0, 1071644664},
23938 },
23939 },
23940 },
23941 {
23942 name: "REMV",
23943 argLen: 2,
23944 asm: loong64.AREMV,
23945 reg: regInfo{
23946 inputs: []inputInfo{
23947 {0, 1073741816},
23948 {1, 1073741816},
23949 },
23950 outputs: []outputInfo{
23951 {0, 1071644664},
23952 },
23953 },
23954 },
23955 {
23956 name: "REMVU",
23957 argLen: 2,
23958 asm: loong64.AREMVU,
23959 reg: regInfo{
23960 inputs: []inputInfo{
23961 {0, 1073741816},
23962 {1, 1073741816},
23963 },
23964 outputs: []outputInfo{
23965 {0, 1071644664},
23966 },
23967 },
23968 },
23969 {
23970 name: "ADDF",
23971 argLen: 2,
23972 commutative: true,
23973 asm: loong64.AADDF,
23974 reg: regInfo{
23975 inputs: []inputInfo{
23976 {0, 4611686017353646080},
23977 {1, 4611686017353646080},
23978 },
23979 outputs: []outputInfo{
23980 {0, 4611686017353646080},
23981 },
23982 },
23983 },
23984 {
23985 name: "ADDD",
23986 argLen: 2,
23987 commutative: true,
23988 asm: loong64.AADDD,
23989 reg: regInfo{
23990 inputs: []inputInfo{
23991 {0, 4611686017353646080},
23992 {1, 4611686017353646080},
23993 },
23994 outputs: []outputInfo{
23995 {0, 4611686017353646080},
23996 },
23997 },
23998 },
23999 {
24000 name: "SUBF",
24001 argLen: 2,
24002 asm: loong64.ASUBF,
24003 reg: regInfo{
24004 inputs: []inputInfo{
24005 {0, 4611686017353646080},
24006 {1, 4611686017353646080},
24007 },
24008 outputs: []outputInfo{
24009 {0, 4611686017353646080},
24010 },
24011 },
24012 },
24013 {
24014 name: "SUBD",
24015 argLen: 2,
24016 asm: loong64.ASUBD,
24017 reg: regInfo{
24018 inputs: []inputInfo{
24019 {0, 4611686017353646080},
24020 {1, 4611686017353646080},
24021 },
24022 outputs: []outputInfo{
24023 {0, 4611686017353646080},
24024 },
24025 },
24026 },
24027 {
24028 name: "MULF",
24029 argLen: 2,
24030 commutative: true,
24031 asm: loong64.AMULF,
24032 reg: regInfo{
24033 inputs: []inputInfo{
24034 {0, 4611686017353646080},
24035 {1, 4611686017353646080},
24036 },
24037 outputs: []outputInfo{
24038 {0, 4611686017353646080},
24039 },
24040 },
24041 },
24042 {
24043 name: "MULD",
24044 argLen: 2,
24045 commutative: true,
24046 asm: loong64.AMULD,
24047 reg: regInfo{
24048 inputs: []inputInfo{
24049 {0, 4611686017353646080},
24050 {1, 4611686017353646080},
24051 },
24052 outputs: []outputInfo{
24053 {0, 4611686017353646080},
24054 },
24055 },
24056 },
24057 {
24058 name: "DIVF",
24059 argLen: 2,
24060 asm: loong64.ADIVF,
24061 reg: regInfo{
24062 inputs: []inputInfo{
24063 {0, 4611686017353646080},
24064 {1, 4611686017353646080},
24065 },
24066 outputs: []outputInfo{
24067 {0, 4611686017353646080},
24068 },
24069 },
24070 },
24071 {
24072 name: "DIVD",
24073 argLen: 2,
24074 asm: loong64.ADIVD,
24075 reg: regInfo{
24076 inputs: []inputInfo{
24077 {0, 4611686017353646080},
24078 {1, 4611686017353646080},
24079 },
24080 outputs: []outputInfo{
24081 {0, 4611686017353646080},
24082 },
24083 },
24084 },
24085 {
24086 name: "AND",
24087 argLen: 2,
24088 commutative: true,
24089 asm: loong64.AAND,
24090 reg: regInfo{
24091 inputs: []inputInfo{
24092 {0, 1073741816},
24093 {1, 1073741816},
24094 },
24095 outputs: []outputInfo{
24096 {0, 1071644664},
24097 },
24098 },
24099 },
24100 {
24101 name: "ANDconst",
24102 auxType: auxInt64,
24103 argLen: 1,
24104 asm: loong64.AAND,
24105 reg: regInfo{
24106 inputs: []inputInfo{
24107 {0, 1073741816},
24108 },
24109 outputs: []outputInfo{
24110 {0, 1071644664},
24111 },
24112 },
24113 },
24114 {
24115 name: "OR",
24116 argLen: 2,
24117 commutative: true,
24118 asm: loong64.AOR,
24119 reg: regInfo{
24120 inputs: []inputInfo{
24121 {0, 1073741816},
24122 {1, 1073741816},
24123 },
24124 outputs: []outputInfo{
24125 {0, 1071644664},
24126 },
24127 },
24128 },
24129 {
24130 name: "ORconst",
24131 auxType: auxInt64,
24132 argLen: 1,
24133 asm: loong64.AOR,
24134 reg: regInfo{
24135 inputs: []inputInfo{
24136 {0, 1073741816},
24137 },
24138 outputs: []outputInfo{
24139 {0, 1071644664},
24140 },
24141 },
24142 },
24143 {
24144 name: "XOR",
24145 argLen: 2,
24146 commutative: true,
24147 asm: loong64.AXOR,
24148 reg: regInfo{
24149 inputs: []inputInfo{
24150 {0, 1073741816},
24151 {1, 1073741816},
24152 },
24153 outputs: []outputInfo{
24154 {0, 1071644664},
24155 },
24156 },
24157 },
24158 {
24159 name: "XORconst",
24160 auxType: auxInt64,
24161 argLen: 1,
24162 asm: loong64.AXOR,
24163 reg: regInfo{
24164 inputs: []inputInfo{
24165 {0, 1073741816},
24166 },
24167 outputs: []outputInfo{
24168 {0, 1071644664},
24169 },
24170 },
24171 },
24172 {
24173 name: "NOR",
24174 argLen: 2,
24175 commutative: true,
24176 asm: loong64.ANOR,
24177 reg: regInfo{
24178 inputs: []inputInfo{
24179 {0, 1073741816},
24180 {1, 1073741816},
24181 },
24182 outputs: []outputInfo{
24183 {0, 1071644664},
24184 },
24185 },
24186 },
24187 {
24188 name: "NORconst",
24189 auxType: auxInt64,
24190 argLen: 1,
24191 asm: loong64.ANOR,
24192 reg: regInfo{
24193 inputs: []inputInfo{
24194 {0, 1073741816},
24195 },
24196 outputs: []outputInfo{
24197 {0, 1071644664},
24198 },
24199 },
24200 },
24201 {
24202 name: "FMADDF",
24203 argLen: 3,
24204 commutative: true,
24205 asm: loong64.AFMADDF,
24206 reg: regInfo{
24207 inputs: []inputInfo{
24208 {0, 4611686017353646080},
24209 {1, 4611686017353646080},
24210 {2, 4611686017353646080},
24211 },
24212 outputs: []outputInfo{
24213 {0, 4611686017353646080},
24214 },
24215 },
24216 },
24217 {
24218 name: "FMADDD",
24219 argLen: 3,
24220 commutative: true,
24221 asm: loong64.AFMADDD,
24222 reg: regInfo{
24223 inputs: []inputInfo{
24224 {0, 4611686017353646080},
24225 {1, 4611686017353646080},
24226 {2, 4611686017353646080},
24227 },
24228 outputs: []outputInfo{
24229 {0, 4611686017353646080},
24230 },
24231 },
24232 },
24233 {
24234 name: "FMSUBF",
24235 argLen: 3,
24236 commutative: true,
24237 asm: loong64.AFMSUBF,
24238 reg: regInfo{
24239 inputs: []inputInfo{
24240 {0, 4611686017353646080},
24241 {1, 4611686017353646080},
24242 {2, 4611686017353646080},
24243 },
24244 outputs: []outputInfo{
24245 {0, 4611686017353646080},
24246 },
24247 },
24248 },
24249 {
24250 name: "FMSUBD",
24251 argLen: 3,
24252 commutative: true,
24253 asm: loong64.AFMSUBD,
24254 reg: regInfo{
24255 inputs: []inputInfo{
24256 {0, 4611686017353646080},
24257 {1, 4611686017353646080},
24258 {2, 4611686017353646080},
24259 },
24260 outputs: []outputInfo{
24261 {0, 4611686017353646080},
24262 },
24263 },
24264 },
24265 {
24266 name: "FNMADDF",
24267 argLen: 3,
24268 commutative: true,
24269 asm: loong64.AFNMADDF,
24270 reg: regInfo{
24271 inputs: []inputInfo{
24272 {0, 4611686017353646080},
24273 {1, 4611686017353646080},
24274 {2, 4611686017353646080},
24275 },
24276 outputs: []outputInfo{
24277 {0, 4611686017353646080},
24278 },
24279 },
24280 },
24281 {
24282 name: "FNMADDD",
24283 argLen: 3,
24284 commutative: true,
24285 asm: loong64.AFNMADDD,
24286 reg: regInfo{
24287 inputs: []inputInfo{
24288 {0, 4611686017353646080},
24289 {1, 4611686017353646080},
24290 {2, 4611686017353646080},
24291 },
24292 outputs: []outputInfo{
24293 {0, 4611686017353646080},
24294 },
24295 },
24296 },
24297 {
24298 name: "FNMSUBF",
24299 argLen: 3,
24300 commutative: true,
24301 asm: loong64.AFNMSUBF,
24302 reg: regInfo{
24303 inputs: []inputInfo{
24304 {0, 4611686017353646080},
24305 {1, 4611686017353646080},
24306 {2, 4611686017353646080},
24307 },
24308 outputs: []outputInfo{
24309 {0, 4611686017353646080},
24310 },
24311 },
24312 },
24313 {
24314 name: "FNMSUBD",
24315 argLen: 3,
24316 commutative: true,
24317 asm: loong64.AFNMSUBD,
24318 reg: regInfo{
24319 inputs: []inputInfo{
24320 {0, 4611686017353646080},
24321 {1, 4611686017353646080},
24322 {2, 4611686017353646080},
24323 },
24324 outputs: []outputInfo{
24325 {0, 4611686017353646080},
24326 },
24327 },
24328 },
24329 {
24330 name: "FMINF",
24331 argLen: 2,
24332 commutative: true,
24333 resultNotInArgs: true,
24334 asm: loong64.AFMINF,
24335 reg: regInfo{
24336 inputs: []inputInfo{
24337 {0, 4611686017353646080},
24338 {1, 4611686017353646080},
24339 },
24340 outputs: []outputInfo{
24341 {0, 4611686017353646080},
24342 },
24343 },
24344 },
24345 {
24346 name: "FMIND",
24347 argLen: 2,
24348 commutative: true,
24349 resultNotInArgs: true,
24350 asm: loong64.AFMIND,
24351 reg: regInfo{
24352 inputs: []inputInfo{
24353 {0, 4611686017353646080},
24354 {1, 4611686017353646080},
24355 },
24356 outputs: []outputInfo{
24357 {0, 4611686017353646080},
24358 },
24359 },
24360 },
24361 {
24362 name: "FMAXF",
24363 argLen: 2,
24364 commutative: true,
24365 resultNotInArgs: true,
24366 asm: loong64.AFMAXF,
24367 reg: regInfo{
24368 inputs: []inputInfo{
24369 {0, 4611686017353646080},
24370 {1, 4611686017353646080},
24371 },
24372 outputs: []outputInfo{
24373 {0, 4611686017353646080},
24374 },
24375 },
24376 },
24377 {
24378 name: "FMAXD",
24379 argLen: 2,
24380 commutative: true,
24381 resultNotInArgs: true,
24382 asm: loong64.AFMAXD,
24383 reg: regInfo{
24384 inputs: []inputInfo{
24385 {0, 4611686017353646080},
24386 {1, 4611686017353646080},
24387 },
24388 outputs: []outputInfo{
24389 {0, 4611686017353646080},
24390 },
24391 },
24392 },
24393 {
24394 name: "MASKEQZ",
24395 argLen: 2,
24396 asm: loong64.AMASKEQZ,
24397 reg: regInfo{
24398 inputs: []inputInfo{
24399 {0, 1073741816},
24400 {1, 1073741816},
24401 },
24402 outputs: []outputInfo{
24403 {0, 1071644664},
24404 },
24405 },
24406 },
24407 {
24408 name: "MASKNEZ",
24409 argLen: 2,
24410 asm: loong64.AMASKNEZ,
24411 reg: regInfo{
24412 inputs: []inputInfo{
24413 {0, 1073741816},
24414 {1, 1073741816},
24415 },
24416 outputs: []outputInfo{
24417 {0, 1071644664},
24418 },
24419 },
24420 },
24421 {
24422 name: "FCOPYSGD",
24423 argLen: 2,
24424 asm: loong64.AFCOPYSGD,
24425 reg: regInfo{
24426 inputs: []inputInfo{
24427 {0, 4611686017353646080},
24428 {1, 4611686017353646080},
24429 },
24430 outputs: []outputInfo{
24431 {0, 4611686017353646080},
24432 },
24433 },
24434 },
24435 {
24436 name: "SLLV",
24437 argLen: 2,
24438 asm: loong64.ASLLV,
24439 reg: regInfo{
24440 inputs: []inputInfo{
24441 {0, 1073741816},
24442 {1, 1073741816},
24443 },
24444 outputs: []outputInfo{
24445 {0, 1071644664},
24446 },
24447 },
24448 },
24449 {
24450 name: "SLLVconst",
24451 auxType: auxInt64,
24452 argLen: 1,
24453 asm: loong64.ASLLV,
24454 reg: regInfo{
24455 inputs: []inputInfo{
24456 {0, 1073741816},
24457 },
24458 outputs: []outputInfo{
24459 {0, 1071644664},
24460 },
24461 },
24462 },
24463 {
24464 name: "SRLV",
24465 argLen: 2,
24466 asm: loong64.ASRLV,
24467 reg: regInfo{
24468 inputs: []inputInfo{
24469 {0, 1073741816},
24470 {1, 1073741816},
24471 },
24472 outputs: []outputInfo{
24473 {0, 1071644664},
24474 },
24475 },
24476 },
24477 {
24478 name: "SRLVconst",
24479 auxType: auxInt64,
24480 argLen: 1,
24481 asm: loong64.ASRLV,
24482 reg: regInfo{
24483 inputs: []inputInfo{
24484 {0, 1073741816},
24485 },
24486 outputs: []outputInfo{
24487 {0, 1071644664},
24488 },
24489 },
24490 },
24491 {
24492 name: "SRAV",
24493 argLen: 2,
24494 asm: loong64.ASRAV,
24495 reg: regInfo{
24496 inputs: []inputInfo{
24497 {0, 1073741816},
24498 {1, 1073741816},
24499 },
24500 outputs: []outputInfo{
24501 {0, 1071644664},
24502 },
24503 },
24504 },
24505 {
24506 name: "SRAVconst",
24507 auxType: auxInt64,
24508 argLen: 1,
24509 asm: loong64.ASRAV,
24510 reg: regInfo{
24511 inputs: []inputInfo{
24512 {0, 1073741816},
24513 },
24514 outputs: []outputInfo{
24515 {0, 1071644664},
24516 },
24517 },
24518 },
24519 {
24520 name: "ROTR",
24521 argLen: 2,
24522 asm: loong64.AROTR,
24523 reg: regInfo{
24524 inputs: []inputInfo{
24525 {0, 1073741816},
24526 {1, 1073741816},
24527 },
24528 outputs: []outputInfo{
24529 {0, 1071644664},
24530 },
24531 },
24532 },
24533 {
24534 name: "ROTRV",
24535 argLen: 2,
24536 asm: loong64.AROTRV,
24537 reg: regInfo{
24538 inputs: []inputInfo{
24539 {0, 1073741816},
24540 {1, 1073741816},
24541 },
24542 outputs: []outputInfo{
24543 {0, 1071644664},
24544 },
24545 },
24546 },
24547 {
24548 name: "ROTRconst",
24549 auxType: auxInt64,
24550 argLen: 1,
24551 asm: loong64.AROTR,
24552 reg: regInfo{
24553 inputs: []inputInfo{
24554 {0, 1073741816},
24555 },
24556 outputs: []outputInfo{
24557 {0, 1071644664},
24558 },
24559 },
24560 },
24561 {
24562 name: "ROTRVconst",
24563 auxType: auxInt64,
24564 argLen: 1,
24565 asm: loong64.AROTRV,
24566 reg: regInfo{
24567 inputs: []inputInfo{
24568 {0, 1073741816},
24569 },
24570 outputs: []outputInfo{
24571 {0, 1071644664},
24572 },
24573 },
24574 },
24575 {
24576 name: "SGT",
24577 argLen: 2,
24578 asm: loong64.ASGT,
24579 reg: regInfo{
24580 inputs: []inputInfo{
24581 {0, 1073741816},
24582 {1, 1073741816},
24583 },
24584 outputs: []outputInfo{
24585 {0, 1071644664},
24586 },
24587 },
24588 },
24589 {
24590 name: "SGTconst",
24591 auxType: auxInt64,
24592 argLen: 1,
24593 asm: loong64.ASGT,
24594 reg: regInfo{
24595 inputs: []inputInfo{
24596 {0, 1073741816},
24597 },
24598 outputs: []outputInfo{
24599 {0, 1071644664},
24600 },
24601 },
24602 },
24603 {
24604 name: "SGTU",
24605 argLen: 2,
24606 asm: loong64.ASGTU,
24607 reg: regInfo{
24608 inputs: []inputInfo{
24609 {0, 1073741816},
24610 {1, 1073741816},
24611 },
24612 outputs: []outputInfo{
24613 {0, 1071644664},
24614 },
24615 },
24616 },
24617 {
24618 name: "SGTUconst",
24619 auxType: auxInt64,
24620 argLen: 1,
24621 asm: loong64.ASGTU,
24622 reg: regInfo{
24623 inputs: []inputInfo{
24624 {0, 1073741816},
24625 },
24626 outputs: []outputInfo{
24627 {0, 1071644664},
24628 },
24629 },
24630 },
24631 {
24632 name: "CMPEQF",
24633 argLen: 2,
24634 asm: loong64.ACMPEQF,
24635 reg: regInfo{
24636 inputs: []inputInfo{
24637 {0, 4611686017353646080},
24638 {1, 4611686017353646080},
24639 },
24640 },
24641 },
24642 {
24643 name: "CMPEQD",
24644 argLen: 2,
24645 asm: loong64.ACMPEQD,
24646 reg: regInfo{
24647 inputs: []inputInfo{
24648 {0, 4611686017353646080},
24649 {1, 4611686017353646080},
24650 },
24651 },
24652 },
24653 {
24654 name: "CMPGEF",
24655 argLen: 2,
24656 asm: loong64.ACMPGEF,
24657 reg: regInfo{
24658 inputs: []inputInfo{
24659 {0, 4611686017353646080},
24660 {1, 4611686017353646080},
24661 },
24662 },
24663 },
24664 {
24665 name: "CMPGED",
24666 argLen: 2,
24667 asm: loong64.ACMPGED,
24668 reg: regInfo{
24669 inputs: []inputInfo{
24670 {0, 4611686017353646080},
24671 {1, 4611686017353646080},
24672 },
24673 },
24674 },
24675 {
24676 name: "CMPGTF",
24677 argLen: 2,
24678 asm: loong64.ACMPGTF,
24679 reg: regInfo{
24680 inputs: []inputInfo{
24681 {0, 4611686017353646080},
24682 {1, 4611686017353646080},
24683 },
24684 },
24685 },
24686 {
24687 name: "CMPGTD",
24688 argLen: 2,
24689 asm: loong64.ACMPGTD,
24690 reg: regInfo{
24691 inputs: []inputInfo{
24692 {0, 4611686017353646080},
24693 {1, 4611686017353646080},
24694 },
24695 },
24696 },
24697 {
24698 name: "BSTRPICKW",
24699 auxType: auxInt64,
24700 argLen: 1,
24701 asm: loong64.ABSTRPICKW,
24702 reg: regInfo{
24703 inputs: []inputInfo{
24704 {0, 1073741816},
24705 },
24706 outputs: []outputInfo{
24707 {0, 1071644664},
24708 },
24709 },
24710 },
24711 {
24712 name: "BSTRPICKV",
24713 auxType: auxInt64,
24714 argLen: 1,
24715 asm: loong64.ABSTRPICKV,
24716 reg: regInfo{
24717 inputs: []inputInfo{
24718 {0, 1073741816},
24719 },
24720 outputs: []outputInfo{
24721 {0, 1071644664},
24722 },
24723 },
24724 },
24725 {
24726 name: "MOVVconst",
24727 auxType: auxInt64,
24728 argLen: 0,
24729 rematerializeable: true,
24730 asm: loong64.AMOVV,
24731 reg: regInfo{
24732 outputs: []outputInfo{
24733 {0, 1071644664},
24734 },
24735 },
24736 },
24737 {
24738 name: "MOVFconst",
24739 auxType: auxFloat64,
24740 argLen: 0,
24741 rematerializeable: true,
24742 asm: loong64.AMOVF,
24743 reg: regInfo{
24744 outputs: []outputInfo{
24745 {0, 4611686017353646080},
24746 },
24747 },
24748 },
24749 {
24750 name: "MOVDconst",
24751 auxType: auxFloat64,
24752 argLen: 0,
24753 rematerializeable: true,
24754 asm: loong64.AMOVD,
24755 reg: regInfo{
24756 outputs: []outputInfo{
24757 {0, 4611686017353646080},
24758 },
24759 },
24760 },
24761 {
24762 name: "MOVVaddr",
24763 auxType: auxSymOff,
24764 argLen: 1,
24765 rematerializeable: true,
24766 symEffect: SymAddr,
24767 asm: loong64.AMOVV,
24768 reg: regInfo{
24769 inputs: []inputInfo{
24770 {0, 4611686018427387908},
24771 },
24772 outputs: []outputInfo{
24773 {0, 1071644664},
24774 },
24775 },
24776 },
24777 {
24778 name: "MOVBload",
24779 auxType: auxSymOff,
24780 argLen: 2,
24781 faultOnNilArg0: true,
24782 symEffect: SymRead,
24783 asm: loong64.AMOVB,
24784 reg: regInfo{
24785 inputs: []inputInfo{
24786 {0, 4611686019501129724},
24787 },
24788 outputs: []outputInfo{
24789 {0, 1071644664},
24790 },
24791 },
24792 },
24793 {
24794 name: "MOVBUload",
24795 auxType: auxSymOff,
24796 argLen: 2,
24797 faultOnNilArg0: true,
24798 symEffect: SymRead,
24799 asm: loong64.AMOVBU,
24800 reg: regInfo{
24801 inputs: []inputInfo{
24802 {0, 4611686019501129724},
24803 },
24804 outputs: []outputInfo{
24805 {0, 1071644664},
24806 },
24807 },
24808 },
24809 {
24810 name: "MOVHload",
24811 auxType: auxSymOff,
24812 argLen: 2,
24813 faultOnNilArg0: true,
24814 symEffect: SymRead,
24815 asm: loong64.AMOVH,
24816 reg: regInfo{
24817 inputs: []inputInfo{
24818 {0, 4611686019501129724},
24819 },
24820 outputs: []outputInfo{
24821 {0, 1071644664},
24822 },
24823 },
24824 },
24825 {
24826 name: "MOVHUload",
24827 auxType: auxSymOff,
24828 argLen: 2,
24829 faultOnNilArg0: true,
24830 symEffect: SymRead,
24831 asm: loong64.AMOVHU,
24832 reg: regInfo{
24833 inputs: []inputInfo{
24834 {0, 4611686019501129724},
24835 },
24836 outputs: []outputInfo{
24837 {0, 1071644664},
24838 },
24839 },
24840 },
24841 {
24842 name: "MOVWload",
24843 auxType: auxSymOff,
24844 argLen: 2,
24845 faultOnNilArg0: true,
24846 symEffect: SymRead,
24847 asm: loong64.AMOVW,
24848 reg: regInfo{
24849 inputs: []inputInfo{
24850 {0, 4611686019501129724},
24851 },
24852 outputs: []outputInfo{
24853 {0, 1071644664},
24854 },
24855 },
24856 },
24857 {
24858 name: "MOVWUload",
24859 auxType: auxSymOff,
24860 argLen: 2,
24861 faultOnNilArg0: true,
24862 symEffect: SymRead,
24863 asm: loong64.AMOVWU,
24864 reg: regInfo{
24865 inputs: []inputInfo{
24866 {0, 4611686019501129724},
24867 },
24868 outputs: []outputInfo{
24869 {0, 1071644664},
24870 },
24871 },
24872 },
24873 {
24874 name: "MOVVload",
24875 auxType: auxSymOff,
24876 argLen: 2,
24877 faultOnNilArg0: true,
24878 symEffect: SymRead,
24879 asm: loong64.AMOVV,
24880 reg: regInfo{
24881 inputs: []inputInfo{
24882 {0, 4611686019501129724},
24883 },
24884 outputs: []outputInfo{
24885 {0, 1071644664},
24886 },
24887 },
24888 },
24889 {
24890 name: "MOVFload",
24891 auxType: auxSymOff,
24892 argLen: 2,
24893 faultOnNilArg0: true,
24894 symEffect: SymRead,
24895 asm: loong64.AMOVF,
24896 reg: regInfo{
24897 inputs: []inputInfo{
24898 {0, 4611686019501129724},
24899 },
24900 outputs: []outputInfo{
24901 {0, 4611686017353646080},
24902 },
24903 },
24904 },
24905 {
24906 name: "MOVDload",
24907 auxType: auxSymOff,
24908 argLen: 2,
24909 faultOnNilArg0: true,
24910 symEffect: SymRead,
24911 asm: loong64.AMOVD,
24912 reg: regInfo{
24913 inputs: []inputInfo{
24914 {0, 4611686019501129724},
24915 },
24916 outputs: []outputInfo{
24917 {0, 4611686017353646080},
24918 },
24919 },
24920 },
24921 {
24922 name: "MOVVloadidx",
24923 argLen: 3,
24924 asm: loong64.AMOVV,
24925 reg: regInfo{
24926 inputs: []inputInfo{
24927 {1, 1073741816},
24928 {0, 4611686019501129724},
24929 },
24930 outputs: []outputInfo{
24931 {0, 1071644664},
24932 },
24933 },
24934 },
24935 {
24936 name: "MOVWloadidx",
24937 argLen: 3,
24938 asm: loong64.AMOVW,
24939 reg: regInfo{
24940 inputs: []inputInfo{
24941 {1, 1073741816},
24942 {0, 4611686019501129724},
24943 },
24944 outputs: []outputInfo{
24945 {0, 1071644664},
24946 },
24947 },
24948 },
24949 {
24950 name: "MOVWUloadidx",
24951 argLen: 3,
24952 asm: loong64.AMOVWU,
24953 reg: regInfo{
24954 inputs: []inputInfo{
24955 {1, 1073741816},
24956 {0, 4611686019501129724},
24957 },
24958 outputs: []outputInfo{
24959 {0, 1071644664},
24960 },
24961 },
24962 },
24963 {
24964 name: "MOVHloadidx",
24965 argLen: 3,
24966 asm: loong64.AMOVH,
24967 reg: regInfo{
24968 inputs: []inputInfo{
24969 {1, 1073741816},
24970 {0, 4611686019501129724},
24971 },
24972 outputs: []outputInfo{
24973 {0, 1071644664},
24974 },
24975 },
24976 },
24977 {
24978 name: "MOVHUloadidx",
24979 argLen: 3,
24980 asm: loong64.AMOVHU,
24981 reg: regInfo{
24982 inputs: []inputInfo{
24983 {1, 1073741816},
24984 {0, 4611686019501129724},
24985 },
24986 outputs: []outputInfo{
24987 {0, 1071644664},
24988 },
24989 },
24990 },
24991 {
24992 name: "MOVBloadidx",
24993 argLen: 3,
24994 asm: loong64.AMOVB,
24995 reg: regInfo{
24996 inputs: []inputInfo{
24997 {1, 1073741816},
24998 {0, 4611686019501129724},
24999 },
25000 outputs: []outputInfo{
25001 {0, 1071644664},
25002 },
25003 },
25004 },
25005 {
25006 name: "MOVBUloadidx",
25007 argLen: 3,
25008 asm: loong64.AMOVBU,
25009 reg: regInfo{
25010 inputs: []inputInfo{
25011 {1, 1073741816},
25012 {0, 4611686019501129724},
25013 },
25014 outputs: []outputInfo{
25015 {0, 1071644664},
25016 },
25017 },
25018 },
25019 {
25020 name: "MOVFloadidx",
25021 argLen: 3,
25022 asm: loong64.AMOVF,
25023 reg: regInfo{
25024 inputs: []inputInfo{
25025 {1, 1073741816},
25026 {0, 4611686019501129724},
25027 },
25028 outputs: []outputInfo{
25029 {0, 4611686017353646080},
25030 },
25031 },
25032 },
25033 {
25034 name: "MOVDloadidx",
25035 argLen: 3,
25036 asm: loong64.AMOVD,
25037 reg: regInfo{
25038 inputs: []inputInfo{
25039 {1, 1073741816},
25040 {0, 4611686019501129724},
25041 },
25042 outputs: []outputInfo{
25043 {0, 4611686017353646080},
25044 },
25045 },
25046 },
25047 {
25048 name: "MOVBstore",
25049 auxType: auxSymOff,
25050 argLen: 3,
25051 faultOnNilArg0: true,
25052 symEffect: SymWrite,
25053 asm: loong64.AMOVB,
25054 reg: regInfo{
25055 inputs: []inputInfo{
25056 {1, 1073741816},
25057 {0, 4611686019501129724},
25058 },
25059 },
25060 },
25061 {
25062 name: "MOVHstore",
25063 auxType: auxSymOff,
25064 argLen: 3,
25065 faultOnNilArg0: true,
25066 symEffect: SymWrite,
25067 asm: loong64.AMOVH,
25068 reg: regInfo{
25069 inputs: []inputInfo{
25070 {1, 1073741816},
25071 {0, 4611686019501129724},
25072 },
25073 },
25074 },
25075 {
25076 name: "MOVWstore",
25077 auxType: auxSymOff,
25078 argLen: 3,
25079 faultOnNilArg0: true,
25080 symEffect: SymWrite,
25081 asm: loong64.AMOVW,
25082 reg: regInfo{
25083 inputs: []inputInfo{
25084 {1, 1073741816},
25085 {0, 4611686019501129724},
25086 },
25087 },
25088 },
25089 {
25090 name: "MOVVstore",
25091 auxType: auxSymOff,
25092 argLen: 3,
25093 faultOnNilArg0: true,
25094 symEffect: SymWrite,
25095 asm: loong64.AMOVV,
25096 reg: regInfo{
25097 inputs: []inputInfo{
25098 {1, 1073741816},
25099 {0, 4611686019501129724},
25100 },
25101 },
25102 },
25103 {
25104 name: "MOVFstore",
25105 auxType: auxSymOff,
25106 argLen: 3,
25107 faultOnNilArg0: true,
25108 symEffect: SymWrite,
25109 asm: loong64.AMOVF,
25110 reg: regInfo{
25111 inputs: []inputInfo{
25112 {0, 4611686019501129724},
25113 {1, 4611686017353646080},
25114 },
25115 },
25116 },
25117 {
25118 name: "MOVDstore",
25119 auxType: auxSymOff,
25120 argLen: 3,
25121 faultOnNilArg0: true,
25122 symEffect: SymWrite,
25123 asm: loong64.AMOVD,
25124 reg: regInfo{
25125 inputs: []inputInfo{
25126 {0, 4611686019501129724},
25127 {1, 4611686017353646080},
25128 },
25129 },
25130 },
25131 {
25132 name: "MOVBstoreidx",
25133 argLen: 4,
25134 asm: loong64.AMOVB,
25135 reg: regInfo{
25136 inputs: []inputInfo{
25137 {1, 1073741816},
25138 {2, 1073741816},
25139 {0, 4611686019501129724},
25140 },
25141 },
25142 },
25143 {
25144 name: "MOVHstoreidx",
25145 argLen: 4,
25146 asm: loong64.AMOVH,
25147 reg: regInfo{
25148 inputs: []inputInfo{
25149 {1, 1073741816},
25150 {2, 1073741816},
25151 {0, 4611686019501129724},
25152 },
25153 },
25154 },
25155 {
25156 name: "MOVWstoreidx",
25157 argLen: 4,
25158 asm: loong64.AMOVW,
25159 reg: regInfo{
25160 inputs: []inputInfo{
25161 {1, 1073741816},
25162 {2, 1073741816},
25163 {0, 4611686019501129724},
25164 },
25165 },
25166 },
25167 {
25168 name: "MOVVstoreidx",
25169 argLen: 4,
25170 asm: loong64.AMOVV,
25171 reg: regInfo{
25172 inputs: []inputInfo{
25173 {1, 1073741816},
25174 {2, 1073741816},
25175 {0, 4611686019501129724},
25176 },
25177 },
25178 },
25179 {
25180 name: "MOVFstoreidx",
25181 argLen: 4,
25182 asm: loong64.AMOVF,
25183 reg: regInfo{
25184 inputs: []inputInfo{
25185 {1, 1073741816},
25186 {0, 4611686019501129724},
25187 {2, 4611686017353646080},
25188 },
25189 },
25190 },
25191 {
25192 name: "MOVDstoreidx",
25193 argLen: 4,
25194 asm: loong64.AMOVD,
25195 reg: regInfo{
25196 inputs: []inputInfo{
25197 {1, 1073741816},
25198 {0, 4611686019501129724},
25199 {2, 4611686017353646080},
25200 },
25201 },
25202 },
25203 {
25204 name: "MOVBstorezero",
25205 auxType: auxSymOff,
25206 argLen: 2,
25207 faultOnNilArg0: true,
25208 symEffect: SymWrite,
25209 asm: loong64.AMOVB,
25210 reg: regInfo{
25211 inputs: []inputInfo{
25212 {0, 4611686019501129724},
25213 },
25214 },
25215 },
25216 {
25217 name: "MOVHstorezero",
25218 auxType: auxSymOff,
25219 argLen: 2,
25220 faultOnNilArg0: true,
25221 symEffect: SymWrite,
25222 asm: loong64.AMOVH,
25223 reg: regInfo{
25224 inputs: []inputInfo{
25225 {0, 4611686019501129724},
25226 },
25227 },
25228 },
25229 {
25230 name: "MOVWstorezero",
25231 auxType: auxSymOff,
25232 argLen: 2,
25233 faultOnNilArg0: true,
25234 symEffect: SymWrite,
25235 asm: loong64.AMOVW,
25236 reg: regInfo{
25237 inputs: []inputInfo{
25238 {0, 4611686019501129724},
25239 },
25240 },
25241 },
25242 {
25243 name: "MOVVstorezero",
25244 auxType: auxSymOff,
25245 argLen: 2,
25246 faultOnNilArg0: true,
25247 symEffect: SymWrite,
25248 asm: loong64.AMOVV,
25249 reg: regInfo{
25250 inputs: []inputInfo{
25251 {0, 4611686019501129724},
25252 },
25253 },
25254 },
25255 {
25256 name: "MOVBstorezeroidx",
25257 argLen: 3,
25258 asm: loong64.AMOVB,
25259 reg: regInfo{
25260 inputs: []inputInfo{
25261 {1, 1073741816},
25262 {0, 4611686019501129724},
25263 },
25264 },
25265 },
25266 {
25267 name: "MOVHstorezeroidx",
25268 argLen: 3,
25269 asm: loong64.AMOVH,
25270 reg: regInfo{
25271 inputs: []inputInfo{
25272 {1, 1073741816},
25273 {0, 4611686019501129724},
25274 },
25275 },
25276 },
25277 {
25278 name: "MOVWstorezeroidx",
25279 argLen: 3,
25280 asm: loong64.AMOVW,
25281 reg: regInfo{
25282 inputs: []inputInfo{
25283 {1, 1073741816},
25284 {0, 4611686019501129724},
25285 },
25286 },
25287 },
25288 {
25289 name: "MOVVstorezeroidx",
25290 argLen: 3,
25291 asm: loong64.AMOVV,
25292 reg: regInfo{
25293 inputs: []inputInfo{
25294 {1, 1073741816},
25295 {0, 4611686019501129724},
25296 },
25297 },
25298 },
25299 {
25300 name: "MOVWfpgp",
25301 argLen: 1,
25302 asm: loong64.AMOVW,
25303 reg: regInfo{
25304 inputs: []inputInfo{
25305 {0, 4611686017353646080},
25306 },
25307 outputs: []outputInfo{
25308 {0, 1071644664},
25309 },
25310 },
25311 },
25312 {
25313 name: "MOVWgpfp",
25314 argLen: 1,
25315 asm: loong64.AMOVW,
25316 reg: regInfo{
25317 inputs: []inputInfo{
25318 {0, 1071644664},
25319 },
25320 outputs: []outputInfo{
25321 {0, 4611686017353646080},
25322 },
25323 },
25324 },
25325 {
25326 name: "MOVVfpgp",
25327 argLen: 1,
25328 asm: loong64.AMOVV,
25329 reg: regInfo{
25330 inputs: []inputInfo{
25331 {0, 4611686017353646080},
25332 },
25333 outputs: []outputInfo{
25334 {0, 1071644664},
25335 },
25336 },
25337 },
25338 {
25339 name: "MOVVgpfp",
25340 argLen: 1,
25341 asm: loong64.AMOVV,
25342 reg: regInfo{
25343 inputs: []inputInfo{
25344 {0, 1071644664},
25345 },
25346 outputs: []outputInfo{
25347 {0, 4611686017353646080},
25348 },
25349 },
25350 },
25351 {
25352 name: "MOVBreg",
25353 argLen: 1,
25354 asm: loong64.AMOVB,
25355 reg: regInfo{
25356 inputs: []inputInfo{
25357 {0, 1073741816},
25358 },
25359 outputs: []outputInfo{
25360 {0, 1071644664},
25361 },
25362 },
25363 },
25364 {
25365 name: "MOVBUreg",
25366 argLen: 1,
25367 asm: loong64.AMOVBU,
25368 reg: regInfo{
25369 inputs: []inputInfo{
25370 {0, 1073741816},
25371 },
25372 outputs: []outputInfo{
25373 {0, 1071644664},
25374 },
25375 },
25376 },
25377 {
25378 name: "MOVHreg",
25379 argLen: 1,
25380 asm: loong64.AMOVH,
25381 reg: regInfo{
25382 inputs: []inputInfo{
25383 {0, 1073741816},
25384 },
25385 outputs: []outputInfo{
25386 {0, 1071644664},
25387 },
25388 },
25389 },
25390 {
25391 name: "MOVHUreg",
25392 argLen: 1,
25393 asm: loong64.AMOVHU,
25394 reg: regInfo{
25395 inputs: []inputInfo{
25396 {0, 1073741816},
25397 },
25398 outputs: []outputInfo{
25399 {0, 1071644664},
25400 },
25401 },
25402 },
25403 {
25404 name: "MOVWreg",
25405 argLen: 1,
25406 asm: loong64.AMOVW,
25407 reg: regInfo{
25408 inputs: []inputInfo{
25409 {0, 1073741816},
25410 },
25411 outputs: []outputInfo{
25412 {0, 1071644664},
25413 },
25414 },
25415 },
25416 {
25417 name: "MOVWUreg",
25418 argLen: 1,
25419 asm: loong64.AMOVWU,
25420 reg: regInfo{
25421 inputs: []inputInfo{
25422 {0, 1073741816},
25423 },
25424 outputs: []outputInfo{
25425 {0, 1071644664},
25426 },
25427 },
25428 },
25429 {
25430 name: "MOVVreg",
25431 argLen: 1,
25432 asm: loong64.AMOVV,
25433 reg: regInfo{
25434 inputs: []inputInfo{
25435 {0, 1073741816},
25436 },
25437 outputs: []outputInfo{
25438 {0, 1071644664},
25439 },
25440 },
25441 },
25442 {
25443 name: "MOVVnop",
25444 argLen: 1,
25445 resultInArg0: true,
25446 reg: regInfo{
25447 inputs: []inputInfo{
25448 {0, 1071644664},
25449 },
25450 outputs: []outputInfo{
25451 {0, 1071644664},
25452 },
25453 },
25454 },
25455 {
25456 name: "MOVWF",
25457 argLen: 1,
25458 asm: loong64.AMOVWF,
25459 reg: regInfo{
25460 inputs: []inputInfo{
25461 {0, 4611686017353646080},
25462 },
25463 outputs: []outputInfo{
25464 {0, 4611686017353646080},
25465 },
25466 },
25467 },
25468 {
25469 name: "MOVWD",
25470 argLen: 1,
25471 asm: loong64.AMOVWD,
25472 reg: regInfo{
25473 inputs: []inputInfo{
25474 {0, 4611686017353646080},
25475 },
25476 outputs: []outputInfo{
25477 {0, 4611686017353646080},
25478 },
25479 },
25480 },
25481 {
25482 name: "MOVVF",
25483 argLen: 1,
25484 asm: loong64.AMOVVF,
25485 reg: regInfo{
25486 inputs: []inputInfo{
25487 {0, 4611686017353646080},
25488 },
25489 outputs: []outputInfo{
25490 {0, 4611686017353646080},
25491 },
25492 },
25493 },
25494 {
25495 name: "MOVVD",
25496 argLen: 1,
25497 asm: loong64.AMOVVD,
25498 reg: regInfo{
25499 inputs: []inputInfo{
25500 {0, 4611686017353646080},
25501 },
25502 outputs: []outputInfo{
25503 {0, 4611686017353646080},
25504 },
25505 },
25506 },
25507 {
25508 name: "TRUNCFW",
25509 argLen: 1,
25510 asm: loong64.ATRUNCFW,
25511 reg: regInfo{
25512 inputs: []inputInfo{
25513 {0, 4611686017353646080},
25514 },
25515 outputs: []outputInfo{
25516 {0, 4611686017353646080},
25517 },
25518 },
25519 },
25520 {
25521 name: "TRUNCDW",
25522 argLen: 1,
25523 asm: loong64.ATRUNCDW,
25524 reg: regInfo{
25525 inputs: []inputInfo{
25526 {0, 4611686017353646080},
25527 },
25528 outputs: []outputInfo{
25529 {0, 4611686017353646080},
25530 },
25531 },
25532 },
25533 {
25534 name: "TRUNCFV",
25535 argLen: 1,
25536 asm: loong64.ATRUNCFV,
25537 reg: regInfo{
25538 inputs: []inputInfo{
25539 {0, 4611686017353646080},
25540 },
25541 outputs: []outputInfo{
25542 {0, 4611686017353646080},
25543 },
25544 },
25545 },
25546 {
25547 name: "TRUNCDV",
25548 argLen: 1,
25549 asm: loong64.ATRUNCDV,
25550 reg: regInfo{
25551 inputs: []inputInfo{
25552 {0, 4611686017353646080},
25553 },
25554 outputs: []outputInfo{
25555 {0, 4611686017353646080},
25556 },
25557 },
25558 },
25559 {
25560 name: "MOVFD",
25561 argLen: 1,
25562 asm: loong64.AMOVFD,
25563 reg: regInfo{
25564 inputs: []inputInfo{
25565 {0, 4611686017353646080},
25566 },
25567 outputs: []outputInfo{
25568 {0, 4611686017353646080},
25569 },
25570 },
25571 },
25572 {
25573 name: "MOVDF",
25574 argLen: 1,
25575 asm: loong64.AMOVDF,
25576 reg: regInfo{
25577 inputs: []inputInfo{
25578 {0, 4611686017353646080},
25579 },
25580 outputs: []outputInfo{
25581 {0, 4611686017353646080},
25582 },
25583 },
25584 },
25585 {
25586 name: "LoweredRound32F",
25587 argLen: 1,
25588 resultInArg0: true,
25589 reg: regInfo{
25590 inputs: []inputInfo{
25591 {0, 4611686017353646080},
25592 },
25593 outputs: []outputInfo{
25594 {0, 4611686017353646080},
25595 },
25596 },
25597 },
25598 {
25599 name: "LoweredRound64F",
25600 argLen: 1,
25601 resultInArg0: true,
25602 reg: regInfo{
25603 inputs: []inputInfo{
25604 {0, 4611686017353646080},
25605 },
25606 outputs: []outputInfo{
25607 {0, 4611686017353646080},
25608 },
25609 },
25610 },
25611 {
25612 name: "CALLstatic",
25613 auxType: auxCallOff,
25614 argLen: -1,
25615 clobberFlags: true,
25616 call: true,
25617 reg: regInfo{
25618 clobbers: 4611686018427387896,
25619 },
25620 },
25621 {
25622 name: "CALLtail",
25623 auxType: auxCallOff,
25624 argLen: -1,
25625 clobberFlags: true,
25626 call: true,
25627 tailCall: true,
25628 reg: regInfo{
25629 clobbers: 4611686018427387896,
25630 },
25631 },
25632 {
25633 name: "CALLclosure",
25634 auxType: auxCallOff,
25635 argLen: -1,
25636 clobberFlags: true,
25637 call: true,
25638 reg: regInfo{
25639 inputs: []inputInfo{
25640 {1, 268435456},
25641 {0, 1071644668},
25642 },
25643 clobbers: 4611686018427387896,
25644 },
25645 },
25646 {
25647 name: "CALLinter",
25648 auxType: auxCallOff,
25649 argLen: -1,
25650 clobberFlags: true,
25651 call: true,
25652 reg: regInfo{
25653 inputs: []inputInfo{
25654 {0, 1071644664},
25655 },
25656 clobbers: 4611686018427387896,
25657 },
25658 },
25659 {
25660 name: "DUFFZERO",
25661 auxType: auxInt64,
25662 argLen: 2,
25663 faultOnNilArg0: true,
25664 reg: regInfo{
25665 inputs: []inputInfo{
25666 {0, 524288},
25667 },
25668 clobbers: 524290,
25669 },
25670 },
25671 {
25672 name: "DUFFCOPY",
25673 auxType: auxInt64,
25674 argLen: 3,
25675 faultOnNilArg0: true,
25676 faultOnNilArg1: true,
25677 reg: regInfo{
25678 inputs: []inputInfo{
25679 {0, 1048576},
25680 {1, 524288},
25681 },
25682 clobbers: 1572866,
25683 },
25684 },
25685 {
25686 name: "LoweredZero",
25687 auxType: auxInt64,
25688 argLen: 3,
25689 faultOnNilArg0: true,
25690 reg: regInfo{
25691 inputs: []inputInfo{
25692 {0, 524288},
25693 {1, 1071644664},
25694 },
25695 clobbers: 524288,
25696 },
25697 },
25698 {
25699 name: "LoweredMove",
25700 auxType: auxInt64,
25701 argLen: 4,
25702 faultOnNilArg0: true,
25703 faultOnNilArg1: true,
25704 reg: regInfo{
25705 inputs: []inputInfo{
25706 {0, 1048576},
25707 {1, 524288},
25708 {2, 1071644664},
25709 },
25710 clobbers: 1572864,
25711 },
25712 },
25713 {
25714 name: "LoweredAtomicLoad8",
25715 argLen: 2,
25716 faultOnNilArg0: true,
25717 reg: regInfo{
25718 inputs: []inputInfo{
25719 {0, 4611686019501129724},
25720 },
25721 outputs: []outputInfo{
25722 {0, 1071644664},
25723 },
25724 },
25725 },
25726 {
25727 name: "LoweredAtomicLoad32",
25728 argLen: 2,
25729 faultOnNilArg0: true,
25730 reg: regInfo{
25731 inputs: []inputInfo{
25732 {0, 4611686019501129724},
25733 },
25734 outputs: []outputInfo{
25735 {0, 1071644664},
25736 },
25737 },
25738 },
25739 {
25740 name: "LoweredAtomicLoad64",
25741 argLen: 2,
25742 faultOnNilArg0: true,
25743 reg: regInfo{
25744 inputs: []inputInfo{
25745 {0, 4611686019501129724},
25746 },
25747 outputs: []outputInfo{
25748 {0, 1071644664},
25749 },
25750 },
25751 },
25752 {
25753 name: "LoweredAtomicStore8",
25754 argLen: 3,
25755 faultOnNilArg0: true,
25756 hasSideEffects: true,
25757 reg: regInfo{
25758 inputs: []inputInfo{
25759 {1, 1073741816},
25760 {0, 4611686019501129724},
25761 },
25762 },
25763 },
25764 {
25765 name: "LoweredAtomicStore32",
25766 argLen: 3,
25767 faultOnNilArg0: true,
25768 hasSideEffects: true,
25769 reg: regInfo{
25770 inputs: []inputInfo{
25771 {1, 1073741816},
25772 {0, 4611686019501129724},
25773 },
25774 },
25775 },
25776 {
25777 name: "LoweredAtomicStore64",
25778 argLen: 3,
25779 faultOnNilArg0: true,
25780 hasSideEffects: true,
25781 reg: regInfo{
25782 inputs: []inputInfo{
25783 {1, 1073741816},
25784 {0, 4611686019501129724},
25785 },
25786 },
25787 },
25788 {
25789 name: "LoweredAtomicStore8Variant",
25790 argLen: 3,
25791 faultOnNilArg0: true,
25792 hasSideEffects: true,
25793 reg: regInfo{
25794 inputs: []inputInfo{
25795 {1, 1073741816},
25796 {0, 4611686019501129724},
25797 },
25798 },
25799 },
25800 {
25801 name: "LoweredAtomicStore32Variant",
25802 argLen: 3,
25803 faultOnNilArg0: true,
25804 hasSideEffects: true,
25805 reg: regInfo{
25806 inputs: []inputInfo{
25807 {1, 1073741816},
25808 {0, 4611686019501129724},
25809 },
25810 },
25811 },
25812 {
25813 name: "LoweredAtomicStore64Variant",
25814 argLen: 3,
25815 faultOnNilArg0: true,
25816 hasSideEffects: true,
25817 reg: regInfo{
25818 inputs: []inputInfo{
25819 {1, 1073741816},
25820 {0, 4611686019501129724},
25821 },
25822 },
25823 },
25824 {
25825 name: "LoweredAtomicExchange32",
25826 argLen: 3,
25827 resultNotInArgs: true,
25828 faultOnNilArg0: true,
25829 hasSideEffects: true,
25830 reg: regInfo{
25831 inputs: []inputInfo{
25832 {1, 1073741816},
25833 {0, 4611686019501129724},
25834 },
25835 outputs: []outputInfo{
25836 {0, 1071644664},
25837 },
25838 },
25839 },
25840 {
25841 name: "LoweredAtomicExchange64",
25842 argLen: 3,
25843 resultNotInArgs: true,
25844 faultOnNilArg0: true,
25845 hasSideEffects: true,
25846 reg: regInfo{
25847 inputs: []inputInfo{
25848 {1, 1073741816},
25849 {0, 4611686019501129724},
25850 },
25851 outputs: []outputInfo{
25852 {0, 1071644664},
25853 },
25854 },
25855 },
25856 {
25857 name: "LoweredAtomicAdd32",
25858 argLen: 3,
25859 resultNotInArgs: true,
25860 faultOnNilArg0: true,
25861 hasSideEffects: true,
25862 reg: regInfo{
25863 inputs: []inputInfo{
25864 {1, 1073741816},
25865 {0, 4611686019501129724},
25866 },
25867 outputs: []outputInfo{
25868 {0, 1071644664},
25869 },
25870 },
25871 },
25872 {
25873 name: "LoweredAtomicAdd64",
25874 argLen: 3,
25875 resultNotInArgs: true,
25876 faultOnNilArg0: true,
25877 hasSideEffects: true,
25878 reg: regInfo{
25879 inputs: []inputInfo{
25880 {1, 1073741816},
25881 {0, 4611686019501129724},
25882 },
25883 outputs: []outputInfo{
25884 {0, 1071644664},
25885 },
25886 },
25887 },
25888 {
25889 name: "LoweredAtomicCas32",
25890 argLen: 4,
25891 resultNotInArgs: true,
25892 faultOnNilArg0: true,
25893 hasSideEffects: true,
25894 unsafePoint: true,
25895 reg: regInfo{
25896 inputs: []inputInfo{
25897 {1, 1073741816},
25898 {2, 1073741816},
25899 {0, 4611686019501129724},
25900 },
25901 outputs: []outputInfo{
25902 {0, 1071644664},
25903 },
25904 },
25905 },
25906 {
25907 name: "LoweredAtomicCas64",
25908 argLen: 4,
25909 resultNotInArgs: true,
25910 faultOnNilArg0: true,
25911 hasSideEffects: true,
25912 unsafePoint: true,
25913 reg: regInfo{
25914 inputs: []inputInfo{
25915 {1, 1073741816},
25916 {2, 1073741816},
25917 {0, 4611686019501129724},
25918 },
25919 outputs: []outputInfo{
25920 {0, 1071644664},
25921 },
25922 },
25923 },
25924 {
25925 name: "LoweredAtomicAnd32",
25926 argLen: 3,
25927 resultNotInArgs: true,
25928 faultOnNilArg0: true,
25929 hasSideEffects: true,
25930 asm: loong64.AAMANDDBW,
25931 reg: regInfo{
25932 inputs: []inputInfo{
25933 {1, 1073741816},
25934 {0, 4611686019501129724},
25935 },
25936 outputs: []outputInfo{
25937 {0, 1071644664},
25938 },
25939 },
25940 },
25941 {
25942 name: "LoweredAtomicOr32",
25943 argLen: 3,
25944 resultNotInArgs: true,
25945 faultOnNilArg0: true,
25946 hasSideEffects: true,
25947 asm: loong64.AAMORDBW,
25948 reg: regInfo{
25949 inputs: []inputInfo{
25950 {1, 1073741816},
25951 {0, 4611686019501129724},
25952 },
25953 outputs: []outputInfo{
25954 {0, 1071644664},
25955 },
25956 },
25957 },
25958 {
25959 name: "LoweredAtomicAnd32value",
25960 argLen: 3,
25961 resultNotInArgs: true,
25962 faultOnNilArg0: true,
25963 hasSideEffects: true,
25964 asm: loong64.AAMANDDBW,
25965 reg: regInfo{
25966 inputs: []inputInfo{
25967 {1, 1073741816},
25968 {0, 4611686019501129724},
25969 },
25970 outputs: []outputInfo{
25971 {0, 1071644664},
25972 },
25973 },
25974 },
25975 {
25976 name: "LoweredAtomicAnd64value",
25977 argLen: 3,
25978 resultNotInArgs: true,
25979 faultOnNilArg0: true,
25980 hasSideEffects: true,
25981 asm: loong64.AAMANDDBV,
25982 reg: regInfo{
25983 inputs: []inputInfo{
25984 {1, 1073741816},
25985 {0, 4611686019501129724},
25986 },
25987 outputs: []outputInfo{
25988 {0, 1071644664},
25989 },
25990 },
25991 },
25992 {
25993 name: "LoweredAtomicOr32value",
25994 argLen: 3,
25995 resultNotInArgs: true,
25996 faultOnNilArg0: true,
25997 hasSideEffects: true,
25998 asm: loong64.AAMORDBW,
25999 reg: regInfo{
26000 inputs: []inputInfo{
26001 {1, 1073741816},
26002 {0, 4611686019501129724},
26003 },
26004 outputs: []outputInfo{
26005 {0, 1071644664},
26006 },
26007 },
26008 },
26009 {
26010 name: "LoweredAtomicOr64value",
26011 argLen: 3,
26012 resultNotInArgs: true,
26013 faultOnNilArg0: true,
26014 hasSideEffects: true,
26015 asm: loong64.AAMORDBV,
26016 reg: regInfo{
26017 inputs: []inputInfo{
26018 {1, 1073741816},
26019 {0, 4611686019501129724},
26020 },
26021 outputs: []outputInfo{
26022 {0, 1071644664},
26023 },
26024 },
26025 },
26026 {
26027 name: "LoweredNilCheck",
26028 argLen: 2,
26029 nilCheck: true,
26030 faultOnNilArg0: true,
26031 reg: regInfo{
26032 inputs: []inputInfo{
26033 {0, 1073741816},
26034 },
26035 },
26036 },
26037 {
26038 name: "FPFlagTrue",
26039 argLen: 1,
26040 reg: regInfo{
26041 outputs: []outputInfo{
26042 {0, 1071644664},
26043 },
26044 },
26045 },
26046 {
26047 name: "FPFlagFalse",
26048 argLen: 1,
26049 reg: regInfo{
26050 outputs: []outputInfo{
26051 {0, 1071644664},
26052 },
26053 },
26054 },
26055 {
26056 name: "LoweredGetClosurePtr",
26057 argLen: 0,
26058 zeroWidth: true,
26059 reg: regInfo{
26060 outputs: []outputInfo{
26061 {0, 268435456},
26062 },
26063 },
26064 },
26065 {
26066 name: "LoweredGetCallerSP",
26067 argLen: 1,
26068 rematerializeable: true,
26069 reg: regInfo{
26070 outputs: []outputInfo{
26071 {0, 1071644664},
26072 },
26073 },
26074 },
26075 {
26076 name: "LoweredGetCallerPC",
26077 argLen: 0,
26078 rematerializeable: true,
26079 reg: regInfo{
26080 outputs: []outputInfo{
26081 {0, 1071644664},
26082 },
26083 },
26084 },
26085 {
26086 name: "LoweredWB",
26087 auxType: auxInt64,
26088 argLen: 1,
26089 clobberFlags: true,
26090 reg: regInfo{
26091 clobbers: 4611686017353646082,
26092 outputs: []outputInfo{
26093 {0, 268435456},
26094 },
26095 },
26096 },
26097 {
26098 name: "LoweredPubBarrier",
26099 argLen: 1,
26100 hasSideEffects: true,
26101 asm: loong64.ADBAR,
26102 reg: regInfo{},
26103 },
26104 {
26105 name: "LoweredPanicBoundsA",
26106 auxType: auxInt64,
26107 argLen: 3,
26108 call: true,
26109 reg: regInfo{
26110 inputs: []inputInfo{
26111 {0, 4194304},
26112 {1, 8388608},
26113 },
26114 },
26115 },
26116 {
26117 name: "LoweredPanicBoundsB",
26118 auxType: auxInt64,
26119 argLen: 3,
26120 call: true,
26121 reg: regInfo{
26122 inputs: []inputInfo{
26123 {0, 1048576},
26124 {1, 4194304},
26125 },
26126 },
26127 },
26128 {
26129 name: "LoweredPanicBoundsC",
26130 auxType: auxInt64,
26131 argLen: 3,
26132 call: true,
26133 reg: regInfo{
26134 inputs: []inputInfo{
26135 {0, 524288},
26136 {1, 1048576},
26137 },
26138 },
26139 },
26140
26141 {
26142 name: "ADD",
26143 argLen: 2,
26144 commutative: true,
26145 asm: mips.AADDU,
26146 reg: regInfo{
26147 inputs: []inputInfo{
26148 {0, 469762046},
26149 {1, 469762046},
26150 },
26151 outputs: []outputInfo{
26152 {0, 335544318},
26153 },
26154 },
26155 },
26156 {
26157 name: "ADDconst",
26158 auxType: auxInt32,
26159 argLen: 1,
26160 asm: mips.AADDU,
26161 reg: regInfo{
26162 inputs: []inputInfo{
26163 {0, 536870910},
26164 },
26165 outputs: []outputInfo{
26166 {0, 335544318},
26167 },
26168 },
26169 },
26170 {
26171 name: "SUB",
26172 argLen: 2,
26173 asm: mips.ASUBU,
26174 reg: regInfo{
26175 inputs: []inputInfo{
26176 {0, 469762046},
26177 {1, 469762046},
26178 },
26179 outputs: []outputInfo{
26180 {0, 335544318},
26181 },
26182 },
26183 },
26184 {
26185 name: "SUBconst",
26186 auxType: auxInt32,
26187 argLen: 1,
26188 asm: mips.ASUBU,
26189 reg: regInfo{
26190 inputs: []inputInfo{
26191 {0, 469762046},
26192 },
26193 outputs: []outputInfo{
26194 {0, 335544318},
26195 },
26196 },
26197 },
26198 {
26199 name: "MUL",
26200 argLen: 2,
26201 commutative: true,
26202 asm: mips.AMUL,
26203 reg: regInfo{
26204 inputs: []inputInfo{
26205 {0, 469762046},
26206 {1, 469762046},
26207 },
26208 clobbers: 105553116266496,
26209 outputs: []outputInfo{
26210 {0, 335544318},
26211 },
26212 },
26213 },
26214 {
26215 name: "MULT",
26216 argLen: 2,
26217 commutative: true,
26218 asm: mips.AMUL,
26219 reg: regInfo{
26220 inputs: []inputInfo{
26221 {0, 469762046},
26222 {1, 469762046},
26223 },
26224 outputs: []outputInfo{
26225 {0, 35184372088832},
26226 {1, 70368744177664},
26227 },
26228 },
26229 },
26230 {
26231 name: "MULTU",
26232 argLen: 2,
26233 commutative: true,
26234 asm: mips.AMULU,
26235 reg: regInfo{
26236 inputs: []inputInfo{
26237 {0, 469762046},
26238 {1, 469762046},
26239 },
26240 outputs: []outputInfo{
26241 {0, 35184372088832},
26242 {1, 70368744177664},
26243 },
26244 },
26245 },
26246 {
26247 name: "DIV",
26248 argLen: 2,
26249 asm: mips.ADIV,
26250 reg: regInfo{
26251 inputs: []inputInfo{
26252 {0, 469762046},
26253 {1, 469762046},
26254 },
26255 outputs: []outputInfo{
26256 {0, 35184372088832},
26257 {1, 70368744177664},
26258 },
26259 },
26260 },
26261 {
26262 name: "DIVU",
26263 argLen: 2,
26264 asm: mips.ADIVU,
26265 reg: regInfo{
26266 inputs: []inputInfo{
26267 {0, 469762046},
26268 {1, 469762046},
26269 },
26270 outputs: []outputInfo{
26271 {0, 35184372088832},
26272 {1, 70368744177664},
26273 },
26274 },
26275 },
26276 {
26277 name: "ADDF",
26278 argLen: 2,
26279 commutative: true,
26280 asm: mips.AADDF,
26281 reg: regInfo{
26282 inputs: []inputInfo{
26283 {0, 35183835217920},
26284 {1, 35183835217920},
26285 },
26286 outputs: []outputInfo{
26287 {0, 35183835217920},
26288 },
26289 },
26290 },
26291 {
26292 name: "ADDD",
26293 argLen: 2,
26294 commutative: true,
26295 asm: mips.AADDD,
26296 reg: regInfo{
26297 inputs: []inputInfo{
26298 {0, 35183835217920},
26299 {1, 35183835217920},
26300 },
26301 outputs: []outputInfo{
26302 {0, 35183835217920},
26303 },
26304 },
26305 },
26306 {
26307 name: "SUBF",
26308 argLen: 2,
26309 asm: mips.ASUBF,
26310 reg: regInfo{
26311 inputs: []inputInfo{
26312 {0, 35183835217920},
26313 {1, 35183835217920},
26314 },
26315 outputs: []outputInfo{
26316 {0, 35183835217920},
26317 },
26318 },
26319 },
26320 {
26321 name: "SUBD",
26322 argLen: 2,
26323 asm: mips.ASUBD,
26324 reg: regInfo{
26325 inputs: []inputInfo{
26326 {0, 35183835217920},
26327 {1, 35183835217920},
26328 },
26329 outputs: []outputInfo{
26330 {0, 35183835217920},
26331 },
26332 },
26333 },
26334 {
26335 name: "MULF",
26336 argLen: 2,
26337 commutative: true,
26338 asm: mips.AMULF,
26339 reg: regInfo{
26340 inputs: []inputInfo{
26341 {0, 35183835217920},
26342 {1, 35183835217920},
26343 },
26344 outputs: []outputInfo{
26345 {0, 35183835217920},
26346 },
26347 },
26348 },
26349 {
26350 name: "MULD",
26351 argLen: 2,
26352 commutative: true,
26353 asm: mips.AMULD,
26354 reg: regInfo{
26355 inputs: []inputInfo{
26356 {0, 35183835217920},
26357 {1, 35183835217920},
26358 },
26359 outputs: []outputInfo{
26360 {0, 35183835217920},
26361 },
26362 },
26363 },
26364 {
26365 name: "DIVF",
26366 argLen: 2,
26367 asm: mips.ADIVF,
26368 reg: regInfo{
26369 inputs: []inputInfo{
26370 {0, 35183835217920},
26371 {1, 35183835217920},
26372 },
26373 outputs: []outputInfo{
26374 {0, 35183835217920},
26375 },
26376 },
26377 },
26378 {
26379 name: "DIVD",
26380 argLen: 2,
26381 asm: mips.ADIVD,
26382 reg: regInfo{
26383 inputs: []inputInfo{
26384 {0, 35183835217920},
26385 {1, 35183835217920},
26386 },
26387 outputs: []outputInfo{
26388 {0, 35183835217920},
26389 },
26390 },
26391 },
26392 {
26393 name: "AND",
26394 argLen: 2,
26395 commutative: true,
26396 asm: mips.AAND,
26397 reg: regInfo{
26398 inputs: []inputInfo{
26399 {0, 469762046},
26400 {1, 469762046},
26401 },
26402 outputs: []outputInfo{
26403 {0, 335544318},
26404 },
26405 },
26406 },
26407 {
26408 name: "ANDconst",
26409 auxType: auxInt32,
26410 argLen: 1,
26411 asm: mips.AAND,
26412 reg: regInfo{
26413 inputs: []inputInfo{
26414 {0, 469762046},
26415 },
26416 outputs: []outputInfo{
26417 {0, 335544318},
26418 },
26419 },
26420 },
26421 {
26422 name: "OR",
26423 argLen: 2,
26424 commutative: true,
26425 asm: mips.AOR,
26426 reg: regInfo{
26427 inputs: []inputInfo{
26428 {0, 469762046},
26429 {1, 469762046},
26430 },
26431 outputs: []outputInfo{
26432 {0, 335544318},
26433 },
26434 },
26435 },
26436 {
26437 name: "ORconst",
26438 auxType: auxInt32,
26439 argLen: 1,
26440 asm: mips.AOR,
26441 reg: regInfo{
26442 inputs: []inputInfo{
26443 {0, 469762046},
26444 },
26445 outputs: []outputInfo{
26446 {0, 335544318},
26447 },
26448 },
26449 },
26450 {
26451 name: "XOR",
26452 argLen: 2,
26453 commutative: true,
26454 asm: mips.AXOR,
26455 reg: regInfo{
26456 inputs: []inputInfo{
26457 {0, 469762046},
26458 {1, 469762046},
26459 },
26460 outputs: []outputInfo{
26461 {0, 335544318},
26462 },
26463 },
26464 },
26465 {
26466 name: "XORconst",
26467 auxType: auxInt32,
26468 argLen: 1,
26469 asm: mips.AXOR,
26470 reg: regInfo{
26471 inputs: []inputInfo{
26472 {0, 469762046},
26473 },
26474 outputs: []outputInfo{
26475 {0, 335544318},
26476 },
26477 },
26478 },
26479 {
26480 name: "NOR",
26481 argLen: 2,
26482 commutative: true,
26483 asm: mips.ANOR,
26484 reg: regInfo{
26485 inputs: []inputInfo{
26486 {0, 469762046},
26487 {1, 469762046},
26488 },
26489 outputs: []outputInfo{
26490 {0, 335544318},
26491 },
26492 },
26493 },
26494 {
26495 name: "NORconst",
26496 auxType: auxInt32,
26497 argLen: 1,
26498 asm: mips.ANOR,
26499 reg: regInfo{
26500 inputs: []inputInfo{
26501 {0, 469762046},
26502 },
26503 outputs: []outputInfo{
26504 {0, 335544318},
26505 },
26506 },
26507 },
26508 {
26509 name: "NEG",
26510 argLen: 1,
26511 reg: regInfo{
26512 inputs: []inputInfo{
26513 {0, 469762046},
26514 },
26515 outputs: []outputInfo{
26516 {0, 335544318},
26517 },
26518 },
26519 },
26520 {
26521 name: "NEGF",
26522 argLen: 1,
26523 asm: mips.ANEGF,
26524 reg: regInfo{
26525 inputs: []inputInfo{
26526 {0, 35183835217920},
26527 },
26528 outputs: []outputInfo{
26529 {0, 35183835217920},
26530 },
26531 },
26532 },
26533 {
26534 name: "NEGD",
26535 argLen: 1,
26536 asm: mips.ANEGD,
26537 reg: regInfo{
26538 inputs: []inputInfo{
26539 {0, 35183835217920},
26540 },
26541 outputs: []outputInfo{
26542 {0, 35183835217920},
26543 },
26544 },
26545 },
26546 {
26547 name: "ABSD",
26548 argLen: 1,
26549 asm: mips.AABSD,
26550 reg: regInfo{
26551 inputs: []inputInfo{
26552 {0, 35183835217920},
26553 },
26554 outputs: []outputInfo{
26555 {0, 35183835217920},
26556 },
26557 },
26558 },
26559 {
26560 name: "SQRTD",
26561 argLen: 1,
26562 asm: mips.ASQRTD,
26563 reg: regInfo{
26564 inputs: []inputInfo{
26565 {0, 35183835217920},
26566 },
26567 outputs: []outputInfo{
26568 {0, 35183835217920},
26569 },
26570 },
26571 },
26572 {
26573 name: "SQRTF",
26574 argLen: 1,
26575 asm: mips.ASQRTF,
26576 reg: regInfo{
26577 inputs: []inputInfo{
26578 {0, 35183835217920},
26579 },
26580 outputs: []outputInfo{
26581 {0, 35183835217920},
26582 },
26583 },
26584 },
26585 {
26586 name: "SLL",
26587 argLen: 2,
26588 asm: mips.ASLL,
26589 reg: regInfo{
26590 inputs: []inputInfo{
26591 {0, 469762046},
26592 {1, 469762046},
26593 },
26594 outputs: []outputInfo{
26595 {0, 335544318},
26596 },
26597 },
26598 },
26599 {
26600 name: "SLLconst",
26601 auxType: auxInt32,
26602 argLen: 1,
26603 asm: mips.ASLL,
26604 reg: regInfo{
26605 inputs: []inputInfo{
26606 {0, 469762046},
26607 },
26608 outputs: []outputInfo{
26609 {0, 335544318},
26610 },
26611 },
26612 },
26613 {
26614 name: "SRL",
26615 argLen: 2,
26616 asm: mips.ASRL,
26617 reg: regInfo{
26618 inputs: []inputInfo{
26619 {0, 469762046},
26620 {1, 469762046},
26621 },
26622 outputs: []outputInfo{
26623 {0, 335544318},
26624 },
26625 },
26626 },
26627 {
26628 name: "SRLconst",
26629 auxType: auxInt32,
26630 argLen: 1,
26631 asm: mips.ASRL,
26632 reg: regInfo{
26633 inputs: []inputInfo{
26634 {0, 469762046},
26635 },
26636 outputs: []outputInfo{
26637 {0, 335544318},
26638 },
26639 },
26640 },
26641 {
26642 name: "SRA",
26643 argLen: 2,
26644 asm: mips.ASRA,
26645 reg: regInfo{
26646 inputs: []inputInfo{
26647 {0, 469762046},
26648 {1, 469762046},
26649 },
26650 outputs: []outputInfo{
26651 {0, 335544318},
26652 },
26653 },
26654 },
26655 {
26656 name: "SRAconst",
26657 auxType: auxInt32,
26658 argLen: 1,
26659 asm: mips.ASRA,
26660 reg: regInfo{
26661 inputs: []inputInfo{
26662 {0, 469762046},
26663 },
26664 outputs: []outputInfo{
26665 {0, 335544318},
26666 },
26667 },
26668 },
26669 {
26670 name: "CLZ",
26671 argLen: 1,
26672 asm: mips.ACLZ,
26673 reg: regInfo{
26674 inputs: []inputInfo{
26675 {0, 469762046},
26676 },
26677 outputs: []outputInfo{
26678 {0, 335544318},
26679 },
26680 },
26681 },
26682 {
26683 name: "SGT",
26684 argLen: 2,
26685 asm: mips.ASGT,
26686 reg: regInfo{
26687 inputs: []inputInfo{
26688 {0, 469762046},
26689 {1, 469762046},
26690 },
26691 outputs: []outputInfo{
26692 {0, 335544318},
26693 },
26694 },
26695 },
26696 {
26697 name: "SGTconst",
26698 auxType: auxInt32,
26699 argLen: 1,
26700 asm: mips.ASGT,
26701 reg: regInfo{
26702 inputs: []inputInfo{
26703 {0, 469762046},
26704 },
26705 outputs: []outputInfo{
26706 {0, 335544318},
26707 },
26708 },
26709 },
26710 {
26711 name: "SGTzero",
26712 argLen: 1,
26713 asm: mips.ASGT,
26714 reg: regInfo{
26715 inputs: []inputInfo{
26716 {0, 469762046},
26717 },
26718 outputs: []outputInfo{
26719 {0, 335544318},
26720 },
26721 },
26722 },
26723 {
26724 name: "SGTU",
26725 argLen: 2,
26726 asm: mips.ASGTU,
26727 reg: regInfo{
26728 inputs: []inputInfo{
26729 {0, 469762046},
26730 {1, 469762046},
26731 },
26732 outputs: []outputInfo{
26733 {0, 335544318},
26734 },
26735 },
26736 },
26737 {
26738 name: "SGTUconst",
26739 auxType: auxInt32,
26740 argLen: 1,
26741 asm: mips.ASGTU,
26742 reg: regInfo{
26743 inputs: []inputInfo{
26744 {0, 469762046},
26745 },
26746 outputs: []outputInfo{
26747 {0, 335544318},
26748 },
26749 },
26750 },
26751 {
26752 name: "SGTUzero",
26753 argLen: 1,
26754 asm: mips.ASGTU,
26755 reg: regInfo{
26756 inputs: []inputInfo{
26757 {0, 469762046},
26758 },
26759 outputs: []outputInfo{
26760 {0, 335544318},
26761 },
26762 },
26763 },
26764 {
26765 name: "CMPEQF",
26766 argLen: 2,
26767 asm: mips.ACMPEQF,
26768 reg: regInfo{
26769 inputs: []inputInfo{
26770 {0, 35183835217920},
26771 {1, 35183835217920},
26772 },
26773 },
26774 },
26775 {
26776 name: "CMPEQD",
26777 argLen: 2,
26778 asm: mips.ACMPEQD,
26779 reg: regInfo{
26780 inputs: []inputInfo{
26781 {0, 35183835217920},
26782 {1, 35183835217920},
26783 },
26784 },
26785 },
26786 {
26787 name: "CMPGEF",
26788 argLen: 2,
26789 asm: mips.ACMPGEF,
26790 reg: regInfo{
26791 inputs: []inputInfo{
26792 {0, 35183835217920},
26793 {1, 35183835217920},
26794 },
26795 },
26796 },
26797 {
26798 name: "CMPGED",
26799 argLen: 2,
26800 asm: mips.ACMPGED,
26801 reg: regInfo{
26802 inputs: []inputInfo{
26803 {0, 35183835217920},
26804 {1, 35183835217920},
26805 },
26806 },
26807 },
26808 {
26809 name: "CMPGTF",
26810 argLen: 2,
26811 asm: mips.ACMPGTF,
26812 reg: regInfo{
26813 inputs: []inputInfo{
26814 {0, 35183835217920},
26815 {1, 35183835217920},
26816 },
26817 },
26818 },
26819 {
26820 name: "CMPGTD",
26821 argLen: 2,
26822 asm: mips.ACMPGTD,
26823 reg: regInfo{
26824 inputs: []inputInfo{
26825 {0, 35183835217920},
26826 {1, 35183835217920},
26827 },
26828 },
26829 },
26830 {
26831 name: "MOVWconst",
26832 auxType: auxInt32,
26833 argLen: 0,
26834 rematerializeable: true,
26835 asm: mips.AMOVW,
26836 reg: regInfo{
26837 outputs: []outputInfo{
26838 {0, 335544318},
26839 },
26840 },
26841 },
26842 {
26843 name: "MOVFconst",
26844 auxType: auxFloat32,
26845 argLen: 0,
26846 rematerializeable: true,
26847 asm: mips.AMOVF,
26848 reg: regInfo{
26849 outputs: []outputInfo{
26850 {0, 35183835217920},
26851 },
26852 },
26853 },
26854 {
26855 name: "MOVDconst",
26856 auxType: auxFloat64,
26857 argLen: 0,
26858 rematerializeable: true,
26859 asm: mips.AMOVD,
26860 reg: regInfo{
26861 outputs: []outputInfo{
26862 {0, 35183835217920},
26863 },
26864 },
26865 },
26866 {
26867 name: "MOVWaddr",
26868 auxType: auxSymOff,
26869 argLen: 1,
26870 rematerializeable: true,
26871 symEffect: SymAddr,
26872 asm: mips.AMOVW,
26873 reg: regInfo{
26874 inputs: []inputInfo{
26875 {0, 140737555464192},
26876 },
26877 outputs: []outputInfo{
26878 {0, 335544318},
26879 },
26880 },
26881 },
26882 {
26883 name: "MOVBload",
26884 auxType: auxSymOff,
26885 argLen: 2,
26886 faultOnNilArg0: true,
26887 symEffect: SymRead,
26888 asm: mips.AMOVB,
26889 reg: regInfo{
26890 inputs: []inputInfo{
26891 {0, 140738025226238},
26892 },
26893 outputs: []outputInfo{
26894 {0, 335544318},
26895 },
26896 },
26897 },
26898 {
26899 name: "MOVBUload",
26900 auxType: auxSymOff,
26901 argLen: 2,
26902 faultOnNilArg0: true,
26903 symEffect: SymRead,
26904 asm: mips.AMOVBU,
26905 reg: regInfo{
26906 inputs: []inputInfo{
26907 {0, 140738025226238},
26908 },
26909 outputs: []outputInfo{
26910 {0, 335544318},
26911 },
26912 },
26913 },
26914 {
26915 name: "MOVHload",
26916 auxType: auxSymOff,
26917 argLen: 2,
26918 faultOnNilArg0: true,
26919 symEffect: SymRead,
26920 asm: mips.AMOVH,
26921 reg: regInfo{
26922 inputs: []inputInfo{
26923 {0, 140738025226238},
26924 },
26925 outputs: []outputInfo{
26926 {0, 335544318},
26927 },
26928 },
26929 },
26930 {
26931 name: "MOVHUload",
26932 auxType: auxSymOff,
26933 argLen: 2,
26934 faultOnNilArg0: true,
26935 symEffect: SymRead,
26936 asm: mips.AMOVHU,
26937 reg: regInfo{
26938 inputs: []inputInfo{
26939 {0, 140738025226238},
26940 },
26941 outputs: []outputInfo{
26942 {0, 335544318},
26943 },
26944 },
26945 },
26946 {
26947 name: "MOVWload",
26948 auxType: auxSymOff,
26949 argLen: 2,
26950 faultOnNilArg0: true,
26951 symEffect: SymRead,
26952 asm: mips.AMOVW,
26953 reg: regInfo{
26954 inputs: []inputInfo{
26955 {0, 140738025226238},
26956 },
26957 outputs: []outputInfo{
26958 {0, 335544318},
26959 },
26960 },
26961 },
26962 {
26963 name: "MOVFload",
26964 auxType: auxSymOff,
26965 argLen: 2,
26966 faultOnNilArg0: true,
26967 symEffect: SymRead,
26968 asm: mips.AMOVF,
26969 reg: regInfo{
26970 inputs: []inputInfo{
26971 {0, 140738025226238},
26972 },
26973 outputs: []outputInfo{
26974 {0, 35183835217920},
26975 },
26976 },
26977 },
26978 {
26979 name: "MOVDload",
26980 auxType: auxSymOff,
26981 argLen: 2,
26982 faultOnNilArg0: true,
26983 symEffect: SymRead,
26984 asm: mips.AMOVD,
26985 reg: regInfo{
26986 inputs: []inputInfo{
26987 {0, 140738025226238},
26988 },
26989 outputs: []outputInfo{
26990 {0, 35183835217920},
26991 },
26992 },
26993 },
26994 {
26995 name: "MOVBstore",
26996 auxType: auxSymOff,
26997 argLen: 3,
26998 faultOnNilArg0: true,
26999 symEffect: SymWrite,
27000 asm: mips.AMOVB,
27001 reg: regInfo{
27002 inputs: []inputInfo{
27003 {1, 469762046},
27004 {0, 140738025226238},
27005 },
27006 },
27007 },
27008 {
27009 name: "MOVHstore",
27010 auxType: auxSymOff,
27011 argLen: 3,
27012 faultOnNilArg0: true,
27013 symEffect: SymWrite,
27014 asm: mips.AMOVH,
27015 reg: regInfo{
27016 inputs: []inputInfo{
27017 {1, 469762046},
27018 {0, 140738025226238},
27019 },
27020 },
27021 },
27022 {
27023 name: "MOVWstore",
27024 auxType: auxSymOff,
27025 argLen: 3,
27026 faultOnNilArg0: true,
27027 symEffect: SymWrite,
27028 asm: mips.AMOVW,
27029 reg: regInfo{
27030 inputs: []inputInfo{
27031 {1, 469762046},
27032 {0, 140738025226238},
27033 },
27034 },
27035 },
27036 {
27037 name: "MOVFstore",
27038 auxType: auxSymOff,
27039 argLen: 3,
27040 faultOnNilArg0: true,
27041 symEffect: SymWrite,
27042 asm: mips.AMOVF,
27043 reg: regInfo{
27044 inputs: []inputInfo{
27045 {1, 35183835217920},
27046 {0, 140738025226238},
27047 },
27048 },
27049 },
27050 {
27051 name: "MOVDstore",
27052 auxType: auxSymOff,
27053 argLen: 3,
27054 faultOnNilArg0: true,
27055 symEffect: SymWrite,
27056 asm: mips.AMOVD,
27057 reg: regInfo{
27058 inputs: []inputInfo{
27059 {1, 35183835217920},
27060 {0, 140738025226238},
27061 },
27062 },
27063 },
27064 {
27065 name: "MOVBstorezero",
27066 auxType: auxSymOff,
27067 argLen: 2,
27068 faultOnNilArg0: true,
27069 symEffect: SymWrite,
27070 asm: mips.AMOVB,
27071 reg: regInfo{
27072 inputs: []inputInfo{
27073 {0, 140738025226238},
27074 },
27075 },
27076 },
27077 {
27078 name: "MOVHstorezero",
27079 auxType: auxSymOff,
27080 argLen: 2,
27081 faultOnNilArg0: true,
27082 symEffect: SymWrite,
27083 asm: mips.AMOVH,
27084 reg: regInfo{
27085 inputs: []inputInfo{
27086 {0, 140738025226238},
27087 },
27088 },
27089 },
27090 {
27091 name: "MOVWstorezero",
27092 auxType: auxSymOff,
27093 argLen: 2,
27094 faultOnNilArg0: true,
27095 symEffect: SymWrite,
27096 asm: mips.AMOVW,
27097 reg: regInfo{
27098 inputs: []inputInfo{
27099 {0, 140738025226238},
27100 },
27101 },
27102 },
27103 {
27104 name: "MOVWfpgp",
27105 argLen: 1,
27106 asm: mips.AMOVW,
27107 reg: regInfo{
27108 inputs: []inputInfo{
27109 {0, 35183835217920},
27110 },
27111 outputs: []outputInfo{
27112 {0, 335544318},
27113 },
27114 },
27115 },
27116 {
27117 name: "MOVWgpfp",
27118 argLen: 1,
27119 asm: mips.AMOVW,
27120 reg: regInfo{
27121 inputs: []inputInfo{
27122 {0, 335544318},
27123 },
27124 outputs: []outputInfo{
27125 {0, 35183835217920},
27126 },
27127 },
27128 },
27129 {
27130 name: "MOVBreg",
27131 argLen: 1,
27132 asm: mips.AMOVB,
27133 reg: regInfo{
27134 inputs: []inputInfo{
27135 {0, 469762046},
27136 },
27137 outputs: []outputInfo{
27138 {0, 335544318},
27139 },
27140 },
27141 },
27142 {
27143 name: "MOVBUreg",
27144 argLen: 1,
27145 asm: mips.AMOVBU,
27146 reg: regInfo{
27147 inputs: []inputInfo{
27148 {0, 469762046},
27149 },
27150 outputs: []outputInfo{
27151 {0, 335544318},
27152 },
27153 },
27154 },
27155 {
27156 name: "MOVHreg",
27157 argLen: 1,
27158 asm: mips.AMOVH,
27159 reg: regInfo{
27160 inputs: []inputInfo{
27161 {0, 469762046},
27162 },
27163 outputs: []outputInfo{
27164 {0, 335544318},
27165 },
27166 },
27167 },
27168 {
27169 name: "MOVHUreg",
27170 argLen: 1,
27171 asm: mips.AMOVHU,
27172 reg: regInfo{
27173 inputs: []inputInfo{
27174 {0, 469762046},
27175 },
27176 outputs: []outputInfo{
27177 {0, 335544318},
27178 },
27179 },
27180 },
27181 {
27182 name: "MOVWreg",
27183 argLen: 1,
27184 asm: mips.AMOVW,
27185 reg: regInfo{
27186 inputs: []inputInfo{
27187 {0, 469762046},
27188 },
27189 outputs: []outputInfo{
27190 {0, 335544318},
27191 },
27192 },
27193 },
27194 {
27195 name: "MOVWnop",
27196 argLen: 1,
27197 resultInArg0: true,
27198 reg: regInfo{
27199 inputs: []inputInfo{
27200 {0, 335544318},
27201 },
27202 outputs: []outputInfo{
27203 {0, 335544318},
27204 },
27205 },
27206 },
27207 {
27208 name: "CMOVZ",
27209 argLen: 3,
27210 resultInArg0: true,
27211 asm: mips.ACMOVZ,
27212 reg: regInfo{
27213 inputs: []inputInfo{
27214 {0, 335544318},
27215 {1, 335544318},
27216 {2, 335544318},
27217 },
27218 outputs: []outputInfo{
27219 {0, 335544318},
27220 },
27221 },
27222 },
27223 {
27224 name: "CMOVZzero",
27225 argLen: 2,
27226 resultInArg0: true,
27227 asm: mips.ACMOVZ,
27228 reg: regInfo{
27229 inputs: []inputInfo{
27230 {0, 335544318},
27231 {1, 469762046},
27232 },
27233 outputs: []outputInfo{
27234 {0, 335544318},
27235 },
27236 },
27237 },
27238 {
27239 name: "MOVWF",
27240 argLen: 1,
27241 asm: mips.AMOVWF,
27242 reg: regInfo{
27243 inputs: []inputInfo{
27244 {0, 35183835217920},
27245 },
27246 outputs: []outputInfo{
27247 {0, 35183835217920},
27248 },
27249 },
27250 },
27251 {
27252 name: "MOVWD",
27253 argLen: 1,
27254 asm: mips.AMOVWD,
27255 reg: regInfo{
27256 inputs: []inputInfo{
27257 {0, 35183835217920},
27258 },
27259 outputs: []outputInfo{
27260 {0, 35183835217920},
27261 },
27262 },
27263 },
27264 {
27265 name: "TRUNCFW",
27266 argLen: 1,
27267 asm: mips.ATRUNCFW,
27268 reg: regInfo{
27269 inputs: []inputInfo{
27270 {0, 35183835217920},
27271 },
27272 outputs: []outputInfo{
27273 {0, 35183835217920},
27274 },
27275 },
27276 },
27277 {
27278 name: "TRUNCDW",
27279 argLen: 1,
27280 asm: mips.ATRUNCDW,
27281 reg: regInfo{
27282 inputs: []inputInfo{
27283 {0, 35183835217920},
27284 },
27285 outputs: []outputInfo{
27286 {0, 35183835217920},
27287 },
27288 },
27289 },
27290 {
27291 name: "MOVFD",
27292 argLen: 1,
27293 asm: mips.AMOVFD,
27294 reg: regInfo{
27295 inputs: []inputInfo{
27296 {0, 35183835217920},
27297 },
27298 outputs: []outputInfo{
27299 {0, 35183835217920},
27300 },
27301 },
27302 },
27303 {
27304 name: "MOVDF",
27305 argLen: 1,
27306 asm: mips.AMOVDF,
27307 reg: regInfo{
27308 inputs: []inputInfo{
27309 {0, 35183835217920},
27310 },
27311 outputs: []outputInfo{
27312 {0, 35183835217920},
27313 },
27314 },
27315 },
27316 {
27317 name: "CALLstatic",
27318 auxType: auxCallOff,
27319 argLen: 1,
27320 clobberFlags: true,
27321 call: true,
27322 reg: regInfo{
27323 clobbers: 140737421246462,
27324 },
27325 },
27326 {
27327 name: "CALLtail",
27328 auxType: auxCallOff,
27329 argLen: 1,
27330 clobberFlags: true,
27331 call: true,
27332 tailCall: true,
27333 reg: regInfo{
27334 clobbers: 140737421246462,
27335 },
27336 },
27337 {
27338 name: "CALLclosure",
27339 auxType: auxCallOff,
27340 argLen: 3,
27341 clobberFlags: true,
27342 call: true,
27343 reg: regInfo{
27344 inputs: []inputInfo{
27345 {1, 4194304},
27346 {0, 402653182},
27347 },
27348 clobbers: 140737421246462,
27349 },
27350 },
27351 {
27352 name: "CALLinter",
27353 auxType: auxCallOff,
27354 argLen: 2,
27355 clobberFlags: true,
27356 call: true,
27357 reg: regInfo{
27358 inputs: []inputInfo{
27359 {0, 335544318},
27360 },
27361 clobbers: 140737421246462,
27362 },
27363 },
27364 {
27365 name: "LoweredAtomicLoad8",
27366 argLen: 2,
27367 faultOnNilArg0: true,
27368 reg: regInfo{
27369 inputs: []inputInfo{
27370 {0, 140738025226238},
27371 },
27372 outputs: []outputInfo{
27373 {0, 335544318},
27374 },
27375 },
27376 },
27377 {
27378 name: "LoweredAtomicLoad32",
27379 argLen: 2,
27380 faultOnNilArg0: true,
27381 reg: regInfo{
27382 inputs: []inputInfo{
27383 {0, 140738025226238},
27384 },
27385 outputs: []outputInfo{
27386 {0, 335544318},
27387 },
27388 },
27389 },
27390 {
27391 name: "LoweredAtomicStore8",
27392 argLen: 3,
27393 faultOnNilArg0: true,
27394 hasSideEffects: true,
27395 reg: regInfo{
27396 inputs: []inputInfo{
27397 {1, 469762046},
27398 {0, 140738025226238},
27399 },
27400 },
27401 },
27402 {
27403 name: "LoweredAtomicStore32",
27404 argLen: 3,
27405 faultOnNilArg0: true,
27406 hasSideEffects: true,
27407 reg: regInfo{
27408 inputs: []inputInfo{
27409 {1, 469762046},
27410 {0, 140738025226238},
27411 },
27412 },
27413 },
27414 {
27415 name: "LoweredAtomicStorezero",
27416 argLen: 2,
27417 faultOnNilArg0: true,
27418 hasSideEffects: true,
27419 reg: regInfo{
27420 inputs: []inputInfo{
27421 {0, 140738025226238},
27422 },
27423 },
27424 },
27425 {
27426 name: "LoweredAtomicExchange",
27427 argLen: 3,
27428 resultNotInArgs: true,
27429 faultOnNilArg0: true,
27430 hasSideEffects: true,
27431 unsafePoint: true,
27432 reg: regInfo{
27433 inputs: []inputInfo{
27434 {1, 469762046},
27435 {0, 140738025226238},
27436 },
27437 outputs: []outputInfo{
27438 {0, 335544318},
27439 },
27440 },
27441 },
27442 {
27443 name: "LoweredAtomicAdd",
27444 argLen: 3,
27445 resultNotInArgs: true,
27446 faultOnNilArg0: true,
27447 hasSideEffects: true,
27448 unsafePoint: true,
27449 reg: regInfo{
27450 inputs: []inputInfo{
27451 {1, 469762046},
27452 {0, 140738025226238},
27453 },
27454 outputs: []outputInfo{
27455 {0, 335544318},
27456 },
27457 },
27458 },
27459 {
27460 name: "LoweredAtomicAddconst",
27461 auxType: auxInt32,
27462 argLen: 2,
27463 resultNotInArgs: true,
27464 faultOnNilArg0: true,
27465 hasSideEffects: true,
27466 unsafePoint: true,
27467 reg: regInfo{
27468 inputs: []inputInfo{
27469 {0, 140738025226238},
27470 },
27471 outputs: []outputInfo{
27472 {0, 335544318},
27473 },
27474 },
27475 },
27476 {
27477 name: "LoweredAtomicCas",
27478 argLen: 4,
27479 resultNotInArgs: true,
27480 faultOnNilArg0: true,
27481 hasSideEffects: true,
27482 unsafePoint: true,
27483 reg: regInfo{
27484 inputs: []inputInfo{
27485 {1, 469762046},
27486 {2, 469762046},
27487 {0, 140738025226238},
27488 },
27489 outputs: []outputInfo{
27490 {0, 335544318},
27491 },
27492 },
27493 },
27494 {
27495 name: "LoweredAtomicAnd",
27496 argLen: 3,
27497 faultOnNilArg0: true,
27498 hasSideEffects: true,
27499 unsafePoint: true,
27500 asm: mips.AAND,
27501 reg: regInfo{
27502 inputs: []inputInfo{
27503 {1, 469762046},
27504 {0, 140738025226238},
27505 },
27506 },
27507 },
27508 {
27509 name: "LoweredAtomicOr",
27510 argLen: 3,
27511 faultOnNilArg0: true,
27512 hasSideEffects: true,
27513 unsafePoint: true,
27514 asm: mips.AOR,
27515 reg: regInfo{
27516 inputs: []inputInfo{
27517 {1, 469762046},
27518 {0, 140738025226238},
27519 },
27520 },
27521 },
27522 {
27523 name: "LoweredZero",
27524 auxType: auxInt32,
27525 argLen: 3,
27526 faultOnNilArg0: true,
27527 reg: regInfo{
27528 inputs: []inputInfo{
27529 {0, 2},
27530 {1, 335544318},
27531 },
27532 clobbers: 2,
27533 },
27534 },
27535 {
27536 name: "LoweredMove",
27537 auxType: auxInt32,
27538 argLen: 4,
27539 faultOnNilArg0: true,
27540 faultOnNilArg1: true,
27541 reg: regInfo{
27542 inputs: []inputInfo{
27543 {0, 4},
27544 {1, 2},
27545 {2, 335544318},
27546 },
27547 clobbers: 6,
27548 },
27549 },
27550 {
27551 name: "LoweredNilCheck",
27552 argLen: 2,
27553 nilCheck: true,
27554 faultOnNilArg0: true,
27555 reg: regInfo{
27556 inputs: []inputInfo{
27557 {0, 469762046},
27558 },
27559 },
27560 },
27561 {
27562 name: "FPFlagTrue",
27563 argLen: 1,
27564 reg: regInfo{
27565 outputs: []outputInfo{
27566 {0, 335544318},
27567 },
27568 },
27569 },
27570 {
27571 name: "FPFlagFalse",
27572 argLen: 1,
27573 reg: regInfo{
27574 outputs: []outputInfo{
27575 {0, 335544318},
27576 },
27577 },
27578 },
27579 {
27580 name: "LoweredGetClosurePtr",
27581 argLen: 0,
27582 zeroWidth: true,
27583 reg: regInfo{
27584 outputs: []outputInfo{
27585 {0, 4194304},
27586 },
27587 },
27588 },
27589 {
27590 name: "LoweredGetCallerSP",
27591 argLen: 1,
27592 rematerializeable: true,
27593 reg: regInfo{
27594 outputs: []outputInfo{
27595 {0, 335544318},
27596 },
27597 },
27598 },
27599 {
27600 name: "LoweredGetCallerPC",
27601 argLen: 0,
27602 rematerializeable: true,
27603 reg: regInfo{
27604 outputs: []outputInfo{
27605 {0, 335544318},
27606 },
27607 },
27608 },
27609 {
27610 name: "LoweredWB",
27611 auxType: auxInt64,
27612 argLen: 1,
27613 clobberFlags: true,
27614 reg: regInfo{
27615 clobbers: 140737219919872,
27616 outputs: []outputInfo{
27617 {0, 16777216},
27618 },
27619 },
27620 },
27621 {
27622 name: "LoweredPanicBoundsA",
27623 auxType: auxInt64,
27624 argLen: 3,
27625 call: true,
27626 reg: regInfo{
27627 inputs: []inputInfo{
27628 {0, 8},
27629 {1, 16},
27630 },
27631 },
27632 },
27633 {
27634 name: "LoweredPanicBoundsB",
27635 auxType: auxInt64,
27636 argLen: 3,
27637 call: true,
27638 reg: regInfo{
27639 inputs: []inputInfo{
27640 {0, 4},
27641 {1, 8},
27642 },
27643 },
27644 },
27645 {
27646 name: "LoweredPanicBoundsC",
27647 auxType: auxInt64,
27648 argLen: 3,
27649 call: true,
27650 reg: regInfo{
27651 inputs: []inputInfo{
27652 {0, 2},
27653 {1, 4},
27654 },
27655 },
27656 },
27657 {
27658 name: "LoweredPanicExtendA",
27659 auxType: auxInt64,
27660 argLen: 4,
27661 call: true,
27662 reg: regInfo{
27663 inputs: []inputInfo{
27664 {0, 32},
27665 {1, 8},
27666 {2, 16},
27667 },
27668 },
27669 },
27670 {
27671 name: "LoweredPanicExtendB",
27672 auxType: auxInt64,
27673 argLen: 4,
27674 call: true,
27675 reg: regInfo{
27676 inputs: []inputInfo{
27677 {0, 32},
27678 {1, 4},
27679 {2, 8},
27680 },
27681 },
27682 },
27683 {
27684 name: "LoweredPanicExtendC",
27685 auxType: auxInt64,
27686 argLen: 4,
27687 call: true,
27688 reg: regInfo{
27689 inputs: []inputInfo{
27690 {0, 32},
27691 {1, 2},
27692 {2, 4},
27693 },
27694 },
27695 },
27696
27697 {
27698 name: "ADDV",
27699 argLen: 2,
27700 commutative: true,
27701 asm: mips.AADDVU,
27702 reg: regInfo{
27703 inputs: []inputInfo{
27704 {0, 234881022},
27705 {1, 234881022},
27706 },
27707 outputs: []outputInfo{
27708 {0, 167772158},
27709 },
27710 },
27711 },
27712 {
27713 name: "ADDVconst",
27714 auxType: auxInt64,
27715 argLen: 1,
27716 asm: mips.AADDVU,
27717 reg: regInfo{
27718 inputs: []inputInfo{
27719 {0, 268435454},
27720 },
27721 outputs: []outputInfo{
27722 {0, 167772158},
27723 },
27724 },
27725 },
27726 {
27727 name: "SUBV",
27728 argLen: 2,
27729 asm: mips.ASUBVU,
27730 reg: regInfo{
27731 inputs: []inputInfo{
27732 {0, 234881022},
27733 {1, 234881022},
27734 },
27735 outputs: []outputInfo{
27736 {0, 167772158},
27737 },
27738 },
27739 },
27740 {
27741 name: "SUBVconst",
27742 auxType: auxInt64,
27743 argLen: 1,
27744 asm: mips.ASUBVU,
27745 reg: regInfo{
27746 inputs: []inputInfo{
27747 {0, 234881022},
27748 },
27749 outputs: []outputInfo{
27750 {0, 167772158},
27751 },
27752 },
27753 },
27754 {
27755 name: "MULV",
27756 argLen: 2,
27757 commutative: true,
27758 asm: mips.AMULV,
27759 reg: regInfo{
27760 inputs: []inputInfo{
27761 {0, 234881022},
27762 {1, 234881022},
27763 },
27764 outputs: []outputInfo{
27765 {0, 1152921504606846976},
27766 {1, 2305843009213693952},
27767 },
27768 },
27769 },
27770 {
27771 name: "MULVU",
27772 argLen: 2,
27773 commutative: true,
27774 asm: mips.AMULVU,
27775 reg: regInfo{
27776 inputs: []inputInfo{
27777 {0, 234881022},
27778 {1, 234881022},
27779 },
27780 outputs: []outputInfo{
27781 {0, 1152921504606846976},
27782 {1, 2305843009213693952},
27783 },
27784 },
27785 },
27786 {
27787 name: "DIVV",
27788 argLen: 2,
27789 asm: mips.ADIVV,
27790 reg: regInfo{
27791 inputs: []inputInfo{
27792 {0, 234881022},
27793 {1, 234881022},
27794 },
27795 outputs: []outputInfo{
27796 {0, 1152921504606846976},
27797 {1, 2305843009213693952},
27798 },
27799 },
27800 },
27801 {
27802 name: "DIVVU",
27803 argLen: 2,
27804 asm: mips.ADIVVU,
27805 reg: regInfo{
27806 inputs: []inputInfo{
27807 {0, 234881022},
27808 {1, 234881022},
27809 },
27810 outputs: []outputInfo{
27811 {0, 1152921504606846976},
27812 {1, 2305843009213693952},
27813 },
27814 },
27815 },
27816 {
27817 name: "ADDF",
27818 argLen: 2,
27819 commutative: true,
27820 asm: mips.AADDF,
27821 reg: regInfo{
27822 inputs: []inputInfo{
27823 {0, 1152921504338411520},
27824 {1, 1152921504338411520},
27825 },
27826 outputs: []outputInfo{
27827 {0, 1152921504338411520},
27828 },
27829 },
27830 },
27831 {
27832 name: "ADDD",
27833 argLen: 2,
27834 commutative: true,
27835 asm: mips.AADDD,
27836 reg: regInfo{
27837 inputs: []inputInfo{
27838 {0, 1152921504338411520},
27839 {1, 1152921504338411520},
27840 },
27841 outputs: []outputInfo{
27842 {0, 1152921504338411520},
27843 },
27844 },
27845 },
27846 {
27847 name: "SUBF",
27848 argLen: 2,
27849 asm: mips.ASUBF,
27850 reg: regInfo{
27851 inputs: []inputInfo{
27852 {0, 1152921504338411520},
27853 {1, 1152921504338411520},
27854 },
27855 outputs: []outputInfo{
27856 {0, 1152921504338411520},
27857 },
27858 },
27859 },
27860 {
27861 name: "SUBD",
27862 argLen: 2,
27863 asm: mips.ASUBD,
27864 reg: regInfo{
27865 inputs: []inputInfo{
27866 {0, 1152921504338411520},
27867 {1, 1152921504338411520},
27868 },
27869 outputs: []outputInfo{
27870 {0, 1152921504338411520},
27871 },
27872 },
27873 },
27874 {
27875 name: "MULF",
27876 argLen: 2,
27877 commutative: true,
27878 asm: mips.AMULF,
27879 reg: regInfo{
27880 inputs: []inputInfo{
27881 {0, 1152921504338411520},
27882 {1, 1152921504338411520},
27883 },
27884 outputs: []outputInfo{
27885 {0, 1152921504338411520},
27886 },
27887 },
27888 },
27889 {
27890 name: "MULD",
27891 argLen: 2,
27892 commutative: true,
27893 asm: mips.AMULD,
27894 reg: regInfo{
27895 inputs: []inputInfo{
27896 {0, 1152921504338411520},
27897 {1, 1152921504338411520},
27898 },
27899 outputs: []outputInfo{
27900 {0, 1152921504338411520},
27901 },
27902 },
27903 },
27904 {
27905 name: "DIVF",
27906 argLen: 2,
27907 asm: mips.ADIVF,
27908 reg: regInfo{
27909 inputs: []inputInfo{
27910 {0, 1152921504338411520},
27911 {1, 1152921504338411520},
27912 },
27913 outputs: []outputInfo{
27914 {0, 1152921504338411520},
27915 },
27916 },
27917 },
27918 {
27919 name: "DIVD",
27920 argLen: 2,
27921 asm: mips.ADIVD,
27922 reg: regInfo{
27923 inputs: []inputInfo{
27924 {0, 1152921504338411520},
27925 {1, 1152921504338411520},
27926 },
27927 outputs: []outputInfo{
27928 {0, 1152921504338411520},
27929 },
27930 },
27931 },
27932 {
27933 name: "AND",
27934 argLen: 2,
27935 commutative: true,
27936 asm: mips.AAND,
27937 reg: regInfo{
27938 inputs: []inputInfo{
27939 {0, 234881022},
27940 {1, 234881022},
27941 },
27942 outputs: []outputInfo{
27943 {0, 167772158},
27944 },
27945 },
27946 },
27947 {
27948 name: "ANDconst",
27949 auxType: auxInt64,
27950 argLen: 1,
27951 asm: mips.AAND,
27952 reg: regInfo{
27953 inputs: []inputInfo{
27954 {0, 234881022},
27955 },
27956 outputs: []outputInfo{
27957 {0, 167772158},
27958 },
27959 },
27960 },
27961 {
27962 name: "OR",
27963 argLen: 2,
27964 commutative: true,
27965 asm: mips.AOR,
27966 reg: regInfo{
27967 inputs: []inputInfo{
27968 {0, 234881022},
27969 {1, 234881022},
27970 },
27971 outputs: []outputInfo{
27972 {0, 167772158},
27973 },
27974 },
27975 },
27976 {
27977 name: "ORconst",
27978 auxType: auxInt64,
27979 argLen: 1,
27980 asm: mips.AOR,
27981 reg: regInfo{
27982 inputs: []inputInfo{
27983 {0, 234881022},
27984 },
27985 outputs: []outputInfo{
27986 {0, 167772158},
27987 },
27988 },
27989 },
27990 {
27991 name: "XOR",
27992 argLen: 2,
27993 commutative: true,
27994 asm: mips.AXOR,
27995 reg: regInfo{
27996 inputs: []inputInfo{
27997 {0, 234881022},
27998 {1, 234881022},
27999 },
28000 outputs: []outputInfo{
28001 {0, 167772158},
28002 },
28003 },
28004 },
28005 {
28006 name: "XORconst",
28007 auxType: auxInt64,
28008 argLen: 1,
28009 asm: mips.AXOR,
28010 reg: regInfo{
28011 inputs: []inputInfo{
28012 {0, 234881022},
28013 },
28014 outputs: []outputInfo{
28015 {0, 167772158},
28016 },
28017 },
28018 },
28019 {
28020 name: "NOR",
28021 argLen: 2,
28022 commutative: true,
28023 asm: mips.ANOR,
28024 reg: regInfo{
28025 inputs: []inputInfo{
28026 {0, 234881022},
28027 {1, 234881022},
28028 },
28029 outputs: []outputInfo{
28030 {0, 167772158},
28031 },
28032 },
28033 },
28034 {
28035 name: "NORconst",
28036 auxType: auxInt64,
28037 argLen: 1,
28038 asm: mips.ANOR,
28039 reg: regInfo{
28040 inputs: []inputInfo{
28041 {0, 234881022},
28042 },
28043 outputs: []outputInfo{
28044 {0, 167772158},
28045 },
28046 },
28047 },
28048 {
28049 name: "NEGV",
28050 argLen: 1,
28051 reg: regInfo{
28052 inputs: []inputInfo{
28053 {0, 234881022},
28054 },
28055 outputs: []outputInfo{
28056 {0, 167772158},
28057 },
28058 },
28059 },
28060 {
28061 name: "NEGF",
28062 argLen: 1,
28063 asm: mips.ANEGF,
28064 reg: regInfo{
28065 inputs: []inputInfo{
28066 {0, 1152921504338411520},
28067 },
28068 outputs: []outputInfo{
28069 {0, 1152921504338411520},
28070 },
28071 },
28072 },
28073 {
28074 name: "NEGD",
28075 argLen: 1,
28076 asm: mips.ANEGD,
28077 reg: regInfo{
28078 inputs: []inputInfo{
28079 {0, 1152921504338411520},
28080 },
28081 outputs: []outputInfo{
28082 {0, 1152921504338411520},
28083 },
28084 },
28085 },
28086 {
28087 name: "ABSD",
28088 argLen: 1,
28089 asm: mips.AABSD,
28090 reg: regInfo{
28091 inputs: []inputInfo{
28092 {0, 1152921504338411520},
28093 },
28094 outputs: []outputInfo{
28095 {0, 1152921504338411520},
28096 },
28097 },
28098 },
28099 {
28100 name: "SQRTD",
28101 argLen: 1,
28102 asm: mips.ASQRTD,
28103 reg: regInfo{
28104 inputs: []inputInfo{
28105 {0, 1152921504338411520},
28106 },
28107 outputs: []outputInfo{
28108 {0, 1152921504338411520},
28109 },
28110 },
28111 },
28112 {
28113 name: "SQRTF",
28114 argLen: 1,
28115 asm: mips.ASQRTF,
28116 reg: regInfo{
28117 inputs: []inputInfo{
28118 {0, 1152921504338411520},
28119 },
28120 outputs: []outputInfo{
28121 {0, 1152921504338411520},
28122 },
28123 },
28124 },
28125 {
28126 name: "SLLV",
28127 argLen: 2,
28128 asm: mips.ASLLV,
28129 reg: regInfo{
28130 inputs: []inputInfo{
28131 {0, 234881022},
28132 {1, 234881022},
28133 },
28134 outputs: []outputInfo{
28135 {0, 167772158},
28136 },
28137 },
28138 },
28139 {
28140 name: "SLLVconst",
28141 auxType: auxInt64,
28142 argLen: 1,
28143 asm: mips.ASLLV,
28144 reg: regInfo{
28145 inputs: []inputInfo{
28146 {0, 234881022},
28147 },
28148 outputs: []outputInfo{
28149 {0, 167772158},
28150 },
28151 },
28152 },
28153 {
28154 name: "SRLV",
28155 argLen: 2,
28156 asm: mips.ASRLV,
28157 reg: regInfo{
28158 inputs: []inputInfo{
28159 {0, 234881022},
28160 {1, 234881022},
28161 },
28162 outputs: []outputInfo{
28163 {0, 167772158},
28164 },
28165 },
28166 },
28167 {
28168 name: "SRLVconst",
28169 auxType: auxInt64,
28170 argLen: 1,
28171 asm: mips.ASRLV,
28172 reg: regInfo{
28173 inputs: []inputInfo{
28174 {0, 234881022},
28175 },
28176 outputs: []outputInfo{
28177 {0, 167772158},
28178 },
28179 },
28180 },
28181 {
28182 name: "SRAV",
28183 argLen: 2,
28184 asm: mips.ASRAV,
28185 reg: regInfo{
28186 inputs: []inputInfo{
28187 {0, 234881022},
28188 {1, 234881022},
28189 },
28190 outputs: []outputInfo{
28191 {0, 167772158},
28192 },
28193 },
28194 },
28195 {
28196 name: "SRAVconst",
28197 auxType: auxInt64,
28198 argLen: 1,
28199 asm: mips.ASRAV,
28200 reg: regInfo{
28201 inputs: []inputInfo{
28202 {0, 234881022},
28203 },
28204 outputs: []outputInfo{
28205 {0, 167772158},
28206 },
28207 },
28208 },
28209 {
28210 name: "SGT",
28211 argLen: 2,
28212 asm: mips.ASGT,
28213 reg: regInfo{
28214 inputs: []inputInfo{
28215 {0, 234881022},
28216 {1, 234881022},
28217 },
28218 outputs: []outputInfo{
28219 {0, 167772158},
28220 },
28221 },
28222 },
28223 {
28224 name: "SGTconst",
28225 auxType: auxInt64,
28226 argLen: 1,
28227 asm: mips.ASGT,
28228 reg: regInfo{
28229 inputs: []inputInfo{
28230 {0, 234881022},
28231 },
28232 outputs: []outputInfo{
28233 {0, 167772158},
28234 },
28235 },
28236 },
28237 {
28238 name: "SGTU",
28239 argLen: 2,
28240 asm: mips.ASGTU,
28241 reg: regInfo{
28242 inputs: []inputInfo{
28243 {0, 234881022},
28244 {1, 234881022},
28245 },
28246 outputs: []outputInfo{
28247 {0, 167772158},
28248 },
28249 },
28250 },
28251 {
28252 name: "SGTUconst",
28253 auxType: auxInt64,
28254 argLen: 1,
28255 asm: mips.ASGTU,
28256 reg: regInfo{
28257 inputs: []inputInfo{
28258 {0, 234881022},
28259 },
28260 outputs: []outputInfo{
28261 {0, 167772158},
28262 },
28263 },
28264 },
28265 {
28266 name: "CMPEQF",
28267 argLen: 2,
28268 asm: mips.ACMPEQF,
28269 reg: regInfo{
28270 inputs: []inputInfo{
28271 {0, 1152921504338411520},
28272 {1, 1152921504338411520},
28273 },
28274 },
28275 },
28276 {
28277 name: "CMPEQD",
28278 argLen: 2,
28279 asm: mips.ACMPEQD,
28280 reg: regInfo{
28281 inputs: []inputInfo{
28282 {0, 1152921504338411520},
28283 {1, 1152921504338411520},
28284 },
28285 },
28286 },
28287 {
28288 name: "CMPGEF",
28289 argLen: 2,
28290 asm: mips.ACMPGEF,
28291 reg: regInfo{
28292 inputs: []inputInfo{
28293 {0, 1152921504338411520},
28294 {1, 1152921504338411520},
28295 },
28296 },
28297 },
28298 {
28299 name: "CMPGED",
28300 argLen: 2,
28301 asm: mips.ACMPGED,
28302 reg: regInfo{
28303 inputs: []inputInfo{
28304 {0, 1152921504338411520},
28305 {1, 1152921504338411520},
28306 },
28307 },
28308 },
28309 {
28310 name: "CMPGTF",
28311 argLen: 2,
28312 asm: mips.ACMPGTF,
28313 reg: regInfo{
28314 inputs: []inputInfo{
28315 {0, 1152921504338411520},
28316 {1, 1152921504338411520},
28317 },
28318 },
28319 },
28320 {
28321 name: "CMPGTD",
28322 argLen: 2,
28323 asm: mips.ACMPGTD,
28324 reg: regInfo{
28325 inputs: []inputInfo{
28326 {0, 1152921504338411520},
28327 {1, 1152921504338411520},
28328 },
28329 },
28330 },
28331 {
28332 name: "MOVVconst",
28333 auxType: auxInt64,
28334 argLen: 0,
28335 rematerializeable: true,
28336 asm: mips.AMOVV,
28337 reg: regInfo{
28338 outputs: []outputInfo{
28339 {0, 167772158},
28340 },
28341 },
28342 },
28343 {
28344 name: "MOVFconst",
28345 auxType: auxFloat64,
28346 argLen: 0,
28347 rematerializeable: true,
28348 asm: mips.AMOVF,
28349 reg: regInfo{
28350 outputs: []outputInfo{
28351 {0, 1152921504338411520},
28352 },
28353 },
28354 },
28355 {
28356 name: "MOVDconst",
28357 auxType: auxFloat64,
28358 argLen: 0,
28359 rematerializeable: true,
28360 asm: mips.AMOVD,
28361 reg: regInfo{
28362 outputs: []outputInfo{
28363 {0, 1152921504338411520},
28364 },
28365 },
28366 },
28367 {
28368 name: "MOVVaddr",
28369 auxType: auxSymOff,
28370 argLen: 1,
28371 rematerializeable: true,
28372 symEffect: SymAddr,
28373 asm: mips.AMOVV,
28374 reg: regInfo{
28375 inputs: []inputInfo{
28376 {0, 4611686018460942336},
28377 },
28378 outputs: []outputInfo{
28379 {0, 167772158},
28380 },
28381 },
28382 },
28383 {
28384 name: "MOVBload",
28385 auxType: auxSymOff,
28386 argLen: 2,
28387 faultOnNilArg0: true,
28388 symEffect: SymRead,
28389 asm: mips.AMOVB,
28390 reg: regInfo{
28391 inputs: []inputInfo{
28392 {0, 4611686018695823358},
28393 },
28394 outputs: []outputInfo{
28395 {0, 167772158},
28396 },
28397 },
28398 },
28399 {
28400 name: "MOVBUload",
28401 auxType: auxSymOff,
28402 argLen: 2,
28403 faultOnNilArg0: true,
28404 symEffect: SymRead,
28405 asm: mips.AMOVBU,
28406 reg: regInfo{
28407 inputs: []inputInfo{
28408 {0, 4611686018695823358},
28409 },
28410 outputs: []outputInfo{
28411 {0, 167772158},
28412 },
28413 },
28414 },
28415 {
28416 name: "MOVHload",
28417 auxType: auxSymOff,
28418 argLen: 2,
28419 faultOnNilArg0: true,
28420 symEffect: SymRead,
28421 asm: mips.AMOVH,
28422 reg: regInfo{
28423 inputs: []inputInfo{
28424 {0, 4611686018695823358},
28425 },
28426 outputs: []outputInfo{
28427 {0, 167772158},
28428 },
28429 },
28430 },
28431 {
28432 name: "MOVHUload",
28433 auxType: auxSymOff,
28434 argLen: 2,
28435 faultOnNilArg0: true,
28436 symEffect: SymRead,
28437 asm: mips.AMOVHU,
28438 reg: regInfo{
28439 inputs: []inputInfo{
28440 {0, 4611686018695823358},
28441 },
28442 outputs: []outputInfo{
28443 {0, 167772158},
28444 },
28445 },
28446 },
28447 {
28448 name: "MOVWload",
28449 auxType: auxSymOff,
28450 argLen: 2,
28451 faultOnNilArg0: true,
28452 symEffect: SymRead,
28453 asm: mips.AMOVW,
28454 reg: regInfo{
28455 inputs: []inputInfo{
28456 {0, 4611686018695823358},
28457 },
28458 outputs: []outputInfo{
28459 {0, 167772158},
28460 },
28461 },
28462 },
28463 {
28464 name: "MOVWUload",
28465 auxType: auxSymOff,
28466 argLen: 2,
28467 faultOnNilArg0: true,
28468 symEffect: SymRead,
28469 asm: mips.AMOVWU,
28470 reg: regInfo{
28471 inputs: []inputInfo{
28472 {0, 4611686018695823358},
28473 },
28474 outputs: []outputInfo{
28475 {0, 167772158},
28476 },
28477 },
28478 },
28479 {
28480 name: "MOVVload",
28481 auxType: auxSymOff,
28482 argLen: 2,
28483 faultOnNilArg0: true,
28484 symEffect: SymRead,
28485 asm: mips.AMOVV,
28486 reg: regInfo{
28487 inputs: []inputInfo{
28488 {0, 4611686018695823358},
28489 },
28490 outputs: []outputInfo{
28491 {0, 167772158},
28492 },
28493 },
28494 },
28495 {
28496 name: "MOVFload",
28497 auxType: auxSymOff,
28498 argLen: 2,
28499 faultOnNilArg0: true,
28500 symEffect: SymRead,
28501 asm: mips.AMOVF,
28502 reg: regInfo{
28503 inputs: []inputInfo{
28504 {0, 4611686018695823358},
28505 },
28506 outputs: []outputInfo{
28507 {0, 1152921504338411520},
28508 },
28509 },
28510 },
28511 {
28512 name: "MOVDload",
28513 auxType: auxSymOff,
28514 argLen: 2,
28515 faultOnNilArg0: true,
28516 symEffect: SymRead,
28517 asm: mips.AMOVD,
28518 reg: regInfo{
28519 inputs: []inputInfo{
28520 {0, 4611686018695823358},
28521 },
28522 outputs: []outputInfo{
28523 {0, 1152921504338411520},
28524 },
28525 },
28526 },
28527 {
28528 name: "MOVBstore",
28529 auxType: auxSymOff,
28530 argLen: 3,
28531 faultOnNilArg0: true,
28532 symEffect: SymWrite,
28533 asm: mips.AMOVB,
28534 reg: regInfo{
28535 inputs: []inputInfo{
28536 {1, 234881022},
28537 {0, 4611686018695823358},
28538 },
28539 },
28540 },
28541 {
28542 name: "MOVHstore",
28543 auxType: auxSymOff,
28544 argLen: 3,
28545 faultOnNilArg0: true,
28546 symEffect: SymWrite,
28547 asm: mips.AMOVH,
28548 reg: regInfo{
28549 inputs: []inputInfo{
28550 {1, 234881022},
28551 {0, 4611686018695823358},
28552 },
28553 },
28554 },
28555 {
28556 name: "MOVWstore",
28557 auxType: auxSymOff,
28558 argLen: 3,
28559 faultOnNilArg0: true,
28560 symEffect: SymWrite,
28561 asm: mips.AMOVW,
28562 reg: regInfo{
28563 inputs: []inputInfo{
28564 {1, 234881022},
28565 {0, 4611686018695823358},
28566 },
28567 },
28568 },
28569 {
28570 name: "MOVVstore",
28571 auxType: auxSymOff,
28572 argLen: 3,
28573 faultOnNilArg0: true,
28574 symEffect: SymWrite,
28575 asm: mips.AMOVV,
28576 reg: regInfo{
28577 inputs: []inputInfo{
28578 {1, 234881022},
28579 {0, 4611686018695823358},
28580 },
28581 },
28582 },
28583 {
28584 name: "MOVFstore",
28585 auxType: auxSymOff,
28586 argLen: 3,
28587 faultOnNilArg0: true,
28588 symEffect: SymWrite,
28589 asm: mips.AMOVF,
28590 reg: regInfo{
28591 inputs: []inputInfo{
28592 {0, 4611686018695823358},
28593 {1, 1152921504338411520},
28594 },
28595 },
28596 },
28597 {
28598 name: "MOVDstore",
28599 auxType: auxSymOff,
28600 argLen: 3,
28601 faultOnNilArg0: true,
28602 symEffect: SymWrite,
28603 asm: mips.AMOVD,
28604 reg: regInfo{
28605 inputs: []inputInfo{
28606 {0, 4611686018695823358},
28607 {1, 1152921504338411520},
28608 },
28609 },
28610 },
28611 {
28612 name: "MOVBstorezero",
28613 auxType: auxSymOff,
28614 argLen: 2,
28615 faultOnNilArg0: true,
28616 symEffect: SymWrite,
28617 asm: mips.AMOVB,
28618 reg: regInfo{
28619 inputs: []inputInfo{
28620 {0, 4611686018695823358},
28621 },
28622 },
28623 },
28624 {
28625 name: "MOVHstorezero",
28626 auxType: auxSymOff,
28627 argLen: 2,
28628 faultOnNilArg0: true,
28629 symEffect: SymWrite,
28630 asm: mips.AMOVH,
28631 reg: regInfo{
28632 inputs: []inputInfo{
28633 {0, 4611686018695823358},
28634 },
28635 },
28636 },
28637 {
28638 name: "MOVWstorezero",
28639 auxType: auxSymOff,
28640 argLen: 2,
28641 faultOnNilArg0: true,
28642 symEffect: SymWrite,
28643 asm: mips.AMOVW,
28644 reg: regInfo{
28645 inputs: []inputInfo{
28646 {0, 4611686018695823358},
28647 },
28648 },
28649 },
28650 {
28651 name: "MOVVstorezero",
28652 auxType: auxSymOff,
28653 argLen: 2,
28654 faultOnNilArg0: true,
28655 symEffect: SymWrite,
28656 asm: mips.AMOVV,
28657 reg: regInfo{
28658 inputs: []inputInfo{
28659 {0, 4611686018695823358},
28660 },
28661 },
28662 },
28663 {
28664 name: "MOVWfpgp",
28665 argLen: 1,
28666 asm: mips.AMOVW,
28667 reg: regInfo{
28668 inputs: []inputInfo{
28669 {0, 1152921504338411520},
28670 },
28671 outputs: []outputInfo{
28672 {0, 167772158},
28673 },
28674 },
28675 },
28676 {
28677 name: "MOVWgpfp",
28678 argLen: 1,
28679 asm: mips.AMOVW,
28680 reg: regInfo{
28681 inputs: []inputInfo{
28682 {0, 167772158},
28683 },
28684 outputs: []outputInfo{
28685 {0, 1152921504338411520},
28686 },
28687 },
28688 },
28689 {
28690 name: "MOVVfpgp",
28691 argLen: 1,
28692 asm: mips.AMOVV,
28693 reg: regInfo{
28694 inputs: []inputInfo{
28695 {0, 1152921504338411520},
28696 },
28697 outputs: []outputInfo{
28698 {0, 167772158},
28699 },
28700 },
28701 },
28702 {
28703 name: "MOVVgpfp",
28704 argLen: 1,
28705 asm: mips.AMOVV,
28706 reg: regInfo{
28707 inputs: []inputInfo{
28708 {0, 167772158},
28709 },
28710 outputs: []outputInfo{
28711 {0, 1152921504338411520},
28712 },
28713 },
28714 },
28715 {
28716 name: "MOVBreg",
28717 argLen: 1,
28718 asm: mips.AMOVB,
28719 reg: regInfo{
28720 inputs: []inputInfo{
28721 {0, 234881022},
28722 },
28723 outputs: []outputInfo{
28724 {0, 167772158},
28725 },
28726 },
28727 },
28728 {
28729 name: "MOVBUreg",
28730 argLen: 1,
28731 asm: mips.AMOVBU,
28732 reg: regInfo{
28733 inputs: []inputInfo{
28734 {0, 234881022},
28735 },
28736 outputs: []outputInfo{
28737 {0, 167772158},
28738 },
28739 },
28740 },
28741 {
28742 name: "MOVHreg",
28743 argLen: 1,
28744 asm: mips.AMOVH,
28745 reg: regInfo{
28746 inputs: []inputInfo{
28747 {0, 234881022},
28748 },
28749 outputs: []outputInfo{
28750 {0, 167772158},
28751 },
28752 },
28753 },
28754 {
28755 name: "MOVHUreg",
28756 argLen: 1,
28757 asm: mips.AMOVHU,
28758 reg: regInfo{
28759 inputs: []inputInfo{
28760 {0, 234881022},
28761 },
28762 outputs: []outputInfo{
28763 {0, 167772158},
28764 },
28765 },
28766 },
28767 {
28768 name: "MOVWreg",
28769 argLen: 1,
28770 asm: mips.AMOVW,
28771 reg: regInfo{
28772 inputs: []inputInfo{
28773 {0, 234881022},
28774 },
28775 outputs: []outputInfo{
28776 {0, 167772158},
28777 },
28778 },
28779 },
28780 {
28781 name: "MOVWUreg",
28782 argLen: 1,
28783 asm: mips.AMOVWU,
28784 reg: regInfo{
28785 inputs: []inputInfo{
28786 {0, 234881022},
28787 },
28788 outputs: []outputInfo{
28789 {0, 167772158},
28790 },
28791 },
28792 },
28793 {
28794 name: "MOVVreg",
28795 argLen: 1,
28796 asm: mips.AMOVV,
28797 reg: regInfo{
28798 inputs: []inputInfo{
28799 {0, 234881022},
28800 },
28801 outputs: []outputInfo{
28802 {0, 167772158},
28803 },
28804 },
28805 },
28806 {
28807 name: "MOVVnop",
28808 argLen: 1,
28809 resultInArg0: true,
28810 reg: regInfo{
28811 inputs: []inputInfo{
28812 {0, 167772158},
28813 },
28814 outputs: []outputInfo{
28815 {0, 167772158},
28816 },
28817 },
28818 },
28819 {
28820 name: "MOVWF",
28821 argLen: 1,
28822 asm: mips.AMOVWF,
28823 reg: regInfo{
28824 inputs: []inputInfo{
28825 {0, 1152921504338411520},
28826 },
28827 outputs: []outputInfo{
28828 {0, 1152921504338411520},
28829 },
28830 },
28831 },
28832 {
28833 name: "MOVWD",
28834 argLen: 1,
28835 asm: mips.AMOVWD,
28836 reg: regInfo{
28837 inputs: []inputInfo{
28838 {0, 1152921504338411520},
28839 },
28840 outputs: []outputInfo{
28841 {0, 1152921504338411520},
28842 },
28843 },
28844 },
28845 {
28846 name: "MOVVF",
28847 argLen: 1,
28848 asm: mips.AMOVVF,
28849 reg: regInfo{
28850 inputs: []inputInfo{
28851 {0, 1152921504338411520},
28852 },
28853 outputs: []outputInfo{
28854 {0, 1152921504338411520},
28855 },
28856 },
28857 },
28858 {
28859 name: "MOVVD",
28860 argLen: 1,
28861 asm: mips.AMOVVD,
28862 reg: regInfo{
28863 inputs: []inputInfo{
28864 {0, 1152921504338411520},
28865 },
28866 outputs: []outputInfo{
28867 {0, 1152921504338411520},
28868 },
28869 },
28870 },
28871 {
28872 name: "TRUNCFW",
28873 argLen: 1,
28874 asm: mips.ATRUNCFW,
28875 reg: regInfo{
28876 inputs: []inputInfo{
28877 {0, 1152921504338411520},
28878 },
28879 outputs: []outputInfo{
28880 {0, 1152921504338411520},
28881 },
28882 },
28883 },
28884 {
28885 name: "TRUNCDW",
28886 argLen: 1,
28887 asm: mips.ATRUNCDW,
28888 reg: regInfo{
28889 inputs: []inputInfo{
28890 {0, 1152921504338411520},
28891 },
28892 outputs: []outputInfo{
28893 {0, 1152921504338411520},
28894 },
28895 },
28896 },
28897 {
28898 name: "TRUNCFV",
28899 argLen: 1,
28900 asm: mips.ATRUNCFV,
28901 reg: regInfo{
28902 inputs: []inputInfo{
28903 {0, 1152921504338411520},
28904 },
28905 outputs: []outputInfo{
28906 {0, 1152921504338411520},
28907 },
28908 },
28909 },
28910 {
28911 name: "TRUNCDV",
28912 argLen: 1,
28913 asm: mips.ATRUNCDV,
28914 reg: regInfo{
28915 inputs: []inputInfo{
28916 {0, 1152921504338411520},
28917 },
28918 outputs: []outputInfo{
28919 {0, 1152921504338411520},
28920 },
28921 },
28922 },
28923 {
28924 name: "MOVFD",
28925 argLen: 1,
28926 asm: mips.AMOVFD,
28927 reg: regInfo{
28928 inputs: []inputInfo{
28929 {0, 1152921504338411520},
28930 },
28931 outputs: []outputInfo{
28932 {0, 1152921504338411520},
28933 },
28934 },
28935 },
28936 {
28937 name: "MOVDF",
28938 argLen: 1,
28939 asm: mips.AMOVDF,
28940 reg: regInfo{
28941 inputs: []inputInfo{
28942 {0, 1152921504338411520},
28943 },
28944 outputs: []outputInfo{
28945 {0, 1152921504338411520},
28946 },
28947 },
28948 },
28949 {
28950 name: "CALLstatic",
28951 auxType: auxCallOff,
28952 argLen: 1,
28953 clobberFlags: true,
28954 call: true,
28955 reg: regInfo{
28956 clobbers: 4611686018393833470,
28957 },
28958 },
28959 {
28960 name: "CALLtail",
28961 auxType: auxCallOff,
28962 argLen: 1,
28963 clobberFlags: true,
28964 call: true,
28965 tailCall: true,
28966 reg: regInfo{
28967 clobbers: 4611686018393833470,
28968 },
28969 },
28970 {
28971 name: "CALLclosure",
28972 auxType: auxCallOff,
28973 argLen: 3,
28974 clobberFlags: true,
28975 call: true,
28976 reg: regInfo{
28977 inputs: []inputInfo{
28978 {1, 4194304},
28979 {0, 201326590},
28980 },
28981 clobbers: 4611686018393833470,
28982 },
28983 },
28984 {
28985 name: "CALLinter",
28986 auxType: auxCallOff,
28987 argLen: 2,
28988 clobberFlags: true,
28989 call: true,
28990 reg: regInfo{
28991 inputs: []inputInfo{
28992 {0, 167772158},
28993 },
28994 clobbers: 4611686018393833470,
28995 },
28996 },
28997 {
28998 name: "DUFFZERO",
28999 auxType: auxInt64,
29000 argLen: 2,
29001 faultOnNilArg0: true,
29002 reg: regInfo{
29003 inputs: []inputInfo{
29004 {0, 167772158},
29005 },
29006 clobbers: 134217730,
29007 },
29008 },
29009 {
29010 name: "DUFFCOPY",
29011 auxType: auxInt64,
29012 argLen: 3,
29013 faultOnNilArg0: true,
29014 faultOnNilArg1: true,
29015 reg: regInfo{
29016 inputs: []inputInfo{
29017 {0, 4},
29018 {1, 2},
29019 },
29020 clobbers: 134217734,
29021 },
29022 },
29023 {
29024 name: "LoweredZero",
29025 auxType: auxInt64,
29026 argLen: 3,
29027 clobberFlags: true,
29028 faultOnNilArg0: true,
29029 reg: regInfo{
29030 inputs: []inputInfo{
29031 {0, 2},
29032 {1, 167772158},
29033 },
29034 clobbers: 2,
29035 },
29036 },
29037 {
29038 name: "LoweredMove",
29039 auxType: auxInt64,
29040 argLen: 4,
29041 clobberFlags: true,
29042 faultOnNilArg0: true,
29043 faultOnNilArg1: true,
29044 reg: regInfo{
29045 inputs: []inputInfo{
29046 {0, 4},
29047 {1, 2},
29048 {2, 167772158},
29049 },
29050 clobbers: 6,
29051 },
29052 },
29053 {
29054 name: "LoweredAtomicAnd32",
29055 argLen: 3,
29056 faultOnNilArg0: true,
29057 hasSideEffects: true,
29058 unsafePoint: true,
29059 asm: mips.AAND,
29060 reg: regInfo{
29061 inputs: []inputInfo{
29062 {1, 234881022},
29063 {0, 4611686018695823358},
29064 },
29065 },
29066 },
29067 {
29068 name: "LoweredAtomicOr32",
29069 argLen: 3,
29070 faultOnNilArg0: true,
29071 hasSideEffects: true,
29072 unsafePoint: true,
29073 asm: mips.AOR,
29074 reg: regInfo{
29075 inputs: []inputInfo{
29076 {1, 234881022},
29077 {0, 4611686018695823358},
29078 },
29079 },
29080 },
29081 {
29082 name: "LoweredAtomicLoad8",
29083 argLen: 2,
29084 faultOnNilArg0: true,
29085 reg: regInfo{
29086 inputs: []inputInfo{
29087 {0, 4611686018695823358},
29088 },
29089 outputs: []outputInfo{
29090 {0, 167772158},
29091 },
29092 },
29093 },
29094 {
29095 name: "LoweredAtomicLoad32",
29096 argLen: 2,
29097 faultOnNilArg0: true,
29098 reg: regInfo{
29099 inputs: []inputInfo{
29100 {0, 4611686018695823358},
29101 },
29102 outputs: []outputInfo{
29103 {0, 167772158},
29104 },
29105 },
29106 },
29107 {
29108 name: "LoweredAtomicLoad64",
29109 argLen: 2,
29110 faultOnNilArg0: true,
29111 reg: regInfo{
29112 inputs: []inputInfo{
29113 {0, 4611686018695823358},
29114 },
29115 outputs: []outputInfo{
29116 {0, 167772158},
29117 },
29118 },
29119 },
29120 {
29121 name: "LoweredAtomicStore8",
29122 argLen: 3,
29123 faultOnNilArg0: true,
29124 hasSideEffects: true,
29125 reg: regInfo{
29126 inputs: []inputInfo{
29127 {1, 234881022},
29128 {0, 4611686018695823358},
29129 },
29130 },
29131 },
29132 {
29133 name: "LoweredAtomicStore32",
29134 argLen: 3,
29135 faultOnNilArg0: true,
29136 hasSideEffects: true,
29137 reg: regInfo{
29138 inputs: []inputInfo{
29139 {1, 234881022},
29140 {0, 4611686018695823358},
29141 },
29142 },
29143 },
29144 {
29145 name: "LoweredAtomicStore64",
29146 argLen: 3,
29147 faultOnNilArg0: true,
29148 hasSideEffects: true,
29149 reg: regInfo{
29150 inputs: []inputInfo{
29151 {1, 234881022},
29152 {0, 4611686018695823358},
29153 },
29154 },
29155 },
29156 {
29157 name: "LoweredAtomicStorezero32",
29158 argLen: 2,
29159 faultOnNilArg0: true,
29160 hasSideEffects: true,
29161 reg: regInfo{
29162 inputs: []inputInfo{
29163 {0, 4611686018695823358},
29164 },
29165 },
29166 },
29167 {
29168 name: "LoweredAtomicStorezero64",
29169 argLen: 2,
29170 faultOnNilArg0: true,
29171 hasSideEffects: true,
29172 reg: regInfo{
29173 inputs: []inputInfo{
29174 {0, 4611686018695823358},
29175 },
29176 },
29177 },
29178 {
29179 name: "LoweredAtomicExchange32",
29180 argLen: 3,
29181 resultNotInArgs: true,
29182 faultOnNilArg0: true,
29183 hasSideEffects: true,
29184 unsafePoint: true,
29185 reg: regInfo{
29186 inputs: []inputInfo{
29187 {1, 234881022},
29188 {0, 4611686018695823358},
29189 },
29190 outputs: []outputInfo{
29191 {0, 167772158},
29192 },
29193 },
29194 },
29195 {
29196 name: "LoweredAtomicExchange64",
29197 argLen: 3,
29198 resultNotInArgs: true,
29199 faultOnNilArg0: true,
29200 hasSideEffects: true,
29201 unsafePoint: true,
29202 reg: regInfo{
29203 inputs: []inputInfo{
29204 {1, 234881022},
29205 {0, 4611686018695823358},
29206 },
29207 outputs: []outputInfo{
29208 {0, 167772158},
29209 },
29210 },
29211 },
29212 {
29213 name: "LoweredAtomicAdd32",
29214 argLen: 3,
29215 resultNotInArgs: true,
29216 faultOnNilArg0: true,
29217 hasSideEffects: true,
29218 unsafePoint: true,
29219 reg: regInfo{
29220 inputs: []inputInfo{
29221 {1, 234881022},
29222 {0, 4611686018695823358},
29223 },
29224 outputs: []outputInfo{
29225 {0, 167772158},
29226 },
29227 },
29228 },
29229 {
29230 name: "LoweredAtomicAdd64",
29231 argLen: 3,
29232 resultNotInArgs: true,
29233 faultOnNilArg0: true,
29234 hasSideEffects: true,
29235 unsafePoint: true,
29236 reg: regInfo{
29237 inputs: []inputInfo{
29238 {1, 234881022},
29239 {0, 4611686018695823358},
29240 },
29241 outputs: []outputInfo{
29242 {0, 167772158},
29243 },
29244 },
29245 },
29246 {
29247 name: "LoweredAtomicAddconst32",
29248 auxType: auxInt32,
29249 argLen: 2,
29250 resultNotInArgs: true,
29251 faultOnNilArg0: true,
29252 hasSideEffects: true,
29253 unsafePoint: true,
29254 reg: regInfo{
29255 inputs: []inputInfo{
29256 {0, 4611686018695823358},
29257 },
29258 outputs: []outputInfo{
29259 {0, 167772158},
29260 },
29261 },
29262 },
29263 {
29264 name: "LoweredAtomicAddconst64",
29265 auxType: auxInt64,
29266 argLen: 2,
29267 resultNotInArgs: true,
29268 faultOnNilArg0: true,
29269 hasSideEffects: true,
29270 unsafePoint: true,
29271 reg: regInfo{
29272 inputs: []inputInfo{
29273 {0, 4611686018695823358},
29274 },
29275 outputs: []outputInfo{
29276 {0, 167772158},
29277 },
29278 },
29279 },
29280 {
29281 name: "LoweredAtomicCas32",
29282 argLen: 4,
29283 resultNotInArgs: true,
29284 faultOnNilArg0: true,
29285 hasSideEffects: true,
29286 unsafePoint: true,
29287 reg: regInfo{
29288 inputs: []inputInfo{
29289 {1, 234881022},
29290 {2, 234881022},
29291 {0, 4611686018695823358},
29292 },
29293 outputs: []outputInfo{
29294 {0, 167772158},
29295 },
29296 },
29297 },
29298 {
29299 name: "LoweredAtomicCas64",
29300 argLen: 4,
29301 resultNotInArgs: true,
29302 faultOnNilArg0: true,
29303 hasSideEffects: true,
29304 unsafePoint: true,
29305 reg: regInfo{
29306 inputs: []inputInfo{
29307 {1, 234881022},
29308 {2, 234881022},
29309 {0, 4611686018695823358},
29310 },
29311 outputs: []outputInfo{
29312 {0, 167772158},
29313 },
29314 },
29315 },
29316 {
29317 name: "LoweredNilCheck",
29318 argLen: 2,
29319 nilCheck: true,
29320 faultOnNilArg0: true,
29321 reg: regInfo{
29322 inputs: []inputInfo{
29323 {0, 234881022},
29324 },
29325 },
29326 },
29327 {
29328 name: "FPFlagTrue",
29329 argLen: 1,
29330 reg: regInfo{
29331 outputs: []outputInfo{
29332 {0, 167772158},
29333 },
29334 },
29335 },
29336 {
29337 name: "FPFlagFalse",
29338 argLen: 1,
29339 reg: regInfo{
29340 outputs: []outputInfo{
29341 {0, 167772158},
29342 },
29343 },
29344 },
29345 {
29346 name: "LoweredGetClosurePtr",
29347 argLen: 0,
29348 zeroWidth: true,
29349 reg: regInfo{
29350 outputs: []outputInfo{
29351 {0, 4194304},
29352 },
29353 },
29354 },
29355 {
29356 name: "LoweredGetCallerSP",
29357 argLen: 1,
29358 rematerializeable: true,
29359 reg: regInfo{
29360 outputs: []outputInfo{
29361 {0, 167772158},
29362 },
29363 },
29364 },
29365 {
29366 name: "LoweredGetCallerPC",
29367 argLen: 0,
29368 rematerializeable: true,
29369 reg: regInfo{
29370 outputs: []outputInfo{
29371 {0, 167772158},
29372 },
29373 },
29374 },
29375 {
29376 name: "LoweredWB",
29377 auxType: auxInt64,
29378 argLen: 1,
29379 clobberFlags: true,
29380 reg: regInfo{
29381 clobbers: 4611686018293170176,
29382 outputs: []outputInfo{
29383 {0, 16777216},
29384 },
29385 },
29386 },
29387 {
29388 name: "LoweredPanicBoundsA",
29389 auxType: auxInt64,
29390 argLen: 3,
29391 call: true,
29392 reg: regInfo{
29393 inputs: []inputInfo{
29394 {0, 8},
29395 {1, 16},
29396 },
29397 },
29398 },
29399 {
29400 name: "LoweredPanicBoundsB",
29401 auxType: auxInt64,
29402 argLen: 3,
29403 call: true,
29404 reg: regInfo{
29405 inputs: []inputInfo{
29406 {0, 4},
29407 {1, 8},
29408 },
29409 },
29410 },
29411 {
29412 name: "LoweredPanicBoundsC",
29413 auxType: auxInt64,
29414 argLen: 3,
29415 call: true,
29416 reg: regInfo{
29417 inputs: []inputInfo{
29418 {0, 2},
29419 {1, 4},
29420 },
29421 },
29422 },
29423
29424 {
29425 name: "ADD",
29426 argLen: 2,
29427 commutative: true,
29428 asm: ppc64.AADD,
29429 reg: regInfo{
29430 inputs: []inputInfo{
29431 {0, 1073733630},
29432 {1, 1073733630},
29433 },
29434 outputs: []outputInfo{
29435 {0, 1073733624},
29436 },
29437 },
29438 },
29439 {
29440 name: "ADDCC",
29441 argLen: 2,
29442 commutative: true,
29443 asm: ppc64.AADDCC,
29444 reg: regInfo{
29445 inputs: []inputInfo{
29446 {0, 1073733630},
29447 {1, 1073733630},
29448 },
29449 outputs: []outputInfo{
29450 {0, 1073733624},
29451 },
29452 },
29453 },
29454 {
29455 name: "ADDconst",
29456 auxType: auxInt64,
29457 argLen: 1,
29458 asm: ppc64.AADD,
29459 reg: regInfo{
29460 inputs: []inputInfo{
29461 {0, 1073733630},
29462 },
29463 outputs: []outputInfo{
29464 {0, 1073733624},
29465 },
29466 },
29467 },
29468 {
29469 name: "ADDCCconst",
29470 auxType: auxInt64,
29471 argLen: 1,
29472 asm: ppc64.AADDCCC,
29473 reg: regInfo{
29474 inputs: []inputInfo{
29475 {0, 1073733630},
29476 },
29477 clobbers: 9223372036854775808,
29478 outputs: []outputInfo{
29479 {0, 1073733624},
29480 },
29481 },
29482 },
29483 {
29484 name: "FADD",
29485 argLen: 2,
29486 commutative: true,
29487 asm: ppc64.AFADD,
29488 reg: regInfo{
29489 inputs: []inputInfo{
29490 {0, 9223372032559808512},
29491 {1, 9223372032559808512},
29492 },
29493 outputs: []outputInfo{
29494 {0, 9223372032559808512},
29495 },
29496 },
29497 },
29498 {
29499 name: "FADDS",
29500 argLen: 2,
29501 commutative: true,
29502 asm: ppc64.AFADDS,
29503 reg: regInfo{
29504 inputs: []inputInfo{
29505 {0, 9223372032559808512},
29506 {1, 9223372032559808512},
29507 },
29508 outputs: []outputInfo{
29509 {0, 9223372032559808512},
29510 },
29511 },
29512 },
29513 {
29514 name: "SUB",
29515 argLen: 2,
29516 asm: ppc64.ASUB,
29517 reg: regInfo{
29518 inputs: []inputInfo{
29519 {0, 1073733630},
29520 {1, 1073733630},
29521 },
29522 outputs: []outputInfo{
29523 {0, 1073733624},
29524 },
29525 },
29526 },
29527 {
29528 name: "SUBCC",
29529 argLen: 2,
29530 asm: ppc64.ASUBCC,
29531 reg: regInfo{
29532 inputs: []inputInfo{
29533 {0, 1073733630},
29534 {1, 1073733630},
29535 },
29536 outputs: []outputInfo{
29537 {0, 1073733624},
29538 },
29539 },
29540 },
29541 {
29542 name: "SUBFCconst",
29543 auxType: auxInt64,
29544 argLen: 1,
29545 asm: ppc64.ASUBC,
29546 reg: regInfo{
29547 inputs: []inputInfo{
29548 {0, 1073733630},
29549 },
29550 clobbers: 9223372036854775808,
29551 outputs: []outputInfo{
29552 {0, 1073733624},
29553 },
29554 },
29555 },
29556 {
29557 name: "FSUB",
29558 argLen: 2,
29559 asm: ppc64.AFSUB,
29560 reg: regInfo{
29561 inputs: []inputInfo{
29562 {0, 9223372032559808512},
29563 {1, 9223372032559808512},
29564 },
29565 outputs: []outputInfo{
29566 {0, 9223372032559808512},
29567 },
29568 },
29569 },
29570 {
29571 name: "FSUBS",
29572 argLen: 2,
29573 asm: ppc64.AFSUBS,
29574 reg: regInfo{
29575 inputs: []inputInfo{
29576 {0, 9223372032559808512},
29577 {1, 9223372032559808512},
29578 },
29579 outputs: []outputInfo{
29580 {0, 9223372032559808512},
29581 },
29582 },
29583 },
29584 {
29585 name: "XSMINJDP",
29586 argLen: 2,
29587 asm: ppc64.AXSMINJDP,
29588 reg: regInfo{
29589 inputs: []inputInfo{
29590 {0, 9223372032559808512},
29591 {1, 9223372032559808512},
29592 },
29593 outputs: []outputInfo{
29594 {0, 9223372032559808512},
29595 },
29596 },
29597 },
29598 {
29599 name: "XSMAXJDP",
29600 argLen: 2,
29601 asm: ppc64.AXSMAXJDP,
29602 reg: regInfo{
29603 inputs: []inputInfo{
29604 {0, 9223372032559808512},
29605 {1, 9223372032559808512},
29606 },
29607 outputs: []outputInfo{
29608 {0, 9223372032559808512},
29609 },
29610 },
29611 },
29612 {
29613 name: "MULLD",
29614 argLen: 2,
29615 commutative: true,
29616 asm: ppc64.AMULLD,
29617 reg: regInfo{
29618 inputs: []inputInfo{
29619 {0, 1073733630},
29620 {1, 1073733630},
29621 },
29622 outputs: []outputInfo{
29623 {0, 1073733624},
29624 },
29625 },
29626 },
29627 {
29628 name: "MULLW",
29629 argLen: 2,
29630 commutative: true,
29631 asm: ppc64.AMULLW,
29632 reg: regInfo{
29633 inputs: []inputInfo{
29634 {0, 1073733630},
29635 {1, 1073733630},
29636 },
29637 outputs: []outputInfo{
29638 {0, 1073733624},
29639 },
29640 },
29641 },
29642 {
29643 name: "MULLDconst",
29644 auxType: auxInt32,
29645 argLen: 1,
29646 asm: ppc64.AMULLD,
29647 reg: regInfo{
29648 inputs: []inputInfo{
29649 {0, 1073733630},
29650 },
29651 outputs: []outputInfo{
29652 {0, 1073733624},
29653 },
29654 },
29655 },
29656 {
29657 name: "MULLWconst",
29658 auxType: auxInt32,
29659 argLen: 1,
29660 asm: ppc64.AMULLW,
29661 reg: regInfo{
29662 inputs: []inputInfo{
29663 {0, 1073733630},
29664 },
29665 outputs: []outputInfo{
29666 {0, 1073733624},
29667 },
29668 },
29669 },
29670 {
29671 name: "MADDLD",
29672 argLen: 3,
29673 asm: ppc64.AMADDLD,
29674 reg: regInfo{
29675 inputs: []inputInfo{
29676 {0, 1073733630},
29677 {1, 1073733630},
29678 {2, 1073733630},
29679 },
29680 outputs: []outputInfo{
29681 {0, 1073733624},
29682 },
29683 },
29684 },
29685 {
29686 name: "MULHD",
29687 argLen: 2,
29688 commutative: true,
29689 asm: ppc64.AMULHD,
29690 reg: regInfo{
29691 inputs: []inputInfo{
29692 {0, 1073733630},
29693 {1, 1073733630},
29694 },
29695 outputs: []outputInfo{
29696 {0, 1073733624},
29697 },
29698 },
29699 },
29700 {
29701 name: "MULHW",
29702 argLen: 2,
29703 commutative: true,
29704 asm: ppc64.AMULHW,
29705 reg: regInfo{
29706 inputs: []inputInfo{
29707 {0, 1073733630},
29708 {1, 1073733630},
29709 },
29710 outputs: []outputInfo{
29711 {0, 1073733624},
29712 },
29713 },
29714 },
29715 {
29716 name: "MULHDU",
29717 argLen: 2,
29718 commutative: true,
29719 asm: ppc64.AMULHDU,
29720 reg: regInfo{
29721 inputs: []inputInfo{
29722 {0, 1073733630},
29723 {1, 1073733630},
29724 },
29725 outputs: []outputInfo{
29726 {0, 1073733624},
29727 },
29728 },
29729 },
29730 {
29731 name: "MULHDUCC",
29732 argLen: 2,
29733 commutative: true,
29734 asm: ppc64.AMULHDUCC,
29735 reg: regInfo{
29736 inputs: []inputInfo{
29737 {0, 1073733630},
29738 {1, 1073733630},
29739 },
29740 outputs: []outputInfo{
29741 {0, 1073733624},
29742 },
29743 },
29744 },
29745 {
29746 name: "MULHWU",
29747 argLen: 2,
29748 commutative: true,
29749 asm: ppc64.AMULHWU,
29750 reg: regInfo{
29751 inputs: []inputInfo{
29752 {0, 1073733630},
29753 {1, 1073733630},
29754 },
29755 outputs: []outputInfo{
29756 {0, 1073733624},
29757 },
29758 },
29759 },
29760 {
29761 name: "FMUL",
29762 argLen: 2,
29763 commutative: true,
29764 asm: ppc64.AFMUL,
29765 reg: regInfo{
29766 inputs: []inputInfo{
29767 {0, 9223372032559808512},
29768 {1, 9223372032559808512},
29769 },
29770 outputs: []outputInfo{
29771 {0, 9223372032559808512},
29772 },
29773 },
29774 },
29775 {
29776 name: "FMULS",
29777 argLen: 2,
29778 commutative: true,
29779 asm: ppc64.AFMULS,
29780 reg: regInfo{
29781 inputs: []inputInfo{
29782 {0, 9223372032559808512},
29783 {1, 9223372032559808512},
29784 },
29785 outputs: []outputInfo{
29786 {0, 9223372032559808512},
29787 },
29788 },
29789 },
29790 {
29791 name: "FMADD",
29792 argLen: 3,
29793 asm: ppc64.AFMADD,
29794 reg: regInfo{
29795 inputs: []inputInfo{
29796 {0, 9223372032559808512},
29797 {1, 9223372032559808512},
29798 {2, 9223372032559808512},
29799 },
29800 outputs: []outputInfo{
29801 {0, 9223372032559808512},
29802 },
29803 },
29804 },
29805 {
29806 name: "FMADDS",
29807 argLen: 3,
29808 asm: ppc64.AFMADDS,
29809 reg: regInfo{
29810 inputs: []inputInfo{
29811 {0, 9223372032559808512},
29812 {1, 9223372032559808512},
29813 {2, 9223372032559808512},
29814 },
29815 outputs: []outputInfo{
29816 {0, 9223372032559808512},
29817 },
29818 },
29819 },
29820 {
29821 name: "FMSUB",
29822 argLen: 3,
29823 asm: ppc64.AFMSUB,
29824 reg: regInfo{
29825 inputs: []inputInfo{
29826 {0, 9223372032559808512},
29827 {1, 9223372032559808512},
29828 {2, 9223372032559808512},
29829 },
29830 outputs: []outputInfo{
29831 {0, 9223372032559808512},
29832 },
29833 },
29834 },
29835 {
29836 name: "FMSUBS",
29837 argLen: 3,
29838 asm: ppc64.AFMSUBS,
29839 reg: regInfo{
29840 inputs: []inputInfo{
29841 {0, 9223372032559808512},
29842 {1, 9223372032559808512},
29843 {2, 9223372032559808512},
29844 },
29845 outputs: []outputInfo{
29846 {0, 9223372032559808512},
29847 },
29848 },
29849 },
29850 {
29851 name: "SRAD",
29852 argLen: 2,
29853 asm: ppc64.ASRAD,
29854 reg: regInfo{
29855 inputs: []inputInfo{
29856 {0, 1073733630},
29857 {1, 1073733630},
29858 },
29859 clobbers: 9223372036854775808,
29860 outputs: []outputInfo{
29861 {0, 1073733624},
29862 },
29863 },
29864 },
29865 {
29866 name: "SRAW",
29867 argLen: 2,
29868 asm: ppc64.ASRAW,
29869 reg: regInfo{
29870 inputs: []inputInfo{
29871 {0, 1073733630},
29872 {1, 1073733630},
29873 },
29874 clobbers: 9223372036854775808,
29875 outputs: []outputInfo{
29876 {0, 1073733624},
29877 },
29878 },
29879 },
29880 {
29881 name: "SRD",
29882 argLen: 2,
29883 asm: ppc64.ASRD,
29884 reg: regInfo{
29885 inputs: []inputInfo{
29886 {0, 1073733630},
29887 {1, 1073733630},
29888 },
29889 outputs: []outputInfo{
29890 {0, 1073733624},
29891 },
29892 },
29893 },
29894 {
29895 name: "SRW",
29896 argLen: 2,
29897 asm: ppc64.ASRW,
29898 reg: regInfo{
29899 inputs: []inputInfo{
29900 {0, 1073733630},
29901 {1, 1073733630},
29902 },
29903 outputs: []outputInfo{
29904 {0, 1073733624},
29905 },
29906 },
29907 },
29908 {
29909 name: "SLD",
29910 argLen: 2,
29911 asm: ppc64.ASLD,
29912 reg: regInfo{
29913 inputs: []inputInfo{
29914 {0, 1073733630},
29915 {1, 1073733630},
29916 },
29917 outputs: []outputInfo{
29918 {0, 1073733624},
29919 },
29920 },
29921 },
29922 {
29923 name: "SLW",
29924 argLen: 2,
29925 asm: ppc64.ASLW,
29926 reg: regInfo{
29927 inputs: []inputInfo{
29928 {0, 1073733630},
29929 {1, 1073733630},
29930 },
29931 outputs: []outputInfo{
29932 {0, 1073733624},
29933 },
29934 },
29935 },
29936 {
29937 name: "ROTL",
29938 argLen: 2,
29939 asm: ppc64.AROTL,
29940 reg: regInfo{
29941 inputs: []inputInfo{
29942 {0, 1073733630},
29943 {1, 1073733630},
29944 },
29945 outputs: []outputInfo{
29946 {0, 1073733624},
29947 },
29948 },
29949 },
29950 {
29951 name: "ROTLW",
29952 argLen: 2,
29953 asm: ppc64.AROTLW,
29954 reg: regInfo{
29955 inputs: []inputInfo{
29956 {0, 1073733630},
29957 {1, 1073733630},
29958 },
29959 outputs: []outputInfo{
29960 {0, 1073733624},
29961 },
29962 },
29963 },
29964 {
29965 name: "CLRLSLWI",
29966 auxType: auxInt32,
29967 argLen: 1,
29968 asm: ppc64.ACLRLSLWI,
29969 reg: regInfo{
29970 inputs: []inputInfo{
29971 {0, 1073733630},
29972 },
29973 outputs: []outputInfo{
29974 {0, 1073733624},
29975 },
29976 },
29977 },
29978 {
29979 name: "CLRLSLDI",
29980 auxType: auxInt32,
29981 argLen: 1,
29982 asm: ppc64.ACLRLSLDI,
29983 reg: regInfo{
29984 inputs: []inputInfo{
29985 {0, 1073733630},
29986 },
29987 outputs: []outputInfo{
29988 {0, 1073733624},
29989 },
29990 },
29991 },
29992 {
29993 name: "ADDC",
29994 argLen: 2,
29995 commutative: true,
29996 asm: ppc64.AADDC,
29997 reg: regInfo{
29998 inputs: []inputInfo{
29999 {0, 1073733630},
30000 {1, 1073733630},
30001 },
30002 clobbers: 9223372036854775808,
30003 outputs: []outputInfo{
30004 {1, 9223372036854775808},
30005 {0, 1073733624},
30006 },
30007 },
30008 },
30009 {
30010 name: "SUBC",
30011 argLen: 2,
30012 asm: ppc64.ASUBC,
30013 reg: regInfo{
30014 inputs: []inputInfo{
30015 {0, 1073733630},
30016 {1, 1073733630},
30017 },
30018 clobbers: 9223372036854775808,
30019 outputs: []outputInfo{
30020 {1, 9223372036854775808},
30021 {0, 1073733624},
30022 },
30023 },
30024 },
30025 {
30026 name: "ADDCconst",
30027 auxType: auxInt64,
30028 argLen: 1,
30029 asm: ppc64.AADDC,
30030 reg: regInfo{
30031 inputs: []inputInfo{
30032 {0, 1073733630},
30033 },
30034 outputs: []outputInfo{
30035 {1, 9223372036854775808},
30036 {0, 1073733624},
30037 },
30038 },
30039 },
30040 {
30041 name: "SUBCconst",
30042 auxType: auxInt64,
30043 argLen: 1,
30044 asm: ppc64.ASUBC,
30045 reg: regInfo{
30046 inputs: []inputInfo{
30047 {0, 1073733630},
30048 },
30049 outputs: []outputInfo{
30050 {1, 9223372036854775808},
30051 {0, 1073733624},
30052 },
30053 },
30054 },
30055 {
30056 name: "ADDE",
30057 argLen: 3,
30058 commutative: true,
30059 asm: ppc64.AADDE,
30060 reg: regInfo{
30061 inputs: []inputInfo{
30062 {2, 9223372036854775808},
30063 {0, 1073733630},
30064 {1, 1073733630},
30065 },
30066 clobbers: 9223372036854775808,
30067 outputs: []outputInfo{
30068 {1, 9223372036854775808},
30069 {0, 1073733624},
30070 },
30071 },
30072 },
30073 {
30074 name: "ADDZE",
30075 argLen: 2,
30076 asm: ppc64.AADDZE,
30077 reg: regInfo{
30078 inputs: []inputInfo{
30079 {1, 9223372036854775808},
30080 {0, 1073733630},
30081 },
30082 clobbers: 9223372036854775808,
30083 outputs: []outputInfo{
30084 {1, 9223372036854775808},
30085 {0, 1073733624},
30086 },
30087 },
30088 },
30089 {
30090 name: "SUBE",
30091 argLen: 3,
30092 asm: ppc64.ASUBE,
30093 reg: regInfo{
30094 inputs: []inputInfo{
30095 {2, 9223372036854775808},
30096 {0, 1073733630},
30097 {1, 1073733630},
30098 },
30099 clobbers: 9223372036854775808,
30100 outputs: []outputInfo{
30101 {1, 9223372036854775808},
30102 {0, 1073733624},
30103 },
30104 },
30105 },
30106 {
30107 name: "ADDZEzero",
30108 argLen: 1,
30109 asm: ppc64.AADDZE,
30110 reg: regInfo{
30111 inputs: []inputInfo{
30112 {0, 9223372036854775808},
30113 },
30114 clobbers: 9223372036854775808,
30115 outputs: []outputInfo{
30116 {0, 1073733624},
30117 },
30118 },
30119 },
30120 {
30121 name: "SUBZEzero",
30122 argLen: 1,
30123 asm: ppc64.ASUBZE,
30124 reg: regInfo{
30125 inputs: []inputInfo{
30126 {0, 9223372036854775808},
30127 },
30128 clobbers: 9223372036854775808,
30129 outputs: []outputInfo{
30130 {0, 1073733624},
30131 },
30132 },
30133 },
30134 {
30135 name: "SRADconst",
30136 auxType: auxInt64,
30137 argLen: 1,
30138 asm: ppc64.ASRAD,
30139 reg: regInfo{
30140 inputs: []inputInfo{
30141 {0, 1073733630},
30142 },
30143 clobbers: 9223372036854775808,
30144 outputs: []outputInfo{
30145 {0, 1073733624},
30146 },
30147 },
30148 },
30149 {
30150 name: "SRAWconst",
30151 auxType: auxInt64,
30152 argLen: 1,
30153 asm: ppc64.ASRAW,
30154 reg: regInfo{
30155 inputs: []inputInfo{
30156 {0, 1073733630},
30157 },
30158 clobbers: 9223372036854775808,
30159 outputs: []outputInfo{
30160 {0, 1073733624},
30161 },
30162 },
30163 },
30164 {
30165 name: "SRDconst",
30166 auxType: auxInt64,
30167 argLen: 1,
30168 asm: ppc64.ASRD,
30169 reg: regInfo{
30170 inputs: []inputInfo{
30171 {0, 1073733630},
30172 },
30173 outputs: []outputInfo{
30174 {0, 1073733624},
30175 },
30176 },
30177 },
30178 {
30179 name: "SRWconst",
30180 auxType: auxInt64,
30181 argLen: 1,
30182 asm: ppc64.ASRW,
30183 reg: regInfo{
30184 inputs: []inputInfo{
30185 {0, 1073733630},
30186 },
30187 outputs: []outputInfo{
30188 {0, 1073733624},
30189 },
30190 },
30191 },
30192 {
30193 name: "SLDconst",
30194 auxType: auxInt64,
30195 argLen: 1,
30196 asm: ppc64.ASLD,
30197 reg: regInfo{
30198 inputs: []inputInfo{
30199 {0, 1073733630},
30200 },
30201 outputs: []outputInfo{
30202 {0, 1073733624},
30203 },
30204 },
30205 },
30206 {
30207 name: "SLWconst",
30208 auxType: auxInt64,
30209 argLen: 1,
30210 asm: ppc64.ASLW,
30211 reg: regInfo{
30212 inputs: []inputInfo{
30213 {0, 1073733630},
30214 },
30215 outputs: []outputInfo{
30216 {0, 1073733624},
30217 },
30218 },
30219 },
30220 {
30221 name: "ROTLconst",
30222 auxType: auxInt64,
30223 argLen: 1,
30224 asm: ppc64.AROTL,
30225 reg: regInfo{
30226 inputs: []inputInfo{
30227 {0, 1073733630},
30228 },
30229 outputs: []outputInfo{
30230 {0, 1073733624},
30231 },
30232 },
30233 },
30234 {
30235 name: "ROTLWconst",
30236 auxType: auxInt64,
30237 argLen: 1,
30238 asm: ppc64.AROTLW,
30239 reg: regInfo{
30240 inputs: []inputInfo{
30241 {0, 1073733630},
30242 },
30243 outputs: []outputInfo{
30244 {0, 1073733624},
30245 },
30246 },
30247 },
30248 {
30249 name: "EXTSWSLconst",
30250 auxType: auxInt64,
30251 argLen: 1,
30252 asm: ppc64.AEXTSWSLI,
30253 reg: regInfo{
30254 inputs: []inputInfo{
30255 {0, 1073733630},
30256 },
30257 outputs: []outputInfo{
30258 {0, 1073733624},
30259 },
30260 },
30261 },
30262 {
30263 name: "RLWINM",
30264 auxType: auxInt64,
30265 argLen: 1,
30266 asm: ppc64.ARLWNM,
30267 reg: regInfo{
30268 inputs: []inputInfo{
30269 {0, 1073733630},
30270 },
30271 outputs: []outputInfo{
30272 {0, 1073733624},
30273 },
30274 },
30275 },
30276 {
30277 name: "RLWNM",
30278 auxType: auxInt64,
30279 argLen: 2,
30280 asm: ppc64.ARLWNM,
30281 reg: regInfo{
30282 inputs: []inputInfo{
30283 {0, 1073733630},
30284 {1, 1073733630},
30285 },
30286 outputs: []outputInfo{
30287 {0, 1073733624},
30288 },
30289 },
30290 },
30291 {
30292 name: "RLWMI",
30293 auxType: auxInt64,
30294 argLen: 2,
30295 resultInArg0: true,
30296 asm: ppc64.ARLWMI,
30297 reg: regInfo{
30298 inputs: []inputInfo{
30299 {0, 1073733624},
30300 {1, 1073733630},
30301 },
30302 outputs: []outputInfo{
30303 {0, 1073733624},
30304 },
30305 },
30306 },
30307 {
30308 name: "RLDICL",
30309 auxType: auxInt64,
30310 argLen: 1,
30311 asm: ppc64.ARLDICL,
30312 reg: regInfo{
30313 inputs: []inputInfo{
30314 {0, 1073733630},
30315 },
30316 outputs: []outputInfo{
30317 {0, 1073733624},
30318 },
30319 },
30320 },
30321 {
30322 name: "RLDICLCC",
30323 auxType: auxInt64,
30324 argLen: 1,
30325 asm: ppc64.ARLDICLCC,
30326 reg: regInfo{
30327 inputs: []inputInfo{
30328 {0, 1073733630},
30329 },
30330 outputs: []outputInfo{
30331 {0, 1073733624},
30332 },
30333 },
30334 },
30335 {
30336 name: "RLDICR",
30337 auxType: auxInt64,
30338 argLen: 1,
30339 asm: ppc64.ARLDICR,
30340 reg: regInfo{
30341 inputs: []inputInfo{
30342 {0, 1073733630},
30343 },
30344 outputs: []outputInfo{
30345 {0, 1073733624},
30346 },
30347 },
30348 },
30349 {
30350 name: "CNTLZD",
30351 argLen: 1,
30352 asm: ppc64.ACNTLZD,
30353 reg: regInfo{
30354 inputs: []inputInfo{
30355 {0, 1073733630},
30356 },
30357 outputs: []outputInfo{
30358 {0, 1073733624},
30359 },
30360 },
30361 },
30362 {
30363 name: "CNTLZDCC",
30364 argLen: 1,
30365 asm: ppc64.ACNTLZDCC,
30366 reg: regInfo{
30367 inputs: []inputInfo{
30368 {0, 1073733630},
30369 },
30370 outputs: []outputInfo{
30371 {0, 1073733624},
30372 },
30373 },
30374 },
30375 {
30376 name: "CNTLZW",
30377 argLen: 1,
30378 asm: ppc64.ACNTLZW,
30379 reg: regInfo{
30380 inputs: []inputInfo{
30381 {0, 1073733630},
30382 },
30383 outputs: []outputInfo{
30384 {0, 1073733624},
30385 },
30386 },
30387 },
30388 {
30389 name: "CNTTZD",
30390 argLen: 1,
30391 asm: ppc64.ACNTTZD,
30392 reg: regInfo{
30393 inputs: []inputInfo{
30394 {0, 1073733630},
30395 },
30396 outputs: []outputInfo{
30397 {0, 1073733624},
30398 },
30399 },
30400 },
30401 {
30402 name: "CNTTZW",
30403 argLen: 1,
30404 asm: ppc64.ACNTTZW,
30405 reg: regInfo{
30406 inputs: []inputInfo{
30407 {0, 1073733630},
30408 },
30409 outputs: []outputInfo{
30410 {0, 1073733624},
30411 },
30412 },
30413 },
30414 {
30415 name: "POPCNTD",
30416 argLen: 1,
30417 asm: ppc64.APOPCNTD,
30418 reg: regInfo{
30419 inputs: []inputInfo{
30420 {0, 1073733630},
30421 },
30422 outputs: []outputInfo{
30423 {0, 1073733624},
30424 },
30425 },
30426 },
30427 {
30428 name: "POPCNTW",
30429 argLen: 1,
30430 asm: ppc64.APOPCNTW,
30431 reg: regInfo{
30432 inputs: []inputInfo{
30433 {0, 1073733630},
30434 },
30435 outputs: []outputInfo{
30436 {0, 1073733624},
30437 },
30438 },
30439 },
30440 {
30441 name: "POPCNTB",
30442 argLen: 1,
30443 asm: ppc64.APOPCNTB,
30444 reg: regInfo{
30445 inputs: []inputInfo{
30446 {0, 1073733630},
30447 },
30448 outputs: []outputInfo{
30449 {0, 1073733624},
30450 },
30451 },
30452 },
30453 {
30454 name: "FDIV",
30455 argLen: 2,
30456 asm: ppc64.AFDIV,
30457 reg: regInfo{
30458 inputs: []inputInfo{
30459 {0, 9223372032559808512},
30460 {1, 9223372032559808512},
30461 },
30462 outputs: []outputInfo{
30463 {0, 9223372032559808512},
30464 },
30465 },
30466 },
30467 {
30468 name: "FDIVS",
30469 argLen: 2,
30470 asm: ppc64.AFDIVS,
30471 reg: regInfo{
30472 inputs: []inputInfo{
30473 {0, 9223372032559808512},
30474 {1, 9223372032559808512},
30475 },
30476 outputs: []outputInfo{
30477 {0, 9223372032559808512},
30478 },
30479 },
30480 },
30481 {
30482 name: "DIVD",
30483 argLen: 2,
30484 asm: ppc64.ADIVD,
30485 reg: regInfo{
30486 inputs: []inputInfo{
30487 {0, 1073733630},
30488 {1, 1073733630},
30489 },
30490 outputs: []outputInfo{
30491 {0, 1073733624},
30492 },
30493 },
30494 },
30495 {
30496 name: "DIVW",
30497 argLen: 2,
30498 asm: ppc64.ADIVW,
30499 reg: regInfo{
30500 inputs: []inputInfo{
30501 {0, 1073733630},
30502 {1, 1073733630},
30503 },
30504 outputs: []outputInfo{
30505 {0, 1073733624},
30506 },
30507 },
30508 },
30509 {
30510 name: "DIVDU",
30511 argLen: 2,
30512 asm: ppc64.ADIVDU,
30513 reg: regInfo{
30514 inputs: []inputInfo{
30515 {0, 1073733630},
30516 {1, 1073733630},
30517 },
30518 outputs: []outputInfo{
30519 {0, 1073733624},
30520 },
30521 },
30522 },
30523 {
30524 name: "DIVWU",
30525 argLen: 2,
30526 asm: ppc64.ADIVWU,
30527 reg: regInfo{
30528 inputs: []inputInfo{
30529 {0, 1073733630},
30530 {1, 1073733630},
30531 },
30532 outputs: []outputInfo{
30533 {0, 1073733624},
30534 },
30535 },
30536 },
30537 {
30538 name: "MODUD",
30539 argLen: 2,
30540 asm: ppc64.AMODUD,
30541 reg: regInfo{
30542 inputs: []inputInfo{
30543 {0, 1073733630},
30544 {1, 1073733630},
30545 },
30546 outputs: []outputInfo{
30547 {0, 1073733624},
30548 },
30549 },
30550 },
30551 {
30552 name: "MODSD",
30553 argLen: 2,
30554 asm: ppc64.AMODSD,
30555 reg: regInfo{
30556 inputs: []inputInfo{
30557 {0, 1073733630},
30558 {1, 1073733630},
30559 },
30560 outputs: []outputInfo{
30561 {0, 1073733624},
30562 },
30563 },
30564 },
30565 {
30566 name: "MODUW",
30567 argLen: 2,
30568 asm: ppc64.AMODUW,
30569 reg: regInfo{
30570 inputs: []inputInfo{
30571 {0, 1073733630},
30572 {1, 1073733630},
30573 },
30574 outputs: []outputInfo{
30575 {0, 1073733624},
30576 },
30577 },
30578 },
30579 {
30580 name: "MODSW",
30581 argLen: 2,
30582 asm: ppc64.AMODSW,
30583 reg: regInfo{
30584 inputs: []inputInfo{
30585 {0, 1073733630},
30586 {1, 1073733630},
30587 },
30588 outputs: []outputInfo{
30589 {0, 1073733624},
30590 },
30591 },
30592 },
30593 {
30594 name: "FCTIDZ",
30595 argLen: 1,
30596 asm: ppc64.AFCTIDZ,
30597 reg: regInfo{
30598 inputs: []inputInfo{
30599 {0, 9223372032559808512},
30600 },
30601 outputs: []outputInfo{
30602 {0, 9223372032559808512},
30603 },
30604 },
30605 },
30606 {
30607 name: "FCTIWZ",
30608 argLen: 1,
30609 asm: ppc64.AFCTIWZ,
30610 reg: regInfo{
30611 inputs: []inputInfo{
30612 {0, 9223372032559808512},
30613 },
30614 outputs: []outputInfo{
30615 {0, 9223372032559808512},
30616 },
30617 },
30618 },
30619 {
30620 name: "FCFID",
30621 argLen: 1,
30622 asm: ppc64.AFCFID,
30623 reg: regInfo{
30624 inputs: []inputInfo{
30625 {0, 9223372032559808512},
30626 },
30627 outputs: []outputInfo{
30628 {0, 9223372032559808512},
30629 },
30630 },
30631 },
30632 {
30633 name: "FCFIDS",
30634 argLen: 1,
30635 asm: ppc64.AFCFIDS,
30636 reg: regInfo{
30637 inputs: []inputInfo{
30638 {0, 9223372032559808512},
30639 },
30640 outputs: []outputInfo{
30641 {0, 9223372032559808512},
30642 },
30643 },
30644 },
30645 {
30646 name: "FRSP",
30647 argLen: 1,
30648 asm: ppc64.AFRSP,
30649 reg: regInfo{
30650 inputs: []inputInfo{
30651 {0, 9223372032559808512},
30652 },
30653 outputs: []outputInfo{
30654 {0, 9223372032559808512},
30655 },
30656 },
30657 },
30658 {
30659 name: "MFVSRD",
30660 argLen: 1,
30661 asm: ppc64.AMFVSRD,
30662 reg: regInfo{
30663 inputs: []inputInfo{
30664 {0, 9223372032559808512},
30665 },
30666 outputs: []outputInfo{
30667 {0, 1073733624},
30668 },
30669 },
30670 },
30671 {
30672 name: "MTVSRD",
30673 argLen: 1,
30674 asm: ppc64.AMTVSRD,
30675 reg: regInfo{
30676 inputs: []inputInfo{
30677 {0, 1073733624},
30678 },
30679 outputs: []outputInfo{
30680 {0, 9223372032559808512},
30681 },
30682 },
30683 },
30684 {
30685 name: "AND",
30686 argLen: 2,
30687 commutative: true,
30688 asm: ppc64.AAND,
30689 reg: regInfo{
30690 inputs: []inputInfo{
30691 {0, 1073733630},
30692 {1, 1073733630},
30693 },
30694 outputs: []outputInfo{
30695 {0, 1073733624},
30696 },
30697 },
30698 },
30699 {
30700 name: "ANDN",
30701 argLen: 2,
30702 asm: ppc64.AANDN,
30703 reg: regInfo{
30704 inputs: []inputInfo{
30705 {0, 1073733630},
30706 {1, 1073733630},
30707 },
30708 outputs: []outputInfo{
30709 {0, 1073733624},
30710 },
30711 },
30712 },
30713 {
30714 name: "ANDNCC",
30715 argLen: 2,
30716 asm: ppc64.AANDNCC,
30717 reg: regInfo{
30718 inputs: []inputInfo{
30719 {0, 1073733630},
30720 {1, 1073733630},
30721 },
30722 outputs: []outputInfo{
30723 {0, 1073733624},
30724 },
30725 },
30726 },
30727 {
30728 name: "ANDCC",
30729 argLen: 2,
30730 commutative: true,
30731 asm: ppc64.AANDCC,
30732 reg: regInfo{
30733 inputs: []inputInfo{
30734 {0, 1073733630},
30735 {1, 1073733630},
30736 },
30737 outputs: []outputInfo{
30738 {0, 1073733624},
30739 },
30740 },
30741 },
30742 {
30743 name: "OR",
30744 argLen: 2,
30745 commutative: true,
30746 asm: ppc64.AOR,
30747 reg: regInfo{
30748 inputs: []inputInfo{
30749 {0, 1073733630},
30750 {1, 1073733630},
30751 },
30752 outputs: []outputInfo{
30753 {0, 1073733624},
30754 },
30755 },
30756 },
30757 {
30758 name: "ORN",
30759 argLen: 2,
30760 asm: ppc64.AORN,
30761 reg: regInfo{
30762 inputs: []inputInfo{
30763 {0, 1073733630},
30764 {1, 1073733630},
30765 },
30766 outputs: []outputInfo{
30767 {0, 1073733624},
30768 },
30769 },
30770 },
30771 {
30772 name: "ORCC",
30773 argLen: 2,
30774 commutative: true,
30775 asm: ppc64.AORCC,
30776 reg: regInfo{
30777 inputs: []inputInfo{
30778 {0, 1073733630},
30779 {1, 1073733630},
30780 },
30781 outputs: []outputInfo{
30782 {0, 1073733624},
30783 },
30784 },
30785 },
30786 {
30787 name: "NOR",
30788 argLen: 2,
30789 commutative: true,
30790 asm: ppc64.ANOR,
30791 reg: regInfo{
30792 inputs: []inputInfo{
30793 {0, 1073733630},
30794 {1, 1073733630},
30795 },
30796 outputs: []outputInfo{
30797 {0, 1073733624},
30798 },
30799 },
30800 },
30801 {
30802 name: "NORCC",
30803 argLen: 2,
30804 commutative: true,
30805 asm: ppc64.ANORCC,
30806 reg: regInfo{
30807 inputs: []inputInfo{
30808 {0, 1073733630},
30809 {1, 1073733630},
30810 },
30811 outputs: []outputInfo{
30812 {0, 1073733624},
30813 },
30814 },
30815 },
30816 {
30817 name: "XOR",
30818 argLen: 2,
30819 commutative: true,
30820 asm: ppc64.AXOR,
30821 reg: regInfo{
30822 inputs: []inputInfo{
30823 {0, 1073733630},
30824 {1, 1073733630},
30825 },
30826 outputs: []outputInfo{
30827 {0, 1073733624},
30828 },
30829 },
30830 },
30831 {
30832 name: "XORCC",
30833 argLen: 2,
30834 commutative: true,
30835 asm: ppc64.AXORCC,
30836 reg: regInfo{
30837 inputs: []inputInfo{
30838 {0, 1073733630},
30839 {1, 1073733630},
30840 },
30841 outputs: []outputInfo{
30842 {0, 1073733624},
30843 },
30844 },
30845 },
30846 {
30847 name: "EQV",
30848 argLen: 2,
30849 commutative: true,
30850 asm: ppc64.AEQV,
30851 reg: regInfo{
30852 inputs: []inputInfo{
30853 {0, 1073733630},
30854 {1, 1073733630},
30855 },
30856 outputs: []outputInfo{
30857 {0, 1073733624},
30858 },
30859 },
30860 },
30861 {
30862 name: "NEG",
30863 argLen: 1,
30864 asm: ppc64.ANEG,
30865 reg: regInfo{
30866 inputs: []inputInfo{
30867 {0, 1073733630},
30868 },
30869 outputs: []outputInfo{
30870 {0, 1073733624},
30871 },
30872 },
30873 },
30874 {
30875 name: "NEGCC",
30876 argLen: 1,
30877 asm: ppc64.ANEGCC,
30878 reg: regInfo{
30879 inputs: []inputInfo{
30880 {0, 1073733630},
30881 },
30882 outputs: []outputInfo{
30883 {0, 1073733624},
30884 },
30885 },
30886 },
30887 {
30888 name: "BRD",
30889 argLen: 1,
30890 asm: ppc64.ABRD,
30891 reg: regInfo{
30892 inputs: []inputInfo{
30893 {0, 1073733630},
30894 },
30895 outputs: []outputInfo{
30896 {0, 1073733624},
30897 },
30898 },
30899 },
30900 {
30901 name: "BRW",
30902 argLen: 1,
30903 asm: ppc64.ABRW,
30904 reg: regInfo{
30905 inputs: []inputInfo{
30906 {0, 1073733630},
30907 },
30908 outputs: []outputInfo{
30909 {0, 1073733624},
30910 },
30911 },
30912 },
30913 {
30914 name: "BRH",
30915 argLen: 1,
30916 asm: ppc64.ABRH,
30917 reg: regInfo{
30918 inputs: []inputInfo{
30919 {0, 1073733630},
30920 },
30921 outputs: []outputInfo{
30922 {0, 1073733624},
30923 },
30924 },
30925 },
30926 {
30927 name: "FNEG",
30928 argLen: 1,
30929 asm: ppc64.AFNEG,
30930 reg: regInfo{
30931 inputs: []inputInfo{
30932 {0, 9223372032559808512},
30933 },
30934 outputs: []outputInfo{
30935 {0, 9223372032559808512},
30936 },
30937 },
30938 },
30939 {
30940 name: "FSQRT",
30941 argLen: 1,
30942 asm: ppc64.AFSQRT,
30943 reg: regInfo{
30944 inputs: []inputInfo{
30945 {0, 9223372032559808512},
30946 },
30947 outputs: []outputInfo{
30948 {0, 9223372032559808512},
30949 },
30950 },
30951 },
30952 {
30953 name: "FSQRTS",
30954 argLen: 1,
30955 asm: ppc64.AFSQRTS,
30956 reg: regInfo{
30957 inputs: []inputInfo{
30958 {0, 9223372032559808512},
30959 },
30960 outputs: []outputInfo{
30961 {0, 9223372032559808512},
30962 },
30963 },
30964 },
30965 {
30966 name: "FFLOOR",
30967 argLen: 1,
30968 asm: ppc64.AFRIM,
30969 reg: regInfo{
30970 inputs: []inputInfo{
30971 {0, 9223372032559808512},
30972 },
30973 outputs: []outputInfo{
30974 {0, 9223372032559808512},
30975 },
30976 },
30977 },
30978 {
30979 name: "FCEIL",
30980 argLen: 1,
30981 asm: ppc64.AFRIP,
30982 reg: regInfo{
30983 inputs: []inputInfo{
30984 {0, 9223372032559808512},
30985 },
30986 outputs: []outputInfo{
30987 {0, 9223372032559808512},
30988 },
30989 },
30990 },
30991 {
30992 name: "FTRUNC",
30993 argLen: 1,
30994 asm: ppc64.AFRIZ,
30995 reg: regInfo{
30996 inputs: []inputInfo{
30997 {0, 9223372032559808512},
30998 },
30999 outputs: []outputInfo{
31000 {0, 9223372032559808512},
31001 },
31002 },
31003 },
31004 {
31005 name: "FROUND",
31006 argLen: 1,
31007 asm: ppc64.AFRIN,
31008 reg: regInfo{
31009 inputs: []inputInfo{
31010 {0, 9223372032559808512},
31011 },
31012 outputs: []outputInfo{
31013 {0, 9223372032559808512},
31014 },
31015 },
31016 },
31017 {
31018 name: "FABS",
31019 argLen: 1,
31020 asm: ppc64.AFABS,
31021 reg: regInfo{
31022 inputs: []inputInfo{
31023 {0, 9223372032559808512},
31024 },
31025 outputs: []outputInfo{
31026 {0, 9223372032559808512},
31027 },
31028 },
31029 },
31030 {
31031 name: "FNABS",
31032 argLen: 1,
31033 asm: ppc64.AFNABS,
31034 reg: regInfo{
31035 inputs: []inputInfo{
31036 {0, 9223372032559808512},
31037 },
31038 outputs: []outputInfo{
31039 {0, 9223372032559808512},
31040 },
31041 },
31042 },
31043 {
31044 name: "FCPSGN",
31045 argLen: 2,
31046 asm: ppc64.AFCPSGN,
31047 reg: regInfo{
31048 inputs: []inputInfo{
31049 {0, 9223372032559808512},
31050 {1, 9223372032559808512},
31051 },
31052 outputs: []outputInfo{
31053 {0, 9223372032559808512},
31054 },
31055 },
31056 },
31057 {
31058 name: "ORconst",
31059 auxType: auxInt64,
31060 argLen: 1,
31061 asm: ppc64.AOR,
31062 reg: regInfo{
31063 inputs: []inputInfo{
31064 {0, 1073733630},
31065 },
31066 outputs: []outputInfo{
31067 {0, 1073733624},
31068 },
31069 },
31070 },
31071 {
31072 name: "XORconst",
31073 auxType: auxInt64,
31074 argLen: 1,
31075 asm: ppc64.AXOR,
31076 reg: regInfo{
31077 inputs: []inputInfo{
31078 {0, 1073733630},
31079 },
31080 outputs: []outputInfo{
31081 {0, 1073733624},
31082 },
31083 },
31084 },
31085 {
31086 name: "ANDCCconst",
31087 auxType: auxInt64,
31088 argLen: 1,
31089 asm: ppc64.AANDCC,
31090 reg: regInfo{
31091 inputs: []inputInfo{
31092 {0, 1073733630},
31093 },
31094 outputs: []outputInfo{
31095 {0, 1073733624},
31096 },
31097 },
31098 },
31099 {
31100 name: "ANDconst",
31101 auxType: auxInt64,
31102 argLen: 1,
31103 clobberFlags: true,
31104 asm: ppc64.AANDCC,
31105 reg: regInfo{
31106 inputs: []inputInfo{
31107 {0, 1073733630},
31108 },
31109 outputs: []outputInfo{
31110 {0, 1073733624},
31111 },
31112 },
31113 },
31114 {
31115 name: "MOVBreg",
31116 argLen: 1,
31117 asm: ppc64.AMOVB,
31118 reg: regInfo{
31119 inputs: []inputInfo{
31120 {0, 1073733630},
31121 },
31122 outputs: []outputInfo{
31123 {0, 1073733624},
31124 },
31125 },
31126 },
31127 {
31128 name: "MOVBZreg",
31129 argLen: 1,
31130 asm: ppc64.AMOVBZ,
31131 reg: regInfo{
31132 inputs: []inputInfo{
31133 {0, 1073733630},
31134 },
31135 outputs: []outputInfo{
31136 {0, 1073733624},
31137 },
31138 },
31139 },
31140 {
31141 name: "MOVHreg",
31142 argLen: 1,
31143 asm: ppc64.AMOVH,
31144 reg: regInfo{
31145 inputs: []inputInfo{
31146 {0, 1073733630},
31147 },
31148 outputs: []outputInfo{
31149 {0, 1073733624},
31150 },
31151 },
31152 },
31153 {
31154 name: "MOVHZreg",
31155 argLen: 1,
31156 asm: ppc64.AMOVHZ,
31157 reg: regInfo{
31158 inputs: []inputInfo{
31159 {0, 1073733630},
31160 },
31161 outputs: []outputInfo{
31162 {0, 1073733624},
31163 },
31164 },
31165 },
31166 {
31167 name: "MOVWreg",
31168 argLen: 1,
31169 asm: ppc64.AMOVW,
31170 reg: regInfo{
31171 inputs: []inputInfo{
31172 {0, 1073733630},
31173 },
31174 outputs: []outputInfo{
31175 {0, 1073733624},
31176 },
31177 },
31178 },
31179 {
31180 name: "MOVWZreg",
31181 argLen: 1,
31182 asm: ppc64.AMOVWZ,
31183 reg: regInfo{
31184 inputs: []inputInfo{
31185 {0, 1073733630},
31186 },
31187 outputs: []outputInfo{
31188 {0, 1073733624},
31189 },
31190 },
31191 },
31192 {
31193 name: "MOVBZload",
31194 auxType: auxSymOff,
31195 argLen: 2,
31196 faultOnNilArg0: true,
31197 symEffect: SymRead,
31198 asm: ppc64.AMOVBZ,
31199 reg: regInfo{
31200 inputs: []inputInfo{
31201 {0, 1073733630},
31202 },
31203 outputs: []outputInfo{
31204 {0, 1073733624},
31205 },
31206 },
31207 },
31208 {
31209 name: "MOVHload",
31210 auxType: auxSymOff,
31211 argLen: 2,
31212 faultOnNilArg0: true,
31213 symEffect: SymRead,
31214 asm: ppc64.AMOVH,
31215 reg: regInfo{
31216 inputs: []inputInfo{
31217 {0, 1073733630},
31218 },
31219 outputs: []outputInfo{
31220 {0, 1073733624},
31221 },
31222 },
31223 },
31224 {
31225 name: "MOVHZload",
31226 auxType: auxSymOff,
31227 argLen: 2,
31228 faultOnNilArg0: true,
31229 symEffect: SymRead,
31230 asm: ppc64.AMOVHZ,
31231 reg: regInfo{
31232 inputs: []inputInfo{
31233 {0, 1073733630},
31234 },
31235 outputs: []outputInfo{
31236 {0, 1073733624},
31237 },
31238 },
31239 },
31240 {
31241 name: "MOVWload",
31242 auxType: auxSymOff,
31243 argLen: 2,
31244 faultOnNilArg0: true,
31245 symEffect: SymRead,
31246 asm: ppc64.AMOVW,
31247 reg: regInfo{
31248 inputs: []inputInfo{
31249 {0, 1073733630},
31250 },
31251 outputs: []outputInfo{
31252 {0, 1073733624},
31253 },
31254 },
31255 },
31256 {
31257 name: "MOVWZload",
31258 auxType: auxSymOff,
31259 argLen: 2,
31260 faultOnNilArg0: true,
31261 symEffect: SymRead,
31262 asm: ppc64.AMOVWZ,
31263 reg: regInfo{
31264 inputs: []inputInfo{
31265 {0, 1073733630},
31266 },
31267 outputs: []outputInfo{
31268 {0, 1073733624},
31269 },
31270 },
31271 },
31272 {
31273 name: "MOVDload",
31274 auxType: auxSymOff,
31275 argLen: 2,
31276 faultOnNilArg0: true,
31277 symEffect: SymRead,
31278 asm: ppc64.AMOVD,
31279 reg: regInfo{
31280 inputs: []inputInfo{
31281 {0, 1073733630},
31282 },
31283 outputs: []outputInfo{
31284 {0, 1073733624},
31285 },
31286 },
31287 },
31288 {
31289 name: "MOVDBRload",
31290 argLen: 2,
31291 faultOnNilArg0: true,
31292 asm: ppc64.AMOVDBR,
31293 reg: regInfo{
31294 inputs: []inputInfo{
31295 {0, 1073733630},
31296 },
31297 outputs: []outputInfo{
31298 {0, 1073733624},
31299 },
31300 },
31301 },
31302 {
31303 name: "MOVWBRload",
31304 argLen: 2,
31305 faultOnNilArg0: true,
31306 asm: ppc64.AMOVWBR,
31307 reg: regInfo{
31308 inputs: []inputInfo{
31309 {0, 1073733630},
31310 },
31311 outputs: []outputInfo{
31312 {0, 1073733624},
31313 },
31314 },
31315 },
31316 {
31317 name: "MOVHBRload",
31318 argLen: 2,
31319 faultOnNilArg0: true,
31320 asm: ppc64.AMOVHBR,
31321 reg: regInfo{
31322 inputs: []inputInfo{
31323 {0, 1073733630},
31324 },
31325 outputs: []outputInfo{
31326 {0, 1073733624},
31327 },
31328 },
31329 },
31330 {
31331 name: "MOVBZloadidx",
31332 argLen: 3,
31333 asm: ppc64.AMOVBZ,
31334 reg: regInfo{
31335 inputs: []inputInfo{
31336 {1, 1073733624},
31337 {0, 1073733630},
31338 },
31339 outputs: []outputInfo{
31340 {0, 1073733624},
31341 },
31342 },
31343 },
31344 {
31345 name: "MOVHloadidx",
31346 argLen: 3,
31347 asm: ppc64.AMOVH,
31348 reg: regInfo{
31349 inputs: []inputInfo{
31350 {1, 1073733624},
31351 {0, 1073733630},
31352 },
31353 outputs: []outputInfo{
31354 {0, 1073733624},
31355 },
31356 },
31357 },
31358 {
31359 name: "MOVHZloadidx",
31360 argLen: 3,
31361 asm: ppc64.AMOVHZ,
31362 reg: regInfo{
31363 inputs: []inputInfo{
31364 {1, 1073733624},
31365 {0, 1073733630},
31366 },
31367 outputs: []outputInfo{
31368 {0, 1073733624},
31369 },
31370 },
31371 },
31372 {
31373 name: "MOVWloadidx",
31374 argLen: 3,
31375 asm: ppc64.AMOVW,
31376 reg: regInfo{
31377 inputs: []inputInfo{
31378 {1, 1073733624},
31379 {0, 1073733630},
31380 },
31381 outputs: []outputInfo{
31382 {0, 1073733624},
31383 },
31384 },
31385 },
31386 {
31387 name: "MOVWZloadidx",
31388 argLen: 3,
31389 asm: ppc64.AMOVWZ,
31390 reg: regInfo{
31391 inputs: []inputInfo{
31392 {1, 1073733624},
31393 {0, 1073733630},
31394 },
31395 outputs: []outputInfo{
31396 {0, 1073733624},
31397 },
31398 },
31399 },
31400 {
31401 name: "MOVDloadidx",
31402 argLen: 3,
31403 asm: ppc64.AMOVD,
31404 reg: regInfo{
31405 inputs: []inputInfo{
31406 {1, 1073733624},
31407 {0, 1073733630},
31408 },
31409 outputs: []outputInfo{
31410 {0, 1073733624},
31411 },
31412 },
31413 },
31414 {
31415 name: "MOVHBRloadidx",
31416 argLen: 3,
31417 asm: ppc64.AMOVHBR,
31418 reg: regInfo{
31419 inputs: []inputInfo{
31420 {1, 1073733624},
31421 {0, 1073733630},
31422 },
31423 outputs: []outputInfo{
31424 {0, 1073733624},
31425 },
31426 },
31427 },
31428 {
31429 name: "MOVWBRloadidx",
31430 argLen: 3,
31431 asm: ppc64.AMOVWBR,
31432 reg: regInfo{
31433 inputs: []inputInfo{
31434 {1, 1073733624},
31435 {0, 1073733630},
31436 },
31437 outputs: []outputInfo{
31438 {0, 1073733624},
31439 },
31440 },
31441 },
31442 {
31443 name: "MOVDBRloadidx",
31444 argLen: 3,
31445 asm: ppc64.AMOVDBR,
31446 reg: regInfo{
31447 inputs: []inputInfo{
31448 {1, 1073733624},
31449 {0, 1073733630},
31450 },
31451 outputs: []outputInfo{
31452 {0, 1073733624},
31453 },
31454 },
31455 },
31456 {
31457 name: "FMOVDloadidx",
31458 argLen: 3,
31459 asm: ppc64.AFMOVD,
31460 reg: regInfo{
31461 inputs: []inputInfo{
31462 {0, 1073733630},
31463 {1, 1073733630},
31464 },
31465 outputs: []outputInfo{
31466 {0, 9223372032559808512},
31467 },
31468 },
31469 },
31470 {
31471 name: "FMOVSloadidx",
31472 argLen: 3,
31473 asm: ppc64.AFMOVS,
31474 reg: regInfo{
31475 inputs: []inputInfo{
31476 {0, 1073733630},
31477 {1, 1073733630},
31478 },
31479 outputs: []outputInfo{
31480 {0, 9223372032559808512},
31481 },
31482 },
31483 },
31484 {
31485 name: "DCBT",
31486 auxType: auxInt64,
31487 argLen: 2,
31488 hasSideEffects: true,
31489 asm: ppc64.ADCBT,
31490 reg: regInfo{
31491 inputs: []inputInfo{
31492 {0, 1073733630},
31493 },
31494 },
31495 },
31496 {
31497 name: "MOVDBRstore",
31498 argLen: 3,
31499 faultOnNilArg0: true,
31500 asm: ppc64.AMOVDBR,
31501 reg: regInfo{
31502 inputs: []inputInfo{
31503 {0, 1073733630},
31504 {1, 1073733630},
31505 },
31506 },
31507 },
31508 {
31509 name: "MOVWBRstore",
31510 argLen: 3,
31511 faultOnNilArg0: true,
31512 asm: ppc64.AMOVWBR,
31513 reg: regInfo{
31514 inputs: []inputInfo{
31515 {0, 1073733630},
31516 {1, 1073733630},
31517 },
31518 },
31519 },
31520 {
31521 name: "MOVHBRstore",
31522 argLen: 3,
31523 faultOnNilArg0: true,
31524 asm: ppc64.AMOVHBR,
31525 reg: regInfo{
31526 inputs: []inputInfo{
31527 {0, 1073733630},
31528 {1, 1073733630},
31529 },
31530 },
31531 },
31532 {
31533 name: "FMOVDload",
31534 auxType: auxSymOff,
31535 argLen: 2,
31536 faultOnNilArg0: true,
31537 symEffect: SymRead,
31538 asm: ppc64.AFMOVD,
31539 reg: regInfo{
31540 inputs: []inputInfo{
31541 {0, 1073733630},
31542 },
31543 outputs: []outputInfo{
31544 {0, 9223372032559808512},
31545 },
31546 },
31547 },
31548 {
31549 name: "FMOVSload",
31550 auxType: auxSymOff,
31551 argLen: 2,
31552 faultOnNilArg0: true,
31553 symEffect: SymRead,
31554 asm: ppc64.AFMOVS,
31555 reg: regInfo{
31556 inputs: []inputInfo{
31557 {0, 1073733630},
31558 },
31559 outputs: []outputInfo{
31560 {0, 9223372032559808512},
31561 },
31562 },
31563 },
31564 {
31565 name: "MOVBstore",
31566 auxType: auxSymOff,
31567 argLen: 3,
31568 faultOnNilArg0: true,
31569 symEffect: SymWrite,
31570 asm: ppc64.AMOVB,
31571 reg: regInfo{
31572 inputs: []inputInfo{
31573 {0, 1073733630},
31574 {1, 1073733630},
31575 },
31576 },
31577 },
31578 {
31579 name: "MOVHstore",
31580 auxType: auxSymOff,
31581 argLen: 3,
31582 faultOnNilArg0: true,
31583 symEffect: SymWrite,
31584 asm: ppc64.AMOVH,
31585 reg: regInfo{
31586 inputs: []inputInfo{
31587 {0, 1073733630},
31588 {1, 1073733630},
31589 },
31590 },
31591 },
31592 {
31593 name: "MOVWstore",
31594 auxType: auxSymOff,
31595 argLen: 3,
31596 faultOnNilArg0: true,
31597 symEffect: SymWrite,
31598 asm: ppc64.AMOVW,
31599 reg: regInfo{
31600 inputs: []inputInfo{
31601 {0, 1073733630},
31602 {1, 1073733630},
31603 },
31604 },
31605 },
31606 {
31607 name: "MOVDstore",
31608 auxType: auxSymOff,
31609 argLen: 3,
31610 faultOnNilArg0: true,
31611 symEffect: SymWrite,
31612 asm: ppc64.AMOVD,
31613 reg: regInfo{
31614 inputs: []inputInfo{
31615 {0, 1073733630},
31616 {1, 1073733630},
31617 },
31618 },
31619 },
31620 {
31621 name: "FMOVDstore",
31622 auxType: auxSymOff,
31623 argLen: 3,
31624 faultOnNilArg0: true,
31625 symEffect: SymWrite,
31626 asm: ppc64.AFMOVD,
31627 reg: regInfo{
31628 inputs: []inputInfo{
31629 {0, 1073733630},
31630 {1, 9223372032559808512},
31631 },
31632 },
31633 },
31634 {
31635 name: "FMOVSstore",
31636 auxType: auxSymOff,
31637 argLen: 3,
31638 faultOnNilArg0: true,
31639 symEffect: SymWrite,
31640 asm: ppc64.AFMOVS,
31641 reg: regInfo{
31642 inputs: []inputInfo{
31643 {0, 1073733630},
31644 {1, 9223372032559808512},
31645 },
31646 },
31647 },
31648 {
31649 name: "MOVBstoreidx",
31650 argLen: 4,
31651 asm: ppc64.AMOVB,
31652 reg: regInfo{
31653 inputs: []inputInfo{
31654 {0, 1073733630},
31655 {1, 1073733630},
31656 {2, 1073733630},
31657 },
31658 },
31659 },
31660 {
31661 name: "MOVHstoreidx",
31662 argLen: 4,
31663 asm: ppc64.AMOVH,
31664 reg: regInfo{
31665 inputs: []inputInfo{
31666 {0, 1073733630},
31667 {1, 1073733630},
31668 {2, 1073733630},
31669 },
31670 },
31671 },
31672 {
31673 name: "MOVWstoreidx",
31674 argLen: 4,
31675 asm: ppc64.AMOVW,
31676 reg: regInfo{
31677 inputs: []inputInfo{
31678 {0, 1073733630},
31679 {1, 1073733630},
31680 {2, 1073733630},
31681 },
31682 },
31683 },
31684 {
31685 name: "MOVDstoreidx",
31686 argLen: 4,
31687 asm: ppc64.AMOVD,
31688 reg: regInfo{
31689 inputs: []inputInfo{
31690 {0, 1073733630},
31691 {1, 1073733630},
31692 {2, 1073733630},
31693 },
31694 },
31695 },
31696 {
31697 name: "FMOVDstoreidx",
31698 argLen: 4,
31699 asm: ppc64.AFMOVD,
31700 reg: regInfo{
31701 inputs: []inputInfo{
31702 {0, 1073733630},
31703 {1, 1073733630},
31704 {2, 9223372032559808512},
31705 },
31706 },
31707 },
31708 {
31709 name: "FMOVSstoreidx",
31710 argLen: 4,
31711 asm: ppc64.AFMOVS,
31712 reg: regInfo{
31713 inputs: []inputInfo{
31714 {0, 1073733630},
31715 {1, 1073733630},
31716 {2, 9223372032559808512},
31717 },
31718 },
31719 },
31720 {
31721 name: "MOVHBRstoreidx",
31722 argLen: 4,
31723 asm: ppc64.AMOVHBR,
31724 reg: regInfo{
31725 inputs: []inputInfo{
31726 {0, 1073733630},
31727 {1, 1073733630},
31728 {2, 1073733630},
31729 },
31730 },
31731 },
31732 {
31733 name: "MOVWBRstoreidx",
31734 argLen: 4,
31735 asm: ppc64.AMOVWBR,
31736 reg: regInfo{
31737 inputs: []inputInfo{
31738 {0, 1073733630},
31739 {1, 1073733630},
31740 {2, 1073733630},
31741 },
31742 },
31743 },
31744 {
31745 name: "MOVDBRstoreidx",
31746 argLen: 4,
31747 asm: ppc64.AMOVDBR,
31748 reg: regInfo{
31749 inputs: []inputInfo{
31750 {0, 1073733630},
31751 {1, 1073733630},
31752 {2, 1073733630},
31753 },
31754 },
31755 },
31756 {
31757 name: "MOVBstorezero",
31758 auxType: auxSymOff,
31759 argLen: 2,
31760 faultOnNilArg0: true,
31761 symEffect: SymWrite,
31762 asm: ppc64.AMOVB,
31763 reg: regInfo{
31764 inputs: []inputInfo{
31765 {0, 1073733630},
31766 },
31767 },
31768 },
31769 {
31770 name: "MOVHstorezero",
31771 auxType: auxSymOff,
31772 argLen: 2,
31773 faultOnNilArg0: true,
31774 symEffect: SymWrite,
31775 asm: ppc64.AMOVH,
31776 reg: regInfo{
31777 inputs: []inputInfo{
31778 {0, 1073733630},
31779 },
31780 },
31781 },
31782 {
31783 name: "MOVWstorezero",
31784 auxType: auxSymOff,
31785 argLen: 2,
31786 faultOnNilArg0: true,
31787 symEffect: SymWrite,
31788 asm: ppc64.AMOVW,
31789 reg: regInfo{
31790 inputs: []inputInfo{
31791 {0, 1073733630},
31792 },
31793 },
31794 },
31795 {
31796 name: "MOVDstorezero",
31797 auxType: auxSymOff,
31798 argLen: 2,
31799 faultOnNilArg0: true,
31800 symEffect: SymWrite,
31801 asm: ppc64.AMOVD,
31802 reg: regInfo{
31803 inputs: []inputInfo{
31804 {0, 1073733630},
31805 },
31806 },
31807 },
31808 {
31809 name: "MOVDaddr",
31810 auxType: auxSymOff,
31811 argLen: 1,
31812 rematerializeable: true,
31813 symEffect: SymAddr,
31814 asm: ppc64.AMOVD,
31815 reg: regInfo{
31816 inputs: []inputInfo{
31817 {0, 1073733630},
31818 },
31819 outputs: []outputInfo{
31820 {0, 1073733624},
31821 },
31822 },
31823 },
31824 {
31825 name: "MOVDconst",
31826 auxType: auxInt64,
31827 argLen: 0,
31828 rematerializeable: true,
31829 asm: ppc64.AMOVD,
31830 reg: regInfo{
31831 outputs: []outputInfo{
31832 {0, 1073733624},
31833 },
31834 },
31835 },
31836 {
31837 name: "FMOVDconst",
31838 auxType: auxFloat64,
31839 argLen: 0,
31840 rematerializeable: true,
31841 asm: ppc64.AFMOVD,
31842 reg: regInfo{
31843 outputs: []outputInfo{
31844 {0, 9223372032559808512},
31845 },
31846 },
31847 },
31848 {
31849 name: "FMOVSconst",
31850 auxType: auxFloat32,
31851 argLen: 0,
31852 rematerializeable: true,
31853 asm: ppc64.AFMOVS,
31854 reg: regInfo{
31855 outputs: []outputInfo{
31856 {0, 9223372032559808512},
31857 },
31858 },
31859 },
31860 {
31861 name: "FCMPU",
31862 argLen: 2,
31863 asm: ppc64.AFCMPU,
31864 reg: regInfo{
31865 inputs: []inputInfo{
31866 {0, 9223372032559808512},
31867 {1, 9223372032559808512},
31868 },
31869 },
31870 },
31871 {
31872 name: "CMP",
31873 argLen: 2,
31874 asm: ppc64.ACMP,
31875 reg: regInfo{
31876 inputs: []inputInfo{
31877 {0, 1073733630},
31878 {1, 1073733630},
31879 },
31880 },
31881 },
31882 {
31883 name: "CMPU",
31884 argLen: 2,
31885 asm: ppc64.ACMPU,
31886 reg: regInfo{
31887 inputs: []inputInfo{
31888 {0, 1073733630},
31889 {1, 1073733630},
31890 },
31891 },
31892 },
31893 {
31894 name: "CMPW",
31895 argLen: 2,
31896 asm: ppc64.ACMPW,
31897 reg: regInfo{
31898 inputs: []inputInfo{
31899 {0, 1073733630},
31900 {1, 1073733630},
31901 },
31902 },
31903 },
31904 {
31905 name: "CMPWU",
31906 argLen: 2,
31907 asm: ppc64.ACMPWU,
31908 reg: regInfo{
31909 inputs: []inputInfo{
31910 {0, 1073733630},
31911 {1, 1073733630},
31912 },
31913 },
31914 },
31915 {
31916 name: "CMPconst",
31917 auxType: auxInt64,
31918 argLen: 1,
31919 asm: ppc64.ACMP,
31920 reg: regInfo{
31921 inputs: []inputInfo{
31922 {0, 1073733630},
31923 },
31924 },
31925 },
31926 {
31927 name: "CMPUconst",
31928 auxType: auxInt64,
31929 argLen: 1,
31930 asm: ppc64.ACMPU,
31931 reg: regInfo{
31932 inputs: []inputInfo{
31933 {0, 1073733630},
31934 },
31935 },
31936 },
31937 {
31938 name: "CMPWconst",
31939 auxType: auxInt32,
31940 argLen: 1,
31941 asm: ppc64.ACMPW,
31942 reg: regInfo{
31943 inputs: []inputInfo{
31944 {0, 1073733630},
31945 },
31946 },
31947 },
31948 {
31949 name: "CMPWUconst",
31950 auxType: auxInt32,
31951 argLen: 1,
31952 asm: ppc64.ACMPWU,
31953 reg: regInfo{
31954 inputs: []inputInfo{
31955 {0, 1073733630},
31956 },
31957 },
31958 },
31959 {
31960 name: "ISEL",
31961 auxType: auxInt32,
31962 argLen: 3,
31963 asm: ppc64.AISEL,
31964 reg: regInfo{
31965 inputs: []inputInfo{
31966 {0, 1073733624},
31967 {1, 1073733624},
31968 },
31969 outputs: []outputInfo{
31970 {0, 1073733624},
31971 },
31972 },
31973 },
31974 {
31975 name: "ISELZ",
31976 auxType: auxInt32,
31977 argLen: 2,
31978 asm: ppc64.AISEL,
31979 reg: regInfo{
31980 inputs: []inputInfo{
31981 {0, 1073733624},
31982 },
31983 outputs: []outputInfo{
31984 {0, 1073733624},
31985 },
31986 },
31987 },
31988 {
31989 name: "SETBC",
31990 auxType: auxInt32,
31991 argLen: 1,
31992 asm: ppc64.ASETBC,
31993 reg: regInfo{
31994 outputs: []outputInfo{
31995 {0, 1073733624},
31996 },
31997 },
31998 },
31999 {
32000 name: "SETBCR",
32001 auxType: auxInt32,
32002 argLen: 1,
32003 asm: ppc64.ASETBCR,
32004 reg: regInfo{
32005 outputs: []outputInfo{
32006 {0, 1073733624},
32007 },
32008 },
32009 },
32010 {
32011 name: "Equal",
32012 argLen: 1,
32013 reg: regInfo{
32014 outputs: []outputInfo{
32015 {0, 1073733624},
32016 },
32017 },
32018 },
32019 {
32020 name: "NotEqual",
32021 argLen: 1,
32022 reg: regInfo{
32023 outputs: []outputInfo{
32024 {0, 1073733624},
32025 },
32026 },
32027 },
32028 {
32029 name: "LessThan",
32030 argLen: 1,
32031 reg: regInfo{
32032 outputs: []outputInfo{
32033 {0, 1073733624},
32034 },
32035 },
32036 },
32037 {
32038 name: "FLessThan",
32039 argLen: 1,
32040 reg: regInfo{
32041 outputs: []outputInfo{
32042 {0, 1073733624},
32043 },
32044 },
32045 },
32046 {
32047 name: "LessEqual",
32048 argLen: 1,
32049 reg: regInfo{
32050 outputs: []outputInfo{
32051 {0, 1073733624},
32052 },
32053 },
32054 },
32055 {
32056 name: "FLessEqual",
32057 argLen: 1,
32058 reg: regInfo{
32059 outputs: []outputInfo{
32060 {0, 1073733624},
32061 },
32062 },
32063 },
32064 {
32065 name: "GreaterThan",
32066 argLen: 1,
32067 reg: regInfo{
32068 outputs: []outputInfo{
32069 {0, 1073733624},
32070 },
32071 },
32072 },
32073 {
32074 name: "FGreaterThan",
32075 argLen: 1,
32076 reg: regInfo{
32077 outputs: []outputInfo{
32078 {0, 1073733624},
32079 },
32080 },
32081 },
32082 {
32083 name: "GreaterEqual",
32084 argLen: 1,
32085 reg: regInfo{
32086 outputs: []outputInfo{
32087 {0, 1073733624},
32088 },
32089 },
32090 },
32091 {
32092 name: "FGreaterEqual",
32093 argLen: 1,
32094 reg: regInfo{
32095 outputs: []outputInfo{
32096 {0, 1073733624},
32097 },
32098 },
32099 },
32100 {
32101 name: "LoweredGetClosurePtr",
32102 argLen: 0,
32103 zeroWidth: true,
32104 reg: regInfo{
32105 outputs: []outputInfo{
32106 {0, 2048},
32107 },
32108 },
32109 },
32110 {
32111 name: "LoweredGetCallerSP",
32112 argLen: 1,
32113 rematerializeable: true,
32114 reg: regInfo{
32115 outputs: []outputInfo{
32116 {0, 1073733624},
32117 },
32118 },
32119 },
32120 {
32121 name: "LoweredGetCallerPC",
32122 argLen: 0,
32123 rematerializeable: true,
32124 reg: regInfo{
32125 outputs: []outputInfo{
32126 {0, 1073733624},
32127 },
32128 },
32129 },
32130 {
32131 name: "LoweredNilCheck",
32132 argLen: 2,
32133 clobberFlags: true,
32134 nilCheck: true,
32135 faultOnNilArg0: true,
32136 reg: regInfo{
32137 inputs: []inputInfo{
32138 {0, 1073733630},
32139 },
32140 clobbers: 2147483648,
32141 },
32142 },
32143 {
32144 name: "LoweredRound32F",
32145 argLen: 1,
32146 resultInArg0: true,
32147 zeroWidth: true,
32148 reg: regInfo{
32149 inputs: []inputInfo{
32150 {0, 9223372032559808512},
32151 },
32152 outputs: []outputInfo{
32153 {0, 9223372032559808512},
32154 },
32155 },
32156 },
32157 {
32158 name: "LoweredRound64F",
32159 argLen: 1,
32160 resultInArg0: true,
32161 zeroWidth: true,
32162 reg: regInfo{
32163 inputs: []inputInfo{
32164 {0, 9223372032559808512},
32165 },
32166 outputs: []outputInfo{
32167 {0, 9223372032559808512},
32168 },
32169 },
32170 },
32171 {
32172 name: "CALLstatic",
32173 auxType: auxCallOff,
32174 argLen: -1,
32175 clobberFlags: true,
32176 call: true,
32177 reg: regInfo{
32178 clobbers: 18446744071562059768,
32179 },
32180 },
32181 {
32182 name: "CALLtail",
32183 auxType: auxCallOff,
32184 argLen: -1,
32185 clobberFlags: true,
32186 call: true,
32187 tailCall: true,
32188 reg: regInfo{
32189 clobbers: 18446744071562059768,
32190 },
32191 },
32192 {
32193 name: "CALLclosure",
32194 auxType: auxCallOff,
32195 argLen: -1,
32196 clobberFlags: true,
32197 call: true,
32198 reg: regInfo{
32199 inputs: []inputInfo{
32200 {0, 4096},
32201 {1, 2048},
32202 },
32203 clobbers: 18446744071562059768,
32204 },
32205 },
32206 {
32207 name: "CALLinter",
32208 auxType: auxCallOff,
32209 argLen: -1,
32210 clobberFlags: true,
32211 call: true,
32212 reg: regInfo{
32213 inputs: []inputInfo{
32214 {0, 4096},
32215 },
32216 clobbers: 18446744071562059768,
32217 },
32218 },
32219 {
32220 name: "LoweredZero",
32221 auxType: auxInt64,
32222 argLen: 2,
32223 clobberFlags: true,
32224 faultOnNilArg0: true,
32225 unsafePoint: true,
32226 reg: regInfo{
32227 inputs: []inputInfo{
32228 {0, 1048576},
32229 },
32230 clobbers: 1048576,
32231 },
32232 },
32233 {
32234 name: "LoweredZeroShort",
32235 auxType: auxInt64,
32236 argLen: 2,
32237 faultOnNilArg0: true,
32238 unsafePoint: true,
32239 reg: regInfo{
32240 inputs: []inputInfo{
32241 {0, 1073733624},
32242 },
32243 },
32244 },
32245 {
32246 name: "LoweredQuadZeroShort",
32247 auxType: auxInt64,
32248 argLen: 2,
32249 faultOnNilArg0: true,
32250 unsafePoint: true,
32251 reg: regInfo{
32252 inputs: []inputInfo{
32253 {0, 1073733624},
32254 },
32255 },
32256 },
32257 {
32258 name: "LoweredQuadZero",
32259 auxType: auxInt64,
32260 argLen: 2,
32261 clobberFlags: true,
32262 faultOnNilArg0: true,
32263 unsafePoint: true,
32264 reg: regInfo{
32265 inputs: []inputInfo{
32266 {0, 1048576},
32267 },
32268 clobbers: 1048576,
32269 },
32270 },
32271 {
32272 name: "LoweredMove",
32273 auxType: auxInt64,
32274 argLen: 3,
32275 clobberFlags: true,
32276 faultOnNilArg0: true,
32277 faultOnNilArg1: true,
32278 unsafePoint: true,
32279 reg: regInfo{
32280 inputs: []inputInfo{
32281 {0, 1048576},
32282 {1, 2097152},
32283 },
32284 clobbers: 3145728,
32285 },
32286 },
32287 {
32288 name: "LoweredMoveShort",
32289 auxType: auxInt64,
32290 argLen: 3,
32291 faultOnNilArg0: true,
32292 faultOnNilArg1: true,
32293 unsafePoint: true,
32294 reg: regInfo{
32295 inputs: []inputInfo{
32296 {0, 1073733624},
32297 {1, 1073733624},
32298 },
32299 },
32300 },
32301 {
32302 name: "LoweredQuadMove",
32303 auxType: auxInt64,
32304 argLen: 3,
32305 clobberFlags: true,
32306 faultOnNilArg0: true,
32307 faultOnNilArg1: true,
32308 unsafePoint: true,
32309 reg: regInfo{
32310 inputs: []inputInfo{
32311 {0, 1048576},
32312 {1, 2097152},
32313 },
32314 clobbers: 3145728,
32315 },
32316 },
32317 {
32318 name: "LoweredQuadMoveShort",
32319 auxType: auxInt64,
32320 argLen: 3,
32321 faultOnNilArg0: true,
32322 faultOnNilArg1: true,
32323 unsafePoint: true,
32324 reg: regInfo{
32325 inputs: []inputInfo{
32326 {0, 1073733624},
32327 {1, 1073733624},
32328 },
32329 },
32330 },
32331 {
32332 name: "LoweredAtomicStore8",
32333 auxType: auxInt64,
32334 argLen: 3,
32335 faultOnNilArg0: true,
32336 hasSideEffects: true,
32337 reg: regInfo{
32338 inputs: []inputInfo{
32339 {0, 1073733630},
32340 {1, 1073733630},
32341 },
32342 },
32343 },
32344 {
32345 name: "LoweredAtomicStore32",
32346 auxType: auxInt64,
32347 argLen: 3,
32348 faultOnNilArg0: true,
32349 hasSideEffects: true,
32350 reg: regInfo{
32351 inputs: []inputInfo{
32352 {0, 1073733630},
32353 {1, 1073733630},
32354 },
32355 },
32356 },
32357 {
32358 name: "LoweredAtomicStore64",
32359 auxType: auxInt64,
32360 argLen: 3,
32361 faultOnNilArg0: true,
32362 hasSideEffects: true,
32363 reg: regInfo{
32364 inputs: []inputInfo{
32365 {0, 1073733630},
32366 {1, 1073733630},
32367 },
32368 },
32369 },
32370 {
32371 name: "LoweredAtomicLoad8",
32372 auxType: auxInt64,
32373 argLen: 2,
32374 clobberFlags: true,
32375 faultOnNilArg0: true,
32376 reg: regInfo{
32377 inputs: []inputInfo{
32378 {0, 1073733630},
32379 },
32380 outputs: []outputInfo{
32381 {0, 1073733624},
32382 },
32383 },
32384 },
32385 {
32386 name: "LoweredAtomicLoad32",
32387 auxType: auxInt64,
32388 argLen: 2,
32389 clobberFlags: true,
32390 faultOnNilArg0: true,
32391 reg: regInfo{
32392 inputs: []inputInfo{
32393 {0, 1073733630},
32394 },
32395 outputs: []outputInfo{
32396 {0, 1073733624},
32397 },
32398 },
32399 },
32400 {
32401 name: "LoweredAtomicLoad64",
32402 auxType: auxInt64,
32403 argLen: 2,
32404 clobberFlags: true,
32405 faultOnNilArg0: true,
32406 reg: regInfo{
32407 inputs: []inputInfo{
32408 {0, 1073733630},
32409 },
32410 outputs: []outputInfo{
32411 {0, 1073733624},
32412 },
32413 },
32414 },
32415 {
32416 name: "LoweredAtomicLoadPtr",
32417 auxType: auxInt64,
32418 argLen: 2,
32419 clobberFlags: true,
32420 faultOnNilArg0: true,
32421 reg: regInfo{
32422 inputs: []inputInfo{
32423 {0, 1073733630},
32424 },
32425 outputs: []outputInfo{
32426 {0, 1073733624},
32427 },
32428 },
32429 },
32430 {
32431 name: "LoweredAtomicAdd32",
32432 argLen: 3,
32433 resultNotInArgs: true,
32434 clobberFlags: true,
32435 faultOnNilArg0: true,
32436 hasSideEffects: true,
32437 reg: regInfo{
32438 inputs: []inputInfo{
32439 {1, 1073733624},
32440 {0, 1073733630},
32441 },
32442 outputs: []outputInfo{
32443 {0, 1073733624},
32444 },
32445 },
32446 },
32447 {
32448 name: "LoweredAtomicAdd64",
32449 argLen: 3,
32450 resultNotInArgs: true,
32451 clobberFlags: true,
32452 faultOnNilArg0: true,
32453 hasSideEffects: true,
32454 reg: regInfo{
32455 inputs: []inputInfo{
32456 {1, 1073733624},
32457 {0, 1073733630},
32458 },
32459 outputs: []outputInfo{
32460 {0, 1073733624},
32461 },
32462 },
32463 },
32464 {
32465 name: "LoweredAtomicExchange8",
32466 argLen: 3,
32467 resultNotInArgs: true,
32468 clobberFlags: true,
32469 faultOnNilArg0: true,
32470 hasSideEffects: true,
32471 reg: regInfo{
32472 inputs: []inputInfo{
32473 {1, 1073733624},
32474 {0, 1073733630},
32475 },
32476 outputs: []outputInfo{
32477 {0, 1073733624},
32478 },
32479 },
32480 },
32481 {
32482 name: "LoweredAtomicExchange32",
32483 argLen: 3,
32484 resultNotInArgs: true,
32485 clobberFlags: true,
32486 faultOnNilArg0: true,
32487 hasSideEffects: true,
32488 reg: regInfo{
32489 inputs: []inputInfo{
32490 {1, 1073733624},
32491 {0, 1073733630},
32492 },
32493 outputs: []outputInfo{
32494 {0, 1073733624},
32495 },
32496 },
32497 },
32498 {
32499 name: "LoweredAtomicExchange64",
32500 argLen: 3,
32501 resultNotInArgs: true,
32502 clobberFlags: true,
32503 faultOnNilArg0: true,
32504 hasSideEffects: true,
32505 reg: regInfo{
32506 inputs: []inputInfo{
32507 {1, 1073733624},
32508 {0, 1073733630},
32509 },
32510 outputs: []outputInfo{
32511 {0, 1073733624},
32512 },
32513 },
32514 },
32515 {
32516 name: "LoweredAtomicCas64",
32517 auxType: auxInt64,
32518 argLen: 4,
32519 resultNotInArgs: true,
32520 clobberFlags: true,
32521 faultOnNilArg0: true,
32522 hasSideEffects: true,
32523 reg: regInfo{
32524 inputs: []inputInfo{
32525 {1, 1073733624},
32526 {2, 1073733624},
32527 {0, 1073733630},
32528 },
32529 outputs: []outputInfo{
32530 {0, 1073733624},
32531 },
32532 },
32533 },
32534 {
32535 name: "LoweredAtomicCas32",
32536 auxType: auxInt64,
32537 argLen: 4,
32538 resultNotInArgs: true,
32539 clobberFlags: true,
32540 faultOnNilArg0: true,
32541 hasSideEffects: true,
32542 reg: regInfo{
32543 inputs: []inputInfo{
32544 {1, 1073733624},
32545 {2, 1073733624},
32546 {0, 1073733630},
32547 },
32548 outputs: []outputInfo{
32549 {0, 1073733624},
32550 },
32551 },
32552 },
32553 {
32554 name: "LoweredAtomicAnd8",
32555 argLen: 3,
32556 faultOnNilArg0: true,
32557 hasSideEffects: true,
32558 asm: ppc64.AAND,
32559 reg: regInfo{
32560 inputs: []inputInfo{
32561 {0, 1073733630},
32562 {1, 1073733630},
32563 },
32564 },
32565 },
32566 {
32567 name: "LoweredAtomicAnd32",
32568 argLen: 3,
32569 faultOnNilArg0: true,
32570 hasSideEffects: true,
32571 asm: ppc64.AAND,
32572 reg: regInfo{
32573 inputs: []inputInfo{
32574 {0, 1073733630},
32575 {1, 1073733630},
32576 },
32577 },
32578 },
32579 {
32580 name: "LoweredAtomicOr8",
32581 argLen: 3,
32582 faultOnNilArg0: true,
32583 hasSideEffects: true,
32584 asm: ppc64.AOR,
32585 reg: regInfo{
32586 inputs: []inputInfo{
32587 {0, 1073733630},
32588 {1, 1073733630},
32589 },
32590 },
32591 },
32592 {
32593 name: "LoweredAtomicOr32",
32594 argLen: 3,
32595 faultOnNilArg0: true,
32596 hasSideEffects: true,
32597 asm: ppc64.AOR,
32598 reg: regInfo{
32599 inputs: []inputInfo{
32600 {0, 1073733630},
32601 {1, 1073733630},
32602 },
32603 },
32604 },
32605 {
32606 name: "LoweredWB",
32607 auxType: auxInt64,
32608 argLen: 1,
32609 clobberFlags: true,
32610 reg: regInfo{
32611 clobbers: 18446744072632408064,
32612 outputs: []outputInfo{
32613 {0, 536870912},
32614 },
32615 },
32616 },
32617 {
32618 name: "LoweredPubBarrier",
32619 argLen: 1,
32620 hasSideEffects: true,
32621 asm: ppc64.ALWSYNC,
32622 reg: regInfo{},
32623 },
32624 {
32625 name: "LoweredPanicBoundsA",
32626 auxType: auxInt64,
32627 argLen: 3,
32628 call: true,
32629 reg: regInfo{
32630 inputs: []inputInfo{
32631 {0, 32},
32632 {1, 64},
32633 },
32634 },
32635 },
32636 {
32637 name: "LoweredPanicBoundsB",
32638 auxType: auxInt64,
32639 argLen: 3,
32640 call: true,
32641 reg: regInfo{
32642 inputs: []inputInfo{
32643 {0, 16},
32644 {1, 32},
32645 },
32646 },
32647 },
32648 {
32649 name: "LoweredPanicBoundsC",
32650 auxType: auxInt64,
32651 argLen: 3,
32652 call: true,
32653 reg: regInfo{
32654 inputs: []inputInfo{
32655 {0, 8},
32656 {1, 16},
32657 },
32658 },
32659 },
32660 {
32661 name: "InvertFlags",
32662 argLen: 1,
32663 reg: regInfo{},
32664 },
32665 {
32666 name: "FlagEQ",
32667 argLen: 0,
32668 reg: regInfo{},
32669 },
32670 {
32671 name: "FlagLT",
32672 argLen: 0,
32673 reg: regInfo{},
32674 },
32675 {
32676 name: "FlagGT",
32677 argLen: 0,
32678 reg: regInfo{},
32679 },
32680
32681 {
32682 name: "ADD",
32683 argLen: 2,
32684 commutative: true,
32685 asm: riscv.AADD,
32686 reg: regInfo{
32687 inputs: []inputInfo{
32688 {0, 1006632944},
32689 {1, 1006632944},
32690 },
32691 outputs: []outputInfo{
32692 {0, 1006632944},
32693 },
32694 },
32695 },
32696 {
32697 name: "ADDI",
32698 auxType: auxInt64,
32699 argLen: 1,
32700 asm: riscv.AADDI,
32701 reg: regInfo{
32702 inputs: []inputInfo{
32703 {0, 9223372037861408754},
32704 },
32705 outputs: []outputInfo{
32706 {0, 1006632944},
32707 },
32708 },
32709 },
32710 {
32711 name: "ADDIW",
32712 auxType: auxInt64,
32713 argLen: 1,
32714 asm: riscv.AADDIW,
32715 reg: regInfo{
32716 inputs: []inputInfo{
32717 {0, 1006632944},
32718 },
32719 outputs: []outputInfo{
32720 {0, 1006632944},
32721 },
32722 },
32723 },
32724 {
32725 name: "NEG",
32726 argLen: 1,
32727 asm: riscv.ANEG,
32728 reg: regInfo{
32729 inputs: []inputInfo{
32730 {0, 1006632944},
32731 },
32732 outputs: []outputInfo{
32733 {0, 1006632944},
32734 },
32735 },
32736 },
32737 {
32738 name: "NEGW",
32739 argLen: 1,
32740 asm: riscv.ANEGW,
32741 reg: regInfo{
32742 inputs: []inputInfo{
32743 {0, 1006632944},
32744 },
32745 outputs: []outputInfo{
32746 {0, 1006632944},
32747 },
32748 },
32749 },
32750 {
32751 name: "SUB",
32752 argLen: 2,
32753 asm: riscv.ASUB,
32754 reg: regInfo{
32755 inputs: []inputInfo{
32756 {0, 1006632944},
32757 {1, 1006632944},
32758 },
32759 outputs: []outputInfo{
32760 {0, 1006632944},
32761 },
32762 },
32763 },
32764 {
32765 name: "SUBW",
32766 argLen: 2,
32767 asm: riscv.ASUBW,
32768 reg: regInfo{
32769 inputs: []inputInfo{
32770 {0, 1006632944},
32771 {1, 1006632944},
32772 },
32773 outputs: []outputInfo{
32774 {0, 1006632944},
32775 },
32776 },
32777 },
32778 {
32779 name: "MUL",
32780 argLen: 2,
32781 commutative: true,
32782 asm: riscv.AMUL,
32783 reg: regInfo{
32784 inputs: []inputInfo{
32785 {0, 1006632944},
32786 {1, 1006632944},
32787 },
32788 outputs: []outputInfo{
32789 {0, 1006632944},
32790 },
32791 },
32792 },
32793 {
32794 name: "MULW",
32795 argLen: 2,
32796 commutative: true,
32797 asm: riscv.AMULW,
32798 reg: regInfo{
32799 inputs: []inputInfo{
32800 {0, 1006632944},
32801 {1, 1006632944},
32802 },
32803 outputs: []outputInfo{
32804 {0, 1006632944},
32805 },
32806 },
32807 },
32808 {
32809 name: "MULH",
32810 argLen: 2,
32811 commutative: true,
32812 asm: riscv.AMULH,
32813 reg: regInfo{
32814 inputs: []inputInfo{
32815 {0, 1006632944},
32816 {1, 1006632944},
32817 },
32818 outputs: []outputInfo{
32819 {0, 1006632944},
32820 },
32821 },
32822 },
32823 {
32824 name: "MULHU",
32825 argLen: 2,
32826 commutative: true,
32827 asm: riscv.AMULHU,
32828 reg: regInfo{
32829 inputs: []inputInfo{
32830 {0, 1006632944},
32831 {1, 1006632944},
32832 },
32833 outputs: []outputInfo{
32834 {0, 1006632944},
32835 },
32836 },
32837 },
32838 {
32839 name: "LoweredMuluhilo",
32840 argLen: 2,
32841 resultNotInArgs: true,
32842 reg: regInfo{
32843 inputs: []inputInfo{
32844 {0, 1006632944},
32845 {1, 1006632944},
32846 },
32847 outputs: []outputInfo{
32848 {0, 1006632944},
32849 {1, 1006632944},
32850 },
32851 },
32852 },
32853 {
32854 name: "LoweredMuluover",
32855 argLen: 2,
32856 resultNotInArgs: true,
32857 reg: regInfo{
32858 inputs: []inputInfo{
32859 {0, 1006632944},
32860 {1, 1006632944},
32861 },
32862 outputs: []outputInfo{
32863 {0, 1006632944},
32864 {1, 1006632944},
32865 },
32866 },
32867 },
32868 {
32869 name: "DIV",
32870 argLen: 2,
32871 asm: riscv.ADIV,
32872 reg: regInfo{
32873 inputs: []inputInfo{
32874 {0, 1006632944},
32875 {1, 1006632944},
32876 },
32877 outputs: []outputInfo{
32878 {0, 1006632944},
32879 },
32880 },
32881 },
32882 {
32883 name: "DIVU",
32884 argLen: 2,
32885 asm: riscv.ADIVU,
32886 reg: regInfo{
32887 inputs: []inputInfo{
32888 {0, 1006632944},
32889 {1, 1006632944},
32890 },
32891 outputs: []outputInfo{
32892 {0, 1006632944},
32893 },
32894 },
32895 },
32896 {
32897 name: "DIVW",
32898 argLen: 2,
32899 asm: riscv.ADIVW,
32900 reg: regInfo{
32901 inputs: []inputInfo{
32902 {0, 1006632944},
32903 {1, 1006632944},
32904 },
32905 outputs: []outputInfo{
32906 {0, 1006632944},
32907 },
32908 },
32909 },
32910 {
32911 name: "DIVUW",
32912 argLen: 2,
32913 asm: riscv.ADIVUW,
32914 reg: regInfo{
32915 inputs: []inputInfo{
32916 {0, 1006632944},
32917 {1, 1006632944},
32918 },
32919 outputs: []outputInfo{
32920 {0, 1006632944},
32921 },
32922 },
32923 },
32924 {
32925 name: "REM",
32926 argLen: 2,
32927 asm: riscv.AREM,
32928 reg: regInfo{
32929 inputs: []inputInfo{
32930 {0, 1006632944},
32931 {1, 1006632944},
32932 },
32933 outputs: []outputInfo{
32934 {0, 1006632944},
32935 },
32936 },
32937 },
32938 {
32939 name: "REMU",
32940 argLen: 2,
32941 asm: riscv.AREMU,
32942 reg: regInfo{
32943 inputs: []inputInfo{
32944 {0, 1006632944},
32945 {1, 1006632944},
32946 },
32947 outputs: []outputInfo{
32948 {0, 1006632944},
32949 },
32950 },
32951 },
32952 {
32953 name: "REMW",
32954 argLen: 2,
32955 asm: riscv.AREMW,
32956 reg: regInfo{
32957 inputs: []inputInfo{
32958 {0, 1006632944},
32959 {1, 1006632944},
32960 },
32961 outputs: []outputInfo{
32962 {0, 1006632944},
32963 },
32964 },
32965 },
32966 {
32967 name: "REMUW",
32968 argLen: 2,
32969 asm: riscv.AREMUW,
32970 reg: regInfo{
32971 inputs: []inputInfo{
32972 {0, 1006632944},
32973 {1, 1006632944},
32974 },
32975 outputs: []outputInfo{
32976 {0, 1006632944},
32977 },
32978 },
32979 },
32980 {
32981 name: "MOVaddr",
32982 auxType: auxSymOff,
32983 argLen: 1,
32984 rematerializeable: true,
32985 symEffect: SymAddr,
32986 asm: riscv.AMOV,
32987 reg: regInfo{
32988 inputs: []inputInfo{
32989 {0, 9223372037861408754},
32990 },
32991 outputs: []outputInfo{
32992 {0, 1006632944},
32993 },
32994 },
32995 },
32996 {
32997 name: "MOVDconst",
32998 auxType: auxInt64,
32999 argLen: 0,
33000 rematerializeable: true,
33001 asm: riscv.AMOV,
33002 reg: regInfo{
33003 outputs: []outputInfo{
33004 {0, 1006632944},
33005 },
33006 },
33007 },
33008 {
33009 name: "MOVBload",
33010 auxType: auxSymOff,
33011 argLen: 2,
33012 faultOnNilArg0: true,
33013 symEffect: SymRead,
33014 asm: riscv.AMOVB,
33015 reg: regInfo{
33016 inputs: []inputInfo{
33017 {0, 9223372037861408754},
33018 },
33019 outputs: []outputInfo{
33020 {0, 1006632944},
33021 },
33022 },
33023 },
33024 {
33025 name: "MOVHload",
33026 auxType: auxSymOff,
33027 argLen: 2,
33028 faultOnNilArg0: true,
33029 symEffect: SymRead,
33030 asm: riscv.AMOVH,
33031 reg: regInfo{
33032 inputs: []inputInfo{
33033 {0, 9223372037861408754},
33034 },
33035 outputs: []outputInfo{
33036 {0, 1006632944},
33037 },
33038 },
33039 },
33040 {
33041 name: "MOVWload",
33042 auxType: auxSymOff,
33043 argLen: 2,
33044 faultOnNilArg0: true,
33045 symEffect: SymRead,
33046 asm: riscv.AMOVW,
33047 reg: regInfo{
33048 inputs: []inputInfo{
33049 {0, 9223372037861408754},
33050 },
33051 outputs: []outputInfo{
33052 {0, 1006632944},
33053 },
33054 },
33055 },
33056 {
33057 name: "MOVDload",
33058 auxType: auxSymOff,
33059 argLen: 2,
33060 faultOnNilArg0: true,
33061 symEffect: SymRead,
33062 asm: riscv.AMOV,
33063 reg: regInfo{
33064 inputs: []inputInfo{
33065 {0, 9223372037861408754},
33066 },
33067 outputs: []outputInfo{
33068 {0, 1006632944},
33069 },
33070 },
33071 },
33072 {
33073 name: "MOVBUload",
33074 auxType: auxSymOff,
33075 argLen: 2,
33076 faultOnNilArg0: true,
33077 symEffect: SymRead,
33078 asm: riscv.AMOVBU,
33079 reg: regInfo{
33080 inputs: []inputInfo{
33081 {0, 9223372037861408754},
33082 },
33083 outputs: []outputInfo{
33084 {0, 1006632944},
33085 },
33086 },
33087 },
33088 {
33089 name: "MOVHUload",
33090 auxType: auxSymOff,
33091 argLen: 2,
33092 faultOnNilArg0: true,
33093 symEffect: SymRead,
33094 asm: riscv.AMOVHU,
33095 reg: regInfo{
33096 inputs: []inputInfo{
33097 {0, 9223372037861408754},
33098 },
33099 outputs: []outputInfo{
33100 {0, 1006632944},
33101 },
33102 },
33103 },
33104 {
33105 name: "MOVWUload",
33106 auxType: auxSymOff,
33107 argLen: 2,
33108 faultOnNilArg0: true,
33109 symEffect: SymRead,
33110 asm: riscv.AMOVWU,
33111 reg: regInfo{
33112 inputs: []inputInfo{
33113 {0, 9223372037861408754},
33114 },
33115 outputs: []outputInfo{
33116 {0, 1006632944},
33117 },
33118 },
33119 },
33120 {
33121 name: "MOVBstore",
33122 auxType: auxSymOff,
33123 argLen: 3,
33124 faultOnNilArg0: true,
33125 symEffect: SymWrite,
33126 asm: riscv.AMOVB,
33127 reg: regInfo{
33128 inputs: []inputInfo{
33129 {1, 1006632946},
33130 {0, 9223372037861408754},
33131 },
33132 },
33133 },
33134 {
33135 name: "MOVHstore",
33136 auxType: auxSymOff,
33137 argLen: 3,
33138 faultOnNilArg0: true,
33139 symEffect: SymWrite,
33140 asm: riscv.AMOVH,
33141 reg: regInfo{
33142 inputs: []inputInfo{
33143 {1, 1006632946},
33144 {0, 9223372037861408754},
33145 },
33146 },
33147 },
33148 {
33149 name: "MOVWstore",
33150 auxType: auxSymOff,
33151 argLen: 3,
33152 faultOnNilArg0: true,
33153 symEffect: SymWrite,
33154 asm: riscv.AMOVW,
33155 reg: regInfo{
33156 inputs: []inputInfo{
33157 {1, 1006632946},
33158 {0, 9223372037861408754},
33159 },
33160 },
33161 },
33162 {
33163 name: "MOVDstore",
33164 auxType: auxSymOff,
33165 argLen: 3,
33166 faultOnNilArg0: true,
33167 symEffect: SymWrite,
33168 asm: riscv.AMOV,
33169 reg: regInfo{
33170 inputs: []inputInfo{
33171 {1, 1006632946},
33172 {0, 9223372037861408754},
33173 },
33174 },
33175 },
33176 {
33177 name: "MOVBstorezero",
33178 auxType: auxSymOff,
33179 argLen: 2,
33180 faultOnNilArg0: true,
33181 symEffect: SymWrite,
33182 asm: riscv.AMOVB,
33183 reg: regInfo{
33184 inputs: []inputInfo{
33185 {0, 9223372037861408754},
33186 },
33187 },
33188 },
33189 {
33190 name: "MOVHstorezero",
33191 auxType: auxSymOff,
33192 argLen: 2,
33193 faultOnNilArg0: true,
33194 symEffect: SymWrite,
33195 asm: riscv.AMOVH,
33196 reg: regInfo{
33197 inputs: []inputInfo{
33198 {0, 9223372037861408754},
33199 },
33200 },
33201 },
33202 {
33203 name: "MOVWstorezero",
33204 auxType: auxSymOff,
33205 argLen: 2,
33206 faultOnNilArg0: true,
33207 symEffect: SymWrite,
33208 asm: riscv.AMOVW,
33209 reg: regInfo{
33210 inputs: []inputInfo{
33211 {0, 9223372037861408754},
33212 },
33213 },
33214 },
33215 {
33216 name: "MOVDstorezero",
33217 auxType: auxSymOff,
33218 argLen: 2,
33219 faultOnNilArg0: true,
33220 symEffect: SymWrite,
33221 asm: riscv.AMOV,
33222 reg: regInfo{
33223 inputs: []inputInfo{
33224 {0, 9223372037861408754},
33225 },
33226 },
33227 },
33228 {
33229 name: "MOVBreg",
33230 argLen: 1,
33231 asm: riscv.AMOVB,
33232 reg: regInfo{
33233 inputs: []inputInfo{
33234 {0, 1006632944},
33235 },
33236 outputs: []outputInfo{
33237 {0, 1006632944},
33238 },
33239 },
33240 },
33241 {
33242 name: "MOVHreg",
33243 argLen: 1,
33244 asm: riscv.AMOVH,
33245 reg: regInfo{
33246 inputs: []inputInfo{
33247 {0, 1006632944},
33248 },
33249 outputs: []outputInfo{
33250 {0, 1006632944},
33251 },
33252 },
33253 },
33254 {
33255 name: "MOVWreg",
33256 argLen: 1,
33257 asm: riscv.AMOVW,
33258 reg: regInfo{
33259 inputs: []inputInfo{
33260 {0, 1006632944},
33261 },
33262 outputs: []outputInfo{
33263 {0, 1006632944},
33264 },
33265 },
33266 },
33267 {
33268 name: "MOVDreg",
33269 argLen: 1,
33270 asm: riscv.AMOV,
33271 reg: regInfo{
33272 inputs: []inputInfo{
33273 {0, 1006632944},
33274 },
33275 outputs: []outputInfo{
33276 {0, 1006632944},
33277 },
33278 },
33279 },
33280 {
33281 name: "MOVBUreg",
33282 argLen: 1,
33283 asm: riscv.AMOVBU,
33284 reg: regInfo{
33285 inputs: []inputInfo{
33286 {0, 1006632944},
33287 },
33288 outputs: []outputInfo{
33289 {0, 1006632944},
33290 },
33291 },
33292 },
33293 {
33294 name: "MOVHUreg",
33295 argLen: 1,
33296 asm: riscv.AMOVHU,
33297 reg: regInfo{
33298 inputs: []inputInfo{
33299 {0, 1006632944},
33300 },
33301 outputs: []outputInfo{
33302 {0, 1006632944},
33303 },
33304 },
33305 },
33306 {
33307 name: "MOVWUreg",
33308 argLen: 1,
33309 asm: riscv.AMOVWU,
33310 reg: regInfo{
33311 inputs: []inputInfo{
33312 {0, 1006632944},
33313 },
33314 outputs: []outputInfo{
33315 {0, 1006632944},
33316 },
33317 },
33318 },
33319 {
33320 name: "MOVDnop",
33321 argLen: 1,
33322 resultInArg0: true,
33323 reg: regInfo{
33324 inputs: []inputInfo{
33325 {0, 1006632944},
33326 },
33327 outputs: []outputInfo{
33328 {0, 1006632944},
33329 },
33330 },
33331 },
33332 {
33333 name: "SLL",
33334 argLen: 2,
33335 asm: riscv.ASLL,
33336 reg: regInfo{
33337 inputs: []inputInfo{
33338 {0, 1006632944},
33339 {1, 1006632944},
33340 },
33341 outputs: []outputInfo{
33342 {0, 1006632944},
33343 },
33344 },
33345 },
33346 {
33347 name: "SLLW",
33348 argLen: 2,
33349 asm: riscv.ASLLW,
33350 reg: regInfo{
33351 inputs: []inputInfo{
33352 {0, 1006632944},
33353 {1, 1006632944},
33354 },
33355 outputs: []outputInfo{
33356 {0, 1006632944},
33357 },
33358 },
33359 },
33360 {
33361 name: "SRA",
33362 argLen: 2,
33363 asm: riscv.ASRA,
33364 reg: regInfo{
33365 inputs: []inputInfo{
33366 {0, 1006632944},
33367 {1, 1006632944},
33368 },
33369 outputs: []outputInfo{
33370 {0, 1006632944},
33371 },
33372 },
33373 },
33374 {
33375 name: "SRAW",
33376 argLen: 2,
33377 asm: riscv.ASRAW,
33378 reg: regInfo{
33379 inputs: []inputInfo{
33380 {0, 1006632944},
33381 {1, 1006632944},
33382 },
33383 outputs: []outputInfo{
33384 {0, 1006632944},
33385 },
33386 },
33387 },
33388 {
33389 name: "SRL",
33390 argLen: 2,
33391 asm: riscv.ASRL,
33392 reg: regInfo{
33393 inputs: []inputInfo{
33394 {0, 1006632944},
33395 {1, 1006632944},
33396 },
33397 outputs: []outputInfo{
33398 {0, 1006632944},
33399 },
33400 },
33401 },
33402 {
33403 name: "SRLW",
33404 argLen: 2,
33405 asm: riscv.ASRLW,
33406 reg: regInfo{
33407 inputs: []inputInfo{
33408 {0, 1006632944},
33409 {1, 1006632944},
33410 },
33411 outputs: []outputInfo{
33412 {0, 1006632944},
33413 },
33414 },
33415 },
33416 {
33417 name: "SLLI",
33418 auxType: auxInt64,
33419 argLen: 1,
33420 asm: riscv.ASLLI,
33421 reg: regInfo{
33422 inputs: []inputInfo{
33423 {0, 1006632944},
33424 },
33425 outputs: []outputInfo{
33426 {0, 1006632944},
33427 },
33428 },
33429 },
33430 {
33431 name: "SLLIW",
33432 auxType: auxInt64,
33433 argLen: 1,
33434 asm: riscv.ASLLIW,
33435 reg: regInfo{
33436 inputs: []inputInfo{
33437 {0, 1006632944},
33438 },
33439 outputs: []outputInfo{
33440 {0, 1006632944},
33441 },
33442 },
33443 },
33444 {
33445 name: "SRAI",
33446 auxType: auxInt64,
33447 argLen: 1,
33448 asm: riscv.ASRAI,
33449 reg: regInfo{
33450 inputs: []inputInfo{
33451 {0, 1006632944},
33452 },
33453 outputs: []outputInfo{
33454 {0, 1006632944},
33455 },
33456 },
33457 },
33458 {
33459 name: "SRAIW",
33460 auxType: auxInt64,
33461 argLen: 1,
33462 asm: riscv.ASRAIW,
33463 reg: regInfo{
33464 inputs: []inputInfo{
33465 {0, 1006632944},
33466 },
33467 outputs: []outputInfo{
33468 {0, 1006632944},
33469 },
33470 },
33471 },
33472 {
33473 name: "SRLI",
33474 auxType: auxInt64,
33475 argLen: 1,
33476 asm: riscv.ASRLI,
33477 reg: regInfo{
33478 inputs: []inputInfo{
33479 {0, 1006632944},
33480 },
33481 outputs: []outputInfo{
33482 {0, 1006632944},
33483 },
33484 },
33485 },
33486 {
33487 name: "SRLIW",
33488 auxType: auxInt64,
33489 argLen: 1,
33490 asm: riscv.ASRLIW,
33491 reg: regInfo{
33492 inputs: []inputInfo{
33493 {0, 1006632944},
33494 },
33495 outputs: []outputInfo{
33496 {0, 1006632944},
33497 },
33498 },
33499 },
33500 {
33501 name: "SH1ADD",
33502 argLen: 2,
33503 asm: riscv.ASH1ADD,
33504 reg: regInfo{
33505 inputs: []inputInfo{
33506 {0, 1006632944},
33507 {1, 1006632944},
33508 },
33509 outputs: []outputInfo{
33510 {0, 1006632944},
33511 },
33512 },
33513 },
33514 {
33515 name: "SH2ADD",
33516 argLen: 2,
33517 asm: riscv.ASH2ADD,
33518 reg: regInfo{
33519 inputs: []inputInfo{
33520 {0, 1006632944},
33521 {1, 1006632944},
33522 },
33523 outputs: []outputInfo{
33524 {0, 1006632944},
33525 },
33526 },
33527 },
33528 {
33529 name: "SH3ADD",
33530 argLen: 2,
33531 asm: riscv.ASH3ADD,
33532 reg: regInfo{
33533 inputs: []inputInfo{
33534 {0, 1006632944},
33535 {1, 1006632944},
33536 },
33537 outputs: []outputInfo{
33538 {0, 1006632944},
33539 },
33540 },
33541 },
33542 {
33543 name: "AND",
33544 argLen: 2,
33545 commutative: true,
33546 asm: riscv.AAND,
33547 reg: regInfo{
33548 inputs: []inputInfo{
33549 {0, 1006632944},
33550 {1, 1006632944},
33551 },
33552 outputs: []outputInfo{
33553 {0, 1006632944},
33554 },
33555 },
33556 },
33557 {
33558 name: "ANDN",
33559 argLen: 2,
33560 asm: riscv.AANDN,
33561 reg: regInfo{
33562 inputs: []inputInfo{
33563 {0, 1006632944},
33564 {1, 1006632944},
33565 },
33566 outputs: []outputInfo{
33567 {0, 1006632944},
33568 },
33569 },
33570 },
33571 {
33572 name: "ANDI",
33573 auxType: auxInt64,
33574 argLen: 1,
33575 asm: riscv.AANDI,
33576 reg: regInfo{
33577 inputs: []inputInfo{
33578 {0, 1006632944},
33579 },
33580 outputs: []outputInfo{
33581 {0, 1006632944},
33582 },
33583 },
33584 },
33585 {
33586 name: "NOT",
33587 argLen: 1,
33588 asm: riscv.ANOT,
33589 reg: regInfo{
33590 inputs: []inputInfo{
33591 {0, 1006632944},
33592 },
33593 outputs: []outputInfo{
33594 {0, 1006632944},
33595 },
33596 },
33597 },
33598 {
33599 name: "OR",
33600 argLen: 2,
33601 commutative: true,
33602 asm: riscv.AOR,
33603 reg: regInfo{
33604 inputs: []inputInfo{
33605 {0, 1006632944},
33606 {1, 1006632944},
33607 },
33608 outputs: []outputInfo{
33609 {0, 1006632944},
33610 },
33611 },
33612 },
33613 {
33614 name: "ORN",
33615 argLen: 2,
33616 asm: riscv.AORN,
33617 reg: regInfo{
33618 inputs: []inputInfo{
33619 {0, 1006632944},
33620 {1, 1006632944},
33621 },
33622 outputs: []outputInfo{
33623 {0, 1006632944},
33624 },
33625 },
33626 },
33627 {
33628 name: "ORI",
33629 auxType: auxInt64,
33630 argLen: 1,
33631 asm: riscv.AORI,
33632 reg: regInfo{
33633 inputs: []inputInfo{
33634 {0, 1006632944},
33635 },
33636 outputs: []outputInfo{
33637 {0, 1006632944},
33638 },
33639 },
33640 },
33641 {
33642 name: "ROL",
33643 argLen: 2,
33644 asm: riscv.AROL,
33645 reg: regInfo{
33646 inputs: []inputInfo{
33647 {0, 1006632944},
33648 {1, 1006632944},
33649 },
33650 outputs: []outputInfo{
33651 {0, 1006632944},
33652 },
33653 },
33654 },
33655 {
33656 name: "ROLW",
33657 argLen: 2,
33658 asm: riscv.AROLW,
33659 reg: regInfo{
33660 inputs: []inputInfo{
33661 {0, 1006632944},
33662 {1, 1006632944},
33663 },
33664 outputs: []outputInfo{
33665 {0, 1006632944},
33666 },
33667 },
33668 },
33669 {
33670 name: "ROR",
33671 argLen: 2,
33672 asm: riscv.AROR,
33673 reg: regInfo{
33674 inputs: []inputInfo{
33675 {0, 1006632944},
33676 {1, 1006632944},
33677 },
33678 outputs: []outputInfo{
33679 {0, 1006632944},
33680 },
33681 },
33682 },
33683 {
33684 name: "RORI",
33685 auxType: auxInt64,
33686 argLen: 1,
33687 asm: riscv.ARORI,
33688 reg: regInfo{
33689 inputs: []inputInfo{
33690 {0, 1006632944},
33691 },
33692 outputs: []outputInfo{
33693 {0, 1006632944},
33694 },
33695 },
33696 },
33697 {
33698 name: "RORIW",
33699 auxType: auxInt64,
33700 argLen: 1,
33701 asm: riscv.ARORIW,
33702 reg: regInfo{
33703 inputs: []inputInfo{
33704 {0, 1006632944},
33705 },
33706 outputs: []outputInfo{
33707 {0, 1006632944},
33708 },
33709 },
33710 },
33711 {
33712 name: "RORW",
33713 argLen: 2,
33714 asm: riscv.ARORW,
33715 reg: regInfo{
33716 inputs: []inputInfo{
33717 {0, 1006632944},
33718 {1, 1006632944},
33719 },
33720 outputs: []outputInfo{
33721 {0, 1006632944},
33722 },
33723 },
33724 },
33725 {
33726 name: "XNOR",
33727 argLen: 2,
33728 commutative: true,
33729 asm: riscv.AXNOR,
33730 reg: regInfo{
33731 inputs: []inputInfo{
33732 {0, 1006632944},
33733 {1, 1006632944},
33734 },
33735 outputs: []outputInfo{
33736 {0, 1006632944},
33737 },
33738 },
33739 },
33740 {
33741 name: "XOR",
33742 argLen: 2,
33743 commutative: true,
33744 asm: riscv.AXOR,
33745 reg: regInfo{
33746 inputs: []inputInfo{
33747 {0, 1006632944},
33748 {1, 1006632944},
33749 },
33750 outputs: []outputInfo{
33751 {0, 1006632944},
33752 },
33753 },
33754 },
33755 {
33756 name: "XORI",
33757 auxType: auxInt64,
33758 argLen: 1,
33759 asm: riscv.AXORI,
33760 reg: regInfo{
33761 inputs: []inputInfo{
33762 {0, 1006632944},
33763 },
33764 outputs: []outputInfo{
33765 {0, 1006632944},
33766 },
33767 },
33768 },
33769 {
33770 name: "MIN",
33771 argLen: 2,
33772 commutative: true,
33773 asm: riscv.AMIN,
33774 reg: regInfo{
33775 inputs: []inputInfo{
33776 {0, 1006632944},
33777 {1, 1006632944},
33778 },
33779 outputs: []outputInfo{
33780 {0, 1006632944},
33781 },
33782 },
33783 },
33784 {
33785 name: "MAX",
33786 argLen: 2,
33787 commutative: true,
33788 asm: riscv.AMAX,
33789 reg: regInfo{
33790 inputs: []inputInfo{
33791 {0, 1006632944},
33792 {1, 1006632944},
33793 },
33794 outputs: []outputInfo{
33795 {0, 1006632944},
33796 },
33797 },
33798 },
33799 {
33800 name: "MINU",
33801 argLen: 2,
33802 commutative: true,
33803 asm: riscv.AMINU,
33804 reg: regInfo{
33805 inputs: []inputInfo{
33806 {0, 1006632944},
33807 {1, 1006632944},
33808 },
33809 outputs: []outputInfo{
33810 {0, 1006632944},
33811 },
33812 },
33813 },
33814 {
33815 name: "MAXU",
33816 argLen: 2,
33817 commutative: true,
33818 asm: riscv.AMAXU,
33819 reg: regInfo{
33820 inputs: []inputInfo{
33821 {0, 1006632944},
33822 {1, 1006632944},
33823 },
33824 outputs: []outputInfo{
33825 {0, 1006632944},
33826 },
33827 },
33828 },
33829 {
33830 name: "SEQZ",
33831 argLen: 1,
33832 asm: riscv.ASEQZ,
33833 reg: regInfo{
33834 inputs: []inputInfo{
33835 {0, 1006632944},
33836 },
33837 outputs: []outputInfo{
33838 {0, 1006632944},
33839 },
33840 },
33841 },
33842 {
33843 name: "SNEZ",
33844 argLen: 1,
33845 asm: riscv.ASNEZ,
33846 reg: regInfo{
33847 inputs: []inputInfo{
33848 {0, 1006632944},
33849 },
33850 outputs: []outputInfo{
33851 {0, 1006632944},
33852 },
33853 },
33854 },
33855 {
33856 name: "SLT",
33857 argLen: 2,
33858 asm: riscv.ASLT,
33859 reg: regInfo{
33860 inputs: []inputInfo{
33861 {0, 1006632944},
33862 {1, 1006632944},
33863 },
33864 outputs: []outputInfo{
33865 {0, 1006632944},
33866 },
33867 },
33868 },
33869 {
33870 name: "SLTI",
33871 auxType: auxInt64,
33872 argLen: 1,
33873 asm: riscv.ASLTI,
33874 reg: regInfo{
33875 inputs: []inputInfo{
33876 {0, 1006632944},
33877 },
33878 outputs: []outputInfo{
33879 {0, 1006632944},
33880 },
33881 },
33882 },
33883 {
33884 name: "SLTU",
33885 argLen: 2,
33886 asm: riscv.ASLTU,
33887 reg: regInfo{
33888 inputs: []inputInfo{
33889 {0, 1006632944},
33890 {1, 1006632944},
33891 },
33892 outputs: []outputInfo{
33893 {0, 1006632944},
33894 },
33895 },
33896 },
33897 {
33898 name: "SLTIU",
33899 auxType: auxInt64,
33900 argLen: 1,
33901 asm: riscv.ASLTIU,
33902 reg: regInfo{
33903 inputs: []inputInfo{
33904 {0, 1006632944},
33905 },
33906 outputs: []outputInfo{
33907 {0, 1006632944},
33908 },
33909 },
33910 },
33911 {
33912 name: "LoweredRound32F",
33913 argLen: 1,
33914 resultInArg0: true,
33915 reg: regInfo{
33916 inputs: []inputInfo{
33917 {0, 9223372034707292160},
33918 },
33919 outputs: []outputInfo{
33920 {0, 9223372034707292160},
33921 },
33922 },
33923 },
33924 {
33925 name: "LoweredRound64F",
33926 argLen: 1,
33927 resultInArg0: true,
33928 reg: regInfo{
33929 inputs: []inputInfo{
33930 {0, 9223372034707292160},
33931 },
33932 outputs: []outputInfo{
33933 {0, 9223372034707292160},
33934 },
33935 },
33936 },
33937 {
33938 name: "CALLstatic",
33939 auxType: auxCallOff,
33940 argLen: -1,
33941 call: true,
33942 reg: regInfo{
33943 clobbers: 9223372035781033968,
33944 },
33945 },
33946 {
33947 name: "CALLtail",
33948 auxType: auxCallOff,
33949 argLen: -1,
33950 call: true,
33951 tailCall: true,
33952 reg: regInfo{
33953 clobbers: 9223372035781033968,
33954 },
33955 },
33956 {
33957 name: "CALLclosure",
33958 auxType: auxCallOff,
33959 argLen: -1,
33960 call: true,
33961 reg: regInfo{
33962 inputs: []inputInfo{
33963 {1, 33554432},
33964 {0, 1006632946},
33965 },
33966 clobbers: 9223372035781033968,
33967 },
33968 },
33969 {
33970 name: "CALLinter",
33971 auxType: auxCallOff,
33972 argLen: -1,
33973 call: true,
33974 reg: regInfo{
33975 inputs: []inputInfo{
33976 {0, 1006632944},
33977 },
33978 clobbers: 9223372035781033968,
33979 },
33980 },
33981 {
33982 name: "DUFFZERO",
33983 auxType: auxInt64,
33984 argLen: 2,
33985 faultOnNilArg0: true,
33986 reg: regInfo{
33987 inputs: []inputInfo{
33988 {0, 16777216},
33989 },
33990 clobbers: 16777216,
33991 },
33992 },
33993 {
33994 name: "DUFFCOPY",
33995 auxType: auxInt64,
33996 argLen: 3,
33997 faultOnNilArg0: true,
33998 faultOnNilArg1: true,
33999 reg: regInfo{
34000 inputs: []inputInfo{
34001 {0, 16777216},
34002 {1, 8388608},
34003 },
34004 clobbers: 25165824,
34005 },
34006 },
34007 {
34008 name: "LoweredZero",
34009 auxType: auxInt64,
34010 argLen: 3,
34011 faultOnNilArg0: true,
34012 reg: regInfo{
34013 inputs: []inputInfo{
34014 {0, 16},
34015 {1, 1006632944},
34016 },
34017 clobbers: 16,
34018 },
34019 },
34020 {
34021 name: "LoweredMove",
34022 auxType: auxInt64,
34023 argLen: 4,
34024 faultOnNilArg0: true,
34025 faultOnNilArg1: true,
34026 reg: regInfo{
34027 inputs: []inputInfo{
34028 {0, 16},
34029 {1, 32},
34030 {2, 1006632880},
34031 },
34032 clobbers: 112,
34033 },
34034 },
34035 {
34036 name: "LoweredAtomicLoad8",
34037 argLen: 2,
34038 faultOnNilArg0: true,
34039 reg: regInfo{
34040 inputs: []inputInfo{
34041 {0, 9223372037861408754},
34042 },
34043 outputs: []outputInfo{
34044 {0, 1006632944},
34045 },
34046 },
34047 },
34048 {
34049 name: "LoweredAtomicLoad32",
34050 argLen: 2,
34051 faultOnNilArg0: true,
34052 reg: regInfo{
34053 inputs: []inputInfo{
34054 {0, 9223372037861408754},
34055 },
34056 outputs: []outputInfo{
34057 {0, 1006632944},
34058 },
34059 },
34060 },
34061 {
34062 name: "LoweredAtomicLoad64",
34063 argLen: 2,
34064 faultOnNilArg0: true,
34065 reg: regInfo{
34066 inputs: []inputInfo{
34067 {0, 9223372037861408754},
34068 },
34069 outputs: []outputInfo{
34070 {0, 1006632944},
34071 },
34072 },
34073 },
34074 {
34075 name: "LoweredAtomicStore8",
34076 argLen: 3,
34077 faultOnNilArg0: true,
34078 hasSideEffects: true,
34079 reg: regInfo{
34080 inputs: []inputInfo{
34081 {1, 1006632946},
34082 {0, 9223372037861408754},
34083 },
34084 },
34085 },
34086 {
34087 name: "LoweredAtomicStore32",
34088 argLen: 3,
34089 faultOnNilArg0: true,
34090 hasSideEffects: true,
34091 reg: regInfo{
34092 inputs: []inputInfo{
34093 {1, 1006632946},
34094 {0, 9223372037861408754},
34095 },
34096 },
34097 },
34098 {
34099 name: "LoweredAtomicStore64",
34100 argLen: 3,
34101 faultOnNilArg0: true,
34102 hasSideEffects: true,
34103 reg: regInfo{
34104 inputs: []inputInfo{
34105 {1, 1006632946},
34106 {0, 9223372037861408754},
34107 },
34108 },
34109 },
34110 {
34111 name: "LoweredAtomicExchange32",
34112 argLen: 3,
34113 resultNotInArgs: true,
34114 faultOnNilArg0: true,
34115 hasSideEffects: true,
34116 reg: regInfo{
34117 inputs: []inputInfo{
34118 {1, 1073741808},
34119 {0, 9223372037928517618},
34120 },
34121 outputs: []outputInfo{
34122 {0, 1006632944},
34123 },
34124 },
34125 },
34126 {
34127 name: "LoweredAtomicExchange64",
34128 argLen: 3,
34129 resultNotInArgs: true,
34130 faultOnNilArg0: true,
34131 hasSideEffects: true,
34132 reg: regInfo{
34133 inputs: []inputInfo{
34134 {1, 1073741808},
34135 {0, 9223372037928517618},
34136 },
34137 outputs: []outputInfo{
34138 {0, 1006632944},
34139 },
34140 },
34141 },
34142 {
34143 name: "LoweredAtomicAdd32",
34144 argLen: 3,
34145 resultNotInArgs: true,
34146 faultOnNilArg0: true,
34147 hasSideEffects: true,
34148 unsafePoint: true,
34149 reg: regInfo{
34150 inputs: []inputInfo{
34151 {1, 1073741808},
34152 {0, 9223372037928517618},
34153 },
34154 outputs: []outputInfo{
34155 {0, 1006632944},
34156 },
34157 },
34158 },
34159 {
34160 name: "LoweredAtomicAdd64",
34161 argLen: 3,
34162 resultNotInArgs: true,
34163 faultOnNilArg0: true,
34164 hasSideEffects: true,
34165 unsafePoint: true,
34166 reg: regInfo{
34167 inputs: []inputInfo{
34168 {1, 1073741808},
34169 {0, 9223372037928517618},
34170 },
34171 outputs: []outputInfo{
34172 {0, 1006632944},
34173 },
34174 },
34175 },
34176 {
34177 name: "LoweredAtomicCas32",
34178 argLen: 4,
34179 resultNotInArgs: true,
34180 faultOnNilArg0: true,
34181 hasSideEffects: true,
34182 unsafePoint: true,
34183 reg: regInfo{
34184 inputs: []inputInfo{
34185 {1, 1073741808},
34186 {2, 1073741808},
34187 {0, 9223372037928517618},
34188 },
34189 outputs: []outputInfo{
34190 {0, 1006632944},
34191 },
34192 },
34193 },
34194 {
34195 name: "LoweredAtomicCas64",
34196 argLen: 4,
34197 resultNotInArgs: true,
34198 faultOnNilArg0: true,
34199 hasSideEffects: true,
34200 unsafePoint: true,
34201 reg: regInfo{
34202 inputs: []inputInfo{
34203 {1, 1073741808},
34204 {2, 1073741808},
34205 {0, 9223372037928517618},
34206 },
34207 outputs: []outputInfo{
34208 {0, 1006632944},
34209 },
34210 },
34211 },
34212 {
34213 name: "LoweredAtomicAnd32",
34214 argLen: 3,
34215 faultOnNilArg0: true,
34216 hasSideEffects: true,
34217 asm: riscv.AAMOANDW,
34218 reg: regInfo{
34219 inputs: []inputInfo{
34220 {1, 1073741808},
34221 {0, 9223372037928517618},
34222 },
34223 },
34224 },
34225 {
34226 name: "LoweredAtomicOr32",
34227 argLen: 3,
34228 faultOnNilArg0: true,
34229 hasSideEffects: true,
34230 asm: riscv.AAMOORW,
34231 reg: regInfo{
34232 inputs: []inputInfo{
34233 {1, 1073741808},
34234 {0, 9223372037928517618},
34235 },
34236 },
34237 },
34238 {
34239 name: "LoweredNilCheck",
34240 argLen: 2,
34241 nilCheck: true,
34242 faultOnNilArg0: true,
34243 reg: regInfo{
34244 inputs: []inputInfo{
34245 {0, 1006632946},
34246 },
34247 },
34248 },
34249 {
34250 name: "LoweredGetClosurePtr",
34251 argLen: 0,
34252 reg: regInfo{
34253 outputs: []outputInfo{
34254 {0, 33554432},
34255 },
34256 },
34257 },
34258 {
34259 name: "LoweredGetCallerSP",
34260 argLen: 1,
34261 rematerializeable: true,
34262 reg: regInfo{
34263 outputs: []outputInfo{
34264 {0, 1006632944},
34265 },
34266 },
34267 },
34268 {
34269 name: "LoweredGetCallerPC",
34270 argLen: 0,
34271 rematerializeable: true,
34272 reg: regInfo{
34273 outputs: []outputInfo{
34274 {0, 1006632944},
34275 },
34276 },
34277 },
34278 {
34279 name: "LoweredWB",
34280 auxType: auxInt64,
34281 argLen: 1,
34282 clobberFlags: true,
34283 reg: regInfo{
34284 clobbers: 9223372034707292160,
34285 outputs: []outputInfo{
34286 {0, 8388608},
34287 },
34288 },
34289 },
34290 {
34291 name: "LoweredPubBarrier",
34292 argLen: 1,
34293 hasSideEffects: true,
34294 asm: riscv.AFENCE,
34295 reg: regInfo{},
34296 },
34297 {
34298 name: "LoweredPanicBoundsA",
34299 auxType: auxInt64,
34300 argLen: 3,
34301 call: true,
34302 reg: regInfo{
34303 inputs: []inputInfo{
34304 {0, 64},
34305 {1, 134217728},
34306 },
34307 },
34308 },
34309 {
34310 name: "LoweredPanicBoundsB",
34311 auxType: auxInt64,
34312 argLen: 3,
34313 call: true,
34314 reg: regInfo{
34315 inputs: []inputInfo{
34316 {0, 32},
34317 {1, 64},
34318 },
34319 },
34320 },
34321 {
34322 name: "LoweredPanicBoundsC",
34323 auxType: auxInt64,
34324 argLen: 3,
34325 call: true,
34326 reg: regInfo{
34327 inputs: []inputInfo{
34328 {0, 16},
34329 {1, 32},
34330 },
34331 },
34332 },
34333 {
34334 name: "FADDS",
34335 argLen: 2,
34336 commutative: true,
34337 asm: riscv.AFADDS,
34338 reg: regInfo{
34339 inputs: []inputInfo{
34340 {0, 9223372034707292160},
34341 {1, 9223372034707292160},
34342 },
34343 outputs: []outputInfo{
34344 {0, 9223372034707292160},
34345 },
34346 },
34347 },
34348 {
34349 name: "FSUBS",
34350 argLen: 2,
34351 asm: riscv.AFSUBS,
34352 reg: regInfo{
34353 inputs: []inputInfo{
34354 {0, 9223372034707292160},
34355 {1, 9223372034707292160},
34356 },
34357 outputs: []outputInfo{
34358 {0, 9223372034707292160},
34359 },
34360 },
34361 },
34362 {
34363 name: "FMULS",
34364 argLen: 2,
34365 commutative: true,
34366 asm: riscv.AFMULS,
34367 reg: regInfo{
34368 inputs: []inputInfo{
34369 {0, 9223372034707292160},
34370 {1, 9223372034707292160},
34371 },
34372 outputs: []outputInfo{
34373 {0, 9223372034707292160},
34374 },
34375 },
34376 },
34377 {
34378 name: "FDIVS",
34379 argLen: 2,
34380 asm: riscv.AFDIVS,
34381 reg: regInfo{
34382 inputs: []inputInfo{
34383 {0, 9223372034707292160},
34384 {1, 9223372034707292160},
34385 },
34386 outputs: []outputInfo{
34387 {0, 9223372034707292160},
34388 },
34389 },
34390 },
34391 {
34392 name: "FMADDS",
34393 argLen: 3,
34394 commutative: true,
34395 asm: riscv.AFMADDS,
34396 reg: regInfo{
34397 inputs: []inputInfo{
34398 {0, 9223372034707292160},
34399 {1, 9223372034707292160},
34400 {2, 9223372034707292160},
34401 },
34402 outputs: []outputInfo{
34403 {0, 9223372034707292160},
34404 },
34405 },
34406 },
34407 {
34408 name: "FMSUBS",
34409 argLen: 3,
34410 commutative: true,
34411 asm: riscv.AFMSUBS,
34412 reg: regInfo{
34413 inputs: []inputInfo{
34414 {0, 9223372034707292160},
34415 {1, 9223372034707292160},
34416 {2, 9223372034707292160},
34417 },
34418 outputs: []outputInfo{
34419 {0, 9223372034707292160},
34420 },
34421 },
34422 },
34423 {
34424 name: "FNMADDS",
34425 argLen: 3,
34426 commutative: true,
34427 asm: riscv.AFNMADDS,
34428 reg: regInfo{
34429 inputs: []inputInfo{
34430 {0, 9223372034707292160},
34431 {1, 9223372034707292160},
34432 {2, 9223372034707292160},
34433 },
34434 outputs: []outputInfo{
34435 {0, 9223372034707292160},
34436 },
34437 },
34438 },
34439 {
34440 name: "FNMSUBS",
34441 argLen: 3,
34442 commutative: true,
34443 asm: riscv.AFNMSUBS,
34444 reg: regInfo{
34445 inputs: []inputInfo{
34446 {0, 9223372034707292160},
34447 {1, 9223372034707292160},
34448 {2, 9223372034707292160},
34449 },
34450 outputs: []outputInfo{
34451 {0, 9223372034707292160},
34452 },
34453 },
34454 },
34455 {
34456 name: "FSQRTS",
34457 argLen: 1,
34458 asm: riscv.AFSQRTS,
34459 reg: regInfo{
34460 inputs: []inputInfo{
34461 {0, 9223372034707292160},
34462 },
34463 outputs: []outputInfo{
34464 {0, 9223372034707292160},
34465 },
34466 },
34467 },
34468 {
34469 name: "FNEGS",
34470 argLen: 1,
34471 asm: riscv.AFNEGS,
34472 reg: regInfo{
34473 inputs: []inputInfo{
34474 {0, 9223372034707292160},
34475 },
34476 outputs: []outputInfo{
34477 {0, 9223372034707292160},
34478 },
34479 },
34480 },
34481 {
34482 name: "FMVSX",
34483 argLen: 1,
34484 asm: riscv.AFMVSX,
34485 reg: regInfo{
34486 inputs: []inputInfo{
34487 {0, 1006632944},
34488 },
34489 outputs: []outputInfo{
34490 {0, 9223372034707292160},
34491 },
34492 },
34493 },
34494 {
34495 name: "FCVTSW",
34496 argLen: 1,
34497 asm: riscv.AFCVTSW,
34498 reg: regInfo{
34499 inputs: []inputInfo{
34500 {0, 1006632944},
34501 },
34502 outputs: []outputInfo{
34503 {0, 9223372034707292160},
34504 },
34505 },
34506 },
34507 {
34508 name: "FCVTSL",
34509 argLen: 1,
34510 asm: riscv.AFCVTSL,
34511 reg: regInfo{
34512 inputs: []inputInfo{
34513 {0, 1006632944},
34514 },
34515 outputs: []outputInfo{
34516 {0, 9223372034707292160},
34517 },
34518 },
34519 },
34520 {
34521 name: "FCVTWS",
34522 argLen: 1,
34523 asm: riscv.AFCVTWS,
34524 reg: regInfo{
34525 inputs: []inputInfo{
34526 {0, 9223372034707292160},
34527 },
34528 outputs: []outputInfo{
34529 {0, 1006632944},
34530 },
34531 },
34532 },
34533 {
34534 name: "FCVTLS",
34535 argLen: 1,
34536 asm: riscv.AFCVTLS,
34537 reg: regInfo{
34538 inputs: []inputInfo{
34539 {0, 9223372034707292160},
34540 },
34541 outputs: []outputInfo{
34542 {0, 1006632944},
34543 },
34544 },
34545 },
34546 {
34547 name: "FMOVWload",
34548 auxType: auxSymOff,
34549 argLen: 2,
34550 faultOnNilArg0: true,
34551 symEffect: SymRead,
34552 asm: riscv.AMOVF,
34553 reg: regInfo{
34554 inputs: []inputInfo{
34555 {0, 9223372037861408754},
34556 },
34557 outputs: []outputInfo{
34558 {0, 9223372034707292160},
34559 },
34560 },
34561 },
34562 {
34563 name: "FMOVWstore",
34564 auxType: auxSymOff,
34565 argLen: 3,
34566 faultOnNilArg0: true,
34567 symEffect: SymWrite,
34568 asm: riscv.AMOVF,
34569 reg: regInfo{
34570 inputs: []inputInfo{
34571 {0, 9223372037861408754},
34572 {1, 9223372034707292160},
34573 },
34574 },
34575 },
34576 {
34577 name: "FEQS",
34578 argLen: 2,
34579 commutative: true,
34580 asm: riscv.AFEQS,
34581 reg: regInfo{
34582 inputs: []inputInfo{
34583 {0, 9223372034707292160},
34584 {1, 9223372034707292160},
34585 },
34586 outputs: []outputInfo{
34587 {0, 1006632944},
34588 },
34589 },
34590 },
34591 {
34592 name: "FNES",
34593 argLen: 2,
34594 commutative: true,
34595 asm: riscv.AFNES,
34596 reg: regInfo{
34597 inputs: []inputInfo{
34598 {0, 9223372034707292160},
34599 {1, 9223372034707292160},
34600 },
34601 outputs: []outputInfo{
34602 {0, 1006632944},
34603 },
34604 },
34605 },
34606 {
34607 name: "FLTS",
34608 argLen: 2,
34609 asm: riscv.AFLTS,
34610 reg: regInfo{
34611 inputs: []inputInfo{
34612 {0, 9223372034707292160},
34613 {1, 9223372034707292160},
34614 },
34615 outputs: []outputInfo{
34616 {0, 1006632944},
34617 },
34618 },
34619 },
34620 {
34621 name: "FLES",
34622 argLen: 2,
34623 asm: riscv.AFLES,
34624 reg: regInfo{
34625 inputs: []inputInfo{
34626 {0, 9223372034707292160},
34627 {1, 9223372034707292160},
34628 },
34629 outputs: []outputInfo{
34630 {0, 1006632944},
34631 },
34632 },
34633 },
34634 {
34635 name: "LoweredFMAXS",
34636 argLen: 2,
34637 commutative: true,
34638 resultNotInArgs: true,
34639 asm: riscv.AFMAXS,
34640 reg: regInfo{
34641 inputs: []inputInfo{
34642 {0, 9223372034707292160},
34643 {1, 9223372034707292160},
34644 },
34645 outputs: []outputInfo{
34646 {0, 9223372034707292160},
34647 },
34648 },
34649 },
34650 {
34651 name: "LoweredFMINS",
34652 argLen: 2,
34653 commutative: true,
34654 resultNotInArgs: true,
34655 asm: riscv.AFMINS,
34656 reg: regInfo{
34657 inputs: []inputInfo{
34658 {0, 9223372034707292160},
34659 {1, 9223372034707292160},
34660 },
34661 outputs: []outputInfo{
34662 {0, 9223372034707292160},
34663 },
34664 },
34665 },
34666 {
34667 name: "FADDD",
34668 argLen: 2,
34669 commutative: true,
34670 asm: riscv.AFADDD,
34671 reg: regInfo{
34672 inputs: []inputInfo{
34673 {0, 9223372034707292160},
34674 {1, 9223372034707292160},
34675 },
34676 outputs: []outputInfo{
34677 {0, 9223372034707292160},
34678 },
34679 },
34680 },
34681 {
34682 name: "FSUBD",
34683 argLen: 2,
34684 asm: riscv.AFSUBD,
34685 reg: regInfo{
34686 inputs: []inputInfo{
34687 {0, 9223372034707292160},
34688 {1, 9223372034707292160},
34689 },
34690 outputs: []outputInfo{
34691 {0, 9223372034707292160},
34692 },
34693 },
34694 },
34695 {
34696 name: "FMULD",
34697 argLen: 2,
34698 commutative: true,
34699 asm: riscv.AFMULD,
34700 reg: regInfo{
34701 inputs: []inputInfo{
34702 {0, 9223372034707292160},
34703 {1, 9223372034707292160},
34704 },
34705 outputs: []outputInfo{
34706 {0, 9223372034707292160},
34707 },
34708 },
34709 },
34710 {
34711 name: "FDIVD",
34712 argLen: 2,
34713 asm: riscv.AFDIVD,
34714 reg: regInfo{
34715 inputs: []inputInfo{
34716 {0, 9223372034707292160},
34717 {1, 9223372034707292160},
34718 },
34719 outputs: []outputInfo{
34720 {0, 9223372034707292160},
34721 },
34722 },
34723 },
34724 {
34725 name: "FMADDD",
34726 argLen: 3,
34727 commutative: true,
34728 asm: riscv.AFMADDD,
34729 reg: regInfo{
34730 inputs: []inputInfo{
34731 {0, 9223372034707292160},
34732 {1, 9223372034707292160},
34733 {2, 9223372034707292160},
34734 },
34735 outputs: []outputInfo{
34736 {0, 9223372034707292160},
34737 },
34738 },
34739 },
34740 {
34741 name: "FMSUBD",
34742 argLen: 3,
34743 commutative: true,
34744 asm: riscv.AFMSUBD,
34745 reg: regInfo{
34746 inputs: []inputInfo{
34747 {0, 9223372034707292160},
34748 {1, 9223372034707292160},
34749 {2, 9223372034707292160},
34750 },
34751 outputs: []outputInfo{
34752 {0, 9223372034707292160},
34753 },
34754 },
34755 },
34756 {
34757 name: "FNMADDD",
34758 argLen: 3,
34759 commutative: true,
34760 asm: riscv.AFNMADDD,
34761 reg: regInfo{
34762 inputs: []inputInfo{
34763 {0, 9223372034707292160},
34764 {1, 9223372034707292160},
34765 {2, 9223372034707292160},
34766 },
34767 outputs: []outputInfo{
34768 {0, 9223372034707292160},
34769 },
34770 },
34771 },
34772 {
34773 name: "FNMSUBD",
34774 argLen: 3,
34775 commutative: true,
34776 asm: riscv.AFNMSUBD,
34777 reg: regInfo{
34778 inputs: []inputInfo{
34779 {0, 9223372034707292160},
34780 {1, 9223372034707292160},
34781 {2, 9223372034707292160},
34782 },
34783 outputs: []outputInfo{
34784 {0, 9223372034707292160},
34785 },
34786 },
34787 },
34788 {
34789 name: "FSQRTD",
34790 argLen: 1,
34791 asm: riscv.AFSQRTD,
34792 reg: regInfo{
34793 inputs: []inputInfo{
34794 {0, 9223372034707292160},
34795 },
34796 outputs: []outputInfo{
34797 {0, 9223372034707292160},
34798 },
34799 },
34800 },
34801 {
34802 name: "FNEGD",
34803 argLen: 1,
34804 asm: riscv.AFNEGD,
34805 reg: regInfo{
34806 inputs: []inputInfo{
34807 {0, 9223372034707292160},
34808 },
34809 outputs: []outputInfo{
34810 {0, 9223372034707292160},
34811 },
34812 },
34813 },
34814 {
34815 name: "FABSD",
34816 argLen: 1,
34817 asm: riscv.AFABSD,
34818 reg: regInfo{
34819 inputs: []inputInfo{
34820 {0, 9223372034707292160},
34821 },
34822 outputs: []outputInfo{
34823 {0, 9223372034707292160},
34824 },
34825 },
34826 },
34827 {
34828 name: "FSGNJD",
34829 argLen: 2,
34830 asm: riscv.AFSGNJD,
34831 reg: regInfo{
34832 inputs: []inputInfo{
34833 {0, 9223372034707292160},
34834 {1, 9223372034707292160},
34835 },
34836 outputs: []outputInfo{
34837 {0, 9223372034707292160},
34838 },
34839 },
34840 },
34841 {
34842 name: "FMVDX",
34843 argLen: 1,
34844 asm: riscv.AFMVDX,
34845 reg: regInfo{
34846 inputs: []inputInfo{
34847 {0, 1006632944},
34848 },
34849 outputs: []outputInfo{
34850 {0, 9223372034707292160},
34851 },
34852 },
34853 },
34854 {
34855 name: "FCVTDW",
34856 argLen: 1,
34857 asm: riscv.AFCVTDW,
34858 reg: regInfo{
34859 inputs: []inputInfo{
34860 {0, 1006632944},
34861 },
34862 outputs: []outputInfo{
34863 {0, 9223372034707292160},
34864 },
34865 },
34866 },
34867 {
34868 name: "FCVTDL",
34869 argLen: 1,
34870 asm: riscv.AFCVTDL,
34871 reg: regInfo{
34872 inputs: []inputInfo{
34873 {0, 1006632944},
34874 },
34875 outputs: []outputInfo{
34876 {0, 9223372034707292160},
34877 },
34878 },
34879 },
34880 {
34881 name: "FCVTWD",
34882 argLen: 1,
34883 asm: riscv.AFCVTWD,
34884 reg: regInfo{
34885 inputs: []inputInfo{
34886 {0, 9223372034707292160},
34887 },
34888 outputs: []outputInfo{
34889 {0, 1006632944},
34890 },
34891 },
34892 },
34893 {
34894 name: "FCVTLD",
34895 argLen: 1,
34896 asm: riscv.AFCVTLD,
34897 reg: regInfo{
34898 inputs: []inputInfo{
34899 {0, 9223372034707292160},
34900 },
34901 outputs: []outputInfo{
34902 {0, 1006632944},
34903 },
34904 },
34905 },
34906 {
34907 name: "FCVTDS",
34908 argLen: 1,
34909 asm: riscv.AFCVTDS,
34910 reg: regInfo{
34911 inputs: []inputInfo{
34912 {0, 9223372034707292160},
34913 },
34914 outputs: []outputInfo{
34915 {0, 9223372034707292160},
34916 },
34917 },
34918 },
34919 {
34920 name: "FCVTSD",
34921 argLen: 1,
34922 asm: riscv.AFCVTSD,
34923 reg: regInfo{
34924 inputs: []inputInfo{
34925 {0, 9223372034707292160},
34926 },
34927 outputs: []outputInfo{
34928 {0, 9223372034707292160},
34929 },
34930 },
34931 },
34932 {
34933 name: "FMOVDload",
34934 auxType: auxSymOff,
34935 argLen: 2,
34936 faultOnNilArg0: true,
34937 symEffect: SymRead,
34938 asm: riscv.AMOVD,
34939 reg: regInfo{
34940 inputs: []inputInfo{
34941 {0, 9223372037861408754},
34942 },
34943 outputs: []outputInfo{
34944 {0, 9223372034707292160},
34945 },
34946 },
34947 },
34948 {
34949 name: "FMOVDstore",
34950 auxType: auxSymOff,
34951 argLen: 3,
34952 faultOnNilArg0: true,
34953 symEffect: SymWrite,
34954 asm: riscv.AMOVD,
34955 reg: regInfo{
34956 inputs: []inputInfo{
34957 {0, 9223372037861408754},
34958 {1, 9223372034707292160},
34959 },
34960 },
34961 },
34962 {
34963 name: "FEQD",
34964 argLen: 2,
34965 commutative: true,
34966 asm: riscv.AFEQD,
34967 reg: regInfo{
34968 inputs: []inputInfo{
34969 {0, 9223372034707292160},
34970 {1, 9223372034707292160},
34971 },
34972 outputs: []outputInfo{
34973 {0, 1006632944},
34974 },
34975 },
34976 },
34977 {
34978 name: "FNED",
34979 argLen: 2,
34980 commutative: true,
34981 asm: riscv.AFNED,
34982 reg: regInfo{
34983 inputs: []inputInfo{
34984 {0, 9223372034707292160},
34985 {1, 9223372034707292160},
34986 },
34987 outputs: []outputInfo{
34988 {0, 1006632944},
34989 },
34990 },
34991 },
34992 {
34993 name: "FLTD",
34994 argLen: 2,
34995 asm: riscv.AFLTD,
34996 reg: regInfo{
34997 inputs: []inputInfo{
34998 {0, 9223372034707292160},
34999 {1, 9223372034707292160},
35000 },
35001 outputs: []outputInfo{
35002 {0, 1006632944},
35003 },
35004 },
35005 },
35006 {
35007 name: "FLED",
35008 argLen: 2,
35009 asm: riscv.AFLED,
35010 reg: regInfo{
35011 inputs: []inputInfo{
35012 {0, 9223372034707292160},
35013 {1, 9223372034707292160},
35014 },
35015 outputs: []outputInfo{
35016 {0, 1006632944},
35017 },
35018 },
35019 },
35020 {
35021 name: "LoweredFMIND",
35022 argLen: 2,
35023 commutative: true,
35024 resultNotInArgs: true,
35025 asm: riscv.AFMIND,
35026 reg: regInfo{
35027 inputs: []inputInfo{
35028 {0, 9223372034707292160},
35029 {1, 9223372034707292160},
35030 },
35031 outputs: []outputInfo{
35032 {0, 9223372034707292160},
35033 },
35034 },
35035 },
35036 {
35037 name: "LoweredFMAXD",
35038 argLen: 2,
35039 commutative: true,
35040 resultNotInArgs: true,
35041 asm: riscv.AFMAXD,
35042 reg: regInfo{
35043 inputs: []inputInfo{
35044 {0, 9223372034707292160},
35045 {1, 9223372034707292160},
35046 },
35047 outputs: []outputInfo{
35048 {0, 9223372034707292160},
35049 },
35050 },
35051 },
35052
35053 {
35054 name: "FADDS",
35055 argLen: 2,
35056 commutative: true,
35057 resultInArg0: true,
35058 asm: s390x.AFADDS,
35059 reg: regInfo{
35060 inputs: []inputInfo{
35061 {0, 4294901760},
35062 {1, 4294901760},
35063 },
35064 outputs: []outputInfo{
35065 {0, 4294901760},
35066 },
35067 },
35068 },
35069 {
35070 name: "FADD",
35071 argLen: 2,
35072 commutative: true,
35073 resultInArg0: true,
35074 asm: s390x.AFADD,
35075 reg: regInfo{
35076 inputs: []inputInfo{
35077 {0, 4294901760},
35078 {1, 4294901760},
35079 },
35080 outputs: []outputInfo{
35081 {0, 4294901760},
35082 },
35083 },
35084 },
35085 {
35086 name: "FSUBS",
35087 argLen: 2,
35088 resultInArg0: true,
35089 asm: s390x.AFSUBS,
35090 reg: regInfo{
35091 inputs: []inputInfo{
35092 {0, 4294901760},
35093 {1, 4294901760},
35094 },
35095 outputs: []outputInfo{
35096 {0, 4294901760},
35097 },
35098 },
35099 },
35100 {
35101 name: "FSUB",
35102 argLen: 2,
35103 resultInArg0: true,
35104 asm: s390x.AFSUB,
35105 reg: regInfo{
35106 inputs: []inputInfo{
35107 {0, 4294901760},
35108 {1, 4294901760},
35109 },
35110 outputs: []outputInfo{
35111 {0, 4294901760},
35112 },
35113 },
35114 },
35115 {
35116 name: "FMULS",
35117 argLen: 2,
35118 commutative: true,
35119 resultInArg0: true,
35120 asm: s390x.AFMULS,
35121 reg: regInfo{
35122 inputs: []inputInfo{
35123 {0, 4294901760},
35124 {1, 4294901760},
35125 },
35126 outputs: []outputInfo{
35127 {0, 4294901760},
35128 },
35129 },
35130 },
35131 {
35132 name: "FMUL",
35133 argLen: 2,
35134 commutative: true,
35135 resultInArg0: true,
35136 asm: s390x.AFMUL,
35137 reg: regInfo{
35138 inputs: []inputInfo{
35139 {0, 4294901760},
35140 {1, 4294901760},
35141 },
35142 outputs: []outputInfo{
35143 {0, 4294901760},
35144 },
35145 },
35146 },
35147 {
35148 name: "FDIVS",
35149 argLen: 2,
35150 resultInArg0: true,
35151 asm: s390x.AFDIVS,
35152 reg: regInfo{
35153 inputs: []inputInfo{
35154 {0, 4294901760},
35155 {1, 4294901760},
35156 },
35157 outputs: []outputInfo{
35158 {0, 4294901760},
35159 },
35160 },
35161 },
35162 {
35163 name: "FDIV",
35164 argLen: 2,
35165 resultInArg0: true,
35166 asm: s390x.AFDIV,
35167 reg: regInfo{
35168 inputs: []inputInfo{
35169 {0, 4294901760},
35170 {1, 4294901760},
35171 },
35172 outputs: []outputInfo{
35173 {0, 4294901760},
35174 },
35175 },
35176 },
35177 {
35178 name: "FNEGS",
35179 argLen: 1,
35180 clobberFlags: true,
35181 asm: s390x.AFNEGS,
35182 reg: regInfo{
35183 inputs: []inputInfo{
35184 {0, 4294901760},
35185 },
35186 outputs: []outputInfo{
35187 {0, 4294901760},
35188 },
35189 },
35190 },
35191 {
35192 name: "FNEG",
35193 argLen: 1,
35194 clobberFlags: true,
35195 asm: s390x.AFNEG,
35196 reg: regInfo{
35197 inputs: []inputInfo{
35198 {0, 4294901760},
35199 },
35200 outputs: []outputInfo{
35201 {0, 4294901760},
35202 },
35203 },
35204 },
35205 {
35206 name: "FMADDS",
35207 argLen: 3,
35208 resultInArg0: true,
35209 asm: s390x.AFMADDS,
35210 reg: regInfo{
35211 inputs: []inputInfo{
35212 {0, 4294901760},
35213 {1, 4294901760},
35214 {2, 4294901760},
35215 },
35216 outputs: []outputInfo{
35217 {0, 4294901760},
35218 },
35219 },
35220 },
35221 {
35222 name: "FMADD",
35223 argLen: 3,
35224 resultInArg0: true,
35225 asm: s390x.AFMADD,
35226 reg: regInfo{
35227 inputs: []inputInfo{
35228 {0, 4294901760},
35229 {1, 4294901760},
35230 {2, 4294901760},
35231 },
35232 outputs: []outputInfo{
35233 {0, 4294901760},
35234 },
35235 },
35236 },
35237 {
35238 name: "FMSUBS",
35239 argLen: 3,
35240 resultInArg0: true,
35241 asm: s390x.AFMSUBS,
35242 reg: regInfo{
35243 inputs: []inputInfo{
35244 {0, 4294901760},
35245 {1, 4294901760},
35246 {2, 4294901760},
35247 },
35248 outputs: []outputInfo{
35249 {0, 4294901760},
35250 },
35251 },
35252 },
35253 {
35254 name: "FMSUB",
35255 argLen: 3,
35256 resultInArg0: true,
35257 asm: s390x.AFMSUB,
35258 reg: regInfo{
35259 inputs: []inputInfo{
35260 {0, 4294901760},
35261 {1, 4294901760},
35262 {2, 4294901760},
35263 },
35264 outputs: []outputInfo{
35265 {0, 4294901760},
35266 },
35267 },
35268 },
35269 {
35270 name: "LPDFR",
35271 argLen: 1,
35272 asm: s390x.ALPDFR,
35273 reg: regInfo{
35274 inputs: []inputInfo{
35275 {0, 4294901760},
35276 },
35277 outputs: []outputInfo{
35278 {0, 4294901760},
35279 },
35280 },
35281 },
35282 {
35283 name: "LNDFR",
35284 argLen: 1,
35285 asm: s390x.ALNDFR,
35286 reg: regInfo{
35287 inputs: []inputInfo{
35288 {0, 4294901760},
35289 },
35290 outputs: []outputInfo{
35291 {0, 4294901760},
35292 },
35293 },
35294 },
35295 {
35296 name: "CPSDR",
35297 argLen: 2,
35298 asm: s390x.ACPSDR,
35299 reg: regInfo{
35300 inputs: []inputInfo{
35301 {0, 4294901760},
35302 {1, 4294901760},
35303 },
35304 outputs: []outputInfo{
35305 {0, 4294901760},
35306 },
35307 },
35308 },
35309 {
35310 name: "FIDBR",
35311 auxType: auxInt8,
35312 argLen: 1,
35313 asm: s390x.AFIDBR,
35314 reg: regInfo{
35315 inputs: []inputInfo{
35316 {0, 4294901760},
35317 },
35318 outputs: []outputInfo{
35319 {0, 4294901760},
35320 },
35321 },
35322 },
35323 {
35324 name: "FMOVSload",
35325 auxType: auxSymOff,
35326 argLen: 2,
35327 faultOnNilArg0: true,
35328 symEffect: SymRead,
35329 asm: s390x.AFMOVS,
35330 reg: regInfo{
35331 inputs: []inputInfo{
35332 {0, 4295023614},
35333 },
35334 outputs: []outputInfo{
35335 {0, 4294901760},
35336 },
35337 },
35338 },
35339 {
35340 name: "FMOVDload",
35341 auxType: auxSymOff,
35342 argLen: 2,
35343 faultOnNilArg0: true,
35344 symEffect: SymRead,
35345 asm: s390x.AFMOVD,
35346 reg: regInfo{
35347 inputs: []inputInfo{
35348 {0, 4295023614},
35349 },
35350 outputs: []outputInfo{
35351 {0, 4294901760},
35352 },
35353 },
35354 },
35355 {
35356 name: "FMOVSconst",
35357 auxType: auxFloat32,
35358 argLen: 0,
35359 rematerializeable: true,
35360 asm: s390x.AFMOVS,
35361 reg: regInfo{
35362 outputs: []outputInfo{
35363 {0, 4294901760},
35364 },
35365 },
35366 },
35367 {
35368 name: "FMOVDconst",
35369 auxType: auxFloat64,
35370 argLen: 0,
35371 rematerializeable: true,
35372 asm: s390x.AFMOVD,
35373 reg: regInfo{
35374 outputs: []outputInfo{
35375 {0, 4294901760},
35376 },
35377 },
35378 },
35379 {
35380 name: "FMOVSloadidx",
35381 auxType: auxSymOff,
35382 argLen: 3,
35383 symEffect: SymRead,
35384 asm: s390x.AFMOVS,
35385 reg: regInfo{
35386 inputs: []inputInfo{
35387 {0, 56318},
35388 {1, 56318},
35389 },
35390 outputs: []outputInfo{
35391 {0, 4294901760},
35392 },
35393 },
35394 },
35395 {
35396 name: "FMOVDloadidx",
35397 auxType: auxSymOff,
35398 argLen: 3,
35399 symEffect: SymRead,
35400 asm: s390x.AFMOVD,
35401 reg: regInfo{
35402 inputs: []inputInfo{
35403 {0, 56318},
35404 {1, 56318},
35405 },
35406 outputs: []outputInfo{
35407 {0, 4294901760},
35408 },
35409 },
35410 },
35411 {
35412 name: "FMOVSstore",
35413 auxType: auxSymOff,
35414 argLen: 3,
35415 faultOnNilArg0: true,
35416 symEffect: SymWrite,
35417 asm: s390x.AFMOVS,
35418 reg: regInfo{
35419 inputs: []inputInfo{
35420 {0, 4295023614},
35421 {1, 4294901760},
35422 },
35423 },
35424 },
35425 {
35426 name: "FMOVDstore",
35427 auxType: auxSymOff,
35428 argLen: 3,
35429 faultOnNilArg0: true,
35430 symEffect: SymWrite,
35431 asm: s390x.AFMOVD,
35432 reg: regInfo{
35433 inputs: []inputInfo{
35434 {0, 4295023614},
35435 {1, 4294901760},
35436 },
35437 },
35438 },
35439 {
35440 name: "FMOVSstoreidx",
35441 auxType: auxSymOff,
35442 argLen: 4,
35443 symEffect: SymWrite,
35444 asm: s390x.AFMOVS,
35445 reg: regInfo{
35446 inputs: []inputInfo{
35447 {0, 56318},
35448 {1, 56318},
35449 {2, 4294901760},
35450 },
35451 },
35452 },
35453 {
35454 name: "FMOVDstoreidx",
35455 auxType: auxSymOff,
35456 argLen: 4,
35457 symEffect: SymWrite,
35458 asm: s390x.AFMOVD,
35459 reg: regInfo{
35460 inputs: []inputInfo{
35461 {0, 56318},
35462 {1, 56318},
35463 {2, 4294901760},
35464 },
35465 },
35466 },
35467 {
35468 name: "ADD",
35469 argLen: 2,
35470 commutative: true,
35471 clobberFlags: true,
35472 asm: s390x.AADD,
35473 reg: regInfo{
35474 inputs: []inputInfo{
35475 {1, 23551},
35476 {0, 56319},
35477 },
35478 outputs: []outputInfo{
35479 {0, 23551},
35480 },
35481 },
35482 },
35483 {
35484 name: "ADDW",
35485 argLen: 2,
35486 commutative: true,
35487 clobberFlags: true,
35488 asm: s390x.AADDW,
35489 reg: regInfo{
35490 inputs: []inputInfo{
35491 {1, 23551},
35492 {0, 56319},
35493 },
35494 outputs: []outputInfo{
35495 {0, 23551},
35496 },
35497 },
35498 },
35499 {
35500 name: "ADDconst",
35501 auxType: auxInt32,
35502 argLen: 1,
35503 clobberFlags: true,
35504 asm: s390x.AADD,
35505 reg: regInfo{
35506 inputs: []inputInfo{
35507 {0, 56319},
35508 },
35509 outputs: []outputInfo{
35510 {0, 23551},
35511 },
35512 },
35513 },
35514 {
35515 name: "ADDWconst",
35516 auxType: auxInt32,
35517 argLen: 1,
35518 clobberFlags: true,
35519 asm: s390x.AADDW,
35520 reg: regInfo{
35521 inputs: []inputInfo{
35522 {0, 56319},
35523 },
35524 outputs: []outputInfo{
35525 {0, 23551},
35526 },
35527 },
35528 },
35529 {
35530 name: "ADDload",
35531 auxType: auxSymOff,
35532 argLen: 3,
35533 resultInArg0: true,
35534 clobberFlags: true,
35535 faultOnNilArg1: true,
35536 symEffect: SymRead,
35537 asm: s390x.AADD,
35538 reg: regInfo{
35539 inputs: []inputInfo{
35540 {0, 23551},
35541 {1, 56318},
35542 },
35543 outputs: []outputInfo{
35544 {0, 23551},
35545 },
35546 },
35547 },
35548 {
35549 name: "ADDWload",
35550 auxType: auxSymOff,
35551 argLen: 3,
35552 resultInArg0: true,
35553 clobberFlags: true,
35554 faultOnNilArg1: true,
35555 symEffect: SymRead,
35556 asm: s390x.AADDW,
35557 reg: regInfo{
35558 inputs: []inputInfo{
35559 {0, 23551},
35560 {1, 56318},
35561 },
35562 outputs: []outputInfo{
35563 {0, 23551},
35564 },
35565 },
35566 },
35567 {
35568 name: "SUB",
35569 argLen: 2,
35570 clobberFlags: true,
35571 asm: s390x.ASUB,
35572 reg: regInfo{
35573 inputs: []inputInfo{
35574 {0, 23551},
35575 {1, 23551},
35576 },
35577 outputs: []outputInfo{
35578 {0, 23551},
35579 },
35580 },
35581 },
35582 {
35583 name: "SUBW",
35584 argLen: 2,
35585 clobberFlags: true,
35586 asm: s390x.ASUBW,
35587 reg: regInfo{
35588 inputs: []inputInfo{
35589 {0, 23551},
35590 {1, 23551},
35591 },
35592 outputs: []outputInfo{
35593 {0, 23551},
35594 },
35595 },
35596 },
35597 {
35598 name: "SUBconst",
35599 auxType: auxInt32,
35600 argLen: 1,
35601 resultInArg0: true,
35602 clobberFlags: true,
35603 asm: s390x.ASUB,
35604 reg: regInfo{
35605 inputs: []inputInfo{
35606 {0, 23551},
35607 },
35608 outputs: []outputInfo{
35609 {0, 23551},
35610 },
35611 },
35612 },
35613 {
35614 name: "SUBWconst",
35615 auxType: auxInt32,
35616 argLen: 1,
35617 resultInArg0: true,
35618 clobberFlags: true,
35619 asm: s390x.ASUBW,
35620 reg: regInfo{
35621 inputs: []inputInfo{
35622 {0, 23551},
35623 },
35624 outputs: []outputInfo{
35625 {0, 23551},
35626 },
35627 },
35628 },
35629 {
35630 name: "SUBload",
35631 auxType: auxSymOff,
35632 argLen: 3,
35633 resultInArg0: true,
35634 clobberFlags: true,
35635 faultOnNilArg1: true,
35636 symEffect: SymRead,
35637 asm: s390x.ASUB,
35638 reg: regInfo{
35639 inputs: []inputInfo{
35640 {0, 23551},
35641 {1, 56318},
35642 },
35643 outputs: []outputInfo{
35644 {0, 23551},
35645 },
35646 },
35647 },
35648 {
35649 name: "SUBWload",
35650 auxType: auxSymOff,
35651 argLen: 3,
35652 resultInArg0: true,
35653 clobberFlags: true,
35654 faultOnNilArg1: true,
35655 symEffect: SymRead,
35656 asm: s390x.ASUBW,
35657 reg: regInfo{
35658 inputs: []inputInfo{
35659 {0, 23551},
35660 {1, 56318},
35661 },
35662 outputs: []outputInfo{
35663 {0, 23551},
35664 },
35665 },
35666 },
35667 {
35668 name: "MULLD",
35669 argLen: 2,
35670 commutative: true,
35671 resultInArg0: true,
35672 clobberFlags: true,
35673 asm: s390x.AMULLD,
35674 reg: regInfo{
35675 inputs: []inputInfo{
35676 {0, 23551},
35677 {1, 23551},
35678 },
35679 outputs: []outputInfo{
35680 {0, 23551},
35681 },
35682 },
35683 },
35684 {
35685 name: "MULLW",
35686 argLen: 2,
35687 commutative: true,
35688 resultInArg0: true,
35689 clobberFlags: true,
35690 asm: s390x.AMULLW,
35691 reg: regInfo{
35692 inputs: []inputInfo{
35693 {0, 23551},
35694 {1, 23551},
35695 },
35696 outputs: []outputInfo{
35697 {0, 23551},
35698 },
35699 },
35700 },
35701 {
35702 name: "MULLDconst",
35703 auxType: auxInt32,
35704 argLen: 1,
35705 resultInArg0: true,
35706 clobberFlags: true,
35707 asm: s390x.AMULLD,
35708 reg: regInfo{
35709 inputs: []inputInfo{
35710 {0, 23551},
35711 },
35712 outputs: []outputInfo{
35713 {0, 23551},
35714 },
35715 },
35716 },
35717 {
35718 name: "MULLWconst",
35719 auxType: auxInt32,
35720 argLen: 1,
35721 resultInArg0: true,
35722 clobberFlags: true,
35723 asm: s390x.AMULLW,
35724 reg: regInfo{
35725 inputs: []inputInfo{
35726 {0, 23551},
35727 },
35728 outputs: []outputInfo{
35729 {0, 23551},
35730 },
35731 },
35732 },
35733 {
35734 name: "MULLDload",
35735 auxType: auxSymOff,
35736 argLen: 3,
35737 resultInArg0: true,
35738 clobberFlags: true,
35739 faultOnNilArg1: true,
35740 symEffect: SymRead,
35741 asm: s390x.AMULLD,
35742 reg: regInfo{
35743 inputs: []inputInfo{
35744 {0, 23551},
35745 {1, 56318},
35746 },
35747 outputs: []outputInfo{
35748 {0, 23551},
35749 },
35750 },
35751 },
35752 {
35753 name: "MULLWload",
35754 auxType: auxSymOff,
35755 argLen: 3,
35756 resultInArg0: true,
35757 clobberFlags: true,
35758 faultOnNilArg1: true,
35759 symEffect: SymRead,
35760 asm: s390x.AMULLW,
35761 reg: regInfo{
35762 inputs: []inputInfo{
35763 {0, 23551},
35764 {1, 56318},
35765 },
35766 outputs: []outputInfo{
35767 {0, 23551},
35768 },
35769 },
35770 },
35771 {
35772 name: "MULHD",
35773 argLen: 2,
35774 commutative: true,
35775 resultInArg0: true,
35776 clobberFlags: true,
35777 asm: s390x.AMULHD,
35778 reg: regInfo{
35779 inputs: []inputInfo{
35780 {0, 21503},
35781 {1, 21503},
35782 },
35783 clobbers: 2048,
35784 outputs: []outputInfo{
35785 {0, 21503},
35786 },
35787 },
35788 },
35789 {
35790 name: "MULHDU",
35791 argLen: 2,
35792 commutative: true,
35793 resultInArg0: true,
35794 clobberFlags: true,
35795 asm: s390x.AMULHDU,
35796 reg: regInfo{
35797 inputs: []inputInfo{
35798 {0, 21503},
35799 {1, 21503},
35800 },
35801 clobbers: 2048,
35802 outputs: []outputInfo{
35803 {0, 21503},
35804 },
35805 },
35806 },
35807 {
35808 name: "DIVD",
35809 argLen: 2,
35810 resultInArg0: true,
35811 clobberFlags: true,
35812 asm: s390x.ADIVD,
35813 reg: regInfo{
35814 inputs: []inputInfo{
35815 {0, 21503},
35816 {1, 21503},
35817 },
35818 clobbers: 2048,
35819 outputs: []outputInfo{
35820 {0, 21503},
35821 },
35822 },
35823 },
35824 {
35825 name: "DIVW",
35826 argLen: 2,
35827 resultInArg0: true,
35828 clobberFlags: true,
35829 asm: s390x.ADIVW,
35830 reg: regInfo{
35831 inputs: []inputInfo{
35832 {0, 21503},
35833 {1, 21503},
35834 },
35835 clobbers: 2048,
35836 outputs: []outputInfo{
35837 {0, 21503},
35838 },
35839 },
35840 },
35841 {
35842 name: "DIVDU",
35843 argLen: 2,
35844 resultInArg0: true,
35845 clobberFlags: true,
35846 asm: s390x.ADIVDU,
35847 reg: regInfo{
35848 inputs: []inputInfo{
35849 {0, 21503},
35850 {1, 21503},
35851 },
35852 clobbers: 2048,
35853 outputs: []outputInfo{
35854 {0, 21503},
35855 },
35856 },
35857 },
35858 {
35859 name: "DIVWU",
35860 argLen: 2,
35861 resultInArg0: true,
35862 clobberFlags: true,
35863 asm: s390x.ADIVWU,
35864 reg: regInfo{
35865 inputs: []inputInfo{
35866 {0, 21503},
35867 {1, 21503},
35868 },
35869 clobbers: 2048,
35870 outputs: []outputInfo{
35871 {0, 21503},
35872 },
35873 },
35874 },
35875 {
35876 name: "MODD",
35877 argLen: 2,
35878 resultInArg0: true,
35879 clobberFlags: true,
35880 asm: s390x.AMODD,
35881 reg: regInfo{
35882 inputs: []inputInfo{
35883 {0, 21503},
35884 {1, 21503},
35885 },
35886 clobbers: 2048,
35887 outputs: []outputInfo{
35888 {0, 21503},
35889 },
35890 },
35891 },
35892 {
35893 name: "MODW",
35894 argLen: 2,
35895 resultInArg0: true,
35896 clobberFlags: true,
35897 asm: s390x.AMODW,
35898 reg: regInfo{
35899 inputs: []inputInfo{
35900 {0, 21503},
35901 {1, 21503},
35902 },
35903 clobbers: 2048,
35904 outputs: []outputInfo{
35905 {0, 21503},
35906 },
35907 },
35908 },
35909 {
35910 name: "MODDU",
35911 argLen: 2,
35912 resultInArg0: true,
35913 clobberFlags: true,
35914 asm: s390x.AMODDU,
35915 reg: regInfo{
35916 inputs: []inputInfo{
35917 {0, 21503},
35918 {1, 21503},
35919 },
35920 clobbers: 2048,
35921 outputs: []outputInfo{
35922 {0, 21503},
35923 },
35924 },
35925 },
35926 {
35927 name: "MODWU",
35928 argLen: 2,
35929 resultInArg0: true,
35930 clobberFlags: true,
35931 asm: s390x.AMODWU,
35932 reg: regInfo{
35933 inputs: []inputInfo{
35934 {0, 21503},
35935 {1, 21503},
35936 },
35937 clobbers: 2048,
35938 outputs: []outputInfo{
35939 {0, 21503},
35940 },
35941 },
35942 },
35943 {
35944 name: "AND",
35945 argLen: 2,
35946 commutative: true,
35947 clobberFlags: true,
35948 asm: s390x.AAND,
35949 reg: regInfo{
35950 inputs: []inputInfo{
35951 {0, 23551},
35952 {1, 23551},
35953 },
35954 outputs: []outputInfo{
35955 {0, 23551},
35956 },
35957 },
35958 },
35959 {
35960 name: "ANDW",
35961 argLen: 2,
35962 commutative: true,
35963 clobberFlags: true,
35964 asm: s390x.AANDW,
35965 reg: regInfo{
35966 inputs: []inputInfo{
35967 {0, 23551},
35968 {1, 23551},
35969 },
35970 outputs: []outputInfo{
35971 {0, 23551},
35972 },
35973 },
35974 },
35975 {
35976 name: "ANDconst",
35977 auxType: auxInt64,
35978 argLen: 1,
35979 resultInArg0: true,
35980 clobberFlags: true,
35981 asm: s390x.AAND,
35982 reg: regInfo{
35983 inputs: []inputInfo{
35984 {0, 23551},
35985 },
35986 outputs: []outputInfo{
35987 {0, 23551},
35988 },
35989 },
35990 },
35991 {
35992 name: "ANDWconst",
35993 auxType: auxInt32,
35994 argLen: 1,
35995 resultInArg0: true,
35996 clobberFlags: true,
35997 asm: s390x.AANDW,
35998 reg: regInfo{
35999 inputs: []inputInfo{
36000 {0, 23551},
36001 },
36002 outputs: []outputInfo{
36003 {0, 23551},
36004 },
36005 },
36006 },
36007 {
36008 name: "ANDload",
36009 auxType: auxSymOff,
36010 argLen: 3,
36011 resultInArg0: true,
36012 clobberFlags: true,
36013 faultOnNilArg1: true,
36014 symEffect: SymRead,
36015 asm: s390x.AAND,
36016 reg: regInfo{
36017 inputs: []inputInfo{
36018 {0, 23551},
36019 {1, 56318},
36020 },
36021 outputs: []outputInfo{
36022 {0, 23551},
36023 },
36024 },
36025 },
36026 {
36027 name: "ANDWload",
36028 auxType: auxSymOff,
36029 argLen: 3,
36030 resultInArg0: true,
36031 clobberFlags: true,
36032 faultOnNilArg1: true,
36033 symEffect: SymRead,
36034 asm: s390x.AANDW,
36035 reg: regInfo{
36036 inputs: []inputInfo{
36037 {0, 23551},
36038 {1, 56318},
36039 },
36040 outputs: []outputInfo{
36041 {0, 23551},
36042 },
36043 },
36044 },
36045 {
36046 name: "OR",
36047 argLen: 2,
36048 commutative: true,
36049 clobberFlags: true,
36050 asm: s390x.AOR,
36051 reg: regInfo{
36052 inputs: []inputInfo{
36053 {0, 23551},
36054 {1, 23551},
36055 },
36056 outputs: []outputInfo{
36057 {0, 23551},
36058 },
36059 },
36060 },
36061 {
36062 name: "ORW",
36063 argLen: 2,
36064 commutative: true,
36065 clobberFlags: true,
36066 asm: s390x.AORW,
36067 reg: regInfo{
36068 inputs: []inputInfo{
36069 {0, 23551},
36070 {1, 23551},
36071 },
36072 outputs: []outputInfo{
36073 {0, 23551},
36074 },
36075 },
36076 },
36077 {
36078 name: "ORconst",
36079 auxType: auxInt64,
36080 argLen: 1,
36081 resultInArg0: true,
36082 clobberFlags: true,
36083 asm: s390x.AOR,
36084 reg: regInfo{
36085 inputs: []inputInfo{
36086 {0, 23551},
36087 },
36088 outputs: []outputInfo{
36089 {0, 23551},
36090 },
36091 },
36092 },
36093 {
36094 name: "ORWconst",
36095 auxType: auxInt32,
36096 argLen: 1,
36097 resultInArg0: true,
36098 clobberFlags: true,
36099 asm: s390x.AORW,
36100 reg: regInfo{
36101 inputs: []inputInfo{
36102 {0, 23551},
36103 },
36104 outputs: []outputInfo{
36105 {0, 23551},
36106 },
36107 },
36108 },
36109 {
36110 name: "ORload",
36111 auxType: auxSymOff,
36112 argLen: 3,
36113 resultInArg0: true,
36114 clobberFlags: true,
36115 faultOnNilArg1: true,
36116 symEffect: SymRead,
36117 asm: s390x.AOR,
36118 reg: regInfo{
36119 inputs: []inputInfo{
36120 {0, 23551},
36121 {1, 56318},
36122 },
36123 outputs: []outputInfo{
36124 {0, 23551},
36125 },
36126 },
36127 },
36128 {
36129 name: "ORWload",
36130 auxType: auxSymOff,
36131 argLen: 3,
36132 resultInArg0: true,
36133 clobberFlags: true,
36134 faultOnNilArg1: true,
36135 symEffect: SymRead,
36136 asm: s390x.AORW,
36137 reg: regInfo{
36138 inputs: []inputInfo{
36139 {0, 23551},
36140 {1, 56318},
36141 },
36142 outputs: []outputInfo{
36143 {0, 23551},
36144 },
36145 },
36146 },
36147 {
36148 name: "XOR",
36149 argLen: 2,
36150 commutative: true,
36151 clobberFlags: true,
36152 asm: s390x.AXOR,
36153 reg: regInfo{
36154 inputs: []inputInfo{
36155 {0, 23551},
36156 {1, 23551},
36157 },
36158 outputs: []outputInfo{
36159 {0, 23551},
36160 },
36161 },
36162 },
36163 {
36164 name: "XORW",
36165 argLen: 2,
36166 commutative: true,
36167 clobberFlags: true,
36168 asm: s390x.AXORW,
36169 reg: regInfo{
36170 inputs: []inputInfo{
36171 {0, 23551},
36172 {1, 23551},
36173 },
36174 outputs: []outputInfo{
36175 {0, 23551},
36176 },
36177 },
36178 },
36179 {
36180 name: "XORconst",
36181 auxType: auxInt64,
36182 argLen: 1,
36183 resultInArg0: true,
36184 clobberFlags: true,
36185 asm: s390x.AXOR,
36186 reg: regInfo{
36187 inputs: []inputInfo{
36188 {0, 23551},
36189 },
36190 outputs: []outputInfo{
36191 {0, 23551},
36192 },
36193 },
36194 },
36195 {
36196 name: "XORWconst",
36197 auxType: auxInt32,
36198 argLen: 1,
36199 resultInArg0: true,
36200 clobberFlags: true,
36201 asm: s390x.AXORW,
36202 reg: regInfo{
36203 inputs: []inputInfo{
36204 {0, 23551},
36205 },
36206 outputs: []outputInfo{
36207 {0, 23551},
36208 },
36209 },
36210 },
36211 {
36212 name: "XORload",
36213 auxType: auxSymOff,
36214 argLen: 3,
36215 resultInArg0: true,
36216 clobberFlags: true,
36217 faultOnNilArg1: true,
36218 symEffect: SymRead,
36219 asm: s390x.AXOR,
36220 reg: regInfo{
36221 inputs: []inputInfo{
36222 {0, 23551},
36223 {1, 56318},
36224 },
36225 outputs: []outputInfo{
36226 {0, 23551},
36227 },
36228 },
36229 },
36230 {
36231 name: "XORWload",
36232 auxType: auxSymOff,
36233 argLen: 3,
36234 resultInArg0: true,
36235 clobberFlags: true,
36236 faultOnNilArg1: true,
36237 symEffect: SymRead,
36238 asm: s390x.AXORW,
36239 reg: regInfo{
36240 inputs: []inputInfo{
36241 {0, 23551},
36242 {1, 56318},
36243 },
36244 outputs: []outputInfo{
36245 {0, 23551},
36246 },
36247 },
36248 },
36249 {
36250 name: "ADDC",
36251 argLen: 2,
36252 commutative: true,
36253 asm: s390x.AADDC,
36254 reg: regInfo{
36255 inputs: []inputInfo{
36256 {0, 23551},
36257 {1, 23551},
36258 },
36259 outputs: []outputInfo{
36260 {0, 23551},
36261 },
36262 },
36263 },
36264 {
36265 name: "ADDCconst",
36266 auxType: auxInt16,
36267 argLen: 1,
36268 asm: s390x.AADDC,
36269 reg: regInfo{
36270 inputs: []inputInfo{
36271 {0, 23551},
36272 },
36273 outputs: []outputInfo{
36274 {0, 23551},
36275 },
36276 },
36277 },
36278 {
36279 name: "ADDE",
36280 argLen: 3,
36281 commutative: true,
36282 resultInArg0: true,
36283 asm: s390x.AADDE,
36284 reg: regInfo{
36285 inputs: []inputInfo{
36286 {0, 23551},
36287 {1, 23551},
36288 },
36289 outputs: []outputInfo{
36290 {0, 23551},
36291 },
36292 },
36293 },
36294 {
36295 name: "SUBC",
36296 argLen: 2,
36297 asm: s390x.ASUBC,
36298 reg: regInfo{
36299 inputs: []inputInfo{
36300 {0, 23551},
36301 {1, 23551},
36302 },
36303 outputs: []outputInfo{
36304 {0, 23551},
36305 },
36306 },
36307 },
36308 {
36309 name: "SUBE",
36310 argLen: 3,
36311 resultInArg0: true,
36312 asm: s390x.ASUBE,
36313 reg: regInfo{
36314 inputs: []inputInfo{
36315 {0, 23551},
36316 {1, 23551},
36317 },
36318 outputs: []outputInfo{
36319 {0, 23551},
36320 },
36321 },
36322 },
36323 {
36324 name: "CMP",
36325 argLen: 2,
36326 asm: s390x.ACMP,
36327 reg: regInfo{
36328 inputs: []inputInfo{
36329 {0, 56319},
36330 {1, 56319},
36331 },
36332 },
36333 },
36334 {
36335 name: "CMPW",
36336 argLen: 2,
36337 asm: s390x.ACMPW,
36338 reg: regInfo{
36339 inputs: []inputInfo{
36340 {0, 56319},
36341 {1, 56319},
36342 },
36343 },
36344 },
36345 {
36346 name: "CMPU",
36347 argLen: 2,
36348 asm: s390x.ACMPU,
36349 reg: regInfo{
36350 inputs: []inputInfo{
36351 {0, 56319},
36352 {1, 56319},
36353 },
36354 },
36355 },
36356 {
36357 name: "CMPWU",
36358 argLen: 2,
36359 asm: s390x.ACMPWU,
36360 reg: regInfo{
36361 inputs: []inputInfo{
36362 {0, 56319},
36363 {1, 56319},
36364 },
36365 },
36366 },
36367 {
36368 name: "CMPconst",
36369 auxType: auxInt32,
36370 argLen: 1,
36371 asm: s390x.ACMP,
36372 reg: regInfo{
36373 inputs: []inputInfo{
36374 {0, 56319},
36375 },
36376 },
36377 },
36378 {
36379 name: "CMPWconst",
36380 auxType: auxInt32,
36381 argLen: 1,
36382 asm: s390x.ACMPW,
36383 reg: regInfo{
36384 inputs: []inputInfo{
36385 {0, 56319},
36386 },
36387 },
36388 },
36389 {
36390 name: "CMPUconst",
36391 auxType: auxInt32,
36392 argLen: 1,
36393 asm: s390x.ACMPU,
36394 reg: regInfo{
36395 inputs: []inputInfo{
36396 {0, 56319},
36397 },
36398 },
36399 },
36400 {
36401 name: "CMPWUconst",
36402 auxType: auxInt32,
36403 argLen: 1,
36404 asm: s390x.ACMPWU,
36405 reg: regInfo{
36406 inputs: []inputInfo{
36407 {0, 56319},
36408 },
36409 },
36410 },
36411 {
36412 name: "FCMPS",
36413 argLen: 2,
36414 asm: s390x.ACEBR,
36415 reg: regInfo{
36416 inputs: []inputInfo{
36417 {0, 4294901760},
36418 {1, 4294901760},
36419 },
36420 },
36421 },
36422 {
36423 name: "FCMP",
36424 argLen: 2,
36425 asm: s390x.AFCMPU,
36426 reg: regInfo{
36427 inputs: []inputInfo{
36428 {0, 4294901760},
36429 {1, 4294901760},
36430 },
36431 },
36432 },
36433 {
36434 name: "LTDBR",
36435 argLen: 1,
36436 asm: s390x.ALTDBR,
36437 reg: regInfo{
36438 inputs: []inputInfo{
36439 {0, 4294901760},
36440 },
36441 },
36442 },
36443 {
36444 name: "LTEBR",
36445 argLen: 1,
36446 asm: s390x.ALTEBR,
36447 reg: regInfo{
36448 inputs: []inputInfo{
36449 {0, 4294901760},
36450 },
36451 },
36452 },
36453 {
36454 name: "SLD",
36455 argLen: 2,
36456 asm: s390x.ASLD,
36457 reg: regInfo{
36458 inputs: []inputInfo{
36459 {1, 23550},
36460 {0, 23551},
36461 },
36462 outputs: []outputInfo{
36463 {0, 23551},
36464 },
36465 },
36466 },
36467 {
36468 name: "SLW",
36469 argLen: 2,
36470 asm: s390x.ASLW,
36471 reg: regInfo{
36472 inputs: []inputInfo{
36473 {1, 23550},
36474 {0, 23551},
36475 },
36476 outputs: []outputInfo{
36477 {0, 23551},
36478 },
36479 },
36480 },
36481 {
36482 name: "SLDconst",
36483 auxType: auxUInt8,
36484 argLen: 1,
36485 asm: s390x.ASLD,
36486 reg: regInfo{
36487 inputs: []inputInfo{
36488 {0, 23551},
36489 },
36490 outputs: []outputInfo{
36491 {0, 23551},
36492 },
36493 },
36494 },
36495 {
36496 name: "SLWconst",
36497 auxType: auxUInt8,
36498 argLen: 1,
36499 asm: s390x.ASLW,
36500 reg: regInfo{
36501 inputs: []inputInfo{
36502 {0, 23551},
36503 },
36504 outputs: []outputInfo{
36505 {0, 23551},
36506 },
36507 },
36508 },
36509 {
36510 name: "SRD",
36511 argLen: 2,
36512 asm: s390x.ASRD,
36513 reg: regInfo{
36514 inputs: []inputInfo{
36515 {1, 23550},
36516 {0, 23551},
36517 },
36518 outputs: []outputInfo{
36519 {0, 23551},
36520 },
36521 },
36522 },
36523 {
36524 name: "SRW",
36525 argLen: 2,
36526 asm: s390x.ASRW,
36527 reg: regInfo{
36528 inputs: []inputInfo{
36529 {1, 23550},
36530 {0, 23551},
36531 },
36532 outputs: []outputInfo{
36533 {0, 23551},
36534 },
36535 },
36536 },
36537 {
36538 name: "SRDconst",
36539 auxType: auxUInt8,
36540 argLen: 1,
36541 asm: s390x.ASRD,
36542 reg: regInfo{
36543 inputs: []inputInfo{
36544 {0, 23551},
36545 },
36546 outputs: []outputInfo{
36547 {0, 23551},
36548 },
36549 },
36550 },
36551 {
36552 name: "SRWconst",
36553 auxType: auxUInt8,
36554 argLen: 1,
36555 asm: s390x.ASRW,
36556 reg: regInfo{
36557 inputs: []inputInfo{
36558 {0, 23551},
36559 },
36560 outputs: []outputInfo{
36561 {0, 23551},
36562 },
36563 },
36564 },
36565 {
36566 name: "SRAD",
36567 argLen: 2,
36568 clobberFlags: true,
36569 asm: s390x.ASRAD,
36570 reg: regInfo{
36571 inputs: []inputInfo{
36572 {1, 23550},
36573 {0, 23551},
36574 },
36575 outputs: []outputInfo{
36576 {0, 23551},
36577 },
36578 },
36579 },
36580 {
36581 name: "SRAW",
36582 argLen: 2,
36583 clobberFlags: true,
36584 asm: s390x.ASRAW,
36585 reg: regInfo{
36586 inputs: []inputInfo{
36587 {1, 23550},
36588 {0, 23551},
36589 },
36590 outputs: []outputInfo{
36591 {0, 23551},
36592 },
36593 },
36594 },
36595 {
36596 name: "SRADconst",
36597 auxType: auxUInt8,
36598 argLen: 1,
36599 clobberFlags: true,
36600 asm: s390x.ASRAD,
36601 reg: regInfo{
36602 inputs: []inputInfo{
36603 {0, 23551},
36604 },
36605 outputs: []outputInfo{
36606 {0, 23551},
36607 },
36608 },
36609 },
36610 {
36611 name: "SRAWconst",
36612 auxType: auxUInt8,
36613 argLen: 1,
36614 clobberFlags: true,
36615 asm: s390x.ASRAW,
36616 reg: regInfo{
36617 inputs: []inputInfo{
36618 {0, 23551},
36619 },
36620 outputs: []outputInfo{
36621 {0, 23551},
36622 },
36623 },
36624 },
36625 {
36626 name: "RLLG",
36627 argLen: 2,
36628 asm: s390x.ARLLG,
36629 reg: regInfo{
36630 inputs: []inputInfo{
36631 {1, 23550},
36632 {0, 23551},
36633 },
36634 outputs: []outputInfo{
36635 {0, 23551},
36636 },
36637 },
36638 },
36639 {
36640 name: "RLL",
36641 argLen: 2,
36642 asm: s390x.ARLL,
36643 reg: regInfo{
36644 inputs: []inputInfo{
36645 {1, 23550},
36646 {0, 23551},
36647 },
36648 outputs: []outputInfo{
36649 {0, 23551},
36650 },
36651 },
36652 },
36653 {
36654 name: "RLLconst",
36655 auxType: auxUInt8,
36656 argLen: 1,
36657 asm: s390x.ARLL,
36658 reg: regInfo{
36659 inputs: []inputInfo{
36660 {0, 23551},
36661 },
36662 outputs: []outputInfo{
36663 {0, 23551},
36664 },
36665 },
36666 },
36667 {
36668 name: "RXSBG",
36669 auxType: auxS390XRotateParams,
36670 argLen: 2,
36671 resultInArg0: true,
36672 clobberFlags: true,
36673 asm: s390x.ARXSBG,
36674 reg: regInfo{
36675 inputs: []inputInfo{
36676 {0, 23551},
36677 {1, 23551},
36678 },
36679 outputs: []outputInfo{
36680 {0, 23551},
36681 },
36682 },
36683 },
36684 {
36685 name: "RISBGZ",
36686 auxType: auxS390XRotateParams,
36687 argLen: 1,
36688 clobberFlags: true,
36689 asm: s390x.ARISBGZ,
36690 reg: regInfo{
36691 inputs: []inputInfo{
36692 {0, 23551},
36693 },
36694 outputs: []outputInfo{
36695 {0, 23551},
36696 },
36697 },
36698 },
36699 {
36700 name: "NEG",
36701 argLen: 1,
36702 clobberFlags: true,
36703 asm: s390x.ANEG,
36704 reg: regInfo{
36705 inputs: []inputInfo{
36706 {0, 23551},
36707 },
36708 outputs: []outputInfo{
36709 {0, 23551},
36710 },
36711 },
36712 },
36713 {
36714 name: "NEGW",
36715 argLen: 1,
36716 clobberFlags: true,
36717 asm: s390x.ANEGW,
36718 reg: regInfo{
36719 inputs: []inputInfo{
36720 {0, 23551},
36721 },
36722 outputs: []outputInfo{
36723 {0, 23551},
36724 },
36725 },
36726 },
36727 {
36728 name: "NOT",
36729 argLen: 1,
36730 resultInArg0: true,
36731 clobberFlags: true,
36732 reg: regInfo{
36733 inputs: []inputInfo{
36734 {0, 23551},
36735 },
36736 outputs: []outputInfo{
36737 {0, 23551},
36738 },
36739 },
36740 },
36741 {
36742 name: "NOTW",
36743 argLen: 1,
36744 resultInArg0: true,
36745 clobberFlags: true,
36746 reg: regInfo{
36747 inputs: []inputInfo{
36748 {0, 23551},
36749 },
36750 outputs: []outputInfo{
36751 {0, 23551},
36752 },
36753 },
36754 },
36755 {
36756 name: "FSQRT",
36757 argLen: 1,
36758 asm: s390x.AFSQRT,
36759 reg: regInfo{
36760 inputs: []inputInfo{
36761 {0, 4294901760},
36762 },
36763 outputs: []outputInfo{
36764 {0, 4294901760},
36765 },
36766 },
36767 },
36768 {
36769 name: "FSQRTS",
36770 argLen: 1,
36771 asm: s390x.AFSQRTS,
36772 reg: regInfo{
36773 inputs: []inputInfo{
36774 {0, 4294901760},
36775 },
36776 outputs: []outputInfo{
36777 {0, 4294901760},
36778 },
36779 },
36780 },
36781 {
36782 name: "LOCGR",
36783 auxType: auxS390XCCMask,
36784 argLen: 3,
36785 resultInArg0: true,
36786 asm: s390x.ALOCGR,
36787 reg: regInfo{
36788 inputs: []inputInfo{
36789 {0, 23551},
36790 {1, 23551},
36791 },
36792 outputs: []outputInfo{
36793 {0, 23551},
36794 },
36795 },
36796 },
36797 {
36798 name: "MOVBreg",
36799 argLen: 1,
36800 asm: s390x.AMOVB,
36801 reg: regInfo{
36802 inputs: []inputInfo{
36803 {0, 56319},
36804 },
36805 outputs: []outputInfo{
36806 {0, 23551},
36807 },
36808 },
36809 },
36810 {
36811 name: "MOVBZreg",
36812 argLen: 1,
36813 asm: s390x.AMOVBZ,
36814 reg: regInfo{
36815 inputs: []inputInfo{
36816 {0, 56319},
36817 },
36818 outputs: []outputInfo{
36819 {0, 23551},
36820 },
36821 },
36822 },
36823 {
36824 name: "MOVHreg",
36825 argLen: 1,
36826 asm: s390x.AMOVH,
36827 reg: regInfo{
36828 inputs: []inputInfo{
36829 {0, 56319},
36830 },
36831 outputs: []outputInfo{
36832 {0, 23551},
36833 },
36834 },
36835 },
36836 {
36837 name: "MOVHZreg",
36838 argLen: 1,
36839 asm: s390x.AMOVHZ,
36840 reg: regInfo{
36841 inputs: []inputInfo{
36842 {0, 56319},
36843 },
36844 outputs: []outputInfo{
36845 {0, 23551},
36846 },
36847 },
36848 },
36849 {
36850 name: "MOVWreg",
36851 argLen: 1,
36852 asm: s390x.AMOVW,
36853 reg: regInfo{
36854 inputs: []inputInfo{
36855 {0, 56319},
36856 },
36857 outputs: []outputInfo{
36858 {0, 23551},
36859 },
36860 },
36861 },
36862 {
36863 name: "MOVWZreg",
36864 argLen: 1,
36865 asm: s390x.AMOVWZ,
36866 reg: regInfo{
36867 inputs: []inputInfo{
36868 {0, 56319},
36869 },
36870 outputs: []outputInfo{
36871 {0, 23551},
36872 },
36873 },
36874 },
36875 {
36876 name: "MOVDconst",
36877 auxType: auxInt64,
36878 argLen: 0,
36879 rematerializeable: true,
36880 asm: s390x.AMOVD,
36881 reg: regInfo{
36882 outputs: []outputInfo{
36883 {0, 23551},
36884 },
36885 },
36886 },
36887 {
36888 name: "LDGR",
36889 argLen: 1,
36890 asm: s390x.ALDGR,
36891 reg: regInfo{
36892 inputs: []inputInfo{
36893 {0, 23551},
36894 },
36895 outputs: []outputInfo{
36896 {0, 4294901760},
36897 },
36898 },
36899 },
36900 {
36901 name: "LGDR",
36902 argLen: 1,
36903 asm: s390x.ALGDR,
36904 reg: regInfo{
36905 inputs: []inputInfo{
36906 {0, 4294901760},
36907 },
36908 outputs: []outputInfo{
36909 {0, 23551},
36910 },
36911 },
36912 },
36913 {
36914 name: "CFDBRA",
36915 argLen: 1,
36916 clobberFlags: true,
36917 asm: s390x.ACFDBRA,
36918 reg: regInfo{
36919 inputs: []inputInfo{
36920 {0, 4294901760},
36921 },
36922 outputs: []outputInfo{
36923 {0, 23551},
36924 },
36925 },
36926 },
36927 {
36928 name: "CGDBRA",
36929 argLen: 1,
36930 clobberFlags: true,
36931 asm: s390x.ACGDBRA,
36932 reg: regInfo{
36933 inputs: []inputInfo{
36934 {0, 4294901760},
36935 },
36936 outputs: []outputInfo{
36937 {0, 23551},
36938 },
36939 },
36940 },
36941 {
36942 name: "CFEBRA",
36943 argLen: 1,
36944 clobberFlags: true,
36945 asm: s390x.ACFEBRA,
36946 reg: regInfo{
36947 inputs: []inputInfo{
36948 {0, 4294901760},
36949 },
36950 outputs: []outputInfo{
36951 {0, 23551},
36952 },
36953 },
36954 },
36955 {
36956 name: "CGEBRA",
36957 argLen: 1,
36958 clobberFlags: true,
36959 asm: s390x.ACGEBRA,
36960 reg: regInfo{
36961 inputs: []inputInfo{
36962 {0, 4294901760},
36963 },
36964 outputs: []outputInfo{
36965 {0, 23551},
36966 },
36967 },
36968 },
36969 {
36970 name: "CEFBRA",
36971 argLen: 1,
36972 clobberFlags: true,
36973 asm: s390x.ACEFBRA,
36974 reg: regInfo{
36975 inputs: []inputInfo{
36976 {0, 23551},
36977 },
36978 outputs: []outputInfo{
36979 {0, 4294901760},
36980 },
36981 },
36982 },
36983 {
36984 name: "CDFBRA",
36985 argLen: 1,
36986 clobberFlags: true,
36987 asm: s390x.ACDFBRA,
36988 reg: regInfo{
36989 inputs: []inputInfo{
36990 {0, 23551},
36991 },
36992 outputs: []outputInfo{
36993 {0, 4294901760},
36994 },
36995 },
36996 },
36997 {
36998 name: "CEGBRA",
36999 argLen: 1,
37000 clobberFlags: true,
37001 asm: s390x.ACEGBRA,
37002 reg: regInfo{
37003 inputs: []inputInfo{
37004 {0, 23551},
37005 },
37006 outputs: []outputInfo{
37007 {0, 4294901760},
37008 },
37009 },
37010 },
37011 {
37012 name: "CDGBRA",
37013 argLen: 1,
37014 clobberFlags: true,
37015 asm: s390x.ACDGBRA,
37016 reg: regInfo{
37017 inputs: []inputInfo{
37018 {0, 23551},
37019 },
37020 outputs: []outputInfo{
37021 {0, 4294901760},
37022 },
37023 },
37024 },
37025 {
37026 name: "CLFEBR",
37027 argLen: 1,
37028 clobberFlags: true,
37029 asm: s390x.ACLFEBR,
37030 reg: regInfo{
37031 inputs: []inputInfo{
37032 {0, 4294901760},
37033 },
37034 outputs: []outputInfo{
37035 {0, 23551},
37036 },
37037 },
37038 },
37039 {
37040 name: "CLFDBR",
37041 argLen: 1,
37042 clobberFlags: true,
37043 asm: s390x.ACLFDBR,
37044 reg: regInfo{
37045 inputs: []inputInfo{
37046 {0, 4294901760},
37047 },
37048 outputs: []outputInfo{
37049 {0, 23551},
37050 },
37051 },
37052 },
37053 {
37054 name: "CLGEBR",
37055 argLen: 1,
37056 clobberFlags: true,
37057 asm: s390x.ACLGEBR,
37058 reg: regInfo{
37059 inputs: []inputInfo{
37060 {0, 4294901760},
37061 },
37062 outputs: []outputInfo{
37063 {0, 23551},
37064 },
37065 },
37066 },
37067 {
37068 name: "CLGDBR",
37069 argLen: 1,
37070 clobberFlags: true,
37071 asm: s390x.ACLGDBR,
37072 reg: regInfo{
37073 inputs: []inputInfo{
37074 {0, 4294901760},
37075 },
37076 outputs: []outputInfo{
37077 {0, 23551},
37078 },
37079 },
37080 },
37081 {
37082 name: "CELFBR",
37083 argLen: 1,
37084 clobberFlags: true,
37085 asm: s390x.ACELFBR,
37086 reg: regInfo{
37087 inputs: []inputInfo{
37088 {0, 23551},
37089 },
37090 outputs: []outputInfo{
37091 {0, 4294901760},
37092 },
37093 },
37094 },
37095 {
37096 name: "CDLFBR",
37097 argLen: 1,
37098 clobberFlags: true,
37099 asm: s390x.ACDLFBR,
37100 reg: regInfo{
37101 inputs: []inputInfo{
37102 {0, 23551},
37103 },
37104 outputs: []outputInfo{
37105 {0, 4294901760},
37106 },
37107 },
37108 },
37109 {
37110 name: "CELGBR",
37111 argLen: 1,
37112 clobberFlags: true,
37113 asm: s390x.ACELGBR,
37114 reg: regInfo{
37115 inputs: []inputInfo{
37116 {0, 23551},
37117 },
37118 outputs: []outputInfo{
37119 {0, 4294901760},
37120 },
37121 },
37122 },
37123 {
37124 name: "CDLGBR",
37125 argLen: 1,
37126 clobberFlags: true,
37127 asm: s390x.ACDLGBR,
37128 reg: regInfo{
37129 inputs: []inputInfo{
37130 {0, 23551},
37131 },
37132 outputs: []outputInfo{
37133 {0, 4294901760},
37134 },
37135 },
37136 },
37137 {
37138 name: "LEDBR",
37139 argLen: 1,
37140 asm: s390x.ALEDBR,
37141 reg: regInfo{
37142 inputs: []inputInfo{
37143 {0, 4294901760},
37144 },
37145 outputs: []outputInfo{
37146 {0, 4294901760},
37147 },
37148 },
37149 },
37150 {
37151 name: "LDEBR",
37152 argLen: 1,
37153 asm: s390x.ALDEBR,
37154 reg: regInfo{
37155 inputs: []inputInfo{
37156 {0, 4294901760},
37157 },
37158 outputs: []outputInfo{
37159 {0, 4294901760},
37160 },
37161 },
37162 },
37163 {
37164 name: "MOVDaddr",
37165 auxType: auxSymOff,
37166 argLen: 1,
37167 rematerializeable: true,
37168 symEffect: SymAddr,
37169 reg: regInfo{
37170 inputs: []inputInfo{
37171 {0, 4295000064},
37172 },
37173 outputs: []outputInfo{
37174 {0, 23551},
37175 },
37176 },
37177 },
37178 {
37179 name: "MOVDaddridx",
37180 auxType: auxSymOff,
37181 argLen: 2,
37182 symEffect: SymAddr,
37183 reg: regInfo{
37184 inputs: []inputInfo{
37185 {0, 4295000064},
37186 {1, 56318},
37187 },
37188 outputs: []outputInfo{
37189 {0, 23551},
37190 },
37191 },
37192 },
37193 {
37194 name: "MOVBZload",
37195 auxType: auxSymOff,
37196 argLen: 2,
37197 faultOnNilArg0: true,
37198 symEffect: SymRead,
37199 asm: s390x.AMOVBZ,
37200 reg: regInfo{
37201 inputs: []inputInfo{
37202 {0, 4295023614},
37203 },
37204 outputs: []outputInfo{
37205 {0, 23551},
37206 },
37207 },
37208 },
37209 {
37210 name: "MOVBload",
37211 auxType: auxSymOff,
37212 argLen: 2,
37213 faultOnNilArg0: true,
37214 symEffect: SymRead,
37215 asm: s390x.AMOVB,
37216 reg: regInfo{
37217 inputs: []inputInfo{
37218 {0, 4295023614},
37219 },
37220 outputs: []outputInfo{
37221 {0, 23551},
37222 },
37223 },
37224 },
37225 {
37226 name: "MOVHZload",
37227 auxType: auxSymOff,
37228 argLen: 2,
37229 faultOnNilArg0: true,
37230 symEffect: SymRead,
37231 asm: s390x.AMOVHZ,
37232 reg: regInfo{
37233 inputs: []inputInfo{
37234 {0, 4295023614},
37235 },
37236 outputs: []outputInfo{
37237 {0, 23551},
37238 },
37239 },
37240 },
37241 {
37242 name: "MOVHload",
37243 auxType: auxSymOff,
37244 argLen: 2,
37245 faultOnNilArg0: true,
37246 symEffect: SymRead,
37247 asm: s390x.AMOVH,
37248 reg: regInfo{
37249 inputs: []inputInfo{
37250 {0, 4295023614},
37251 },
37252 outputs: []outputInfo{
37253 {0, 23551},
37254 },
37255 },
37256 },
37257 {
37258 name: "MOVWZload",
37259 auxType: auxSymOff,
37260 argLen: 2,
37261 faultOnNilArg0: true,
37262 symEffect: SymRead,
37263 asm: s390x.AMOVWZ,
37264 reg: regInfo{
37265 inputs: []inputInfo{
37266 {0, 4295023614},
37267 },
37268 outputs: []outputInfo{
37269 {0, 23551},
37270 },
37271 },
37272 },
37273 {
37274 name: "MOVWload",
37275 auxType: auxSymOff,
37276 argLen: 2,
37277 faultOnNilArg0: true,
37278 symEffect: SymRead,
37279 asm: s390x.AMOVW,
37280 reg: regInfo{
37281 inputs: []inputInfo{
37282 {0, 4295023614},
37283 },
37284 outputs: []outputInfo{
37285 {0, 23551},
37286 },
37287 },
37288 },
37289 {
37290 name: "MOVDload",
37291 auxType: auxSymOff,
37292 argLen: 2,
37293 faultOnNilArg0: true,
37294 symEffect: SymRead,
37295 asm: s390x.AMOVD,
37296 reg: regInfo{
37297 inputs: []inputInfo{
37298 {0, 4295023614},
37299 },
37300 outputs: []outputInfo{
37301 {0, 23551},
37302 },
37303 },
37304 },
37305 {
37306 name: "MOVWBR",
37307 argLen: 1,
37308 asm: s390x.AMOVWBR,
37309 reg: regInfo{
37310 inputs: []inputInfo{
37311 {0, 23551},
37312 },
37313 outputs: []outputInfo{
37314 {0, 23551},
37315 },
37316 },
37317 },
37318 {
37319 name: "MOVDBR",
37320 argLen: 1,
37321 asm: s390x.AMOVDBR,
37322 reg: regInfo{
37323 inputs: []inputInfo{
37324 {0, 23551},
37325 },
37326 outputs: []outputInfo{
37327 {0, 23551},
37328 },
37329 },
37330 },
37331 {
37332 name: "MOVHBRload",
37333 auxType: auxSymOff,
37334 argLen: 2,
37335 faultOnNilArg0: true,
37336 symEffect: SymRead,
37337 asm: s390x.AMOVHBR,
37338 reg: regInfo{
37339 inputs: []inputInfo{
37340 {0, 4295023614},
37341 },
37342 outputs: []outputInfo{
37343 {0, 23551},
37344 },
37345 },
37346 },
37347 {
37348 name: "MOVWBRload",
37349 auxType: auxSymOff,
37350 argLen: 2,
37351 faultOnNilArg0: true,
37352 symEffect: SymRead,
37353 asm: s390x.AMOVWBR,
37354 reg: regInfo{
37355 inputs: []inputInfo{
37356 {0, 4295023614},
37357 },
37358 outputs: []outputInfo{
37359 {0, 23551},
37360 },
37361 },
37362 },
37363 {
37364 name: "MOVDBRload",
37365 auxType: auxSymOff,
37366 argLen: 2,
37367 faultOnNilArg0: true,
37368 symEffect: SymRead,
37369 asm: s390x.AMOVDBR,
37370 reg: regInfo{
37371 inputs: []inputInfo{
37372 {0, 4295023614},
37373 },
37374 outputs: []outputInfo{
37375 {0, 23551},
37376 },
37377 },
37378 },
37379 {
37380 name: "MOVBstore",
37381 auxType: auxSymOff,
37382 argLen: 3,
37383 faultOnNilArg0: true,
37384 symEffect: SymWrite,
37385 asm: s390x.AMOVB,
37386 reg: regInfo{
37387 inputs: []inputInfo{
37388 {0, 4295023614},
37389 {1, 56319},
37390 },
37391 },
37392 },
37393 {
37394 name: "MOVHstore",
37395 auxType: auxSymOff,
37396 argLen: 3,
37397 faultOnNilArg0: true,
37398 symEffect: SymWrite,
37399 asm: s390x.AMOVH,
37400 reg: regInfo{
37401 inputs: []inputInfo{
37402 {0, 4295023614},
37403 {1, 56319},
37404 },
37405 },
37406 },
37407 {
37408 name: "MOVWstore",
37409 auxType: auxSymOff,
37410 argLen: 3,
37411 faultOnNilArg0: true,
37412 symEffect: SymWrite,
37413 asm: s390x.AMOVW,
37414 reg: regInfo{
37415 inputs: []inputInfo{
37416 {0, 4295023614},
37417 {1, 56319},
37418 },
37419 },
37420 },
37421 {
37422 name: "MOVDstore",
37423 auxType: auxSymOff,
37424 argLen: 3,
37425 faultOnNilArg0: true,
37426 symEffect: SymWrite,
37427 asm: s390x.AMOVD,
37428 reg: regInfo{
37429 inputs: []inputInfo{
37430 {0, 4295023614},
37431 {1, 56319},
37432 },
37433 },
37434 },
37435 {
37436 name: "MOVHBRstore",
37437 auxType: auxSymOff,
37438 argLen: 3,
37439 faultOnNilArg0: true,
37440 symEffect: SymWrite,
37441 asm: s390x.AMOVHBR,
37442 reg: regInfo{
37443 inputs: []inputInfo{
37444 {0, 56318},
37445 {1, 56319},
37446 },
37447 },
37448 },
37449 {
37450 name: "MOVWBRstore",
37451 auxType: auxSymOff,
37452 argLen: 3,
37453 faultOnNilArg0: true,
37454 symEffect: SymWrite,
37455 asm: s390x.AMOVWBR,
37456 reg: regInfo{
37457 inputs: []inputInfo{
37458 {0, 56318},
37459 {1, 56319},
37460 },
37461 },
37462 },
37463 {
37464 name: "MOVDBRstore",
37465 auxType: auxSymOff,
37466 argLen: 3,
37467 faultOnNilArg0: true,
37468 symEffect: SymWrite,
37469 asm: s390x.AMOVDBR,
37470 reg: regInfo{
37471 inputs: []inputInfo{
37472 {0, 56318},
37473 {1, 56319},
37474 },
37475 },
37476 },
37477 {
37478 name: "MVC",
37479 auxType: auxSymValAndOff,
37480 argLen: 3,
37481 clobberFlags: true,
37482 faultOnNilArg0: true,
37483 faultOnNilArg1: true,
37484 symEffect: SymNone,
37485 asm: s390x.AMVC,
37486 reg: regInfo{
37487 inputs: []inputInfo{
37488 {0, 56318},
37489 {1, 56318},
37490 },
37491 },
37492 },
37493 {
37494 name: "MOVBZloadidx",
37495 auxType: auxSymOff,
37496 argLen: 3,
37497 commutative: true,
37498 symEffect: SymRead,
37499 asm: s390x.AMOVBZ,
37500 reg: regInfo{
37501 inputs: []inputInfo{
37502 {1, 56318},
37503 {0, 4295023614},
37504 },
37505 outputs: []outputInfo{
37506 {0, 23551},
37507 },
37508 },
37509 },
37510 {
37511 name: "MOVBloadidx",
37512 auxType: auxSymOff,
37513 argLen: 3,
37514 commutative: true,
37515 symEffect: SymRead,
37516 asm: s390x.AMOVB,
37517 reg: regInfo{
37518 inputs: []inputInfo{
37519 {1, 56318},
37520 {0, 4295023614},
37521 },
37522 outputs: []outputInfo{
37523 {0, 23551},
37524 },
37525 },
37526 },
37527 {
37528 name: "MOVHZloadidx",
37529 auxType: auxSymOff,
37530 argLen: 3,
37531 commutative: true,
37532 symEffect: SymRead,
37533 asm: s390x.AMOVHZ,
37534 reg: regInfo{
37535 inputs: []inputInfo{
37536 {1, 56318},
37537 {0, 4295023614},
37538 },
37539 outputs: []outputInfo{
37540 {0, 23551},
37541 },
37542 },
37543 },
37544 {
37545 name: "MOVHloadidx",
37546 auxType: auxSymOff,
37547 argLen: 3,
37548 commutative: true,
37549 symEffect: SymRead,
37550 asm: s390x.AMOVH,
37551 reg: regInfo{
37552 inputs: []inputInfo{
37553 {1, 56318},
37554 {0, 4295023614},
37555 },
37556 outputs: []outputInfo{
37557 {0, 23551},
37558 },
37559 },
37560 },
37561 {
37562 name: "MOVWZloadidx",
37563 auxType: auxSymOff,
37564 argLen: 3,
37565 commutative: true,
37566 symEffect: SymRead,
37567 asm: s390x.AMOVWZ,
37568 reg: regInfo{
37569 inputs: []inputInfo{
37570 {1, 56318},
37571 {0, 4295023614},
37572 },
37573 outputs: []outputInfo{
37574 {0, 23551},
37575 },
37576 },
37577 },
37578 {
37579 name: "MOVWloadidx",
37580 auxType: auxSymOff,
37581 argLen: 3,
37582 commutative: true,
37583 symEffect: SymRead,
37584 asm: s390x.AMOVW,
37585 reg: regInfo{
37586 inputs: []inputInfo{
37587 {1, 56318},
37588 {0, 4295023614},
37589 },
37590 outputs: []outputInfo{
37591 {0, 23551},
37592 },
37593 },
37594 },
37595 {
37596 name: "MOVDloadidx",
37597 auxType: auxSymOff,
37598 argLen: 3,
37599 commutative: true,
37600 symEffect: SymRead,
37601 asm: s390x.AMOVD,
37602 reg: regInfo{
37603 inputs: []inputInfo{
37604 {1, 56318},
37605 {0, 4295023614},
37606 },
37607 outputs: []outputInfo{
37608 {0, 23551},
37609 },
37610 },
37611 },
37612 {
37613 name: "MOVHBRloadidx",
37614 auxType: auxSymOff,
37615 argLen: 3,
37616 commutative: true,
37617 symEffect: SymRead,
37618 asm: s390x.AMOVHBR,
37619 reg: regInfo{
37620 inputs: []inputInfo{
37621 {1, 56318},
37622 {0, 4295023614},
37623 },
37624 outputs: []outputInfo{
37625 {0, 23551},
37626 },
37627 },
37628 },
37629 {
37630 name: "MOVWBRloadidx",
37631 auxType: auxSymOff,
37632 argLen: 3,
37633 commutative: true,
37634 symEffect: SymRead,
37635 asm: s390x.AMOVWBR,
37636 reg: regInfo{
37637 inputs: []inputInfo{
37638 {1, 56318},
37639 {0, 4295023614},
37640 },
37641 outputs: []outputInfo{
37642 {0, 23551},
37643 },
37644 },
37645 },
37646 {
37647 name: "MOVDBRloadidx",
37648 auxType: auxSymOff,
37649 argLen: 3,
37650 commutative: true,
37651 symEffect: SymRead,
37652 asm: s390x.AMOVDBR,
37653 reg: regInfo{
37654 inputs: []inputInfo{
37655 {1, 56318},
37656 {0, 4295023614},
37657 },
37658 outputs: []outputInfo{
37659 {0, 23551},
37660 },
37661 },
37662 },
37663 {
37664 name: "MOVBstoreidx",
37665 auxType: auxSymOff,
37666 argLen: 4,
37667 commutative: true,
37668 symEffect: SymWrite,
37669 asm: s390x.AMOVB,
37670 reg: regInfo{
37671 inputs: []inputInfo{
37672 {0, 56318},
37673 {1, 56318},
37674 {2, 56319},
37675 },
37676 },
37677 },
37678 {
37679 name: "MOVHstoreidx",
37680 auxType: auxSymOff,
37681 argLen: 4,
37682 commutative: true,
37683 symEffect: SymWrite,
37684 asm: s390x.AMOVH,
37685 reg: regInfo{
37686 inputs: []inputInfo{
37687 {0, 56318},
37688 {1, 56318},
37689 {2, 56319},
37690 },
37691 },
37692 },
37693 {
37694 name: "MOVWstoreidx",
37695 auxType: auxSymOff,
37696 argLen: 4,
37697 commutative: true,
37698 symEffect: SymWrite,
37699 asm: s390x.AMOVW,
37700 reg: regInfo{
37701 inputs: []inputInfo{
37702 {0, 56318},
37703 {1, 56318},
37704 {2, 56319},
37705 },
37706 },
37707 },
37708 {
37709 name: "MOVDstoreidx",
37710 auxType: auxSymOff,
37711 argLen: 4,
37712 commutative: true,
37713 symEffect: SymWrite,
37714 asm: s390x.AMOVD,
37715 reg: regInfo{
37716 inputs: []inputInfo{
37717 {0, 56318},
37718 {1, 56318},
37719 {2, 56319},
37720 },
37721 },
37722 },
37723 {
37724 name: "MOVHBRstoreidx",
37725 auxType: auxSymOff,
37726 argLen: 4,
37727 commutative: true,
37728 symEffect: SymWrite,
37729 asm: s390x.AMOVHBR,
37730 reg: regInfo{
37731 inputs: []inputInfo{
37732 {0, 56318},
37733 {1, 56318},
37734 {2, 56319},
37735 },
37736 },
37737 },
37738 {
37739 name: "MOVWBRstoreidx",
37740 auxType: auxSymOff,
37741 argLen: 4,
37742 commutative: true,
37743 symEffect: SymWrite,
37744 asm: s390x.AMOVWBR,
37745 reg: regInfo{
37746 inputs: []inputInfo{
37747 {0, 56318},
37748 {1, 56318},
37749 {2, 56319},
37750 },
37751 },
37752 },
37753 {
37754 name: "MOVDBRstoreidx",
37755 auxType: auxSymOff,
37756 argLen: 4,
37757 commutative: true,
37758 symEffect: SymWrite,
37759 asm: s390x.AMOVDBR,
37760 reg: regInfo{
37761 inputs: []inputInfo{
37762 {0, 56318},
37763 {1, 56318},
37764 {2, 56319},
37765 },
37766 },
37767 },
37768 {
37769 name: "MOVBstoreconst",
37770 auxType: auxSymValAndOff,
37771 argLen: 2,
37772 faultOnNilArg0: true,
37773 symEffect: SymWrite,
37774 asm: s390x.AMOVB,
37775 reg: regInfo{
37776 inputs: []inputInfo{
37777 {0, 4295023614},
37778 },
37779 },
37780 },
37781 {
37782 name: "MOVHstoreconst",
37783 auxType: auxSymValAndOff,
37784 argLen: 2,
37785 faultOnNilArg0: true,
37786 symEffect: SymWrite,
37787 asm: s390x.AMOVH,
37788 reg: regInfo{
37789 inputs: []inputInfo{
37790 {0, 4295023614},
37791 },
37792 },
37793 },
37794 {
37795 name: "MOVWstoreconst",
37796 auxType: auxSymValAndOff,
37797 argLen: 2,
37798 faultOnNilArg0: true,
37799 symEffect: SymWrite,
37800 asm: s390x.AMOVW,
37801 reg: regInfo{
37802 inputs: []inputInfo{
37803 {0, 4295023614},
37804 },
37805 },
37806 },
37807 {
37808 name: "MOVDstoreconst",
37809 auxType: auxSymValAndOff,
37810 argLen: 2,
37811 faultOnNilArg0: true,
37812 symEffect: SymWrite,
37813 asm: s390x.AMOVD,
37814 reg: regInfo{
37815 inputs: []inputInfo{
37816 {0, 4295023614},
37817 },
37818 },
37819 },
37820 {
37821 name: "CLEAR",
37822 auxType: auxSymValAndOff,
37823 argLen: 2,
37824 clobberFlags: true,
37825 faultOnNilArg0: true,
37826 symEffect: SymWrite,
37827 asm: s390x.ACLEAR,
37828 reg: regInfo{
37829 inputs: []inputInfo{
37830 {0, 23550},
37831 },
37832 },
37833 },
37834 {
37835 name: "CALLstatic",
37836 auxType: auxCallOff,
37837 argLen: 1,
37838 clobberFlags: true,
37839 call: true,
37840 reg: regInfo{
37841 clobbers: 4294933503,
37842 },
37843 },
37844 {
37845 name: "CALLtail",
37846 auxType: auxCallOff,
37847 argLen: 1,
37848 clobberFlags: true,
37849 call: true,
37850 tailCall: true,
37851 reg: regInfo{
37852 clobbers: 4294933503,
37853 },
37854 },
37855 {
37856 name: "CALLclosure",
37857 auxType: auxCallOff,
37858 argLen: 3,
37859 clobberFlags: true,
37860 call: true,
37861 reg: regInfo{
37862 inputs: []inputInfo{
37863 {1, 4096},
37864 {0, 56318},
37865 },
37866 clobbers: 4294933503,
37867 },
37868 },
37869 {
37870 name: "CALLinter",
37871 auxType: auxCallOff,
37872 argLen: 2,
37873 clobberFlags: true,
37874 call: true,
37875 reg: regInfo{
37876 inputs: []inputInfo{
37877 {0, 23550},
37878 },
37879 clobbers: 4294933503,
37880 },
37881 },
37882 {
37883 name: "InvertFlags",
37884 argLen: 1,
37885 reg: regInfo{},
37886 },
37887 {
37888 name: "LoweredGetG",
37889 argLen: 1,
37890 reg: regInfo{
37891 outputs: []outputInfo{
37892 {0, 23551},
37893 },
37894 },
37895 },
37896 {
37897 name: "LoweredGetClosurePtr",
37898 argLen: 0,
37899 zeroWidth: true,
37900 reg: regInfo{
37901 outputs: []outputInfo{
37902 {0, 4096},
37903 },
37904 },
37905 },
37906 {
37907 name: "LoweredGetCallerSP",
37908 argLen: 1,
37909 rematerializeable: true,
37910 reg: regInfo{
37911 outputs: []outputInfo{
37912 {0, 23551},
37913 },
37914 },
37915 },
37916 {
37917 name: "LoweredGetCallerPC",
37918 argLen: 0,
37919 rematerializeable: true,
37920 reg: regInfo{
37921 outputs: []outputInfo{
37922 {0, 23551},
37923 },
37924 },
37925 },
37926 {
37927 name: "LoweredNilCheck",
37928 argLen: 2,
37929 clobberFlags: true,
37930 nilCheck: true,
37931 faultOnNilArg0: true,
37932 reg: regInfo{
37933 inputs: []inputInfo{
37934 {0, 56318},
37935 },
37936 },
37937 },
37938 {
37939 name: "LoweredRound32F",
37940 argLen: 1,
37941 resultInArg0: true,
37942 zeroWidth: true,
37943 reg: regInfo{
37944 inputs: []inputInfo{
37945 {0, 4294901760},
37946 },
37947 outputs: []outputInfo{
37948 {0, 4294901760},
37949 },
37950 },
37951 },
37952 {
37953 name: "LoweredRound64F",
37954 argLen: 1,
37955 resultInArg0: true,
37956 zeroWidth: true,
37957 reg: regInfo{
37958 inputs: []inputInfo{
37959 {0, 4294901760},
37960 },
37961 outputs: []outputInfo{
37962 {0, 4294901760},
37963 },
37964 },
37965 },
37966 {
37967 name: "LoweredWB",
37968 auxType: auxInt64,
37969 argLen: 1,
37970 clobberFlags: true,
37971 reg: regInfo{
37972 clobbers: 4294918146,
37973 outputs: []outputInfo{
37974 {0, 512},
37975 },
37976 },
37977 },
37978 {
37979 name: "LoweredPanicBoundsA",
37980 auxType: auxInt64,
37981 argLen: 3,
37982 call: true,
37983 reg: regInfo{
37984 inputs: []inputInfo{
37985 {0, 4},
37986 {1, 8},
37987 },
37988 },
37989 },
37990 {
37991 name: "LoweredPanicBoundsB",
37992 auxType: auxInt64,
37993 argLen: 3,
37994 call: true,
37995 reg: regInfo{
37996 inputs: []inputInfo{
37997 {0, 2},
37998 {1, 4},
37999 },
38000 },
38001 },
38002 {
38003 name: "LoweredPanicBoundsC",
38004 auxType: auxInt64,
38005 argLen: 3,
38006 call: true,
38007 reg: regInfo{
38008 inputs: []inputInfo{
38009 {0, 1},
38010 {1, 2},
38011 },
38012 },
38013 },
38014 {
38015 name: "FlagEQ",
38016 argLen: 0,
38017 reg: regInfo{},
38018 },
38019 {
38020 name: "FlagLT",
38021 argLen: 0,
38022 reg: regInfo{},
38023 },
38024 {
38025 name: "FlagGT",
38026 argLen: 0,
38027 reg: regInfo{},
38028 },
38029 {
38030 name: "FlagOV",
38031 argLen: 0,
38032 reg: regInfo{},
38033 },
38034 {
38035 name: "SYNC",
38036 argLen: 1,
38037 asm: s390x.ASYNC,
38038 reg: regInfo{},
38039 },
38040 {
38041 name: "MOVBZatomicload",
38042 auxType: auxSymOff,
38043 argLen: 2,
38044 faultOnNilArg0: true,
38045 symEffect: SymRead,
38046 asm: s390x.AMOVBZ,
38047 reg: regInfo{
38048 inputs: []inputInfo{
38049 {0, 4295023614},
38050 },
38051 outputs: []outputInfo{
38052 {0, 23551},
38053 },
38054 },
38055 },
38056 {
38057 name: "MOVWZatomicload",
38058 auxType: auxSymOff,
38059 argLen: 2,
38060 faultOnNilArg0: true,
38061 symEffect: SymRead,
38062 asm: s390x.AMOVWZ,
38063 reg: regInfo{
38064 inputs: []inputInfo{
38065 {0, 4295023614},
38066 },
38067 outputs: []outputInfo{
38068 {0, 23551},
38069 },
38070 },
38071 },
38072 {
38073 name: "MOVDatomicload",
38074 auxType: auxSymOff,
38075 argLen: 2,
38076 faultOnNilArg0: true,
38077 symEffect: SymRead,
38078 asm: s390x.AMOVD,
38079 reg: regInfo{
38080 inputs: []inputInfo{
38081 {0, 4295023614},
38082 },
38083 outputs: []outputInfo{
38084 {0, 23551},
38085 },
38086 },
38087 },
38088 {
38089 name: "MOVBatomicstore",
38090 auxType: auxSymOff,
38091 argLen: 3,
38092 clobberFlags: true,
38093 faultOnNilArg0: true,
38094 hasSideEffects: true,
38095 symEffect: SymWrite,
38096 asm: s390x.AMOVB,
38097 reg: regInfo{
38098 inputs: []inputInfo{
38099 {0, 4295023614},
38100 {1, 56319},
38101 },
38102 },
38103 },
38104 {
38105 name: "MOVWatomicstore",
38106 auxType: auxSymOff,
38107 argLen: 3,
38108 clobberFlags: true,
38109 faultOnNilArg0: true,
38110 hasSideEffects: true,
38111 symEffect: SymWrite,
38112 asm: s390x.AMOVW,
38113 reg: regInfo{
38114 inputs: []inputInfo{
38115 {0, 4295023614},
38116 {1, 56319},
38117 },
38118 },
38119 },
38120 {
38121 name: "MOVDatomicstore",
38122 auxType: auxSymOff,
38123 argLen: 3,
38124 clobberFlags: true,
38125 faultOnNilArg0: true,
38126 hasSideEffects: true,
38127 symEffect: SymWrite,
38128 asm: s390x.AMOVD,
38129 reg: regInfo{
38130 inputs: []inputInfo{
38131 {0, 4295023614},
38132 {1, 56319},
38133 },
38134 },
38135 },
38136 {
38137 name: "LAA",
38138 auxType: auxSymOff,
38139 argLen: 3,
38140 clobberFlags: true,
38141 faultOnNilArg0: true,
38142 hasSideEffects: true,
38143 symEffect: SymRdWr,
38144 asm: s390x.ALAA,
38145 reg: regInfo{
38146 inputs: []inputInfo{
38147 {0, 4295023614},
38148 {1, 56319},
38149 },
38150 outputs: []outputInfo{
38151 {0, 23551},
38152 },
38153 },
38154 },
38155 {
38156 name: "LAAG",
38157 auxType: auxSymOff,
38158 argLen: 3,
38159 clobberFlags: true,
38160 faultOnNilArg0: true,
38161 hasSideEffects: true,
38162 symEffect: SymRdWr,
38163 asm: s390x.ALAAG,
38164 reg: regInfo{
38165 inputs: []inputInfo{
38166 {0, 4295023614},
38167 {1, 56319},
38168 },
38169 outputs: []outputInfo{
38170 {0, 23551},
38171 },
38172 },
38173 },
38174 {
38175 name: "AddTupleFirst32",
38176 argLen: 2,
38177 reg: regInfo{},
38178 },
38179 {
38180 name: "AddTupleFirst64",
38181 argLen: 2,
38182 reg: regInfo{},
38183 },
38184 {
38185 name: "LAN",
38186 argLen: 3,
38187 clobberFlags: true,
38188 hasSideEffects: true,
38189 asm: s390x.ALAN,
38190 reg: regInfo{
38191 inputs: []inputInfo{
38192 {0, 4295023614},
38193 {1, 56319},
38194 },
38195 },
38196 },
38197 {
38198 name: "LANfloor",
38199 argLen: 3,
38200 clobberFlags: true,
38201 hasSideEffects: true,
38202 asm: s390x.ALAN,
38203 reg: regInfo{
38204 inputs: []inputInfo{
38205 {0, 2},
38206 {1, 56319},
38207 },
38208 clobbers: 2,
38209 },
38210 },
38211 {
38212 name: "LAO",
38213 argLen: 3,
38214 clobberFlags: true,
38215 hasSideEffects: true,
38216 asm: s390x.ALAO,
38217 reg: regInfo{
38218 inputs: []inputInfo{
38219 {0, 4295023614},
38220 {1, 56319},
38221 },
38222 },
38223 },
38224 {
38225 name: "LAOfloor",
38226 argLen: 3,
38227 clobberFlags: true,
38228 hasSideEffects: true,
38229 asm: s390x.ALAO,
38230 reg: regInfo{
38231 inputs: []inputInfo{
38232 {0, 2},
38233 {1, 56319},
38234 },
38235 clobbers: 2,
38236 },
38237 },
38238 {
38239 name: "LoweredAtomicCas32",
38240 auxType: auxSymOff,
38241 argLen: 4,
38242 clobberFlags: true,
38243 faultOnNilArg0: true,
38244 hasSideEffects: true,
38245 symEffect: SymRdWr,
38246 asm: s390x.ACS,
38247 reg: regInfo{
38248 inputs: []inputInfo{
38249 {1, 1},
38250 {0, 56318},
38251 {2, 56319},
38252 },
38253 clobbers: 1,
38254 outputs: []outputInfo{
38255 {1, 0},
38256 {0, 23551},
38257 },
38258 },
38259 },
38260 {
38261 name: "LoweredAtomicCas64",
38262 auxType: auxSymOff,
38263 argLen: 4,
38264 clobberFlags: true,
38265 faultOnNilArg0: true,
38266 hasSideEffects: true,
38267 symEffect: SymRdWr,
38268 asm: s390x.ACSG,
38269 reg: regInfo{
38270 inputs: []inputInfo{
38271 {1, 1},
38272 {0, 56318},
38273 {2, 56319},
38274 },
38275 clobbers: 1,
38276 outputs: []outputInfo{
38277 {1, 0},
38278 {0, 23551},
38279 },
38280 },
38281 },
38282 {
38283 name: "LoweredAtomicExchange32",
38284 auxType: auxSymOff,
38285 argLen: 3,
38286 clobberFlags: true,
38287 faultOnNilArg0: true,
38288 hasSideEffects: true,
38289 symEffect: SymRdWr,
38290 asm: s390x.ACS,
38291 reg: regInfo{
38292 inputs: []inputInfo{
38293 {0, 56318},
38294 {1, 56318},
38295 },
38296 outputs: []outputInfo{
38297 {1, 0},
38298 {0, 1},
38299 },
38300 },
38301 },
38302 {
38303 name: "LoweredAtomicExchange64",
38304 auxType: auxSymOff,
38305 argLen: 3,
38306 clobberFlags: true,
38307 faultOnNilArg0: true,
38308 hasSideEffects: true,
38309 symEffect: SymRdWr,
38310 asm: s390x.ACSG,
38311 reg: regInfo{
38312 inputs: []inputInfo{
38313 {0, 56318},
38314 {1, 56318},
38315 },
38316 outputs: []outputInfo{
38317 {1, 0},
38318 {0, 1},
38319 },
38320 },
38321 },
38322 {
38323 name: "FLOGR",
38324 argLen: 1,
38325 clobberFlags: true,
38326 asm: s390x.AFLOGR,
38327 reg: regInfo{
38328 inputs: []inputInfo{
38329 {0, 23551},
38330 },
38331 clobbers: 2,
38332 outputs: []outputInfo{
38333 {0, 1},
38334 },
38335 },
38336 },
38337 {
38338 name: "POPCNT",
38339 argLen: 1,
38340 clobberFlags: true,
38341 asm: s390x.APOPCNT,
38342 reg: regInfo{
38343 inputs: []inputInfo{
38344 {0, 23551},
38345 },
38346 outputs: []outputInfo{
38347 {0, 23551},
38348 },
38349 },
38350 },
38351 {
38352 name: "MLGR",
38353 argLen: 2,
38354 asm: s390x.AMLGR,
38355 reg: regInfo{
38356 inputs: []inputInfo{
38357 {1, 8},
38358 {0, 23551},
38359 },
38360 outputs: []outputInfo{
38361 {0, 4},
38362 {1, 8},
38363 },
38364 },
38365 },
38366 {
38367 name: "SumBytes2",
38368 argLen: 1,
38369 reg: regInfo{},
38370 },
38371 {
38372 name: "SumBytes4",
38373 argLen: 1,
38374 reg: regInfo{},
38375 },
38376 {
38377 name: "SumBytes8",
38378 argLen: 1,
38379 reg: regInfo{},
38380 },
38381 {
38382 name: "STMG2",
38383 auxType: auxSymOff,
38384 argLen: 4,
38385 clobberFlags: true,
38386 faultOnNilArg0: true,
38387 symEffect: SymWrite,
38388 asm: s390x.ASTMG,
38389 reg: regInfo{
38390 inputs: []inputInfo{
38391 {1, 2},
38392 {2, 4},
38393 {0, 56318},
38394 },
38395 },
38396 },
38397 {
38398 name: "STMG3",
38399 auxType: auxSymOff,
38400 argLen: 5,
38401 clobberFlags: true,
38402 faultOnNilArg0: true,
38403 symEffect: SymWrite,
38404 asm: s390x.ASTMG,
38405 reg: regInfo{
38406 inputs: []inputInfo{
38407 {1, 2},
38408 {2, 4},
38409 {3, 8},
38410 {0, 56318},
38411 },
38412 },
38413 },
38414 {
38415 name: "STMG4",
38416 auxType: auxSymOff,
38417 argLen: 6,
38418 clobberFlags: true,
38419 faultOnNilArg0: true,
38420 symEffect: SymWrite,
38421 asm: s390x.ASTMG,
38422 reg: regInfo{
38423 inputs: []inputInfo{
38424 {1, 2},
38425 {2, 4},
38426 {3, 8},
38427 {4, 16},
38428 {0, 56318},
38429 },
38430 },
38431 },
38432 {
38433 name: "STM2",
38434 auxType: auxSymOff,
38435 argLen: 4,
38436 clobberFlags: true,
38437 faultOnNilArg0: true,
38438 symEffect: SymWrite,
38439 asm: s390x.ASTMY,
38440 reg: regInfo{
38441 inputs: []inputInfo{
38442 {1, 2},
38443 {2, 4},
38444 {0, 56318},
38445 },
38446 },
38447 },
38448 {
38449 name: "STM3",
38450 auxType: auxSymOff,
38451 argLen: 5,
38452 clobberFlags: true,
38453 faultOnNilArg0: true,
38454 symEffect: SymWrite,
38455 asm: s390x.ASTMY,
38456 reg: regInfo{
38457 inputs: []inputInfo{
38458 {1, 2},
38459 {2, 4},
38460 {3, 8},
38461 {0, 56318},
38462 },
38463 },
38464 },
38465 {
38466 name: "STM4",
38467 auxType: auxSymOff,
38468 argLen: 6,
38469 clobberFlags: true,
38470 faultOnNilArg0: true,
38471 symEffect: SymWrite,
38472 asm: s390x.ASTMY,
38473 reg: regInfo{
38474 inputs: []inputInfo{
38475 {1, 2},
38476 {2, 4},
38477 {3, 8},
38478 {4, 16},
38479 {0, 56318},
38480 },
38481 },
38482 },
38483 {
38484 name: "LoweredMove",
38485 auxType: auxInt64,
38486 argLen: 4,
38487 clobberFlags: true,
38488 faultOnNilArg0: true,
38489 faultOnNilArg1: true,
38490 reg: regInfo{
38491 inputs: []inputInfo{
38492 {0, 2},
38493 {1, 4},
38494 {2, 56319},
38495 },
38496 clobbers: 6,
38497 },
38498 },
38499 {
38500 name: "LoweredZero",
38501 auxType: auxInt64,
38502 argLen: 3,
38503 clobberFlags: true,
38504 faultOnNilArg0: true,
38505 reg: regInfo{
38506 inputs: []inputInfo{
38507 {0, 2},
38508 {1, 56319},
38509 },
38510 clobbers: 2,
38511 },
38512 },
38513
38514 {
38515 name: "LoweredStaticCall",
38516 auxType: auxCallOff,
38517 argLen: 1,
38518 call: true,
38519 reg: regInfo{
38520 clobbers: 844424930131967,
38521 },
38522 },
38523 {
38524 name: "LoweredTailCall",
38525 auxType: auxCallOff,
38526 argLen: 1,
38527 call: true,
38528 tailCall: true,
38529 reg: regInfo{
38530 clobbers: 844424930131967,
38531 },
38532 },
38533 {
38534 name: "LoweredClosureCall",
38535 auxType: auxCallOff,
38536 argLen: 3,
38537 call: true,
38538 reg: regInfo{
38539 inputs: []inputInfo{
38540 {0, 65535},
38541 {1, 65535},
38542 },
38543 clobbers: 844424930131967,
38544 },
38545 },
38546 {
38547 name: "LoweredInterCall",
38548 auxType: auxCallOff,
38549 argLen: 2,
38550 call: true,
38551 reg: regInfo{
38552 inputs: []inputInfo{
38553 {0, 65535},
38554 },
38555 clobbers: 844424930131967,
38556 },
38557 },
38558 {
38559 name: "LoweredAddr",
38560 auxType: auxSymOff,
38561 argLen: 1,
38562 rematerializeable: true,
38563 symEffect: SymAddr,
38564 reg: regInfo{
38565 inputs: []inputInfo{
38566 {0, 281474976776191},
38567 },
38568 outputs: []outputInfo{
38569 {0, 65535},
38570 },
38571 },
38572 },
38573 {
38574 name: "LoweredMove",
38575 auxType: auxInt64,
38576 argLen: 3,
38577 reg: regInfo{
38578 inputs: []inputInfo{
38579 {0, 65535},
38580 {1, 65535},
38581 },
38582 },
38583 },
38584 {
38585 name: "LoweredZero",
38586 auxType: auxInt64,
38587 argLen: 2,
38588 reg: regInfo{
38589 inputs: []inputInfo{
38590 {0, 65535},
38591 },
38592 },
38593 },
38594 {
38595 name: "LoweredGetClosurePtr",
38596 argLen: 0,
38597 reg: regInfo{
38598 outputs: []outputInfo{
38599 {0, 65535},
38600 },
38601 },
38602 },
38603 {
38604 name: "LoweredGetCallerPC",
38605 argLen: 0,
38606 rematerializeable: true,
38607 reg: regInfo{
38608 outputs: []outputInfo{
38609 {0, 65535},
38610 },
38611 },
38612 },
38613 {
38614 name: "LoweredGetCallerSP",
38615 argLen: 1,
38616 rematerializeable: true,
38617 reg: regInfo{
38618 outputs: []outputInfo{
38619 {0, 65535},
38620 },
38621 },
38622 },
38623 {
38624 name: "LoweredNilCheck",
38625 argLen: 2,
38626 nilCheck: true,
38627 faultOnNilArg0: true,
38628 reg: regInfo{
38629 inputs: []inputInfo{
38630 {0, 65535},
38631 },
38632 },
38633 },
38634 {
38635 name: "LoweredWB",
38636 auxType: auxInt64,
38637 argLen: 1,
38638 reg: regInfo{
38639 clobbers: 844424930131967,
38640 outputs: []outputInfo{
38641 {0, 65535},
38642 },
38643 },
38644 },
38645 {
38646 name: "LoweredConvert",
38647 argLen: 2,
38648 reg: regInfo{
38649 inputs: []inputInfo{
38650 {0, 65535},
38651 },
38652 outputs: []outputInfo{
38653 {0, 65535},
38654 },
38655 },
38656 },
38657 {
38658 name: "Select",
38659 argLen: 3,
38660 asm: wasm.ASelect,
38661 reg: regInfo{
38662 inputs: []inputInfo{
38663 {0, 281474976776191},
38664 {1, 281474976776191},
38665 {2, 281474976776191},
38666 },
38667 outputs: []outputInfo{
38668 {0, 65535},
38669 },
38670 },
38671 },
38672 {
38673 name: "I64Load8U",
38674 auxType: auxInt64,
38675 argLen: 2,
38676 asm: wasm.AI64Load8U,
38677 reg: regInfo{
38678 inputs: []inputInfo{
38679 {0, 1407374883618815},
38680 },
38681 outputs: []outputInfo{
38682 {0, 65535},
38683 },
38684 },
38685 },
38686 {
38687 name: "I64Load8S",
38688 auxType: auxInt64,
38689 argLen: 2,
38690 asm: wasm.AI64Load8S,
38691 reg: regInfo{
38692 inputs: []inputInfo{
38693 {0, 1407374883618815},
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39588 reg: regInfo{
39589 inputs: []inputInfo{
39590 {0, 4294901760},
39591 },
39592 outputs: []outputInfo{
39593 {0, 65535},
39594 },
39595 },
39596 },
39597 {
39598 name: "I64TruncSatF32U",
39599 argLen: 1,
39600 asm: wasm.AI64TruncSatF32U,
39601 reg: regInfo{
39602 inputs: []inputInfo{
39603 {0, 4294901760},
39604 },
39605 outputs: []outputInfo{
39606 {0, 65535},
39607 },
39608 },
39609 },
39610 {
39611 name: "F32ConvertI64S",
39612 argLen: 1,
39613 asm: wasm.AF32ConvertI64S,
39614 reg: regInfo{
39615 inputs: []inputInfo{
39616 {0, 65535},
39617 },
39618 outputs: []outputInfo{
39619 {0, 4294901760},
39620 },
39621 },
39622 },
39623 {
39624 name: "F32ConvertI64U",
39625 argLen: 1,
39626 asm: wasm.AF32ConvertI64U,
39627 reg: regInfo{
39628 inputs: []inputInfo{
39629 {0, 65535},
39630 },
39631 outputs: []outputInfo{
39632 {0, 4294901760},
39633 },
39634 },
39635 },
39636 {
39637 name: "F64ConvertI64S",
39638 argLen: 1,
39639 asm: wasm.AF64ConvertI64S,
39640 reg: regInfo{
39641 inputs: []inputInfo{
39642 {0, 65535},
39643 },
39644 outputs: []outputInfo{
39645 {0, 281470681743360},
39646 },
39647 },
39648 },
39649 {
39650 name: "F64ConvertI64U",
39651 argLen: 1,
39652 asm: wasm.AF64ConvertI64U,
39653 reg: regInfo{
39654 inputs: []inputInfo{
39655 {0, 65535},
39656 },
39657 outputs: []outputInfo{
39658 {0, 281470681743360},
39659 },
39660 },
39661 },
39662 {
39663 name: "F32DemoteF64",
39664 argLen: 1,
39665 asm: wasm.AF32DemoteF64,
39666 reg: regInfo{
39667 inputs: []inputInfo{
39668 {0, 281470681743360},
39669 },
39670 outputs: []outputInfo{
39671 {0, 4294901760},
39672 },
39673 },
39674 },
39675 {
39676 name: "F64PromoteF32",
39677 argLen: 1,
39678 asm: wasm.AF64PromoteF32,
39679 reg: regInfo{
39680 inputs: []inputInfo{
39681 {0, 4294901760},
39682 },
39683 outputs: []outputInfo{
39684 {0, 281470681743360},
39685 },
39686 },
39687 },
39688 {
39689 name: "I64Extend8S",
39690 argLen: 1,
39691 asm: wasm.AI64Extend8S,
39692 reg: regInfo{
39693 inputs: []inputInfo{
39694 {0, 281474976776191},
39695 },
39696 outputs: []outputInfo{
39697 {0, 65535},
39698 },
39699 },
39700 },
39701 {
39702 name: "I64Extend16S",
39703 argLen: 1,
39704 asm: wasm.AI64Extend16S,
39705 reg: regInfo{
39706 inputs: []inputInfo{
39707 {0, 281474976776191},
39708 },
39709 outputs: []outputInfo{
39710 {0, 65535},
39711 },
39712 },
39713 },
39714 {
39715 name: "I64Extend32S",
39716 argLen: 1,
39717 asm: wasm.AI64Extend32S,
39718 reg: regInfo{
39719 inputs: []inputInfo{
39720 {0, 281474976776191},
39721 },
39722 outputs: []outputInfo{
39723 {0, 65535},
39724 },
39725 },
39726 },
39727 {
39728 name: "F32Sqrt",
39729 argLen: 1,
39730 asm: wasm.AF32Sqrt,
39731 reg: regInfo{
39732 inputs: []inputInfo{
39733 {0, 4294901760},
39734 },
39735 outputs: []outputInfo{
39736 {0, 4294901760},
39737 },
39738 },
39739 },
39740 {
39741 name: "F32Trunc",
39742 argLen: 1,
39743 asm: wasm.AF32Trunc,
39744 reg: regInfo{
39745 inputs: []inputInfo{
39746 {0, 4294901760},
39747 },
39748 outputs: []outputInfo{
39749 {0, 4294901760},
39750 },
39751 },
39752 },
39753 {
39754 name: "F32Ceil",
39755 argLen: 1,
39756 asm: wasm.AF32Ceil,
39757 reg: regInfo{
39758 inputs: []inputInfo{
39759 {0, 4294901760},
39760 },
39761 outputs: []outputInfo{
39762 {0, 4294901760},
39763 },
39764 },
39765 },
39766 {
39767 name: "F32Floor",
39768 argLen: 1,
39769 asm: wasm.AF32Floor,
39770 reg: regInfo{
39771 inputs: []inputInfo{
39772 {0, 4294901760},
39773 },
39774 outputs: []outputInfo{
39775 {0, 4294901760},
39776 },
39777 },
39778 },
39779 {
39780 name: "F32Nearest",
39781 argLen: 1,
39782 asm: wasm.AF32Nearest,
39783 reg: regInfo{
39784 inputs: []inputInfo{
39785 {0, 4294901760},
39786 },
39787 outputs: []outputInfo{
39788 {0, 4294901760},
39789 },
39790 },
39791 },
39792 {
39793 name: "F32Abs",
39794 argLen: 1,
39795 asm: wasm.AF32Abs,
39796 reg: regInfo{
39797 inputs: []inputInfo{
39798 {0, 4294901760},
39799 },
39800 outputs: []outputInfo{
39801 {0, 4294901760},
39802 },
39803 },
39804 },
39805 {
39806 name: "F32Copysign",
39807 argLen: 2,
39808 asm: wasm.AF32Copysign,
39809 reg: regInfo{
39810 inputs: []inputInfo{
39811 {0, 4294901760},
39812 {1, 4294901760},
39813 },
39814 outputs: []outputInfo{
39815 {0, 4294901760},
39816 },
39817 },
39818 },
39819 {
39820 name: "F64Sqrt",
39821 argLen: 1,
39822 asm: wasm.AF64Sqrt,
39823 reg: regInfo{
39824 inputs: []inputInfo{
39825 {0, 281470681743360},
39826 },
39827 outputs: []outputInfo{
39828 {0, 281470681743360},
39829 },
39830 },
39831 },
39832 {
39833 name: "F64Trunc",
39834 argLen: 1,
39835 asm: wasm.AF64Trunc,
39836 reg: regInfo{
39837 inputs: []inputInfo{
39838 {0, 281470681743360},
39839 },
39840 outputs: []outputInfo{
39841 {0, 281470681743360},
39842 },
39843 },
39844 },
39845 {
39846 name: "F64Ceil",
39847 argLen: 1,
39848 asm: wasm.AF64Ceil,
39849 reg: regInfo{
39850 inputs: []inputInfo{
39851 {0, 281470681743360},
39852 },
39853 outputs: []outputInfo{
39854 {0, 281470681743360},
39855 },
39856 },
39857 },
39858 {
39859 name: "F64Floor",
39860 argLen: 1,
39861 asm: wasm.AF64Floor,
39862 reg: regInfo{
39863 inputs: []inputInfo{
39864 {0, 281470681743360},
39865 },
39866 outputs: []outputInfo{
39867 {0, 281470681743360},
39868 },
39869 },
39870 },
39871 {
39872 name: "F64Nearest",
39873 argLen: 1,
39874 asm: wasm.AF64Nearest,
39875 reg: regInfo{
39876 inputs: []inputInfo{
39877 {0, 281470681743360},
39878 },
39879 outputs: []outputInfo{
39880 {0, 281470681743360},
39881 },
39882 },
39883 },
39884 {
39885 name: "F64Abs",
39886 argLen: 1,
39887 asm: wasm.AF64Abs,
39888 reg: regInfo{
39889 inputs: []inputInfo{
39890 {0, 281470681743360},
39891 },
39892 outputs: []outputInfo{
39893 {0, 281470681743360},
39894 },
39895 },
39896 },
39897 {
39898 name: "F64Copysign",
39899 argLen: 2,
39900 asm: wasm.AF64Copysign,
39901 reg: regInfo{
39902 inputs: []inputInfo{
39903 {0, 281470681743360},
39904 {1, 281470681743360},
39905 },
39906 outputs: []outputInfo{
39907 {0, 281470681743360},
39908 },
39909 },
39910 },
39911 {
39912 name: "I64Ctz",
39913 argLen: 1,
39914 asm: wasm.AI64Ctz,
39915 reg: regInfo{
39916 inputs: []inputInfo{
39917 {0, 281474976776191},
39918 },
39919 outputs: []outputInfo{
39920 {0, 65535},
39921 },
39922 },
39923 },
39924 {
39925 name: "I64Clz",
39926 argLen: 1,
39927 asm: wasm.AI64Clz,
39928 reg: regInfo{
39929 inputs: []inputInfo{
39930 {0, 281474976776191},
39931 },
39932 outputs: []outputInfo{
39933 {0, 65535},
39934 },
39935 },
39936 },
39937 {
39938 name: "I32Rotl",
39939 argLen: 2,
39940 asm: wasm.AI32Rotl,
39941 reg: regInfo{
39942 inputs: []inputInfo{
39943 {0, 281474976776191},
39944 {1, 281474976776191},
39945 },
39946 outputs: []outputInfo{
39947 {0, 65535},
39948 },
39949 },
39950 },
39951 {
39952 name: "I64Rotl",
39953 argLen: 2,
39954 asm: wasm.AI64Rotl,
39955 reg: regInfo{
39956 inputs: []inputInfo{
39957 {0, 281474976776191},
39958 {1, 281474976776191},
39959 },
39960 outputs: []outputInfo{
39961 {0, 65535},
39962 },
39963 },
39964 },
39965 {
39966 name: "I64Popcnt",
39967 argLen: 1,
39968 asm: wasm.AI64Popcnt,
39969 reg: regInfo{
39970 inputs: []inputInfo{
39971 {0, 281474976776191},
39972 },
39973 outputs: []outputInfo{
39974 {0, 65535},
39975 },
39976 },
39977 },
39978
39979 {
39980 name: "Add8",
39981 argLen: 2,
39982 commutative: true,
39983 generic: true,
39984 },
39985 {
39986 name: "Add16",
39987 argLen: 2,
39988 commutative: true,
39989 generic: true,
39990 },
39991 {
39992 name: "Add32",
39993 argLen: 2,
39994 commutative: true,
39995 generic: true,
39996 },
39997 {
39998 name: "Add64",
39999 argLen: 2,
40000 commutative: true,
40001 generic: true,
40002 },
40003 {
40004 name: "AddPtr",
40005 argLen: 2,
40006 generic: true,
40007 },
40008 {
40009 name: "Add32F",
40010 argLen: 2,
40011 commutative: true,
40012 generic: true,
40013 },
40014 {
40015 name: "Add64F",
40016 argLen: 2,
40017 commutative: true,
40018 generic: true,
40019 },
40020 {
40021 name: "Sub8",
40022 argLen: 2,
40023 generic: true,
40024 },
40025 {
40026 name: "Sub16",
40027 argLen: 2,
40028 generic: true,
40029 },
40030 {
40031 name: "Sub32",
40032 argLen: 2,
40033 generic: true,
40034 },
40035 {
40036 name: "Sub64",
40037 argLen: 2,
40038 generic: true,
40039 },
40040 {
40041 name: "SubPtr",
40042 argLen: 2,
40043 generic: true,
40044 },
40045 {
40046 name: "Sub32F",
40047 argLen: 2,
40048 generic: true,
40049 },
40050 {
40051 name: "Sub64F",
40052 argLen: 2,
40053 generic: true,
40054 },
40055 {
40056 name: "Mul8",
40057 argLen: 2,
40058 commutative: true,
40059 generic: true,
40060 },
40061 {
40062 name: "Mul16",
40063 argLen: 2,
40064 commutative: true,
40065 generic: true,
40066 },
40067 {
40068 name: "Mul32",
40069 argLen: 2,
40070 commutative: true,
40071 generic: true,
40072 },
40073 {
40074 name: "Mul64",
40075 argLen: 2,
40076 commutative: true,
40077 generic: true,
40078 },
40079 {
40080 name: "Mul32F",
40081 argLen: 2,
40082 commutative: true,
40083 generic: true,
40084 },
40085 {
40086 name: "Mul64F",
40087 argLen: 2,
40088 commutative: true,
40089 generic: true,
40090 },
40091 {
40092 name: "Div32F",
40093 argLen: 2,
40094 generic: true,
40095 },
40096 {
40097 name: "Div64F",
40098 argLen: 2,
40099 generic: true,
40100 },
40101 {
40102 name: "Hmul32",
40103 argLen: 2,
40104 commutative: true,
40105 generic: true,
40106 },
40107 {
40108 name: "Hmul32u",
40109 argLen: 2,
40110 commutative: true,
40111 generic: true,
40112 },
40113 {
40114 name: "Hmul64",
40115 argLen: 2,
40116 commutative: true,
40117 generic: true,
40118 },
40119 {
40120 name: "Hmul64u",
40121 argLen: 2,
40122 commutative: true,
40123 generic: true,
40124 },
40125 {
40126 name: "Mul32uhilo",
40127 argLen: 2,
40128 commutative: true,
40129 generic: true,
40130 },
40131 {
40132 name: "Mul64uhilo",
40133 argLen: 2,
40134 commutative: true,
40135 generic: true,
40136 },
40137 {
40138 name: "Mul32uover",
40139 argLen: 2,
40140 commutative: true,
40141 generic: true,
40142 },
40143 {
40144 name: "Mul64uover",
40145 argLen: 2,
40146 commutative: true,
40147 generic: true,
40148 },
40149 {
40150 name: "Avg32u",
40151 argLen: 2,
40152 generic: true,
40153 },
40154 {
40155 name: "Avg64u",
40156 argLen: 2,
40157 generic: true,
40158 },
40159 {
40160 name: "Div8",
40161 argLen: 2,
40162 generic: true,
40163 },
40164 {
40165 name: "Div8u",
40166 argLen: 2,
40167 generic: true,
40168 },
40169 {
40170 name: "Div16",
40171 auxType: auxBool,
40172 argLen: 2,
40173 generic: true,
40174 },
40175 {
40176 name: "Div16u",
40177 argLen: 2,
40178 generic: true,
40179 },
40180 {
40181 name: "Div32",
40182 auxType: auxBool,
40183 argLen: 2,
40184 generic: true,
40185 },
40186 {
40187 name: "Div32u",
40188 argLen: 2,
40189 generic: true,
40190 },
40191 {
40192 name: "Div64",
40193 auxType: auxBool,
40194 argLen: 2,
40195 generic: true,
40196 },
40197 {
40198 name: "Div64u",
40199 argLen: 2,
40200 generic: true,
40201 },
40202 {
40203 name: "Div128u",
40204 argLen: 3,
40205 generic: true,
40206 },
40207 {
40208 name: "Mod8",
40209 argLen: 2,
40210 generic: true,
40211 },
40212 {
40213 name: "Mod8u",
40214 argLen: 2,
40215 generic: true,
40216 },
40217 {
40218 name: "Mod16",
40219 auxType: auxBool,
40220 argLen: 2,
40221 generic: true,
40222 },
40223 {
40224 name: "Mod16u",
40225 argLen: 2,
40226 generic: true,
40227 },
40228 {
40229 name: "Mod32",
40230 auxType: auxBool,
40231 argLen: 2,
40232 generic: true,
40233 },
40234 {
40235 name: "Mod32u",
40236 argLen: 2,
40237 generic: true,
40238 },
40239 {
40240 name: "Mod64",
40241 auxType: auxBool,
40242 argLen: 2,
40243 generic: true,
40244 },
40245 {
40246 name: "Mod64u",
40247 argLen: 2,
40248 generic: true,
40249 },
40250 {
40251 name: "And8",
40252 argLen: 2,
40253 commutative: true,
40254 generic: true,
40255 },
40256 {
40257 name: "And16",
40258 argLen: 2,
40259 commutative: true,
40260 generic: true,
40261 },
40262 {
40263 name: "And32",
40264 argLen: 2,
40265 commutative: true,
40266 generic: true,
40267 },
40268 {
40269 name: "And64",
40270 argLen: 2,
40271 commutative: true,
40272 generic: true,
40273 },
40274 {
40275 name: "Or8",
40276 argLen: 2,
40277 commutative: true,
40278 generic: true,
40279 },
40280 {
40281 name: "Or16",
40282 argLen: 2,
40283 commutative: true,
40284 generic: true,
40285 },
40286 {
40287 name: "Or32",
40288 argLen: 2,
40289 commutative: true,
40290 generic: true,
40291 },
40292 {
40293 name: "Or64",
40294 argLen: 2,
40295 commutative: true,
40296 generic: true,
40297 },
40298 {
40299 name: "Xor8",
40300 argLen: 2,
40301 commutative: true,
40302 generic: true,
40303 },
40304 {
40305 name: "Xor16",
40306 argLen: 2,
40307 commutative: true,
40308 generic: true,
40309 },
40310 {
40311 name: "Xor32",
40312 argLen: 2,
40313 commutative: true,
40314 generic: true,
40315 },
40316 {
40317 name: "Xor64",
40318 argLen: 2,
40319 commutative: true,
40320 generic: true,
40321 },
40322 {
40323 name: "Lsh8x8",
40324 auxType: auxBool,
40325 argLen: 2,
40326 generic: true,
40327 },
40328 {
40329 name: "Lsh8x16",
40330 auxType: auxBool,
40331 argLen: 2,
40332 generic: true,
40333 },
40334 {
40335 name: "Lsh8x32",
40336 auxType: auxBool,
40337 argLen: 2,
40338 generic: true,
40339 },
40340 {
40341 name: "Lsh8x64",
40342 auxType: auxBool,
40343 argLen: 2,
40344 generic: true,
40345 },
40346 {
40347 name: "Lsh16x8",
40348 auxType: auxBool,
40349 argLen: 2,
40350 generic: true,
40351 },
40352 {
40353 name: "Lsh16x16",
40354 auxType: auxBool,
40355 argLen: 2,
40356 generic: true,
40357 },
40358 {
40359 name: "Lsh16x32",
40360 auxType: auxBool,
40361 argLen: 2,
40362 generic: true,
40363 },
40364 {
40365 name: "Lsh16x64",
40366 auxType: auxBool,
40367 argLen: 2,
40368 generic: true,
40369 },
40370 {
40371 name: "Lsh32x8",
40372 auxType: auxBool,
40373 argLen: 2,
40374 generic: true,
40375 },
40376 {
40377 name: "Lsh32x16",
40378 auxType: auxBool,
40379 argLen: 2,
40380 generic: true,
40381 },
40382 {
40383 name: "Lsh32x32",
40384 auxType: auxBool,
40385 argLen: 2,
40386 generic: true,
40387 },
40388 {
40389 name: "Lsh32x64",
40390 auxType: auxBool,
40391 argLen: 2,
40392 generic: true,
40393 },
40394 {
40395 name: "Lsh64x8",
40396 auxType: auxBool,
40397 argLen: 2,
40398 generic: true,
40399 },
40400 {
40401 name: "Lsh64x16",
40402 auxType: auxBool,
40403 argLen: 2,
40404 generic: true,
40405 },
40406 {
40407 name: "Lsh64x32",
40408 auxType: auxBool,
40409 argLen: 2,
40410 generic: true,
40411 },
40412 {
40413 name: "Lsh64x64",
40414 auxType: auxBool,
40415 argLen: 2,
40416 generic: true,
40417 },
40418 {
40419 name: "Rsh8x8",
40420 auxType: auxBool,
40421 argLen: 2,
40422 generic: true,
40423 },
40424 {
40425 name: "Rsh8x16",
40426 auxType: auxBool,
40427 argLen: 2,
40428 generic: true,
40429 },
40430 {
40431 name: "Rsh8x32",
40432 auxType: auxBool,
40433 argLen: 2,
40434 generic: true,
40435 },
40436 {
40437 name: "Rsh8x64",
40438 auxType: auxBool,
40439 argLen: 2,
40440 generic: true,
40441 },
40442 {
40443 name: "Rsh16x8",
40444 auxType: auxBool,
40445 argLen: 2,
40446 generic: true,
40447 },
40448 {
40449 name: "Rsh16x16",
40450 auxType: auxBool,
40451 argLen: 2,
40452 generic: true,
40453 },
40454 {
40455 name: "Rsh16x32",
40456 auxType: auxBool,
40457 argLen: 2,
40458 generic: true,
40459 },
40460 {
40461 name: "Rsh16x64",
40462 auxType: auxBool,
40463 argLen: 2,
40464 generic: true,
40465 },
40466 {
40467 name: "Rsh32x8",
40468 auxType: auxBool,
40469 argLen: 2,
40470 generic: true,
40471 },
40472 {
40473 name: "Rsh32x16",
40474 auxType: auxBool,
40475 argLen: 2,
40476 generic: true,
40477 },
40478 {
40479 name: "Rsh32x32",
40480 auxType: auxBool,
40481 argLen: 2,
40482 generic: true,
40483 },
40484 {
40485 name: "Rsh32x64",
40486 auxType: auxBool,
40487 argLen: 2,
40488 generic: true,
40489 },
40490 {
40491 name: "Rsh64x8",
40492 auxType: auxBool,
40493 argLen: 2,
40494 generic: true,
40495 },
40496 {
40497 name: "Rsh64x16",
40498 auxType: auxBool,
40499 argLen: 2,
40500 generic: true,
40501 },
40502 {
40503 name: "Rsh64x32",
40504 auxType: auxBool,
40505 argLen: 2,
40506 generic: true,
40507 },
40508 {
40509 name: "Rsh64x64",
40510 auxType: auxBool,
40511 argLen: 2,
40512 generic: true,
40513 },
40514 {
40515 name: "Rsh8Ux8",
40516 auxType: auxBool,
40517 argLen: 2,
40518 generic: true,
40519 },
40520 {
40521 name: "Rsh8Ux16",
40522 auxType: auxBool,
40523 argLen: 2,
40524 generic: true,
40525 },
40526 {
40527 name: "Rsh8Ux32",
40528 auxType: auxBool,
40529 argLen: 2,
40530 generic: true,
40531 },
40532 {
40533 name: "Rsh8Ux64",
40534 auxType: auxBool,
40535 argLen: 2,
40536 generic: true,
40537 },
40538 {
40539 name: "Rsh16Ux8",
40540 auxType: auxBool,
40541 argLen: 2,
40542 generic: true,
40543 },
40544 {
40545 name: "Rsh16Ux16",
40546 auxType: auxBool,
40547 argLen: 2,
40548 generic: true,
40549 },
40550 {
40551 name: "Rsh16Ux32",
40552 auxType: auxBool,
40553 argLen: 2,
40554 generic: true,
40555 },
40556 {
40557 name: "Rsh16Ux64",
40558 auxType: auxBool,
40559 argLen: 2,
40560 generic: true,
40561 },
40562 {
40563 name: "Rsh32Ux8",
40564 auxType: auxBool,
40565 argLen: 2,
40566 generic: true,
40567 },
40568 {
40569 name: "Rsh32Ux16",
40570 auxType: auxBool,
40571 argLen: 2,
40572 generic: true,
40573 },
40574 {
40575 name: "Rsh32Ux32",
40576 auxType: auxBool,
40577 argLen: 2,
40578 generic: true,
40579 },
40580 {
40581 name: "Rsh32Ux64",
40582 auxType: auxBool,
40583 argLen: 2,
40584 generic: true,
40585 },
40586 {
40587 name: "Rsh64Ux8",
40588 auxType: auxBool,
40589 argLen: 2,
40590 generic: true,
40591 },
40592 {
40593 name: "Rsh64Ux16",
40594 auxType: auxBool,
40595 argLen: 2,
40596 generic: true,
40597 },
40598 {
40599 name: "Rsh64Ux32",
40600 auxType: auxBool,
40601 argLen: 2,
40602 generic: true,
40603 },
40604 {
40605 name: "Rsh64Ux64",
40606 auxType: auxBool,
40607 argLen: 2,
40608 generic: true,
40609 },
40610 {
40611 name: "Eq8",
40612 argLen: 2,
40613 commutative: true,
40614 generic: true,
40615 },
40616 {
40617 name: "Eq16",
40618 argLen: 2,
40619 commutative: true,
40620 generic: true,
40621 },
40622 {
40623 name: "Eq32",
40624 argLen: 2,
40625 commutative: true,
40626 generic: true,
40627 },
40628 {
40629 name: "Eq64",
40630 argLen: 2,
40631 commutative: true,
40632 generic: true,
40633 },
40634 {
40635 name: "EqPtr",
40636 argLen: 2,
40637 commutative: true,
40638 generic: true,
40639 },
40640 {
40641 name: "EqInter",
40642 argLen: 2,
40643 generic: true,
40644 },
40645 {
40646 name: "EqSlice",
40647 argLen: 2,
40648 generic: true,
40649 },
40650 {
40651 name: "Eq32F",
40652 argLen: 2,
40653 commutative: true,
40654 generic: true,
40655 },
40656 {
40657 name: "Eq64F",
40658 argLen: 2,
40659 commutative: true,
40660 generic: true,
40661 },
40662 {
40663 name: "Neq8",
40664 argLen: 2,
40665 commutative: true,
40666 generic: true,
40667 },
40668 {
40669 name: "Neq16",
40670 argLen: 2,
40671 commutative: true,
40672 generic: true,
40673 },
40674 {
40675 name: "Neq32",
40676 argLen: 2,
40677 commutative: true,
40678 generic: true,
40679 },
40680 {
40681 name: "Neq64",
40682 argLen: 2,
40683 commutative: true,
40684 generic: true,
40685 },
40686 {
40687 name: "NeqPtr",
40688 argLen: 2,
40689 commutative: true,
40690 generic: true,
40691 },
40692 {
40693 name: "NeqInter",
40694 argLen: 2,
40695 generic: true,
40696 },
40697 {
40698 name: "NeqSlice",
40699 argLen: 2,
40700 generic: true,
40701 },
40702 {
40703 name: "Neq32F",
40704 argLen: 2,
40705 commutative: true,
40706 generic: true,
40707 },
40708 {
40709 name: "Neq64F",
40710 argLen: 2,
40711 commutative: true,
40712 generic: true,
40713 },
40714 {
40715 name: "Less8",
40716 argLen: 2,
40717 generic: true,
40718 },
40719 {
40720 name: "Less8U",
40721 argLen: 2,
40722 generic: true,
40723 },
40724 {
40725 name: "Less16",
40726 argLen: 2,
40727 generic: true,
40728 },
40729 {
40730 name: "Less16U",
40731 argLen: 2,
40732 generic: true,
40733 },
40734 {
40735 name: "Less32",
40736 argLen: 2,
40737 generic: true,
40738 },
40739 {
40740 name: "Less32U",
40741 argLen: 2,
40742 generic: true,
40743 },
40744 {
40745 name: "Less64",
40746 argLen: 2,
40747 generic: true,
40748 },
40749 {
40750 name: "Less64U",
40751 argLen: 2,
40752 generic: true,
40753 },
40754 {
40755 name: "Less32F",
40756 argLen: 2,
40757 generic: true,
40758 },
40759 {
40760 name: "Less64F",
40761 argLen: 2,
40762 generic: true,
40763 },
40764 {
40765 name: "Leq8",
40766 argLen: 2,
40767 generic: true,
40768 },
40769 {
40770 name: "Leq8U",
40771 argLen: 2,
40772 generic: true,
40773 },
40774 {
40775 name: "Leq16",
40776 argLen: 2,
40777 generic: true,
40778 },
40779 {
40780 name: "Leq16U",
40781 argLen: 2,
40782 generic: true,
40783 },
40784 {
40785 name: "Leq32",
40786 argLen: 2,
40787 generic: true,
40788 },
40789 {
40790 name: "Leq32U",
40791 argLen: 2,
40792 generic: true,
40793 },
40794 {
40795 name: "Leq64",
40796 argLen: 2,
40797 generic: true,
40798 },
40799 {
40800 name: "Leq64U",
40801 argLen: 2,
40802 generic: true,
40803 },
40804 {
40805 name: "Leq32F",
40806 argLen: 2,
40807 generic: true,
40808 },
40809 {
40810 name: "Leq64F",
40811 argLen: 2,
40812 generic: true,
40813 },
40814 {
40815 name: "CondSelect",
40816 argLen: 3,
40817 generic: true,
40818 },
40819 {
40820 name: "AndB",
40821 argLen: 2,
40822 commutative: true,
40823 generic: true,
40824 },
40825 {
40826 name: "OrB",
40827 argLen: 2,
40828 commutative: true,
40829 generic: true,
40830 },
40831 {
40832 name: "EqB",
40833 argLen: 2,
40834 commutative: true,
40835 generic: true,
40836 },
40837 {
40838 name: "NeqB",
40839 argLen: 2,
40840 commutative: true,
40841 generic: true,
40842 },
40843 {
40844 name: "Not",
40845 argLen: 1,
40846 generic: true,
40847 },
40848 {
40849 name: "Neg8",
40850 argLen: 1,
40851 generic: true,
40852 },
40853 {
40854 name: "Neg16",
40855 argLen: 1,
40856 generic: true,
40857 },
40858 {
40859 name: "Neg32",
40860 argLen: 1,
40861 generic: true,
40862 },
40863 {
40864 name: "Neg64",
40865 argLen: 1,
40866 generic: true,
40867 },
40868 {
40869 name: "Neg32F",
40870 argLen: 1,
40871 generic: true,
40872 },
40873 {
40874 name: "Neg64F",
40875 argLen: 1,
40876 generic: true,
40877 },
40878 {
40879 name: "Com8",
40880 argLen: 1,
40881 generic: true,
40882 },
40883 {
40884 name: "Com16",
40885 argLen: 1,
40886 generic: true,
40887 },
40888 {
40889 name: "Com32",
40890 argLen: 1,
40891 generic: true,
40892 },
40893 {
40894 name: "Com64",
40895 argLen: 1,
40896 generic: true,
40897 },
40898 {
40899 name: "Ctz8",
40900 argLen: 1,
40901 generic: true,
40902 },
40903 {
40904 name: "Ctz16",
40905 argLen: 1,
40906 generic: true,
40907 },
40908 {
40909 name: "Ctz32",
40910 argLen: 1,
40911 generic: true,
40912 },
40913 {
40914 name: "Ctz64",
40915 argLen: 1,
40916 generic: true,
40917 },
40918 {
40919 name: "Ctz64On32",
40920 argLen: 2,
40921 generic: true,
40922 },
40923 {
40924 name: "Ctz8NonZero",
40925 argLen: 1,
40926 generic: true,
40927 },
40928 {
40929 name: "Ctz16NonZero",
40930 argLen: 1,
40931 generic: true,
40932 },
40933 {
40934 name: "Ctz32NonZero",
40935 argLen: 1,
40936 generic: true,
40937 },
40938 {
40939 name: "Ctz64NonZero",
40940 argLen: 1,
40941 generic: true,
40942 },
40943 {
40944 name: "BitLen8",
40945 argLen: 1,
40946 generic: true,
40947 },
40948 {
40949 name: "BitLen16",
40950 argLen: 1,
40951 generic: true,
40952 },
40953 {
40954 name: "BitLen32",
40955 argLen: 1,
40956 generic: true,
40957 },
40958 {
40959 name: "BitLen64",
40960 argLen: 1,
40961 generic: true,
40962 },
40963 {
40964 name: "Bswap16",
40965 argLen: 1,
40966 generic: true,
40967 },
40968 {
40969 name: "Bswap32",
40970 argLen: 1,
40971 generic: true,
40972 },
40973 {
40974 name: "Bswap64",
40975 argLen: 1,
40976 generic: true,
40977 },
40978 {
40979 name: "BitRev8",
40980 argLen: 1,
40981 generic: true,
40982 },
40983 {
40984 name: "BitRev16",
40985 argLen: 1,
40986 generic: true,
40987 },
40988 {
40989 name: "BitRev32",
40990 argLen: 1,
40991 generic: true,
40992 },
40993 {
40994 name: "BitRev64",
40995 argLen: 1,
40996 generic: true,
40997 },
40998 {
40999 name: "PopCount8",
41000 argLen: 1,
41001 generic: true,
41002 },
41003 {
41004 name: "PopCount16",
41005 argLen: 1,
41006 generic: true,
41007 },
41008 {
41009 name: "PopCount32",
41010 argLen: 1,
41011 generic: true,
41012 },
41013 {
41014 name: "PopCount64",
41015 argLen: 1,
41016 generic: true,
41017 },
41018 {
41019 name: "RotateLeft64",
41020 argLen: 2,
41021 generic: true,
41022 },
41023 {
41024 name: "RotateLeft32",
41025 argLen: 2,
41026 generic: true,
41027 },
41028 {
41029 name: "RotateLeft16",
41030 argLen: 2,
41031 generic: true,
41032 },
41033 {
41034 name: "RotateLeft8",
41035 argLen: 2,
41036 generic: true,
41037 },
41038 {
41039 name: "Sqrt",
41040 argLen: 1,
41041 generic: true,
41042 },
41043 {
41044 name: "Sqrt32",
41045 argLen: 1,
41046 generic: true,
41047 },
41048 {
41049 name: "Floor",
41050 argLen: 1,
41051 generic: true,
41052 },
41053 {
41054 name: "Ceil",
41055 argLen: 1,
41056 generic: true,
41057 },
41058 {
41059 name: "Trunc",
41060 argLen: 1,
41061 generic: true,
41062 },
41063 {
41064 name: "Round",
41065 argLen: 1,
41066 generic: true,
41067 },
41068 {
41069 name: "RoundToEven",
41070 argLen: 1,
41071 generic: true,
41072 },
41073 {
41074 name: "Abs",
41075 argLen: 1,
41076 generic: true,
41077 },
41078 {
41079 name: "Copysign",
41080 argLen: 2,
41081 generic: true,
41082 },
41083 {
41084 name: "Min64",
41085 argLen: 2,
41086 generic: true,
41087 },
41088 {
41089 name: "Max64",
41090 argLen: 2,
41091 generic: true,
41092 },
41093 {
41094 name: "Min64u",
41095 argLen: 2,
41096 generic: true,
41097 },
41098 {
41099 name: "Max64u",
41100 argLen: 2,
41101 generic: true,
41102 },
41103 {
41104 name: "Min64F",
41105 argLen: 2,
41106 generic: true,
41107 },
41108 {
41109 name: "Min32F",
41110 argLen: 2,
41111 generic: true,
41112 },
41113 {
41114 name: "Max64F",
41115 argLen: 2,
41116 generic: true,
41117 },
41118 {
41119 name: "Max32F",
41120 argLen: 2,
41121 generic: true,
41122 },
41123 {
41124 name: "FMA",
41125 argLen: 3,
41126 generic: true,
41127 },
41128 {
41129 name: "Phi",
41130 argLen: -1,
41131 zeroWidth: true,
41132 generic: true,
41133 },
41134 {
41135 name: "Copy",
41136 argLen: 1,
41137 generic: true,
41138 },
41139 {
41140 name: "Convert",
41141 argLen: 2,
41142 resultInArg0: true,
41143 zeroWidth: true,
41144 generic: true,
41145 },
41146 {
41147 name: "ConstBool",
41148 auxType: auxBool,
41149 argLen: 0,
41150 generic: true,
41151 },
41152 {
41153 name: "ConstString",
41154 auxType: auxString,
41155 argLen: 0,
41156 generic: true,
41157 },
41158 {
41159 name: "ConstNil",
41160 argLen: 0,
41161 generic: true,
41162 },
41163 {
41164 name: "Const8",
41165 auxType: auxInt8,
41166 argLen: 0,
41167 generic: true,
41168 },
41169 {
41170 name: "Const16",
41171 auxType: auxInt16,
41172 argLen: 0,
41173 generic: true,
41174 },
41175 {
41176 name: "Const32",
41177 auxType: auxInt32,
41178 argLen: 0,
41179 generic: true,
41180 },
41181 {
41182 name: "Const64",
41183 auxType: auxInt64,
41184 argLen: 0,
41185 generic: true,
41186 },
41187 {
41188 name: "Const32F",
41189 auxType: auxFloat32,
41190 argLen: 0,
41191 generic: true,
41192 },
41193 {
41194 name: "Const64F",
41195 auxType: auxFloat64,
41196 argLen: 0,
41197 generic: true,
41198 },
41199 {
41200 name: "ConstInterface",
41201 argLen: 0,
41202 generic: true,
41203 },
41204 {
41205 name: "ConstSlice",
41206 argLen: 0,
41207 generic: true,
41208 },
41209 {
41210 name: "InitMem",
41211 argLen: 0,
41212 zeroWidth: true,
41213 generic: true,
41214 },
41215 {
41216 name: "Arg",
41217 auxType: auxSymOff,
41218 argLen: 0,
41219 zeroWidth: true,
41220 symEffect: SymRead,
41221 generic: true,
41222 },
41223 {
41224 name: "ArgIntReg",
41225 auxType: auxNameOffsetInt8,
41226 argLen: 0,
41227 zeroWidth: true,
41228 generic: true,
41229 },
41230 {
41231 name: "ArgFloatReg",
41232 auxType: auxNameOffsetInt8,
41233 argLen: 0,
41234 zeroWidth: true,
41235 generic: true,
41236 },
41237 {
41238 name: "Addr",
41239 auxType: auxSym,
41240 argLen: 1,
41241 symEffect: SymAddr,
41242 generic: true,
41243 },
41244 {
41245 name: "LocalAddr",
41246 auxType: auxSym,
41247 argLen: 2,
41248 symEffect: SymAddr,
41249 generic: true,
41250 },
41251 {
41252 name: "SP",
41253 argLen: 0,
41254 zeroWidth: true,
41255 generic: true,
41256 },
41257 {
41258 name: "SB",
41259 argLen: 0,
41260 zeroWidth: true,
41261 generic: true,
41262 },
41263 {
41264 name: "SPanchored",
41265 argLen: 2,
41266 zeroWidth: true,
41267 generic: true,
41268 },
41269 {
41270 name: "Load",
41271 argLen: 2,
41272 generic: true,
41273 },
41274 {
41275 name: "Dereference",
41276 argLen: 2,
41277 generic: true,
41278 },
41279 {
41280 name: "Store",
41281 auxType: auxTyp,
41282 argLen: 3,
41283 generic: true,
41284 },
41285 {
41286 name: "Move",
41287 auxType: auxTypSize,
41288 argLen: 3,
41289 generic: true,
41290 },
41291 {
41292 name: "Zero",
41293 auxType: auxTypSize,
41294 argLen: 2,
41295 generic: true,
41296 },
41297 {
41298 name: "StoreWB",
41299 auxType: auxTyp,
41300 argLen: 3,
41301 generic: true,
41302 },
41303 {
41304 name: "MoveWB",
41305 auxType: auxTypSize,
41306 argLen: 3,
41307 generic: true,
41308 },
41309 {
41310 name: "ZeroWB",
41311 auxType: auxTypSize,
41312 argLen: 2,
41313 generic: true,
41314 },
41315 {
41316 name: "WBend",
41317 argLen: 1,
41318 generic: true,
41319 },
41320 {
41321 name: "WB",
41322 auxType: auxInt64,
41323 argLen: 1,
41324 generic: true,
41325 },
41326 {
41327 name: "HasCPUFeature",
41328 auxType: auxSym,
41329 argLen: 0,
41330 symEffect: SymNone,
41331 generic: true,
41332 },
41333 {
41334 name: "PanicBounds",
41335 auxType: auxInt64,
41336 argLen: 3,
41337 call: true,
41338 generic: true,
41339 },
41340 {
41341 name: "PanicExtend",
41342 auxType: auxInt64,
41343 argLen: 4,
41344 call: true,
41345 generic: true,
41346 },
41347 {
41348 name: "ClosureCall",
41349 auxType: auxCallOff,
41350 argLen: -1,
41351 call: true,
41352 generic: true,
41353 },
41354 {
41355 name: "StaticCall",
41356 auxType: auxCallOff,
41357 argLen: -1,
41358 call: true,
41359 generic: true,
41360 },
41361 {
41362 name: "InterCall",
41363 auxType: auxCallOff,
41364 argLen: -1,
41365 call: true,
41366 generic: true,
41367 },
41368 {
41369 name: "TailCall",
41370 auxType: auxCallOff,
41371 argLen: -1,
41372 call: true,
41373 generic: true,
41374 },
41375 {
41376 name: "ClosureLECall",
41377 auxType: auxCallOff,
41378 argLen: -1,
41379 call: true,
41380 generic: true,
41381 },
41382 {
41383 name: "StaticLECall",
41384 auxType: auxCallOff,
41385 argLen: -1,
41386 call: true,
41387 generic: true,
41388 },
41389 {
41390 name: "InterLECall",
41391 auxType: auxCallOff,
41392 argLen: -1,
41393 call: true,
41394 generic: true,
41395 },
41396 {
41397 name: "TailLECall",
41398 auxType: auxCallOff,
41399 argLen: -1,
41400 call: true,
41401 generic: true,
41402 },
41403 {
41404 name: "SignExt8to16",
41405 argLen: 1,
41406 generic: true,
41407 },
41408 {
41409 name: "SignExt8to32",
41410 argLen: 1,
41411 generic: true,
41412 },
41413 {
41414 name: "SignExt8to64",
41415 argLen: 1,
41416 generic: true,
41417 },
41418 {
41419 name: "SignExt16to32",
41420 argLen: 1,
41421 generic: true,
41422 },
41423 {
41424 name: "SignExt16to64",
41425 argLen: 1,
41426 generic: true,
41427 },
41428 {
41429 name: "SignExt32to64",
41430 argLen: 1,
41431 generic: true,
41432 },
41433 {
41434 name: "ZeroExt8to16",
41435 argLen: 1,
41436 generic: true,
41437 },
41438 {
41439 name: "ZeroExt8to32",
41440 argLen: 1,
41441 generic: true,
41442 },
41443 {
41444 name: "ZeroExt8to64",
41445 argLen: 1,
41446 generic: true,
41447 },
41448 {
41449 name: "ZeroExt16to32",
41450 argLen: 1,
41451 generic: true,
41452 },
41453 {
41454 name: "ZeroExt16to64",
41455 argLen: 1,
41456 generic: true,
41457 },
41458 {
41459 name: "ZeroExt32to64",
41460 argLen: 1,
41461 generic: true,
41462 },
41463 {
41464 name: "Trunc16to8",
41465 argLen: 1,
41466 generic: true,
41467 },
41468 {
41469 name: "Trunc32to8",
41470 argLen: 1,
41471 generic: true,
41472 },
41473 {
41474 name: "Trunc32to16",
41475 argLen: 1,
41476 generic: true,
41477 },
41478 {
41479 name: "Trunc64to8",
41480 argLen: 1,
41481 generic: true,
41482 },
41483 {
41484 name: "Trunc64to16",
41485 argLen: 1,
41486 generic: true,
41487 },
41488 {
41489 name: "Trunc64to32",
41490 argLen: 1,
41491 generic: true,
41492 },
41493 {
41494 name: "Cvt32to32F",
41495 argLen: 1,
41496 generic: true,
41497 },
41498 {
41499 name: "Cvt32to64F",
41500 argLen: 1,
41501 generic: true,
41502 },
41503 {
41504 name: "Cvt64to32F",
41505 argLen: 1,
41506 generic: true,
41507 },
41508 {
41509 name: "Cvt64to64F",
41510 argLen: 1,
41511 generic: true,
41512 },
41513 {
41514 name: "Cvt32Fto32",
41515 argLen: 1,
41516 generic: true,
41517 },
41518 {
41519 name: "Cvt32Fto64",
41520 argLen: 1,
41521 generic: true,
41522 },
41523 {
41524 name: "Cvt64Fto32",
41525 argLen: 1,
41526 generic: true,
41527 },
41528 {
41529 name: "Cvt64Fto64",
41530 argLen: 1,
41531 generic: true,
41532 },
41533 {
41534 name: "Cvt32Fto64F",
41535 argLen: 1,
41536 generic: true,
41537 },
41538 {
41539 name: "Cvt64Fto32F",
41540 argLen: 1,
41541 generic: true,
41542 },
41543 {
41544 name: "CvtBoolToUint8",
41545 argLen: 1,
41546 generic: true,
41547 },
41548 {
41549 name: "Round32F",
41550 argLen: 1,
41551 generic: true,
41552 },
41553 {
41554 name: "Round64F",
41555 argLen: 1,
41556 generic: true,
41557 },
41558 {
41559 name: "IsNonNil",
41560 argLen: 1,
41561 generic: true,
41562 },
41563 {
41564 name: "IsInBounds",
41565 argLen: 2,
41566 generic: true,
41567 },
41568 {
41569 name: "IsSliceInBounds",
41570 argLen: 2,
41571 generic: true,
41572 },
41573 {
41574 name: "NilCheck",
41575 argLen: 2,
41576 nilCheck: true,
41577 generic: true,
41578 },
41579 {
41580 name: "GetG",
41581 argLen: 1,
41582 zeroWidth: true,
41583 generic: true,
41584 },
41585 {
41586 name: "GetClosurePtr",
41587 argLen: 0,
41588 generic: true,
41589 },
41590 {
41591 name: "GetCallerPC",
41592 argLen: 0,
41593 generic: true,
41594 },
41595 {
41596 name: "GetCallerSP",
41597 argLen: 1,
41598 generic: true,
41599 },
41600 {
41601 name: "PtrIndex",
41602 argLen: 2,
41603 generic: true,
41604 },
41605 {
41606 name: "OffPtr",
41607 auxType: auxInt64,
41608 argLen: 1,
41609 generic: true,
41610 },
41611 {
41612 name: "SliceMake",
41613 argLen: 3,
41614 generic: true,
41615 },
41616 {
41617 name: "SlicePtr",
41618 argLen: 1,
41619 generic: true,
41620 },
41621 {
41622 name: "SliceLen",
41623 argLen: 1,
41624 generic: true,
41625 },
41626 {
41627 name: "SliceCap",
41628 argLen: 1,
41629 generic: true,
41630 },
41631 {
41632 name: "SlicePtrUnchecked",
41633 argLen: 1,
41634 generic: true,
41635 },
41636 {
41637 name: "ComplexMake",
41638 argLen: 2,
41639 generic: true,
41640 },
41641 {
41642 name: "ComplexReal",
41643 argLen: 1,
41644 generic: true,
41645 },
41646 {
41647 name: "ComplexImag",
41648 argLen: 1,
41649 generic: true,
41650 },
41651 {
41652 name: "StringMake",
41653 argLen: 2,
41654 generic: true,
41655 },
41656 {
41657 name: "StringPtr",
41658 argLen: 1,
41659 generic: true,
41660 },
41661 {
41662 name: "StringLen",
41663 argLen: 1,
41664 generic: true,
41665 },
41666 {
41667 name: "IMake",
41668 argLen: 2,
41669 generic: true,
41670 },
41671 {
41672 name: "ITab",
41673 argLen: 1,
41674 generic: true,
41675 },
41676 {
41677 name: "IData",
41678 argLen: 1,
41679 generic: true,
41680 },
41681 {
41682 name: "StructMake",
41683 argLen: -1,
41684 generic: true,
41685 },
41686 {
41687 name: "StructSelect",
41688 auxType: auxInt64,
41689 argLen: 1,
41690 generic: true,
41691 },
41692 {
41693 name: "ArrayMake0",
41694 argLen: 0,
41695 generic: true,
41696 },
41697 {
41698 name: "ArrayMake1",
41699 argLen: 1,
41700 generic: true,
41701 },
41702 {
41703 name: "ArraySelect",
41704 auxType: auxInt64,
41705 argLen: 1,
41706 generic: true,
41707 },
41708 {
41709 name: "StoreReg",
41710 argLen: 1,
41711 generic: true,
41712 },
41713 {
41714 name: "LoadReg",
41715 argLen: 1,
41716 generic: true,
41717 },
41718 {
41719 name: "FwdRef",
41720 auxType: auxSym,
41721 argLen: 0,
41722 symEffect: SymNone,
41723 generic: true,
41724 },
41725 {
41726 name: "Unknown",
41727 argLen: 0,
41728 generic: true,
41729 },
41730 {
41731 name: "VarDef",
41732 auxType: auxSym,
41733 argLen: 1,
41734 zeroWidth: true,
41735 symEffect: SymNone,
41736 generic: true,
41737 },
41738 {
41739 name: "VarLive",
41740 auxType: auxSym,
41741 argLen: 1,
41742 zeroWidth: true,
41743 symEffect: SymRead,
41744 generic: true,
41745 },
41746 {
41747 name: "KeepAlive",
41748 argLen: 2,
41749 zeroWidth: true,
41750 generic: true,
41751 },
41752 {
41753 name: "InlMark",
41754 auxType: auxInt32,
41755 argLen: 1,
41756 generic: true,
41757 },
41758 {
41759 name: "Int64Make",
41760 argLen: 2,
41761 generic: true,
41762 },
41763 {
41764 name: "Int64Hi",
41765 argLen: 1,
41766 generic: true,
41767 },
41768 {
41769 name: "Int64Lo",
41770 argLen: 1,
41771 generic: true,
41772 },
41773 {
41774 name: "Add32carry",
41775 argLen: 2,
41776 commutative: true,
41777 generic: true,
41778 },
41779 {
41780 name: "Add32withcarry",
41781 argLen: 3,
41782 commutative: true,
41783 generic: true,
41784 },
41785 {
41786 name: "Sub32carry",
41787 argLen: 2,
41788 generic: true,
41789 },
41790 {
41791 name: "Sub32withcarry",
41792 argLen: 3,
41793 generic: true,
41794 },
41795 {
41796 name: "Add64carry",
41797 argLen: 3,
41798 commutative: true,
41799 generic: true,
41800 },
41801 {
41802 name: "Sub64borrow",
41803 argLen: 3,
41804 generic: true,
41805 },
41806 {
41807 name: "Signmask",
41808 argLen: 1,
41809 generic: true,
41810 },
41811 {
41812 name: "Zeromask",
41813 argLen: 1,
41814 generic: true,
41815 },
41816 {
41817 name: "Slicemask",
41818 argLen: 1,
41819 generic: true,
41820 },
41821 {
41822 name: "SpectreIndex",
41823 argLen: 2,
41824 generic: true,
41825 },
41826 {
41827 name: "SpectreSliceIndex",
41828 argLen: 2,
41829 generic: true,
41830 },
41831 {
41832 name: "Cvt32Uto32F",
41833 argLen: 1,
41834 generic: true,
41835 },
41836 {
41837 name: "Cvt32Uto64F",
41838 argLen: 1,
41839 generic: true,
41840 },
41841 {
41842 name: "Cvt32Fto32U",
41843 argLen: 1,
41844 generic: true,
41845 },
41846 {
41847 name: "Cvt64Fto32U",
41848 argLen: 1,
41849 generic: true,
41850 },
41851 {
41852 name: "Cvt64Uto32F",
41853 argLen: 1,
41854 generic: true,
41855 },
41856 {
41857 name: "Cvt64Uto64F",
41858 argLen: 1,
41859 generic: true,
41860 },
41861 {
41862 name: "Cvt32Fto64U",
41863 argLen: 1,
41864 generic: true,
41865 },
41866 {
41867 name: "Cvt64Fto64U",
41868 argLen: 1,
41869 generic: true,
41870 },
41871 {
41872 name: "Select0",
41873 argLen: 1,
41874 zeroWidth: true,
41875 generic: true,
41876 },
41877 {
41878 name: "Select1",
41879 argLen: 1,
41880 zeroWidth: true,
41881 generic: true,
41882 },
41883 {
41884 name: "SelectN",
41885 auxType: auxInt64,
41886 argLen: 1,
41887 generic: true,
41888 },
41889 {
41890 name: "SelectNAddr",
41891 auxType: auxInt64,
41892 argLen: 1,
41893 generic: true,
41894 },
41895 {
41896 name: "MakeResult",
41897 argLen: -1,
41898 generic: true,
41899 },
41900 {
41901 name: "AtomicLoad8",
41902 argLen: 2,
41903 generic: true,
41904 },
41905 {
41906 name: "AtomicLoad32",
41907 argLen: 2,
41908 generic: true,
41909 },
41910 {
41911 name: "AtomicLoad64",
41912 argLen: 2,
41913 generic: true,
41914 },
41915 {
41916 name: "AtomicLoadPtr",
41917 argLen: 2,
41918 generic: true,
41919 },
41920 {
41921 name: "AtomicLoadAcq32",
41922 argLen: 2,
41923 generic: true,
41924 },
41925 {
41926 name: "AtomicLoadAcq64",
41927 argLen: 2,
41928 generic: true,
41929 },
41930 {
41931 name: "AtomicStore8",
41932 argLen: 3,
41933 hasSideEffects: true,
41934 generic: true,
41935 },
41936 {
41937 name: "AtomicStore32",
41938 argLen: 3,
41939 hasSideEffects: true,
41940 generic: true,
41941 },
41942 {
41943 name: "AtomicStore64",
41944 argLen: 3,
41945 hasSideEffects: true,
41946 generic: true,
41947 },
41948 {
41949 name: "AtomicStorePtrNoWB",
41950 argLen: 3,
41951 hasSideEffects: true,
41952 generic: true,
41953 },
41954 {
41955 name: "AtomicStoreRel32",
41956 argLen: 3,
41957 hasSideEffects: true,
41958 generic: true,
41959 },
41960 {
41961 name: "AtomicStoreRel64",
41962 argLen: 3,
41963 hasSideEffects: true,
41964 generic: true,
41965 },
41966 {
41967 name: "AtomicExchange8",
41968 argLen: 3,
41969 hasSideEffects: true,
41970 generic: true,
41971 },
41972 {
41973 name: "AtomicExchange32",
41974 argLen: 3,
41975 hasSideEffects: true,
41976 generic: true,
41977 },
41978 {
41979 name: "AtomicExchange64",
41980 argLen: 3,
41981 hasSideEffects: true,
41982 generic: true,
41983 },
41984 {
41985 name: "AtomicAdd32",
41986 argLen: 3,
41987 hasSideEffects: true,
41988 generic: true,
41989 },
41990 {
41991 name: "AtomicAdd64",
41992 argLen: 3,
41993 hasSideEffects: true,
41994 generic: true,
41995 },
41996 {
41997 name: "AtomicCompareAndSwap32",
41998 argLen: 4,
41999 hasSideEffects: true,
42000 generic: true,
42001 },
42002 {
42003 name: "AtomicCompareAndSwap64",
42004 argLen: 4,
42005 hasSideEffects: true,
42006 generic: true,
42007 },
42008 {
42009 name: "AtomicCompareAndSwapRel32",
42010 argLen: 4,
42011 hasSideEffects: true,
42012 generic: true,
42013 },
42014 {
42015 name: "AtomicAnd8",
42016 argLen: 3,
42017 hasSideEffects: true,
42018 generic: true,
42019 },
42020 {
42021 name: "AtomicOr8",
42022 argLen: 3,
42023 hasSideEffects: true,
42024 generic: true,
42025 },
42026 {
42027 name: "AtomicAnd32",
42028 argLen: 3,
42029 hasSideEffects: true,
42030 generic: true,
42031 },
42032 {
42033 name: "AtomicOr32",
42034 argLen: 3,
42035 hasSideEffects: true,
42036 generic: true,
42037 },
42038 {
42039 name: "AtomicAnd64value",
42040 argLen: 3,
42041 hasSideEffects: true,
42042 generic: true,
42043 },
42044 {
42045 name: "AtomicAnd32value",
42046 argLen: 3,
42047 hasSideEffects: true,
42048 generic: true,
42049 },
42050 {
42051 name: "AtomicAnd8value",
42052 argLen: 3,
42053 hasSideEffects: true,
42054 generic: true,
42055 },
42056 {
42057 name: "AtomicOr64value",
42058 argLen: 3,
42059 hasSideEffects: true,
42060 generic: true,
42061 },
42062 {
42063 name: "AtomicOr32value",
42064 argLen: 3,
42065 hasSideEffects: true,
42066 generic: true,
42067 },
42068 {
42069 name: "AtomicOr8value",
42070 argLen: 3,
42071 hasSideEffects: true,
42072 generic: true,
42073 },
42074 {
42075 name: "AtomicStore8Variant",
42076 argLen: 3,
42077 hasSideEffects: true,
42078 generic: true,
42079 },
42080 {
42081 name: "AtomicStore32Variant",
42082 argLen: 3,
42083 hasSideEffects: true,
42084 generic: true,
42085 },
42086 {
42087 name: "AtomicStore64Variant",
42088 argLen: 3,
42089 hasSideEffects: true,
42090 generic: true,
42091 },
42092 {
42093 name: "AtomicAdd32Variant",
42094 argLen: 3,
42095 hasSideEffects: true,
42096 generic: true,
42097 },
42098 {
42099 name: "AtomicAdd64Variant",
42100 argLen: 3,
42101 hasSideEffects: true,
42102 generic: true,
42103 },
42104 {
42105 name: "AtomicExchange8Variant",
42106 argLen: 3,
42107 hasSideEffects: true,
42108 generic: true,
42109 },
42110 {
42111 name: "AtomicExchange32Variant",
42112 argLen: 3,
42113 hasSideEffects: true,
42114 generic: true,
42115 },
42116 {
42117 name: "AtomicExchange64Variant",
42118 argLen: 3,
42119 hasSideEffects: true,
42120 generic: true,
42121 },
42122 {
42123 name: "AtomicCompareAndSwap32Variant",
42124 argLen: 4,
42125 hasSideEffects: true,
42126 generic: true,
42127 },
42128 {
42129 name: "AtomicCompareAndSwap64Variant",
42130 argLen: 4,
42131 hasSideEffects: true,
42132 generic: true,
42133 },
42134 {
42135 name: "AtomicAnd64valueVariant",
42136 argLen: 3,
42137 hasSideEffects: true,
42138 generic: true,
42139 },
42140 {
42141 name: "AtomicOr64valueVariant",
42142 argLen: 3,
42143 hasSideEffects: true,
42144 generic: true,
42145 },
42146 {
42147 name: "AtomicAnd32valueVariant",
42148 argLen: 3,
42149 hasSideEffects: true,
42150 generic: true,
42151 },
42152 {
42153 name: "AtomicOr32valueVariant",
42154 argLen: 3,
42155 hasSideEffects: true,
42156 generic: true,
42157 },
42158 {
42159 name: "AtomicAnd8valueVariant",
42160 argLen: 3,
42161 hasSideEffects: true,
42162 generic: true,
42163 },
42164 {
42165 name: "AtomicOr8valueVariant",
42166 argLen: 3,
42167 hasSideEffects: true,
42168 generic: true,
42169 },
42170 {
42171 name: "PubBarrier",
42172 argLen: 1,
42173 hasSideEffects: true,
42174 generic: true,
42175 },
42176 {
42177 name: "Clobber",
42178 auxType: auxSymOff,
42179 argLen: 0,
42180 symEffect: SymNone,
42181 generic: true,
42182 },
42183 {
42184 name: "ClobberReg",
42185 argLen: 0,
42186 generic: true,
42187 },
42188 {
42189 name: "PrefetchCache",
42190 argLen: 2,
42191 hasSideEffects: true,
42192 generic: true,
42193 },
42194 {
42195 name: "PrefetchCacheStreamed",
42196 argLen: 2,
42197 hasSideEffects: true,
42198 generic: true,
42199 },
42200 }
42201
42202 func (o Op) Asm() obj.As { return opcodeTable[o].asm }
42203 func (o Op) Scale() int16 { return int16(opcodeTable[o].scale) }
42204 func (o Op) String() string { return opcodeTable[o].name }
42205 func (o Op) SymEffect() SymEffect { return opcodeTable[o].symEffect }
42206 func (o Op) IsCall() bool { return opcodeTable[o].call }
42207 func (o Op) IsTailCall() bool { return opcodeTable[o].tailCall }
42208 func (o Op) HasSideEffects() bool { return opcodeTable[o].hasSideEffects }
42209 func (o Op) UnsafePoint() bool { return opcodeTable[o].unsafePoint }
42210 func (o Op) ResultInArg0() bool { return opcodeTable[o].resultInArg0 }
42211
42212 var registers386 = [...]Register{
42213 {0, x86.REG_AX, 0, "AX"},
42214 {1, x86.REG_CX, 1, "CX"},
42215 {2, x86.REG_DX, 2, "DX"},
42216 {3, x86.REG_BX, 3, "BX"},
42217 {4, x86.REGSP, -1, "SP"},
42218 {5, x86.REG_BP, 4, "BP"},
42219 {6, x86.REG_SI, 5, "SI"},
42220 {7, x86.REG_DI, 6, "DI"},
42221 {8, x86.REG_X0, -1, "X0"},
42222 {9, x86.REG_X1, -1, "X1"},
42223 {10, x86.REG_X2, -1, "X2"},
42224 {11, x86.REG_X3, -1, "X3"},
42225 {12, x86.REG_X4, -1, "X4"},
42226 {13, x86.REG_X5, -1, "X5"},
42227 {14, x86.REG_X6, -1, "X6"},
42228 {15, x86.REG_X7, -1, "X7"},
42229 {16, 0, -1, "SB"},
42230 }
42231 var paramIntReg386 = []int8(nil)
42232 var paramFloatReg386 = []int8(nil)
42233 var gpRegMask386 = regMask(239)
42234 var fpRegMask386 = regMask(65280)
42235 var specialRegMask386 = regMask(0)
42236 var framepointerReg386 = int8(5)
42237 var linkReg386 = int8(-1)
42238 var registersAMD64 = [...]Register{
42239 {0, x86.REG_AX, 0, "AX"},
42240 {1, x86.REG_CX, 1, "CX"},
42241 {2, x86.REG_DX, 2, "DX"},
42242 {3, x86.REG_BX, 3, "BX"},
42243 {4, x86.REGSP, -1, "SP"},
42244 {5, x86.REG_BP, 4, "BP"},
42245 {6, x86.REG_SI, 5, "SI"},
42246 {7, x86.REG_DI, 6, "DI"},
42247 {8, x86.REG_R8, 7, "R8"},
42248 {9, x86.REG_R9, 8, "R9"},
42249 {10, x86.REG_R10, 9, "R10"},
42250 {11, x86.REG_R11, 10, "R11"},
42251 {12, x86.REG_R12, 11, "R12"},
42252 {13, x86.REG_R13, 12, "R13"},
42253 {14, x86.REGG, -1, "g"},
42254 {15, x86.REG_R15, 13, "R15"},
42255 {16, x86.REG_X0, -1, "X0"},
42256 {17, x86.REG_X1, -1, "X1"},
42257 {18, x86.REG_X2, -1, "X2"},
42258 {19, x86.REG_X3, -1, "X3"},
42259 {20, x86.REG_X4, -1, "X4"},
42260 {21, x86.REG_X5, -1, "X5"},
42261 {22, x86.REG_X6, -1, "X6"},
42262 {23, x86.REG_X7, -1, "X7"},
42263 {24, x86.REG_X8, -1, "X8"},
42264 {25, x86.REG_X9, -1, "X9"},
42265 {26, x86.REG_X10, -1, "X10"},
42266 {27, x86.REG_X11, -1, "X11"},
42267 {28, x86.REG_X12, -1, "X12"},
42268 {29, x86.REG_X13, -1, "X13"},
42269 {30, x86.REG_X14, -1, "X14"},
42270 {31, x86.REG_X15, -1, "X15"},
42271 {32, 0, -1, "SB"},
42272 }
42273 var paramIntRegAMD64 = []int8{0, 3, 1, 7, 6, 8, 9, 10, 11}
42274 var paramFloatRegAMD64 = []int8{16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30}
42275 var gpRegMaskAMD64 = regMask(49135)
42276 var fpRegMaskAMD64 = regMask(2147418112)
42277 var specialRegMaskAMD64 = regMask(2147483648)
42278 var framepointerRegAMD64 = int8(5)
42279 var linkRegAMD64 = int8(-1)
42280 var registersARM = [...]Register{
42281 {0, arm.REG_R0, 0, "R0"},
42282 {1, arm.REG_R1, 1, "R1"},
42283 {2, arm.REG_R2, 2, "R2"},
42284 {3, arm.REG_R3, 3, "R3"},
42285 {4, arm.REG_R4, 4, "R4"},
42286 {5, arm.REG_R5, 5, "R5"},
42287 {6, arm.REG_R6, 6, "R6"},
42288 {7, arm.REG_R7, 7, "R7"},
42289 {8, arm.REG_R8, 8, "R8"},
42290 {9, arm.REG_R9, 9, "R9"},
42291 {10, arm.REGG, -1, "g"},
42292 {11, arm.REG_R11, -1, "R11"},
42293 {12, arm.REG_R12, 10, "R12"},
42294 {13, arm.REGSP, -1, "SP"},
42295 {14, arm.REG_R14, 11, "R14"},
42296 {15, arm.REG_R15, -1, "R15"},
42297 {16, arm.REG_F0, -1, "F0"},
42298 {17, arm.REG_F1, -1, "F1"},
42299 {18, arm.REG_F2, -1, "F2"},
42300 {19, arm.REG_F3, -1, "F3"},
42301 {20, arm.REG_F4, -1, "F4"},
42302 {21, arm.REG_F5, -1, "F5"},
42303 {22, arm.REG_F6, -1, "F6"},
42304 {23, arm.REG_F7, -1, "F7"},
42305 {24, arm.REG_F8, -1, "F8"},
42306 {25, arm.REG_F9, -1, "F9"},
42307 {26, arm.REG_F10, -1, "F10"},
42308 {27, arm.REG_F11, -1, "F11"},
42309 {28, arm.REG_F12, -1, "F12"},
42310 {29, arm.REG_F13, -1, "F13"},
42311 {30, arm.REG_F14, -1, "F14"},
42312 {31, arm.REG_F15, -1, "F15"},
42313 {32, 0, -1, "SB"},
42314 }
42315 var paramIntRegARM = []int8(nil)
42316 var paramFloatRegARM = []int8(nil)
42317 var gpRegMaskARM = regMask(21503)
42318 var fpRegMaskARM = regMask(4294901760)
42319 var specialRegMaskARM = regMask(0)
42320 var framepointerRegARM = int8(-1)
42321 var linkRegARM = int8(14)
42322 var registersARM64 = [...]Register{
42323 {0, arm64.REG_R0, 0, "R0"},
42324 {1, arm64.REG_R1, 1, "R1"},
42325 {2, arm64.REG_R2, 2, "R2"},
42326 {3, arm64.REG_R3, 3, "R3"},
42327 {4, arm64.REG_R4, 4, "R4"},
42328 {5, arm64.REG_R5, 5, "R5"},
42329 {6, arm64.REG_R6, 6, "R6"},
42330 {7, arm64.REG_R7, 7, "R7"},
42331 {8, arm64.REG_R8, 8, "R8"},
42332 {9, arm64.REG_R9, 9, "R9"},
42333 {10, arm64.REG_R10, 10, "R10"},
42334 {11, arm64.REG_R11, 11, "R11"},
42335 {12, arm64.REG_R12, 12, "R12"},
42336 {13, arm64.REG_R13, 13, "R13"},
42337 {14, arm64.REG_R14, 14, "R14"},
42338 {15, arm64.REG_R15, 15, "R15"},
42339 {16, arm64.REG_R16, 16, "R16"},
42340 {17, arm64.REG_R17, 17, "R17"},
42341 {18, arm64.REG_R18, -1, "R18"},
42342 {19, arm64.REG_R19, 18, "R19"},
42343 {20, arm64.REG_R20, 19, "R20"},
42344 {21, arm64.REG_R21, 20, "R21"},
42345 {22, arm64.REG_R22, 21, "R22"},
42346 {23, arm64.REG_R23, 22, "R23"},
42347 {24, arm64.REG_R24, 23, "R24"},
42348 {25, arm64.REG_R25, 24, "R25"},
42349 {26, arm64.REG_R26, 25, "R26"},
42350 {27, arm64.REGG, -1, "g"},
42351 {28, arm64.REG_R29, -1, "R29"},
42352 {29, arm64.REG_R30, 26, "R30"},
42353 {30, arm64.REGSP, -1, "SP"},
42354 {31, arm64.REG_F0, -1, "F0"},
42355 {32, arm64.REG_F1, -1, "F1"},
42356 {33, arm64.REG_F2, -1, "F2"},
42357 {34, arm64.REG_F3, -1, "F3"},
42358 {35, arm64.REG_F4, -1, "F4"},
42359 {36, arm64.REG_F5, -1, "F5"},
42360 {37, arm64.REG_F6, -1, "F6"},
42361 {38, arm64.REG_F7, -1, "F7"},
42362 {39, arm64.REG_F8, -1, "F8"},
42363 {40, arm64.REG_F9, -1, "F9"},
42364 {41, arm64.REG_F10, -1, "F10"},
42365 {42, arm64.REG_F11, -1, "F11"},
42366 {43, arm64.REG_F12, -1, "F12"},
42367 {44, arm64.REG_F13, -1, "F13"},
42368 {45, arm64.REG_F14, -1, "F14"},
42369 {46, arm64.REG_F15, -1, "F15"},
42370 {47, arm64.REG_F16, -1, "F16"},
42371 {48, arm64.REG_F17, -1, "F17"},
42372 {49, arm64.REG_F18, -1, "F18"},
42373 {50, arm64.REG_F19, -1, "F19"},
42374 {51, arm64.REG_F20, -1, "F20"},
42375 {52, arm64.REG_F21, -1, "F21"},
42376 {53, arm64.REG_F22, -1, "F22"},
42377 {54, arm64.REG_F23, -1, "F23"},
42378 {55, arm64.REG_F24, -1, "F24"},
42379 {56, arm64.REG_F25, -1, "F25"},
42380 {57, arm64.REG_F26, -1, "F26"},
42381 {58, arm64.REG_F27, -1, "F27"},
42382 {59, arm64.REG_F28, -1, "F28"},
42383 {60, arm64.REG_F29, -1, "F29"},
42384 {61, arm64.REG_F30, -1, "F30"},
42385 {62, arm64.REG_F31, -1, "F31"},
42386 {63, 0, -1, "SB"},
42387 }
42388 var paramIntRegARM64 = []int8{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15}
42389 var paramFloatRegARM64 = []int8{31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46}
42390 var gpRegMaskARM64 = regMask(670826495)
42391 var fpRegMaskARM64 = regMask(9223372034707292160)
42392 var specialRegMaskARM64 = regMask(0)
42393 var framepointerRegARM64 = int8(-1)
42394 var linkRegARM64 = int8(29)
42395 var registersLOONG64 = [...]Register{
42396 {0, loong64.REG_R0, -1, "R0"},
42397 {1, loong64.REG_R1, -1, "R1"},
42398 {2, loong64.REGSP, -1, "SP"},
42399 {3, loong64.REG_R4, 0, "R4"},
42400 {4, loong64.REG_R5, 1, "R5"},
42401 {5, loong64.REG_R6, 2, "R6"},
42402 {6, loong64.REG_R7, 3, "R7"},
42403 {7, loong64.REG_R8, 4, "R8"},
42404 {8, loong64.REG_R9, 5, "R9"},
42405 {9, loong64.REG_R10, 6, "R10"},
42406 {10, loong64.REG_R11, 7, "R11"},
42407 {11, loong64.REG_R12, 8, "R12"},
42408 {12, loong64.REG_R13, 9, "R13"},
42409 {13, loong64.REG_R14, 10, "R14"},
42410 {14, loong64.REG_R15, 11, "R15"},
42411 {15, loong64.REG_R16, 12, "R16"},
42412 {16, loong64.REG_R17, 13, "R17"},
42413 {17, loong64.REG_R18, 14, "R18"},
42414 {18, loong64.REG_R19, 15, "R19"},
42415 {19, loong64.REG_R20, 16, "R20"},
42416 {20, loong64.REG_R21, 17, "R21"},
42417 {21, loong64.REGG, -1, "g"},
42418 {22, loong64.REG_R23, 18, "R23"},
42419 {23, loong64.REG_R24, 19, "R24"},
42420 {24, loong64.REG_R25, 20, "R25"},
42421 {25, loong64.REG_R26, 21, "R26"},
42422 {26, loong64.REG_R27, 22, "R27"},
42423 {27, loong64.REG_R28, 23, "R28"},
42424 {28, loong64.REG_R29, 24, "R29"},
42425 {29, loong64.REG_R31, 25, "R31"},
42426 {30, loong64.REG_F0, -1, "F0"},
42427 {31, loong64.REG_F1, -1, "F1"},
42428 {32, loong64.REG_F2, -1, "F2"},
42429 {33, loong64.REG_F3, -1, "F3"},
42430 {34, loong64.REG_F4, -1, "F4"},
42431 {35, loong64.REG_F5, -1, "F5"},
42432 {36, loong64.REG_F6, -1, "F6"},
42433 {37, loong64.REG_F7, -1, "F7"},
42434 {38, loong64.REG_F8, -1, "F8"},
42435 {39, loong64.REG_F9, -1, "F9"},
42436 {40, loong64.REG_F10, -1, "F10"},
42437 {41, loong64.REG_F11, -1, "F11"},
42438 {42, loong64.REG_F12, -1, "F12"},
42439 {43, loong64.REG_F13, -1, "F13"},
42440 {44, loong64.REG_F14, -1, "F14"},
42441 {45, loong64.REG_F15, -1, "F15"},
42442 {46, loong64.REG_F16, -1, "F16"},
42443 {47, loong64.REG_F17, -1, "F17"},
42444 {48, loong64.REG_F18, -1, "F18"},
42445 {49, loong64.REG_F19, -1, "F19"},
42446 {50, loong64.REG_F20, -1, "F20"},
42447 {51, loong64.REG_F21, -1, "F21"},
42448 {52, loong64.REG_F22, -1, "F22"},
42449 {53, loong64.REG_F23, -1, "F23"},
42450 {54, loong64.REG_F24, -1, "F24"},
42451 {55, loong64.REG_F25, -1, "F25"},
42452 {56, loong64.REG_F26, -1, "F26"},
42453 {57, loong64.REG_F27, -1, "F27"},
42454 {58, loong64.REG_F28, -1, "F28"},
42455 {59, loong64.REG_F29, -1, "F29"},
42456 {60, loong64.REG_F30, -1, "F30"},
42457 {61, loong64.REG_F31, -1, "F31"},
42458 {62, 0, -1, "SB"},
42459 }
42460 var paramIntRegLOONG64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18}
42461 var paramFloatRegLOONG64 = []int8{30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45}
42462 var gpRegMaskLOONG64 = regMask(1071644664)
42463 var fpRegMaskLOONG64 = regMask(4611686017353646080)
42464 var specialRegMaskLOONG64 = regMask(0)
42465 var framepointerRegLOONG64 = int8(-1)
42466 var linkRegLOONG64 = int8(1)
42467 var registersMIPS = [...]Register{
42468 {0, mips.REG_R0, -1, "R0"},
42469 {1, mips.REG_R1, 0, "R1"},
42470 {2, mips.REG_R2, 1, "R2"},
42471 {3, mips.REG_R3, 2, "R3"},
42472 {4, mips.REG_R4, 3, "R4"},
42473 {5, mips.REG_R5, 4, "R5"},
42474 {6, mips.REG_R6, 5, "R6"},
42475 {7, mips.REG_R7, 6, "R7"},
42476 {8, mips.REG_R8, 7, "R8"},
42477 {9, mips.REG_R9, 8, "R9"},
42478 {10, mips.REG_R10, 9, "R10"},
42479 {11, mips.REG_R11, 10, "R11"},
42480 {12, mips.REG_R12, 11, "R12"},
42481 {13, mips.REG_R13, 12, "R13"},
42482 {14, mips.REG_R14, 13, "R14"},
42483 {15, mips.REG_R15, 14, "R15"},
42484 {16, mips.REG_R16, 15, "R16"},
42485 {17, mips.REG_R17, 16, "R17"},
42486 {18, mips.REG_R18, 17, "R18"},
42487 {19, mips.REG_R19, 18, "R19"},
42488 {20, mips.REG_R20, 19, "R20"},
42489 {21, mips.REG_R21, 20, "R21"},
42490 {22, mips.REG_R22, 21, "R22"},
42491 {23, mips.REG_R24, 22, "R24"},
42492 {24, mips.REG_R25, 23, "R25"},
42493 {25, mips.REG_R28, 24, "R28"},
42494 {26, mips.REGSP, -1, "SP"},
42495 {27, mips.REGG, -1, "g"},
42496 {28, mips.REG_R31, 25, "R31"},
42497 {29, mips.REG_F0, -1, "F0"},
42498 {30, mips.REG_F2, -1, "F2"},
42499 {31, mips.REG_F4, -1, "F4"},
42500 {32, mips.REG_F6, -1, "F6"},
42501 {33, mips.REG_F8, -1, "F8"},
42502 {34, mips.REG_F10, -1, "F10"},
42503 {35, mips.REG_F12, -1, "F12"},
42504 {36, mips.REG_F14, -1, "F14"},
42505 {37, mips.REG_F16, -1, "F16"},
42506 {38, mips.REG_F18, -1, "F18"},
42507 {39, mips.REG_F20, -1, "F20"},
42508 {40, mips.REG_F22, -1, "F22"},
42509 {41, mips.REG_F24, -1, "F24"},
42510 {42, mips.REG_F26, -1, "F26"},
42511 {43, mips.REG_F28, -1, "F28"},
42512 {44, mips.REG_F30, -1, "F30"},
42513 {45, mips.REG_HI, -1, "HI"},
42514 {46, mips.REG_LO, -1, "LO"},
42515 {47, 0, -1, "SB"},
42516 }
42517 var paramIntRegMIPS = []int8(nil)
42518 var paramFloatRegMIPS = []int8(nil)
42519 var gpRegMaskMIPS = regMask(335544318)
42520 var fpRegMaskMIPS = regMask(35183835217920)
42521 var specialRegMaskMIPS = regMask(105553116266496)
42522 var framepointerRegMIPS = int8(-1)
42523 var linkRegMIPS = int8(28)
42524 var registersMIPS64 = [...]Register{
42525 {0, mips.REG_R0, -1, "R0"},
42526 {1, mips.REG_R1, 0, "R1"},
42527 {2, mips.REG_R2, 1, "R2"},
42528 {3, mips.REG_R3, 2, "R3"},
42529 {4, mips.REG_R4, 3, "R4"},
42530 {5, mips.REG_R5, 4, "R5"},
42531 {6, mips.REG_R6, 5, "R6"},
42532 {7, mips.REG_R7, 6, "R7"},
42533 {8, mips.REG_R8, 7, "R8"},
42534 {9, mips.REG_R9, 8, "R9"},
42535 {10, mips.REG_R10, 9, "R10"},
42536 {11, mips.REG_R11, 10, "R11"},
42537 {12, mips.REG_R12, 11, "R12"},
42538 {13, mips.REG_R13, 12, "R13"},
42539 {14, mips.REG_R14, 13, "R14"},
42540 {15, mips.REG_R15, 14, "R15"},
42541 {16, mips.REG_R16, 15, "R16"},
42542 {17, mips.REG_R17, 16, "R17"},
42543 {18, mips.REG_R18, 17, "R18"},
42544 {19, mips.REG_R19, 18, "R19"},
42545 {20, mips.REG_R20, 19, "R20"},
42546 {21, mips.REG_R21, 20, "R21"},
42547 {22, mips.REG_R22, 21, "R22"},
42548 {23, mips.REG_R24, 22, "R24"},
42549 {24, mips.REG_R25, 23, "R25"},
42550 {25, mips.REGSP, -1, "SP"},
42551 {26, mips.REGG, -1, "g"},
42552 {27, mips.REG_R31, 24, "R31"},
42553 {28, mips.REG_F0, -1, "F0"},
42554 {29, mips.REG_F1, -1, "F1"},
42555 {30, mips.REG_F2, -1, "F2"},
42556 {31, mips.REG_F3, -1, "F3"},
42557 {32, mips.REG_F4, -1, "F4"},
42558 {33, mips.REG_F5, -1, "F5"},
42559 {34, mips.REG_F6, -1, "F6"},
42560 {35, mips.REG_F7, -1, "F7"},
42561 {36, mips.REG_F8, -1, "F8"},
42562 {37, mips.REG_F9, -1, "F9"},
42563 {38, mips.REG_F10, -1, "F10"},
42564 {39, mips.REG_F11, -1, "F11"},
42565 {40, mips.REG_F12, -1, "F12"},
42566 {41, mips.REG_F13, -1, "F13"},
42567 {42, mips.REG_F14, -1, "F14"},
42568 {43, mips.REG_F15, -1, "F15"},
42569 {44, mips.REG_F16, -1, "F16"},
42570 {45, mips.REG_F17, -1, "F17"},
42571 {46, mips.REG_F18, -1, "F18"},
42572 {47, mips.REG_F19, -1, "F19"},
42573 {48, mips.REG_F20, -1, "F20"},
42574 {49, mips.REG_F21, -1, "F21"},
42575 {50, mips.REG_F22, -1, "F22"},
42576 {51, mips.REG_F23, -1, "F23"},
42577 {52, mips.REG_F24, -1, "F24"},
42578 {53, mips.REG_F25, -1, "F25"},
42579 {54, mips.REG_F26, -1, "F26"},
42580 {55, mips.REG_F27, -1, "F27"},
42581 {56, mips.REG_F28, -1, "F28"},
42582 {57, mips.REG_F29, -1, "F29"},
42583 {58, mips.REG_F30, -1, "F30"},
42584 {59, mips.REG_F31, -1, "F31"},
42585 {60, mips.REG_HI, -1, "HI"},
42586 {61, mips.REG_LO, -1, "LO"},
42587 {62, 0, -1, "SB"},
42588 }
42589 var paramIntRegMIPS64 = []int8(nil)
42590 var paramFloatRegMIPS64 = []int8(nil)
42591 var gpRegMaskMIPS64 = regMask(167772158)
42592 var fpRegMaskMIPS64 = regMask(1152921504338411520)
42593 var specialRegMaskMIPS64 = regMask(3458764513820540928)
42594 var framepointerRegMIPS64 = int8(-1)
42595 var linkRegMIPS64 = int8(27)
42596 var registersPPC64 = [...]Register{
42597 {0, ppc64.REG_R0, -1, "R0"},
42598 {1, ppc64.REGSP, -1, "SP"},
42599 {2, 0, -1, "SB"},
42600 {3, ppc64.REG_R3, 0, "R3"},
42601 {4, ppc64.REG_R4, 1, "R4"},
42602 {5, ppc64.REG_R5, 2, "R5"},
42603 {6, ppc64.REG_R6, 3, "R6"},
42604 {7, ppc64.REG_R7, 4, "R7"},
42605 {8, ppc64.REG_R8, 5, "R8"},
42606 {9, ppc64.REG_R9, 6, "R9"},
42607 {10, ppc64.REG_R10, 7, "R10"},
42608 {11, ppc64.REG_R11, 8, "R11"},
42609 {12, ppc64.REG_R12, 9, "R12"},
42610 {13, ppc64.REG_R13, -1, "R13"},
42611 {14, ppc64.REG_R14, 10, "R14"},
42612 {15, ppc64.REG_R15, 11, "R15"},
42613 {16, ppc64.REG_R16, 12, "R16"},
42614 {17, ppc64.REG_R17, 13, "R17"},
42615 {18, ppc64.REG_R18, 14, "R18"},
42616 {19, ppc64.REG_R19, 15, "R19"},
42617 {20, ppc64.REG_R20, 16, "R20"},
42618 {21, ppc64.REG_R21, 17, "R21"},
42619 {22, ppc64.REG_R22, 18, "R22"},
42620 {23, ppc64.REG_R23, 19, "R23"},
42621 {24, ppc64.REG_R24, 20, "R24"},
42622 {25, ppc64.REG_R25, 21, "R25"},
42623 {26, ppc64.REG_R26, 22, "R26"},
42624 {27, ppc64.REG_R27, 23, "R27"},
42625 {28, ppc64.REG_R28, 24, "R28"},
42626 {29, ppc64.REG_R29, 25, "R29"},
42627 {30, ppc64.REGG, -1, "g"},
42628 {31, ppc64.REG_R31, -1, "R31"},
42629 {32, ppc64.REG_F0, -1, "F0"},
42630 {33, ppc64.REG_F1, -1, "F1"},
42631 {34, ppc64.REG_F2, -1, "F2"},
42632 {35, ppc64.REG_F3, -1, "F3"},
42633 {36, ppc64.REG_F4, -1, "F4"},
42634 {37, ppc64.REG_F5, -1, "F5"},
42635 {38, ppc64.REG_F6, -1, "F6"},
42636 {39, ppc64.REG_F7, -1, "F7"},
42637 {40, ppc64.REG_F8, -1, "F8"},
42638 {41, ppc64.REG_F9, -1, "F9"},
42639 {42, ppc64.REG_F10, -1, "F10"},
42640 {43, ppc64.REG_F11, -1, "F11"},
42641 {44, ppc64.REG_F12, -1, "F12"},
42642 {45, ppc64.REG_F13, -1, "F13"},
42643 {46, ppc64.REG_F14, -1, "F14"},
42644 {47, ppc64.REG_F15, -1, "F15"},
42645 {48, ppc64.REG_F16, -1, "F16"},
42646 {49, ppc64.REG_F17, -1, "F17"},
42647 {50, ppc64.REG_F18, -1, "F18"},
42648 {51, ppc64.REG_F19, -1, "F19"},
42649 {52, ppc64.REG_F20, -1, "F20"},
42650 {53, ppc64.REG_F21, -1, "F21"},
42651 {54, ppc64.REG_F22, -1, "F22"},
42652 {55, ppc64.REG_F23, -1, "F23"},
42653 {56, ppc64.REG_F24, -1, "F24"},
42654 {57, ppc64.REG_F25, -1, "F25"},
42655 {58, ppc64.REG_F26, -1, "F26"},
42656 {59, ppc64.REG_F27, -1, "F27"},
42657 {60, ppc64.REG_F28, -1, "F28"},
42658 {61, ppc64.REG_F29, -1, "F29"},
42659 {62, ppc64.REG_F30, -1, "F30"},
42660 {63, ppc64.REG_XER, -1, "XER"},
42661 }
42662 var paramIntRegPPC64 = []int8{3, 4, 5, 6, 7, 8, 9, 10, 14, 15, 16, 17}
42663 var paramFloatRegPPC64 = []int8{33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44}
42664 var gpRegMaskPPC64 = regMask(1073733624)
42665 var fpRegMaskPPC64 = regMask(9223372032559808512)
42666 var specialRegMaskPPC64 = regMask(9223372036854775808)
42667 var framepointerRegPPC64 = int8(-1)
42668 var linkRegPPC64 = int8(-1)
42669 var registersRISCV64 = [...]Register{
42670 {0, riscv.REG_X0, -1, "X0"},
42671 {1, riscv.REGSP, -1, "SP"},
42672 {2, riscv.REG_X3, -1, "X3"},
42673 {3, riscv.REG_X4, -1, "X4"},
42674 {4, riscv.REG_X5, 0, "X5"},
42675 {5, riscv.REG_X6, 1, "X6"},
42676 {6, riscv.REG_X7, 2, "X7"},
42677 {7, riscv.REG_X8, 3, "X8"},
42678 {8, riscv.REG_X9, 4, "X9"},
42679 {9, riscv.REG_X10, 5, "X10"},
42680 {10, riscv.REG_X11, 6, "X11"},
42681 {11, riscv.REG_X12, 7, "X12"},
42682 {12, riscv.REG_X13, 8, "X13"},
42683 {13, riscv.REG_X14, 9, "X14"},
42684 {14, riscv.REG_X15, 10, "X15"},
42685 {15, riscv.REG_X16, 11, "X16"},
42686 {16, riscv.REG_X17, 12, "X17"},
42687 {17, riscv.REG_X18, 13, "X18"},
42688 {18, riscv.REG_X19, 14, "X19"},
42689 {19, riscv.REG_X20, 15, "X20"},
42690 {20, riscv.REG_X21, 16, "X21"},
42691 {21, riscv.REG_X22, 17, "X22"},
42692 {22, riscv.REG_X23, 18, "X23"},
42693 {23, riscv.REG_X24, 19, "X24"},
42694 {24, riscv.REG_X25, 20, "X25"},
42695 {25, riscv.REG_X26, 21, "X26"},
42696 {26, riscv.REGG, -1, "g"},
42697 {27, riscv.REG_X28, 22, "X28"},
42698 {28, riscv.REG_X29, 23, "X29"},
42699 {29, riscv.REG_X30, 24, "X30"},
42700 {30, riscv.REG_X31, -1, "X31"},
42701 {31, riscv.REG_F0, -1, "F0"},
42702 {32, riscv.REG_F1, -1, "F1"},
42703 {33, riscv.REG_F2, -1, "F2"},
42704 {34, riscv.REG_F3, -1, "F3"},
42705 {35, riscv.REG_F4, -1, "F4"},
42706 {36, riscv.REG_F5, -1, "F5"},
42707 {37, riscv.REG_F6, -1, "F6"},
42708 {38, riscv.REG_F7, -1, "F7"},
42709 {39, riscv.REG_F8, -1, "F8"},
42710 {40, riscv.REG_F9, -1, "F9"},
42711 {41, riscv.REG_F10, -1, "F10"},
42712 {42, riscv.REG_F11, -1, "F11"},
42713 {43, riscv.REG_F12, -1, "F12"},
42714 {44, riscv.REG_F13, -1, "F13"},
42715 {45, riscv.REG_F14, -1, "F14"},
42716 {46, riscv.REG_F15, -1, "F15"},
42717 {47, riscv.REG_F16, -1, "F16"},
42718 {48, riscv.REG_F17, -1, "F17"},
42719 {49, riscv.REG_F18, -1, "F18"},
42720 {50, riscv.REG_F19, -1, "F19"},
42721 {51, riscv.REG_F20, -1, "F20"},
42722 {52, riscv.REG_F21, -1, "F21"},
42723 {53, riscv.REG_F22, -1, "F22"},
42724 {54, riscv.REG_F23, -1, "F23"},
42725 {55, riscv.REG_F24, -1, "F24"},
42726 {56, riscv.REG_F25, -1, "F25"},
42727 {57, riscv.REG_F26, -1, "F26"},
42728 {58, riscv.REG_F27, -1, "F27"},
42729 {59, riscv.REG_F28, -1, "F28"},
42730 {60, riscv.REG_F29, -1, "F29"},
42731 {61, riscv.REG_F30, -1, "F30"},
42732 {62, riscv.REG_F31, -1, "F31"},
42733 {63, 0, -1, "SB"},
42734 }
42735 var paramIntRegRISCV64 = []int8{9, 10, 11, 12, 13, 14, 15, 16, 7, 8, 17, 18, 19, 20, 21, 22}
42736 var paramFloatRegRISCV64 = []int8{41, 42, 43, 44, 45, 46, 47, 48, 39, 40, 49, 50, 51, 52, 53, 54}
42737 var gpRegMaskRISCV64 = regMask(1006632944)
42738 var fpRegMaskRISCV64 = regMask(9223372034707292160)
42739 var specialRegMaskRISCV64 = regMask(0)
42740 var framepointerRegRISCV64 = int8(-1)
42741 var linkRegRISCV64 = int8(0)
42742 var registersS390X = [...]Register{
42743 {0, s390x.REG_R0, 0, "R0"},
42744 {1, s390x.REG_R1, 1, "R1"},
42745 {2, s390x.REG_R2, 2, "R2"},
42746 {3, s390x.REG_R3, 3, "R3"},
42747 {4, s390x.REG_R4, 4, "R4"},
42748 {5, s390x.REG_R5, 5, "R5"},
42749 {6, s390x.REG_R6, 6, "R6"},
42750 {7, s390x.REG_R7, 7, "R7"},
42751 {8, s390x.REG_R8, 8, "R8"},
42752 {9, s390x.REG_R9, 9, "R9"},
42753 {10, s390x.REG_R10, -1, "R10"},
42754 {11, s390x.REG_R11, 10, "R11"},
42755 {12, s390x.REG_R12, 11, "R12"},
42756 {13, s390x.REGG, -1, "g"},
42757 {14, s390x.REG_R14, 12, "R14"},
42758 {15, s390x.REGSP, -1, "SP"},
42759 {16, s390x.REG_F0, -1, "F0"},
42760 {17, s390x.REG_F1, -1, "F1"},
42761 {18, s390x.REG_F2, -1, "F2"},
42762 {19, s390x.REG_F3, -1, "F3"},
42763 {20, s390x.REG_F4, -1, "F4"},
42764 {21, s390x.REG_F5, -1, "F5"},
42765 {22, s390x.REG_F6, -1, "F6"},
42766 {23, s390x.REG_F7, -1, "F7"},
42767 {24, s390x.REG_F8, -1, "F8"},
42768 {25, s390x.REG_F9, -1, "F9"},
42769 {26, s390x.REG_F10, -1, "F10"},
42770 {27, s390x.REG_F11, -1, "F11"},
42771 {28, s390x.REG_F12, -1, "F12"},
42772 {29, s390x.REG_F13, -1, "F13"},
42773 {30, s390x.REG_F14, -1, "F14"},
42774 {31, s390x.REG_F15, -1, "F15"},
42775 {32, 0, -1, "SB"},
42776 }
42777 var paramIntRegS390X = []int8(nil)
42778 var paramFloatRegS390X = []int8(nil)
42779 var gpRegMaskS390X = regMask(23551)
42780 var fpRegMaskS390X = regMask(4294901760)
42781 var specialRegMaskS390X = regMask(0)
42782 var framepointerRegS390X = int8(-1)
42783 var linkRegS390X = int8(14)
42784 var registersWasm = [...]Register{
42785 {0, wasm.REG_R0, 0, "R0"},
42786 {1, wasm.REG_R1, 1, "R1"},
42787 {2, wasm.REG_R2, 2, "R2"},
42788 {3, wasm.REG_R3, 3, "R3"},
42789 {4, wasm.REG_R4, 4, "R4"},
42790 {5, wasm.REG_R5, 5, "R5"},
42791 {6, wasm.REG_R6, 6, "R6"},
42792 {7, wasm.REG_R7, 7, "R7"},
42793 {8, wasm.REG_R8, 8, "R8"},
42794 {9, wasm.REG_R9, 9, "R9"},
42795 {10, wasm.REG_R10, 10, "R10"},
42796 {11, wasm.REG_R11, 11, "R11"},
42797 {12, wasm.REG_R12, 12, "R12"},
42798 {13, wasm.REG_R13, 13, "R13"},
42799 {14, wasm.REG_R14, 14, "R14"},
42800 {15, wasm.REG_R15, 15, "R15"},
42801 {16, wasm.REG_F0, -1, "F0"},
42802 {17, wasm.REG_F1, -1, "F1"},
42803 {18, wasm.REG_F2, -1, "F2"},
42804 {19, wasm.REG_F3, -1, "F3"},
42805 {20, wasm.REG_F4, -1, "F4"},
42806 {21, wasm.REG_F5, -1, "F5"},
42807 {22, wasm.REG_F6, -1, "F6"},
42808 {23, wasm.REG_F7, -1, "F7"},
42809 {24, wasm.REG_F8, -1, "F8"},
42810 {25, wasm.REG_F9, -1, "F9"},
42811 {26, wasm.REG_F10, -1, "F10"},
42812 {27, wasm.REG_F11, -1, "F11"},
42813 {28, wasm.REG_F12, -1, "F12"},
42814 {29, wasm.REG_F13, -1, "F13"},
42815 {30, wasm.REG_F14, -1, "F14"},
42816 {31, wasm.REG_F15, -1, "F15"},
42817 {32, wasm.REG_F16, -1, "F16"},
42818 {33, wasm.REG_F17, -1, "F17"},
42819 {34, wasm.REG_F18, -1, "F18"},
42820 {35, wasm.REG_F19, -1, "F19"},
42821 {36, wasm.REG_F20, -1, "F20"},
42822 {37, wasm.REG_F21, -1, "F21"},
42823 {38, wasm.REG_F22, -1, "F22"},
42824 {39, wasm.REG_F23, -1, "F23"},
42825 {40, wasm.REG_F24, -1, "F24"},
42826 {41, wasm.REG_F25, -1, "F25"},
42827 {42, wasm.REG_F26, -1, "F26"},
42828 {43, wasm.REG_F27, -1, "F27"},
42829 {44, wasm.REG_F28, -1, "F28"},
42830 {45, wasm.REG_F29, -1, "F29"},
42831 {46, wasm.REG_F30, -1, "F30"},
42832 {47, wasm.REG_F31, -1, "F31"},
42833 {48, wasm.REGSP, -1, "SP"},
42834 {49, wasm.REGG, -1, "g"},
42835 {50, 0, -1, "SB"},
42836 }
42837 var paramIntRegWasm = []int8(nil)
42838 var paramFloatRegWasm = []int8(nil)
42839 var gpRegMaskWasm = regMask(65535)
42840 var fpRegMaskWasm = regMask(281474976645120)
42841 var fp32RegMaskWasm = regMask(4294901760)
42842 var fp64RegMaskWasm = regMask(281470681743360)
42843 var specialRegMaskWasm = regMask(0)
42844 var framepointerRegWasm = int8(-1)
42845 var linkRegWasm = int8(-1)
42846
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