Source file src/cmd/compile/internal/ssa/rewriteMIPS.go

     1  // Code generated from _gen/MIPS.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package ssa
     4  
     5  import "cmd/compile/internal/types"
     6  
     7  func rewriteValueMIPS(v *Value) bool {
     8  	switch v.Op {
     9  	case OpAbs:
    10  		v.Op = OpMIPSABSD
    11  		return true
    12  	case OpAdd16:
    13  		v.Op = OpMIPSADD
    14  		return true
    15  	case OpAdd32:
    16  		v.Op = OpMIPSADD
    17  		return true
    18  	case OpAdd32F:
    19  		v.Op = OpMIPSADDF
    20  		return true
    21  	case OpAdd32withcarry:
    22  		return rewriteValueMIPS_OpAdd32withcarry(v)
    23  	case OpAdd64F:
    24  		v.Op = OpMIPSADDD
    25  		return true
    26  	case OpAdd8:
    27  		v.Op = OpMIPSADD
    28  		return true
    29  	case OpAddPtr:
    30  		v.Op = OpMIPSADD
    31  		return true
    32  	case OpAddr:
    33  		return rewriteValueMIPS_OpAddr(v)
    34  	case OpAnd16:
    35  		v.Op = OpMIPSAND
    36  		return true
    37  	case OpAnd32:
    38  		v.Op = OpMIPSAND
    39  		return true
    40  	case OpAnd8:
    41  		v.Op = OpMIPSAND
    42  		return true
    43  	case OpAndB:
    44  		v.Op = OpMIPSAND
    45  		return true
    46  	case OpAtomicAdd32:
    47  		v.Op = OpMIPSLoweredAtomicAdd
    48  		return true
    49  	case OpAtomicAnd32:
    50  		v.Op = OpMIPSLoweredAtomicAnd
    51  		return true
    52  	case OpAtomicAnd8:
    53  		return rewriteValueMIPS_OpAtomicAnd8(v)
    54  	case OpAtomicCompareAndSwap32:
    55  		v.Op = OpMIPSLoweredAtomicCas
    56  		return true
    57  	case OpAtomicExchange32:
    58  		v.Op = OpMIPSLoweredAtomicExchange
    59  		return true
    60  	case OpAtomicLoad32:
    61  		v.Op = OpMIPSLoweredAtomicLoad32
    62  		return true
    63  	case OpAtomicLoad8:
    64  		v.Op = OpMIPSLoweredAtomicLoad8
    65  		return true
    66  	case OpAtomicLoadPtr:
    67  		v.Op = OpMIPSLoweredAtomicLoad32
    68  		return true
    69  	case OpAtomicOr32:
    70  		v.Op = OpMIPSLoweredAtomicOr
    71  		return true
    72  	case OpAtomicOr8:
    73  		return rewriteValueMIPS_OpAtomicOr8(v)
    74  	case OpAtomicStore32:
    75  		v.Op = OpMIPSLoweredAtomicStore32
    76  		return true
    77  	case OpAtomicStore8:
    78  		v.Op = OpMIPSLoweredAtomicStore8
    79  		return true
    80  	case OpAtomicStorePtrNoWB:
    81  		v.Op = OpMIPSLoweredAtomicStore32
    82  		return true
    83  	case OpAvg32u:
    84  		return rewriteValueMIPS_OpAvg32u(v)
    85  	case OpBitLen16:
    86  		return rewriteValueMIPS_OpBitLen16(v)
    87  	case OpBitLen32:
    88  		return rewriteValueMIPS_OpBitLen32(v)
    89  	case OpBitLen8:
    90  		return rewriteValueMIPS_OpBitLen8(v)
    91  	case OpClosureCall:
    92  		v.Op = OpMIPSCALLclosure
    93  		return true
    94  	case OpCom16:
    95  		return rewriteValueMIPS_OpCom16(v)
    96  	case OpCom32:
    97  		return rewriteValueMIPS_OpCom32(v)
    98  	case OpCom8:
    99  		return rewriteValueMIPS_OpCom8(v)
   100  	case OpConst16:
   101  		return rewriteValueMIPS_OpConst16(v)
   102  	case OpConst32:
   103  		return rewriteValueMIPS_OpConst32(v)
   104  	case OpConst32F:
   105  		v.Op = OpMIPSMOVFconst
   106  		return true
   107  	case OpConst64F:
   108  		v.Op = OpMIPSMOVDconst
   109  		return true
   110  	case OpConst8:
   111  		return rewriteValueMIPS_OpConst8(v)
   112  	case OpConstBool:
   113  		return rewriteValueMIPS_OpConstBool(v)
   114  	case OpConstNil:
   115  		return rewriteValueMIPS_OpConstNil(v)
   116  	case OpCtz16:
   117  		return rewriteValueMIPS_OpCtz16(v)
   118  	case OpCtz16NonZero:
   119  		v.Op = OpCtz32
   120  		return true
   121  	case OpCtz32:
   122  		return rewriteValueMIPS_OpCtz32(v)
   123  	case OpCtz32NonZero:
   124  		v.Op = OpCtz32
   125  		return true
   126  	case OpCtz8:
   127  		return rewriteValueMIPS_OpCtz8(v)
   128  	case OpCtz8NonZero:
   129  		v.Op = OpCtz32
   130  		return true
   131  	case OpCvt32Fto32:
   132  		v.Op = OpMIPSTRUNCFW
   133  		return true
   134  	case OpCvt32Fto64F:
   135  		v.Op = OpMIPSMOVFD
   136  		return true
   137  	case OpCvt32to32F:
   138  		v.Op = OpMIPSMOVWF
   139  		return true
   140  	case OpCvt32to64F:
   141  		v.Op = OpMIPSMOVWD
   142  		return true
   143  	case OpCvt64Fto32:
   144  		v.Op = OpMIPSTRUNCDW
   145  		return true
   146  	case OpCvt64Fto32F:
   147  		v.Op = OpMIPSMOVDF
   148  		return true
   149  	case OpCvtBoolToUint8:
   150  		v.Op = OpCopy
   151  		return true
   152  	case OpDiv16:
   153  		return rewriteValueMIPS_OpDiv16(v)
   154  	case OpDiv16u:
   155  		return rewriteValueMIPS_OpDiv16u(v)
   156  	case OpDiv32:
   157  		return rewriteValueMIPS_OpDiv32(v)
   158  	case OpDiv32F:
   159  		v.Op = OpMIPSDIVF
   160  		return true
   161  	case OpDiv32u:
   162  		return rewriteValueMIPS_OpDiv32u(v)
   163  	case OpDiv64F:
   164  		v.Op = OpMIPSDIVD
   165  		return true
   166  	case OpDiv8:
   167  		return rewriteValueMIPS_OpDiv8(v)
   168  	case OpDiv8u:
   169  		return rewriteValueMIPS_OpDiv8u(v)
   170  	case OpEq16:
   171  		return rewriteValueMIPS_OpEq16(v)
   172  	case OpEq32:
   173  		return rewriteValueMIPS_OpEq32(v)
   174  	case OpEq32F:
   175  		return rewriteValueMIPS_OpEq32F(v)
   176  	case OpEq64F:
   177  		return rewriteValueMIPS_OpEq64F(v)
   178  	case OpEq8:
   179  		return rewriteValueMIPS_OpEq8(v)
   180  	case OpEqB:
   181  		return rewriteValueMIPS_OpEqB(v)
   182  	case OpEqPtr:
   183  		return rewriteValueMIPS_OpEqPtr(v)
   184  	case OpGetCallerPC:
   185  		v.Op = OpMIPSLoweredGetCallerPC
   186  		return true
   187  	case OpGetCallerSP:
   188  		v.Op = OpMIPSLoweredGetCallerSP
   189  		return true
   190  	case OpGetClosurePtr:
   191  		v.Op = OpMIPSLoweredGetClosurePtr
   192  		return true
   193  	case OpHmul32:
   194  		return rewriteValueMIPS_OpHmul32(v)
   195  	case OpHmul32u:
   196  		return rewriteValueMIPS_OpHmul32u(v)
   197  	case OpInterCall:
   198  		v.Op = OpMIPSCALLinter
   199  		return true
   200  	case OpIsInBounds:
   201  		return rewriteValueMIPS_OpIsInBounds(v)
   202  	case OpIsNonNil:
   203  		return rewriteValueMIPS_OpIsNonNil(v)
   204  	case OpIsSliceInBounds:
   205  		return rewriteValueMIPS_OpIsSliceInBounds(v)
   206  	case OpLeq16:
   207  		return rewriteValueMIPS_OpLeq16(v)
   208  	case OpLeq16U:
   209  		return rewriteValueMIPS_OpLeq16U(v)
   210  	case OpLeq32:
   211  		return rewriteValueMIPS_OpLeq32(v)
   212  	case OpLeq32F:
   213  		return rewriteValueMIPS_OpLeq32F(v)
   214  	case OpLeq32U:
   215  		return rewriteValueMIPS_OpLeq32U(v)
   216  	case OpLeq64F:
   217  		return rewriteValueMIPS_OpLeq64F(v)
   218  	case OpLeq8:
   219  		return rewriteValueMIPS_OpLeq8(v)
   220  	case OpLeq8U:
   221  		return rewriteValueMIPS_OpLeq8U(v)
   222  	case OpLess16:
   223  		return rewriteValueMIPS_OpLess16(v)
   224  	case OpLess16U:
   225  		return rewriteValueMIPS_OpLess16U(v)
   226  	case OpLess32:
   227  		return rewriteValueMIPS_OpLess32(v)
   228  	case OpLess32F:
   229  		return rewriteValueMIPS_OpLess32F(v)
   230  	case OpLess32U:
   231  		return rewriteValueMIPS_OpLess32U(v)
   232  	case OpLess64F:
   233  		return rewriteValueMIPS_OpLess64F(v)
   234  	case OpLess8:
   235  		return rewriteValueMIPS_OpLess8(v)
   236  	case OpLess8U:
   237  		return rewriteValueMIPS_OpLess8U(v)
   238  	case OpLoad:
   239  		return rewriteValueMIPS_OpLoad(v)
   240  	case OpLocalAddr:
   241  		return rewriteValueMIPS_OpLocalAddr(v)
   242  	case OpLsh16x16:
   243  		return rewriteValueMIPS_OpLsh16x16(v)
   244  	case OpLsh16x32:
   245  		return rewriteValueMIPS_OpLsh16x32(v)
   246  	case OpLsh16x64:
   247  		return rewriteValueMIPS_OpLsh16x64(v)
   248  	case OpLsh16x8:
   249  		return rewriteValueMIPS_OpLsh16x8(v)
   250  	case OpLsh32x16:
   251  		return rewriteValueMIPS_OpLsh32x16(v)
   252  	case OpLsh32x32:
   253  		return rewriteValueMIPS_OpLsh32x32(v)
   254  	case OpLsh32x64:
   255  		return rewriteValueMIPS_OpLsh32x64(v)
   256  	case OpLsh32x8:
   257  		return rewriteValueMIPS_OpLsh32x8(v)
   258  	case OpLsh8x16:
   259  		return rewriteValueMIPS_OpLsh8x16(v)
   260  	case OpLsh8x32:
   261  		return rewriteValueMIPS_OpLsh8x32(v)
   262  	case OpLsh8x64:
   263  		return rewriteValueMIPS_OpLsh8x64(v)
   264  	case OpLsh8x8:
   265  		return rewriteValueMIPS_OpLsh8x8(v)
   266  	case OpMIPSADD:
   267  		return rewriteValueMIPS_OpMIPSADD(v)
   268  	case OpMIPSADDconst:
   269  		return rewriteValueMIPS_OpMIPSADDconst(v)
   270  	case OpMIPSAND:
   271  		return rewriteValueMIPS_OpMIPSAND(v)
   272  	case OpMIPSANDconst:
   273  		return rewriteValueMIPS_OpMIPSANDconst(v)
   274  	case OpMIPSCMOVZ:
   275  		return rewriteValueMIPS_OpMIPSCMOVZ(v)
   276  	case OpMIPSCMOVZzero:
   277  		return rewriteValueMIPS_OpMIPSCMOVZzero(v)
   278  	case OpMIPSLoweredAtomicAdd:
   279  		return rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v)
   280  	case OpMIPSLoweredAtomicStore32:
   281  		return rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v)
   282  	case OpMIPSMOVBUload:
   283  		return rewriteValueMIPS_OpMIPSMOVBUload(v)
   284  	case OpMIPSMOVBUreg:
   285  		return rewriteValueMIPS_OpMIPSMOVBUreg(v)
   286  	case OpMIPSMOVBload:
   287  		return rewriteValueMIPS_OpMIPSMOVBload(v)
   288  	case OpMIPSMOVBreg:
   289  		return rewriteValueMIPS_OpMIPSMOVBreg(v)
   290  	case OpMIPSMOVBstore:
   291  		return rewriteValueMIPS_OpMIPSMOVBstore(v)
   292  	case OpMIPSMOVBstorezero:
   293  		return rewriteValueMIPS_OpMIPSMOVBstorezero(v)
   294  	case OpMIPSMOVDload:
   295  		return rewriteValueMIPS_OpMIPSMOVDload(v)
   296  	case OpMIPSMOVDstore:
   297  		return rewriteValueMIPS_OpMIPSMOVDstore(v)
   298  	case OpMIPSMOVFload:
   299  		return rewriteValueMIPS_OpMIPSMOVFload(v)
   300  	case OpMIPSMOVFstore:
   301  		return rewriteValueMIPS_OpMIPSMOVFstore(v)
   302  	case OpMIPSMOVHUload:
   303  		return rewriteValueMIPS_OpMIPSMOVHUload(v)
   304  	case OpMIPSMOVHUreg:
   305  		return rewriteValueMIPS_OpMIPSMOVHUreg(v)
   306  	case OpMIPSMOVHload:
   307  		return rewriteValueMIPS_OpMIPSMOVHload(v)
   308  	case OpMIPSMOVHreg:
   309  		return rewriteValueMIPS_OpMIPSMOVHreg(v)
   310  	case OpMIPSMOVHstore:
   311  		return rewriteValueMIPS_OpMIPSMOVHstore(v)
   312  	case OpMIPSMOVHstorezero:
   313  		return rewriteValueMIPS_OpMIPSMOVHstorezero(v)
   314  	case OpMIPSMOVWload:
   315  		return rewriteValueMIPS_OpMIPSMOVWload(v)
   316  	case OpMIPSMOVWnop:
   317  		return rewriteValueMIPS_OpMIPSMOVWnop(v)
   318  	case OpMIPSMOVWreg:
   319  		return rewriteValueMIPS_OpMIPSMOVWreg(v)
   320  	case OpMIPSMOVWstore:
   321  		return rewriteValueMIPS_OpMIPSMOVWstore(v)
   322  	case OpMIPSMOVWstorezero:
   323  		return rewriteValueMIPS_OpMIPSMOVWstorezero(v)
   324  	case OpMIPSMUL:
   325  		return rewriteValueMIPS_OpMIPSMUL(v)
   326  	case OpMIPSNEG:
   327  		return rewriteValueMIPS_OpMIPSNEG(v)
   328  	case OpMIPSNOR:
   329  		return rewriteValueMIPS_OpMIPSNOR(v)
   330  	case OpMIPSNORconst:
   331  		return rewriteValueMIPS_OpMIPSNORconst(v)
   332  	case OpMIPSOR:
   333  		return rewriteValueMIPS_OpMIPSOR(v)
   334  	case OpMIPSORconst:
   335  		return rewriteValueMIPS_OpMIPSORconst(v)
   336  	case OpMIPSSGT:
   337  		return rewriteValueMIPS_OpMIPSSGT(v)
   338  	case OpMIPSSGTU:
   339  		return rewriteValueMIPS_OpMIPSSGTU(v)
   340  	case OpMIPSSGTUconst:
   341  		return rewriteValueMIPS_OpMIPSSGTUconst(v)
   342  	case OpMIPSSGTUzero:
   343  		return rewriteValueMIPS_OpMIPSSGTUzero(v)
   344  	case OpMIPSSGTconst:
   345  		return rewriteValueMIPS_OpMIPSSGTconst(v)
   346  	case OpMIPSSGTzero:
   347  		return rewriteValueMIPS_OpMIPSSGTzero(v)
   348  	case OpMIPSSLL:
   349  		return rewriteValueMIPS_OpMIPSSLL(v)
   350  	case OpMIPSSLLconst:
   351  		return rewriteValueMIPS_OpMIPSSLLconst(v)
   352  	case OpMIPSSRA:
   353  		return rewriteValueMIPS_OpMIPSSRA(v)
   354  	case OpMIPSSRAconst:
   355  		return rewriteValueMIPS_OpMIPSSRAconst(v)
   356  	case OpMIPSSRL:
   357  		return rewriteValueMIPS_OpMIPSSRL(v)
   358  	case OpMIPSSRLconst:
   359  		return rewriteValueMIPS_OpMIPSSRLconst(v)
   360  	case OpMIPSSUB:
   361  		return rewriteValueMIPS_OpMIPSSUB(v)
   362  	case OpMIPSSUBconst:
   363  		return rewriteValueMIPS_OpMIPSSUBconst(v)
   364  	case OpMIPSXOR:
   365  		return rewriteValueMIPS_OpMIPSXOR(v)
   366  	case OpMIPSXORconst:
   367  		return rewriteValueMIPS_OpMIPSXORconst(v)
   368  	case OpMod16:
   369  		return rewriteValueMIPS_OpMod16(v)
   370  	case OpMod16u:
   371  		return rewriteValueMIPS_OpMod16u(v)
   372  	case OpMod32:
   373  		return rewriteValueMIPS_OpMod32(v)
   374  	case OpMod32u:
   375  		return rewriteValueMIPS_OpMod32u(v)
   376  	case OpMod8:
   377  		return rewriteValueMIPS_OpMod8(v)
   378  	case OpMod8u:
   379  		return rewriteValueMIPS_OpMod8u(v)
   380  	case OpMove:
   381  		return rewriteValueMIPS_OpMove(v)
   382  	case OpMul16:
   383  		v.Op = OpMIPSMUL
   384  		return true
   385  	case OpMul32:
   386  		v.Op = OpMIPSMUL
   387  		return true
   388  	case OpMul32F:
   389  		v.Op = OpMIPSMULF
   390  		return true
   391  	case OpMul32uhilo:
   392  		v.Op = OpMIPSMULTU
   393  		return true
   394  	case OpMul64F:
   395  		v.Op = OpMIPSMULD
   396  		return true
   397  	case OpMul8:
   398  		v.Op = OpMIPSMUL
   399  		return true
   400  	case OpNeg16:
   401  		v.Op = OpMIPSNEG
   402  		return true
   403  	case OpNeg32:
   404  		v.Op = OpMIPSNEG
   405  		return true
   406  	case OpNeg32F:
   407  		v.Op = OpMIPSNEGF
   408  		return true
   409  	case OpNeg64F:
   410  		v.Op = OpMIPSNEGD
   411  		return true
   412  	case OpNeg8:
   413  		v.Op = OpMIPSNEG
   414  		return true
   415  	case OpNeq16:
   416  		return rewriteValueMIPS_OpNeq16(v)
   417  	case OpNeq32:
   418  		return rewriteValueMIPS_OpNeq32(v)
   419  	case OpNeq32F:
   420  		return rewriteValueMIPS_OpNeq32F(v)
   421  	case OpNeq64F:
   422  		return rewriteValueMIPS_OpNeq64F(v)
   423  	case OpNeq8:
   424  		return rewriteValueMIPS_OpNeq8(v)
   425  	case OpNeqB:
   426  		v.Op = OpMIPSXOR
   427  		return true
   428  	case OpNeqPtr:
   429  		return rewriteValueMIPS_OpNeqPtr(v)
   430  	case OpNilCheck:
   431  		v.Op = OpMIPSLoweredNilCheck
   432  		return true
   433  	case OpNot:
   434  		return rewriteValueMIPS_OpNot(v)
   435  	case OpOffPtr:
   436  		return rewriteValueMIPS_OpOffPtr(v)
   437  	case OpOr16:
   438  		v.Op = OpMIPSOR
   439  		return true
   440  	case OpOr32:
   441  		v.Op = OpMIPSOR
   442  		return true
   443  	case OpOr8:
   444  		v.Op = OpMIPSOR
   445  		return true
   446  	case OpOrB:
   447  		v.Op = OpMIPSOR
   448  		return true
   449  	case OpPanicBounds:
   450  		return rewriteValueMIPS_OpPanicBounds(v)
   451  	case OpPanicExtend:
   452  		return rewriteValueMIPS_OpPanicExtend(v)
   453  	case OpPubBarrier:
   454  		v.Op = OpMIPSLoweredPubBarrier
   455  		return true
   456  	case OpRotateLeft16:
   457  		return rewriteValueMIPS_OpRotateLeft16(v)
   458  	case OpRotateLeft32:
   459  		return rewriteValueMIPS_OpRotateLeft32(v)
   460  	case OpRotateLeft64:
   461  		return rewriteValueMIPS_OpRotateLeft64(v)
   462  	case OpRotateLeft8:
   463  		return rewriteValueMIPS_OpRotateLeft8(v)
   464  	case OpRound32F:
   465  		v.Op = OpCopy
   466  		return true
   467  	case OpRound64F:
   468  		v.Op = OpCopy
   469  		return true
   470  	case OpRsh16Ux16:
   471  		return rewriteValueMIPS_OpRsh16Ux16(v)
   472  	case OpRsh16Ux32:
   473  		return rewriteValueMIPS_OpRsh16Ux32(v)
   474  	case OpRsh16Ux64:
   475  		return rewriteValueMIPS_OpRsh16Ux64(v)
   476  	case OpRsh16Ux8:
   477  		return rewriteValueMIPS_OpRsh16Ux8(v)
   478  	case OpRsh16x16:
   479  		return rewriteValueMIPS_OpRsh16x16(v)
   480  	case OpRsh16x32:
   481  		return rewriteValueMIPS_OpRsh16x32(v)
   482  	case OpRsh16x64:
   483  		return rewriteValueMIPS_OpRsh16x64(v)
   484  	case OpRsh16x8:
   485  		return rewriteValueMIPS_OpRsh16x8(v)
   486  	case OpRsh32Ux16:
   487  		return rewriteValueMIPS_OpRsh32Ux16(v)
   488  	case OpRsh32Ux32:
   489  		return rewriteValueMIPS_OpRsh32Ux32(v)
   490  	case OpRsh32Ux64:
   491  		return rewriteValueMIPS_OpRsh32Ux64(v)
   492  	case OpRsh32Ux8:
   493  		return rewriteValueMIPS_OpRsh32Ux8(v)
   494  	case OpRsh32x16:
   495  		return rewriteValueMIPS_OpRsh32x16(v)
   496  	case OpRsh32x32:
   497  		return rewriteValueMIPS_OpRsh32x32(v)
   498  	case OpRsh32x64:
   499  		return rewriteValueMIPS_OpRsh32x64(v)
   500  	case OpRsh32x8:
   501  		return rewriteValueMIPS_OpRsh32x8(v)
   502  	case OpRsh8Ux16:
   503  		return rewriteValueMIPS_OpRsh8Ux16(v)
   504  	case OpRsh8Ux32:
   505  		return rewriteValueMIPS_OpRsh8Ux32(v)
   506  	case OpRsh8Ux64:
   507  		return rewriteValueMIPS_OpRsh8Ux64(v)
   508  	case OpRsh8Ux8:
   509  		return rewriteValueMIPS_OpRsh8Ux8(v)
   510  	case OpRsh8x16:
   511  		return rewriteValueMIPS_OpRsh8x16(v)
   512  	case OpRsh8x32:
   513  		return rewriteValueMIPS_OpRsh8x32(v)
   514  	case OpRsh8x64:
   515  		return rewriteValueMIPS_OpRsh8x64(v)
   516  	case OpRsh8x8:
   517  		return rewriteValueMIPS_OpRsh8x8(v)
   518  	case OpSelect0:
   519  		return rewriteValueMIPS_OpSelect0(v)
   520  	case OpSelect1:
   521  		return rewriteValueMIPS_OpSelect1(v)
   522  	case OpSignExt16to32:
   523  		v.Op = OpMIPSMOVHreg
   524  		return true
   525  	case OpSignExt8to16:
   526  		v.Op = OpMIPSMOVBreg
   527  		return true
   528  	case OpSignExt8to32:
   529  		v.Op = OpMIPSMOVBreg
   530  		return true
   531  	case OpSignmask:
   532  		return rewriteValueMIPS_OpSignmask(v)
   533  	case OpSlicemask:
   534  		return rewriteValueMIPS_OpSlicemask(v)
   535  	case OpSqrt:
   536  		v.Op = OpMIPSSQRTD
   537  		return true
   538  	case OpSqrt32:
   539  		v.Op = OpMIPSSQRTF
   540  		return true
   541  	case OpStaticCall:
   542  		v.Op = OpMIPSCALLstatic
   543  		return true
   544  	case OpStore:
   545  		return rewriteValueMIPS_OpStore(v)
   546  	case OpSub16:
   547  		v.Op = OpMIPSSUB
   548  		return true
   549  	case OpSub32:
   550  		v.Op = OpMIPSSUB
   551  		return true
   552  	case OpSub32F:
   553  		v.Op = OpMIPSSUBF
   554  		return true
   555  	case OpSub32withcarry:
   556  		return rewriteValueMIPS_OpSub32withcarry(v)
   557  	case OpSub64F:
   558  		v.Op = OpMIPSSUBD
   559  		return true
   560  	case OpSub8:
   561  		v.Op = OpMIPSSUB
   562  		return true
   563  	case OpSubPtr:
   564  		v.Op = OpMIPSSUB
   565  		return true
   566  	case OpTailCall:
   567  		v.Op = OpMIPSCALLtail
   568  		return true
   569  	case OpTrunc16to8:
   570  		v.Op = OpCopy
   571  		return true
   572  	case OpTrunc32to16:
   573  		v.Op = OpCopy
   574  		return true
   575  	case OpTrunc32to8:
   576  		v.Op = OpCopy
   577  		return true
   578  	case OpWB:
   579  		v.Op = OpMIPSLoweredWB
   580  		return true
   581  	case OpXor16:
   582  		v.Op = OpMIPSXOR
   583  		return true
   584  	case OpXor32:
   585  		v.Op = OpMIPSXOR
   586  		return true
   587  	case OpXor8:
   588  		v.Op = OpMIPSXOR
   589  		return true
   590  	case OpZero:
   591  		return rewriteValueMIPS_OpZero(v)
   592  	case OpZeroExt16to32:
   593  		v.Op = OpMIPSMOVHUreg
   594  		return true
   595  	case OpZeroExt8to16:
   596  		v.Op = OpMIPSMOVBUreg
   597  		return true
   598  	case OpZeroExt8to32:
   599  		v.Op = OpMIPSMOVBUreg
   600  		return true
   601  	case OpZeromask:
   602  		return rewriteValueMIPS_OpZeromask(v)
   603  	}
   604  	return false
   605  }
   606  func rewriteValueMIPS_OpAdd32withcarry(v *Value) bool {
   607  	v_2 := v.Args[2]
   608  	v_1 := v.Args[1]
   609  	v_0 := v.Args[0]
   610  	b := v.Block
   611  	// match: (Add32withcarry <t> x y c)
   612  	// result: (ADD c (ADD <t> x y))
   613  	for {
   614  		t := v.Type
   615  		x := v_0
   616  		y := v_1
   617  		c := v_2
   618  		v.reset(OpMIPSADD)
   619  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t)
   620  		v0.AddArg2(x, y)
   621  		v.AddArg2(c, v0)
   622  		return true
   623  	}
   624  }
   625  func rewriteValueMIPS_OpAddr(v *Value) bool {
   626  	v_0 := v.Args[0]
   627  	// match: (Addr {sym} base)
   628  	// result: (MOVWaddr {sym} base)
   629  	for {
   630  		sym := auxToSym(v.Aux)
   631  		base := v_0
   632  		v.reset(OpMIPSMOVWaddr)
   633  		v.Aux = symToAux(sym)
   634  		v.AddArg(base)
   635  		return true
   636  	}
   637  }
   638  func rewriteValueMIPS_OpAtomicAnd8(v *Value) bool {
   639  	v_2 := v.Args[2]
   640  	v_1 := v.Args[1]
   641  	v_0 := v.Args[0]
   642  	b := v.Block
   643  	config := b.Func.Config
   644  	typ := &b.Func.Config.Types
   645  	// match: (AtomicAnd8 ptr val mem)
   646  	// cond: !config.BigEndian
   647  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))))) mem)
   648  	for {
   649  		ptr := v_0
   650  		val := v_1
   651  		mem := v_2
   652  		if !(!config.BigEndian) {
   653  			break
   654  		}
   655  		v.reset(OpMIPSLoweredAtomicAnd)
   656  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   657  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   658  		v1.AuxInt = int32ToAuxInt(^3)
   659  		v0.AddArg2(v1, ptr)
   660  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   661  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   662  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   663  		v4.AddArg(val)
   664  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   665  		v5.AuxInt = int32ToAuxInt(3)
   666  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   667  		v6.AuxInt = int32ToAuxInt(3)
   668  		v6.AddArg(ptr)
   669  		v5.AddArg(v6)
   670  		v3.AddArg2(v4, v5)
   671  		v7 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
   672  		v7.AuxInt = int32ToAuxInt(0)
   673  		v8 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   674  		v9 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   675  		v9.AuxInt = int32ToAuxInt(0xff)
   676  		v8.AddArg2(v9, v5)
   677  		v7.AddArg(v8)
   678  		v2.AddArg2(v3, v7)
   679  		v.AddArg3(v0, v2, mem)
   680  		return true
   681  	}
   682  	// match: (AtomicAnd8 ptr val mem)
   683  	// cond: config.BigEndian
   684  	// result: (LoweredAtomicAnd (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (OR <typ.UInt32> (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) (NORconst [0] <typ.UInt32> (SLL <typ.UInt32> (MOVWconst [0xff]) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))))) mem)
   685  	for {
   686  		ptr := v_0
   687  		val := v_1
   688  		mem := v_2
   689  		if !(config.BigEndian) {
   690  			break
   691  		}
   692  		v.reset(OpMIPSLoweredAtomicAnd)
   693  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   694  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   695  		v1.AuxInt = int32ToAuxInt(^3)
   696  		v0.AddArg2(v1, ptr)
   697  		v2 := b.NewValue0(v.Pos, OpMIPSOR, typ.UInt32)
   698  		v3 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   699  		v4 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   700  		v4.AddArg(val)
   701  		v5 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   702  		v5.AuxInt = int32ToAuxInt(3)
   703  		v6 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   704  		v6.AuxInt = int32ToAuxInt(3)
   705  		v7 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   706  		v7.AuxInt = int32ToAuxInt(3)
   707  		v7.AddArg(ptr)
   708  		v6.AddArg(v7)
   709  		v5.AddArg(v6)
   710  		v3.AddArg2(v4, v5)
   711  		v8 := b.NewValue0(v.Pos, OpMIPSNORconst, typ.UInt32)
   712  		v8.AuxInt = int32ToAuxInt(0)
   713  		v9 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   714  		v10 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   715  		v10.AuxInt = int32ToAuxInt(0xff)
   716  		v9.AddArg2(v10, v5)
   717  		v8.AddArg(v9)
   718  		v2.AddArg2(v3, v8)
   719  		v.AddArg3(v0, v2, mem)
   720  		return true
   721  	}
   722  	return false
   723  }
   724  func rewriteValueMIPS_OpAtomicOr8(v *Value) bool {
   725  	v_2 := v.Args[2]
   726  	v_1 := v.Args[1]
   727  	v_0 := v.Args[0]
   728  	b := v.Block
   729  	config := b.Func.Config
   730  	typ := &b.Func.Config.Types
   731  	// match: (AtomicOr8 ptr val mem)
   732  	// cond: !config.BigEndian
   733  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] ptr))) mem)
   734  	for {
   735  		ptr := v_0
   736  		val := v_1
   737  		mem := v_2
   738  		if !(!config.BigEndian) {
   739  			break
   740  		}
   741  		v.reset(OpMIPSLoweredAtomicOr)
   742  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   743  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   744  		v1.AuxInt = int32ToAuxInt(^3)
   745  		v0.AddArg2(v1, ptr)
   746  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   747  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   748  		v3.AddArg(val)
   749  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   750  		v4.AuxInt = int32ToAuxInt(3)
   751  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   752  		v5.AuxInt = int32ToAuxInt(3)
   753  		v5.AddArg(ptr)
   754  		v4.AddArg(v5)
   755  		v2.AddArg2(v3, v4)
   756  		v.AddArg3(v0, v2, mem)
   757  		return true
   758  	}
   759  	// match: (AtomicOr8 ptr val mem)
   760  	// cond: config.BigEndian
   761  	// result: (LoweredAtomicOr (AND <typ.UInt32Ptr> (MOVWconst [^3]) ptr) (SLL <typ.UInt32> (ZeroExt8to32 val) (SLLconst <typ.UInt32> [3] (ANDconst <typ.UInt32> [3] (XORconst <typ.UInt32> [3] ptr)))) mem)
   762  	for {
   763  		ptr := v_0
   764  		val := v_1
   765  		mem := v_2
   766  		if !(config.BigEndian) {
   767  			break
   768  		}
   769  		v.reset(OpMIPSLoweredAtomicOr)
   770  		v0 := b.NewValue0(v.Pos, OpMIPSAND, typ.UInt32Ptr)
   771  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   772  		v1.AuxInt = int32ToAuxInt(^3)
   773  		v0.AddArg2(v1, ptr)
   774  		v2 := b.NewValue0(v.Pos, OpMIPSSLL, typ.UInt32)
   775  		v3 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   776  		v3.AddArg(val)
   777  		v4 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
   778  		v4.AuxInt = int32ToAuxInt(3)
   779  		v5 := b.NewValue0(v.Pos, OpMIPSANDconst, typ.UInt32)
   780  		v5.AuxInt = int32ToAuxInt(3)
   781  		v6 := b.NewValue0(v.Pos, OpMIPSXORconst, typ.UInt32)
   782  		v6.AuxInt = int32ToAuxInt(3)
   783  		v6.AddArg(ptr)
   784  		v5.AddArg(v6)
   785  		v4.AddArg(v5)
   786  		v2.AddArg2(v3, v4)
   787  		v.AddArg3(v0, v2, mem)
   788  		return true
   789  	}
   790  	return false
   791  }
   792  func rewriteValueMIPS_OpAvg32u(v *Value) bool {
   793  	v_1 := v.Args[1]
   794  	v_0 := v.Args[0]
   795  	b := v.Block
   796  	// match: (Avg32u <t> x y)
   797  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
   798  	for {
   799  		t := v.Type
   800  		x := v_0
   801  		y := v_1
   802  		v.reset(OpMIPSADD)
   803  		v0 := b.NewValue0(v.Pos, OpMIPSSRLconst, t)
   804  		v0.AuxInt = int32ToAuxInt(1)
   805  		v1 := b.NewValue0(v.Pos, OpMIPSSUB, t)
   806  		v1.AddArg2(x, y)
   807  		v0.AddArg(v1)
   808  		v.AddArg2(v0, y)
   809  		return true
   810  	}
   811  }
   812  func rewriteValueMIPS_OpBitLen16(v *Value) bool {
   813  	v_0 := v.Args[0]
   814  	b := v.Block
   815  	typ := &b.Func.Config.Types
   816  	// match: (BitLen16 x)
   817  	// result: (BitLen32 (ZeroExt16to32 x))
   818  	for {
   819  		x := v_0
   820  		v.reset(OpBitLen32)
   821  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
   822  		v0.AddArg(x)
   823  		v.AddArg(v0)
   824  		return true
   825  	}
   826  }
   827  func rewriteValueMIPS_OpBitLen32(v *Value) bool {
   828  	v_0 := v.Args[0]
   829  	b := v.Block
   830  	typ := &b.Func.Config.Types
   831  	// match: (BitLen32 <t> x)
   832  	// result: (SUB (MOVWconst [32]) (CLZ <t> x))
   833  	for {
   834  		t := v.Type
   835  		x := v_0
   836  		v.reset(OpMIPSSUB)
   837  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   838  		v0.AuxInt = int32ToAuxInt(32)
   839  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   840  		v1.AddArg(x)
   841  		v.AddArg2(v0, v1)
   842  		return true
   843  	}
   844  }
   845  func rewriteValueMIPS_OpBitLen8(v *Value) bool {
   846  	v_0 := v.Args[0]
   847  	b := v.Block
   848  	typ := &b.Func.Config.Types
   849  	// match: (BitLen8 x)
   850  	// result: (BitLen32 (ZeroExt8to32 x))
   851  	for {
   852  		x := v_0
   853  		v.reset(OpBitLen32)
   854  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
   855  		v0.AddArg(x)
   856  		v.AddArg(v0)
   857  		return true
   858  	}
   859  }
   860  func rewriteValueMIPS_OpCom16(v *Value) bool {
   861  	v_0 := v.Args[0]
   862  	// match: (Com16 x)
   863  	// result: (NORconst [0] x)
   864  	for {
   865  		x := v_0
   866  		v.reset(OpMIPSNORconst)
   867  		v.AuxInt = int32ToAuxInt(0)
   868  		v.AddArg(x)
   869  		return true
   870  	}
   871  }
   872  func rewriteValueMIPS_OpCom32(v *Value) bool {
   873  	v_0 := v.Args[0]
   874  	// match: (Com32 x)
   875  	// result: (NORconst [0] x)
   876  	for {
   877  		x := v_0
   878  		v.reset(OpMIPSNORconst)
   879  		v.AuxInt = int32ToAuxInt(0)
   880  		v.AddArg(x)
   881  		return true
   882  	}
   883  }
   884  func rewriteValueMIPS_OpCom8(v *Value) bool {
   885  	v_0 := v.Args[0]
   886  	// match: (Com8 x)
   887  	// result: (NORconst [0] x)
   888  	for {
   889  		x := v_0
   890  		v.reset(OpMIPSNORconst)
   891  		v.AuxInt = int32ToAuxInt(0)
   892  		v.AddArg(x)
   893  		return true
   894  	}
   895  }
   896  func rewriteValueMIPS_OpConst16(v *Value) bool {
   897  	// match: (Const16 [val])
   898  	// result: (MOVWconst [int32(val)])
   899  	for {
   900  		val := auxIntToInt16(v.AuxInt)
   901  		v.reset(OpMIPSMOVWconst)
   902  		v.AuxInt = int32ToAuxInt(int32(val))
   903  		return true
   904  	}
   905  }
   906  func rewriteValueMIPS_OpConst32(v *Value) bool {
   907  	// match: (Const32 [val])
   908  	// result: (MOVWconst [int32(val)])
   909  	for {
   910  		val := auxIntToInt32(v.AuxInt)
   911  		v.reset(OpMIPSMOVWconst)
   912  		v.AuxInt = int32ToAuxInt(int32(val))
   913  		return true
   914  	}
   915  }
   916  func rewriteValueMIPS_OpConst8(v *Value) bool {
   917  	// match: (Const8 [val])
   918  	// result: (MOVWconst [int32(val)])
   919  	for {
   920  		val := auxIntToInt8(v.AuxInt)
   921  		v.reset(OpMIPSMOVWconst)
   922  		v.AuxInt = int32ToAuxInt(int32(val))
   923  		return true
   924  	}
   925  }
   926  func rewriteValueMIPS_OpConstBool(v *Value) bool {
   927  	// match: (ConstBool [t])
   928  	// result: (MOVWconst [b2i32(t)])
   929  	for {
   930  		t := auxIntToBool(v.AuxInt)
   931  		v.reset(OpMIPSMOVWconst)
   932  		v.AuxInt = int32ToAuxInt(b2i32(t))
   933  		return true
   934  	}
   935  }
   936  func rewriteValueMIPS_OpConstNil(v *Value) bool {
   937  	// match: (ConstNil)
   938  	// result: (MOVWconst [0])
   939  	for {
   940  		v.reset(OpMIPSMOVWconst)
   941  		v.AuxInt = int32ToAuxInt(0)
   942  		return true
   943  	}
   944  }
   945  func rewriteValueMIPS_OpCtz16(v *Value) bool {
   946  	v_0 := v.Args[0]
   947  	b := v.Block
   948  	typ := &b.Func.Config.Types
   949  	// match: (Ctz16 x)
   950  	// result: (Ctz32 (Or32 <typ.UInt32> x (MOVWconst [1<<16])))
   951  	for {
   952  		x := v_0
   953  		v.reset(OpCtz32)
   954  		v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
   955  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   956  		v1.AuxInt = int32ToAuxInt(1 << 16)
   957  		v0.AddArg2(x, v1)
   958  		v.AddArg(v0)
   959  		return true
   960  	}
   961  }
   962  func rewriteValueMIPS_OpCtz32(v *Value) bool {
   963  	v_0 := v.Args[0]
   964  	b := v.Block
   965  	typ := &b.Func.Config.Types
   966  	// match: (Ctz32 <t> x)
   967  	// result: (SUB (MOVWconst [32]) (CLZ <t> (SUBconst <t> [1] (AND <t> x (NEG <t> x)))))
   968  	for {
   969  		t := v.Type
   970  		x := v_0
   971  		v.reset(OpMIPSSUB)
   972  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   973  		v0.AuxInt = int32ToAuxInt(32)
   974  		v1 := b.NewValue0(v.Pos, OpMIPSCLZ, t)
   975  		v2 := b.NewValue0(v.Pos, OpMIPSSUBconst, t)
   976  		v2.AuxInt = int32ToAuxInt(1)
   977  		v3 := b.NewValue0(v.Pos, OpMIPSAND, t)
   978  		v4 := b.NewValue0(v.Pos, OpMIPSNEG, t)
   979  		v4.AddArg(x)
   980  		v3.AddArg2(x, v4)
   981  		v2.AddArg(v3)
   982  		v1.AddArg(v2)
   983  		v.AddArg2(v0, v1)
   984  		return true
   985  	}
   986  }
   987  func rewriteValueMIPS_OpCtz8(v *Value) bool {
   988  	v_0 := v.Args[0]
   989  	b := v.Block
   990  	typ := &b.Func.Config.Types
   991  	// match: (Ctz8 x)
   992  	// result: (Ctz32 (Or32 <typ.UInt32> x (MOVWconst [1<<8])))
   993  	for {
   994  		x := v_0
   995  		v.reset(OpCtz32)
   996  		v0 := b.NewValue0(v.Pos, OpOr32, typ.UInt32)
   997  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
   998  		v1.AuxInt = int32ToAuxInt(1 << 8)
   999  		v0.AddArg2(x, v1)
  1000  		v.AddArg(v0)
  1001  		return true
  1002  	}
  1003  }
  1004  func rewriteValueMIPS_OpDiv16(v *Value) bool {
  1005  	v_1 := v.Args[1]
  1006  	v_0 := v.Args[0]
  1007  	b := v.Block
  1008  	typ := &b.Func.Config.Types
  1009  	// match: (Div16 x y)
  1010  	// result: (Select1 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  1011  	for {
  1012  		x := v_0
  1013  		y := v_1
  1014  		v.reset(OpSelect1)
  1015  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1016  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1017  		v1.AddArg(x)
  1018  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1019  		v2.AddArg(y)
  1020  		v0.AddArg2(v1, v2)
  1021  		v.AddArg(v0)
  1022  		return true
  1023  	}
  1024  }
  1025  func rewriteValueMIPS_OpDiv16u(v *Value) bool {
  1026  	v_1 := v.Args[1]
  1027  	v_0 := v.Args[0]
  1028  	b := v.Block
  1029  	typ := &b.Func.Config.Types
  1030  	// match: (Div16u x y)
  1031  	// result: (Select1 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1032  	for {
  1033  		x := v_0
  1034  		y := v_1
  1035  		v.reset(OpSelect1)
  1036  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1037  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1038  		v1.AddArg(x)
  1039  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1040  		v2.AddArg(y)
  1041  		v0.AddArg2(v1, v2)
  1042  		v.AddArg(v0)
  1043  		return true
  1044  	}
  1045  }
  1046  func rewriteValueMIPS_OpDiv32(v *Value) bool {
  1047  	v_1 := v.Args[1]
  1048  	v_0 := v.Args[0]
  1049  	b := v.Block
  1050  	typ := &b.Func.Config.Types
  1051  	// match: (Div32 x y)
  1052  	// result: (Select1 (DIV x y))
  1053  	for {
  1054  		x := v_0
  1055  		y := v_1
  1056  		v.reset(OpSelect1)
  1057  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1058  		v0.AddArg2(x, y)
  1059  		v.AddArg(v0)
  1060  		return true
  1061  	}
  1062  }
  1063  func rewriteValueMIPS_OpDiv32u(v *Value) bool {
  1064  	v_1 := v.Args[1]
  1065  	v_0 := v.Args[0]
  1066  	b := v.Block
  1067  	typ := &b.Func.Config.Types
  1068  	// match: (Div32u x y)
  1069  	// result: (Select1 (DIVU x y))
  1070  	for {
  1071  		x := v_0
  1072  		y := v_1
  1073  		v.reset(OpSelect1)
  1074  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1075  		v0.AddArg2(x, y)
  1076  		v.AddArg(v0)
  1077  		return true
  1078  	}
  1079  }
  1080  func rewriteValueMIPS_OpDiv8(v *Value) bool {
  1081  	v_1 := v.Args[1]
  1082  	v_0 := v.Args[0]
  1083  	b := v.Block
  1084  	typ := &b.Func.Config.Types
  1085  	// match: (Div8 x y)
  1086  	// result: (Select1 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  1087  	for {
  1088  		x := v_0
  1089  		y := v_1
  1090  		v.reset(OpSelect1)
  1091  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  1092  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1093  		v1.AddArg(x)
  1094  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1095  		v2.AddArg(y)
  1096  		v0.AddArg2(v1, v2)
  1097  		v.AddArg(v0)
  1098  		return true
  1099  	}
  1100  }
  1101  func rewriteValueMIPS_OpDiv8u(v *Value) bool {
  1102  	v_1 := v.Args[1]
  1103  	v_0 := v.Args[0]
  1104  	b := v.Block
  1105  	typ := &b.Func.Config.Types
  1106  	// match: (Div8u x y)
  1107  	// result: (Select1 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1108  	for {
  1109  		x := v_0
  1110  		y := v_1
  1111  		v.reset(OpSelect1)
  1112  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  1113  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1114  		v1.AddArg(x)
  1115  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1116  		v2.AddArg(y)
  1117  		v0.AddArg2(v1, v2)
  1118  		v.AddArg(v0)
  1119  		return true
  1120  	}
  1121  }
  1122  func rewriteValueMIPS_OpEq16(v *Value) bool {
  1123  	v_1 := v.Args[1]
  1124  	v_0 := v.Args[0]
  1125  	b := v.Block
  1126  	typ := &b.Func.Config.Types
  1127  	// match: (Eq16 x y)
  1128  	// result: (SGTUconst [1] (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1129  	for {
  1130  		x := v_0
  1131  		y := v_1
  1132  		v.reset(OpMIPSSGTUconst)
  1133  		v.AuxInt = int32ToAuxInt(1)
  1134  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1135  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1136  		v1.AddArg(x)
  1137  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1138  		v2.AddArg(y)
  1139  		v0.AddArg2(v1, v2)
  1140  		v.AddArg(v0)
  1141  		return true
  1142  	}
  1143  }
  1144  func rewriteValueMIPS_OpEq32(v *Value) bool {
  1145  	v_1 := v.Args[1]
  1146  	v_0 := v.Args[0]
  1147  	b := v.Block
  1148  	typ := &b.Func.Config.Types
  1149  	// match: (Eq32 x y)
  1150  	// result: (SGTUconst [1] (XOR x y))
  1151  	for {
  1152  		x := v_0
  1153  		y := v_1
  1154  		v.reset(OpMIPSSGTUconst)
  1155  		v.AuxInt = int32ToAuxInt(1)
  1156  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1157  		v0.AddArg2(x, y)
  1158  		v.AddArg(v0)
  1159  		return true
  1160  	}
  1161  }
  1162  func rewriteValueMIPS_OpEq32F(v *Value) bool {
  1163  	v_1 := v.Args[1]
  1164  	v_0 := v.Args[0]
  1165  	b := v.Block
  1166  	// match: (Eq32F x y)
  1167  	// result: (FPFlagTrue (CMPEQF x y))
  1168  	for {
  1169  		x := v_0
  1170  		y := v_1
  1171  		v.reset(OpMIPSFPFlagTrue)
  1172  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  1173  		v0.AddArg2(x, y)
  1174  		v.AddArg(v0)
  1175  		return true
  1176  	}
  1177  }
  1178  func rewriteValueMIPS_OpEq64F(v *Value) bool {
  1179  	v_1 := v.Args[1]
  1180  	v_0 := v.Args[0]
  1181  	b := v.Block
  1182  	// match: (Eq64F x y)
  1183  	// result: (FPFlagTrue (CMPEQD x y))
  1184  	for {
  1185  		x := v_0
  1186  		y := v_1
  1187  		v.reset(OpMIPSFPFlagTrue)
  1188  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  1189  		v0.AddArg2(x, y)
  1190  		v.AddArg(v0)
  1191  		return true
  1192  	}
  1193  }
  1194  func rewriteValueMIPS_OpEq8(v *Value) bool {
  1195  	v_1 := v.Args[1]
  1196  	v_0 := v.Args[0]
  1197  	b := v.Block
  1198  	typ := &b.Func.Config.Types
  1199  	// match: (Eq8 x y)
  1200  	// result: (SGTUconst [1] (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1201  	for {
  1202  		x := v_0
  1203  		y := v_1
  1204  		v.reset(OpMIPSSGTUconst)
  1205  		v.AuxInt = int32ToAuxInt(1)
  1206  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1207  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1208  		v1.AddArg(x)
  1209  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1210  		v2.AddArg(y)
  1211  		v0.AddArg2(v1, v2)
  1212  		v.AddArg(v0)
  1213  		return true
  1214  	}
  1215  }
  1216  func rewriteValueMIPS_OpEqB(v *Value) bool {
  1217  	v_1 := v.Args[1]
  1218  	v_0 := v.Args[0]
  1219  	b := v.Block
  1220  	typ := &b.Func.Config.Types
  1221  	// match: (EqB x y)
  1222  	// result: (XORconst [1] (XOR <typ.Bool> x y))
  1223  	for {
  1224  		x := v_0
  1225  		y := v_1
  1226  		v.reset(OpMIPSXORconst)
  1227  		v.AuxInt = int32ToAuxInt(1)
  1228  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.Bool)
  1229  		v0.AddArg2(x, y)
  1230  		v.AddArg(v0)
  1231  		return true
  1232  	}
  1233  }
  1234  func rewriteValueMIPS_OpEqPtr(v *Value) bool {
  1235  	v_1 := v.Args[1]
  1236  	v_0 := v.Args[0]
  1237  	b := v.Block
  1238  	typ := &b.Func.Config.Types
  1239  	// match: (EqPtr x y)
  1240  	// result: (SGTUconst [1] (XOR x y))
  1241  	for {
  1242  		x := v_0
  1243  		y := v_1
  1244  		v.reset(OpMIPSSGTUconst)
  1245  		v.AuxInt = int32ToAuxInt(1)
  1246  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  1247  		v0.AddArg2(x, y)
  1248  		v.AddArg(v0)
  1249  		return true
  1250  	}
  1251  }
  1252  func rewriteValueMIPS_OpHmul32(v *Value) bool {
  1253  	v_1 := v.Args[1]
  1254  	v_0 := v.Args[0]
  1255  	b := v.Block
  1256  	typ := &b.Func.Config.Types
  1257  	// match: (Hmul32 x y)
  1258  	// result: (Select0 (MULT x y))
  1259  	for {
  1260  		x := v_0
  1261  		y := v_1
  1262  		v.reset(OpSelect0)
  1263  		v0 := b.NewValue0(v.Pos, OpMIPSMULT, types.NewTuple(typ.Int32, typ.Int32))
  1264  		v0.AddArg2(x, y)
  1265  		v.AddArg(v0)
  1266  		return true
  1267  	}
  1268  }
  1269  func rewriteValueMIPS_OpHmul32u(v *Value) bool {
  1270  	v_1 := v.Args[1]
  1271  	v_0 := v.Args[0]
  1272  	b := v.Block
  1273  	typ := &b.Func.Config.Types
  1274  	// match: (Hmul32u x y)
  1275  	// result: (Select0 (MULTU x y))
  1276  	for {
  1277  		x := v_0
  1278  		y := v_1
  1279  		v.reset(OpSelect0)
  1280  		v0 := b.NewValue0(v.Pos, OpMIPSMULTU, types.NewTuple(typ.UInt32, typ.UInt32))
  1281  		v0.AddArg2(x, y)
  1282  		v.AddArg(v0)
  1283  		return true
  1284  	}
  1285  }
  1286  func rewriteValueMIPS_OpIsInBounds(v *Value) bool {
  1287  	v_1 := v.Args[1]
  1288  	v_0 := v.Args[0]
  1289  	// match: (IsInBounds idx len)
  1290  	// result: (SGTU len idx)
  1291  	for {
  1292  		idx := v_0
  1293  		len := v_1
  1294  		v.reset(OpMIPSSGTU)
  1295  		v.AddArg2(len, idx)
  1296  		return true
  1297  	}
  1298  }
  1299  func rewriteValueMIPS_OpIsNonNil(v *Value) bool {
  1300  	v_0 := v.Args[0]
  1301  	b := v.Block
  1302  	typ := &b.Func.Config.Types
  1303  	// match: (IsNonNil ptr)
  1304  	// result: (SGTU ptr (MOVWconst [0]))
  1305  	for {
  1306  		ptr := v_0
  1307  		v.reset(OpMIPSSGTU)
  1308  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1309  		v0.AuxInt = int32ToAuxInt(0)
  1310  		v.AddArg2(ptr, v0)
  1311  		return true
  1312  	}
  1313  }
  1314  func rewriteValueMIPS_OpIsSliceInBounds(v *Value) bool {
  1315  	v_1 := v.Args[1]
  1316  	v_0 := v.Args[0]
  1317  	b := v.Block
  1318  	typ := &b.Func.Config.Types
  1319  	// match: (IsSliceInBounds idx len)
  1320  	// result: (XORconst [1] (SGTU idx len))
  1321  	for {
  1322  		idx := v_0
  1323  		len := v_1
  1324  		v.reset(OpMIPSXORconst)
  1325  		v.AuxInt = int32ToAuxInt(1)
  1326  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1327  		v0.AddArg2(idx, len)
  1328  		v.AddArg(v0)
  1329  		return true
  1330  	}
  1331  }
  1332  func rewriteValueMIPS_OpLeq16(v *Value) bool {
  1333  	v_1 := v.Args[1]
  1334  	v_0 := v.Args[0]
  1335  	b := v.Block
  1336  	typ := &b.Func.Config.Types
  1337  	// match: (Leq16 x y)
  1338  	// result: (XORconst [1] (SGT (SignExt16to32 x) (SignExt16to32 y)))
  1339  	for {
  1340  		x := v_0
  1341  		y := v_1
  1342  		v.reset(OpMIPSXORconst)
  1343  		v.AuxInt = int32ToAuxInt(1)
  1344  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1345  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1346  		v1.AddArg(x)
  1347  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1348  		v2.AddArg(y)
  1349  		v0.AddArg2(v1, v2)
  1350  		v.AddArg(v0)
  1351  		return true
  1352  	}
  1353  }
  1354  func rewriteValueMIPS_OpLeq16U(v *Value) bool {
  1355  	v_1 := v.Args[1]
  1356  	v_0 := v.Args[0]
  1357  	b := v.Block
  1358  	typ := &b.Func.Config.Types
  1359  	// match: (Leq16U x y)
  1360  	// result: (XORconst [1] (SGTU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  1361  	for {
  1362  		x := v_0
  1363  		y := v_1
  1364  		v.reset(OpMIPSXORconst)
  1365  		v.AuxInt = int32ToAuxInt(1)
  1366  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1367  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1368  		v1.AddArg(x)
  1369  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1370  		v2.AddArg(y)
  1371  		v0.AddArg2(v1, v2)
  1372  		v.AddArg(v0)
  1373  		return true
  1374  	}
  1375  }
  1376  func rewriteValueMIPS_OpLeq32(v *Value) bool {
  1377  	v_1 := v.Args[1]
  1378  	v_0 := v.Args[0]
  1379  	b := v.Block
  1380  	typ := &b.Func.Config.Types
  1381  	// match: (Leq32 x y)
  1382  	// result: (XORconst [1] (SGT x y))
  1383  	for {
  1384  		x := v_0
  1385  		y := v_1
  1386  		v.reset(OpMIPSXORconst)
  1387  		v.AuxInt = int32ToAuxInt(1)
  1388  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1389  		v0.AddArg2(x, y)
  1390  		v.AddArg(v0)
  1391  		return true
  1392  	}
  1393  }
  1394  func rewriteValueMIPS_OpLeq32F(v *Value) bool {
  1395  	v_1 := v.Args[1]
  1396  	v_0 := v.Args[0]
  1397  	b := v.Block
  1398  	// match: (Leq32F x y)
  1399  	// result: (FPFlagTrue (CMPGEF y x))
  1400  	for {
  1401  		x := v_0
  1402  		y := v_1
  1403  		v.reset(OpMIPSFPFlagTrue)
  1404  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGEF, types.TypeFlags)
  1405  		v0.AddArg2(y, x)
  1406  		v.AddArg(v0)
  1407  		return true
  1408  	}
  1409  }
  1410  func rewriteValueMIPS_OpLeq32U(v *Value) bool {
  1411  	v_1 := v.Args[1]
  1412  	v_0 := v.Args[0]
  1413  	b := v.Block
  1414  	typ := &b.Func.Config.Types
  1415  	// match: (Leq32U x y)
  1416  	// result: (XORconst [1] (SGTU x y))
  1417  	for {
  1418  		x := v_0
  1419  		y := v_1
  1420  		v.reset(OpMIPSXORconst)
  1421  		v.AuxInt = int32ToAuxInt(1)
  1422  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1423  		v0.AddArg2(x, y)
  1424  		v.AddArg(v0)
  1425  		return true
  1426  	}
  1427  }
  1428  func rewriteValueMIPS_OpLeq64F(v *Value) bool {
  1429  	v_1 := v.Args[1]
  1430  	v_0 := v.Args[0]
  1431  	b := v.Block
  1432  	// match: (Leq64F x y)
  1433  	// result: (FPFlagTrue (CMPGED y x))
  1434  	for {
  1435  		x := v_0
  1436  		y := v_1
  1437  		v.reset(OpMIPSFPFlagTrue)
  1438  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGED, types.TypeFlags)
  1439  		v0.AddArg2(y, x)
  1440  		v.AddArg(v0)
  1441  		return true
  1442  	}
  1443  }
  1444  func rewriteValueMIPS_OpLeq8(v *Value) bool {
  1445  	v_1 := v.Args[1]
  1446  	v_0 := v.Args[0]
  1447  	b := v.Block
  1448  	typ := &b.Func.Config.Types
  1449  	// match: (Leq8 x y)
  1450  	// result: (XORconst [1] (SGT (SignExt8to32 x) (SignExt8to32 y)))
  1451  	for {
  1452  		x := v_0
  1453  		y := v_1
  1454  		v.reset(OpMIPSXORconst)
  1455  		v.AuxInt = int32ToAuxInt(1)
  1456  		v0 := b.NewValue0(v.Pos, OpMIPSSGT, typ.Bool)
  1457  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1458  		v1.AddArg(x)
  1459  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1460  		v2.AddArg(y)
  1461  		v0.AddArg2(v1, v2)
  1462  		v.AddArg(v0)
  1463  		return true
  1464  	}
  1465  }
  1466  func rewriteValueMIPS_OpLeq8U(v *Value) bool {
  1467  	v_1 := v.Args[1]
  1468  	v_0 := v.Args[0]
  1469  	b := v.Block
  1470  	typ := &b.Func.Config.Types
  1471  	// match: (Leq8U x y)
  1472  	// result: (XORconst [1] (SGTU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  1473  	for {
  1474  		x := v_0
  1475  		y := v_1
  1476  		v.reset(OpMIPSXORconst)
  1477  		v.AuxInt = int32ToAuxInt(1)
  1478  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  1479  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1480  		v1.AddArg(x)
  1481  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1482  		v2.AddArg(y)
  1483  		v0.AddArg2(v1, v2)
  1484  		v.AddArg(v0)
  1485  		return true
  1486  	}
  1487  }
  1488  func rewriteValueMIPS_OpLess16(v *Value) bool {
  1489  	v_1 := v.Args[1]
  1490  	v_0 := v.Args[0]
  1491  	b := v.Block
  1492  	typ := &b.Func.Config.Types
  1493  	// match: (Less16 x y)
  1494  	// result: (SGT (SignExt16to32 y) (SignExt16to32 x))
  1495  	for {
  1496  		x := v_0
  1497  		y := v_1
  1498  		v.reset(OpMIPSSGT)
  1499  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1500  		v0.AddArg(y)
  1501  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  1502  		v1.AddArg(x)
  1503  		v.AddArg2(v0, v1)
  1504  		return true
  1505  	}
  1506  }
  1507  func rewriteValueMIPS_OpLess16U(v *Value) bool {
  1508  	v_1 := v.Args[1]
  1509  	v_0 := v.Args[0]
  1510  	b := v.Block
  1511  	typ := &b.Func.Config.Types
  1512  	// match: (Less16U x y)
  1513  	// result: (SGTU (ZeroExt16to32 y) (ZeroExt16to32 x))
  1514  	for {
  1515  		x := v_0
  1516  		y := v_1
  1517  		v.reset(OpMIPSSGTU)
  1518  		v0 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1519  		v0.AddArg(y)
  1520  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1521  		v1.AddArg(x)
  1522  		v.AddArg2(v0, v1)
  1523  		return true
  1524  	}
  1525  }
  1526  func rewriteValueMIPS_OpLess32(v *Value) bool {
  1527  	v_1 := v.Args[1]
  1528  	v_0 := v.Args[0]
  1529  	// match: (Less32 x y)
  1530  	// result: (SGT y x)
  1531  	for {
  1532  		x := v_0
  1533  		y := v_1
  1534  		v.reset(OpMIPSSGT)
  1535  		v.AddArg2(y, x)
  1536  		return true
  1537  	}
  1538  }
  1539  func rewriteValueMIPS_OpLess32F(v *Value) bool {
  1540  	v_1 := v.Args[1]
  1541  	v_0 := v.Args[0]
  1542  	b := v.Block
  1543  	// match: (Less32F x y)
  1544  	// result: (FPFlagTrue (CMPGTF y x))
  1545  	for {
  1546  		x := v_0
  1547  		y := v_1
  1548  		v.reset(OpMIPSFPFlagTrue)
  1549  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTF, types.TypeFlags)
  1550  		v0.AddArg2(y, x)
  1551  		v.AddArg(v0)
  1552  		return true
  1553  	}
  1554  }
  1555  func rewriteValueMIPS_OpLess32U(v *Value) bool {
  1556  	v_1 := v.Args[1]
  1557  	v_0 := v.Args[0]
  1558  	// match: (Less32U x y)
  1559  	// result: (SGTU y x)
  1560  	for {
  1561  		x := v_0
  1562  		y := v_1
  1563  		v.reset(OpMIPSSGTU)
  1564  		v.AddArg2(y, x)
  1565  		return true
  1566  	}
  1567  }
  1568  func rewriteValueMIPS_OpLess64F(v *Value) bool {
  1569  	v_1 := v.Args[1]
  1570  	v_0 := v.Args[0]
  1571  	b := v.Block
  1572  	// match: (Less64F x y)
  1573  	// result: (FPFlagTrue (CMPGTD y x))
  1574  	for {
  1575  		x := v_0
  1576  		y := v_1
  1577  		v.reset(OpMIPSFPFlagTrue)
  1578  		v0 := b.NewValue0(v.Pos, OpMIPSCMPGTD, types.TypeFlags)
  1579  		v0.AddArg2(y, x)
  1580  		v.AddArg(v0)
  1581  		return true
  1582  	}
  1583  }
  1584  func rewriteValueMIPS_OpLess8(v *Value) bool {
  1585  	v_1 := v.Args[1]
  1586  	v_0 := v.Args[0]
  1587  	b := v.Block
  1588  	typ := &b.Func.Config.Types
  1589  	// match: (Less8 x y)
  1590  	// result: (SGT (SignExt8to32 y) (SignExt8to32 x))
  1591  	for {
  1592  		x := v_0
  1593  		y := v_1
  1594  		v.reset(OpMIPSSGT)
  1595  		v0 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1596  		v0.AddArg(y)
  1597  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  1598  		v1.AddArg(x)
  1599  		v.AddArg2(v0, v1)
  1600  		return true
  1601  	}
  1602  }
  1603  func rewriteValueMIPS_OpLess8U(v *Value) bool {
  1604  	v_1 := v.Args[1]
  1605  	v_0 := v.Args[0]
  1606  	b := v.Block
  1607  	typ := &b.Func.Config.Types
  1608  	// match: (Less8U x y)
  1609  	// result: (SGTU (ZeroExt8to32 y) (ZeroExt8to32 x))
  1610  	for {
  1611  		x := v_0
  1612  		y := v_1
  1613  		v.reset(OpMIPSSGTU)
  1614  		v0 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1615  		v0.AddArg(y)
  1616  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1617  		v1.AddArg(x)
  1618  		v.AddArg2(v0, v1)
  1619  		return true
  1620  	}
  1621  }
  1622  func rewriteValueMIPS_OpLoad(v *Value) bool {
  1623  	v_1 := v.Args[1]
  1624  	v_0 := v.Args[0]
  1625  	// match: (Load <t> ptr mem)
  1626  	// cond: t.IsBoolean()
  1627  	// result: (MOVBUload ptr mem)
  1628  	for {
  1629  		t := v.Type
  1630  		ptr := v_0
  1631  		mem := v_1
  1632  		if !(t.IsBoolean()) {
  1633  			break
  1634  		}
  1635  		v.reset(OpMIPSMOVBUload)
  1636  		v.AddArg2(ptr, mem)
  1637  		return true
  1638  	}
  1639  	// match: (Load <t> ptr mem)
  1640  	// cond: (is8BitInt(t) && t.IsSigned())
  1641  	// result: (MOVBload ptr mem)
  1642  	for {
  1643  		t := v.Type
  1644  		ptr := v_0
  1645  		mem := v_1
  1646  		if !(is8BitInt(t) && t.IsSigned()) {
  1647  			break
  1648  		}
  1649  		v.reset(OpMIPSMOVBload)
  1650  		v.AddArg2(ptr, mem)
  1651  		return true
  1652  	}
  1653  	// match: (Load <t> ptr mem)
  1654  	// cond: (is8BitInt(t) && !t.IsSigned())
  1655  	// result: (MOVBUload ptr mem)
  1656  	for {
  1657  		t := v.Type
  1658  		ptr := v_0
  1659  		mem := v_1
  1660  		if !(is8BitInt(t) && !t.IsSigned()) {
  1661  			break
  1662  		}
  1663  		v.reset(OpMIPSMOVBUload)
  1664  		v.AddArg2(ptr, mem)
  1665  		return true
  1666  	}
  1667  	// match: (Load <t> ptr mem)
  1668  	// cond: (is16BitInt(t) && t.IsSigned())
  1669  	// result: (MOVHload ptr mem)
  1670  	for {
  1671  		t := v.Type
  1672  		ptr := v_0
  1673  		mem := v_1
  1674  		if !(is16BitInt(t) && t.IsSigned()) {
  1675  			break
  1676  		}
  1677  		v.reset(OpMIPSMOVHload)
  1678  		v.AddArg2(ptr, mem)
  1679  		return true
  1680  	}
  1681  	// match: (Load <t> ptr mem)
  1682  	// cond: (is16BitInt(t) && !t.IsSigned())
  1683  	// result: (MOVHUload ptr mem)
  1684  	for {
  1685  		t := v.Type
  1686  		ptr := v_0
  1687  		mem := v_1
  1688  		if !(is16BitInt(t) && !t.IsSigned()) {
  1689  			break
  1690  		}
  1691  		v.reset(OpMIPSMOVHUload)
  1692  		v.AddArg2(ptr, mem)
  1693  		return true
  1694  	}
  1695  	// match: (Load <t> ptr mem)
  1696  	// cond: (is32BitInt(t) || isPtr(t))
  1697  	// result: (MOVWload ptr mem)
  1698  	for {
  1699  		t := v.Type
  1700  		ptr := v_0
  1701  		mem := v_1
  1702  		if !(is32BitInt(t) || isPtr(t)) {
  1703  			break
  1704  		}
  1705  		v.reset(OpMIPSMOVWload)
  1706  		v.AddArg2(ptr, mem)
  1707  		return true
  1708  	}
  1709  	// match: (Load <t> ptr mem)
  1710  	// cond: is32BitFloat(t)
  1711  	// result: (MOVFload ptr mem)
  1712  	for {
  1713  		t := v.Type
  1714  		ptr := v_0
  1715  		mem := v_1
  1716  		if !(is32BitFloat(t)) {
  1717  			break
  1718  		}
  1719  		v.reset(OpMIPSMOVFload)
  1720  		v.AddArg2(ptr, mem)
  1721  		return true
  1722  	}
  1723  	// match: (Load <t> ptr mem)
  1724  	// cond: is64BitFloat(t)
  1725  	// result: (MOVDload ptr mem)
  1726  	for {
  1727  		t := v.Type
  1728  		ptr := v_0
  1729  		mem := v_1
  1730  		if !(is64BitFloat(t)) {
  1731  			break
  1732  		}
  1733  		v.reset(OpMIPSMOVDload)
  1734  		v.AddArg2(ptr, mem)
  1735  		return true
  1736  	}
  1737  	return false
  1738  }
  1739  func rewriteValueMIPS_OpLocalAddr(v *Value) bool {
  1740  	v_1 := v.Args[1]
  1741  	v_0 := v.Args[0]
  1742  	b := v.Block
  1743  	typ := &b.Func.Config.Types
  1744  	// match: (LocalAddr <t> {sym} base mem)
  1745  	// cond: t.Elem().HasPointers()
  1746  	// result: (MOVWaddr {sym} (SPanchored base mem))
  1747  	for {
  1748  		t := v.Type
  1749  		sym := auxToSym(v.Aux)
  1750  		base := v_0
  1751  		mem := v_1
  1752  		if !(t.Elem().HasPointers()) {
  1753  			break
  1754  		}
  1755  		v.reset(OpMIPSMOVWaddr)
  1756  		v.Aux = symToAux(sym)
  1757  		v0 := b.NewValue0(v.Pos, OpSPanchored, typ.Uintptr)
  1758  		v0.AddArg2(base, mem)
  1759  		v.AddArg(v0)
  1760  		return true
  1761  	}
  1762  	// match: (LocalAddr <t> {sym} base _)
  1763  	// cond: !t.Elem().HasPointers()
  1764  	// result: (MOVWaddr {sym} base)
  1765  	for {
  1766  		t := v.Type
  1767  		sym := auxToSym(v.Aux)
  1768  		base := v_0
  1769  		if !(!t.Elem().HasPointers()) {
  1770  			break
  1771  		}
  1772  		v.reset(OpMIPSMOVWaddr)
  1773  		v.Aux = symToAux(sym)
  1774  		v.AddArg(base)
  1775  		return true
  1776  	}
  1777  	return false
  1778  }
  1779  func rewriteValueMIPS_OpLsh16x16(v *Value) bool {
  1780  	v_1 := v.Args[1]
  1781  	v_0 := v.Args[0]
  1782  	b := v.Block
  1783  	typ := &b.Func.Config.Types
  1784  	// match: (Lsh16x16 <t> x y)
  1785  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1786  	for {
  1787  		t := v.Type
  1788  		x := v_0
  1789  		y := v_1
  1790  		v.reset(OpMIPSCMOVZ)
  1791  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1792  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1793  		v1.AddArg(y)
  1794  		v0.AddArg2(x, v1)
  1795  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1796  		v2.AuxInt = int32ToAuxInt(0)
  1797  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1798  		v3.AuxInt = int32ToAuxInt(32)
  1799  		v3.AddArg(v1)
  1800  		v.AddArg3(v0, v2, v3)
  1801  		return true
  1802  	}
  1803  }
  1804  func rewriteValueMIPS_OpLsh16x32(v *Value) bool {
  1805  	v_1 := v.Args[1]
  1806  	v_0 := v.Args[0]
  1807  	b := v.Block
  1808  	typ := &b.Func.Config.Types
  1809  	// match: (Lsh16x32 <t> x y)
  1810  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1811  	for {
  1812  		t := v.Type
  1813  		x := v_0
  1814  		y := v_1
  1815  		v.reset(OpMIPSCMOVZ)
  1816  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1817  		v0.AddArg2(x, y)
  1818  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1819  		v1.AuxInt = int32ToAuxInt(0)
  1820  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1821  		v2.AuxInt = int32ToAuxInt(32)
  1822  		v2.AddArg(y)
  1823  		v.AddArg3(v0, v1, v2)
  1824  		return true
  1825  	}
  1826  }
  1827  func rewriteValueMIPS_OpLsh16x64(v *Value) bool {
  1828  	v_1 := v.Args[1]
  1829  	v_0 := v.Args[0]
  1830  	// match: (Lsh16x64 x (Const64 [c]))
  1831  	// cond: uint32(c) < 16
  1832  	// result: (SLLconst x [int32(c)])
  1833  	for {
  1834  		x := v_0
  1835  		if v_1.Op != OpConst64 {
  1836  			break
  1837  		}
  1838  		c := auxIntToInt64(v_1.AuxInt)
  1839  		if !(uint32(c) < 16) {
  1840  			break
  1841  		}
  1842  		v.reset(OpMIPSSLLconst)
  1843  		v.AuxInt = int32ToAuxInt(int32(c))
  1844  		v.AddArg(x)
  1845  		return true
  1846  	}
  1847  	// match: (Lsh16x64 _ (Const64 [c]))
  1848  	// cond: uint32(c) >= 16
  1849  	// result: (MOVWconst [0])
  1850  	for {
  1851  		if v_1.Op != OpConst64 {
  1852  			break
  1853  		}
  1854  		c := auxIntToInt64(v_1.AuxInt)
  1855  		if !(uint32(c) >= 16) {
  1856  			break
  1857  		}
  1858  		v.reset(OpMIPSMOVWconst)
  1859  		v.AuxInt = int32ToAuxInt(0)
  1860  		return true
  1861  	}
  1862  	return false
  1863  }
  1864  func rewriteValueMIPS_OpLsh16x8(v *Value) bool {
  1865  	v_1 := v.Args[1]
  1866  	v_0 := v.Args[0]
  1867  	b := v.Block
  1868  	typ := &b.Func.Config.Types
  1869  	// match: (Lsh16x8 <t> x y)
  1870  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1871  	for {
  1872  		t := v.Type
  1873  		x := v_0
  1874  		y := v_1
  1875  		v.reset(OpMIPSCMOVZ)
  1876  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1877  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1878  		v1.AddArg(y)
  1879  		v0.AddArg2(x, v1)
  1880  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1881  		v2.AuxInt = int32ToAuxInt(0)
  1882  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1883  		v3.AuxInt = int32ToAuxInt(32)
  1884  		v3.AddArg(v1)
  1885  		v.AddArg3(v0, v2, v3)
  1886  		return true
  1887  	}
  1888  }
  1889  func rewriteValueMIPS_OpLsh32x16(v *Value) bool {
  1890  	v_1 := v.Args[1]
  1891  	v_0 := v.Args[0]
  1892  	b := v.Block
  1893  	typ := &b.Func.Config.Types
  1894  	// match: (Lsh32x16 <t> x y)
  1895  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  1896  	for {
  1897  		t := v.Type
  1898  		x := v_0
  1899  		y := v_1
  1900  		v.reset(OpMIPSCMOVZ)
  1901  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1902  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  1903  		v1.AddArg(y)
  1904  		v0.AddArg2(x, v1)
  1905  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1906  		v2.AuxInt = int32ToAuxInt(0)
  1907  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1908  		v3.AuxInt = int32ToAuxInt(32)
  1909  		v3.AddArg(v1)
  1910  		v.AddArg3(v0, v2, v3)
  1911  		return true
  1912  	}
  1913  }
  1914  func rewriteValueMIPS_OpLsh32x32(v *Value) bool {
  1915  	v_1 := v.Args[1]
  1916  	v_0 := v.Args[0]
  1917  	b := v.Block
  1918  	typ := &b.Func.Config.Types
  1919  	// match: (Lsh32x32 <t> x y)
  1920  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  1921  	for {
  1922  		t := v.Type
  1923  		x := v_0
  1924  		y := v_1
  1925  		v.reset(OpMIPSCMOVZ)
  1926  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1927  		v0.AddArg2(x, y)
  1928  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1929  		v1.AuxInt = int32ToAuxInt(0)
  1930  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1931  		v2.AuxInt = int32ToAuxInt(32)
  1932  		v2.AddArg(y)
  1933  		v.AddArg3(v0, v1, v2)
  1934  		return true
  1935  	}
  1936  }
  1937  func rewriteValueMIPS_OpLsh32x64(v *Value) bool {
  1938  	v_1 := v.Args[1]
  1939  	v_0 := v.Args[0]
  1940  	// match: (Lsh32x64 x (Const64 [c]))
  1941  	// cond: uint32(c) < 32
  1942  	// result: (SLLconst x [int32(c)])
  1943  	for {
  1944  		x := v_0
  1945  		if v_1.Op != OpConst64 {
  1946  			break
  1947  		}
  1948  		c := auxIntToInt64(v_1.AuxInt)
  1949  		if !(uint32(c) < 32) {
  1950  			break
  1951  		}
  1952  		v.reset(OpMIPSSLLconst)
  1953  		v.AuxInt = int32ToAuxInt(int32(c))
  1954  		v.AddArg(x)
  1955  		return true
  1956  	}
  1957  	// match: (Lsh32x64 _ (Const64 [c]))
  1958  	// cond: uint32(c) >= 32
  1959  	// result: (MOVWconst [0])
  1960  	for {
  1961  		if v_1.Op != OpConst64 {
  1962  			break
  1963  		}
  1964  		c := auxIntToInt64(v_1.AuxInt)
  1965  		if !(uint32(c) >= 32) {
  1966  			break
  1967  		}
  1968  		v.reset(OpMIPSMOVWconst)
  1969  		v.AuxInt = int32ToAuxInt(0)
  1970  		return true
  1971  	}
  1972  	return false
  1973  }
  1974  func rewriteValueMIPS_OpLsh32x8(v *Value) bool {
  1975  	v_1 := v.Args[1]
  1976  	v_0 := v.Args[0]
  1977  	b := v.Block
  1978  	typ := &b.Func.Config.Types
  1979  	// match: (Lsh32x8 <t> x y)
  1980  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  1981  	for {
  1982  		t := v.Type
  1983  		x := v_0
  1984  		y := v_1
  1985  		v.reset(OpMIPSCMOVZ)
  1986  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  1987  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  1988  		v1.AddArg(y)
  1989  		v0.AddArg2(x, v1)
  1990  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  1991  		v2.AuxInt = int32ToAuxInt(0)
  1992  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  1993  		v3.AuxInt = int32ToAuxInt(32)
  1994  		v3.AddArg(v1)
  1995  		v.AddArg3(v0, v2, v3)
  1996  		return true
  1997  	}
  1998  }
  1999  func rewriteValueMIPS_OpLsh8x16(v *Value) bool {
  2000  	v_1 := v.Args[1]
  2001  	v_0 := v.Args[0]
  2002  	b := v.Block
  2003  	typ := &b.Func.Config.Types
  2004  	// match: (Lsh8x16 <t> x y)
  2005  	// result: (CMOVZ (SLL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  2006  	for {
  2007  		t := v.Type
  2008  		x := v_0
  2009  		y := v_1
  2010  		v.reset(OpMIPSCMOVZ)
  2011  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2012  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  2013  		v1.AddArg(y)
  2014  		v0.AddArg2(x, v1)
  2015  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2016  		v2.AuxInt = int32ToAuxInt(0)
  2017  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2018  		v3.AuxInt = int32ToAuxInt(32)
  2019  		v3.AddArg(v1)
  2020  		v.AddArg3(v0, v2, v3)
  2021  		return true
  2022  	}
  2023  }
  2024  func rewriteValueMIPS_OpLsh8x32(v *Value) bool {
  2025  	v_1 := v.Args[1]
  2026  	v_0 := v.Args[0]
  2027  	b := v.Block
  2028  	typ := &b.Func.Config.Types
  2029  	// match: (Lsh8x32 <t> x y)
  2030  	// result: (CMOVZ (SLL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  2031  	for {
  2032  		t := v.Type
  2033  		x := v_0
  2034  		y := v_1
  2035  		v.reset(OpMIPSCMOVZ)
  2036  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2037  		v0.AddArg2(x, y)
  2038  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2039  		v1.AuxInt = int32ToAuxInt(0)
  2040  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2041  		v2.AuxInt = int32ToAuxInt(32)
  2042  		v2.AddArg(y)
  2043  		v.AddArg3(v0, v1, v2)
  2044  		return true
  2045  	}
  2046  }
  2047  func rewriteValueMIPS_OpLsh8x64(v *Value) bool {
  2048  	v_1 := v.Args[1]
  2049  	v_0 := v.Args[0]
  2050  	// match: (Lsh8x64 x (Const64 [c]))
  2051  	// cond: uint32(c) < 8
  2052  	// result: (SLLconst x [int32(c)])
  2053  	for {
  2054  		x := v_0
  2055  		if v_1.Op != OpConst64 {
  2056  			break
  2057  		}
  2058  		c := auxIntToInt64(v_1.AuxInt)
  2059  		if !(uint32(c) < 8) {
  2060  			break
  2061  		}
  2062  		v.reset(OpMIPSSLLconst)
  2063  		v.AuxInt = int32ToAuxInt(int32(c))
  2064  		v.AddArg(x)
  2065  		return true
  2066  	}
  2067  	// match: (Lsh8x64 _ (Const64 [c]))
  2068  	// cond: uint32(c) >= 8
  2069  	// result: (MOVWconst [0])
  2070  	for {
  2071  		if v_1.Op != OpConst64 {
  2072  			break
  2073  		}
  2074  		c := auxIntToInt64(v_1.AuxInt)
  2075  		if !(uint32(c) >= 8) {
  2076  			break
  2077  		}
  2078  		v.reset(OpMIPSMOVWconst)
  2079  		v.AuxInt = int32ToAuxInt(0)
  2080  		return true
  2081  	}
  2082  	return false
  2083  }
  2084  func rewriteValueMIPS_OpLsh8x8(v *Value) bool {
  2085  	v_1 := v.Args[1]
  2086  	v_0 := v.Args[0]
  2087  	b := v.Block
  2088  	typ := &b.Func.Config.Types
  2089  	// match: (Lsh8x8 <t> x y)
  2090  	// result: (CMOVZ (SLL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  2091  	for {
  2092  		t := v.Type
  2093  		x := v_0
  2094  		y := v_1
  2095  		v.reset(OpMIPSCMOVZ)
  2096  		v0 := b.NewValue0(v.Pos, OpMIPSSLL, t)
  2097  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  2098  		v1.AddArg(y)
  2099  		v0.AddArg2(x, v1)
  2100  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  2101  		v2.AuxInt = int32ToAuxInt(0)
  2102  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  2103  		v3.AuxInt = int32ToAuxInt(32)
  2104  		v3.AddArg(v1)
  2105  		v.AddArg3(v0, v2, v3)
  2106  		return true
  2107  	}
  2108  }
  2109  func rewriteValueMIPS_OpMIPSADD(v *Value) bool {
  2110  	v_1 := v.Args[1]
  2111  	v_0 := v.Args[0]
  2112  	// match: (ADD x (MOVWconst <t> [c]))
  2113  	// cond: !t.IsPtr()
  2114  	// result: (ADDconst [c] x)
  2115  	for {
  2116  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2117  			x := v_0
  2118  			if v_1.Op != OpMIPSMOVWconst {
  2119  				continue
  2120  			}
  2121  			t := v_1.Type
  2122  			c := auxIntToInt32(v_1.AuxInt)
  2123  			if !(!t.IsPtr()) {
  2124  				continue
  2125  			}
  2126  			v.reset(OpMIPSADDconst)
  2127  			v.AuxInt = int32ToAuxInt(c)
  2128  			v.AddArg(x)
  2129  			return true
  2130  		}
  2131  		break
  2132  	}
  2133  	// match: (ADD x (NEG y))
  2134  	// result: (SUB x y)
  2135  	for {
  2136  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2137  			x := v_0
  2138  			if v_1.Op != OpMIPSNEG {
  2139  				continue
  2140  			}
  2141  			y := v_1.Args[0]
  2142  			v.reset(OpMIPSSUB)
  2143  			v.AddArg2(x, y)
  2144  			return true
  2145  		}
  2146  		break
  2147  	}
  2148  	return false
  2149  }
  2150  func rewriteValueMIPS_OpMIPSADDconst(v *Value) bool {
  2151  	v_0 := v.Args[0]
  2152  	// match: (ADDconst [off1] (MOVWaddr [off2] {sym} ptr))
  2153  	// result: (MOVWaddr [off1+off2] {sym} ptr)
  2154  	for {
  2155  		off1 := auxIntToInt32(v.AuxInt)
  2156  		if v_0.Op != OpMIPSMOVWaddr {
  2157  			break
  2158  		}
  2159  		off2 := auxIntToInt32(v_0.AuxInt)
  2160  		sym := auxToSym(v_0.Aux)
  2161  		ptr := v_0.Args[0]
  2162  		v.reset(OpMIPSMOVWaddr)
  2163  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2164  		v.Aux = symToAux(sym)
  2165  		v.AddArg(ptr)
  2166  		return true
  2167  	}
  2168  	// match: (ADDconst [0] x)
  2169  	// result: x
  2170  	for {
  2171  		if auxIntToInt32(v.AuxInt) != 0 {
  2172  			break
  2173  		}
  2174  		x := v_0
  2175  		v.copyOf(x)
  2176  		return true
  2177  	}
  2178  	// match: (ADDconst [c] (MOVWconst [d]))
  2179  	// result: (MOVWconst [int32(c+d)])
  2180  	for {
  2181  		c := auxIntToInt32(v.AuxInt)
  2182  		if v_0.Op != OpMIPSMOVWconst {
  2183  			break
  2184  		}
  2185  		d := auxIntToInt32(v_0.AuxInt)
  2186  		v.reset(OpMIPSMOVWconst)
  2187  		v.AuxInt = int32ToAuxInt(int32(c + d))
  2188  		return true
  2189  	}
  2190  	// match: (ADDconst [c] (ADDconst [d] x))
  2191  	// result: (ADDconst [c+d] x)
  2192  	for {
  2193  		c := auxIntToInt32(v.AuxInt)
  2194  		if v_0.Op != OpMIPSADDconst {
  2195  			break
  2196  		}
  2197  		d := auxIntToInt32(v_0.AuxInt)
  2198  		x := v_0.Args[0]
  2199  		v.reset(OpMIPSADDconst)
  2200  		v.AuxInt = int32ToAuxInt(c + d)
  2201  		v.AddArg(x)
  2202  		return true
  2203  	}
  2204  	// match: (ADDconst [c] (SUBconst [d] x))
  2205  	// result: (ADDconst [c-d] x)
  2206  	for {
  2207  		c := auxIntToInt32(v.AuxInt)
  2208  		if v_0.Op != OpMIPSSUBconst {
  2209  			break
  2210  		}
  2211  		d := auxIntToInt32(v_0.AuxInt)
  2212  		x := v_0.Args[0]
  2213  		v.reset(OpMIPSADDconst)
  2214  		v.AuxInt = int32ToAuxInt(c - d)
  2215  		v.AddArg(x)
  2216  		return true
  2217  	}
  2218  	return false
  2219  }
  2220  func rewriteValueMIPS_OpMIPSAND(v *Value) bool {
  2221  	v_1 := v.Args[1]
  2222  	v_0 := v.Args[0]
  2223  	b := v.Block
  2224  	// match: (AND x (MOVWconst [c]))
  2225  	// result: (ANDconst [c] x)
  2226  	for {
  2227  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2228  			x := v_0
  2229  			if v_1.Op != OpMIPSMOVWconst {
  2230  				continue
  2231  			}
  2232  			c := auxIntToInt32(v_1.AuxInt)
  2233  			v.reset(OpMIPSANDconst)
  2234  			v.AuxInt = int32ToAuxInt(c)
  2235  			v.AddArg(x)
  2236  			return true
  2237  		}
  2238  		break
  2239  	}
  2240  	// match: (AND x x)
  2241  	// result: x
  2242  	for {
  2243  		x := v_0
  2244  		if x != v_1 {
  2245  			break
  2246  		}
  2247  		v.copyOf(x)
  2248  		return true
  2249  	}
  2250  	// match: (AND (SGTUconst [1] x) (SGTUconst [1] y))
  2251  	// result: (SGTUconst [1] (OR <x.Type> x y))
  2252  	for {
  2253  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2254  			if v_0.Op != OpMIPSSGTUconst || auxIntToInt32(v_0.AuxInt) != 1 {
  2255  				continue
  2256  			}
  2257  			x := v_0.Args[0]
  2258  			if v_1.Op != OpMIPSSGTUconst || auxIntToInt32(v_1.AuxInt) != 1 {
  2259  				continue
  2260  			}
  2261  			y := v_1.Args[0]
  2262  			v.reset(OpMIPSSGTUconst)
  2263  			v.AuxInt = int32ToAuxInt(1)
  2264  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  2265  			v0.AddArg2(x, y)
  2266  			v.AddArg(v0)
  2267  			return true
  2268  		}
  2269  		break
  2270  	}
  2271  	return false
  2272  }
  2273  func rewriteValueMIPS_OpMIPSANDconst(v *Value) bool {
  2274  	v_0 := v.Args[0]
  2275  	// match: (ANDconst [0] _)
  2276  	// result: (MOVWconst [0])
  2277  	for {
  2278  		if auxIntToInt32(v.AuxInt) != 0 {
  2279  			break
  2280  		}
  2281  		v.reset(OpMIPSMOVWconst)
  2282  		v.AuxInt = int32ToAuxInt(0)
  2283  		return true
  2284  	}
  2285  	// match: (ANDconst [-1] x)
  2286  	// result: x
  2287  	for {
  2288  		if auxIntToInt32(v.AuxInt) != -1 {
  2289  			break
  2290  		}
  2291  		x := v_0
  2292  		v.copyOf(x)
  2293  		return true
  2294  	}
  2295  	// match: (ANDconst [c] (MOVWconst [d]))
  2296  	// result: (MOVWconst [c&d])
  2297  	for {
  2298  		c := auxIntToInt32(v.AuxInt)
  2299  		if v_0.Op != OpMIPSMOVWconst {
  2300  			break
  2301  		}
  2302  		d := auxIntToInt32(v_0.AuxInt)
  2303  		v.reset(OpMIPSMOVWconst)
  2304  		v.AuxInt = int32ToAuxInt(c & d)
  2305  		return true
  2306  	}
  2307  	// match: (ANDconst [c] (ANDconst [d] x))
  2308  	// result: (ANDconst [c&d] x)
  2309  	for {
  2310  		c := auxIntToInt32(v.AuxInt)
  2311  		if v_0.Op != OpMIPSANDconst {
  2312  			break
  2313  		}
  2314  		d := auxIntToInt32(v_0.AuxInt)
  2315  		x := v_0.Args[0]
  2316  		v.reset(OpMIPSANDconst)
  2317  		v.AuxInt = int32ToAuxInt(c & d)
  2318  		v.AddArg(x)
  2319  		return true
  2320  	}
  2321  	return false
  2322  }
  2323  func rewriteValueMIPS_OpMIPSCMOVZ(v *Value) bool {
  2324  	v_2 := v.Args[2]
  2325  	v_1 := v.Args[1]
  2326  	v_0 := v.Args[0]
  2327  	// match: (CMOVZ _ f (MOVWconst [0]))
  2328  	// result: f
  2329  	for {
  2330  		f := v_1
  2331  		if v_2.Op != OpMIPSMOVWconst || auxIntToInt32(v_2.AuxInt) != 0 {
  2332  			break
  2333  		}
  2334  		v.copyOf(f)
  2335  		return true
  2336  	}
  2337  	// match: (CMOVZ a _ (MOVWconst [c]))
  2338  	// cond: c!=0
  2339  	// result: a
  2340  	for {
  2341  		a := v_0
  2342  		if v_2.Op != OpMIPSMOVWconst {
  2343  			break
  2344  		}
  2345  		c := auxIntToInt32(v_2.AuxInt)
  2346  		if !(c != 0) {
  2347  			break
  2348  		}
  2349  		v.copyOf(a)
  2350  		return true
  2351  	}
  2352  	// match: (CMOVZ a (MOVWconst [0]) c)
  2353  	// result: (CMOVZzero a c)
  2354  	for {
  2355  		a := v_0
  2356  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2357  			break
  2358  		}
  2359  		c := v_2
  2360  		v.reset(OpMIPSCMOVZzero)
  2361  		v.AddArg2(a, c)
  2362  		return true
  2363  	}
  2364  	return false
  2365  }
  2366  func rewriteValueMIPS_OpMIPSCMOVZzero(v *Value) bool {
  2367  	v_1 := v.Args[1]
  2368  	v_0 := v.Args[0]
  2369  	// match: (CMOVZzero _ (MOVWconst [0]))
  2370  	// result: (MOVWconst [0])
  2371  	for {
  2372  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2373  			break
  2374  		}
  2375  		v.reset(OpMIPSMOVWconst)
  2376  		v.AuxInt = int32ToAuxInt(0)
  2377  		return true
  2378  	}
  2379  	// match: (CMOVZzero a (MOVWconst [c]))
  2380  	// cond: c!=0
  2381  	// result: a
  2382  	for {
  2383  		a := v_0
  2384  		if v_1.Op != OpMIPSMOVWconst {
  2385  			break
  2386  		}
  2387  		c := auxIntToInt32(v_1.AuxInt)
  2388  		if !(c != 0) {
  2389  			break
  2390  		}
  2391  		v.copyOf(a)
  2392  		return true
  2393  	}
  2394  	return false
  2395  }
  2396  func rewriteValueMIPS_OpMIPSLoweredAtomicAdd(v *Value) bool {
  2397  	v_2 := v.Args[2]
  2398  	v_1 := v.Args[1]
  2399  	v_0 := v.Args[0]
  2400  	// match: (LoweredAtomicAdd ptr (MOVWconst [c]) mem)
  2401  	// cond: is16Bit(int64(c))
  2402  	// result: (LoweredAtomicAddconst [c] ptr mem)
  2403  	for {
  2404  		ptr := v_0
  2405  		if v_1.Op != OpMIPSMOVWconst {
  2406  			break
  2407  		}
  2408  		c := auxIntToInt32(v_1.AuxInt)
  2409  		mem := v_2
  2410  		if !(is16Bit(int64(c))) {
  2411  			break
  2412  		}
  2413  		v.reset(OpMIPSLoweredAtomicAddconst)
  2414  		v.AuxInt = int32ToAuxInt(c)
  2415  		v.AddArg2(ptr, mem)
  2416  		return true
  2417  	}
  2418  	return false
  2419  }
  2420  func rewriteValueMIPS_OpMIPSLoweredAtomicStore32(v *Value) bool {
  2421  	v_2 := v.Args[2]
  2422  	v_1 := v.Args[1]
  2423  	v_0 := v.Args[0]
  2424  	// match: (LoweredAtomicStore32 ptr (MOVWconst [0]) mem)
  2425  	// result: (LoweredAtomicStorezero ptr mem)
  2426  	for {
  2427  		ptr := v_0
  2428  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2429  			break
  2430  		}
  2431  		mem := v_2
  2432  		v.reset(OpMIPSLoweredAtomicStorezero)
  2433  		v.AddArg2(ptr, mem)
  2434  		return true
  2435  	}
  2436  	return false
  2437  }
  2438  func rewriteValueMIPS_OpMIPSMOVBUload(v *Value) bool {
  2439  	v_1 := v.Args[1]
  2440  	v_0 := v.Args[0]
  2441  	// match: (MOVBUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2442  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2443  	// result: (MOVBUload [off1+off2] {sym} ptr mem)
  2444  	for {
  2445  		off1 := auxIntToInt32(v.AuxInt)
  2446  		sym := auxToSym(v.Aux)
  2447  		x := v_0
  2448  		if x.Op != OpMIPSADDconst {
  2449  			break
  2450  		}
  2451  		off2 := auxIntToInt32(x.AuxInt)
  2452  		ptr := x.Args[0]
  2453  		mem := v_1
  2454  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2455  			break
  2456  		}
  2457  		v.reset(OpMIPSMOVBUload)
  2458  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2459  		v.Aux = symToAux(sym)
  2460  		v.AddArg2(ptr, mem)
  2461  		return true
  2462  	}
  2463  	// match: (MOVBUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2464  	// cond: canMergeSym(sym1,sym2)
  2465  	// result: (MOVBUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2466  	for {
  2467  		off1 := auxIntToInt32(v.AuxInt)
  2468  		sym1 := auxToSym(v.Aux)
  2469  		if v_0.Op != OpMIPSMOVWaddr {
  2470  			break
  2471  		}
  2472  		off2 := auxIntToInt32(v_0.AuxInt)
  2473  		sym2 := auxToSym(v_0.Aux)
  2474  		ptr := v_0.Args[0]
  2475  		mem := v_1
  2476  		if !(canMergeSym(sym1, sym2)) {
  2477  			break
  2478  		}
  2479  		v.reset(OpMIPSMOVBUload)
  2480  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2481  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2482  		v.AddArg2(ptr, mem)
  2483  		return true
  2484  	}
  2485  	// match: (MOVBUload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2486  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2487  	// result: (MOVBUreg x)
  2488  	for {
  2489  		off := auxIntToInt32(v.AuxInt)
  2490  		sym := auxToSym(v.Aux)
  2491  		ptr := v_0
  2492  		if v_1.Op != OpMIPSMOVBstore {
  2493  			break
  2494  		}
  2495  		off2 := auxIntToInt32(v_1.AuxInt)
  2496  		sym2 := auxToSym(v_1.Aux)
  2497  		x := v_1.Args[1]
  2498  		ptr2 := v_1.Args[0]
  2499  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2500  			break
  2501  		}
  2502  		v.reset(OpMIPSMOVBUreg)
  2503  		v.AddArg(x)
  2504  		return true
  2505  	}
  2506  	return false
  2507  }
  2508  func rewriteValueMIPS_OpMIPSMOVBUreg(v *Value) bool {
  2509  	v_0 := v.Args[0]
  2510  	b := v.Block
  2511  	// match: (MOVBUreg x:(MOVBUload _ _))
  2512  	// result: (MOVWreg x)
  2513  	for {
  2514  		x := v_0
  2515  		if x.Op != OpMIPSMOVBUload {
  2516  			break
  2517  		}
  2518  		v.reset(OpMIPSMOVWreg)
  2519  		v.AddArg(x)
  2520  		return true
  2521  	}
  2522  	// match: (MOVBUreg x:(MOVBUreg _))
  2523  	// result: (MOVWreg x)
  2524  	for {
  2525  		x := v_0
  2526  		if x.Op != OpMIPSMOVBUreg {
  2527  			break
  2528  		}
  2529  		v.reset(OpMIPSMOVWreg)
  2530  		v.AddArg(x)
  2531  		return true
  2532  	}
  2533  	// match: (MOVBUreg <t> x:(MOVBload [off] {sym} ptr mem))
  2534  	// cond: x.Uses == 1 && clobber(x)
  2535  	// result: @x.Block (MOVBUload <t> [off] {sym} ptr mem)
  2536  	for {
  2537  		t := v.Type
  2538  		x := v_0
  2539  		if x.Op != OpMIPSMOVBload {
  2540  			break
  2541  		}
  2542  		off := auxIntToInt32(x.AuxInt)
  2543  		sym := auxToSym(x.Aux)
  2544  		mem := x.Args[1]
  2545  		ptr := x.Args[0]
  2546  		if !(x.Uses == 1 && clobber(x)) {
  2547  			break
  2548  		}
  2549  		b = x.Block
  2550  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBUload, t)
  2551  		v.copyOf(v0)
  2552  		v0.AuxInt = int32ToAuxInt(off)
  2553  		v0.Aux = symToAux(sym)
  2554  		v0.AddArg2(ptr, mem)
  2555  		return true
  2556  	}
  2557  	// match: (MOVBUreg (ANDconst [c] x))
  2558  	// result: (ANDconst [c&0xff] x)
  2559  	for {
  2560  		if v_0.Op != OpMIPSANDconst {
  2561  			break
  2562  		}
  2563  		c := auxIntToInt32(v_0.AuxInt)
  2564  		x := v_0.Args[0]
  2565  		v.reset(OpMIPSANDconst)
  2566  		v.AuxInt = int32ToAuxInt(c & 0xff)
  2567  		v.AddArg(x)
  2568  		return true
  2569  	}
  2570  	// match: (MOVBUreg (MOVWconst [c]))
  2571  	// result: (MOVWconst [int32(uint8(c))])
  2572  	for {
  2573  		if v_0.Op != OpMIPSMOVWconst {
  2574  			break
  2575  		}
  2576  		c := auxIntToInt32(v_0.AuxInt)
  2577  		v.reset(OpMIPSMOVWconst)
  2578  		v.AuxInt = int32ToAuxInt(int32(uint8(c)))
  2579  		return true
  2580  	}
  2581  	return false
  2582  }
  2583  func rewriteValueMIPS_OpMIPSMOVBload(v *Value) bool {
  2584  	v_1 := v.Args[1]
  2585  	v_0 := v.Args[0]
  2586  	// match: (MOVBload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2587  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2588  	// result: (MOVBload [off1+off2] {sym} ptr mem)
  2589  	for {
  2590  		off1 := auxIntToInt32(v.AuxInt)
  2591  		sym := auxToSym(v.Aux)
  2592  		x := v_0
  2593  		if x.Op != OpMIPSADDconst {
  2594  			break
  2595  		}
  2596  		off2 := auxIntToInt32(x.AuxInt)
  2597  		ptr := x.Args[0]
  2598  		mem := v_1
  2599  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2600  			break
  2601  		}
  2602  		v.reset(OpMIPSMOVBload)
  2603  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2604  		v.Aux = symToAux(sym)
  2605  		v.AddArg2(ptr, mem)
  2606  		return true
  2607  	}
  2608  	// match: (MOVBload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2609  	// cond: canMergeSym(sym1,sym2)
  2610  	// result: (MOVBload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2611  	for {
  2612  		off1 := auxIntToInt32(v.AuxInt)
  2613  		sym1 := auxToSym(v.Aux)
  2614  		if v_0.Op != OpMIPSMOVWaddr {
  2615  			break
  2616  		}
  2617  		off2 := auxIntToInt32(v_0.AuxInt)
  2618  		sym2 := auxToSym(v_0.Aux)
  2619  		ptr := v_0.Args[0]
  2620  		mem := v_1
  2621  		if !(canMergeSym(sym1, sym2)) {
  2622  			break
  2623  		}
  2624  		v.reset(OpMIPSMOVBload)
  2625  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2626  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2627  		v.AddArg2(ptr, mem)
  2628  		return true
  2629  	}
  2630  	// match: (MOVBload [off] {sym} ptr (MOVBstore [off2] {sym2} ptr2 x _))
  2631  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2632  	// result: (MOVBreg x)
  2633  	for {
  2634  		off := auxIntToInt32(v.AuxInt)
  2635  		sym := auxToSym(v.Aux)
  2636  		ptr := v_0
  2637  		if v_1.Op != OpMIPSMOVBstore {
  2638  			break
  2639  		}
  2640  		off2 := auxIntToInt32(v_1.AuxInt)
  2641  		sym2 := auxToSym(v_1.Aux)
  2642  		x := v_1.Args[1]
  2643  		ptr2 := v_1.Args[0]
  2644  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2645  			break
  2646  		}
  2647  		v.reset(OpMIPSMOVBreg)
  2648  		v.AddArg(x)
  2649  		return true
  2650  	}
  2651  	return false
  2652  }
  2653  func rewriteValueMIPS_OpMIPSMOVBreg(v *Value) bool {
  2654  	v_0 := v.Args[0]
  2655  	b := v.Block
  2656  	// match: (MOVBreg x:(MOVBload _ _))
  2657  	// result: (MOVWreg x)
  2658  	for {
  2659  		x := v_0
  2660  		if x.Op != OpMIPSMOVBload {
  2661  			break
  2662  		}
  2663  		v.reset(OpMIPSMOVWreg)
  2664  		v.AddArg(x)
  2665  		return true
  2666  	}
  2667  	// match: (MOVBreg x:(MOVBreg _))
  2668  	// result: (MOVWreg x)
  2669  	for {
  2670  		x := v_0
  2671  		if x.Op != OpMIPSMOVBreg {
  2672  			break
  2673  		}
  2674  		v.reset(OpMIPSMOVWreg)
  2675  		v.AddArg(x)
  2676  		return true
  2677  	}
  2678  	// match: (MOVBreg <t> x:(MOVBUload [off] {sym} ptr mem))
  2679  	// cond: x.Uses == 1 && clobber(x)
  2680  	// result: @x.Block (MOVBload <t> [off] {sym} ptr mem)
  2681  	for {
  2682  		t := v.Type
  2683  		x := v_0
  2684  		if x.Op != OpMIPSMOVBUload {
  2685  			break
  2686  		}
  2687  		off := auxIntToInt32(x.AuxInt)
  2688  		sym := auxToSym(x.Aux)
  2689  		mem := x.Args[1]
  2690  		ptr := x.Args[0]
  2691  		if !(x.Uses == 1 && clobber(x)) {
  2692  			break
  2693  		}
  2694  		b = x.Block
  2695  		v0 := b.NewValue0(x.Pos, OpMIPSMOVBload, t)
  2696  		v.copyOf(v0)
  2697  		v0.AuxInt = int32ToAuxInt(off)
  2698  		v0.Aux = symToAux(sym)
  2699  		v0.AddArg2(ptr, mem)
  2700  		return true
  2701  	}
  2702  	// match: (MOVBreg (ANDconst [c] x))
  2703  	// cond: c & 0x80 == 0
  2704  	// result: (ANDconst [c&0x7f] x)
  2705  	for {
  2706  		if v_0.Op != OpMIPSANDconst {
  2707  			break
  2708  		}
  2709  		c := auxIntToInt32(v_0.AuxInt)
  2710  		x := v_0.Args[0]
  2711  		if !(c&0x80 == 0) {
  2712  			break
  2713  		}
  2714  		v.reset(OpMIPSANDconst)
  2715  		v.AuxInt = int32ToAuxInt(c & 0x7f)
  2716  		v.AddArg(x)
  2717  		return true
  2718  	}
  2719  	// match: (MOVBreg (MOVWconst [c]))
  2720  	// result: (MOVWconst [int32(int8(c))])
  2721  	for {
  2722  		if v_0.Op != OpMIPSMOVWconst {
  2723  			break
  2724  		}
  2725  		c := auxIntToInt32(v_0.AuxInt)
  2726  		v.reset(OpMIPSMOVWconst)
  2727  		v.AuxInt = int32ToAuxInt(int32(int8(c)))
  2728  		return true
  2729  	}
  2730  	return false
  2731  }
  2732  func rewriteValueMIPS_OpMIPSMOVBstore(v *Value) bool {
  2733  	v_2 := v.Args[2]
  2734  	v_1 := v.Args[1]
  2735  	v_0 := v.Args[0]
  2736  	// match: (MOVBstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  2737  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2738  	// result: (MOVBstore [off1+off2] {sym} ptr val mem)
  2739  	for {
  2740  		off1 := auxIntToInt32(v.AuxInt)
  2741  		sym := auxToSym(v.Aux)
  2742  		x := v_0
  2743  		if x.Op != OpMIPSADDconst {
  2744  			break
  2745  		}
  2746  		off2 := auxIntToInt32(x.AuxInt)
  2747  		ptr := x.Args[0]
  2748  		val := v_1
  2749  		mem := v_2
  2750  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2751  			break
  2752  		}
  2753  		v.reset(OpMIPSMOVBstore)
  2754  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2755  		v.Aux = symToAux(sym)
  2756  		v.AddArg3(ptr, val, mem)
  2757  		return true
  2758  	}
  2759  	// match: (MOVBstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  2760  	// cond: canMergeSym(sym1,sym2)
  2761  	// result: (MOVBstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  2762  	for {
  2763  		off1 := auxIntToInt32(v.AuxInt)
  2764  		sym1 := auxToSym(v.Aux)
  2765  		if v_0.Op != OpMIPSMOVWaddr {
  2766  			break
  2767  		}
  2768  		off2 := auxIntToInt32(v_0.AuxInt)
  2769  		sym2 := auxToSym(v_0.Aux)
  2770  		ptr := v_0.Args[0]
  2771  		val := v_1
  2772  		mem := v_2
  2773  		if !(canMergeSym(sym1, sym2)) {
  2774  			break
  2775  		}
  2776  		v.reset(OpMIPSMOVBstore)
  2777  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2778  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2779  		v.AddArg3(ptr, val, mem)
  2780  		return true
  2781  	}
  2782  	// match: (MOVBstore [off] {sym} ptr (MOVWconst [0]) mem)
  2783  	// result: (MOVBstorezero [off] {sym} ptr mem)
  2784  	for {
  2785  		off := auxIntToInt32(v.AuxInt)
  2786  		sym := auxToSym(v.Aux)
  2787  		ptr := v_0
  2788  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  2789  			break
  2790  		}
  2791  		mem := v_2
  2792  		v.reset(OpMIPSMOVBstorezero)
  2793  		v.AuxInt = int32ToAuxInt(off)
  2794  		v.Aux = symToAux(sym)
  2795  		v.AddArg2(ptr, mem)
  2796  		return true
  2797  	}
  2798  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
  2799  	// result: (MOVBstore [off] {sym} ptr x mem)
  2800  	for {
  2801  		off := auxIntToInt32(v.AuxInt)
  2802  		sym := auxToSym(v.Aux)
  2803  		ptr := v_0
  2804  		if v_1.Op != OpMIPSMOVBreg {
  2805  			break
  2806  		}
  2807  		x := v_1.Args[0]
  2808  		mem := v_2
  2809  		v.reset(OpMIPSMOVBstore)
  2810  		v.AuxInt = int32ToAuxInt(off)
  2811  		v.Aux = symToAux(sym)
  2812  		v.AddArg3(ptr, x, mem)
  2813  		return true
  2814  	}
  2815  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
  2816  	// result: (MOVBstore [off] {sym} ptr x mem)
  2817  	for {
  2818  		off := auxIntToInt32(v.AuxInt)
  2819  		sym := auxToSym(v.Aux)
  2820  		ptr := v_0
  2821  		if v_1.Op != OpMIPSMOVBUreg {
  2822  			break
  2823  		}
  2824  		x := v_1.Args[0]
  2825  		mem := v_2
  2826  		v.reset(OpMIPSMOVBstore)
  2827  		v.AuxInt = int32ToAuxInt(off)
  2828  		v.Aux = symToAux(sym)
  2829  		v.AddArg3(ptr, x, mem)
  2830  		return true
  2831  	}
  2832  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
  2833  	// result: (MOVBstore [off] {sym} ptr x mem)
  2834  	for {
  2835  		off := auxIntToInt32(v.AuxInt)
  2836  		sym := auxToSym(v.Aux)
  2837  		ptr := v_0
  2838  		if v_1.Op != OpMIPSMOVHreg {
  2839  			break
  2840  		}
  2841  		x := v_1.Args[0]
  2842  		mem := v_2
  2843  		v.reset(OpMIPSMOVBstore)
  2844  		v.AuxInt = int32ToAuxInt(off)
  2845  		v.Aux = symToAux(sym)
  2846  		v.AddArg3(ptr, x, mem)
  2847  		return true
  2848  	}
  2849  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
  2850  	// result: (MOVBstore [off] {sym} ptr x mem)
  2851  	for {
  2852  		off := auxIntToInt32(v.AuxInt)
  2853  		sym := auxToSym(v.Aux)
  2854  		ptr := v_0
  2855  		if v_1.Op != OpMIPSMOVHUreg {
  2856  			break
  2857  		}
  2858  		x := v_1.Args[0]
  2859  		mem := v_2
  2860  		v.reset(OpMIPSMOVBstore)
  2861  		v.AuxInt = int32ToAuxInt(off)
  2862  		v.Aux = symToAux(sym)
  2863  		v.AddArg3(ptr, x, mem)
  2864  		return true
  2865  	}
  2866  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
  2867  	// result: (MOVBstore [off] {sym} ptr x mem)
  2868  	for {
  2869  		off := auxIntToInt32(v.AuxInt)
  2870  		sym := auxToSym(v.Aux)
  2871  		ptr := v_0
  2872  		if v_1.Op != OpMIPSMOVWreg {
  2873  			break
  2874  		}
  2875  		x := v_1.Args[0]
  2876  		mem := v_2
  2877  		v.reset(OpMIPSMOVBstore)
  2878  		v.AuxInt = int32ToAuxInt(off)
  2879  		v.Aux = symToAux(sym)
  2880  		v.AddArg3(ptr, x, mem)
  2881  		return true
  2882  	}
  2883  	return false
  2884  }
  2885  func rewriteValueMIPS_OpMIPSMOVBstorezero(v *Value) bool {
  2886  	v_1 := v.Args[1]
  2887  	v_0 := v.Args[0]
  2888  	// match: (MOVBstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2889  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2890  	// result: (MOVBstorezero [off1+off2] {sym} ptr mem)
  2891  	for {
  2892  		off1 := auxIntToInt32(v.AuxInt)
  2893  		sym := auxToSym(v.Aux)
  2894  		x := v_0
  2895  		if x.Op != OpMIPSADDconst {
  2896  			break
  2897  		}
  2898  		off2 := auxIntToInt32(x.AuxInt)
  2899  		ptr := x.Args[0]
  2900  		mem := v_1
  2901  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2902  			break
  2903  		}
  2904  		v.reset(OpMIPSMOVBstorezero)
  2905  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2906  		v.Aux = symToAux(sym)
  2907  		v.AddArg2(ptr, mem)
  2908  		return true
  2909  	}
  2910  	// match: (MOVBstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2911  	// cond: canMergeSym(sym1,sym2)
  2912  	// result: (MOVBstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2913  	for {
  2914  		off1 := auxIntToInt32(v.AuxInt)
  2915  		sym1 := auxToSym(v.Aux)
  2916  		if v_0.Op != OpMIPSMOVWaddr {
  2917  			break
  2918  		}
  2919  		off2 := auxIntToInt32(v_0.AuxInt)
  2920  		sym2 := auxToSym(v_0.Aux)
  2921  		ptr := v_0.Args[0]
  2922  		mem := v_1
  2923  		if !(canMergeSym(sym1, sym2)) {
  2924  			break
  2925  		}
  2926  		v.reset(OpMIPSMOVBstorezero)
  2927  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2928  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2929  		v.AddArg2(ptr, mem)
  2930  		return true
  2931  	}
  2932  	return false
  2933  }
  2934  func rewriteValueMIPS_OpMIPSMOVDload(v *Value) bool {
  2935  	v_1 := v.Args[1]
  2936  	v_0 := v.Args[0]
  2937  	// match: (MOVDload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  2938  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  2939  	// result: (MOVDload [off1+off2] {sym} ptr mem)
  2940  	for {
  2941  		off1 := auxIntToInt32(v.AuxInt)
  2942  		sym := auxToSym(v.Aux)
  2943  		x := v_0
  2944  		if x.Op != OpMIPSADDconst {
  2945  			break
  2946  		}
  2947  		off2 := auxIntToInt32(x.AuxInt)
  2948  		ptr := x.Args[0]
  2949  		mem := v_1
  2950  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  2951  			break
  2952  		}
  2953  		v.reset(OpMIPSMOVDload)
  2954  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2955  		v.Aux = symToAux(sym)
  2956  		v.AddArg2(ptr, mem)
  2957  		return true
  2958  	}
  2959  	// match: (MOVDload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  2960  	// cond: canMergeSym(sym1,sym2)
  2961  	// result: (MOVDload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  2962  	for {
  2963  		off1 := auxIntToInt32(v.AuxInt)
  2964  		sym1 := auxToSym(v.Aux)
  2965  		if v_0.Op != OpMIPSMOVWaddr {
  2966  			break
  2967  		}
  2968  		off2 := auxIntToInt32(v_0.AuxInt)
  2969  		sym2 := auxToSym(v_0.Aux)
  2970  		ptr := v_0.Args[0]
  2971  		mem := v_1
  2972  		if !(canMergeSym(sym1, sym2)) {
  2973  			break
  2974  		}
  2975  		v.reset(OpMIPSMOVDload)
  2976  		v.AuxInt = int32ToAuxInt(off1 + off2)
  2977  		v.Aux = symToAux(mergeSym(sym1, sym2))
  2978  		v.AddArg2(ptr, mem)
  2979  		return true
  2980  	}
  2981  	// match: (MOVDload [off] {sym} ptr (MOVDstore [off2] {sym2} ptr2 x _))
  2982  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  2983  	// result: x
  2984  	for {
  2985  		off := auxIntToInt32(v.AuxInt)
  2986  		sym := auxToSym(v.Aux)
  2987  		ptr := v_0
  2988  		if v_1.Op != OpMIPSMOVDstore {
  2989  			break
  2990  		}
  2991  		off2 := auxIntToInt32(v_1.AuxInt)
  2992  		sym2 := auxToSym(v_1.Aux)
  2993  		x := v_1.Args[1]
  2994  		ptr2 := v_1.Args[0]
  2995  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  2996  			break
  2997  		}
  2998  		v.copyOf(x)
  2999  		return true
  3000  	}
  3001  	return false
  3002  }
  3003  func rewriteValueMIPS_OpMIPSMOVDstore(v *Value) bool {
  3004  	v_2 := v.Args[2]
  3005  	v_1 := v.Args[1]
  3006  	v_0 := v.Args[0]
  3007  	// match: (MOVDstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3008  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3009  	// result: (MOVDstore [off1+off2] {sym} ptr val mem)
  3010  	for {
  3011  		off1 := auxIntToInt32(v.AuxInt)
  3012  		sym := auxToSym(v.Aux)
  3013  		x := v_0
  3014  		if x.Op != OpMIPSADDconst {
  3015  			break
  3016  		}
  3017  		off2 := auxIntToInt32(x.AuxInt)
  3018  		ptr := x.Args[0]
  3019  		val := v_1
  3020  		mem := v_2
  3021  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3022  			break
  3023  		}
  3024  		v.reset(OpMIPSMOVDstore)
  3025  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3026  		v.Aux = symToAux(sym)
  3027  		v.AddArg3(ptr, val, mem)
  3028  		return true
  3029  	}
  3030  	// match: (MOVDstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3031  	// cond: canMergeSym(sym1,sym2)
  3032  	// result: (MOVDstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3033  	for {
  3034  		off1 := auxIntToInt32(v.AuxInt)
  3035  		sym1 := auxToSym(v.Aux)
  3036  		if v_0.Op != OpMIPSMOVWaddr {
  3037  			break
  3038  		}
  3039  		off2 := auxIntToInt32(v_0.AuxInt)
  3040  		sym2 := auxToSym(v_0.Aux)
  3041  		ptr := v_0.Args[0]
  3042  		val := v_1
  3043  		mem := v_2
  3044  		if !(canMergeSym(sym1, sym2)) {
  3045  			break
  3046  		}
  3047  		v.reset(OpMIPSMOVDstore)
  3048  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3049  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3050  		v.AddArg3(ptr, val, mem)
  3051  		return true
  3052  	}
  3053  	return false
  3054  }
  3055  func rewriteValueMIPS_OpMIPSMOVFload(v *Value) bool {
  3056  	v_1 := v.Args[1]
  3057  	v_0 := v.Args[0]
  3058  	// match: (MOVFload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  3059  	// result: (MOVWgpfp val)
  3060  	for {
  3061  		off := auxIntToInt32(v.AuxInt)
  3062  		sym := auxToSym(v.Aux)
  3063  		ptr := v_0
  3064  		if v_1.Op != OpMIPSMOVWstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3065  			break
  3066  		}
  3067  		val := v_1.Args[1]
  3068  		if ptr != v_1.Args[0] {
  3069  			break
  3070  		}
  3071  		v.reset(OpMIPSMOVWgpfp)
  3072  		v.AddArg(val)
  3073  		return true
  3074  	}
  3075  	// match: (MOVFload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3076  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3077  	// result: (MOVFload [off1+off2] {sym} ptr mem)
  3078  	for {
  3079  		off1 := auxIntToInt32(v.AuxInt)
  3080  		sym := auxToSym(v.Aux)
  3081  		x := v_0
  3082  		if x.Op != OpMIPSADDconst {
  3083  			break
  3084  		}
  3085  		off2 := auxIntToInt32(x.AuxInt)
  3086  		ptr := x.Args[0]
  3087  		mem := v_1
  3088  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3089  			break
  3090  		}
  3091  		v.reset(OpMIPSMOVFload)
  3092  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3093  		v.Aux = symToAux(sym)
  3094  		v.AddArg2(ptr, mem)
  3095  		return true
  3096  	}
  3097  	// match: (MOVFload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3098  	// cond: canMergeSym(sym1,sym2)
  3099  	// result: (MOVFload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3100  	for {
  3101  		off1 := auxIntToInt32(v.AuxInt)
  3102  		sym1 := auxToSym(v.Aux)
  3103  		if v_0.Op != OpMIPSMOVWaddr {
  3104  			break
  3105  		}
  3106  		off2 := auxIntToInt32(v_0.AuxInt)
  3107  		sym2 := auxToSym(v_0.Aux)
  3108  		ptr := v_0.Args[0]
  3109  		mem := v_1
  3110  		if !(canMergeSym(sym1, sym2)) {
  3111  			break
  3112  		}
  3113  		v.reset(OpMIPSMOVFload)
  3114  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3115  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3116  		v.AddArg2(ptr, mem)
  3117  		return true
  3118  	}
  3119  	// match: (MOVFload [off] {sym} ptr (MOVFstore [off2] {sym2} ptr2 x _))
  3120  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3121  	// result: x
  3122  	for {
  3123  		off := auxIntToInt32(v.AuxInt)
  3124  		sym := auxToSym(v.Aux)
  3125  		ptr := v_0
  3126  		if v_1.Op != OpMIPSMOVFstore {
  3127  			break
  3128  		}
  3129  		off2 := auxIntToInt32(v_1.AuxInt)
  3130  		sym2 := auxToSym(v_1.Aux)
  3131  		x := v_1.Args[1]
  3132  		ptr2 := v_1.Args[0]
  3133  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3134  			break
  3135  		}
  3136  		v.copyOf(x)
  3137  		return true
  3138  	}
  3139  	return false
  3140  }
  3141  func rewriteValueMIPS_OpMIPSMOVFstore(v *Value) bool {
  3142  	v_2 := v.Args[2]
  3143  	v_1 := v.Args[1]
  3144  	v_0 := v.Args[0]
  3145  	// match: (MOVFstore [off] {sym} ptr (MOVWgpfp val) mem)
  3146  	// result: (MOVWstore [off] {sym} ptr val mem)
  3147  	for {
  3148  		off := auxIntToInt32(v.AuxInt)
  3149  		sym := auxToSym(v.Aux)
  3150  		ptr := v_0
  3151  		if v_1.Op != OpMIPSMOVWgpfp {
  3152  			break
  3153  		}
  3154  		val := v_1.Args[0]
  3155  		mem := v_2
  3156  		v.reset(OpMIPSMOVWstore)
  3157  		v.AuxInt = int32ToAuxInt(off)
  3158  		v.Aux = symToAux(sym)
  3159  		v.AddArg3(ptr, val, mem)
  3160  		return true
  3161  	}
  3162  	// match: (MOVFstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3163  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3164  	// result: (MOVFstore [off1+off2] {sym} ptr val mem)
  3165  	for {
  3166  		off1 := auxIntToInt32(v.AuxInt)
  3167  		sym := auxToSym(v.Aux)
  3168  		x := v_0
  3169  		if x.Op != OpMIPSADDconst {
  3170  			break
  3171  		}
  3172  		off2 := auxIntToInt32(x.AuxInt)
  3173  		ptr := x.Args[0]
  3174  		val := v_1
  3175  		mem := v_2
  3176  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3177  			break
  3178  		}
  3179  		v.reset(OpMIPSMOVFstore)
  3180  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3181  		v.Aux = symToAux(sym)
  3182  		v.AddArg3(ptr, val, mem)
  3183  		return true
  3184  	}
  3185  	// match: (MOVFstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3186  	// cond: canMergeSym(sym1,sym2)
  3187  	// result: (MOVFstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3188  	for {
  3189  		off1 := auxIntToInt32(v.AuxInt)
  3190  		sym1 := auxToSym(v.Aux)
  3191  		if v_0.Op != OpMIPSMOVWaddr {
  3192  			break
  3193  		}
  3194  		off2 := auxIntToInt32(v_0.AuxInt)
  3195  		sym2 := auxToSym(v_0.Aux)
  3196  		ptr := v_0.Args[0]
  3197  		val := v_1
  3198  		mem := v_2
  3199  		if !(canMergeSym(sym1, sym2)) {
  3200  			break
  3201  		}
  3202  		v.reset(OpMIPSMOVFstore)
  3203  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3204  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3205  		v.AddArg3(ptr, val, mem)
  3206  		return true
  3207  	}
  3208  	return false
  3209  }
  3210  func rewriteValueMIPS_OpMIPSMOVHUload(v *Value) bool {
  3211  	v_1 := v.Args[1]
  3212  	v_0 := v.Args[0]
  3213  	// match: (MOVHUload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3214  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3215  	// result: (MOVHUload [off1+off2] {sym} ptr mem)
  3216  	for {
  3217  		off1 := auxIntToInt32(v.AuxInt)
  3218  		sym := auxToSym(v.Aux)
  3219  		x := v_0
  3220  		if x.Op != OpMIPSADDconst {
  3221  			break
  3222  		}
  3223  		off2 := auxIntToInt32(x.AuxInt)
  3224  		ptr := x.Args[0]
  3225  		mem := v_1
  3226  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3227  			break
  3228  		}
  3229  		v.reset(OpMIPSMOVHUload)
  3230  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3231  		v.Aux = symToAux(sym)
  3232  		v.AddArg2(ptr, mem)
  3233  		return true
  3234  	}
  3235  	// match: (MOVHUload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3236  	// cond: canMergeSym(sym1,sym2)
  3237  	// result: (MOVHUload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3238  	for {
  3239  		off1 := auxIntToInt32(v.AuxInt)
  3240  		sym1 := auxToSym(v.Aux)
  3241  		if v_0.Op != OpMIPSMOVWaddr {
  3242  			break
  3243  		}
  3244  		off2 := auxIntToInt32(v_0.AuxInt)
  3245  		sym2 := auxToSym(v_0.Aux)
  3246  		ptr := v_0.Args[0]
  3247  		mem := v_1
  3248  		if !(canMergeSym(sym1, sym2)) {
  3249  			break
  3250  		}
  3251  		v.reset(OpMIPSMOVHUload)
  3252  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3253  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3254  		v.AddArg2(ptr, mem)
  3255  		return true
  3256  	}
  3257  	// match: (MOVHUload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3258  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3259  	// result: (MOVHUreg x)
  3260  	for {
  3261  		off := auxIntToInt32(v.AuxInt)
  3262  		sym := auxToSym(v.Aux)
  3263  		ptr := v_0
  3264  		if v_1.Op != OpMIPSMOVHstore {
  3265  			break
  3266  		}
  3267  		off2 := auxIntToInt32(v_1.AuxInt)
  3268  		sym2 := auxToSym(v_1.Aux)
  3269  		x := v_1.Args[1]
  3270  		ptr2 := v_1.Args[0]
  3271  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3272  			break
  3273  		}
  3274  		v.reset(OpMIPSMOVHUreg)
  3275  		v.AddArg(x)
  3276  		return true
  3277  	}
  3278  	return false
  3279  }
  3280  func rewriteValueMIPS_OpMIPSMOVHUreg(v *Value) bool {
  3281  	v_0 := v.Args[0]
  3282  	b := v.Block
  3283  	// match: (MOVHUreg x:(MOVBUload _ _))
  3284  	// result: (MOVWreg x)
  3285  	for {
  3286  		x := v_0
  3287  		if x.Op != OpMIPSMOVBUload {
  3288  			break
  3289  		}
  3290  		v.reset(OpMIPSMOVWreg)
  3291  		v.AddArg(x)
  3292  		return true
  3293  	}
  3294  	// match: (MOVHUreg x:(MOVHUload _ _))
  3295  	// result: (MOVWreg x)
  3296  	for {
  3297  		x := v_0
  3298  		if x.Op != OpMIPSMOVHUload {
  3299  			break
  3300  		}
  3301  		v.reset(OpMIPSMOVWreg)
  3302  		v.AddArg(x)
  3303  		return true
  3304  	}
  3305  	// match: (MOVHUreg x:(MOVBUreg _))
  3306  	// result: (MOVWreg x)
  3307  	for {
  3308  		x := v_0
  3309  		if x.Op != OpMIPSMOVBUreg {
  3310  			break
  3311  		}
  3312  		v.reset(OpMIPSMOVWreg)
  3313  		v.AddArg(x)
  3314  		return true
  3315  	}
  3316  	// match: (MOVHUreg x:(MOVHUreg _))
  3317  	// result: (MOVWreg x)
  3318  	for {
  3319  		x := v_0
  3320  		if x.Op != OpMIPSMOVHUreg {
  3321  			break
  3322  		}
  3323  		v.reset(OpMIPSMOVWreg)
  3324  		v.AddArg(x)
  3325  		return true
  3326  	}
  3327  	// match: (MOVHUreg <t> x:(MOVHload [off] {sym} ptr mem))
  3328  	// cond: x.Uses == 1 && clobber(x)
  3329  	// result: @x.Block (MOVHUload <t> [off] {sym} ptr mem)
  3330  	for {
  3331  		t := v.Type
  3332  		x := v_0
  3333  		if x.Op != OpMIPSMOVHload {
  3334  			break
  3335  		}
  3336  		off := auxIntToInt32(x.AuxInt)
  3337  		sym := auxToSym(x.Aux)
  3338  		mem := x.Args[1]
  3339  		ptr := x.Args[0]
  3340  		if !(x.Uses == 1 && clobber(x)) {
  3341  			break
  3342  		}
  3343  		b = x.Block
  3344  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHUload, t)
  3345  		v.copyOf(v0)
  3346  		v0.AuxInt = int32ToAuxInt(off)
  3347  		v0.Aux = symToAux(sym)
  3348  		v0.AddArg2(ptr, mem)
  3349  		return true
  3350  	}
  3351  	// match: (MOVHUreg (ANDconst [c] x))
  3352  	// result: (ANDconst [c&0xffff] x)
  3353  	for {
  3354  		if v_0.Op != OpMIPSANDconst {
  3355  			break
  3356  		}
  3357  		c := auxIntToInt32(v_0.AuxInt)
  3358  		x := v_0.Args[0]
  3359  		v.reset(OpMIPSANDconst)
  3360  		v.AuxInt = int32ToAuxInt(c & 0xffff)
  3361  		v.AddArg(x)
  3362  		return true
  3363  	}
  3364  	// match: (MOVHUreg (MOVWconst [c]))
  3365  	// result: (MOVWconst [int32(uint16(c))])
  3366  	for {
  3367  		if v_0.Op != OpMIPSMOVWconst {
  3368  			break
  3369  		}
  3370  		c := auxIntToInt32(v_0.AuxInt)
  3371  		v.reset(OpMIPSMOVWconst)
  3372  		v.AuxInt = int32ToAuxInt(int32(uint16(c)))
  3373  		return true
  3374  	}
  3375  	return false
  3376  }
  3377  func rewriteValueMIPS_OpMIPSMOVHload(v *Value) bool {
  3378  	v_1 := v.Args[1]
  3379  	v_0 := v.Args[0]
  3380  	// match: (MOVHload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3381  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3382  	// result: (MOVHload [off1+off2] {sym} ptr mem)
  3383  	for {
  3384  		off1 := auxIntToInt32(v.AuxInt)
  3385  		sym := auxToSym(v.Aux)
  3386  		x := v_0
  3387  		if x.Op != OpMIPSADDconst {
  3388  			break
  3389  		}
  3390  		off2 := auxIntToInt32(x.AuxInt)
  3391  		ptr := x.Args[0]
  3392  		mem := v_1
  3393  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3394  			break
  3395  		}
  3396  		v.reset(OpMIPSMOVHload)
  3397  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3398  		v.Aux = symToAux(sym)
  3399  		v.AddArg2(ptr, mem)
  3400  		return true
  3401  	}
  3402  	// match: (MOVHload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3403  	// cond: canMergeSym(sym1,sym2)
  3404  	// result: (MOVHload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3405  	for {
  3406  		off1 := auxIntToInt32(v.AuxInt)
  3407  		sym1 := auxToSym(v.Aux)
  3408  		if v_0.Op != OpMIPSMOVWaddr {
  3409  			break
  3410  		}
  3411  		off2 := auxIntToInt32(v_0.AuxInt)
  3412  		sym2 := auxToSym(v_0.Aux)
  3413  		ptr := v_0.Args[0]
  3414  		mem := v_1
  3415  		if !(canMergeSym(sym1, sym2)) {
  3416  			break
  3417  		}
  3418  		v.reset(OpMIPSMOVHload)
  3419  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3420  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3421  		v.AddArg2(ptr, mem)
  3422  		return true
  3423  	}
  3424  	// match: (MOVHload [off] {sym} ptr (MOVHstore [off2] {sym2} ptr2 x _))
  3425  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3426  	// result: (MOVHreg x)
  3427  	for {
  3428  		off := auxIntToInt32(v.AuxInt)
  3429  		sym := auxToSym(v.Aux)
  3430  		ptr := v_0
  3431  		if v_1.Op != OpMIPSMOVHstore {
  3432  			break
  3433  		}
  3434  		off2 := auxIntToInt32(v_1.AuxInt)
  3435  		sym2 := auxToSym(v_1.Aux)
  3436  		x := v_1.Args[1]
  3437  		ptr2 := v_1.Args[0]
  3438  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3439  			break
  3440  		}
  3441  		v.reset(OpMIPSMOVHreg)
  3442  		v.AddArg(x)
  3443  		return true
  3444  	}
  3445  	return false
  3446  }
  3447  func rewriteValueMIPS_OpMIPSMOVHreg(v *Value) bool {
  3448  	v_0 := v.Args[0]
  3449  	b := v.Block
  3450  	// match: (MOVHreg x:(MOVBload _ _))
  3451  	// result: (MOVWreg x)
  3452  	for {
  3453  		x := v_0
  3454  		if x.Op != OpMIPSMOVBload {
  3455  			break
  3456  		}
  3457  		v.reset(OpMIPSMOVWreg)
  3458  		v.AddArg(x)
  3459  		return true
  3460  	}
  3461  	// match: (MOVHreg x:(MOVBUload _ _))
  3462  	// result: (MOVWreg x)
  3463  	for {
  3464  		x := v_0
  3465  		if x.Op != OpMIPSMOVBUload {
  3466  			break
  3467  		}
  3468  		v.reset(OpMIPSMOVWreg)
  3469  		v.AddArg(x)
  3470  		return true
  3471  	}
  3472  	// match: (MOVHreg x:(MOVHload _ _))
  3473  	// result: (MOVWreg x)
  3474  	for {
  3475  		x := v_0
  3476  		if x.Op != OpMIPSMOVHload {
  3477  			break
  3478  		}
  3479  		v.reset(OpMIPSMOVWreg)
  3480  		v.AddArg(x)
  3481  		return true
  3482  	}
  3483  	// match: (MOVHreg x:(MOVBreg _))
  3484  	// result: (MOVWreg x)
  3485  	for {
  3486  		x := v_0
  3487  		if x.Op != OpMIPSMOVBreg {
  3488  			break
  3489  		}
  3490  		v.reset(OpMIPSMOVWreg)
  3491  		v.AddArg(x)
  3492  		return true
  3493  	}
  3494  	// match: (MOVHreg x:(MOVBUreg _))
  3495  	// result: (MOVWreg x)
  3496  	for {
  3497  		x := v_0
  3498  		if x.Op != OpMIPSMOVBUreg {
  3499  			break
  3500  		}
  3501  		v.reset(OpMIPSMOVWreg)
  3502  		v.AddArg(x)
  3503  		return true
  3504  	}
  3505  	// match: (MOVHreg x:(MOVHreg _))
  3506  	// result: (MOVWreg x)
  3507  	for {
  3508  		x := v_0
  3509  		if x.Op != OpMIPSMOVHreg {
  3510  			break
  3511  		}
  3512  		v.reset(OpMIPSMOVWreg)
  3513  		v.AddArg(x)
  3514  		return true
  3515  	}
  3516  	// match: (MOVHreg <t> x:(MOVHUload [off] {sym} ptr mem))
  3517  	// cond: x.Uses == 1 && clobber(x)
  3518  	// result: @x.Block (MOVHload <t> [off] {sym} ptr mem)
  3519  	for {
  3520  		t := v.Type
  3521  		x := v_0
  3522  		if x.Op != OpMIPSMOVHUload {
  3523  			break
  3524  		}
  3525  		off := auxIntToInt32(x.AuxInt)
  3526  		sym := auxToSym(x.Aux)
  3527  		mem := x.Args[1]
  3528  		ptr := x.Args[0]
  3529  		if !(x.Uses == 1 && clobber(x)) {
  3530  			break
  3531  		}
  3532  		b = x.Block
  3533  		v0 := b.NewValue0(x.Pos, OpMIPSMOVHload, t)
  3534  		v.copyOf(v0)
  3535  		v0.AuxInt = int32ToAuxInt(off)
  3536  		v0.Aux = symToAux(sym)
  3537  		v0.AddArg2(ptr, mem)
  3538  		return true
  3539  	}
  3540  	// match: (MOVHreg (ANDconst [c] x))
  3541  	// cond: c & 0x8000 == 0
  3542  	// result: (ANDconst [c&0x7fff] x)
  3543  	for {
  3544  		if v_0.Op != OpMIPSANDconst {
  3545  			break
  3546  		}
  3547  		c := auxIntToInt32(v_0.AuxInt)
  3548  		x := v_0.Args[0]
  3549  		if !(c&0x8000 == 0) {
  3550  			break
  3551  		}
  3552  		v.reset(OpMIPSANDconst)
  3553  		v.AuxInt = int32ToAuxInt(c & 0x7fff)
  3554  		v.AddArg(x)
  3555  		return true
  3556  	}
  3557  	// match: (MOVHreg (MOVWconst [c]))
  3558  	// result: (MOVWconst [int32(int16(c))])
  3559  	for {
  3560  		if v_0.Op != OpMIPSMOVWconst {
  3561  			break
  3562  		}
  3563  		c := auxIntToInt32(v_0.AuxInt)
  3564  		v.reset(OpMIPSMOVWconst)
  3565  		v.AuxInt = int32ToAuxInt(int32(int16(c)))
  3566  		return true
  3567  	}
  3568  	return false
  3569  }
  3570  func rewriteValueMIPS_OpMIPSMOVHstore(v *Value) bool {
  3571  	v_2 := v.Args[2]
  3572  	v_1 := v.Args[1]
  3573  	v_0 := v.Args[0]
  3574  	// match: (MOVHstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3575  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3576  	// result: (MOVHstore [off1+off2] {sym} ptr val mem)
  3577  	for {
  3578  		off1 := auxIntToInt32(v.AuxInt)
  3579  		sym := auxToSym(v.Aux)
  3580  		x := v_0
  3581  		if x.Op != OpMIPSADDconst {
  3582  			break
  3583  		}
  3584  		off2 := auxIntToInt32(x.AuxInt)
  3585  		ptr := x.Args[0]
  3586  		val := v_1
  3587  		mem := v_2
  3588  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3589  			break
  3590  		}
  3591  		v.reset(OpMIPSMOVHstore)
  3592  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3593  		v.Aux = symToAux(sym)
  3594  		v.AddArg3(ptr, val, mem)
  3595  		return true
  3596  	}
  3597  	// match: (MOVHstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3598  	// cond: canMergeSym(sym1,sym2)
  3599  	// result: (MOVHstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3600  	for {
  3601  		off1 := auxIntToInt32(v.AuxInt)
  3602  		sym1 := auxToSym(v.Aux)
  3603  		if v_0.Op != OpMIPSMOVWaddr {
  3604  			break
  3605  		}
  3606  		off2 := auxIntToInt32(v_0.AuxInt)
  3607  		sym2 := auxToSym(v_0.Aux)
  3608  		ptr := v_0.Args[0]
  3609  		val := v_1
  3610  		mem := v_2
  3611  		if !(canMergeSym(sym1, sym2)) {
  3612  			break
  3613  		}
  3614  		v.reset(OpMIPSMOVHstore)
  3615  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3616  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3617  		v.AddArg3(ptr, val, mem)
  3618  		return true
  3619  	}
  3620  	// match: (MOVHstore [off] {sym} ptr (MOVWconst [0]) mem)
  3621  	// result: (MOVHstorezero [off] {sym} ptr mem)
  3622  	for {
  3623  		off := auxIntToInt32(v.AuxInt)
  3624  		sym := auxToSym(v.Aux)
  3625  		ptr := v_0
  3626  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3627  			break
  3628  		}
  3629  		mem := v_2
  3630  		v.reset(OpMIPSMOVHstorezero)
  3631  		v.AuxInt = int32ToAuxInt(off)
  3632  		v.Aux = symToAux(sym)
  3633  		v.AddArg2(ptr, mem)
  3634  		return true
  3635  	}
  3636  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
  3637  	// result: (MOVHstore [off] {sym} ptr x mem)
  3638  	for {
  3639  		off := auxIntToInt32(v.AuxInt)
  3640  		sym := auxToSym(v.Aux)
  3641  		ptr := v_0
  3642  		if v_1.Op != OpMIPSMOVHreg {
  3643  			break
  3644  		}
  3645  		x := v_1.Args[0]
  3646  		mem := v_2
  3647  		v.reset(OpMIPSMOVHstore)
  3648  		v.AuxInt = int32ToAuxInt(off)
  3649  		v.Aux = symToAux(sym)
  3650  		v.AddArg3(ptr, x, mem)
  3651  		return true
  3652  	}
  3653  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
  3654  	// result: (MOVHstore [off] {sym} ptr x mem)
  3655  	for {
  3656  		off := auxIntToInt32(v.AuxInt)
  3657  		sym := auxToSym(v.Aux)
  3658  		ptr := v_0
  3659  		if v_1.Op != OpMIPSMOVHUreg {
  3660  			break
  3661  		}
  3662  		x := v_1.Args[0]
  3663  		mem := v_2
  3664  		v.reset(OpMIPSMOVHstore)
  3665  		v.AuxInt = int32ToAuxInt(off)
  3666  		v.Aux = symToAux(sym)
  3667  		v.AddArg3(ptr, x, mem)
  3668  		return true
  3669  	}
  3670  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
  3671  	// result: (MOVHstore [off] {sym} ptr x mem)
  3672  	for {
  3673  		off := auxIntToInt32(v.AuxInt)
  3674  		sym := auxToSym(v.Aux)
  3675  		ptr := v_0
  3676  		if v_1.Op != OpMIPSMOVWreg {
  3677  			break
  3678  		}
  3679  		x := v_1.Args[0]
  3680  		mem := v_2
  3681  		v.reset(OpMIPSMOVHstore)
  3682  		v.AuxInt = int32ToAuxInt(off)
  3683  		v.Aux = symToAux(sym)
  3684  		v.AddArg3(ptr, x, mem)
  3685  		return true
  3686  	}
  3687  	return false
  3688  }
  3689  func rewriteValueMIPS_OpMIPSMOVHstorezero(v *Value) bool {
  3690  	v_1 := v.Args[1]
  3691  	v_0 := v.Args[0]
  3692  	// match: (MOVHstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3693  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3694  	// result: (MOVHstorezero [off1+off2] {sym} ptr mem)
  3695  	for {
  3696  		off1 := auxIntToInt32(v.AuxInt)
  3697  		sym := auxToSym(v.Aux)
  3698  		x := v_0
  3699  		if x.Op != OpMIPSADDconst {
  3700  			break
  3701  		}
  3702  		off2 := auxIntToInt32(x.AuxInt)
  3703  		ptr := x.Args[0]
  3704  		mem := v_1
  3705  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3706  			break
  3707  		}
  3708  		v.reset(OpMIPSMOVHstorezero)
  3709  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3710  		v.Aux = symToAux(sym)
  3711  		v.AddArg2(ptr, mem)
  3712  		return true
  3713  	}
  3714  	// match: (MOVHstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3715  	// cond: canMergeSym(sym1,sym2)
  3716  	// result: (MOVHstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3717  	for {
  3718  		off1 := auxIntToInt32(v.AuxInt)
  3719  		sym1 := auxToSym(v.Aux)
  3720  		if v_0.Op != OpMIPSMOVWaddr {
  3721  			break
  3722  		}
  3723  		off2 := auxIntToInt32(v_0.AuxInt)
  3724  		sym2 := auxToSym(v_0.Aux)
  3725  		ptr := v_0.Args[0]
  3726  		mem := v_1
  3727  		if !(canMergeSym(sym1, sym2)) {
  3728  			break
  3729  		}
  3730  		v.reset(OpMIPSMOVHstorezero)
  3731  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3732  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3733  		v.AddArg2(ptr, mem)
  3734  		return true
  3735  	}
  3736  	return false
  3737  }
  3738  func rewriteValueMIPS_OpMIPSMOVWload(v *Value) bool {
  3739  	v_1 := v.Args[1]
  3740  	v_0 := v.Args[0]
  3741  	// match: (MOVWload [off] {sym} ptr (MOVFstore [off] {sym} ptr val _))
  3742  	// result: (MOVWfpgp val)
  3743  	for {
  3744  		off := auxIntToInt32(v.AuxInt)
  3745  		sym := auxToSym(v.Aux)
  3746  		ptr := v_0
  3747  		if v_1.Op != OpMIPSMOVFstore || auxIntToInt32(v_1.AuxInt) != off || auxToSym(v_1.Aux) != sym {
  3748  			break
  3749  		}
  3750  		val := v_1.Args[1]
  3751  		if ptr != v_1.Args[0] {
  3752  			break
  3753  		}
  3754  		v.reset(OpMIPSMOVWfpgp)
  3755  		v.AddArg(val)
  3756  		return true
  3757  	}
  3758  	// match: (MOVWload [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3759  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3760  	// result: (MOVWload [off1+off2] {sym} ptr mem)
  3761  	for {
  3762  		off1 := auxIntToInt32(v.AuxInt)
  3763  		sym := auxToSym(v.Aux)
  3764  		x := v_0
  3765  		if x.Op != OpMIPSADDconst {
  3766  			break
  3767  		}
  3768  		off2 := auxIntToInt32(x.AuxInt)
  3769  		ptr := x.Args[0]
  3770  		mem := v_1
  3771  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3772  			break
  3773  		}
  3774  		v.reset(OpMIPSMOVWload)
  3775  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3776  		v.Aux = symToAux(sym)
  3777  		v.AddArg2(ptr, mem)
  3778  		return true
  3779  	}
  3780  	// match: (MOVWload [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3781  	// cond: canMergeSym(sym1,sym2)
  3782  	// result: (MOVWload [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3783  	for {
  3784  		off1 := auxIntToInt32(v.AuxInt)
  3785  		sym1 := auxToSym(v.Aux)
  3786  		if v_0.Op != OpMIPSMOVWaddr {
  3787  			break
  3788  		}
  3789  		off2 := auxIntToInt32(v_0.AuxInt)
  3790  		sym2 := auxToSym(v_0.Aux)
  3791  		ptr := v_0.Args[0]
  3792  		mem := v_1
  3793  		if !(canMergeSym(sym1, sym2)) {
  3794  			break
  3795  		}
  3796  		v.reset(OpMIPSMOVWload)
  3797  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3798  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3799  		v.AddArg2(ptr, mem)
  3800  		return true
  3801  	}
  3802  	// match: (MOVWload [off] {sym} ptr (MOVWstore [off2] {sym2} ptr2 x _))
  3803  	// cond: sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)
  3804  	// result: x
  3805  	for {
  3806  		off := auxIntToInt32(v.AuxInt)
  3807  		sym := auxToSym(v.Aux)
  3808  		ptr := v_0
  3809  		if v_1.Op != OpMIPSMOVWstore {
  3810  			break
  3811  		}
  3812  		off2 := auxIntToInt32(v_1.AuxInt)
  3813  		sym2 := auxToSym(v_1.Aux)
  3814  		x := v_1.Args[1]
  3815  		ptr2 := v_1.Args[0]
  3816  		if !(sym == sym2 && off == off2 && isSamePtr(ptr, ptr2)) {
  3817  			break
  3818  		}
  3819  		v.copyOf(x)
  3820  		return true
  3821  	}
  3822  	return false
  3823  }
  3824  func rewriteValueMIPS_OpMIPSMOVWnop(v *Value) bool {
  3825  	v_0 := v.Args[0]
  3826  	// match: (MOVWnop (MOVWconst [c]))
  3827  	// result: (MOVWconst [c])
  3828  	for {
  3829  		if v_0.Op != OpMIPSMOVWconst {
  3830  			break
  3831  		}
  3832  		c := auxIntToInt32(v_0.AuxInt)
  3833  		v.reset(OpMIPSMOVWconst)
  3834  		v.AuxInt = int32ToAuxInt(c)
  3835  		return true
  3836  	}
  3837  	return false
  3838  }
  3839  func rewriteValueMIPS_OpMIPSMOVWreg(v *Value) bool {
  3840  	v_0 := v.Args[0]
  3841  	// match: (MOVWreg x)
  3842  	// cond: x.Uses == 1
  3843  	// result: (MOVWnop x)
  3844  	for {
  3845  		x := v_0
  3846  		if !(x.Uses == 1) {
  3847  			break
  3848  		}
  3849  		v.reset(OpMIPSMOVWnop)
  3850  		v.AddArg(x)
  3851  		return true
  3852  	}
  3853  	// match: (MOVWreg (MOVWconst [c]))
  3854  	// result: (MOVWconst [c])
  3855  	for {
  3856  		if v_0.Op != OpMIPSMOVWconst {
  3857  			break
  3858  		}
  3859  		c := auxIntToInt32(v_0.AuxInt)
  3860  		v.reset(OpMIPSMOVWconst)
  3861  		v.AuxInt = int32ToAuxInt(c)
  3862  		return true
  3863  	}
  3864  	return false
  3865  }
  3866  func rewriteValueMIPS_OpMIPSMOVWstore(v *Value) bool {
  3867  	v_2 := v.Args[2]
  3868  	v_1 := v.Args[1]
  3869  	v_0 := v.Args[0]
  3870  	// match: (MOVWstore [off] {sym} ptr (MOVWfpgp val) mem)
  3871  	// result: (MOVFstore [off] {sym} ptr val mem)
  3872  	for {
  3873  		off := auxIntToInt32(v.AuxInt)
  3874  		sym := auxToSym(v.Aux)
  3875  		ptr := v_0
  3876  		if v_1.Op != OpMIPSMOVWfpgp {
  3877  			break
  3878  		}
  3879  		val := v_1.Args[0]
  3880  		mem := v_2
  3881  		v.reset(OpMIPSMOVFstore)
  3882  		v.AuxInt = int32ToAuxInt(off)
  3883  		v.Aux = symToAux(sym)
  3884  		v.AddArg3(ptr, val, mem)
  3885  		return true
  3886  	}
  3887  	// match: (MOVWstore [off1] {sym} x:(ADDconst [off2] ptr) val mem)
  3888  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3889  	// result: (MOVWstore [off1+off2] {sym} ptr val mem)
  3890  	for {
  3891  		off1 := auxIntToInt32(v.AuxInt)
  3892  		sym := auxToSym(v.Aux)
  3893  		x := v_0
  3894  		if x.Op != OpMIPSADDconst {
  3895  			break
  3896  		}
  3897  		off2 := auxIntToInt32(x.AuxInt)
  3898  		ptr := x.Args[0]
  3899  		val := v_1
  3900  		mem := v_2
  3901  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3902  			break
  3903  		}
  3904  		v.reset(OpMIPSMOVWstore)
  3905  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3906  		v.Aux = symToAux(sym)
  3907  		v.AddArg3(ptr, val, mem)
  3908  		return true
  3909  	}
  3910  	// match: (MOVWstore [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) val mem)
  3911  	// cond: canMergeSym(sym1,sym2)
  3912  	// result: (MOVWstore [off1+off2] {mergeSym(sym1,sym2)} ptr val mem)
  3913  	for {
  3914  		off1 := auxIntToInt32(v.AuxInt)
  3915  		sym1 := auxToSym(v.Aux)
  3916  		if v_0.Op != OpMIPSMOVWaddr {
  3917  			break
  3918  		}
  3919  		off2 := auxIntToInt32(v_0.AuxInt)
  3920  		sym2 := auxToSym(v_0.Aux)
  3921  		ptr := v_0.Args[0]
  3922  		val := v_1
  3923  		mem := v_2
  3924  		if !(canMergeSym(sym1, sym2)) {
  3925  			break
  3926  		}
  3927  		v.reset(OpMIPSMOVWstore)
  3928  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3929  		v.Aux = symToAux(mergeSym(sym1, sym2))
  3930  		v.AddArg3(ptr, val, mem)
  3931  		return true
  3932  	}
  3933  	// match: (MOVWstore [off] {sym} ptr (MOVWconst [0]) mem)
  3934  	// result: (MOVWstorezero [off] {sym} ptr mem)
  3935  	for {
  3936  		off := auxIntToInt32(v.AuxInt)
  3937  		sym := auxToSym(v.Aux)
  3938  		ptr := v_0
  3939  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  3940  			break
  3941  		}
  3942  		mem := v_2
  3943  		v.reset(OpMIPSMOVWstorezero)
  3944  		v.AuxInt = int32ToAuxInt(off)
  3945  		v.Aux = symToAux(sym)
  3946  		v.AddArg2(ptr, mem)
  3947  		return true
  3948  	}
  3949  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
  3950  	// result: (MOVWstore [off] {sym} ptr x mem)
  3951  	for {
  3952  		off := auxIntToInt32(v.AuxInt)
  3953  		sym := auxToSym(v.Aux)
  3954  		ptr := v_0
  3955  		if v_1.Op != OpMIPSMOVWreg {
  3956  			break
  3957  		}
  3958  		x := v_1.Args[0]
  3959  		mem := v_2
  3960  		v.reset(OpMIPSMOVWstore)
  3961  		v.AuxInt = int32ToAuxInt(off)
  3962  		v.Aux = symToAux(sym)
  3963  		v.AddArg3(ptr, x, mem)
  3964  		return true
  3965  	}
  3966  	return false
  3967  }
  3968  func rewriteValueMIPS_OpMIPSMOVWstorezero(v *Value) bool {
  3969  	v_1 := v.Args[1]
  3970  	v_0 := v.Args[0]
  3971  	// match: (MOVWstorezero [off1] {sym} x:(ADDconst [off2] ptr) mem)
  3972  	// cond: (is16Bit(int64(off1+off2)) || x.Uses == 1)
  3973  	// result: (MOVWstorezero [off1+off2] {sym} ptr mem)
  3974  	for {
  3975  		off1 := auxIntToInt32(v.AuxInt)
  3976  		sym := auxToSym(v.Aux)
  3977  		x := v_0
  3978  		if x.Op != OpMIPSADDconst {
  3979  			break
  3980  		}
  3981  		off2 := auxIntToInt32(x.AuxInt)
  3982  		ptr := x.Args[0]
  3983  		mem := v_1
  3984  		if !(is16Bit(int64(off1+off2)) || x.Uses == 1) {
  3985  			break
  3986  		}
  3987  		v.reset(OpMIPSMOVWstorezero)
  3988  		v.AuxInt = int32ToAuxInt(off1 + off2)
  3989  		v.Aux = symToAux(sym)
  3990  		v.AddArg2(ptr, mem)
  3991  		return true
  3992  	}
  3993  	// match: (MOVWstorezero [off1] {sym1} (MOVWaddr [off2] {sym2} ptr) mem)
  3994  	// cond: canMergeSym(sym1,sym2)
  3995  	// result: (MOVWstorezero [off1+off2] {mergeSym(sym1,sym2)} ptr mem)
  3996  	for {
  3997  		off1 := auxIntToInt32(v.AuxInt)
  3998  		sym1 := auxToSym(v.Aux)
  3999  		if v_0.Op != OpMIPSMOVWaddr {
  4000  			break
  4001  		}
  4002  		off2 := auxIntToInt32(v_0.AuxInt)
  4003  		sym2 := auxToSym(v_0.Aux)
  4004  		ptr := v_0.Args[0]
  4005  		mem := v_1
  4006  		if !(canMergeSym(sym1, sym2)) {
  4007  			break
  4008  		}
  4009  		v.reset(OpMIPSMOVWstorezero)
  4010  		v.AuxInt = int32ToAuxInt(off1 + off2)
  4011  		v.Aux = symToAux(mergeSym(sym1, sym2))
  4012  		v.AddArg2(ptr, mem)
  4013  		return true
  4014  	}
  4015  	return false
  4016  }
  4017  func rewriteValueMIPS_OpMIPSMUL(v *Value) bool {
  4018  	v_1 := v.Args[1]
  4019  	v_0 := v.Args[0]
  4020  	// match: (MUL (MOVWconst [0]) _ )
  4021  	// result: (MOVWconst [0])
  4022  	for {
  4023  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4024  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4025  				continue
  4026  			}
  4027  			v.reset(OpMIPSMOVWconst)
  4028  			v.AuxInt = int32ToAuxInt(0)
  4029  			return true
  4030  		}
  4031  		break
  4032  	}
  4033  	// match: (MUL (MOVWconst [1]) x )
  4034  	// result: x
  4035  	for {
  4036  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4037  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 1 {
  4038  				continue
  4039  			}
  4040  			x := v_1
  4041  			v.copyOf(x)
  4042  			return true
  4043  		}
  4044  		break
  4045  	}
  4046  	// match: (MUL (MOVWconst [-1]) x )
  4047  	// result: (NEG x)
  4048  	for {
  4049  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4050  			if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != -1 {
  4051  				continue
  4052  			}
  4053  			x := v_1
  4054  			v.reset(OpMIPSNEG)
  4055  			v.AddArg(x)
  4056  			return true
  4057  		}
  4058  		break
  4059  	}
  4060  	// match: (MUL (MOVWconst [c]) x )
  4061  	// cond: isPowerOfTwo(int64(uint32(c)))
  4062  	// result: (SLLconst [int32(log2uint32(int64(c)))] x)
  4063  	for {
  4064  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4065  			if v_0.Op != OpMIPSMOVWconst {
  4066  				continue
  4067  			}
  4068  			c := auxIntToInt32(v_0.AuxInt)
  4069  			x := v_1
  4070  			if !(isPowerOfTwo(int64(uint32(c)))) {
  4071  				continue
  4072  			}
  4073  			v.reset(OpMIPSSLLconst)
  4074  			v.AuxInt = int32ToAuxInt(int32(log2uint32(int64(c))))
  4075  			v.AddArg(x)
  4076  			return true
  4077  		}
  4078  		break
  4079  	}
  4080  	// match: (MUL (MOVWconst [c]) (MOVWconst [d]))
  4081  	// result: (MOVWconst [c*d])
  4082  	for {
  4083  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4084  			if v_0.Op != OpMIPSMOVWconst {
  4085  				continue
  4086  			}
  4087  			c := auxIntToInt32(v_0.AuxInt)
  4088  			if v_1.Op != OpMIPSMOVWconst {
  4089  				continue
  4090  			}
  4091  			d := auxIntToInt32(v_1.AuxInt)
  4092  			v.reset(OpMIPSMOVWconst)
  4093  			v.AuxInt = int32ToAuxInt(c * d)
  4094  			return true
  4095  		}
  4096  		break
  4097  	}
  4098  	return false
  4099  }
  4100  func rewriteValueMIPS_OpMIPSNEG(v *Value) bool {
  4101  	v_0 := v.Args[0]
  4102  	// match: (NEG (SUB x y))
  4103  	// result: (SUB y x)
  4104  	for {
  4105  		if v_0.Op != OpMIPSSUB {
  4106  			break
  4107  		}
  4108  		y := v_0.Args[1]
  4109  		x := v_0.Args[0]
  4110  		v.reset(OpMIPSSUB)
  4111  		v.AddArg2(y, x)
  4112  		return true
  4113  	}
  4114  	// match: (NEG (NEG x))
  4115  	// result: x
  4116  	for {
  4117  		if v_0.Op != OpMIPSNEG {
  4118  			break
  4119  		}
  4120  		x := v_0.Args[0]
  4121  		v.copyOf(x)
  4122  		return true
  4123  	}
  4124  	// match: (NEG (MOVWconst [c]))
  4125  	// result: (MOVWconst [-c])
  4126  	for {
  4127  		if v_0.Op != OpMIPSMOVWconst {
  4128  			break
  4129  		}
  4130  		c := auxIntToInt32(v_0.AuxInt)
  4131  		v.reset(OpMIPSMOVWconst)
  4132  		v.AuxInt = int32ToAuxInt(-c)
  4133  		return true
  4134  	}
  4135  	return false
  4136  }
  4137  func rewriteValueMIPS_OpMIPSNOR(v *Value) bool {
  4138  	v_1 := v.Args[1]
  4139  	v_0 := v.Args[0]
  4140  	// match: (NOR x (MOVWconst [c]))
  4141  	// result: (NORconst [c] x)
  4142  	for {
  4143  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4144  			x := v_0
  4145  			if v_1.Op != OpMIPSMOVWconst {
  4146  				continue
  4147  			}
  4148  			c := auxIntToInt32(v_1.AuxInt)
  4149  			v.reset(OpMIPSNORconst)
  4150  			v.AuxInt = int32ToAuxInt(c)
  4151  			v.AddArg(x)
  4152  			return true
  4153  		}
  4154  		break
  4155  	}
  4156  	return false
  4157  }
  4158  func rewriteValueMIPS_OpMIPSNORconst(v *Value) bool {
  4159  	v_0 := v.Args[0]
  4160  	// match: (NORconst [c] (MOVWconst [d]))
  4161  	// result: (MOVWconst [^(c|d)])
  4162  	for {
  4163  		c := auxIntToInt32(v.AuxInt)
  4164  		if v_0.Op != OpMIPSMOVWconst {
  4165  			break
  4166  		}
  4167  		d := auxIntToInt32(v_0.AuxInt)
  4168  		v.reset(OpMIPSMOVWconst)
  4169  		v.AuxInt = int32ToAuxInt(^(c | d))
  4170  		return true
  4171  	}
  4172  	return false
  4173  }
  4174  func rewriteValueMIPS_OpMIPSOR(v *Value) bool {
  4175  	v_1 := v.Args[1]
  4176  	v_0 := v.Args[0]
  4177  	b := v.Block
  4178  	// match: (OR x (MOVWconst [c]))
  4179  	// result: (ORconst [c] x)
  4180  	for {
  4181  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4182  			x := v_0
  4183  			if v_1.Op != OpMIPSMOVWconst {
  4184  				continue
  4185  			}
  4186  			c := auxIntToInt32(v_1.AuxInt)
  4187  			v.reset(OpMIPSORconst)
  4188  			v.AuxInt = int32ToAuxInt(c)
  4189  			v.AddArg(x)
  4190  			return true
  4191  		}
  4192  		break
  4193  	}
  4194  	// match: (OR x x)
  4195  	// result: x
  4196  	for {
  4197  		x := v_0
  4198  		if x != v_1 {
  4199  			break
  4200  		}
  4201  		v.copyOf(x)
  4202  		return true
  4203  	}
  4204  	// match: (OR (SGTUzero x) (SGTUzero y))
  4205  	// result: (SGTUzero (OR <x.Type> x y))
  4206  	for {
  4207  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4208  			if v_0.Op != OpMIPSSGTUzero {
  4209  				continue
  4210  			}
  4211  			x := v_0.Args[0]
  4212  			if v_1.Op != OpMIPSSGTUzero {
  4213  				continue
  4214  			}
  4215  			y := v_1.Args[0]
  4216  			v.reset(OpMIPSSGTUzero)
  4217  			v0 := b.NewValue0(v.Pos, OpMIPSOR, x.Type)
  4218  			v0.AddArg2(x, y)
  4219  			v.AddArg(v0)
  4220  			return true
  4221  		}
  4222  		break
  4223  	}
  4224  	return false
  4225  }
  4226  func rewriteValueMIPS_OpMIPSORconst(v *Value) bool {
  4227  	v_0 := v.Args[0]
  4228  	// match: (ORconst [0] x)
  4229  	// result: x
  4230  	for {
  4231  		if auxIntToInt32(v.AuxInt) != 0 {
  4232  			break
  4233  		}
  4234  		x := v_0
  4235  		v.copyOf(x)
  4236  		return true
  4237  	}
  4238  	// match: (ORconst [-1] _)
  4239  	// result: (MOVWconst [-1])
  4240  	for {
  4241  		if auxIntToInt32(v.AuxInt) != -1 {
  4242  			break
  4243  		}
  4244  		v.reset(OpMIPSMOVWconst)
  4245  		v.AuxInt = int32ToAuxInt(-1)
  4246  		return true
  4247  	}
  4248  	// match: (ORconst [c] (MOVWconst [d]))
  4249  	// result: (MOVWconst [c|d])
  4250  	for {
  4251  		c := auxIntToInt32(v.AuxInt)
  4252  		if v_0.Op != OpMIPSMOVWconst {
  4253  			break
  4254  		}
  4255  		d := auxIntToInt32(v_0.AuxInt)
  4256  		v.reset(OpMIPSMOVWconst)
  4257  		v.AuxInt = int32ToAuxInt(c | d)
  4258  		return true
  4259  	}
  4260  	// match: (ORconst [c] (ORconst [d] x))
  4261  	// result: (ORconst [c|d] x)
  4262  	for {
  4263  		c := auxIntToInt32(v.AuxInt)
  4264  		if v_0.Op != OpMIPSORconst {
  4265  			break
  4266  		}
  4267  		d := auxIntToInt32(v_0.AuxInt)
  4268  		x := v_0.Args[0]
  4269  		v.reset(OpMIPSORconst)
  4270  		v.AuxInt = int32ToAuxInt(c | d)
  4271  		v.AddArg(x)
  4272  		return true
  4273  	}
  4274  	return false
  4275  }
  4276  func rewriteValueMIPS_OpMIPSSGT(v *Value) bool {
  4277  	v_1 := v.Args[1]
  4278  	v_0 := v.Args[0]
  4279  	// match: (SGT (MOVWconst [c]) x)
  4280  	// result: (SGTconst [c] x)
  4281  	for {
  4282  		if v_0.Op != OpMIPSMOVWconst {
  4283  			break
  4284  		}
  4285  		c := auxIntToInt32(v_0.AuxInt)
  4286  		x := v_1
  4287  		v.reset(OpMIPSSGTconst)
  4288  		v.AuxInt = int32ToAuxInt(c)
  4289  		v.AddArg(x)
  4290  		return true
  4291  	}
  4292  	// match: (SGT x (MOVWconst [0]))
  4293  	// result: (SGTzero x)
  4294  	for {
  4295  		x := v_0
  4296  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4297  			break
  4298  		}
  4299  		v.reset(OpMIPSSGTzero)
  4300  		v.AddArg(x)
  4301  		return true
  4302  	}
  4303  	return false
  4304  }
  4305  func rewriteValueMIPS_OpMIPSSGTU(v *Value) bool {
  4306  	v_1 := v.Args[1]
  4307  	v_0 := v.Args[0]
  4308  	// match: (SGTU (MOVWconst [c]) x)
  4309  	// result: (SGTUconst [c] x)
  4310  	for {
  4311  		if v_0.Op != OpMIPSMOVWconst {
  4312  			break
  4313  		}
  4314  		c := auxIntToInt32(v_0.AuxInt)
  4315  		x := v_1
  4316  		v.reset(OpMIPSSGTUconst)
  4317  		v.AuxInt = int32ToAuxInt(c)
  4318  		v.AddArg(x)
  4319  		return true
  4320  	}
  4321  	// match: (SGTU x (MOVWconst [0]))
  4322  	// result: (SGTUzero x)
  4323  	for {
  4324  		x := v_0
  4325  		if v_1.Op != OpMIPSMOVWconst || auxIntToInt32(v_1.AuxInt) != 0 {
  4326  			break
  4327  		}
  4328  		v.reset(OpMIPSSGTUzero)
  4329  		v.AddArg(x)
  4330  		return true
  4331  	}
  4332  	return false
  4333  }
  4334  func rewriteValueMIPS_OpMIPSSGTUconst(v *Value) bool {
  4335  	v_0 := v.Args[0]
  4336  	// match: (SGTUconst [c] (MOVWconst [d]))
  4337  	// cond: uint32(c) > uint32(d)
  4338  	// result: (MOVWconst [1])
  4339  	for {
  4340  		c := auxIntToInt32(v.AuxInt)
  4341  		if v_0.Op != OpMIPSMOVWconst {
  4342  			break
  4343  		}
  4344  		d := auxIntToInt32(v_0.AuxInt)
  4345  		if !(uint32(c) > uint32(d)) {
  4346  			break
  4347  		}
  4348  		v.reset(OpMIPSMOVWconst)
  4349  		v.AuxInt = int32ToAuxInt(1)
  4350  		return true
  4351  	}
  4352  	// match: (SGTUconst [c] (MOVWconst [d]))
  4353  	// cond: uint32(c) <= uint32(d)
  4354  	// result: (MOVWconst [0])
  4355  	for {
  4356  		c := auxIntToInt32(v.AuxInt)
  4357  		if v_0.Op != OpMIPSMOVWconst {
  4358  			break
  4359  		}
  4360  		d := auxIntToInt32(v_0.AuxInt)
  4361  		if !(uint32(c) <= uint32(d)) {
  4362  			break
  4363  		}
  4364  		v.reset(OpMIPSMOVWconst)
  4365  		v.AuxInt = int32ToAuxInt(0)
  4366  		return true
  4367  	}
  4368  	// match: (SGTUconst [c] (MOVBUreg _))
  4369  	// cond: 0xff < uint32(c)
  4370  	// result: (MOVWconst [1])
  4371  	for {
  4372  		c := auxIntToInt32(v.AuxInt)
  4373  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < uint32(c)) {
  4374  			break
  4375  		}
  4376  		v.reset(OpMIPSMOVWconst)
  4377  		v.AuxInt = int32ToAuxInt(1)
  4378  		return true
  4379  	}
  4380  	// match: (SGTUconst [c] (MOVHUreg _))
  4381  	// cond: 0xffff < uint32(c)
  4382  	// result: (MOVWconst [1])
  4383  	for {
  4384  		c := auxIntToInt32(v.AuxInt)
  4385  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < uint32(c)) {
  4386  			break
  4387  		}
  4388  		v.reset(OpMIPSMOVWconst)
  4389  		v.AuxInt = int32ToAuxInt(1)
  4390  		return true
  4391  	}
  4392  	// match: (SGTUconst [c] (ANDconst [m] _))
  4393  	// cond: uint32(m) < uint32(c)
  4394  	// result: (MOVWconst [1])
  4395  	for {
  4396  		c := auxIntToInt32(v.AuxInt)
  4397  		if v_0.Op != OpMIPSANDconst {
  4398  			break
  4399  		}
  4400  		m := auxIntToInt32(v_0.AuxInt)
  4401  		if !(uint32(m) < uint32(c)) {
  4402  			break
  4403  		}
  4404  		v.reset(OpMIPSMOVWconst)
  4405  		v.AuxInt = int32ToAuxInt(1)
  4406  		return true
  4407  	}
  4408  	// match: (SGTUconst [c] (SRLconst _ [d]))
  4409  	// cond: uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4410  	// result: (MOVWconst [1])
  4411  	for {
  4412  		c := auxIntToInt32(v.AuxInt)
  4413  		if v_0.Op != OpMIPSSRLconst {
  4414  			break
  4415  		}
  4416  		d := auxIntToInt32(v_0.AuxInt)
  4417  		if !(uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4418  			break
  4419  		}
  4420  		v.reset(OpMIPSMOVWconst)
  4421  		v.AuxInt = int32ToAuxInt(1)
  4422  		return true
  4423  	}
  4424  	return false
  4425  }
  4426  func rewriteValueMIPS_OpMIPSSGTUzero(v *Value) bool {
  4427  	v_0 := v.Args[0]
  4428  	// match: (SGTUzero (MOVWconst [d]))
  4429  	// cond: d != 0
  4430  	// result: (MOVWconst [1])
  4431  	for {
  4432  		if v_0.Op != OpMIPSMOVWconst {
  4433  			break
  4434  		}
  4435  		d := auxIntToInt32(v_0.AuxInt)
  4436  		if !(d != 0) {
  4437  			break
  4438  		}
  4439  		v.reset(OpMIPSMOVWconst)
  4440  		v.AuxInt = int32ToAuxInt(1)
  4441  		return true
  4442  	}
  4443  	// match: (SGTUzero (MOVWconst [d]))
  4444  	// cond: d == 0
  4445  	// result: (MOVWconst [0])
  4446  	for {
  4447  		if v_0.Op != OpMIPSMOVWconst {
  4448  			break
  4449  		}
  4450  		d := auxIntToInt32(v_0.AuxInt)
  4451  		if !(d == 0) {
  4452  			break
  4453  		}
  4454  		v.reset(OpMIPSMOVWconst)
  4455  		v.AuxInt = int32ToAuxInt(0)
  4456  		return true
  4457  	}
  4458  	return false
  4459  }
  4460  func rewriteValueMIPS_OpMIPSSGTconst(v *Value) bool {
  4461  	v_0 := v.Args[0]
  4462  	// match: (SGTconst [c] (MOVWconst [d]))
  4463  	// cond: c > d
  4464  	// result: (MOVWconst [1])
  4465  	for {
  4466  		c := auxIntToInt32(v.AuxInt)
  4467  		if v_0.Op != OpMIPSMOVWconst {
  4468  			break
  4469  		}
  4470  		d := auxIntToInt32(v_0.AuxInt)
  4471  		if !(c > d) {
  4472  			break
  4473  		}
  4474  		v.reset(OpMIPSMOVWconst)
  4475  		v.AuxInt = int32ToAuxInt(1)
  4476  		return true
  4477  	}
  4478  	// match: (SGTconst [c] (MOVWconst [d]))
  4479  	// cond: c <= d
  4480  	// result: (MOVWconst [0])
  4481  	for {
  4482  		c := auxIntToInt32(v.AuxInt)
  4483  		if v_0.Op != OpMIPSMOVWconst {
  4484  			break
  4485  		}
  4486  		d := auxIntToInt32(v_0.AuxInt)
  4487  		if !(c <= d) {
  4488  			break
  4489  		}
  4490  		v.reset(OpMIPSMOVWconst)
  4491  		v.AuxInt = int32ToAuxInt(0)
  4492  		return true
  4493  	}
  4494  	// match: (SGTconst [c] (MOVBreg _))
  4495  	// cond: 0x7f < c
  4496  	// result: (MOVWconst [1])
  4497  	for {
  4498  		c := auxIntToInt32(v.AuxInt)
  4499  		if v_0.Op != OpMIPSMOVBreg || !(0x7f < c) {
  4500  			break
  4501  		}
  4502  		v.reset(OpMIPSMOVWconst)
  4503  		v.AuxInt = int32ToAuxInt(1)
  4504  		return true
  4505  	}
  4506  	// match: (SGTconst [c] (MOVBreg _))
  4507  	// cond: c <= -0x80
  4508  	// result: (MOVWconst [0])
  4509  	for {
  4510  		c := auxIntToInt32(v.AuxInt)
  4511  		if v_0.Op != OpMIPSMOVBreg || !(c <= -0x80) {
  4512  			break
  4513  		}
  4514  		v.reset(OpMIPSMOVWconst)
  4515  		v.AuxInt = int32ToAuxInt(0)
  4516  		return true
  4517  	}
  4518  	// match: (SGTconst [c] (MOVBUreg _))
  4519  	// cond: 0xff < c
  4520  	// result: (MOVWconst [1])
  4521  	for {
  4522  		c := auxIntToInt32(v.AuxInt)
  4523  		if v_0.Op != OpMIPSMOVBUreg || !(0xff < c) {
  4524  			break
  4525  		}
  4526  		v.reset(OpMIPSMOVWconst)
  4527  		v.AuxInt = int32ToAuxInt(1)
  4528  		return true
  4529  	}
  4530  	// match: (SGTconst [c] (MOVBUreg _))
  4531  	// cond: c < 0
  4532  	// result: (MOVWconst [0])
  4533  	for {
  4534  		c := auxIntToInt32(v.AuxInt)
  4535  		if v_0.Op != OpMIPSMOVBUreg || !(c < 0) {
  4536  			break
  4537  		}
  4538  		v.reset(OpMIPSMOVWconst)
  4539  		v.AuxInt = int32ToAuxInt(0)
  4540  		return true
  4541  	}
  4542  	// match: (SGTconst [c] (MOVHreg _))
  4543  	// cond: 0x7fff < c
  4544  	// result: (MOVWconst [1])
  4545  	for {
  4546  		c := auxIntToInt32(v.AuxInt)
  4547  		if v_0.Op != OpMIPSMOVHreg || !(0x7fff < c) {
  4548  			break
  4549  		}
  4550  		v.reset(OpMIPSMOVWconst)
  4551  		v.AuxInt = int32ToAuxInt(1)
  4552  		return true
  4553  	}
  4554  	// match: (SGTconst [c] (MOVHreg _))
  4555  	// cond: c <= -0x8000
  4556  	// result: (MOVWconst [0])
  4557  	for {
  4558  		c := auxIntToInt32(v.AuxInt)
  4559  		if v_0.Op != OpMIPSMOVHreg || !(c <= -0x8000) {
  4560  			break
  4561  		}
  4562  		v.reset(OpMIPSMOVWconst)
  4563  		v.AuxInt = int32ToAuxInt(0)
  4564  		return true
  4565  	}
  4566  	// match: (SGTconst [c] (MOVHUreg _))
  4567  	// cond: 0xffff < c
  4568  	// result: (MOVWconst [1])
  4569  	for {
  4570  		c := auxIntToInt32(v.AuxInt)
  4571  		if v_0.Op != OpMIPSMOVHUreg || !(0xffff < c) {
  4572  			break
  4573  		}
  4574  		v.reset(OpMIPSMOVWconst)
  4575  		v.AuxInt = int32ToAuxInt(1)
  4576  		return true
  4577  	}
  4578  	// match: (SGTconst [c] (MOVHUreg _))
  4579  	// cond: c < 0
  4580  	// result: (MOVWconst [0])
  4581  	for {
  4582  		c := auxIntToInt32(v.AuxInt)
  4583  		if v_0.Op != OpMIPSMOVHUreg || !(c < 0) {
  4584  			break
  4585  		}
  4586  		v.reset(OpMIPSMOVWconst)
  4587  		v.AuxInt = int32ToAuxInt(0)
  4588  		return true
  4589  	}
  4590  	// match: (SGTconst [c] (ANDconst [m] _))
  4591  	// cond: 0 <= m && m < c
  4592  	// result: (MOVWconst [1])
  4593  	for {
  4594  		c := auxIntToInt32(v.AuxInt)
  4595  		if v_0.Op != OpMIPSANDconst {
  4596  			break
  4597  		}
  4598  		m := auxIntToInt32(v_0.AuxInt)
  4599  		if !(0 <= m && m < c) {
  4600  			break
  4601  		}
  4602  		v.reset(OpMIPSMOVWconst)
  4603  		v.AuxInt = int32ToAuxInt(1)
  4604  		return true
  4605  	}
  4606  	// match: (SGTconst [c] (SRLconst _ [d]))
  4607  	// cond: 0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)
  4608  	// result: (MOVWconst [1])
  4609  	for {
  4610  		c := auxIntToInt32(v.AuxInt)
  4611  		if v_0.Op != OpMIPSSRLconst {
  4612  			break
  4613  		}
  4614  		d := auxIntToInt32(v_0.AuxInt)
  4615  		if !(0 <= c && uint32(d) <= 31 && 0xffffffff>>uint32(d) < uint32(c)) {
  4616  			break
  4617  		}
  4618  		v.reset(OpMIPSMOVWconst)
  4619  		v.AuxInt = int32ToAuxInt(1)
  4620  		return true
  4621  	}
  4622  	return false
  4623  }
  4624  func rewriteValueMIPS_OpMIPSSGTzero(v *Value) bool {
  4625  	v_0 := v.Args[0]
  4626  	// match: (SGTzero (MOVWconst [d]))
  4627  	// cond: d > 0
  4628  	// result: (MOVWconst [1])
  4629  	for {
  4630  		if v_0.Op != OpMIPSMOVWconst {
  4631  			break
  4632  		}
  4633  		d := auxIntToInt32(v_0.AuxInt)
  4634  		if !(d > 0) {
  4635  			break
  4636  		}
  4637  		v.reset(OpMIPSMOVWconst)
  4638  		v.AuxInt = int32ToAuxInt(1)
  4639  		return true
  4640  	}
  4641  	// match: (SGTzero (MOVWconst [d]))
  4642  	// cond: d <= 0
  4643  	// result: (MOVWconst [0])
  4644  	for {
  4645  		if v_0.Op != OpMIPSMOVWconst {
  4646  			break
  4647  		}
  4648  		d := auxIntToInt32(v_0.AuxInt)
  4649  		if !(d <= 0) {
  4650  			break
  4651  		}
  4652  		v.reset(OpMIPSMOVWconst)
  4653  		v.AuxInt = int32ToAuxInt(0)
  4654  		return true
  4655  	}
  4656  	return false
  4657  }
  4658  func rewriteValueMIPS_OpMIPSSLL(v *Value) bool {
  4659  	v_1 := v.Args[1]
  4660  	v_0 := v.Args[0]
  4661  	// match: (SLL x (MOVWconst [c]))
  4662  	// result: (SLLconst x [c&31])
  4663  	for {
  4664  		x := v_0
  4665  		if v_1.Op != OpMIPSMOVWconst {
  4666  			break
  4667  		}
  4668  		c := auxIntToInt32(v_1.AuxInt)
  4669  		v.reset(OpMIPSSLLconst)
  4670  		v.AuxInt = int32ToAuxInt(c & 31)
  4671  		v.AddArg(x)
  4672  		return true
  4673  	}
  4674  	return false
  4675  }
  4676  func rewriteValueMIPS_OpMIPSSLLconst(v *Value) bool {
  4677  	v_0 := v.Args[0]
  4678  	// match: (SLLconst [c] (MOVWconst [d]))
  4679  	// result: (MOVWconst [d<<uint32(c)])
  4680  	for {
  4681  		c := auxIntToInt32(v.AuxInt)
  4682  		if v_0.Op != OpMIPSMOVWconst {
  4683  			break
  4684  		}
  4685  		d := auxIntToInt32(v_0.AuxInt)
  4686  		v.reset(OpMIPSMOVWconst)
  4687  		v.AuxInt = int32ToAuxInt(d << uint32(c))
  4688  		return true
  4689  	}
  4690  	return false
  4691  }
  4692  func rewriteValueMIPS_OpMIPSSRA(v *Value) bool {
  4693  	v_1 := v.Args[1]
  4694  	v_0 := v.Args[0]
  4695  	// match: (SRA x (MOVWconst [c]))
  4696  	// result: (SRAconst x [c&31])
  4697  	for {
  4698  		x := v_0
  4699  		if v_1.Op != OpMIPSMOVWconst {
  4700  			break
  4701  		}
  4702  		c := auxIntToInt32(v_1.AuxInt)
  4703  		v.reset(OpMIPSSRAconst)
  4704  		v.AuxInt = int32ToAuxInt(c & 31)
  4705  		v.AddArg(x)
  4706  		return true
  4707  	}
  4708  	return false
  4709  }
  4710  func rewriteValueMIPS_OpMIPSSRAconst(v *Value) bool {
  4711  	v_0 := v.Args[0]
  4712  	// match: (SRAconst [c] (MOVWconst [d]))
  4713  	// result: (MOVWconst [d>>uint32(c)])
  4714  	for {
  4715  		c := auxIntToInt32(v.AuxInt)
  4716  		if v_0.Op != OpMIPSMOVWconst {
  4717  			break
  4718  		}
  4719  		d := auxIntToInt32(v_0.AuxInt)
  4720  		v.reset(OpMIPSMOVWconst)
  4721  		v.AuxInt = int32ToAuxInt(d >> uint32(c))
  4722  		return true
  4723  	}
  4724  	return false
  4725  }
  4726  func rewriteValueMIPS_OpMIPSSRL(v *Value) bool {
  4727  	v_1 := v.Args[1]
  4728  	v_0 := v.Args[0]
  4729  	// match: (SRL x (MOVWconst [c]))
  4730  	// result: (SRLconst x [c&31])
  4731  	for {
  4732  		x := v_0
  4733  		if v_1.Op != OpMIPSMOVWconst {
  4734  			break
  4735  		}
  4736  		c := auxIntToInt32(v_1.AuxInt)
  4737  		v.reset(OpMIPSSRLconst)
  4738  		v.AuxInt = int32ToAuxInt(c & 31)
  4739  		v.AddArg(x)
  4740  		return true
  4741  	}
  4742  	return false
  4743  }
  4744  func rewriteValueMIPS_OpMIPSSRLconst(v *Value) bool {
  4745  	v_0 := v.Args[0]
  4746  	// match: (SRLconst [c] (MOVWconst [d]))
  4747  	// result: (MOVWconst [int32(uint32(d)>>uint32(c))])
  4748  	for {
  4749  		c := auxIntToInt32(v.AuxInt)
  4750  		if v_0.Op != OpMIPSMOVWconst {
  4751  			break
  4752  		}
  4753  		d := auxIntToInt32(v_0.AuxInt)
  4754  		v.reset(OpMIPSMOVWconst)
  4755  		v.AuxInt = int32ToAuxInt(int32(uint32(d) >> uint32(c)))
  4756  		return true
  4757  	}
  4758  	return false
  4759  }
  4760  func rewriteValueMIPS_OpMIPSSUB(v *Value) bool {
  4761  	v_1 := v.Args[1]
  4762  	v_0 := v.Args[0]
  4763  	// match: (SUB x (MOVWconst [c]))
  4764  	// result: (SUBconst [c] x)
  4765  	for {
  4766  		x := v_0
  4767  		if v_1.Op != OpMIPSMOVWconst {
  4768  			break
  4769  		}
  4770  		c := auxIntToInt32(v_1.AuxInt)
  4771  		v.reset(OpMIPSSUBconst)
  4772  		v.AuxInt = int32ToAuxInt(c)
  4773  		v.AddArg(x)
  4774  		return true
  4775  	}
  4776  	// match: (SUB x (NEG y))
  4777  	// result: (ADD x y)
  4778  	for {
  4779  		x := v_0
  4780  		if v_1.Op != OpMIPSNEG {
  4781  			break
  4782  		}
  4783  		y := v_1.Args[0]
  4784  		v.reset(OpMIPSADD)
  4785  		v.AddArg2(x, y)
  4786  		return true
  4787  	}
  4788  	// match: (SUB x x)
  4789  	// result: (MOVWconst [0])
  4790  	for {
  4791  		x := v_0
  4792  		if x != v_1 {
  4793  			break
  4794  		}
  4795  		v.reset(OpMIPSMOVWconst)
  4796  		v.AuxInt = int32ToAuxInt(0)
  4797  		return true
  4798  	}
  4799  	// match: (SUB (MOVWconst [0]) x)
  4800  	// result: (NEG x)
  4801  	for {
  4802  		if v_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0.AuxInt) != 0 {
  4803  			break
  4804  		}
  4805  		x := v_1
  4806  		v.reset(OpMIPSNEG)
  4807  		v.AddArg(x)
  4808  		return true
  4809  	}
  4810  	return false
  4811  }
  4812  func rewriteValueMIPS_OpMIPSSUBconst(v *Value) bool {
  4813  	v_0 := v.Args[0]
  4814  	// match: (SUBconst [0] x)
  4815  	// result: x
  4816  	for {
  4817  		if auxIntToInt32(v.AuxInt) != 0 {
  4818  			break
  4819  		}
  4820  		x := v_0
  4821  		v.copyOf(x)
  4822  		return true
  4823  	}
  4824  	// match: (SUBconst [c] (MOVWconst [d]))
  4825  	// result: (MOVWconst [d-c])
  4826  	for {
  4827  		c := auxIntToInt32(v.AuxInt)
  4828  		if v_0.Op != OpMIPSMOVWconst {
  4829  			break
  4830  		}
  4831  		d := auxIntToInt32(v_0.AuxInt)
  4832  		v.reset(OpMIPSMOVWconst)
  4833  		v.AuxInt = int32ToAuxInt(d - c)
  4834  		return true
  4835  	}
  4836  	// match: (SUBconst [c] (SUBconst [d] x))
  4837  	// result: (ADDconst [-c-d] x)
  4838  	for {
  4839  		c := auxIntToInt32(v.AuxInt)
  4840  		if v_0.Op != OpMIPSSUBconst {
  4841  			break
  4842  		}
  4843  		d := auxIntToInt32(v_0.AuxInt)
  4844  		x := v_0.Args[0]
  4845  		v.reset(OpMIPSADDconst)
  4846  		v.AuxInt = int32ToAuxInt(-c - d)
  4847  		v.AddArg(x)
  4848  		return true
  4849  	}
  4850  	// match: (SUBconst [c] (ADDconst [d] x))
  4851  	// result: (ADDconst [-c+d] x)
  4852  	for {
  4853  		c := auxIntToInt32(v.AuxInt)
  4854  		if v_0.Op != OpMIPSADDconst {
  4855  			break
  4856  		}
  4857  		d := auxIntToInt32(v_0.AuxInt)
  4858  		x := v_0.Args[0]
  4859  		v.reset(OpMIPSADDconst)
  4860  		v.AuxInt = int32ToAuxInt(-c + d)
  4861  		v.AddArg(x)
  4862  		return true
  4863  	}
  4864  	return false
  4865  }
  4866  func rewriteValueMIPS_OpMIPSXOR(v *Value) bool {
  4867  	v_1 := v.Args[1]
  4868  	v_0 := v.Args[0]
  4869  	// match: (XOR x (MOVWconst [c]))
  4870  	// result: (XORconst [c] x)
  4871  	for {
  4872  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4873  			x := v_0
  4874  			if v_1.Op != OpMIPSMOVWconst {
  4875  				continue
  4876  			}
  4877  			c := auxIntToInt32(v_1.AuxInt)
  4878  			v.reset(OpMIPSXORconst)
  4879  			v.AuxInt = int32ToAuxInt(c)
  4880  			v.AddArg(x)
  4881  			return true
  4882  		}
  4883  		break
  4884  	}
  4885  	// match: (XOR x x)
  4886  	// result: (MOVWconst [0])
  4887  	for {
  4888  		x := v_0
  4889  		if x != v_1 {
  4890  			break
  4891  		}
  4892  		v.reset(OpMIPSMOVWconst)
  4893  		v.AuxInt = int32ToAuxInt(0)
  4894  		return true
  4895  	}
  4896  	return false
  4897  }
  4898  func rewriteValueMIPS_OpMIPSXORconst(v *Value) bool {
  4899  	v_0 := v.Args[0]
  4900  	// match: (XORconst [0] x)
  4901  	// result: x
  4902  	for {
  4903  		if auxIntToInt32(v.AuxInt) != 0 {
  4904  			break
  4905  		}
  4906  		x := v_0
  4907  		v.copyOf(x)
  4908  		return true
  4909  	}
  4910  	// match: (XORconst [-1] x)
  4911  	// result: (NORconst [0] x)
  4912  	for {
  4913  		if auxIntToInt32(v.AuxInt) != -1 {
  4914  			break
  4915  		}
  4916  		x := v_0
  4917  		v.reset(OpMIPSNORconst)
  4918  		v.AuxInt = int32ToAuxInt(0)
  4919  		v.AddArg(x)
  4920  		return true
  4921  	}
  4922  	// match: (XORconst [c] (MOVWconst [d]))
  4923  	// result: (MOVWconst [c^d])
  4924  	for {
  4925  		c := auxIntToInt32(v.AuxInt)
  4926  		if v_0.Op != OpMIPSMOVWconst {
  4927  			break
  4928  		}
  4929  		d := auxIntToInt32(v_0.AuxInt)
  4930  		v.reset(OpMIPSMOVWconst)
  4931  		v.AuxInt = int32ToAuxInt(c ^ d)
  4932  		return true
  4933  	}
  4934  	// match: (XORconst [c] (XORconst [d] x))
  4935  	// result: (XORconst [c^d] x)
  4936  	for {
  4937  		c := auxIntToInt32(v.AuxInt)
  4938  		if v_0.Op != OpMIPSXORconst {
  4939  			break
  4940  		}
  4941  		d := auxIntToInt32(v_0.AuxInt)
  4942  		x := v_0.Args[0]
  4943  		v.reset(OpMIPSXORconst)
  4944  		v.AuxInt = int32ToAuxInt(c ^ d)
  4945  		v.AddArg(x)
  4946  		return true
  4947  	}
  4948  	return false
  4949  }
  4950  func rewriteValueMIPS_OpMod16(v *Value) bool {
  4951  	v_1 := v.Args[1]
  4952  	v_0 := v.Args[0]
  4953  	b := v.Block
  4954  	typ := &b.Func.Config.Types
  4955  	// match: (Mod16 x y)
  4956  	// result: (Select0 (DIV (SignExt16to32 x) (SignExt16to32 y)))
  4957  	for {
  4958  		x := v_0
  4959  		y := v_1
  4960  		v.reset(OpSelect0)
  4961  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  4962  		v1 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4963  		v1.AddArg(x)
  4964  		v2 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  4965  		v2.AddArg(y)
  4966  		v0.AddArg2(v1, v2)
  4967  		v.AddArg(v0)
  4968  		return true
  4969  	}
  4970  }
  4971  func rewriteValueMIPS_OpMod16u(v *Value) bool {
  4972  	v_1 := v.Args[1]
  4973  	v_0 := v.Args[0]
  4974  	b := v.Block
  4975  	typ := &b.Func.Config.Types
  4976  	// match: (Mod16u x y)
  4977  	// result: (Select0 (DIVU (ZeroExt16to32 x) (ZeroExt16to32 y)))
  4978  	for {
  4979  		x := v_0
  4980  		y := v_1
  4981  		v.reset(OpSelect0)
  4982  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  4983  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4984  		v1.AddArg(x)
  4985  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  4986  		v2.AddArg(y)
  4987  		v0.AddArg2(v1, v2)
  4988  		v.AddArg(v0)
  4989  		return true
  4990  	}
  4991  }
  4992  func rewriteValueMIPS_OpMod32(v *Value) bool {
  4993  	v_1 := v.Args[1]
  4994  	v_0 := v.Args[0]
  4995  	b := v.Block
  4996  	typ := &b.Func.Config.Types
  4997  	// match: (Mod32 x y)
  4998  	// result: (Select0 (DIV x y))
  4999  	for {
  5000  		x := v_0
  5001  		y := v_1
  5002  		v.reset(OpSelect0)
  5003  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5004  		v0.AddArg2(x, y)
  5005  		v.AddArg(v0)
  5006  		return true
  5007  	}
  5008  }
  5009  func rewriteValueMIPS_OpMod32u(v *Value) bool {
  5010  	v_1 := v.Args[1]
  5011  	v_0 := v.Args[0]
  5012  	b := v.Block
  5013  	typ := &b.Func.Config.Types
  5014  	// match: (Mod32u x y)
  5015  	// result: (Select0 (DIVU x y))
  5016  	for {
  5017  		x := v_0
  5018  		y := v_1
  5019  		v.reset(OpSelect0)
  5020  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5021  		v0.AddArg2(x, y)
  5022  		v.AddArg(v0)
  5023  		return true
  5024  	}
  5025  }
  5026  func rewriteValueMIPS_OpMod8(v *Value) bool {
  5027  	v_1 := v.Args[1]
  5028  	v_0 := v.Args[0]
  5029  	b := v.Block
  5030  	typ := &b.Func.Config.Types
  5031  	// match: (Mod8 x y)
  5032  	// result: (Select0 (DIV (SignExt8to32 x) (SignExt8to32 y)))
  5033  	for {
  5034  		x := v_0
  5035  		y := v_1
  5036  		v.reset(OpSelect0)
  5037  		v0 := b.NewValue0(v.Pos, OpMIPSDIV, types.NewTuple(typ.Int32, typ.Int32))
  5038  		v1 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5039  		v1.AddArg(x)
  5040  		v2 := b.NewValue0(v.Pos, OpSignExt8to32, typ.Int32)
  5041  		v2.AddArg(y)
  5042  		v0.AddArg2(v1, v2)
  5043  		v.AddArg(v0)
  5044  		return true
  5045  	}
  5046  }
  5047  func rewriteValueMIPS_OpMod8u(v *Value) bool {
  5048  	v_1 := v.Args[1]
  5049  	v_0 := v.Args[0]
  5050  	b := v.Block
  5051  	typ := &b.Func.Config.Types
  5052  	// match: (Mod8u x y)
  5053  	// result: (Select0 (DIVU (ZeroExt8to32 x) (ZeroExt8to32 y)))
  5054  	for {
  5055  		x := v_0
  5056  		y := v_1
  5057  		v.reset(OpSelect0)
  5058  		v0 := b.NewValue0(v.Pos, OpMIPSDIVU, types.NewTuple(typ.UInt32, typ.UInt32))
  5059  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5060  		v1.AddArg(x)
  5061  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5062  		v2.AddArg(y)
  5063  		v0.AddArg2(v1, v2)
  5064  		v.AddArg(v0)
  5065  		return true
  5066  	}
  5067  }
  5068  func rewriteValueMIPS_OpMove(v *Value) bool {
  5069  	v_2 := v.Args[2]
  5070  	v_1 := v.Args[1]
  5071  	v_0 := v.Args[0]
  5072  	b := v.Block
  5073  	config := b.Func.Config
  5074  	typ := &b.Func.Config.Types
  5075  	// match: (Move [0] _ _ mem)
  5076  	// result: mem
  5077  	for {
  5078  		if auxIntToInt64(v.AuxInt) != 0 {
  5079  			break
  5080  		}
  5081  		mem := v_2
  5082  		v.copyOf(mem)
  5083  		return true
  5084  	}
  5085  	// match: (Move [1] dst src mem)
  5086  	// result: (MOVBstore dst (MOVBUload src mem) mem)
  5087  	for {
  5088  		if auxIntToInt64(v.AuxInt) != 1 {
  5089  			break
  5090  		}
  5091  		dst := v_0
  5092  		src := v_1
  5093  		mem := v_2
  5094  		v.reset(OpMIPSMOVBstore)
  5095  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5096  		v0.AddArg2(src, mem)
  5097  		v.AddArg3(dst, v0, mem)
  5098  		return true
  5099  	}
  5100  	// match: (Move [2] {t} dst src mem)
  5101  	// cond: t.Alignment()%2 == 0
  5102  	// result: (MOVHstore dst (MOVHUload src mem) mem)
  5103  	for {
  5104  		if auxIntToInt64(v.AuxInt) != 2 {
  5105  			break
  5106  		}
  5107  		t := auxToType(v.Aux)
  5108  		dst := v_0
  5109  		src := v_1
  5110  		mem := v_2
  5111  		if !(t.Alignment()%2 == 0) {
  5112  			break
  5113  		}
  5114  		v.reset(OpMIPSMOVHstore)
  5115  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5116  		v0.AddArg2(src, mem)
  5117  		v.AddArg3(dst, v0, mem)
  5118  		return true
  5119  	}
  5120  	// match: (Move [2] dst src mem)
  5121  	// result: (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))
  5122  	for {
  5123  		if auxIntToInt64(v.AuxInt) != 2 {
  5124  			break
  5125  		}
  5126  		dst := v_0
  5127  		src := v_1
  5128  		mem := v_2
  5129  		v.reset(OpMIPSMOVBstore)
  5130  		v.AuxInt = int32ToAuxInt(1)
  5131  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5132  		v0.AuxInt = int32ToAuxInt(1)
  5133  		v0.AddArg2(src, mem)
  5134  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5135  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5136  		v2.AddArg2(src, mem)
  5137  		v1.AddArg3(dst, v2, mem)
  5138  		v.AddArg3(dst, v0, v1)
  5139  		return true
  5140  	}
  5141  	// match: (Move [4] {t} dst src mem)
  5142  	// cond: t.Alignment()%4 == 0
  5143  	// result: (MOVWstore dst (MOVWload src mem) mem)
  5144  	for {
  5145  		if auxIntToInt64(v.AuxInt) != 4 {
  5146  			break
  5147  		}
  5148  		t := auxToType(v.Aux)
  5149  		dst := v_0
  5150  		src := v_1
  5151  		mem := v_2
  5152  		if !(t.Alignment()%4 == 0) {
  5153  			break
  5154  		}
  5155  		v.reset(OpMIPSMOVWstore)
  5156  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5157  		v0.AddArg2(src, mem)
  5158  		v.AddArg3(dst, v0, mem)
  5159  		return true
  5160  	}
  5161  	// match: (Move [4] {t} dst src mem)
  5162  	// cond: t.Alignment()%2 == 0
  5163  	// result: (MOVHstore [2] dst (MOVHUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
  5164  	for {
  5165  		if auxIntToInt64(v.AuxInt) != 4 {
  5166  			break
  5167  		}
  5168  		t := auxToType(v.Aux)
  5169  		dst := v_0
  5170  		src := v_1
  5171  		mem := v_2
  5172  		if !(t.Alignment()%2 == 0) {
  5173  			break
  5174  		}
  5175  		v.reset(OpMIPSMOVHstore)
  5176  		v.AuxInt = int32ToAuxInt(2)
  5177  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5178  		v0.AuxInt = int32ToAuxInt(2)
  5179  		v0.AddArg2(src, mem)
  5180  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5181  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHUload, typ.UInt16)
  5182  		v2.AddArg2(src, mem)
  5183  		v1.AddArg3(dst, v2, mem)
  5184  		v.AddArg3(dst, v0, v1)
  5185  		return true
  5186  	}
  5187  	// match: (Move [4] dst src mem)
  5188  	// result: (MOVBstore [3] dst (MOVBUload [3] src mem) (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem))))
  5189  	for {
  5190  		if auxIntToInt64(v.AuxInt) != 4 {
  5191  			break
  5192  		}
  5193  		dst := v_0
  5194  		src := v_1
  5195  		mem := v_2
  5196  		v.reset(OpMIPSMOVBstore)
  5197  		v.AuxInt = int32ToAuxInt(3)
  5198  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5199  		v0.AuxInt = int32ToAuxInt(3)
  5200  		v0.AddArg2(src, mem)
  5201  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5202  		v1.AuxInt = int32ToAuxInt(2)
  5203  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5204  		v2.AuxInt = int32ToAuxInt(2)
  5205  		v2.AddArg2(src, mem)
  5206  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5207  		v3.AuxInt = int32ToAuxInt(1)
  5208  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5209  		v4.AuxInt = int32ToAuxInt(1)
  5210  		v4.AddArg2(src, mem)
  5211  		v5 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5212  		v6 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5213  		v6.AddArg2(src, mem)
  5214  		v5.AddArg3(dst, v6, mem)
  5215  		v3.AddArg3(dst, v4, v5)
  5216  		v1.AddArg3(dst, v2, v3)
  5217  		v.AddArg3(dst, v0, v1)
  5218  		return true
  5219  	}
  5220  	// match: (Move [3] dst src mem)
  5221  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVBstore [1] dst (MOVBUload [1] src mem) (MOVBstore dst (MOVBUload src mem) mem)))
  5222  	for {
  5223  		if auxIntToInt64(v.AuxInt) != 3 {
  5224  			break
  5225  		}
  5226  		dst := v_0
  5227  		src := v_1
  5228  		mem := v_2
  5229  		v.reset(OpMIPSMOVBstore)
  5230  		v.AuxInt = int32ToAuxInt(2)
  5231  		v0 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5232  		v0.AuxInt = int32ToAuxInt(2)
  5233  		v0.AddArg2(src, mem)
  5234  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5235  		v1.AuxInt = int32ToAuxInt(1)
  5236  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5237  		v2.AuxInt = int32ToAuxInt(1)
  5238  		v2.AddArg2(src, mem)
  5239  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  5240  		v4 := b.NewValue0(v.Pos, OpMIPSMOVBUload, typ.UInt8)
  5241  		v4.AddArg2(src, mem)
  5242  		v3.AddArg3(dst, v4, mem)
  5243  		v1.AddArg3(dst, v2, v3)
  5244  		v.AddArg3(dst, v0, v1)
  5245  		return true
  5246  	}
  5247  	// match: (Move [8] {t} dst src mem)
  5248  	// cond: t.Alignment()%4 == 0
  5249  	// result: (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))
  5250  	for {
  5251  		if auxIntToInt64(v.AuxInt) != 8 {
  5252  			break
  5253  		}
  5254  		t := auxToType(v.Aux)
  5255  		dst := v_0
  5256  		src := v_1
  5257  		mem := v_2
  5258  		if !(t.Alignment()%4 == 0) {
  5259  			break
  5260  		}
  5261  		v.reset(OpMIPSMOVWstore)
  5262  		v.AuxInt = int32ToAuxInt(4)
  5263  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5264  		v0.AuxInt = int32ToAuxInt(4)
  5265  		v0.AddArg2(src, mem)
  5266  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5267  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5268  		v2.AddArg2(src, mem)
  5269  		v1.AddArg3(dst, v2, mem)
  5270  		v.AddArg3(dst, v0, v1)
  5271  		return true
  5272  	}
  5273  	// match: (Move [8] {t} dst src mem)
  5274  	// cond: t.Alignment()%2 == 0
  5275  	// result: (MOVHstore [6] dst (MOVHload [6] src mem) (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem))))
  5276  	for {
  5277  		if auxIntToInt64(v.AuxInt) != 8 {
  5278  			break
  5279  		}
  5280  		t := auxToType(v.Aux)
  5281  		dst := v_0
  5282  		src := v_1
  5283  		mem := v_2
  5284  		if !(t.Alignment()%2 == 0) {
  5285  			break
  5286  		}
  5287  		v.reset(OpMIPSMOVHstore)
  5288  		v.AuxInt = int32ToAuxInt(6)
  5289  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5290  		v0.AuxInt = int32ToAuxInt(6)
  5291  		v0.AddArg2(src, mem)
  5292  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5293  		v1.AuxInt = int32ToAuxInt(4)
  5294  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5295  		v2.AuxInt = int32ToAuxInt(4)
  5296  		v2.AddArg2(src, mem)
  5297  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5298  		v3.AuxInt = int32ToAuxInt(2)
  5299  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5300  		v4.AuxInt = int32ToAuxInt(2)
  5301  		v4.AddArg2(src, mem)
  5302  		v5 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5303  		v6 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5304  		v6.AddArg2(src, mem)
  5305  		v5.AddArg3(dst, v6, mem)
  5306  		v3.AddArg3(dst, v4, v5)
  5307  		v1.AddArg3(dst, v2, v3)
  5308  		v.AddArg3(dst, v0, v1)
  5309  		return true
  5310  	}
  5311  	// match: (Move [6] {t} dst src mem)
  5312  	// cond: t.Alignment()%2 == 0
  5313  	// result: (MOVHstore [4] dst (MOVHload [4] src mem) (MOVHstore [2] dst (MOVHload [2] src mem) (MOVHstore dst (MOVHload src mem) mem)))
  5314  	for {
  5315  		if auxIntToInt64(v.AuxInt) != 6 {
  5316  			break
  5317  		}
  5318  		t := auxToType(v.Aux)
  5319  		dst := v_0
  5320  		src := v_1
  5321  		mem := v_2
  5322  		if !(t.Alignment()%2 == 0) {
  5323  			break
  5324  		}
  5325  		v.reset(OpMIPSMOVHstore)
  5326  		v.AuxInt = int32ToAuxInt(4)
  5327  		v0 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5328  		v0.AuxInt = int32ToAuxInt(4)
  5329  		v0.AddArg2(src, mem)
  5330  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5331  		v1.AuxInt = int32ToAuxInt(2)
  5332  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5333  		v2.AuxInt = int32ToAuxInt(2)
  5334  		v2.AddArg2(src, mem)
  5335  		v3 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  5336  		v4 := b.NewValue0(v.Pos, OpMIPSMOVHload, typ.Int16)
  5337  		v4.AddArg2(src, mem)
  5338  		v3.AddArg3(dst, v4, mem)
  5339  		v1.AddArg3(dst, v2, v3)
  5340  		v.AddArg3(dst, v0, v1)
  5341  		return true
  5342  	}
  5343  	// match: (Move [12] {t} dst src mem)
  5344  	// cond: t.Alignment()%4 == 0
  5345  	// result: (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem)))
  5346  	for {
  5347  		if auxIntToInt64(v.AuxInt) != 12 {
  5348  			break
  5349  		}
  5350  		t := auxToType(v.Aux)
  5351  		dst := v_0
  5352  		src := v_1
  5353  		mem := v_2
  5354  		if !(t.Alignment()%4 == 0) {
  5355  			break
  5356  		}
  5357  		v.reset(OpMIPSMOVWstore)
  5358  		v.AuxInt = int32ToAuxInt(8)
  5359  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5360  		v0.AuxInt = int32ToAuxInt(8)
  5361  		v0.AddArg2(src, mem)
  5362  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5363  		v1.AuxInt = int32ToAuxInt(4)
  5364  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5365  		v2.AuxInt = int32ToAuxInt(4)
  5366  		v2.AddArg2(src, mem)
  5367  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5368  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5369  		v4.AddArg2(src, mem)
  5370  		v3.AddArg3(dst, v4, mem)
  5371  		v1.AddArg3(dst, v2, v3)
  5372  		v.AddArg3(dst, v0, v1)
  5373  		return true
  5374  	}
  5375  	// match: (Move [16] {t} dst src mem)
  5376  	// cond: t.Alignment()%4 == 0
  5377  	// result: (MOVWstore [12] dst (MOVWload [12] src mem) (MOVWstore [8] dst (MOVWload [8] src mem) (MOVWstore [4] dst (MOVWload [4] src mem) (MOVWstore dst (MOVWload src mem) mem))))
  5378  	for {
  5379  		if auxIntToInt64(v.AuxInt) != 16 {
  5380  			break
  5381  		}
  5382  		t := auxToType(v.Aux)
  5383  		dst := v_0
  5384  		src := v_1
  5385  		mem := v_2
  5386  		if !(t.Alignment()%4 == 0) {
  5387  			break
  5388  		}
  5389  		v.reset(OpMIPSMOVWstore)
  5390  		v.AuxInt = int32ToAuxInt(12)
  5391  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5392  		v0.AuxInt = int32ToAuxInt(12)
  5393  		v0.AddArg2(src, mem)
  5394  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5395  		v1.AuxInt = int32ToAuxInt(8)
  5396  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5397  		v2.AuxInt = int32ToAuxInt(8)
  5398  		v2.AddArg2(src, mem)
  5399  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5400  		v3.AuxInt = int32ToAuxInt(4)
  5401  		v4 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5402  		v4.AuxInt = int32ToAuxInt(4)
  5403  		v4.AddArg2(src, mem)
  5404  		v5 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  5405  		v6 := b.NewValue0(v.Pos, OpMIPSMOVWload, typ.UInt32)
  5406  		v6.AddArg2(src, mem)
  5407  		v5.AddArg3(dst, v6, mem)
  5408  		v3.AddArg3(dst, v4, v5)
  5409  		v1.AddArg3(dst, v2, v3)
  5410  		v.AddArg3(dst, v0, v1)
  5411  		return true
  5412  	}
  5413  	// match: (Move [s] {t} dst src mem)
  5414  	// cond: (s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0)
  5415  	// result: (LoweredMove [int32(t.Alignment())] dst src (ADDconst <src.Type> src [int32(s-moveSize(t.Alignment(), config))]) mem)
  5416  	for {
  5417  		s := auxIntToInt64(v.AuxInt)
  5418  		t := auxToType(v.Aux)
  5419  		dst := v_0
  5420  		src := v_1
  5421  		mem := v_2
  5422  		if !(s > 16 && logLargeCopy(v, s) || t.Alignment()%4 != 0) {
  5423  			break
  5424  		}
  5425  		v.reset(OpMIPSLoweredMove)
  5426  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  5427  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, src.Type)
  5428  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  5429  		v0.AddArg(src)
  5430  		v.AddArg4(dst, src, v0, mem)
  5431  		return true
  5432  	}
  5433  	return false
  5434  }
  5435  func rewriteValueMIPS_OpNeq16(v *Value) bool {
  5436  	v_1 := v.Args[1]
  5437  	v_0 := v.Args[0]
  5438  	b := v.Block
  5439  	typ := &b.Func.Config.Types
  5440  	// match: (Neq16 x y)
  5441  	// result: (SGTU (XOR (ZeroExt16to32 x) (ZeroExt16to32 y)) (MOVWconst [0]))
  5442  	for {
  5443  		x := v_0
  5444  		y := v_1
  5445  		v.reset(OpMIPSSGTU)
  5446  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5447  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5448  		v1.AddArg(x)
  5449  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5450  		v2.AddArg(y)
  5451  		v0.AddArg2(v1, v2)
  5452  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5453  		v3.AuxInt = int32ToAuxInt(0)
  5454  		v.AddArg2(v0, v3)
  5455  		return true
  5456  	}
  5457  }
  5458  func rewriteValueMIPS_OpNeq32(v *Value) bool {
  5459  	v_1 := v.Args[1]
  5460  	v_0 := v.Args[0]
  5461  	b := v.Block
  5462  	typ := &b.Func.Config.Types
  5463  	// match: (Neq32 x y)
  5464  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5465  	for {
  5466  		x := v_0
  5467  		y := v_1
  5468  		v.reset(OpMIPSSGTU)
  5469  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5470  		v0.AddArg2(x, y)
  5471  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5472  		v1.AuxInt = int32ToAuxInt(0)
  5473  		v.AddArg2(v0, v1)
  5474  		return true
  5475  	}
  5476  }
  5477  func rewriteValueMIPS_OpNeq32F(v *Value) bool {
  5478  	v_1 := v.Args[1]
  5479  	v_0 := v.Args[0]
  5480  	b := v.Block
  5481  	// match: (Neq32F x y)
  5482  	// result: (FPFlagFalse (CMPEQF x y))
  5483  	for {
  5484  		x := v_0
  5485  		y := v_1
  5486  		v.reset(OpMIPSFPFlagFalse)
  5487  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQF, types.TypeFlags)
  5488  		v0.AddArg2(x, y)
  5489  		v.AddArg(v0)
  5490  		return true
  5491  	}
  5492  }
  5493  func rewriteValueMIPS_OpNeq64F(v *Value) bool {
  5494  	v_1 := v.Args[1]
  5495  	v_0 := v.Args[0]
  5496  	b := v.Block
  5497  	// match: (Neq64F x y)
  5498  	// result: (FPFlagFalse (CMPEQD x y))
  5499  	for {
  5500  		x := v_0
  5501  		y := v_1
  5502  		v.reset(OpMIPSFPFlagFalse)
  5503  		v0 := b.NewValue0(v.Pos, OpMIPSCMPEQD, types.TypeFlags)
  5504  		v0.AddArg2(x, y)
  5505  		v.AddArg(v0)
  5506  		return true
  5507  	}
  5508  }
  5509  func rewriteValueMIPS_OpNeq8(v *Value) bool {
  5510  	v_1 := v.Args[1]
  5511  	v_0 := v.Args[0]
  5512  	b := v.Block
  5513  	typ := &b.Func.Config.Types
  5514  	// match: (Neq8 x y)
  5515  	// result: (SGTU (XOR (ZeroExt8to32 x) (ZeroExt8to32 y)) (MOVWconst [0]))
  5516  	for {
  5517  		x := v_0
  5518  		y := v_1
  5519  		v.reset(OpMIPSSGTU)
  5520  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5521  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5522  		v1.AddArg(x)
  5523  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5524  		v2.AddArg(y)
  5525  		v0.AddArg2(v1, v2)
  5526  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5527  		v3.AuxInt = int32ToAuxInt(0)
  5528  		v.AddArg2(v0, v3)
  5529  		return true
  5530  	}
  5531  }
  5532  func rewriteValueMIPS_OpNeqPtr(v *Value) bool {
  5533  	v_1 := v.Args[1]
  5534  	v_0 := v.Args[0]
  5535  	b := v.Block
  5536  	typ := &b.Func.Config.Types
  5537  	// match: (NeqPtr x y)
  5538  	// result: (SGTU (XOR x y) (MOVWconst [0]))
  5539  	for {
  5540  		x := v_0
  5541  		y := v_1
  5542  		v.reset(OpMIPSSGTU)
  5543  		v0 := b.NewValue0(v.Pos, OpMIPSXOR, typ.UInt32)
  5544  		v0.AddArg2(x, y)
  5545  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5546  		v1.AuxInt = int32ToAuxInt(0)
  5547  		v.AddArg2(v0, v1)
  5548  		return true
  5549  	}
  5550  }
  5551  func rewriteValueMIPS_OpNot(v *Value) bool {
  5552  	v_0 := v.Args[0]
  5553  	// match: (Not x)
  5554  	// result: (XORconst [1] x)
  5555  	for {
  5556  		x := v_0
  5557  		v.reset(OpMIPSXORconst)
  5558  		v.AuxInt = int32ToAuxInt(1)
  5559  		v.AddArg(x)
  5560  		return true
  5561  	}
  5562  }
  5563  func rewriteValueMIPS_OpOffPtr(v *Value) bool {
  5564  	v_0 := v.Args[0]
  5565  	// match: (OffPtr [off] ptr:(SP))
  5566  	// result: (MOVWaddr [int32(off)] ptr)
  5567  	for {
  5568  		off := auxIntToInt64(v.AuxInt)
  5569  		ptr := v_0
  5570  		if ptr.Op != OpSP {
  5571  			break
  5572  		}
  5573  		v.reset(OpMIPSMOVWaddr)
  5574  		v.AuxInt = int32ToAuxInt(int32(off))
  5575  		v.AddArg(ptr)
  5576  		return true
  5577  	}
  5578  	// match: (OffPtr [off] ptr)
  5579  	// result: (ADDconst [int32(off)] ptr)
  5580  	for {
  5581  		off := auxIntToInt64(v.AuxInt)
  5582  		ptr := v_0
  5583  		v.reset(OpMIPSADDconst)
  5584  		v.AuxInt = int32ToAuxInt(int32(off))
  5585  		v.AddArg(ptr)
  5586  		return true
  5587  	}
  5588  }
  5589  func rewriteValueMIPS_OpPanicBounds(v *Value) bool {
  5590  	v_2 := v.Args[2]
  5591  	v_1 := v.Args[1]
  5592  	v_0 := v.Args[0]
  5593  	// match: (PanicBounds [kind] x y mem)
  5594  	// cond: boundsABI(kind) == 0
  5595  	// result: (LoweredPanicBoundsA [kind] x y mem)
  5596  	for {
  5597  		kind := auxIntToInt64(v.AuxInt)
  5598  		x := v_0
  5599  		y := v_1
  5600  		mem := v_2
  5601  		if !(boundsABI(kind) == 0) {
  5602  			break
  5603  		}
  5604  		v.reset(OpMIPSLoweredPanicBoundsA)
  5605  		v.AuxInt = int64ToAuxInt(kind)
  5606  		v.AddArg3(x, y, mem)
  5607  		return true
  5608  	}
  5609  	// match: (PanicBounds [kind] x y mem)
  5610  	// cond: boundsABI(kind) == 1
  5611  	// result: (LoweredPanicBoundsB [kind] x y mem)
  5612  	for {
  5613  		kind := auxIntToInt64(v.AuxInt)
  5614  		x := v_0
  5615  		y := v_1
  5616  		mem := v_2
  5617  		if !(boundsABI(kind) == 1) {
  5618  			break
  5619  		}
  5620  		v.reset(OpMIPSLoweredPanicBoundsB)
  5621  		v.AuxInt = int64ToAuxInt(kind)
  5622  		v.AddArg3(x, y, mem)
  5623  		return true
  5624  	}
  5625  	// match: (PanicBounds [kind] x y mem)
  5626  	// cond: boundsABI(kind) == 2
  5627  	// result: (LoweredPanicBoundsC [kind] x y mem)
  5628  	for {
  5629  		kind := auxIntToInt64(v.AuxInt)
  5630  		x := v_0
  5631  		y := v_1
  5632  		mem := v_2
  5633  		if !(boundsABI(kind) == 2) {
  5634  			break
  5635  		}
  5636  		v.reset(OpMIPSLoweredPanicBoundsC)
  5637  		v.AuxInt = int64ToAuxInt(kind)
  5638  		v.AddArg3(x, y, mem)
  5639  		return true
  5640  	}
  5641  	return false
  5642  }
  5643  func rewriteValueMIPS_OpPanicExtend(v *Value) bool {
  5644  	v_3 := v.Args[3]
  5645  	v_2 := v.Args[2]
  5646  	v_1 := v.Args[1]
  5647  	v_0 := v.Args[0]
  5648  	// match: (PanicExtend [kind] hi lo y mem)
  5649  	// cond: boundsABI(kind) == 0
  5650  	// result: (LoweredPanicExtendA [kind] hi lo y mem)
  5651  	for {
  5652  		kind := auxIntToInt64(v.AuxInt)
  5653  		hi := v_0
  5654  		lo := v_1
  5655  		y := v_2
  5656  		mem := v_3
  5657  		if !(boundsABI(kind) == 0) {
  5658  			break
  5659  		}
  5660  		v.reset(OpMIPSLoweredPanicExtendA)
  5661  		v.AuxInt = int64ToAuxInt(kind)
  5662  		v.AddArg4(hi, lo, y, mem)
  5663  		return true
  5664  	}
  5665  	// match: (PanicExtend [kind] hi lo y mem)
  5666  	// cond: boundsABI(kind) == 1
  5667  	// result: (LoweredPanicExtendB [kind] hi lo y mem)
  5668  	for {
  5669  		kind := auxIntToInt64(v.AuxInt)
  5670  		hi := v_0
  5671  		lo := v_1
  5672  		y := v_2
  5673  		mem := v_3
  5674  		if !(boundsABI(kind) == 1) {
  5675  			break
  5676  		}
  5677  		v.reset(OpMIPSLoweredPanicExtendB)
  5678  		v.AuxInt = int64ToAuxInt(kind)
  5679  		v.AddArg4(hi, lo, y, mem)
  5680  		return true
  5681  	}
  5682  	// match: (PanicExtend [kind] hi lo y mem)
  5683  	// cond: boundsABI(kind) == 2
  5684  	// result: (LoweredPanicExtendC [kind] hi lo y mem)
  5685  	for {
  5686  		kind := auxIntToInt64(v.AuxInt)
  5687  		hi := v_0
  5688  		lo := v_1
  5689  		y := v_2
  5690  		mem := v_3
  5691  		if !(boundsABI(kind) == 2) {
  5692  			break
  5693  		}
  5694  		v.reset(OpMIPSLoweredPanicExtendC)
  5695  		v.AuxInt = int64ToAuxInt(kind)
  5696  		v.AddArg4(hi, lo, y, mem)
  5697  		return true
  5698  	}
  5699  	return false
  5700  }
  5701  func rewriteValueMIPS_OpRotateLeft16(v *Value) bool {
  5702  	v_1 := v.Args[1]
  5703  	v_0 := v.Args[0]
  5704  	b := v.Block
  5705  	typ := &b.Func.Config.Types
  5706  	// match: (RotateLeft16 <t> x (MOVWconst [c]))
  5707  	// result: (Or16 (Lsh16x32 <t> x (MOVWconst [c&15])) (Rsh16Ux32 <t> x (MOVWconst [-c&15])))
  5708  	for {
  5709  		t := v.Type
  5710  		x := v_0
  5711  		if v_1.Op != OpMIPSMOVWconst {
  5712  			break
  5713  		}
  5714  		c := auxIntToInt32(v_1.AuxInt)
  5715  		v.reset(OpOr16)
  5716  		v0 := b.NewValue0(v.Pos, OpLsh16x32, t)
  5717  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5718  		v1.AuxInt = int32ToAuxInt(c & 15)
  5719  		v0.AddArg2(x, v1)
  5720  		v2 := b.NewValue0(v.Pos, OpRsh16Ux32, t)
  5721  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5722  		v3.AuxInt = int32ToAuxInt(-c & 15)
  5723  		v2.AddArg2(x, v3)
  5724  		v.AddArg2(v0, v2)
  5725  		return true
  5726  	}
  5727  	return false
  5728  }
  5729  func rewriteValueMIPS_OpRotateLeft32(v *Value) bool {
  5730  	v_1 := v.Args[1]
  5731  	v_0 := v.Args[0]
  5732  	b := v.Block
  5733  	typ := &b.Func.Config.Types
  5734  	// match: (RotateLeft32 <t> x (MOVWconst [c]))
  5735  	// result: (Or32 (Lsh32x32 <t> x (MOVWconst [c&31])) (Rsh32Ux32 <t> x (MOVWconst [-c&31])))
  5736  	for {
  5737  		t := v.Type
  5738  		x := v_0
  5739  		if v_1.Op != OpMIPSMOVWconst {
  5740  			break
  5741  		}
  5742  		c := auxIntToInt32(v_1.AuxInt)
  5743  		v.reset(OpOr32)
  5744  		v0 := b.NewValue0(v.Pos, OpLsh32x32, t)
  5745  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5746  		v1.AuxInt = int32ToAuxInt(c & 31)
  5747  		v0.AddArg2(x, v1)
  5748  		v2 := b.NewValue0(v.Pos, OpRsh32Ux32, t)
  5749  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5750  		v3.AuxInt = int32ToAuxInt(-c & 31)
  5751  		v2.AddArg2(x, v3)
  5752  		v.AddArg2(v0, v2)
  5753  		return true
  5754  	}
  5755  	return false
  5756  }
  5757  func rewriteValueMIPS_OpRotateLeft64(v *Value) bool {
  5758  	v_1 := v.Args[1]
  5759  	v_0 := v.Args[0]
  5760  	b := v.Block
  5761  	typ := &b.Func.Config.Types
  5762  	// match: (RotateLeft64 <t> x (MOVWconst [c]))
  5763  	// result: (Or64 (Lsh64x32 <t> x (MOVWconst [c&63])) (Rsh64Ux32 <t> x (MOVWconst [-c&63])))
  5764  	for {
  5765  		t := v.Type
  5766  		x := v_0
  5767  		if v_1.Op != OpMIPSMOVWconst {
  5768  			break
  5769  		}
  5770  		c := auxIntToInt32(v_1.AuxInt)
  5771  		v.reset(OpOr64)
  5772  		v0 := b.NewValue0(v.Pos, OpLsh64x32, t)
  5773  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5774  		v1.AuxInt = int32ToAuxInt(c & 63)
  5775  		v0.AddArg2(x, v1)
  5776  		v2 := b.NewValue0(v.Pos, OpRsh64Ux32, t)
  5777  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5778  		v3.AuxInt = int32ToAuxInt(-c & 63)
  5779  		v2.AddArg2(x, v3)
  5780  		v.AddArg2(v0, v2)
  5781  		return true
  5782  	}
  5783  	return false
  5784  }
  5785  func rewriteValueMIPS_OpRotateLeft8(v *Value) bool {
  5786  	v_1 := v.Args[1]
  5787  	v_0 := v.Args[0]
  5788  	b := v.Block
  5789  	typ := &b.Func.Config.Types
  5790  	// match: (RotateLeft8 <t> x (MOVWconst [c]))
  5791  	// result: (Or8 (Lsh8x32 <t> x (MOVWconst [c&7])) (Rsh8Ux32 <t> x (MOVWconst [-c&7])))
  5792  	for {
  5793  		t := v.Type
  5794  		x := v_0
  5795  		if v_1.Op != OpMIPSMOVWconst {
  5796  			break
  5797  		}
  5798  		c := auxIntToInt32(v_1.AuxInt)
  5799  		v.reset(OpOr8)
  5800  		v0 := b.NewValue0(v.Pos, OpLsh8x32, t)
  5801  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5802  		v1.AuxInt = int32ToAuxInt(c & 7)
  5803  		v0.AddArg2(x, v1)
  5804  		v2 := b.NewValue0(v.Pos, OpRsh8Ux32, t)
  5805  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5806  		v3.AuxInt = int32ToAuxInt(-c & 7)
  5807  		v2.AddArg2(x, v3)
  5808  		v.AddArg2(v0, v2)
  5809  		return true
  5810  	}
  5811  	return false
  5812  }
  5813  func rewriteValueMIPS_OpRsh16Ux16(v *Value) bool {
  5814  	v_1 := v.Args[1]
  5815  	v_0 := v.Args[0]
  5816  	b := v.Block
  5817  	typ := &b.Func.Config.Types
  5818  	// match: (Rsh16Ux16 <t> x y)
  5819  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  5820  	for {
  5821  		t := v.Type
  5822  		x := v_0
  5823  		y := v_1
  5824  		v.reset(OpMIPSCMOVZ)
  5825  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5826  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5827  		v1.AddArg(x)
  5828  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5829  		v2.AddArg(y)
  5830  		v0.AddArg2(v1, v2)
  5831  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5832  		v3.AuxInt = int32ToAuxInt(0)
  5833  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5834  		v4.AuxInt = int32ToAuxInt(32)
  5835  		v4.AddArg(v2)
  5836  		v.AddArg3(v0, v3, v4)
  5837  		return true
  5838  	}
  5839  }
  5840  func rewriteValueMIPS_OpRsh16Ux32(v *Value) bool {
  5841  	v_1 := v.Args[1]
  5842  	v_0 := v.Args[0]
  5843  	b := v.Block
  5844  	typ := &b.Func.Config.Types
  5845  	// match: (Rsh16Ux32 <t> x y)
  5846  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  5847  	for {
  5848  		t := v.Type
  5849  		x := v_0
  5850  		y := v_1
  5851  		v.reset(OpMIPSCMOVZ)
  5852  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5853  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5854  		v1.AddArg(x)
  5855  		v0.AddArg2(v1, y)
  5856  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5857  		v2.AuxInt = int32ToAuxInt(0)
  5858  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5859  		v3.AuxInt = int32ToAuxInt(32)
  5860  		v3.AddArg(y)
  5861  		v.AddArg3(v0, v2, v3)
  5862  		return true
  5863  	}
  5864  }
  5865  func rewriteValueMIPS_OpRsh16Ux64(v *Value) bool {
  5866  	v_1 := v.Args[1]
  5867  	v_0 := v.Args[0]
  5868  	b := v.Block
  5869  	typ := &b.Func.Config.Types
  5870  	// match: (Rsh16Ux64 x (Const64 [c]))
  5871  	// cond: uint32(c) < 16
  5872  	// result: (SRLconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5873  	for {
  5874  		x := v_0
  5875  		if v_1.Op != OpConst64 {
  5876  			break
  5877  		}
  5878  		c := auxIntToInt64(v_1.AuxInt)
  5879  		if !(uint32(c) < 16) {
  5880  			break
  5881  		}
  5882  		v.reset(OpMIPSSRLconst)
  5883  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  5884  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  5885  		v0.AuxInt = int32ToAuxInt(16)
  5886  		v0.AddArg(x)
  5887  		v.AddArg(v0)
  5888  		return true
  5889  	}
  5890  	// match: (Rsh16Ux64 _ (Const64 [c]))
  5891  	// cond: uint32(c) >= 16
  5892  	// result: (MOVWconst [0])
  5893  	for {
  5894  		if v_1.Op != OpConst64 {
  5895  			break
  5896  		}
  5897  		c := auxIntToInt64(v_1.AuxInt)
  5898  		if !(uint32(c) >= 16) {
  5899  			break
  5900  		}
  5901  		v.reset(OpMIPSMOVWconst)
  5902  		v.AuxInt = int32ToAuxInt(0)
  5903  		return true
  5904  	}
  5905  	return false
  5906  }
  5907  func rewriteValueMIPS_OpRsh16Ux8(v *Value) bool {
  5908  	v_1 := v.Args[1]
  5909  	v_0 := v.Args[0]
  5910  	b := v.Block
  5911  	typ := &b.Func.Config.Types
  5912  	// match: (Rsh16Ux8 <t> x y)
  5913  	// result: (CMOVZ (SRL <t> (ZeroExt16to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  5914  	for {
  5915  		t := v.Type
  5916  		x := v_0
  5917  		y := v_1
  5918  		v.reset(OpMIPSCMOVZ)
  5919  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  5920  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5921  		v1.AddArg(x)
  5922  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  5923  		v2.AddArg(y)
  5924  		v0.AddArg2(v1, v2)
  5925  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5926  		v3.AuxInt = int32ToAuxInt(0)
  5927  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5928  		v4.AuxInt = int32ToAuxInt(32)
  5929  		v4.AddArg(v2)
  5930  		v.AddArg3(v0, v3, v4)
  5931  		return true
  5932  	}
  5933  }
  5934  func rewriteValueMIPS_OpRsh16x16(v *Value) bool {
  5935  	v_1 := v.Args[1]
  5936  	v_0 := v.Args[0]
  5937  	b := v.Block
  5938  	typ := &b.Func.Config.Types
  5939  	// match: (Rsh16x16 x y)
  5940  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  5941  	for {
  5942  		x := v_0
  5943  		y := v_1
  5944  		v.reset(OpMIPSSRA)
  5945  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5946  		v0.AddArg(x)
  5947  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5948  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  5949  		v2.AddArg(y)
  5950  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5951  		v3.AuxInt = int32ToAuxInt(31)
  5952  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5953  		v4.AuxInt = int32ToAuxInt(32)
  5954  		v4.AddArg(v2)
  5955  		v1.AddArg3(v2, v3, v4)
  5956  		v.AddArg2(v0, v1)
  5957  		return true
  5958  	}
  5959  }
  5960  func rewriteValueMIPS_OpRsh16x32(v *Value) bool {
  5961  	v_1 := v.Args[1]
  5962  	v_0 := v.Args[0]
  5963  	b := v.Block
  5964  	typ := &b.Func.Config.Types
  5965  	// match: (Rsh16x32 x y)
  5966  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  5967  	for {
  5968  		x := v_0
  5969  		y := v_1
  5970  		v.reset(OpMIPSSRA)
  5971  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  5972  		v0.AddArg(x)
  5973  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  5974  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  5975  		v2.AuxInt = int32ToAuxInt(31)
  5976  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  5977  		v3.AuxInt = int32ToAuxInt(32)
  5978  		v3.AddArg(y)
  5979  		v1.AddArg3(y, v2, v3)
  5980  		v.AddArg2(v0, v1)
  5981  		return true
  5982  	}
  5983  }
  5984  func rewriteValueMIPS_OpRsh16x64(v *Value) bool {
  5985  	v_1 := v.Args[1]
  5986  	v_0 := v.Args[0]
  5987  	b := v.Block
  5988  	typ := &b.Func.Config.Types
  5989  	// match: (Rsh16x64 x (Const64 [c]))
  5990  	// cond: uint32(c) < 16
  5991  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [int32(c+16)])
  5992  	for {
  5993  		x := v_0
  5994  		if v_1.Op != OpConst64 {
  5995  			break
  5996  		}
  5997  		c := auxIntToInt64(v_1.AuxInt)
  5998  		if !(uint32(c) < 16) {
  5999  			break
  6000  		}
  6001  		v.reset(OpMIPSSRAconst)
  6002  		v.AuxInt = int32ToAuxInt(int32(c + 16))
  6003  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6004  		v0.AuxInt = int32ToAuxInt(16)
  6005  		v0.AddArg(x)
  6006  		v.AddArg(v0)
  6007  		return true
  6008  	}
  6009  	// match: (Rsh16x64 x (Const64 [c]))
  6010  	// cond: uint32(c) >= 16
  6011  	// result: (SRAconst (SLLconst <typ.UInt32> x [16]) [31])
  6012  	for {
  6013  		x := v_0
  6014  		if v_1.Op != OpConst64 {
  6015  			break
  6016  		}
  6017  		c := auxIntToInt64(v_1.AuxInt)
  6018  		if !(uint32(c) >= 16) {
  6019  			break
  6020  		}
  6021  		v.reset(OpMIPSSRAconst)
  6022  		v.AuxInt = int32ToAuxInt(31)
  6023  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6024  		v0.AuxInt = int32ToAuxInt(16)
  6025  		v0.AddArg(x)
  6026  		v.AddArg(v0)
  6027  		return true
  6028  	}
  6029  	return false
  6030  }
  6031  func rewriteValueMIPS_OpRsh16x8(v *Value) bool {
  6032  	v_1 := v.Args[1]
  6033  	v_0 := v.Args[0]
  6034  	b := v.Block
  6035  	typ := &b.Func.Config.Types
  6036  	// match: (Rsh16x8 x y)
  6037  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6038  	for {
  6039  		x := v_0
  6040  		y := v_1
  6041  		v.reset(OpMIPSSRA)
  6042  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6043  		v0.AddArg(x)
  6044  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6045  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6046  		v2.AddArg(y)
  6047  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6048  		v3.AuxInt = int32ToAuxInt(31)
  6049  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6050  		v4.AuxInt = int32ToAuxInt(32)
  6051  		v4.AddArg(v2)
  6052  		v1.AddArg3(v2, v3, v4)
  6053  		v.AddArg2(v0, v1)
  6054  		return true
  6055  	}
  6056  }
  6057  func rewriteValueMIPS_OpRsh32Ux16(v *Value) bool {
  6058  	v_1 := v.Args[1]
  6059  	v_0 := v.Args[0]
  6060  	b := v.Block
  6061  	typ := &b.Func.Config.Types
  6062  	// match: (Rsh32Ux16 <t> x y)
  6063  	// result: (CMOVZ (SRL <t> x (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6064  	for {
  6065  		t := v.Type
  6066  		x := v_0
  6067  		y := v_1
  6068  		v.reset(OpMIPSCMOVZ)
  6069  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6070  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6071  		v1.AddArg(y)
  6072  		v0.AddArg2(x, v1)
  6073  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6074  		v2.AuxInt = int32ToAuxInt(0)
  6075  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6076  		v3.AuxInt = int32ToAuxInt(32)
  6077  		v3.AddArg(v1)
  6078  		v.AddArg3(v0, v2, v3)
  6079  		return true
  6080  	}
  6081  }
  6082  func rewriteValueMIPS_OpRsh32Ux32(v *Value) bool {
  6083  	v_1 := v.Args[1]
  6084  	v_0 := v.Args[0]
  6085  	b := v.Block
  6086  	typ := &b.Func.Config.Types
  6087  	// match: (Rsh32Ux32 <t> x y)
  6088  	// result: (CMOVZ (SRL <t> x y) (MOVWconst [0]) (SGTUconst [32] y))
  6089  	for {
  6090  		t := v.Type
  6091  		x := v_0
  6092  		y := v_1
  6093  		v.reset(OpMIPSCMOVZ)
  6094  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6095  		v0.AddArg2(x, y)
  6096  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6097  		v1.AuxInt = int32ToAuxInt(0)
  6098  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6099  		v2.AuxInt = int32ToAuxInt(32)
  6100  		v2.AddArg(y)
  6101  		v.AddArg3(v0, v1, v2)
  6102  		return true
  6103  	}
  6104  }
  6105  func rewriteValueMIPS_OpRsh32Ux64(v *Value) bool {
  6106  	v_1 := v.Args[1]
  6107  	v_0 := v.Args[0]
  6108  	// match: (Rsh32Ux64 x (Const64 [c]))
  6109  	// cond: uint32(c) < 32
  6110  	// result: (SRLconst x [int32(c)])
  6111  	for {
  6112  		x := v_0
  6113  		if v_1.Op != OpConst64 {
  6114  			break
  6115  		}
  6116  		c := auxIntToInt64(v_1.AuxInt)
  6117  		if !(uint32(c) < 32) {
  6118  			break
  6119  		}
  6120  		v.reset(OpMIPSSRLconst)
  6121  		v.AuxInt = int32ToAuxInt(int32(c))
  6122  		v.AddArg(x)
  6123  		return true
  6124  	}
  6125  	// match: (Rsh32Ux64 _ (Const64 [c]))
  6126  	// cond: uint32(c) >= 32
  6127  	// result: (MOVWconst [0])
  6128  	for {
  6129  		if v_1.Op != OpConst64 {
  6130  			break
  6131  		}
  6132  		c := auxIntToInt64(v_1.AuxInt)
  6133  		if !(uint32(c) >= 32) {
  6134  			break
  6135  		}
  6136  		v.reset(OpMIPSMOVWconst)
  6137  		v.AuxInt = int32ToAuxInt(0)
  6138  		return true
  6139  	}
  6140  	return false
  6141  }
  6142  func rewriteValueMIPS_OpRsh32Ux8(v *Value) bool {
  6143  	v_1 := v.Args[1]
  6144  	v_0 := v.Args[0]
  6145  	b := v.Block
  6146  	typ := &b.Func.Config.Types
  6147  	// match: (Rsh32Ux8 <t> x y)
  6148  	// result: (CMOVZ (SRL <t> x (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6149  	for {
  6150  		t := v.Type
  6151  		x := v_0
  6152  		y := v_1
  6153  		v.reset(OpMIPSCMOVZ)
  6154  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6155  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6156  		v1.AddArg(y)
  6157  		v0.AddArg2(x, v1)
  6158  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6159  		v2.AuxInt = int32ToAuxInt(0)
  6160  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6161  		v3.AuxInt = int32ToAuxInt(32)
  6162  		v3.AddArg(v1)
  6163  		v.AddArg3(v0, v2, v3)
  6164  		return true
  6165  	}
  6166  }
  6167  func rewriteValueMIPS_OpRsh32x16(v *Value) bool {
  6168  	v_1 := v.Args[1]
  6169  	v_0 := v.Args[0]
  6170  	b := v.Block
  6171  	typ := &b.Func.Config.Types
  6172  	// match: (Rsh32x16 x y)
  6173  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6174  	for {
  6175  		x := v_0
  6176  		y := v_1
  6177  		v.reset(OpMIPSSRA)
  6178  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6179  		v1 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6180  		v1.AddArg(y)
  6181  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6182  		v2.AuxInt = int32ToAuxInt(31)
  6183  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6184  		v3.AuxInt = int32ToAuxInt(32)
  6185  		v3.AddArg(v1)
  6186  		v0.AddArg3(v1, v2, v3)
  6187  		v.AddArg2(x, v0)
  6188  		return true
  6189  	}
  6190  }
  6191  func rewriteValueMIPS_OpRsh32x32(v *Value) bool {
  6192  	v_1 := v.Args[1]
  6193  	v_0 := v.Args[0]
  6194  	b := v.Block
  6195  	typ := &b.Func.Config.Types
  6196  	// match: (Rsh32x32 x y)
  6197  	// result: (SRA x ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6198  	for {
  6199  		x := v_0
  6200  		y := v_1
  6201  		v.reset(OpMIPSSRA)
  6202  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6203  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6204  		v1.AuxInt = int32ToAuxInt(31)
  6205  		v2 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6206  		v2.AuxInt = int32ToAuxInt(32)
  6207  		v2.AddArg(y)
  6208  		v0.AddArg3(y, v1, v2)
  6209  		v.AddArg2(x, v0)
  6210  		return true
  6211  	}
  6212  }
  6213  func rewriteValueMIPS_OpRsh32x64(v *Value) bool {
  6214  	v_1 := v.Args[1]
  6215  	v_0 := v.Args[0]
  6216  	// match: (Rsh32x64 x (Const64 [c]))
  6217  	// cond: uint32(c) < 32
  6218  	// result: (SRAconst x [int32(c)])
  6219  	for {
  6220  		x := v_0
  6221  		if v_1.Op != OpConst64 {
  6222  			break
  6223  		}
  6224  		c := auxIntToInt64(v_1.AuxInt)
  6225  		if !(uint32(c) < 32) {
  6226  			break
  6227  		}
  6228  		v.reset(OpMIPSSRAconst)
  6229  		v.AuxInt = int32ToAuxInt(int32(c))
  6230  		v.AddArg(x)
  6231  		return true
  6232  	}
  6233  	// match: (Rsh32x64 x (Const64 [c]))
  6234  	// cond: uint32(c) >= 32
  6235  	// result: (SRAconst x [31])
  6236  	for {
  6237  		x := v_0
  6238  		if v_1.Op != OpConst64 {
  6239  			break
  6240  		}
  6241  		c := auxIntToInt64(v_1.AuxInt)
  6242  		if !(uint32(c) >= 32) {
  6243  			break
  6244  		}
  6245  		v.reset(OpMIPSSRAconst)
  6246  		v.AuxInt = int32ToAuxInt(31)
  6247  		v.AddArg(x)
  6248  		return true
  6249  	}
  6250  	return false
  6251  }
  6252  func rewriteValueMIPS_OpRsh32x8(v *Value) bool {
  6253  	v_1 := v.Args[1]
  6254  	v_0 := v.Args[0]
  6255  	b := v.Block
  6256  	typ := &b.Func.Config.Types
  6257  	// match: (Rsh32x8 x y)
  6258  	// result: (SRA x ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6259  	for {
  6260  		x := v_0
  6261  		y := v_1
  6262  		v.reset(OpMIPSSRA)
  6263  		v0 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6264  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6265  		v1.AddArg(y)
  6266  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6267  		v2.AuxInt = int32ToAuxInt(31)
  6268  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6269  		v3.AuxInt = int32ToAuxInt(32)
  6270  		v3.AddArg(v1)
  6271  		v0.AddArg3(v1, v2, v3)
  6272  		v.AddArg2(x, v0)
  6273  		return true
  6274  	}
  6275  }
  6276  func rewriteValueMIPS_OpRsh8Ux16(v *Value) bool {
  6277  	v_1 := v.Args[1]
  6278  	v_0 := v.Args[0]
  6279  	b := v.Block
  6280  	typ := &b.Func.Config.Types
  6281  	// match: (Rsh8Ux16 <t> x y)
  6282  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt16to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt16to32 y)))
  6283  	for {
  6284  		t := v.Type
  6285  		x := v_0
  6286  		y := v_1
  6287  		v.reset(OpMIPSCMOVZ)
  6288  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6289  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6290  		v1.AddArg(x)
  6291  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6292  		v2.AddArg(y)
  6293  		v0.AddArg2(v1, v2)
  6294  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6295  		v3.AuxInt = int32ToAuxInt(0)
  6296  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6297  		v4.AuxInt = int32ToAuxInt(32)
  6298  		v4.AddArg(v2)
  6299  		v.AddArg3(v0, v3, v4)
  6300  		return true
  6301  	}
  6302  }
  6303  func rewriteValueMIPS_OpRsh8Ux32(v *Value) bool {
  6304  	v_1 := v.Args[1]
  6305  	v_0 := v.Args[0]
  6306  	b := v.Block
  6307  	typ := &b.Func.Config.Types
  6308  	// match: (Rsh8Ux32 <t> x y)
  6309  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) y) (MOVWconst [0]) (SGTUconst [32] y))
  6310  	for {
  6311  		t := v.Type
  6312  		x := v_0
  6313  		y := v_1
  6314  		v.reset(OpMIPSCMOVZ)
  6315  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6316  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6317  		v1.AddArg(x)
  6318  		v0.AddArg2(v1, y)
  6319  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6320  		v2.AuxInt = int32ToAuxInt(0)
  6321  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6322  		v3.AuxInt = int32ToAuxInt(32)
  6323  		v3.AddArg(y)
  6324  		v.AddArg3(v0, v2, v3)
  6325  		return true
  6326  	}
  6327  }
  6328  func rewriteValueMIPS_OpRsh8Ux64(v *Value) bool {
  6329  	v_1 := v.Args[1]
  6330  	v_0 := v.Args[0]
  6331  	b := v.Block
  6332  	typ := &b.Func.Config.Types
  6333  	// match: (Rsh8Ux64 x (Const64 [c]))
  6334  	// cond: uint32(c) < 8
  6335  	// result: (SRLconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6336  	for {
  6337  		x := v_0
  6338  		if v_1.Op != OpConst64 {
  6339  			break
  6340  		}
  6341  		c := auxIntToInt64(v_1.AuxInt)
  6342  		if !(uint32(c) < 8) {
  6343  			break
  6344  		}
  6345  		v.reset(OpMIPSSRLconst)
  6346  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6347  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6348  		v0.AuxInt = int32ToAuxInt(24)
  6349  		v0.AddArg(x)
  6350  		v.AddArg(v0)
  6351  		return true
  6352  	}
  6353  	// match: (Rsh8Ux64 _ (Const64 [c]))
  6354  	// cond: uint32(c) >= 8
  6355  	// result: (MOVWconst [0])
  6356  	for {
  6357  		if v_1.Op != OpConst64 {
  6358  			break
  6359  		}
  6360  		c := auxIntToInt64(v_1.AuxInt)
  6361  		if !(uint32(c) >= 8) {
  6362  			break
  6363  		}
  6364  		v.reset(OpMIPSMOVWconst)
  6365  		v.AuxInt = int32ToAuxInt(0)
  6366  		return true
  6367  	}
  6368  	return false
  6369  }
  6370  func rewriteValueMIPS_OpRsh8Ux8(v *Value) bool {
  6371  	v_1 := v.Args[1]
  6372  	v_0 := v.Args[0]
  6373  	b := v.Block
  6374  	typ := &b.Func.Config.Types
  6375  	// match: (Rsh8Ux8 <t> x y)
  6376  	// result: (CMOVZ (SRL <t> (ZeroExt8to32 x) (ZeroExt8to32 y) ) (MOVWconst [0]) (SGTUconst [32] (ZeroExt8to32 y)))
  6377  	for {
  6378  		t := v.Type
  6379  		x := v_0
  6380  		y := v_1
  6381  		v.reset(OpMIPSCMOVZ)
  6382  		v0 := b.NewValue0(v.Pos, OpMIPSSRL, t)
  6383  		v1 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6384  		v1.AddArg(x)
  6385  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6386  		v2.AddArg(y)
  6387  		v0.AddArg2(v1, v2)
  6388  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6389  		v3.AuxInt = int32ToAuxInt(0)
  6390  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6391  		v4.AuxInt = int32ToAuxInt(32)
  6392  		v4.AddArg(v2)
  6393  		v.AddArg3(v0, v3, v4)
  6394  		return true
  6395  	}
  6396  }
  6397  func rewriteValueMIPS_OpRsh8x16(v *Value) bool {
  6398  	v_1 := v.Args[1]
  6399  	v_0 := v.Args[0]
  6400  	b := v.Block
  6401  	typ := &b.Func.Config.Types
  6402  	// match: (Rsh8x16 x y)
  6403  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt16to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt16to32 y))))
  6404  	for {
  6405  		x := v_0
  6406  		y := v_1
  6407  		v.reset(OpMIPSSRA)
  6408  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6409  		v0.AddArg(x)
  6410  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6411  		v2 := b.NewValue0(v.Pos, OpZeroExt16to32, typ.UInt32)
  6412  		v2.AddArg(y)
  6413  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6414  		v3.AuxInt = int32ToAuxInt(31)
  6415  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6416  		v4.AuxInt = int32ToAuxInt(32)
  6417  		v4.AddArg(v2)
  6418  		v1.AddArg3(v2, v3, v4)
  6419  		v.AddArg2(v0, v1)
  6420  		return true
  6421  	}
  6422  }
  6423  func rewriteValueMIPS_OpRsh8x32(v *Value) bool {
  6424  	v_1 := v.Args[1]
  6425  	v_0 := v.Args[0]
  6426  	b := v.Block
  6427  	typ := &b.Func.Config.Types
  6428  	// match: (Rsh8x32 x y)
  6429  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> y (MOVWconst [31]) (SGTUconst [32] y)))
  6430  	for {
  6431  		x := v_0
  6432  		y := v_1
  6433  		v.reset(OpMIPSSRA)
  6434  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6435  		v0.AddArg(x)
  6436  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6437  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6438  		v2.AuxInt = int32ToAuxInt(31)
  6439  		v3 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6440  		v3.AuxInt = int32ToAuxInt(32)
  6441  		v3.AddArg(y)
  6442  		v1.AddArg3(y, v2, v3)
  6443  		v.AddArg2(v0, v1)
  6444  		return true
  6445  	}
  6446  }
  6447  func rewriteValueMIPS_OpRsh8x64(v *Value) bool {
  6448  	v_1 := v.Args[1]
  6449  	v_0 := v.Args[0]
  6450  	b := v.Block
  6451  	typ := &b.Func.Config.Types
  6452  	// match: (Rsh8x64 x (Const64 [c]))
  6453  	// cond: uint32(c) < 8
  6454  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [int32(c+24)])
  6455  	for {
  6456  		x := v_0
  6457  		if v_1.Op != OpConst64 {
  6458  			break
  6459  		}
  6460  		c := auxIntToInt64(v_1.AuxInt)
  6461  		if !(uint32(c) < 8) {
  6462  			break
  6463  		}
  6464  		v.reset(OpMIPSSRAconst)
  6465  		v.AuxInt = int32ToAuxInt(int32(c + 24))
  6466  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6467  		v0.AuxInt = int32ToAuxInt(24)
  6468  		v0.AddArg(x)
  6469  		v.AddArg(v0)
  6470  		return true
  6471  	}
  6472  	// match: (Rsh8x64 x (Const64 [c]))
  6473  	// cond: uint32(c) >= 8
  6474  	// result: (SRAconst (SLLconst <typ.UInt32> x [24]) [31])
  6475  	for {
  6476  		x := v_0
  6477  		if v_1.Op != OpConst64 {
  6478  			break
  6479  		}
  6480  		c := auxIntToInt64(v_1.AuxInt)
  6481  		if !(uint32(c) >= 8) {
  6482  			break
  6483  		}
  6484  		v.reset(OpMIPSSRAconst)
  6485  		v.AuxInt = int32ToAuxInt(31)
  6486  		v0 := b.NewValue0(v.Pos, OpMIPSSLLconst, typ.UInt32)
  6487  		v0.AuxInt = int32ToAuxInt(24)
  6488  		v0.AddArg(x)
  6489  		v.AddArg(v0)
  6490  		return true
  6491  	}
  6492  	return false
  6493  }
  6494  func rewriteValueMIPS_OpRsh8x8(v *Value) bool {
  6495  	v_1 := v.Args[1]
  6496  	v_0 := v.Args[0]
  6497  	b := v.Block
  6498  	typ := &b.Func.Config.Types
  6499  	// match: (Rsh8x8 x y)
  6500  	// result: (SRA (SignExt16to32 x) ( CMOVZ <typ.UInt32> (ZeroExt8to32 y) (MOVWconst [31]) (SGTUconst [32] (ZeroExt8to32 y))))
  6501  	for {
  6502  		x := v_0
  6503  		y := v_1
  6504  		v.reset(OpMIPSSRA)
  6505  		v0 := b.NewValue0(v.Pos, OpSignExt16to32, typ.Int32)
  6506  		v0.AddArg(x)
  6507  		v1 := b.NewValue0(v.Pos, OpMIPSCMOVZ, typ.UInt32)
  6508  		v2 := b.NewValue0(v.Pos, OpZeroExt8to32, typ.UInt32)
  6509  		v2.AddArg(y)
  6510  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6511  		v3.AuxInt = int32ToAuxInt(31)
  6512  		v4 := b.NewValue0(v.Pos, OpMIPSSGTUconst, typ.Bool)
  6513  		v4.AuxInt = int32ToAuxInt(32)
  6514  		v4.AddArg(v2)
  6515  		v1.AddArg3(v2, v3, v4)
  6516  		v.AddArg2(v0, v1)
  6517  		return true
  6518  	}
  6519  }
  6520  func rewriteValueMIPS_OpSelect0(v *Value) bool {
  6521  	v_0 := v.Args[0]
  6522  	b := v.Block
  6523  	typ := &b.Func.Config.Types
  6524  	// match: (Select0 (Add32carry <t> x y))
  6525  	// result: (ADD <t.FieldType(0)> x y)
  6526  	for {
  6527  		if v_0.Op != OpAdd32carry {
  6528  			break
  6529  		}
  6530  		t := v_0.Type
  6531  		y := v_0.Args[1]
  6532  		x := v_0.Args[0]
  6533  		v.reset(OpMIPSADD)
  6534  		v.Type = t.FieldType(0)
  6535  		v.AddArg2(x, y)
  6536  		return true
  6537  	}
  6538  	// match: (Select0 (Sub32carry <t> x y))
  6539  	// result: (SUB <t.FieldType(0)> x y)
  6540  	for {
  6541  		if v_0.Op != OpSub32carry {
  6542  			break
  6543  		}
  6544  		t := v_0.Type
  6545  		y := v_0.Args[1]
  6546  		x := v_0.Args[0]
  6547  		v.reset(OpMIPSSUB)
  6548  		v.Type = t.FieldType(0)
  6549  		v.AddArg2(x, y)
  6550  		return true
  6551  	}
  6552  	// match: (Select0 (MULTU (MOVWconst [0]) _ ))
  6553  	// result: (MOVWconst [0])
  6554  	for {
  6555  		if v_0.Op != OpMIPSMULTU {
  6556  			break
  6557  		}
  6558  		v_0_0 := v_0.Args[0]
  6559  		v_0_1 := v_0.Args[1]
  6560  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6561  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6562  				continue
  6563  			}
  6564  			v.reset(OpMIPSMOVWconst)
  6565  			v.AuxInt = int32ToAuxInt(0)
  6566  			return true
  6567  		}
  6568  		break
  6569  	}
  6570  	// match: (Select0 (MULTU (MOVWconst [1]) _ ))
  6571  	// result: (MOVWconst [0])
  6572  	for {
  6573  		if v_0.Op != OpMIPSMULTU {
  6574  			break
  6575  		}
  6576  		v_0_0 := v_0.Args[0]
  6577  		v_0_1 := v_0.Args[1]
  6578  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6579  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6580  				continue
  6581  			}
  6582  			v.reset(OpMIPSMOVWconst)
  6583  			v.AuxInt = int32ToAuxInt(0)
  6584  			return true
  6585  		}
  6586  		break
  6587  	}
  6588  	// match: (Select0 (MULTU (MOVWconst [-1]) x ))
  6589  	// result: (CMOVZ (ADDconst <x.Type> [-1] x) (MOVWconst [0]) x)
  6590  	for {
  6591  		if v_0.Op != OpMIPSMULTU {
  6592  			break
  6593  		}
  6594  		_ = v_0.Args[1]
  6595  		v_0_0 := v_0.Args[0]
  6596  		v_0_1 := v_0.Args[1]
  6597  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6598  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6599  				continue
  6600  			}
  6601  			x := v_0_1
  6602  			v.reset(OpMIPSCMOVZ)
  6603  			v0 := b.NewValue0(v.Pos, OpMIPSADDconst, x.Type)
  6604  			v0.AuxInt = int32ToAuxInt(-1)
  6605  			v0.AddArg(x)
  6606  			v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  6607  			v1.AuxInt = int32ToAuxInt(0)
  6608  			v.AddArg3(v0, v1, x)
  6609  			return true
  6610  		}
  6611  		break
  6612  	}
  6613  	// match: (Select0 (MULTU (MOVWconst [c]) x ))
  6614  	// cond: isPowerOfTwo(int64(uint32(c)))
  6615  	// result: (SRLconst [int32(32-log2uint32(int64(c)))] x)
  6616  	for {
  6617  		if v_0.Op != OpMIPSMULTU {
  6618  			break
  6619  		}
  6620  		_ = v_0.Args[1]
  6621  		v_0_0 := v_0.Args[0]
  6622  		v_0_1 := v_0.Args[1]
  6623  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6624  			if v_0_0.Op != OpMIPSMOVWconst {
  6625  				continue
  6626  			}
  6627  			c := auxIntToInt32(v_0_0.AuxInt)
  6628  			x := v_0_1
  6629  			if !(isPowerOfTwo(int64(uint32(c)))) {
  6630  				continue
  6631  			}
  6632  			v.reset(OpMIPSSRLconst)
  6633  			v.AuxInt = int32ToAuxInt(int32(32 - log2uint32(int64(c))))
  6634  			v.AddArg(x)
  6635  			return true
  6636  		}
  6637  		break
  6638  	}
  6639  	// match: (Select0 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6640  	// result: (MOVWconst [int32((int64(uint32(c))*int64(uint32(d)))>>32)])
  6641  	for {
  6642  		if v_0.Op != OpMIPSMULTU {
  6643  			break
  6644  		}
  6645  		_ = v_0.Args[1]
  6646  		v_0_0 := v_0.Args[0]
  6647  		v_0_1 := v_0.Args[1]
  6648  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6649  			if v_0_0.Op != OpMIPSMOVWconst {
  6650  				continue
  6651  			}
  6652  			c := auxIntToInt32(v_0_0.AuxInt)
  6653  			if v_0_1.Op != OpMIPSMOVWconst {
  6654  				continue
  6655  			}
  6656  			d := auxIntToInt32(v_0_1.AuxInt)
  6657  			v.reset(OpMIPSMOVWconst)
  6658  			v.AuxInt = int32ToAuxInt(int32((int64(uint32(c)) * int64(uint32(d))) >> 32))
  6659  			return true
  6660  		}
  6661  		break
  6662  	}
  6663  	// match: (Select0 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6664  	// cond: d != 0
  6665  	// result: (MOVWconst [c%d])
  6666  	for {
  6667  		if v_0.Op != OpMIPSDIV {
  6668  			break
  6669  		}
  6670  		_ = v_0.Args[1]
  6671  		v_0_0 := v_0.Args[0]
  6672  		if v_0_0.Op != OpMIPSMOVWconst {
  6673  			break
  6674  		}
  6675  		c := auxIntToInt32(v_0_0.AuxInt)
  6676  		v_0_1 := v_0.Args[1]
  6677  		if v_0_1.Op != OpMIPSMOVWconst {
  6678  			break
  6679  		}
  6680  		d := auxIntToInt32(v_0_1.AuxInt)
  6681  		if !(d != 0) {
  6682  			break
  6683  		}
  6684  		v.reset(OpMIPSMOVWconst)
  6685  		v.AuxInt = int32ToAuxInt(c % d)
  6686  		return true
  6687  	}
  6688  	// match: (Select0 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6689  	// cond: d != 0
  6690  	// result: (MOVWconst [int32(uint32(c)%uint32(d))])
  6691  	for {
  6692  		if v_0.Op != OpMIPSDIVU {
  6693  			break
  6694  		}
  6695  		_ = v_0.Args[1]
  6696  		v_0_0 := v_0.Args[0]
  6697  		if v_0_0.Op != OpMIPSMOVWconst {
  6698  			break
  6699  		}
  6700  		c := auxIntToInt32(v_0_0.AuxInt)
  6701  		v_0_1 := v_0.Args[1]
  6702  		if v_0_1.Op != OpMIPSMOVWconst {
  6703  			break
  6704  		}
  6705  		d := auxIntToInt32(v_0_1.AuxInt)
  6706  		if !(d != 0) {
  6707  			break
  6708  		}
  6709  		v.reset(OpMIPSMOVWconst)
  6710  		v.AuxInt = int32ToAuxInt(int32(uint32(c) % uint32(d)))
  6711  		return true
  6712  	}
  6713  	return false
  6714  }
  6715  func rewriteValueMIPS_OpSelect1(v *Value) bool {
  6716  	v_0 := v.Args[0]
  6717  	b := v.Block
  6718  	typ := &b.Func.Config.Types
  6719  	// match: (Select1 (Add32carry <t> x y))
  6720  	// result: (SGTU <typ.Bool> x (ADD <t.FieldType(0)> x y))
  6721  	for {
  6722  		if v_0.Op != OpAdd32carry {
  6723  			break
  6724  		}
  6725  		t := v_0.Type
  6726  		y := v_0.Args[1]
  6727  		x := v_0.Args[0]
  6728  		v.reset(OpMIPSSGTU)
  6729  		v.Type = typ.Bool
  6730  		v0 := b.NewValue0(v.Pos, OpMIPSADD, t.FieldType(0))
  6731  		v0.AddArg2(x, y)
  6732  		v.AddArg2(x, v0)
  6733  		return true
  6734  	}
  6735  	// match: (Select1 (Sub32carry <t> x y))
  6736  	// result: (SGTU <typ.Bool> (SUB <t.FieldType(0)> x y) x)
  6737  	for {
  6738  		if v_0.Op != OpSub32carry {
  6739  			break
  6740  		}
  6741  		t := v_0.Type
  6742  		y := v_0.Args[1]
  6743  		x := v_0.Args[0]
  6744  		v.reset(OpMIPSSGTU)
  6745  		v.Type = typ.Bool
  6746  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t.FieldType(0))
  6747  		v0.AddArg2(x, y)
  6748  		v.AddArg2(v0, x)
  6749  		return true
  6750  	}
  6751  	// match: (Select1 (MULTU (MOVWconst [0]) _ ))
  6752  	// result: (MOVWconst [0])
  6753  	for {
  6754  		if v_0.Op != OpMIPSMULTU {
  6755  			break
  6756  		}
  6757  		v_0_0 := v_0.Args[0]
  6758  		v_0_1 := v_0.Args[1]
  6759  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6760  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 0 {
  6761  				continue
  6762  			}
  6763  			v.reset(OpMIPSMOVWconst)
  6764  			v.AuxInt = int32ToAuxInt(0)
  6765  			return true
  6766  		}
  6767  		break
  6768  	}
  6769  	// match: (Select1 (MULTU (MOVWconst [1]) x ))
  6770  	// result: x
  6771  	for {
  6772  		if v_0.Op != OpMIPSMULTU {
  6773  			break
  6774  		}
  6775  		_ = v_0.Args[1]
  6776  		v_0_0 := v_0.Args[0]
  6777  		v_0_1 := v_0.Args[1]
  6778  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6779  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != 1 {
  6780  				continue
  6781  			}
  6782  			x := v_0_1
  6783  			v.copyOf(x)
  6784  			return true
  6785  		}
  6786  		break
  6787  	}
  6788  	// match: (Select1 (MULTU (MOVWconst [-1]) x ))
  6789  	// result: (NEG <x.Type> x)
  6790  	for {
  6791  		if v_0.Op != OpMIPSMULTU {
  6792  			break
  6793  		}
  6794  		_ = v_0.Args[1]
  6795  		v_0_0 := v_0.Args[0]
  6796  		v_0_1 := v_0.Args[1]
  6797  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6798  			if v_0_0.Op != OpMIPSMOVWconst || auxIntToInt32(v_0_0.AuxInt) != -1 {
  6799  				continue
  6800  			}
  6801  			x := v_0_1
  6802  			v.reset(OpMIPSNEG)
  6803  			v.Type = x.Type
  6804  			v.AddArg(x)
  6805  			return true
  6806  		}
  6807  		break
  6808  	}
  6809  	// match: (Select1 (MULTU (MOVWconst [c]) x ))
  6810  	// cond: isPowerOfTwo(int64(uint32(c)))
  6811  	// result: (SLLconst [int32(log2uint32(int64(c)))] x)
  6812  	for {
  6813  		if v_0.Op != OpMIPSMULTU {
  6814  			break
  6815  		}
  6816  		_ = v_0.Args[1]
  6817  		v_0_0 := v_0.Args[0]
  6818  		v_0_1 := v_0.Args[1]
  6819  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6820  			if v_0_0.Op != OpMIPSMOVWconst {
  6821  				continue
  6822  			}
  6823  			c := auxIntToInt32(v_0_0.AuxInt)
  6824  			x := v_0_1
  6825  			if !(isPowerOfTwo(int64(uint32(c)))) {
  6826  				continue
  6827  			}
  6828  			v.reset(OpMIPSSLLconst)
  6829  			v.AuxInt = int32ToAuxInt(int32(log2uint32(int64(c))))
  6830  			v.AddArg(x)
  6831  			return true
  6832  		}
  6833  		break
  6834  	}
  6835  	// match: (Select1 (MULTU (MOVWconst [c]) (MOVWconst [d])))
  6836  	// result: (MOVWconst [int32(uint32(c)*uint32(d))])
  6837  	for {
  6838  		if v_0.Op != OpMIPSMULTU {
  6839  			break
  6840  		}
  6841  		_ = v_0.Args[1]
  6842  		v_0_0 := v_0.Args[0]
  6843  		v_0_1 := v_0.Args[1]
  6844  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
  6845  			if v_0_0.Op != OpMIPSMOVWconst {
  6846  				continue
  6847  			}
  6848  			c := auxIntToInt32(v_0_0.AuxInt)
  6849  			if v_0_1.Op != OpMIPSMOVWconst {
  6850  				continue
  6851  			}
  6852  			d := auxIntToInt32(v_0_1.AuxInt)
  6853  			v.reset(OpMIPSMOVWconst)
  6854  			v.AuxInt = int32ToAuxInt(int32(uint32(c) * uint32(d)))
  6855  			return true
  6856  		}
  6857  		break
  6858  	}
  6859  	// match: (Select1 (DIV (MOVWconst [c]) (MOVWconst [d])))
  6860  	// cond: d != 0
  6861  	// result: (MOVWconst [c/d])
  6862  	for {
  6863  		if v_0.Op != OpMIPSDIV {
  6864  			break
  6865  		}
  6866  		_ = v_0.Args[1]
  6867  		v_0_0 := v_0.Args[0]
  6868  		if v_0_0.Op != OpMIPSMOVWconst {
  6869  			break
  6870  		}
  6871  		c := auxIntToInt32(v_0_0.AuxInt)
  6872  		v_0_1 := v_0.Args[1]
  6873  		if v_0_1.Op != OpMIPSMOVWconst {
  6874  			break
  6875  		}
  6876  		d := auxIntToInt32(v_0_1.AuxInt)
  6877  		if !(d != 0) {
  6878  			break
  6879  		}
  6880  		v.reset(OpMIPSMOVWconst)
  6881  		v.AuxInt = int32ToAuxInt(c / d)
  6882  		return true
  6883  	}
  6884  	// match: (Select1 (DIVU (MOVWconst [c]) (MOVWconst [d])))
  6885  	// cond: d != 0
  6886  	// result: (MOVWconst [int32(uint32(c)/uint32(d))])
  6887  	for {
  6888  		if v_0.Op != OpMIPSDIVU {
  6889  			break
  6890  		}
  6891  		_ = v_0.Args[1]
  6892  		v_0_0 := v_0.Args[0]
  6893  		if v_0_0.Op != OpMIPSMOVWconst {
  6894  			break
  6895  		}
  6896  		c := auxIntToInt32(v_0_0.AuxInt)
  6897  		v_0_1 := v_0.Args[1]
  6898  		if v_0_1.Op != OpMIPSMOVWconst {
  6899  			break
  6900  		}
  6901  		d := auxIntToInt32(v_0_1.AuxInt)
  6902  		if !(d != 0) {
  6903  			break
  6904  		}
  6905  		v.reset(OpMIPSMOVWconst)
  6906  		v.AuxInt = int32ToAuxInt(int32(uint32(c) / uint32(d)))
  6907  		return true
  6908  	}
  6909  	return false
  6910  }
  6911  func rewriteValueMIPS_OpSignmask(v *Value) bool {
  6912  	v_0 := v.Args[0]
  6913  	// match: (Signmask x)
  6914  	// result: (SRAconst x [31])
  6915  	for {
  6916  		x := v_0
  6917  		v.reset(OpMIPSSRAconst)
  6918  		v.AuxInt = int32ToAuxInt(31)
  6919  		v.AddArg(x)
  6920  		return true
  6921  	}
  6922  }
  6923  func rewriteValueMIPS_OpSlicemask(v *Value) bool {
  6924  	v_0 := v.Args[0]
  6925  	b := v.Block
  6926  	// match: (Slicemask <t> x)
  6927  	// result: (SRAconst (NEG <t> x) [31])
  6928  	for {
  6929  		t := v.Type
  6930  		x := v_0
  6931  		v.reset(OpMIPSSRAconst)
  6932  		v.AuxInt = int32ToAuxInt(31)
  6933  		v0 := b.NewValue0(v.Pos, OpMIPSNEG, t)
  6934  		v0.AddArg(x)
  6935  		v.AddArg(v0)
  6936  		return true
  6937  	}
  6938  }
  6939  func rewriteValueMIPS_OpStore(v *Value) bool {
  6940  	v_2 := v.Args[2]
  6941  	v_1 := v.Args[1]
  6942  	v_0 := v.Args[0]
  6943  	// match: (Store {t} ptr val mem)
  6944  	// cond: t.Size() == 1
  6945  	// result: (MOVBstore ptr val mem)
  6946  	for {
  6947  		t := auxToType(v.Aux)
  6948  		ptr := v_0
  6949  		val := v_1
  6950  		mem := v_2
  6951  		if !(t.Size() == 1) {
  6952  			break
  6953  		}
  6954  		v.reset(OpMIPSMOVBstore)
  6955  		v.AddArg3(ptr, val, mem)
  6956  		return true
  6957  	}
  6958  	// match: (Store {t} ptr val mem)
  6959  	// cond: t.Size() == 2
  6960  	// result: (MOVHstore ptr val mem)
  6961  	for {
  6962  		t := auxToType(v.Aux)
  6963  		ptr := v_0
  6964  		val := v_1
  6965  		mem := v_2
  6966  		if !(t.Size() == 2) {
  6967  			break
  6968  		}
  6969  		v.reset(OpMIPSMOVHstore)
  6970  		v.AddArg3(ptr, val, mem)
  6971  		return true
  6972  	}
  6973  	// match: (Store {t} ptr val mem)
  6974  	// cond: t.Size() == 4 && !t.IsFloat()
  6975  	// result: (MOVWstore ptr val mem)
  6976  	for {
  6977  		t := auxToType(v.Aux)
  6978  		ptr := v_0
  6979  		val := v_1
  6980  		mem := v_2
  6981  		if !(t.Size() == 4 && !t.IsFloat()) {
  6982  			break
  6983  		}
  6984  		v.reset(OpMIPSMOVWstore)
  6985  		v.AddArg3(ptr, val, mem)
  6986  		return true
  6987  	}
  6988  	// match: (Store {t} ptr val mem)
  6989  	// cond: t.Size() == 4 && t.IsFloat()
  6990  	// result: (MOVFstore ptr val mem)
  6991  	for {
  6992  		t := auxToType(v.Aux)
  6993  		ptr := v_0
  6994  		val := v_1
  6995  		mem := v_2
  6996  		if !(t.Size() == 4 && t.IsFloat()) {
  6997  			break
  6998  		}
  6999  		v.reset(OpMIPSMOVFstore)
  7000  		v.AddArg3(ptr, val, mem)
  7001  		return true
  7002  	}
  7003  	// match: (Store {t} ptr val mem)
  7004  	// cond: t.Size() == 8 && t.IsFloat()
  7005  	// result: (MOVDstore ptr val mem)
  7006  	for {
  7007  		t := auxToType(v.Aux)
  7008  		ptr := v_0
  7009  		val := v_1
  7010  		mem := v_2
  7011  		if !(t.Size() == 8 && t.IsFloat()) {
  7012  			break
  7013  		}
  7014  		v.reset(OpMIPSMOVDstore)
  7015  		v.AddArg3(ptr, val, mem)
  7016  		return true
  7017  	}
  7018  	return false
  7019  }
  7020  func rewriteValueMIPS_OpSub32withcarry(v *Value) bool {
  7021  	v_2 := v.Args[2]
  7022  	v_1 := v.Args[1]
  7023  	v_0 := v.Args[0]
  7024  	b := v.Block
  7025  	// match: (Sub32withcarry <t> x y c)
  7026  	// result: (SUB (SUB <t> x y) c)
  7027  	for {
  7028  		t := v.Type
  7029  		x := v_0
  7030  		y := v_1
  7031  		c := v_2
  7032  		v.reset(OpMIPSSUB)
  7033  		v0 := b.NewValue0(v.Pos, OpMIPSSUB, t)
  7034  		v0.AddArg2(x, y)
  7035  		v.AddArg2(v0, c)
  7036  		return true
  7037  	}
  7038  }
  7039  func rewriteValueMIPS_OpZero(v *Value) bool {
  7040  	v_1 := v.Args[1]
  7041  	v_0 := v.Args[0]
  7042  	b := v.Block
  7043  	config := b.Func.Config
  7044  	typ := &b.Func.Config.Types
  7045  	// match: (Zero [0] _ mem)
  7046  	// result: mem
  7047  	for {
  7048  		if auxIntToInt64(v.AuxInt) != 0 {
  7049  			break
  7050  		}
  7051  		mem := v_1
  7052  		v.copyOf(mem)
  7053  		return true
  7054  	}
  7055  	// match: (Zero [1] ptr mem)
  7056  	// result: (MOVBstore ptr (MOVWconst [0]) mem)
  7057  	for {
  7058  		if auxIntToInt64(v.AuxInt) != 1 {
  7059  			break
  7060  		}
  7061  		ptr := v_0
  7062  		mem := v_1
  7063  		v.reset(OpMIPSMOVBstore)
  7064  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7065  		v0.AuxInt = int32ToAuxInt(0)
  7066  		v.AddArg3(ptr, v0, mem)
  7067  		return true
  7068  	}
  7069  	// match: (Zero [2] {t} ptr mem)
  7070  	// cond: t.Alignment()%2 == 0
  7071  	// result: (MOVHstore ptr (MOVWconst [0]) mem)
  7072  	for {
  7073  		if auxIntToInt64(v.AuxInt) != 2 {
  7074  			break
  7075  		}
  7076  		t := auxToType(v.Aux)
  7077  		ptr := v_0
  7078  		mem := v_1
  7079  		if !(t.Alignment()%2 == 0) {
  7080  			break
  7081  		}
  7082  		v.reset(OpMIPSMOVHstore)
  7083  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7084  		v0.AuxInt = int32ToAuxInt(0)
  7085  		v.AddArg3(ptr, v0, mem)
  7086  		return true
  7087  	}
  7088  	// match: (Zero [2] ptr mem)
  7089  	// result: (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))
  7090  	for {
  7091  		if auxIntToInt64(v.AuxInt) != 2 {
  7092  			break
  7093  		}
  7094  		ptr := v_0
  7095  		mem := v_1
  7096  		v.reset(OpMIPSMOVBstore)
  7097  		v.AuxInt = int32ToAuxInt(1)
  7098  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7099  		v0.AuxInt = int32ToAuxInt(0)
  7100  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7101  		v1.AuxInt = int32ToAuxInt(0)
  7102  		v1.AddArg3(ptr, v0, mem)
  7103  		v.AddArg3(ptr, v0, v1)
  7104  		return true
  7105  	}
  7106  	// match: (Zero [4] {t} ptr mem)
  7107  	// cond: t.Alignment()%4 == 0
  7108  	// result: (MOVWstore ptr (MOVWconst [0]) mem)
  7109  	for {
  7110  		if auxIntToInt64(v.AuxInt) != 4 {
  7111  			break
  7112  		}
  7113  		t := auxToType(v.Aux)
  7114  		ptr := v_0
  7115  		mem := v_1
  7116  		if !(t.Alignment()%4 == 0) {
  7117  			break
  7118  		}
  7119  		v.reset(OpMIPSMOVWstore)
  7120  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7121  		v0.AuxInt = int32ToAuxInt(0)
  7122  		v.AddArg3(ptr, v0, mem)
  7123  		return true
  7124  	}
  7125  	// match: (Zero [4] {t} ptr mem)
  7126  	// cond: t.Alignment()%2 == 0
  7127  	// result: (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem))
  7128  	for {
  7129  		if auxIntToInt64(v.AuxInt) != 4 {
  7130  			break
  7131  		}
  7132  		t := auxToType(v.Aux)
  7133  		ptr := v_0
  7134  		mem := v_1
  7135  		if !(t.Alignment()%2 == 0) {
  7136  			break
  7137  		}
  7138  		v.reset(OpMIPSMOVHstore)
  7139  		v.AuxInt = int32ToAuxInt(2)
  7140  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7141  		v0.AuxInt = int32ToAuxInt(0)
  7142  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7143  		v1.AuxInt = int32ToAuxInt(0)
  7144  		v1.AddArg3(ptr, v0, mem)
  7145  		v.AddArg3(ptr, v0, v1)
  7146  		return true
  7147  	}
  7148  	// match: (Zero [4] ptr mem)
  7149  	// result: (MOVBstore [3] ptr (MOVWconst [0]) (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem))))
  7150  	for {
  7151  		if auxIntToInt64(v.AuxInt) != 4 {
  7152  			break
  7153  		}
  7154  		ptr := v_0
  7155  		mem := v_1
  7156  		v.reset(OpMIPSMOVBstore)
  7157  		v.AuxInt = int32ToAuxInt(3)
  7158  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7159  		v0.AuxInt = int32ToAuxInt(0)
  7160  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7161  		v1.AuxInt = int32ToAuxInt(2)
  7162  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7163  		v2.AuxInt = int32ToAuxInt(1)
  7164  		v3 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7165  		v3.AuxInt = int32ToAuxInt(0)
  7166  		v3.AddArg3(ptr, v0, mem)
  7167  		v2.AddArg3(ptr, v0, v3)
  7168  		v1.AddArg3(ptr, v0, v2)
  7169  		v.AddArg3(ptr, v0, v1)
  7170  		return true
  7171  	}
  7172  	// match: (Zero [3] ptr mem)
  7173  	// result: (MOVBstore [2] ptr (MOVWconst [0]) (MOVBstore [1] ptr (MOVWconst [0]) (MOVBstore [0] ptr (MOVWconst [0]) mem)))
  7174  	for {
  7175  		if auxIntToInt64(v.AuxInt) != 3 {
  7176  			break
  7177  		}
  7178  		ptr := v_0
  7179  		mem := v_1
  7180  		v.reset(OpMIPSMOVBstore)
  7181  		v.AuxInt = int32ToAuxInt(2)
  7182  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7183  		v0.AuxInt = int32ToAuxInt(0)
  7184  		v1 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7185  		v1.AuxInt = int32ToAuxInt(1)
  7186  		v2 := b.NewValue0(v.Pos, OpMIPSMOVBstore, types.TypeMem)
  7187  		v2.AuxInt = int32ToAuxInt(0)
  7188  		v2.AddArg3(ptr, v0, mem)
  7189  		v1.AddArg3(ptr, v0, v2)
  7190  		v.AddArg3(ptr, v0, v1)
  7191  		return true
  7192  	}
  7193  	// match: (Zero [6] {t} ptr mem)
  7194  	// cond: t.Alignment()%2 == 0
  7195  	// result: (MOVHstore [4] ptr (MOVWconst [0]) (MOVHstore [2] ptr (MOVWconst [0]) (MOVHstore [0] ptr (MOVWconst [0]) mem)))
  7196  	for {
  7197  		if auxIntToInt64(v.AuxInt) != 6 {
  7198  			break
  7199  		}
  7200  		t := auxToType(v.Aux)
  7201  		ptr := v_0
  7202  		mem := v_1
  7203  		if !(t.Alignment()%2 == 0) {
  7204  			break
  7205  		}
  7206  		v.reset(OpMIPSMOVHstore)
  7207  		v.AuxInt = int32ToAuxInt(4)
  7208  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7209  		v0.AuxInt = int32ToAuxInt(0)
  7210  		v1 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7211  		v1.AuxInt = int32ToAuxInt(2)
  7212  		v2 := b.NewValue0(v.Pos, OpMIPSMOVHstore, types.TypeMem)
  7213  		v2.AuxInt = int32ToAuxInt(0)
  7214  		v2.AddArg3(ptr, v0, mem)
  7215  		v1.AddArg3(ptr, v0, v2)
  7216  		v.AddArg3(ptr, v0, v1)
  7217  		return true
  7218  	}
  7219  	// match: (Zero [8] {t} ptr mem)
  7220  	// cond: t.Alignment()%4 == 0
  7221  	// result: (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))
  7222  	for {
  7223  		if auxIntToInt64(v.AuxInt) != 8 {
  7224  			break
  7225  		}
  7226  		t := auxToType(v.Aux)
  7227  		ptr := v_0
  7228  		mem := v_1
  7229  		if !(t.Alignment()%4 == 0) {
  7230  			break
  7231  		}
  7232  		v.reset(OpMIPSMOVWstore)
  7233  		v.AuxInt = int32ToAuxInt(4)
  7234  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7235  		v0.AuxInt = int32ToAuxInt(0)
  7236  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7237  		v1.AuxInt = int32ToAuxInt(0)
  7238  		v1.AddArg3(ptr, v0, mem)
  7239  		v.AddArg3(ptr, v0, v1)
  7240  		return true
  7241  	}
  7242  	// match: (Zero [12] {t} ptr mem)
  7243  	// cond: t.Alignment()%4 == 0
  7244  	// result: (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem)))
  7245  	for {
  7246  		if auxIntToInt64(v.AuxInt) != 12 {
  7247  			break
  7248  		}
  7249  		t := auxToType(v.Aux)
  7250  		ptr := v_0
  7251  		mem := v_1
  7252  		if !(t.Alignment()%4 == 0) {
  7253  			break
  7254  		}
  7255  		v.reset(OpMIPSMOVWstore)
  7256  		v.AuxInt = int32ToAuxInt(8)
  7257  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7258  		v0.AuxInt = int32ToAuxInt(0)
  7259  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7260  		v1.AuxInt = int32ToAuxInt(4)
  7261  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7262  		v2.AuxInt = int32ToAuxInt(0)
  7263  		v2.AddArg3(ptr, v0, mem)
  7264  		v1.AddArg3(ptr, v0, v2)
  7265  		v.AddArg3(ptr, v0, v1)
  7266  		return true
  7267  	}
  7268  	// match: (Zero [16] {t} ptr mem)
  7269  	// cond: t.Alignment()%4 == 0
  7270  	// result: (MOVWstore [12] ptr (MOVWconst [0]) (MOVWstore [8] ptr (MOVWconst [0]) (MOVWstore [4] ptr (MOVWconst [0]) (MOVWstore [0] ptr (MOVWconst [0]) mem))))
  7271  	for {
  7272  		if auxIntToInt64(v.AuxInt) != 16 {
  7273  			break
  7274  		}
  7275  		t := auxToType(v.Aux)
  7276  		ptr := v_0
  7277  		mem := v_1
  7278  		if !(t.Alignment()%4 == 0) {
  7279  			break
  7280  		}
  7281  		v.reset(OpMIPSMOVWstore)
  7282  		v.AuxInt = int32ToAuxInt(12)
  7283  		v0 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7284  		v0.AuxInt = int32ToAuxInt(0)
  7285  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7286  		v1.AuxInt = int32ToAuxInt(8)
  7287  		v2 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7288  		v2.AuxInt = int32ToAuxInt(4)
  7289  		v3 := b.NewValue0(v.Pos, OpMIPSMOVWstore, types.TypeMem)
  7290  		v3.AuxInt = int32ToAuxInt(0)
  7291  		v3.AddArg3(ptr, v0, mem)
  7292  		v2.AddArg3(ptr, v0, v3)
  7293  		v1.AddArg3(ptr, v0, v2)
  7294  		v.AddArg3(ptr, v0, v1)
  7295  		return true
  7296  	}
  7297  	// match: (Zero [s] {t} ptr mem)
  7298  	// cond: (s > 16 || t.Alignment()%4 != 0)
  7299  	// result: (LoweredZero [int32(t.Alignment())] ptr (ADDconst <ptr.Type> ptr [int32(s-moveSize(t.Alignment(), config))]) mem)
  7300  	for {
  7301  		s := auxIntToInt64(v.AuxInt)
  7302  		t := auxToType(v.Aux)
  7303  		ptr := v_0
  7304  		mem := v_1
  7305  		if !(s > 16 || t.Alignment()%4 != 0) {
  7306  			break
  7307  		}
  7308  		v.reset(OpMIPSLoweredZero)
  7309  		v.AuxInt = int32ToAuxInt(int32(t.Alignment()))
  7310  		v0 := b.NewValue0(v.Pos, OpMIPSADDconst, ptr.Type)
  7311  		v0.AuxInt = int32ToAuxInt(int32(s - moveSize(t.Alignment(), config)))
  7312  		v0.AddArg(ptr)
  7313  		v.AddArg3(ptr, v0, mem)
  7314  		return true
  7315  	}
  7316  	return false
  7317  }
  7318  func rewriteValueMIPS_OpZeromask(v *Value) bool {
  7319  	v_0 := v.Args[0]
  7320  	b := v.Block
  7321  	typ := &b.Func.Config.Types
  7322  	// match: (Zeromask x)
  7323  	// result: (NEG (SGTU x (MOVWconst [0])))
  7324  	for {
  7325  		x := v_0
  7326  		v.reset(OpMIPSNEG)
  7327  		v0 := b.NewValue0(v.Pos, OpMIPSSGTU, typ.Bool)
  7328  		v1 := b.NewValue0(v.Pos, OpMIPSMOVWconst, typ.UInt32)
  7329  		v1.AuxInt = int32ToAuxInt(0)
  7330  		v0.AddArg2(x, v1)
  7331  		v.AddArg(v0)
  7332  		return true
  7333  	}
  7334  }
  7335  func rewriteBlockMIPS(b *Block) bool {
  7336  	switch b.Kind {
  7337  	case BlockMIPSEQ:
  7338  		// match: (EQ (FPFlagTrue cmp) yes no)
  7339  		// result: (FPF cmp yes no)
  7340  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7341  			v_0 := b.Controls[0]
  7342  			cmp := v_0.Args[0]
  7343  			b.resetWithControl(BlockMIPSFPF, cmp)
  7344  			return true
  7345  		}
  7346  		// match: (EQ (FPFlagFalse cmp) yes no)
  7347  		// result: (FPT cmp yes no)
  7348  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7349  			v_0 := b.Controls[0]
  7350  			cmp := v_0.Args[0]
  7351  			b.resetWithControl(BlockMIPSFPT, cmp)
  7352  			return true
  7353  		}
  7354  		// match: (EQ (XORconst [1] cmp:(SGT _ _)) yes no)
  7355  		// result: (NE cmp yes no)
  7356  		for b.Controls[0].Op == OpMIPSXORconst {
  7357  			v_0 := b.Controls[0]
  7358  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7359  				break
  7360  			}
  7361  			cmp := v_0.Args[0]
  7362  			if cmp.Op != OpMIPSSGT {
  7363  				break
  7364  			}
  7365  			b.resetWithControl(BlockMIPSNE, cmp)
  7366  			return true
  7367  		}
  7368  		// match: (EQ (XORconst [1] cmp:(SGTU _ _)) yes no)
  7369  		// result: (NE cmp yes no)
  7370  		for b.Controls[0].Op == OpMIPSXORconst {
  7371  			v_0 := b.Controls[0]
  7372  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7373  				break
  7374  			}
  7375  			cmp := v_0.Args[0]
  7376  			if cmp.Op != OpMIPSSGTU {
  7377  				break
  7378  			}
  7379  			b.resetWithControl(BlockMIPSNE, cmp)
  7380  			return true
  7381  		}
  7382  		// match: (EQ (XORconst [1] cmp:(SGTconst _)) yes no)
  7383  		// result: (NE cmp yes no)
  7384  		for b.Controls[0].Op == OpMIPSXORconst {
  7385  			v_0 := b.Controls[0]
  7386  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7387  				break
  7388  			}
  7389  			cmp := v_0.Args[0]
  7390  			if cmp.Op != OpMIPSSGTconst {
  7391  				break
  7392  			}
  7393  			b.resetWithControl(BlockMIPSNE, cmp)
  7394  			return true
  7395  		}
  7396  		// match: (EQ (XORconst [1] cmp:(SGTUconst _)) yes no)
  7397  		// result: (NE cmp yes no)
  7398  		for b.Controls[0].Op == OpMIPSXORconst {
  7399  			v_0 := b.Controls[0]
  7400  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7401  				break
  7402  			}
  7403  			cmp := v_0.Args[0]
  7404  			if cmp.Op != OpMIPSSGTUconst {
  7405  				break
  7406  			}
  7407  			b.resetWithControl(BlockMIPSNE, cmp)
  7408  			return true
  7409  		}
  7410  		// match: (EQ (XORconst [1] cmp:(SGTzero _)) yes no)
  7411  		// result: (NE cmp yes no)
  7412  		for b.Controls[0].Op == OpMIPSXORconst {
  7413  			v_0 := b.Controls[0]
  7414  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7415  				break
  7416  			}
  7417  			cmp := v_0.Args[0]
  7418  			if cmp.Op != OpMIPSSGTzero {
  7419  				break
  7420  			}
  7421  			b.resetWithControl(BlockMIPSNE, cmp)
  7422  			return true
  7423  		}
  7424  		// match: (EQ (XORconst [1] cmp:(SGTUzero _)) yes no)
  7425  		// result: (NE cmp yes no)
  7426  		for b.Controls[0].Op == OpMIPSXORconst {
  7427  			v_0 := b.Controls[0]
  7428  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7429  				break
  7430  			}
  7431  			cmp := v_0.Args[0]
  7432  			if cmp.Op != OpMIPSSGTUzero {
  7433  				break
  7434  			}
  7435  			b.resetWithControl(BlockMIPSNE, cmp)
  7436  			return true
  7437  		}
  7438  		// match: (EQ (SGTUconst [1] x) yes no)
  7439  		// result: (NE x yes no)
  7440  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7441  			v_0 := b.Controls[0]
  7442  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7443  				break
  7444  			}
  7445  			x := v_0.Args[0]
  7446  			b.resetWithControl(BlockMIPSNE, x)
  7447  			return true
  7448  		}
  7449  		// match: (EQ (SGTUzero x) yes no)
  7450  		// result: (EQ x yes no)
  7451  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7452  			v_0 := b.Controls[0]
  7453  			x := v_0.Args[0]
  7454  			b.resetWithControl(BlockMIPSEQ, x)
  7455  			return true
  7456  		}
  7457  		// match: (EQ (SGTconst [0] x) yes no)
  7458  		// result: (GEZ x yes no)
  7459  		for b.Controls[0].Op == OpMIPSSGTconst {
  7460  			v_0 := b.Controls[0]
  7461  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7462  				break
  7463  			}
  7464  			x := v_0.Args[0]
  7465  			b.resetWithControl(BlockMIPSGEZ, x)
  7466  			return true
  7467  		}
  7468  		// match: (EQ (SGTzero x) yes no)
  7469  		// result: (LEZ x yes no)
  7470  		for b.Controls[0].Op == OpMIPSSGTzero {
  7471  			v_0 := b.Controls[0]
  7472  			x := v_0.Args[0]
  7473  			b.resetWithControl(BlockMIPSLEZ, x)
  7474  			return true
  7475  		}
  7476  		// match: (EQ (MOVWconst [0]) yes no)
  7477  		// result: (First yes no)
  7478  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7479  			v_0 := b.Controls[0]
  7480  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7481  				break
  7482  			}
  7483  			b.Reset(BlockFirst)
  7484  			return true
  7485  		}
  7486  		// match: (EQ (MOVWconst [c]) yes no)
  7487  		// cond: c != 0
  7488  		// result: (First no yes)
  7489  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7490  			v_0 := b.Controls[0]
  7491  			c := auxIntToInt32(v_0.AuxInt)
  7492  			if !(c != 0) {
  7493  				break
  7494  			}
  7495  			b.Reset(BlockFirst)
  7496  			b.swapSuccessors()
  7497  			return true
  7498  		}
  7499  	case BlockMIPSGEZ:
  7500  		// match: (GEZ (MOVWconst [c]) yes no)
  7501  		// cond: c >= 0
  7502  		// result: (First yes no)
  7503  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7504  			v_0 := b.Controls[0]
  7505  			c := auxIntToInt32(v_0.AuxInt)
  7506  			if !(c >= 0) {
  7507  				break
  7508  			}
  7509  			b.Reset(BlockFirst)
  7510  			return true
  7511  		}
  7512  		// match: (GEZ (MOVWconst [c]) yes no)
  7513  		// cond: c < 0
  7514  		// result: (First no yes)
  7515  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7516  			v_0 := b.Controls[0]
  7517  			c := auxIntToInt32(v_0.AuxInt)
  7518  			if !(c < 0) {
  7519  				break
  7520  			}
  7521  			b.Reset(BlockFirst)
  7522  			b.swapSuccessors()
  7523  			return true
  7524  		}
  7525  	case BlockMIPSGTZ:
  7526  		// match: (GTZ (MOVWconst [c]) yes no)
  7527  		// cond: c > 0
  7528  		// result: (First yes no)
  7529  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7530  			v_0 := b.Controls[0]
  7531  			c := auxIntToInt32(v_0.AuxInt)
  7532  			if !(c > 0) {
  7533  				break
  7534  			}
  7535  			b.Reset(BlockFirst)
  7536  			return true
  7537  		}
  7538  		// match: (GTZ (MOVWconst [c]) yes no)
  7539  		// cond: c <= 0
  7540  		// result: (First no yes)
  7541  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7542  			v_0 := b.Controls[0]
  7543  			c := auxIntToInt32(v_0.AuxInt)
  7544  			if !(c <= 0) {
  7545  				break
  7546  			}
  7547  			b.Reset(BlockFirst)
  7548  			b.swapSuccessors()
  7549  			return true
  7550  		}
  7551  	case BlockIf:
  7552  		// match: (If cond yes no)
  7553  		// result: (NE cond yes no)
  7554  		for {
  7555  			cond := b.Controls[0]
  7556  			b.resetWithControl(BlockMIPSNE, cond)
  7557  			return true
  7558  		}
  7559  	case BlockMIPSLEZ:
  7560  		// match: (LEZ (MOVWconst [c]) yes no)
  7561  		// cond: c <= 0
  7562  		// result: (First yes no)
  7563  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7564  			v_0 := b.Controls[0]
  7565  			c := auxIntToInt32(v_0.AuxInt)
  7566  			if !(c <= 0) {
  7567  				break
  7568  			}
  7569  			b.Reset(BlockFirst)
  7570  			return true
  7571  		}
  7572  		// match: (LEZ (MOVWconst [c]) yes no)
  7573  		// cond: c > 0
  7574  		// result: (First no yes)
  7575  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7576  			v_0 := b.Controls[0]
  7577  			c := auxIntToInt32(v_0.AuxInt)
  7578  			if !(c > 0) {
  7579  				break
  7580  			}
  7581  			b.Reset(BlockFirst)
  7582  			b.swapSuccessors()
  7583  			return true
  7584  		}
  7585  	case BlockMIPSLTZ:
  7586  		// match: (LTZ (MOVWconst [c]) yes no)
  7587  		// cond: c < 0
  7588  		// result: (First yes no)
  7589  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7590  			v_0 := b.Controls[0]
  7591  			c := auxIntToInt32(v_0.AuxInt)
  7592  			if !(c < 0) {
  7593  				break
  7594  			}
  7595  			b.Reset(BlockFirst)
  7596  			return true
  7597  		}
  7598  		// match: (LTZ (MOVWconst [c]) yes no)
  7599  		// cond: c >= 0
  7600  		// result: (First no yes)
  7601  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7602  			v_0 := b.Controls[0]
  7603  			c := auxIntToInt32(v_0.AuxInt)
  7604  			if !(c >= 0) {
  7605  				break
  7606  			}
  7607  			b.Reset(BlockFirst)
  7608  			b.swapSuccessors()
  7609  			return true
  7610  		}
  7611  	case BlockMIPSNE:
  7612  		// match: (NE (FPFlagTrue cmp) yes no)
  7613  		// result: (FPT cmp yes no)
  7614  		for b.Controls[0].Op == OpMIPSFPFlagTrue {
  7615  			v_0 := b.Controls[0]
  7616  			cmp := v_0.Args[0]
  7617  			b.resetWithControl(BlockMIPSFPT, cmp)
  7618  			return true
  7619  		}
  7620  		// match: (NE (FPFlagFalse cmp) yes no)
  7621  		// result: (FPF cmp yes no)
  7622  		for b.Controls[0].Op == OpMIPSFPFlagFalse {
  7623  			v_0 := b.Controls[0]
  7624  			cmp := v_0.Args[0]
  7625  			b.resetWithControl(BlockMIPSFPF, cmp)
  7626  			return true
  7627  		}
  7628  		// match: (NE (XORconst [1] cmp:(SGT _ _)) yes no)
  7629  		// result: (EQ cmp yes no)
  7630  		for b.Controls[0].Op == OpMIPSXORconst {
  7631  			v_0 := b.Controls[0]
  7632  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7633  				break
  7634  			}
  7635  			cmp := v_0.Args[0]
  7636  			if cmp.Op != OpMIPSSGT {
  7637  				break
  7638  			}
  7639  			b.resetWithControl(BlockMIPSEQ, cmp)
  7640  			return true
  7641  		}
  7642  		// match: (NE (XORconst [1] cmp:(SGTU _ _)) yes no)
  7643  		// result: (EQ cmp yes no)
  7644  		for b.Controls[0].Op == OpMIPSXORconst {
  7645  			v_0 := b.Controls[0]
  7646  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7647  				break
  7648  			}
  7649  			cmp := v_0.Args[0]
  7650  			if cmp.Op != OpMIPSSGTU {
  7651  				break
  7652  			}
  7653  			b.resetWithControl(BlockMIPSEQ, cmp)
  7654  			return true
  7655  		}
  7656  		// match: (NE (XORconst [1] cmp:(SGTconst _)) yes no)
  7657  		// result: (EQ cmp yes no)
  7658  		for b.Controls[0].Op == OpMIPSXORconst {
  7659  			v_0 := b.Controls[0]
  7660  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7661  				break
  7662  			}
  7663  			cmp := v_0.Args[0]
  7664  			if cmp.Op != OpMIPSSGTconst {
  7665  				break
  7666  			}
  7667  			b.resetWithControl(BlockMIPSEQ, cmp)
  7668  			return true
  7669  		}
  7670  		// match: (NE (XORconst [1] cmp:(SGTUconst _)) yes no)
  7671  		// result: (EQ cmp yes no)
  7672  		for b.Controls[0].Op == OpMIPSXORconst {
  7673  			v_0 := b.Controls[0]
  7674  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7675  				break
  7676  			}
  7677  			cmp := v_0.Args[0]
  7678  			if cmp.Op != OpMIPSSGTUconst {
  7679  				break
  7680  			}
  7681  			b.resetWithControl(BlockMIPSEQ, cmp)
  7682  			return true
  7683  		}
  7684  		// match: (NE (XORconst [1] cmp:(SGTzero _)) yes no)
  7685  		// result: (EQ cmp yes no)
  7686  		for b.Controls[0].Op == OpMIPSXORconst {
  7687  			v_0 := b.Controls[0]
  7688  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7689  				break
  7690  			}
  7691  			cmp := v_0.Args[0]
  7692  			if cmp.Op != OpMIPSSGTzero {
  7693  				break
  7694  			}
  7695  			b.resetWithControl(BlockMIPSEQ, cmp)
  7696  			return true
  7697  		}
  7698  		// match: (NE (XORconst [1] cmp:(SGTUzero _)) yes no)
  7699  		// result: (EQ cmp yes no)
  7700  		for b.Controls[0].Op == OpMIPSXORconst {
  7701  			v_0 := b.Controls[0]
  7702  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7703  				break
  7704  			}
  7705  			cmp := v_0.Args[0]
  7706  			if cmp.Op != OpMIPSSGTUzero {
  7707  				break
  7708  			}
  7709  			b.resetWithControl(BlockMIPSEQ, cmp)
  7710  			return true
  7711  		}
  7712  		// match: (NE (SGTUconst [1] x) yes no)
  7713  		// result: (EQ x yes no)
  7714  		for b.Controls[0].Op == OpMIPSSGTUconst {
  7715  			v_0 := b.Controls[0]
  7716  			if auxIntToInt32(v_0.AuxInt) != 1 {
  7717  				break
  7718  			}
  7719  			x := v_0.Args[0]
  7720  			b.resetWithControl(BlockMIPSEQ, x)
  7721  			return true
  7722  		}
  7723  		// match: (NE (SGTUzero x) yes no)
  7724  		// result: (NE x yes no)
  7725  		for b.Controls[0].Op == OpMIPSSGTUzero {
  7726  			v_0 := b.Controls[0]
  7727  			x := v_0.Args[0]
  7728  			b.resetWithControl(BlockMIPSNE, x)
  7729  			return true
  7730  		}
  7731  		// match: (NE (SGTconst [0] x) yes no)
  7732  		// result: (LTZ x yes no)
  7733  		for b.Controls[0].Op == OpMIPSSGTconst {
  7734  			v_0 := b.Controls[0]
  7735  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7736  				break
  7737  			}
  7738  			x := v_0.Args[0]
  7739  			b.resetWithControl(BlockMIPSLTZ, x)
  7740  			return true
  7741  		}
  7742  		// match: (NE (SGTzero x) yes no)
  7743  		// result: (GTZ x yes no)
  7744  		for b.Controls[0].Op == OpMIPSSGTzero {
  7745  			v_0 := b.Controls[0]
  7746  			x := v_0.Args[0]
  7747  			b.resetWithControl(BlockMIPSGTZ, x)
  7748  			return true
  7749  		}
  7750  		// match: (NE (MOVWconst [0]) yes no)
  7751  		// result: (First no yes)
  7752  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7753  			v_0 := b.Controls[0]
  7754  			if auxIntToInt32(v_0.AuxInt) != 0 {
  7755  				break
  7756  			}
  7757  			b.Reset(BlockFirst)
  7758  			b.swapSuccessors()
  7759  			return true
  7760  		}
  7761  		// match: (NE (MOVWconst [c]) yes no)
  7762  		// cond: c != 0
  7763  		// result: (First yes no)
  7764  		for b.Controls[0].Op == OpMIPSMOVWconst {
  7765  			v_0 := b.Controls[0]
  7766  			c := auxIntToInt32(v_0.AuxInt)
  7767  			if !(c != 0) {
  7768  				break
  7769  			}
  7770  			b.Reset(BlockFirst)
  7771  			return true
  7772  		}
  7773  	}
  7774  	return false
  7775  }
  7776