Source file src/cmd/compile/internal/ssa/rewritePPC64latelower.go

     1  // Code generated from _gen/PPC64latelower.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package ssa
     4  
     5  import "internal/buildcfg"
     6  
     7  func rewriteValuePPC64latelower(v *Value) bool {
     8  	switch v.Op {
     9  	case OpPPC64ADD:
    10  		return rewriteValuePPC64latelower_OpPPC64ADD(v)
    11  	case OpPPC64AND:
    12  		return rewriteValuePPC64latelower_OpPPC64AND(v)
    13  	case OpPPC64ANDconst:
    14  		return rewriteValuePPC64latelower_OpPPC64ANDconst(v)
    15  	case OpPPC64CMPconst:
    16  		return rewriteValuePPC64latelower_OpPPC64CMPconst(v)
    17  	case OpPPC64ISEL:
    18  		return rewriteValuePPC64latelower_OpPPC64ISEL(v)
    19  	case OpPPC64RLDICL:
    20  		return rewriteValuePPC64latelower_OpPPC64RLDICL(v)
    21  	case OpPPC64RLDICLCC:
    22  		return rewriteValuePPC64latelower_OpPPC64RLDICLCC(v)
    23  	case OpPPC64SETBC:
    24  		return rewriteValuePPC64latelower_OpPPC64SETBC(v)
    25  	case OpPPC64SETBCR:
    26  		return rewriteValuePPC64latelower_OpPPC64SETBCR(v)
    27  	}
    28  	return false
    29  }
    30  func rewriteValuePPC64latelower_OpPPC64ADD(v *Value) bool {
    31  	v_1 := v.Args[1]
    32  	v_0 := v.Args[0]
    33  	// match: (ADD (MOVDconst [m]) x)
    34  	// cond: supportsPPC64PCRel() && (m<<30)>>30 == m
    35  	// result: (ADDconst [m] x)
    36  	for {
    37  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    38  			if v_0.Op != OpPPC64MOVDconst {
    39  				continue
    40  			}
    41  			m := auxIntToInt64(v_0.AuxInt)
    42  			x := v_1
    43  			if !(supportsPPC64PCRel() && (m<<30)>>30 == m) {
    44  				continue
    45  			}
    46  			v.reset(OpPPC64ADDconst)
    47  			v.AuxInt = int64ToAuxInt(m)
    48  			v.AddArg(x)
    49  			return true
    50  		}
    51  		break
    52  	}
    53  	return false
    54  }
    55  func rewriteValuePPC64latelower_OpPPC64AND(v *Value) bool {
    56  	v_1 := v.Args[1]
    57  	v_0 := v.Args[0]
    58  	// match: (AND <t> x:(MOVDconst [m]) n)
    59  	// cond: t.Size() <= 2
    60  	// result: (ANDconst [int64(int16(m))] n)
    61  	for {
    62  		t := v.Type
    63  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    64  			x := v_0
    65  			if x.Op != OpPPC64MOVDconst {
    66  				continue
    67  			}
    68  			m := auxIntToInt64(x.AuxInt)
    69  			n := v_1
    70  			if !(t.Size() <= 2) {
    71  				continue
    72  			}
    73  			v.reset(OpPPC64ANDconst)
    74  			v.AuxInt = int64ToAuxInt(int64(int16(m)))
    75  			v.AddArg(n)
    76  			return true
    77  		}
    78  		break
    79  	}
    80  	// match: (AND x:(MOVDconst [m]) n)
    81  	// cond: isPPC64ValidShiftMask(m)
    82  	// result: (RLDICL [encodePPC64RotateMask(0,m,64)] n)
    83  	for {
    84  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
    85  			x := v_0
    86  			if x.Op != OpPPC64MOVDconst {
    87  				continue
    88  			}
    89  			m := auxIntToInt64(x.AuxInt)
    90  			n := v_1
    91  			if !(isPPC64ValidShiftMask(m)) {
    92  				continue
    93  			}
    94  			v.reset(OpPPC64RLDICL)
    95  			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 64))
    96  			v.AddArg(n)
    97  			return true
    98  		}
    99  		break
   100  	}
   101  	// match: (AND x:(MOVDconst [m]) n)
   102  	// cond: m != 0 && isPPC64ValidShiftMask(^m)
   103  	// result: (RLDICR [encodePPC64RotateMask(0,m,64)] n)
   104  	for {
   105  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
   106  			x := v_0
   107  			if x.Op != OpPPC64MOVDconst {
   108  				continue
   109  			}
   110  			m := auxIntToInt64(x.AuxInt)
   111  			n := v_1
   112  			if !(m != 0 && isPPC64ValidShiftMask(^m)) {
   113  				continue
   114  			}
   115  			v.reset(OpPPC64RLDICR)
   116  			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 64))
   117  			v.AddArg(n)
   118  			return true
   119  		}
   120  		break
   121  	}
   122  	// match: (AND <t> x:(MOVDconst [m]) n)
   123  	// cond: t.Size() == 4 && isPPC64WordRotateMask(m)
   124  	// result: (RLWINM [encodePPC64RotateMask(0,m,32)] n)
   125  	for {
   126  		t := v.Type
   127  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
   128  			x := v_0
   129  			if x.Op != OpPPC64MOVDconst {
   130  				continue
   131  			}
   132  			m := auxIntToInt64(x.AuxInt)
   133  			n := v_1
   134  			if !(t.Size() == 4 && isPPC64WordRotateMask(m)) {
   135  				continue
   136  			}
   137  			v.reset(OpPPC64RLWINM)
   138  			v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 32))
   139  			v.AddArg(n)
   140  			return true
   141  		}
   142  		break
   143  	}
   144  	return false
   145  }
   146  func rewriteValuePPC64latelower_OpPPC64ANDconst(v *Value) bool {
   147  	v_0 := v.Args[0]
   148  	// match: (ANDconst [m] x)
   149  	// cond: isPPC64ValidShiftMask(m)
   150  	// result: (RLDICL [encodePPC64RotateMask(0,m,64)] x)
   151  	for {
   152  		m := auxIntToInt64(v.AuxInt)
   153  		x := v_0
   154  		if !(isPPC64ValidShiftMask(m)) {
   155  			break
   156  		}
   157  		v.reset(OpPPC64RLDICL)
   158  		v.AuxInt = int64ToAuxInt(encodePPC64RotateMask(0, m, 64))
   159  		v.AddArg(x)
   160  		return true
   161  	}
   162  	return false
   163  }
   164  func rewriteValuePPC64latelower_OpPPC64CMPconst(v *Value) bool {
   165  	v_0 := v.Args[0]
   166  	// match: (CMPconst [0] z:(ADD x y))
   167  	// cond: v.Block == z.Block
   168  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   169  	for {
   170  		if auxIntToInt64(v.AuxInt) != 0 {
   171  			break
   172  		}
   173  		z := v_0
   174  		if z.Op != OpPPC64ADD {
   175  			break
   176  		}
   177  		if !(v.Block == z.Block) {
   178  			break
   179  		}
   180  		v.reset(OpPPC64CMPconst)
   181  		v.AuxInt = int64ToAuxInt(0)
   182  		v.AddArg(convertPPC64OpToOpCC(z))
   183  		return true
   184  	}
   185  	// match: (CMPconst [0] z:(AND x y))
   186  	// cond: v.Block == z.Block
   187  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   188  	for {
   189  		if auxIntToInt64(v.AuxInt) != 0 {
   190  			break
   191  		}
   192  		z := v_0
   193  		if z.Op != OpPPC64AND {
   194  			break
   195  		}
   196  		if !(v.Block == z.Block) {
   197  			break
   198  		}
   199  		v.reset(OpPPC64CMPconst)
   200  		v.AuxInt = int64ToAuxInt(0)
   201  		v.AddArg(convertPPC64OpToOpCC(z))
   202  		return true
   203  	}
   204  	// match: (CMPconst [0] z:(ANDN x y))
   205  	// cond: v.Block == z.Block
   206  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   207  	for {
   208  		if auxIntToInt64(v.AuxInt) != 0 {
   209  			break
   210  		}
   211  		z := v_0
   212  		if z.Op != OpPPC64ANDN {
   213  			break
   214  		}
   215  		if !(v.Block == z.Block) {
   216  			break
   217  		}
   218  		v.reset(OpPPC64CMPconst)
   219  		v.AuxInt = int64ToAuxInt(0)
   220  		v.AddArg(convertPPC64OpToOpCC(z))
   221  		return true
   222  	}
   223  	// match: (CMPconst [0] z:(OR x y))
   224  	// cond: v.Block == z.Block
   225  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   226  	for {
   227  		if auxIntToInt64(v.AuxInt) != 0 {
   228  			break
   229  		}
   230  		z := v_0
   231  		if z.Op != OpPPC64OR {
   232  			break
   233  		}
   234  		if !(v.Block == z.Block) {
   235  			break
   236  		}
   237  		v.reset(OpPPC64CMPconst)
   238  		v.AuxInt = int64ToAuxInt(0)
   239  		v.AddArg(convertPPC64OpToOpCC(z))
   240  		return true
   241  	}
   242  	// match: (CMPconst [0] z:(SUB x y))
   243  	// cond: v.Block == z.Block
   244  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   245  	for {
   246  		if auxIntToInt64(v.AuxInt) != 0 {
   247  			break
   248  		}
   249  		z := v_0
   250  		if z.Op != OpPPC64SUB {
   251  			break
   252  		}
   253  		if !(v.Block == z.Block) {
   254  			break
   255  		}
   256  		v.reset(OpPPC64CMPconst)
   257  		v.AuxInt = int64ToAuxInt(0)
   258  		v.AddArg(convertPPC64OpToOpCC(z))
   259  		return true
   260  	}
   261  	// match: (CMPconst [0] z:(NOR x y))
   262  	// cond: v.Block == z.Block
   263  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   264  	for {
   265  		if auxIntToInt64(v.AuxInt) != 0 {
   266  			break
   267  		}
   268  		z := v_0
   269  		if z.Op != OpPPC64NOR {
   270  			break
   271  		}
   272  		if !(v.Block == z.Block) {
   273  			break
   274  		}
   275  		v.reset(OpPPC64CMPconst)
   276  		v.AuxInt = int64ToAuxInt(0)
   277  		v.AddArg(convertPPC64OpToOpCC(z))
   278  		return true
   279  	}
   280  	// match: (CMPconst [0] z:(XOR x y))
   281  	// cond: v.Block == z.Block
   282  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   283  	for {
   284  		if auxIntToInt64(v.AuxInt) != 0 {
   285  			break
   286  		}
   287  		z := v_0
   288  		if z.Op != OpPPC64XOR {
   289  			break
   290  		}
   291  		if !(v.Block == z.Block) {
   292  			break
   293  		}
   294  		v.reset(OpPPC64CMPconst)
   295  		v.AuxInt = int64ToAuxInt(0)
   296  		v.AddArg(convertPPC64OpToOpCC(z))
   297  		return true
   298  	}
   299  	// match: (CMPconst [0] z:(MULHDU x y))
   300  	// cond: v.Block == z.Block
   301  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   302  	for {
   303  		if auxIntToInt64(v.AuxInt) != 0 {
   304  			break
   305  		}
   306  		z := v_0
   307  		if z.Op != OpPPC64MULHDU {
   308  			break
   309  		}
   310  		if !(v.Block == z.Block) {
   311  			break
   312  		}
   313  		v.reset(OpPPC64CMPconst)
   314  		v.AuxInt = int64ToAuxInt(0)
   315  		v.AddArg(convertPPC64OpToOpCC(z))
   316  		return true
   317  	}
   318  	// match: (CMPconst [0] z:(NEG x))
   319  	// cond: v.Block == z.Block
   320  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   321  	for {
   322  		if auxIntToInt64(v.AuxInt) != 0 {
   323  			break
   324  		}
   325  		z := v_0
   326  		if z.Op != OpPPC64NEG {
   327  			break
   328  		}
   329  		if !(v.Block == z.Block) {
   330  			break
   331  		}
   332  		v.reset(OpPPC64CMPconst)
   333  		v.AuxInt = int64ToAuxInt(0)
   334  		v.AddArg(convertPPC64OpToOpCC(z))
   335  		return true
   336  	}
   337  	// match: (CMPconst [0] z:(CNTLZD x))
   338  	// cond: v.Block == z.Block
   339  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   340  	for {
   341  		if auxIntToInt64(v.AuxInt) != 0 {
   342  			break
   343  		}
   344  		z := v_0
   345  		if z.Op != OpPPC64CNTLZD {
   346  			break
   347  		}
   348  		if !(v.Block == z.Block) {
   349  			break
   350  		}
   351  		v.reset(OpPPC64CMPconst)
   352  		v.AuxInt = int64ToAuxInt(0)
   353  		v.AddArg(convertPPC64OpToOpCC(z))
   354  		return true
   355  	}
   356  	// match: (CMPconst [0] z:(RLDICL x))
   357  	// cond: v.Block == z.Block
   358  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   359  	for {
   360  		if auxIntToInt64(v.AuxInt) != 0 {
   361  			break
   362  		}
   363  		z := v_0
   364  		if z.Op != OpPPC64RLDICL {
   365  			break
   366  		}
   367  		if !(v.Block == z.Block) {
   368  			break
   369  		}
   370  		v.reset(OpPPC64CMPconst)
   371  		v.AuxInt = int64ToAuxInt(0)
   372  		v.AddArg(convertPPC64OpToOpCC(z))
   373  		return true
   374  	}
   375  	// match: (CMPconst [0] z:(ADDconst [c] x))
   376  	// cond: int64(int16(c)) == c && v.Block == z.Block
   377  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   378  	for {
   379  		if auxIntToInt64(v.AuxInt) != 0 {
   380  			break
   381  		}
   382  		z := v_0
   383  		if z.Op != OpPPC64ADDconst {
   384  			break
   385  		}
   386  		c := auxIntToInt64(z.AuxInt)
   387  		if !(int64(int16(c)) == c && v.Block == z.Block) {
   388  			break
   389  		}
   390  		v.reset(OpPPC64CMPconst)
   391  		v.AuxInt = int64ToAuxInt(0)
   392  		v.AddArg(convertPPC64OpToOpCC(z))
   393  		return true
   394  	}
   395  	// match: (CMPconst [0] z:(ANDconst [c] x))
   396  	// cond: int64(uint16(c)) == c && v.Block == z.Block
   397  	// result: (CMPconst [0] convertPPC64OpToOpCC(z))
   398  	for {
   399  		if auxIntToInt64(v.AuxInt) != 0 {
   400  			break
   401  		}
   402  		z := v_0
   403  		if z.Op != OpPPC64ANDconst {
   404  			break
   405  		}
   406  		c := auxIntToInt64(z.AuxInt)
   407  		if !(int64(uint16(c)) == c && v.Block == z.Block) {
   408  			break
   409  		}
   410  		v.reset(OpPPC64CMPconst)
   411  		v.AuxInt = int64ToAuxInt(0)
   412  		v.AddArg(convertPPC64OpToOpCC(z))
   413  		return true
   414  	}
   415  	// match: (CMPconst <t> [0] (Select0 z:(ADDCC x y)))
   416  	// result: (Select1 <t> z)
   417  	for {
   418  		t := v.Type
   419  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   420  			break
   421  		}
   422  		z := v_0.Args[0]
   423  		if z.Op != OpPPC64ADDCC {
   424  			break
   425  		}
   426  		v.reset(OpSelect1)
   427  		v.Type = t
   428  		v.AddArg(z)
   429  		return true
   430  	}
   431  	// match: (CMPconst <t> [0] (Select0 z:(ANDCC x y)))
   432  	// result: (Select1 <t> z)
   433  	for {
   434  		t := v.Type
   435  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   436  			break
   437  		}
   438  		z := v_0.Args[0]
   439  		if z.Op != OpPPC64ANDCC {
   440  			break
   441  		}
   442  		v.reset(OpSelect1)
   443  		v.Type = t
   444  		v.AddArg(z)
   445  		return true
   446  	}
   447  	// match: (CMPconst <t> [0] (Select0 z:(ANDNCC x y)))
   448  	// result: (Select1 <t> z)
   449  	for {
   450  		t := v.Type
   451  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   452  			break
   453  		}
   454  		z := v_0.Args[0]
   455  		if z.Op != OpPPC64ANDNCC {
   456  			break
   457  		}
   458  		v.reset(OpSelect1)
   459  		v.Type = t
   460  		v.AddArg(z)
   461  		return true
   462  	}
   463  	// match: (CMPconst <t> [0] (Select0 z:(ORCC x y)))
   464  	// result: (Select1 <t> z)
   465  	for {
   466  		t := v.Type
   467  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   468  			break
   469  		}
   470  		z := v_0.Args[0]
   471  		if z.Op != OpPPC64ORCC {
   472  			break
   473  		}
   474  		v.reset(OpSelect1)
   475  		v.Type = t
   476  		v.AddArg(z)
   477  		return true
   478  	}
   479  	// match: (CMPconst <t> [0] (Select0 z:(SUBCC x y)))
   480  	// result: (Select1 <t> z)
   481  	for {
   482  		t := v.Type
   483  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   484  			break
   485  		}
   486  		z := v_0.Args[0]
   487  		if z.Op != OpPPC64SUBCC {
   488  			break
   489  		}
   490  		v.reset(OpSelect1)
   491  		v.Type = t
   492  		v.AddArg(z)
   493  		return true
   494  	}
   495  	// match: (CMPconst <t> [0] (Select0 z:(NORCC x y)))
   496  	// result: (Select1 <t> z)
   497  	for {
   498  		t := v.Type
   499  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   500  			break
   501  		}
   502  		z := v_0.Args[0]
   503  		if z.Op != OpPPC64NORCC {
   504  			break
   505  		}
   506  		v.reset(OpSelect1)
   507  		v.Type = t
   508  		v.AddArg(z)
   509  		return true
   510  	}
   511  	// match: (CMPconst <t> [0] (Select0 z:(XORCC x y)))
   512  	// result: (Select1 <t> z)
   513  	for {
   514  		t := v.Type
   515  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   516  			break
   517  		}
   518  		z := v_0.Args[0]
   519  		if z.Op != OpPPC64XORCC {
   520  			break
   521  		}
   522  		v.reset(OpSelect1)
   523  		v.Type = t
   524  		v.AddArg(z)
   525  		return true
   526  	}
   527  	// match: (CMPconst <t> [0] (Select0 z:(MULHDUCC x y)))
   528  	// result: (Select1 <t> z)
   529  	for {
   530  		t := v.Type
   531  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   532  			break
   533  		}
   534  		z := v_0.Args[0]
   535  		if z.Op != OpPPC64MULHDUCC {
   536  			break
   537  		}
   538  		v.reset(OpSelect1)
   539  		v.Type = t
   540  		v.AddArg(z)
   541  		return true
   542  	}
   543  	// match: (CMPconst <t> [0] (Select0 z:(ADDCCconst y)))
   544  	// result: (Select1 <t> z)
   545  	for {
   546  		t := v.Type
   547  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   548  			break
   549  		}
   550  		z := v_0.Args[0]
   551  		if z.Op != OpPPC64ADDCCconst {
   552  			break
   553  		}
   554  		v.reset(OpSelect1)
   555  		v.Type = t
   556  		v.AddArg(z)
   557  		return true
   558  	}
   559  	// match: (CMPconst <t> [0] (Select0 z:(ANDCCconst y)))
   560  	// result: (Select1 <t> z)
   561  	for {
   562  		t := v.Type
   563  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   564  			break
   565  		}
   566  		z := v_0.Args[0]
   567  		if z.Op != OpPPC64ANDCCconst {
   568  			break
   569  		}
   570  		v.reset(OpSelect1)
   571  		v.Type = t
   572  		v.AddArg(z)
   573  		return true
   574  	}
   575  	// match: (CMPconst <t> [0] (Select0 z:(NEGCC y)))
   576  	// result: (Select1 <t> z)
   577  	for {
   578  		t := v.Type
   579  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   580  			break
   581  		}
   582  		z := v_0.Args[0]
   583  		if z.Op != OpPPC64NEGCC {
   584  			break
   585  		}
   586  		v.reset(OpSelect1)
   587  		v.Type = t
   588  		v.AddArg(z)
   589  		return true
   590  	}
   591  	// match: (CMPconst <t> [0] (Select0 z:(CNTLZDCC y)))
   592  	// result: (Select1 <t> z)
   593  	for {
   594  		t := v.Type
   595  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   596  			break
   597  		}
   598  		z := v_0.Args[0]
   599  		if z.Op != OpPPC64CNTLZDCC {
   600  			break
   601  		}
   602  		v.reset(OpSelect1)
   603  		v.Type = t
   604  		v.AddArg(z)
   605  		return true
   606  	}
   607  	// match: (CMPconst <t> [0] (Select0 z:(RLDICLCC y)))
   608  	// result: (Select1 <t> z)
   609  	for {
   610  		t := v.Type
   611  		if auxIntToInt64(v.AuxInt) != 0 || v_0.Op != OpSelect0 {
   612  			break
   613  		}
   614  		z := v_0.Args[0]
   615  		if z.Op != OpPPC64RLDICLCC {
   616  			break
   617  		}
   618  		v.reset(OpSelect1)
   619  		v.Type = t
   620  		v.AddArg(z)
   621  		return true
   622  	}
   623  	return false
   624  }
   625  func rewriteValuePPC64latelower_OpPPC64ISEL(v *Value) bool {
   626  	v_2 := v.Args[2]
   627  	v_1 := v.Args[1]
   628  	v_0 := v.Args[0]
   629  	// match: (ISEL [a] x (MOVDconst [0]) z)
   630  	// result: (ISELZ [a] x z)
   631  	for {
   632  		a := auxIntToInt32(v.AuxInt)
   633  		x := v_0
   634  		if v_1.Op != OpPPC64MOVDconst || auxIntToInt64(v_1.AuxInt) != 0 {
   635  			break
   636  		}
   637  		z := v_2
   638  		v.reset(OpPPC64ISELZ)
   639  		v.AuxInt = int32ToAuxInt(a)
   640  		v.AddArg2(x, z)
   641  		return true
   642  	}
   643  	// match: (ISEL [a] (MOVDconst [0]) y z)
   644  	// result: (ISELZ [a^0x4] y z)
   645  	for {
   646  		a := auxIntToInt32(v.AuxInt)
   647  		if v_0.Op != OpPPC64MOVDconst || auxIntToInt64(v_0.AuxInt) != 0 {
   648  			break
   649  		}
   650  		y := v_1
   651  		z := v_2
   652  		v.reset(OpPPC64ISELZ)
   653  		v.AuxInt = int32ToAuxInt(a ^ 0x4)
   654  		v.AddArg2(y, z)
   655  		return true
   656  	}
   657  	return false
   658  }
   659  func rewriteValuePPC64latelower_OpPPC64RLDICL(v *Value) bool {
   660  	v_0 := v.Args[0]
   661  	// match: (RLDICL [em] x:(SRDconst [s] a))
   662  	// cond: (em&0xFF0000) == 0
   663  	// result: (RLDICL [mergePPC64RLDICLandSRDconst(em, s)] a)
   664  	for {
   665  		em := auxIntToInt64(v.AuxInt)
   666  		x := v_0
   667  		if x.Op != OpPPC64SRDconst {
   668  			break
   669  		}
   670  		s := auxIntToInt64(x.AuxInt)
   671  		a := x.Args[0]
   672  		if !((em & 0xFF0000) == 0) {
   673  			break
   674  		}
   675  		v.reset(OpPPC64RLDICL)
   676  		v.AuxInt = int64ToAuxInt(mergePPC64RLDICLandSRDconst(em, s))
   677  		v.AddArg(a)
   678  		return true
   679  	}
   680  	return false
   681  }
   682  func rewriteValuePPC64latelower_OpPPC64RLDICLCC(v *Value) bool {
   683  	v_0 := v.Args[0]
   684  	// match: (RLDICLCC [a] x)
   685  	// cond: convertPPC64RldiclAndccconst(a) != 0
   686  	// result: (ANDCCconst [convertPPC64RldiclAndccconst(a)] x)
   687  	for {
   688  		a := auxIntToInt64(v.AuxInt)
   689  		x := v_0
   690  		if !(convertPPC64RldiclAndccconst(a) != 0) {
   691  			break
   692  		}
   693  		v.reset(OpPPC64ANDCCconst)
   694  		v.AuxInt = int64ToAuxInt(convertPPC64RldiclAndccconst(a))
   695  		v.AddArg(x)
   696  		return true
   697  	}
   698  	return false
   699  }
   700  func rewriteValuePPC64latelower_OpPPC64SETBC(v *Value) bool {
   701  	v_0 := v.Args[0]
   702  	b := v.Block
   703  	typ := &b.Func.Config.Types
   704  	// match: (SETBC [2] cmp)
   705  	// cond: buildcfg.GOPPC64 <= 9
   706  	// result: (ISELZ [2] (MOVDconst [1]) cmp)
   707  	for {
   708  		if auxIntToInt32(v.AuxInt) != 2 {
   709  			break
   710  		}
   711  		cmp := v_0
   712  		if !(buildcfg.GOPPC64 <= 9) {
   713  			break
   714  		}
   715  		v.reset(OpPPC64ISELZ)
   716  		v.AuxInt = int32ToAuxInt(2)
   717  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   718  		v0.AuxInt = int64ToAuxInt(1)
   719  		v.AddArg2(v0, cmp)
   720  		return true
   721  	}
   722  	// match: (SETBC [0] cmp)
   723  	// cond: buildcfg.GOPPC64 <= 9
   724  	// result: (ISELZ [0] (MOVDconst [1]) cmp)
   725  	for {
   726  		if auxIntToInt32(v.AuxInt) != 0 {
   727  			break
   728  		}
   729  		cmp := v_0
   730  		if !(buildcfg.GOPPC64 <= 9) {
   731  			break
   732  		}
   733  		v.reset(OpPPC64ISELZ)
   734  		v.AuxInt = int32ToAuxInt(0)
   735  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   736  		v0.AuxInt = int64ToAuxInt(1)
   737  		v.AddArg2(v0, cmp)
   738  		return true
   739  	}
   740  	// match: (SETBC [1] cmp)
   741  	// cond: buildcfg.GOPPC64 <= 9
   742  	// result: (ISELZ [1] (MOVDconst [1]) cmp)
   743  	for {
   744  		if auxIntToInt32(v.AuxInt) != 1 {
   745  			break
   746  		}
   747  		cmp := v_0
   748  		if !(buildcfg.GOPPC64 <= 9) {
   749  			break
   750  		}
   751  		v.reset(OpPPC64ISELZ)
   752  		v.AuxInt = int32ToAuxInt(1)
   753  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   754  		v0.AuxInt = int64ToAuxInt(1)
   755  		v.AddArg2(v0, cmp)
   756  		return true
   757  	}
   758  	return false
   759  }
   760  func rewriteValuePPC64latelower_OpPPC64SETBCR(v *Value) bool {
   761  	v_0 := v.Args[0]
   762  	b := v.Block
   763  	typ := &b.Func.Config.Types
   764  	// match: (SETBCR [2] cmp)
   765  	// cond: buildcfg.GOPPC64 <= 9
   766  	// result: (ISELZ [6] (MOVDconst [1]) cmp)
   767  	for {
   768  		if auxIntToInt32(v.AuxInt) != 2 {
   769  			break
   770  		}
   771  		cmp := v_0
   772  		if !(buildcfg.GOPPC64 <= 9) {
   773  			break
   774  		}
   775  		v.reset(OpPPC64ISELZ)
   776  		v.AuxInt = int32ToAuxInt(6)
   777  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   778  		v0.AuxInt = int64ToAuxInt(1)
   779  		v.AddArg2(v0, cmp)
   780  		return true
   781  	}
   782  	// match: (SETBCR [0] cmp)
   783  	// cond: buildcfg.GOPPC64 <= 9
   784  	// result: (ISELZ [4] (MOVDconst [1]) cmp)
   785  	for {
   786  		if auxIntToInt32(v.AuxInt) != 0 {
   787  			break
   788  		}
   789  		cmp := v_0
   790  		if !(buildcfg.GOPPC64 <= 9) {
   791  			break
   792  		}
   793  		v.reset(OpPPC64ISELZ)
   794  		v.AuxInt = int32ToAuxInt(4)
   795  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   796  		v0.AuxInt = int64ToAuxInt(1)
   797  		v.AddArg2(v0, cmp)
   798  		return true
   799  	}
   800  	// match: (SETBCR [1] cmp)
   801  	// cond: buildcfg.GOPPC64 <= 9
   802  	// result: (ISELZ [5] (MOVDconst [1]) cmp)
   803  	for {
   804  		if auxIntToInt32(v.AuxInt) != 1 {
   805  			break
   806  		}
   807  		cmp := v_0
   808  		if !(buildcfg.GOPPC64 <= 9) {
   809  			break
   810  		}
   811  		v.reset(OpPPC64ISELZ)
   812  		v.AuxInt = int32ToAuxInt(5)
   813  		v0 := b.NewValue0(v.Pos, OpPPC64MOVDconst, typ.Int64)
   814  		v0.AuxInt = int64ToAuxInt(1)
   815  		v.AddArg2(v0, cmp)
   816  		return true
   817  	}
   818  	return false
   819  }
   820  func rewriteBlockPPC64latelower(b *Block) bool {
   821  	return false
   822  }
   823  

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