Source file src/cmd/compile/internal/ssarewrite/rewritearm64/rewriteARM64.go

     1  // Code generated from _gen/ARM64.rules using 'go generate'; DO NOT EDIT.
     2  
     3  package rewritearm64
     4  
     5  import "cmd/compile/internal/types"
     6  import "cmd/compile/internal/ssa/block"
     7  import "cmd/compile/internal/ssa/ssaop"
     8  import "cmd/compile/internal/ssa"
     9  
    10  func RewriteValue(v *ssa.Value) bool {
    11  	switch v.Op {
    12  	case ssaop.OpARM64ADCSflags:
    13  		return rewriteValue_OpARM64ADCSflags(v)
    14  	case ssaop.OpARM64ADD:
    15  		return rewriteValue_OpARM64ADD(v)
    16  	case ssaop.OpARM64ADDSflags:
    17  		return rewriteValue_OpARM64ADDSflags(v)
    18  	case ssaop.OpARM64ADDconst:
    19  		return rewriteValue_OpARM64ADDconst(v)
    20  	case ssaop.OpARM64ADDshiftLL:
    21  		return rewriteValue_OpARM64ADDshiftLL(v)
    22  	case ssaop.OpARM64ADDshiftRA:
    23  		return rewriteValue_OpARM64ADDshiftRA(v)
    24  	case ssaop.OpARM64ADDshiftRL:
    25  		return rewriteValue_OpARM64ADDshiftRL(v)
    26  	case ssaop.OpARM64AND:
    27  		return rewriteValue_OpARM64AND(v)
    28  	case ssaop.OpARM64ANDconst:
    29  		return rewriteValue_OpARM64ANDconst(v)
    30  	case ssaop.OpARM64ANDshiftLL:
    31  		return rewriteValue_OpARM64ANDshiftLL(v)
    32  	case ssaop.OpARM64ANDshiftRA:
    33  		return rewriteValue_OpARM64ANDshiftRA(v)
    34  	case ssaop.OpARM64ANDshiftRL:
    35  		return rewriteValue_OpARM64ANDshiftRL(v)
    36  	case ssaop.OpARM64ANDshiftRO:
    37  		return rewriteValue_OpARM64ANDshiftRO(v)
    38  	case ssaop.OpARM64BIC:
    39  		return rewriteValue_OpARM64BIC(v)
    40  	case ssaop.OpARM64BICshiftLL:
    41  		return rewriteValue_OpARM64BICshiftLL(v)
    42  	case ssaop.OpARM64BICshiftRA:
    43  		return rewriteValue_OpARM64BICshiftRA(v)
    44  	case ssaop.OpARM64BICshiftRL:
    45  		return rewriteValue_OpARM64BICshiftRL(v)
    46  	case ssaop.OpARM64BICshiftRO:
    47  		return rewriteValue_OpARM64BICshiftRO(v)
    48  	case ssaop.OpARM64CMN:
    49  		return rewriteValue_OpARM64CMN(v)
    50  	case ssaop.OpARM64CMNW:
    51  		return rewriteValue_OpARM64CMNW(v)
    52  	case ssaop.OpARM64CMNWconst:
    53  		return rewriteValue_OpARM64CMNWconst(v)
    54  	case ssaop.OpARM64CMNconst:
    55  		return rewriteValue_OpARM64CMNconst(v)
    56  	case ssaop.OpARM64CMNshiftLL:
    57  		return rewriteValue_OpARM64CMNshiftLL(v)
    58  	case ssaop.OpARM64CMNshiftRA:
    59  		return rewriteValue_OpARM64CMNshiftRA(v)
    60  	case ssaop.OpARM64CMNshiftRL:
    61  		return rewriteValue_OpARM64CMNshiftRL(v)
    62  	case ssaop.OpARM64CMP:
    63  		return rewriteValue_OpARM64CMP(v)
    64  	case ssaop.OpARM64CMPW:
    65  		return rewriteValue_OpARM64CMPW(v)
    66  	case ssaop.OpARM64CMPWconst:
    67  		return rewriteValue_OpARM64CMPWconst(v)
    68  	case ssaop.OpARM64CMPconst:
    69  		return rewriteValue_OpARM64CMPconst(v)
    70  	case ssaop.OpARM64CMPshiftLL:
    71  		return rewriteValue_OpARM64CMPshiftLL(v)
    72  	case ssaop.OpARM64CMPshiftRA:
    73  		return rewriteValue_OpARM64CMPshiftRA(v)
    74  	case ssaop.OpARM64CMPshiftRL:
    75  		return rewriteValue_OpARM64CMPshiftRL(v)
    76  	case ssaop.OpARM64CSEL:
    77  		return rewriteValue_OpARM64CSEL(v)
    78  	case ssaop.OpARM64CSEL0:
    79  		return rewriteValue_OpARM64CSEL0(v)
    80  	case ssaop.OpARM64CSETM:
    81  		return rewriteValue_OpARM64CSETM(v)
    82  	case ssaop.OpARM64CSINC:
    83  		return rewriteValue_OpARM64CSINC(v)
    84  	case ssaop.OpARM64CSINV:
    85  		return rewriteValue_OpARM64CSINV(v)
    86  	case ssaop.OpARM64CSNEG:
    87  		return rewriteValue_OpARM64CSNEG(v)
    88  	case ssaop.OpARM64DIV:
    89  		return rewriteValue_OpARM64DIV(v)
    90  	case ssaop.OpARM64DIVW:
    91  		return rewriteValue_OpARM64DIVW(v)
    92  	case ssaop.OpARM64EON:
    93  		return rewriteValue_OpARM64EON(v)
    94  	case ssaop.OpARM64EONshiftLL:
    95  		return rewriteValue_OpARM64EONshiftLL(v)
    96  	case ssaop.OpARM64EONshiftRA:
    97  		return rewriteValue_OpARM64EONshiftRA(v)
    98  	case ssaop.OpARM64EONshiftRL:
    99  		return rewriteValue_OpARM64EONshiftRL(v)
   100  	case ssaop.OpARM64EONshiftRO:
   101  		return rewriteValue_OpARM64EONshiftRO(v)
   102  	case ssaop.OpARM64Equal:
   103  		return rewriteValue_OpARM64Equal(v)
   104  	case ssaop.OpARM64FADDD:
   105  		return rewriteValue_OpARM64FADDD(v)
   106  	case ssaop.OpARM64FADDS:
   107  		return rewriteValue_OpARM64FADDS(v)
   108  	case ssaop.OpARM64FCMPD:
   109  		return rewriteValue_OpARM64FCMPD(v)
   110  	case ssaop.OpARM64FCMPS:
   111  		return rewriteValue_OpARM64FCMPS(v)
   112  	case ssaop.OpARM64FCSELD:
   113  		return rewriteValue_OpARM64FCSELD(v)
   114  	case ssaop.OpARM64FCSELS:
   115  		return rewriteValue_OpARM64FCSELS(v)
   116  	case ssaop.OpARM64FCVTDS:
   117  		return rewriteValue_OpARM64FCVTDS(v)
   118  	case ssaop.OpARM64FLDPQ:
   119  		return rewriteValue_OpARM64FLDPQ(v)
   120  	case ssaop.OpARM64FMOVDfpgp:
   121  		return rewriteValue_OpARM64FMOVDfpgp(v)
   122  	case ssaop.OpARM64FMOVDgpfp:
   123  		return rewriteValue_OpARM64FMOVDgpfp(v)
   124  	case ssaop.OpARM64FMOVDload:
   125  		return rewriteValue_OpARM64FMOVDload(v)
   126  	case ssaop.OpARM64FMOVDloadidx:
   127  		return rewriteValue_OpARM64FMOVDloadidx(v)
   128  	case ssaop.OpARM64FMOVDloadidx8:
   129  		return rewriteValue_OpARM64FMOVDloadidx8(v)
   130  	case ssaop.OpARM64FMOVDstore:
   131  		return rewriteValue_OpARM64FMOVDstore(v)
   132  	case ssaop.OpARM64FMOVDstoreidx:
   133  		return rewriteValue_OpARM64FMOVDstoreidx(v)
   134  	case ssaop.OpARM64FMOVDstoreidx8:
   135  		return rewriteValue_OpARM64FMOVDstoreidx8(v)
   136  	case ssaop.OpARM64FMOVQload:
   137  		return rewriteValue_OpARM64FMOVQload(v)
   138  	case ssaop.OpARM64FMOVQstore:
   139  		return rewriteValue_OpARM64FMOVQstore(v)
   140  	case ssaop.OpARM64FMOVSload:
   141  		return rewriteValue_OpARM64FMOVSload(v)
   142  	case ssaop.OpARM64FMOVSloadidx:
   143  		return rewriteValue_OpARM64FMOVSloadidx(v)
   144  	case ssaop.OpARM64FMOVSloadidx4:
   145  		return rewriteValue_OpARM64FMOVSloadidx4(v)
   146  	case ssaop.OpARM64FMOVSstore:
   147  		return rewriteValue_OpARM64FMOVSstore(v)
   148  	case ssaop.OpARM64FMOVSstoreidx:
   149  		return rewriteValue_OpARM64FMOVSstoreidx(v)
   150  	case ssaop.OpARM64FMOVSstoreidx4:
   151  		return rewriteValue_OpARM64FMOVSstoreidx4(v)
   152  	case ssaop.OpARM64FMULD:
   153  		return rewriteValue_OpARM64FMULD(v)
   154  	case ssaop.OpARM64FMULS:
   155  		return rewriteValue_OpARM64FMULS(v)
   156  	case ssaop.OpARM64FNEGD:
   157  		return rewriteValue_OpARM64FNEGD(v)
   158  	case ssaop.OpARM64FNEGS:
   159  		return rewriteValue_OpARM64FNEGS(v)
   160  	case ssaop.OpARM64FNMULD:
   161  		return rewriteValue_OpARM64FNMULD(v)
   162  	case ssaop.OpARM64FNMULS:
   163  		return rewriteValue_OpARM64FNMULS(v)
   164  	case ssaop.OpARM64FSTPQ:
   165  		return rewriteValue_OpARM64FSTPQ(v)
   166  	case ssaop.OpARM64FSUBD:
   167  		return rewriteValue_OpARM64FSUBD(v)
   168  	case ssaop.OpARM64FSUBS:
   169  		return rewriteValue_OpARM64FSUBS(v)
   170  	case ssaop.OpARM64GreaterEqual:
   171  		return rewriteValue_OpARM64GreaterEqual(v)
   172  	case ssaop.OpARM64GreaterEqualF:
   173  		return rewriteValue_OpARM64GreaterEqualF(v)
   174  	case ssaop.OpARM64GreaterEqualNoov:
   175  		return rewriteValue_OpARM64GreaterEqualNoov(v)
   176  	case ssaop.OpARM64GreaterEqualU:
   177  		return rewriteValue_OpARM64GreaterEqualU(v)
   178  	case ssaop.OpARM64GreaterThan:
   179  		return rewriteValue_OpARM64GreaterThan(v)
   180  	case ssaop.OpARM64GreaterThanF:
   181  		return rewriteValue_OpARM64GreaterThanF(v)
   182  	case ssaop.OpARM64GreaterThanU:
   183  		return rewriteValue_OpARM64GreaterThanU(v)
   184  	case ssaop.OpARM64LDP:
   185  		return rewriteValue_OpARM64LDP(v)
   186  	case ssaop.OpARM64LessEqual:
   187  		return rewriteValue_OpARM64LessEqual(v)
   188  	case ssaop.OpARM64LessEqualF:
   189  		return rewriteValue_OpARM64LessEqualF(v)
   190  	case ssaop.OpARM64LessEqualU:
   191  		return rewriteValue_OpARM64LessEqualU(v)
   192  	case ssaop.OpARM64LessThan:
   193  		return rewriteValue_OpARM64LessThan(v)
   194  	case ssaop.OpARM64LessThanF:
   195  		return rewriteValue_OpARM64LessThanF(v)
   196  	case ssaop.OpARM64LessThanNoov:
   197  		return rewriteValue_OpARM64LessThanNoov(v)
   198  	case ssaop.OpARM64LessThanU:
   199  		return rewriteValue_OpARM64LessThanU(v)
   200  	case ssaop.OpARM64LoweredPanicBoundsCR:
   201  		return rewriteValue_OpARM64LoweredPanicBoundsCR(v)
   202  	case ssaop.OpARM64LoweredPanicBoundsRC:
   203  		return rewriteValue_OpARM64LoweredPanicBoundsRC(v)
   204  	case ssaop.OpARM64LoweredPanicBoundsRR:
   205  		return rewriteValue_OpARM64LoweredPanicBoundsRR(v)
   206  	case ssaop.OpARM64MADD:
   207  		return rewriteValue_OpARM64MADD(v)
   208  	case ssaop.OpARM64MADDW:
   209  		return rewriteValue_OpARM64MADDW(v)
   210  	case ssaop.OpARM64MNEG:
   211  		return rewriteValue_OpARM64MNEG(v)
   212  	case ssaop.OpARM64MNEGW:
   213  		return rewriteValue_OpARM64MNEGW(v)
   214  	case ssaop.OpARM64MOD:
   215  		return rewriteValue_OpARM64MOD(v)
   216  	case ssaop.OpARM64MODW:
   217  		return rewriteValue_OpARM64MODW(v)
   218  	case ssaop.OpARM64MOVBUload:
   219  		return rewriteValue_OpARM64MOVBUload(v)
   220  	case ssaop.OpARM64MOVBUloadidx:
   221  		return rewriteValue_OpARM64MOVBUloadidx(v)
   222  	case ssaop.OpARM64MOVBUreg:
   223  		return rewriteValue_OpARM64MOVBUreg(v)
   224  	case ssaop.OpARM64MOVBload:
   225  		return rewriteValue_OpARM64MOVBload(v)
   226  	case ssaop.OpARM64MOVBloadidx:
   227  		return rewriteValue_OpARM64MOVBloadidx(v)
   228  	case ssaop.OpARM64MOVBreg:
   229  		return rewriteValue_OpARM64MOVBreg(v)
   230  	case ssaop.OpARM64MOVBstore:
   231  		return rewriteValue_OpARM64MOVBstore(v)
   232  	case ssaop.OpARM64MOVBstoreidx:
   233  		return rewriteValue_OpARM64MOVBstoreidx(v)
   234  	case ssaop.OpARM64MOVDload:
   235  		return rewriteValue_OpARM64MOVDload(v)
   236  	case ssaop.OpARM64MOVDloadidx:
   237  		return rewriteValue_OpARM64MOVDloadidx(v)
   238  	case ssaop.OpARM64MOVDloadidx8:
   239  		return rewriteValue_OpARM64MOVDloadidx8(v)
   240  	case ssaop.OpARM64MOVDnop:
   241  		return rewriteValue_OpARM64MOVDnop(v)
   242  	case ssaop.OpARM64MOVDreg:
   243  		return rewriteValue_OpARM64MOVDreg(v)
   244  	case ssaop.OpARM64MOVDstore:
   245  		return rewriteValue_OpARM64MOVDstore(v)
   246  	case ssaop.OpARM64MOVDstoreidx:
   247  		return rewriteValue_OpARM64MOVDstoreidx(v)
   248  	case ssaop.OpARM64MOVDstoreidx8:
   249  		return rewriteValue_OpARM64MOVDstoreidx8(v)
   250  	case ssaop.OpARM64MOVHUload:
   251  		return rewriteValue_OpARM64MOVHUload(v)
   252  	case ssaop.OpARM64MOVHUloadidx:
   253  		return rewriteValue_OpARM64MOVHUloadidx(v)
   254  	case ssaop.OpARM64MOVHUloadidx2:
   255  		return rewriteValue_OpARM64MOVHUloadidx2(v)
   256  	case ssaop.OpARM64MOVHUreg:
   257  		return rewriteValue_OpARM64MOVHUreg(v)
   258  	case ssaop.OpARM64MOVHload:
   259  		return rewriteValue_OpARM64MOVHload(v)
   260  	case ssaop.OpARM64MOVHloadidx:
   261  		return rewriteValue_OpARM64MOVHloadidx(v)
   262  	case ssaop.OpARM64MOVHloadidx2:
   263  		return rewriteValue_OpARM64MOVHloadidx2(v)
   264  	case ssaop.OpARM64MOVHreg:
   265  		return rewriteValue_OpARM64MOVHreg(v)
   266  	case ssaop.OpARM64MOVHstore:
   267  		return rewriteValue_OpARM64MOVHstore(v)
   268  	case ssaop.OpARM64MOVHstoreidx:
   269  		return rewriteValue_OpARM64MOVHstoreidx(v)
   270  	case ssaop.OpARM64MOVHstoreidx2:
   271  		return rewriteValue_OpARM64MOVHstoreidx2(v)
   272  	case ssaop.OpARM64MOVWUload:
   273  		return rewriteValue_OpARM64MOVWUload(v)
   274  	case ssaop.OpARM64MOVWUloadidx:
   275  		return rewriteValue_OpARM64MOVWUloadidx(v)
   276  	case ssaop.OpARM64MOVWUloadidx4:
   277  		return rewriteValue_OpARM64MOVWUloadidx4(v)
   278  	case ssaop.OpARM64MOVWUreg:
   279  		return rewriteValue_OpARM64MOVWUreg(v)
   280  	case ssaop.OpARM64MOVWload:
   281  		return rewriteValue_OpARM64MOVWload(v)
   282  	case ssaop.OpARM64MOVWloadidx:
   283  		return rewriteValue_OpARM64MOVWloadidx(v)
   284  	case ssaop.OpARM64MOVWloadidx4:
   285  		return rewriteValue_OpARM64MOVWloadidx4(v)
   286  	case ssaop.OpARM64MOVWreg:
   287  		return rewriteValue_OpARM64MOVWreg(v)
   288  	case ssaop.OpARM64MOVWstore:
   289  		return rewriteValue_OpARM64MOVWstore(v)
   290  	case ssaop.OpARM64MOVWstoreidx:
   291  		return rewriteValue_OpARM64MOVWstoreidx(v)
   292  	case ssaop.OpARM64MOVWstoreidx4:
   293  		return rewriteValue_OpARM64MOVWstoreidx4(v)
   294  	case ssaop.OpARM64MSUB:
   295  		return rewriteValue_OpARM64MSUB(v)
   296  	case ssaop.OpARM64MSUBW:
   297  		return rewriteValue_OpARM64MSUBW(v)
   298  	case ssaop.OpARM64MUL:
   299  		return rewriteValue_OpARM64MUL(v)
   300  	case ssaop.OpARM64MULW:
   301  		return rewriteValue_OpARM64MULW(v)
   302  	case ssaop.OpARM64MVN:
   303  		return rewriteValue_OpARM64MVN(v)
   304  	case ssaop.OpARM64MVNshiftLL:
   305  		return rewriteValue_OpARM64MVNshiftLL(v)
   306  	case ssaop.OpARM64MVNshiftRA:
   307  		return rewriteValue_OpARM64MVNshiftRA(v)
   308  	case ssaop.OpARM64MVNshiftRL:
   309  		return rewriteValue_OpARM64MVNshiftRL(v)
   310  	case ssaop.OpARM64MVNshiftRO:
   311  		return rewriteValue_OpARM64MVNshiftRO(v)
   312  	case ssaop.OpARM64NEG:
   313  		return rewriteValue_OpARM64NEG(v)
   314  	case ssaop.OpARM64NEGshiftLL:
   315  		return rewriteValue_OpARM64NEGshiftLL(v)
   316  	case ssaop.OpARM64NEGshiftRA:
   317  		return rewriteValue_OpARM64NEGshiftRA(v)
   318  	case ssaop.OpARM64NEGshiftRL:
   319  		return rewriteValue_OpARM64NEGshiftRL(v)
   320  	case ssaop.OpARM64NotEqual:
   321  		return rewriteValue_OpARM64NotEqual(v)
   322  	case ssaop.OpARM64OR:
   323  		return rewriteValue_OpARM64OR(v)
   324  	case ssaop.OpARM64ORN:
   325  		return rewriteValue_OpARM64ORN(v)
   326  	case ssaop.OpARM64ORNshiftLL:
   327  		return rewriteValue_OpARM64ORNshiftLL(v)
   328  	case ssaop.OpARM64ORNshiftRA:
   329  		return rewriteValue_OpARM64ORNshiftRA(v)
   330  	case ssaop.OpARM64ORNshiftRL:
   331  		return rewriteValue_OpARM64ORNshiftRL(v)
   332  	case ssaop.OpARM64ORNshiftRO:
   333  		return rewriteValue_OpARM64ORNshiftRO(v)
   334  	case ssaop.OpARM64ORconst:
   335  		return rewriteValue_OpARM64ORconst(v)
   336  	case ssaop.OpARM64ORshiftLL:
   337  		return rewriteValue_OpARM64ORshiftLL(v)
   338  	case ssaop.OpARM64ORshiftRA:
   339  		return rewriteValue_OpARM64ORshiftRA(v)
   340  	case ssaop.OpARM64ORshiftRL:
   341  		return rewriteValue_OpARM64ORshiftRL(v)
   342  	case ssaop.OpARM64ORshiftRO:
   343  		return rewriteValue_OpARM64ORshiftRO(v)
   344  	case ssaop.OpARM64REV:
   345  		return rewriteValue_OpARM64REV(v)
   346  	case ssaop.OpARM64REV16:
   347  		return rewriteValue_OpARM64REV16(v)
   348  	case ssaop.OpARM64REVW:
   349  		return rewriteValue_OpARM64REVW(v)
   350  	case ssaop.OpARM64ROR:
   351  		return rewriteValue_OpARM64ROR(v)
   352  	case ssaop.OpARM64RORW:
   353  		return rewriteValue_OpARM64RORW(v)
   354  	case ssaop.OpARM64SBCSflags:
   355  		return rewriteValue_OpARM64SBCSflags(v)
   356  	case ssaop.OpARM64SBFX:
   357  		return rewriteValue_OpARM64SBFX(v)
   358  	case ssaop.OpARM64SLL:
   359  		return rewriteValue_OpARM64SLL(v)
   360  	case ssaop.OpARM64SLLconst:
   361  		return rewriteValue_OpARM64SLLconst(v)
   362  	case ssaop.OpARM64SRA:
   363  		return rewriteValue_OpARM64SRA(v)
   364  	case ssaop.OpARM64SRAconst:
   365  		return rewriteValue_OpARM64SRAconst(v)
   366  	case ssaop.OpARM64SRL:
   367  		return rewriteValue_OpARM64SRL(v)
   368  	case ssaop.OpARM64SRLconst:
   369  		return rewriteValue_OpARM64SRLconst(v)
   370  	case ssaop.OpARM64STP:
   371  		return rewriteValue_OpARM64STP(v)
   372  	case ssaop.OpARM64SUB:
   373  		return rewriteValue_OpARM64SUB(v)
   374  	case ssaop.OpARM64SUBconst:
   375  		return rewriteValue_OpARM64SUBconst(v)
   376  	case ssaop.OpARM64SUBshiftLL:
   377  		return rewriteValue_OpARM64SUBshiftLL(v)
   378  	case ssaop.OpARM64SUBshiftRA:
   379  		return rewriteValue_OpARM64SUBshiftRA(v)
   380  	case ssaop.OpARM64SUBshiftRL:
   381  		return rewriteValue_OpARM64SUBshiftRL(v)
   382  	case ssaop.OpARM64TST:
   383  		return rewriteValue_OpARM64TST(v)
   384  	case ssaop.OpARM64TSTW:
   385  		return rewriteValue_OpARM64TSTW(v)
   386  	case ssaop.OpARM64TSTWconst:
   387  		return rewriteValue_OpARM64TSTWconst(v)
   388  	case ssaop.OpARM64TSTconst:
   389  		return rewriteValue_OpARM64TSTconst(v)
   390  	case ssaop.OpARM64TSTshiftLL:
   391  		return rewriteValue_OpARM64TSTshiftLL(v)
   392  	case ssaop.OpARM64TSTshiftRA:
   393  		return rewriteValue_OpARM64TSTshiftRA(v)
   394  	case ssaop.OpARM64TSTshiftRL:
   395  		return rewriteValue_OpARM64TSTshiftRL(v)
   396  	case ssaop.OpARM64TSTshiftRO:
   397  		return rewriteValue_OpARM64TSTshiftRO(v)
   398  	case ssaop.OpARM64UBFIZ:
   399  		return rewriteValue_OpARM64UBFIZ(v)
   400  	case ssaop.OpARM64UBFX:
   401  		return rewriteValue_OpARM64UBFX(v)
   402  	case ssaop.OpARM64UDIV:
   403  		return rewriteValue_OpARM64UDIV(v)
   404  	case ssaop.OpARM64UDIVW:
   405  		return rewriteValue_OpARM64UDIVW(v)
   406  	case ssaop.OpARM64UMOD:
   407  		return rewriteValue_OpARM64UMOD(v)
   408  	case ssaop.OpARM64UMODW:
   409  		return rewriteValue_OpARM64UMODW(v)
   410  	case ssaop.OpARM64VBIF16B:
   411  		return rewriteValue_OpARM64VBIF16B(v)
   412  	case ssaop.OpARM64VBIT16B:
   413  		return rewriteValue_OpARM64VBIT16B(v)
   414  	case ssaop.OpARM64VDUPBbcast:
   415  		return rewriteValue_OpARM64VDUPBbcast(v)
   416  	case ssaop.OpARM64VEOR16B:
   417  		return rewriteValue_OpARM64VEOR16B(v)
   418  	case ssaop.OpARM64VFCVTL4S:
   419  		return rewriteValue_OpARM64VFCVTL4S(v)
   420  	case ssaop.OpARM64VMOVDins0:
   421  		return rewriteValue_OpARM64VMOVDins0(v)
   422  	case ssaop.OpARM64VMOVSins0:
   423  		return rewriteValue_OpARM64VMOVSins0(v)
   424  	case ssaop.OpARM64VNOT16B:
   425  		return rewriteValue_OpARM64VNOT16B(v)
   426  	case ssaop.OpARM64VPMULL2D:
   427  		return rewriteValue_OpARM64VPMULL2D(v)
   428  	case ssaop.OpARM64VSHL16B:
   429  		return rewriteValue_OpARM64VSHL16B(v)
   430  	case ssaop.OpARM64VSHL2D:
   431  		return rewriteValue_OpARM64VSHL2D(v)
   432  	case ssaop.OpARM64VSHL4S:
   433  		return rewriteValue_OpARM64VSHL4S(v)
   434  	case ssaop.OpARM64VSHL8H:
   435  		return rewriteValue_OpARM64VSHL8H(v)
   436  	case ssaop.OpARM64VSHRN2D:
   437  		return rewriteValue_OpARM64VSHRN2D(v)
   438  	case ssaop.OpARM64VSHRN4S:
   439  		return rewriteValue_OpARM64VSHRN4S(v)
   440  	case ssaop.OpARM64VSHRN8H:
   441  		return rewriteValue_OpARM64VSHRN8H(v)
   442  	case ssaop.OpARM64VSMULL16B:
   443  		return rewriteValue_OpARM64VSMULL16B(v)
   444  	case ssaop.OpARM64VSMULL4S:
   445  		return rewriteValue_OpARM64VSMULL4S(v)
   446  	case ssaop.OpARM64VSMULL8H:
   447  		return rewriteValue_OpARM64VSMULL8H(v)
   448  	case ssaop.OpARM64VSQSHL16Bconst:
   449  		return rewriteValue_OpARM64VSQSHL16Bconst(v)
   450  	case ssaop.OpARM64VSQSHL2Dconst:
   451  		return rewriteValue_OpARM64VSQSHL2Dconst(v)
   452  	case ssaop.OpARM64VSQSHL4Sconst:
   453  		return rewriteValue_OpARM64VSQSHL4Sconst(v)
   454  	case ssaop.OpARM64VSQSHL8Hconst:
   455  		return rewriteValue_OpARM64VSQSHL8Hconst(v)
   456  	case ssaop.OpARM64VSSHLL16B:
   457  		return rewriteValue_OpARM64VSSHLL16B(v)
   458  	case ssaop.OpARM64VSSHLL4S:
   459  		return rewriteValue_OpARM64VSSHLL4S(v)
   460  	case ssaop.OpARM64VSSHLL8H:
   461  		return rewriteValue_OpARM64VSSHLL8H(v)
   462  	case ssaop.OpARM64VSSHR16B:
   463  		return rewriteValue_OpARM64VSSHR16B(v)
   464  	case ssaop.OpARM64VSSHR2D:
   465  		return rewriteValue_OpARM64VSSHR2D(v)
   466  	case ssaop.OpARM64VSSHR4S:
   467  		return rewriteValue_OpARM64VSSHR4S(v)
   468  	case ssaop.OpARM64VSSHR8H:
   469  		return rewriteValue_OpARM64VSSHR8H(v)
   470  	case ssaop.OpARM64VSXTL16B:
   471  		return rewriteValue_OpARM64VSXTL16B(v)
   472  	case ssaop.OpARM64VSXTL4S:
   473  		return rewriteValue_OpARM64VSXTL4S(v)
   474  	case ssaop.OpARM64VSXTL8H:
   475  		return rewriteValue_OpARM64VSXTL8H(v)
   476  	case ssaop.OpARM64VUMULL16B:
   477  		return rewriteValue_OpARM64VUMULL16B(v)
   478  	case ssaop.OpARM64VUMULL4S:
   479  		return rewriteValue_OpARM64VUMULL4S(v)
   480  	case ssaop.OpARM64VUMULL8H:
   481  		return rewriteValue_OpARM64VUMULL8H(v)
   482  	case ssaop.OpARM64VUQSHL16Bconst:
   483  		return rewriteValue_OpARM64VUQSHL16Bconst(v)
   484  	case ssaop.OpARM64VUQSHL2Dconst:
   485  		return rewriteValue_OpARM64VUQSHL2Dconst(v)
   486  	case ssaop.OpARM64VUQSHL4Sconst:
   487  		return rewriteValue_OpARM64VUQSHL4Sconst(v)
   488  	case ssaop.OpARM64VUQSHL8Hconst:
   489  		return rewriteValue_OpARM64VUQSHL8Hconst(v)
   490  	case ssaop.OpARM64VUSHLL16B:
   491  		return rewriteValue_OpARM64VUSHLL16B(v)
   492  	case ssaop.OpARM64VUSHLL4S:
   493  		return rewriteValue_OpARM64VUSHLL4S(v)
   494  	case ssaop.OpARM64VUSHLL8H:
   495  		return rewriteValue_OpARM64VUSHLL8H(v)
   496  	case ssaop.OpARM64VUSHR16B:
   497  		return rewriteValue_OpARM64VUSHR16B(v)
   498  	case ssaop.OpARM64VUSHR2D:
   499  		return rewriteValue_OpARM64VUSHR2D(v)
   500  	case ssaop.OpARM64VUSHR4S:
   501  		return rewriteValue_OpARM64VUSHR4S(v)
   502  	case ssaop.OpARM64VUSHR8H:
   503  		return rewriteValue_OpARM64VUSHR8H(v)
   504  	case ssaop.OpARM64VUXTL16B:
   505  		return rewriteValue_OpARM64VUXTL16B(v)
   506  	case ssaop.OpARM64VUXTL4S:
   507  		return rewriteValue_OpARM64VUXTL4S(v)
   508  	case ssaop.OpARM64VUXTL8H:
   509  		return rewriteValue_OpARM64VUXTL8H(v)
   510  	case ssaop.OpARM64XOR:
   511  		return rewriteValue_OpARM64XOR(v)
   512  	case ssaop.OpARM64XORconst:
   513  		return rewriteValue_OpARM64XORconst(v)
   514  	case ssaop.OpARM64XORshiftLL:
   515  		return rewriteValue_OpARM64XORshiftLL(v)
   516  	case ssaop.OpARM64XORshiftRA:
   517  		return rewriteValue_OpARM64XORshiftRA(v)
   518  	case ssaop.OpARM64XORshiftRL:
   519  		return rewriteValue_OpARM64XORshiftRL(v)
   520  	case ssaop.OpARM64XORshiftRO:
   521  		return rewriteValue_OpARM64XORshiftRO(v)
   522  	case ssaop.OpAbs:
   523  		v.Op = ssaop.OpARM64FABSD
   524  		return true
   525  	case ssaop.OpAbsFloat32x4:
   526  		v.Op = ssaop.OpARM64VFABS4S
   527  		return true
   528  	case ssaop.OpAbsFloat64x2:
   529  		v.Op = ssaop.OpARM64VFABS2D
   530  		return true
   531  	case ssaop.OpAbsInt16x8:
   532  		v.Op = ssaop.OpARM64VABS8H
   533  		return true
   534  	case ssaop.OpAbsInt32x4:
   535  		v.Op = ssaop.OpARM64VABS4S
   536  		return true
   537  	case ssaop.OpAbsInt64x2:
   538  		v.Op = ssaop.OpARM64VABS2D
   539  		return true
   540  	case ssaop.OpAbsInt8x16:
   541  		v.Op = ssaop.OpARM64VABS16B
   542  		return true
   543  	case ssaop.OpAdd16:
   544  		v.Op = ssaop.OpARM64ADD
   545  		return true
   546  	case ssaop.OpAdd32:
   547  		v.Op = ssaop.OpARM64ADD
   548  		return true
   549  	case ssaop.OpAdd32F:
   550  		v.Op = ssaop.OpARM64FADDS
   551  		return true
   552  	case ssaop.OpAdd64:
   553  		v.Op = ssaop.OpARM64ADD
   554  		return true
   555  	case ssaop.OpAdd64F:
   556  		v.Op = ssaop.OpARM64FADDD
   557  		return true
   558  	case ssaop.OpAdd8:
   559  		v.Op = ssaop.OpARM64ADD
   560  		return true
   561  	case ssaop.OpAddFloat32s:
   562  		v.Op = ssaop.OpARM64ZFADDS
   563  		return true
   564  	case ssaop.OpAddFloat32x4:
   565  		v.Op = ssaop.OpARM64VFADD4S
   566  		return true
   567  	case ssaop.OpAddFloat64s:
   568  		v.Op = ssaop.OpARM64ZFADDD
   569  		return true
   570  	case ssaop.OpAddFloat64x2:
   571  		v.Op = ssaop.OpARM64VFADD2D
   572  		return true
   573  	case ssaop.OpAddInt16s:
   574  		v.Op = ssaop.OpARM64ZADDH
   575  		return true
   576  	case ssaop.OpAddInt16x8:
   577  		v.Op = ssaop.OpARM64VADD8H
   578  		return true
   579  	case ssaop.OpAddInt32s:
   580  		v.Op = ssaop.OpARM64ZADDS
   581  		return true
   582  	case ssaop.OpAddInt32x4:
   583  		v.Op = ssaop.OpARM64VADD4S
   584  		return true
   585  	case ssaop.OpAddInt64s:
   586  		v.Op = ssaop.OpARM64ZADDD
   587  		return true
   588  	case ssaop.OpAddInt64x2:
   589  		v.Op = ssaop.OpARM64VADD2D
   590  		return true
   591  	case ssaop.OpAddInt8s:
   592  		v.Op = ssaop.OpARM64ZADDB
   593  		return true
   594  	case ssaop.OpAddInt8x16:
   595  		v.Op = ssaop.OpARM64VADD16B
   596  		return true
   597  	case ssaop.OpAddPtr:
   598  		v.Op = ssaop.OpARM64ADD
   599  		return true
   600  	case ssaop.OpAddSaturatedInt16s:
   601  		v.Op = ssaop.OpARM64ZSQADDH
   602  		return true
   603  	case ssaop.OpAddSaturatedInt16x8:
   604  		v.Op = ssaop.OpARM64VSQADD8H
   605  		return true
   606  	case ssaop.OpAddSaturatedInt32s:
   607  		v.Op = ssaop.OpARM64ZSQADDS
   608  		return true
   609  	case ssaop.OpAddSaturatedInt32x4:
   610  		v.Op = ssaop.OpARM64VSQADD4S
   611  		return true
   612  	case ssaop.OpAddSaturatedInt64s:
   613  		v.Op = ssaop.OpARM64ZSQADDD
   614  		return true
   615  	case ssaop.OpAddSaturatedInt64x2:
   616  		v.Op = ssaop.OpARM64VSQADD2D
   617  		return true
   618  	case ssaop.OpAddSaturatedInt8s:
   619  		v.Op = ssaop.OpARM64ZSQADDB
   620  		return true
   621  	case ssaop.OpAddSaturatedInt8x16:
   622  		v.Op = ssaop.OpARM64VSQADD16B
   623  		return true
   624  	case ssaop.OpAddSaturatedUint16s:
   625  		v.Op = ssaop.OpARM64ZUQADDH
   626  		return true
   627  	case ssaop.OpAddSaturatedUint16x8:
   628  		v.Op = ssaop.OpARM64VUQADD8H
   629  		return true
   630  	case ssaop.OpAddSaturatedUint32s:
   631  		v.Op = ssaop.OpARM64ZUQADDS
   632  		return true
   633  	case ssaop.OpAddSaturatedUint32x4:
   634  		v.Op = ssaop.OpARM64VUQADD4S
   635  		return true
   636  	case ssaop.OpAddSaturatedUint64s:
   637  		v.Op = ssaop.OpARM64ZUQADDD
   638  		return true
   639  	case ssaop.OpAddSaturatedUint64x2:
   640  		v.Op = ssaop.OpARM64VUQADD2D
   641  		return true
   642  	case ssaop.OpAddSaturatedUint8s:
   643  		v.Op = ssaop.OpARM64ZUQADDB
   644  		return true
   645  	case ssaop.OpAddSaturatedUint8x16:
   646  		v.Op = ssaop.OpARM64VUQADD16B
   647  		return true
   648  	case ssaop.OpAddUint16s:
   649  		v.Op = ssaop.OpARM64ZADDH
   650  		return true
   651  	case ssaop.OpAddUint16x8:
   652  		v.Op = ssaop.OpARM64VADD8H
   653  		return true
   654  	case ssaop.OpAddUint32s:
   655  		v.Op = ssaop.OpARM64ZADDS
   656  		return true
   657  	case ssaop.OpAddUint32x4:
   658  		v.Op = ssaop.OpARM64VADD4S
   659  		return true
   660  	case ssaop.OpAddUint64s:
   661  		v.Op = ssaop.OpARM64ZADDD
   662  		return true
   663  	case ssaop.OpAddUint64x2:
   664  		v.Op = ssaop.OpARM64VADD2D
   665  		return true
   666  	case ssaop.OpAddUint8s:
   667  		v.Op = ssaop.OpARM64ZADDB
   668  		return true
   669  	case ssaop.OpAddUint8x16:
   670  		v.Op = ssaop.OpARM64VADD16B
   671  		return true
   672  	case ssaop.OpAddr:
   673  		return rewriteValue_OpAddr(v)
   674  	case ssaop.OpAnd16:
   675  		v.Op = ssaop.OpARM64AND
   676  		return true
   677  	case ssaop.OpAnd32:
   678  		v.Op = ssaop.OpARM64AND
   679  		return true
   680  	case ssaop.OpAnd64:
   681  		v.Op = ssaop.OpARM64AND
   682  		return true
   683  	case ssaop.OpAnd8:
   684  		v.Op = ssaop.OpARM64AND
   685  		return true
   686  	case ssaop.OpAndB:
   687  		v.Op = ssaop.OpARM64AND
   688  		return true
   689  	case ssaop.OpAndInt16x8:
   690  		v.Op = ssaop.OpARM64VAND16B
   691  		return true
   692  	case ssaop.OpAndInt32x4:
   693  		v.Op = ssaop.OpARM64VAND16B
   694  		return true
   695  	case ssaop.OpAndInt64x2:
   696  		v.Op = ssaop.OpARM64VAND16B
   697  		return true
   698  	case ssaop.OpAndInt8x16:
   699  		v.Op = ssaop.OpARM64VAND16B
   700  		return true
   701  	case ssaop.OpAndNotInt16x8:
   702  		v.Op = ssaop.OpARM64VBIC16B
   703  		return true
   704  	case ssaop.OpAndNotInt32x4:
   705  		v.Op = ssaop.OpARM64VBIC16B
   706  		return true
   707  	case ssaop.OpAndNotInt64x2:
   708  		v.Op = ssaop.OpARM64VBIC16B
   709  		return true
   710  	case ssaop.OpAndNotInt8x16:
   711  		v.Op = ssaop.OpARM64VBIC16B
   712  		return true
   713  	case ssaop.OpAndNotUint16x8:
   714  		v.Op = ssaop.OpARM64VBIC16B
   715  		return true
   716  	case ssaop.OpAndNotUint32x4:
   717  		v.Op = ssaop.OpARM64VBIC16B
   718  		return true
   719  	case ssaop.OpAndNotUint64x2:
   720  		v.Op = ssaop.OpARM64VBIC16B
   721  		return true
   722  	case ssaop.OpAndNotUint8x16:
   723  		v.Op = ssaop.OpARM64VBIC16B
   724  		return true
   725  	case ssaop.OpAndUint16x8:
   726  		v.Op = ssaop.OpARM64VAND16B
   727  		return true
   728  	case ssaop.OpAndUint32x4:
   729  		v.Op = ssaop.OpARM64VAND16B
   730  		return true
   731  	case ssaop.OpAndUint64x2:
   732  		v.Op = ssaop.OpARM64VAND16B
   733  		return true
   734  	case ssaop.OpAndUint8x16:
   735  		v.Op = ssaop.OpARM64VAND16B
   736  		return true
   737  	case ssaop.OpAtomicAdd32:
   738  		v.Op = ssaop.OpARM64LoweredAtomicAdd32
   739  		return true
   740  	case ssaop.OpAtomicAdd32Variant:
   741  		v.Op = ssaop.OpARM64LoweredAtomicAdd32Variant
   742  		return true
   743  	case ssaop.OpAtomicAdd64:
   744  		v.Op = ssaop.OpARM64LoweredAtomicAdd64
   745  		return true
   746  	case ssaop.OpAtomicAdd64Variant:
   747  		v.Op = ssaop.OpARM64LoweredAtomicAdd64Variant
   748  		return true
   749  	case ssaop.OpAtomicAnd32value:
   750  		v.Op = ssaop.OpARM64LoweredAtomicAnd32
   751  		return true
   752  	case ssaop.OpAtomicAnd32valueVariant:
   753  		v.Op = ssaop.OpARM64LoweredAtomicAnd32Variant
   754  		return true
   755  	case ssaop.OpAtomicAnd64value:
   756  		v.Op = ssaop.OpARM64LoweredAtomicAnd64
   757  		return true
   758  	case ssaop.OpAtomicAnd64valueVariant:
   759  		v.Op = ssaop.OpARM64LoweredAtomicAnd64Variant
   760  		return true
   761  	case ssaop.OpAtomicAnd8value:
   762  		v.Op = ssaop.OpARM64LoweredAtomicAnd8
   763  		return true
   764  	case ssaop.OpAtomicAnd8valueVariant:
   765  		v.Op = ssaop.OpARM64LoweredAtomicAnd8Variant
   766  		return true
   767  	case ssaop.OpAtomicCompareAndSwap32:
   768  		v.Op = ssaop.OpARM64LoweredAtomicCas32
   769  		return true
   770  	case ssaop.OpAtomicCompareAndSwap32Variant:
   771  		v.Op = ssaop.OpARM64LoweredAtomicCas32Variant
   772  		return true
   773  	case ssaop.OpAtomicCompareAndSwap64:
   774  		v.Op = ssaop.OpARM64LoweredAtomicCas64
   775  		return true
   776  	case ssaop.OpAtomicCompareAndSwap64Variant:
   777  		v.Op = ssaop.OpARM64LoweredAtomicCas64Variant
   778  		return true
   779  	case ssaop.OpAtomicExchange32:
   780  		v.Op = ssaop.OpARM64LoweredAtomicExchange32
   781  		return true
   782  	case ssaop.OpAtomicExchange32Variant:
   783  		v.Op = ssaop.OpARM64LoweredAtomicExchange32Variant
   784  		return true
   785  	case ssaop.OpAtomicExchange64:
   786  		v.Op = ssaop.OpARM64LoweredAtomicExchange64
   787  		return true
   788  	case ssaop.OpAtomicExchange64Variant:
   789  		v.Op = ssaop.OpARM64LoweredAtomicExchange64Variant
   790  		return true
   791  	case ssaop.OpAtomicExchange8:
   792  		v.Op = ssaop.OpARM64LoweredAtomicExchange8
   793  		return true
   794  	case ssaop.OpAtomicExchange8Variant:
   795  		v.Op = ssaop.OpARM64LoweredAtomicExchange8Variant
   796  		return true
   797  	case ssaop.OpAtomicLoad32:
   798  		v.Op = ssaop.OpARM64LDARW
   799  		return true
   800  	case ssaop.OpAtomicLoad64:
   801  		v.Op = ssaop.OpARM64LDAR
   802  		return true
   803  	case ssaop.OpAtomicLoad8:
   804  		v.Op = ssaop.OpARM64LDARB
   805  		return true
   806  	case ssaop.OpAtomicLoadPtr:
   807  		v.Op = ssaop.OpARM64LDAR
   808  		return true
   809  	case ssaop.OpAtomicOr32value:
   810  		v.Op = ssaop.OpARM64LoweredAtomicOr32
   811  		return true
   812  	case ssaop.OpAtomicOr32valueVariant:
   813  		v.Op = ssaop.OpARM64LoweredAtomicOr32Variant
   814  		return true
   815  	case ssaop.OpAtomicOr64value:
   816  		v.Op = ssaop.OpARM64LoweredAtomicOr64
   817  		return true
   818  	case ssaop.OpAtomicOr64valueVariant:
   819  		v.Op = ssaop.OpARM64LoweredAtomicOr64Variant
   820  		return true
   821  	case ssaop.OpAtomicOr8value:
   822  		v.Op = ssaop.OpARM64LoweredAtomicOr8
   823  		return true
   824  	case ssaop.OpAtomicOr8valueVariant:
   825  		v.Op = ssaop.OpARM64LoweredAtomicOr8Variant
   826  		return true
   827  	case ssaop.OpAtomicStore32:
   828  		v.Op = ssaop.OpARM64STLRW
   829  		return true
   830  	case ssaop.OpAtomicStore64:
   831  		v.Op = ssaop.OpARM64STLR
   832  		return true
   833  	case ssaop.OpAtomicStore8:
   834  		v.Op = ssaop.OpARM64STLRB
   835  		return true
   836  	case ssaop.OpAtomicStorePtrNoWB:
   837  		v.Op = ssaop.OpARM64STLR
   838  		return true
   839  	case ssaop.OpAverageInt16x8:
   840  		v.Op = ssaop.OpARM64VSRHADD8H
   841  		return true
   842  	case ssaop.OpAverageInt32x4:
   843  		v.Op = ssaop.OpARM64VSRHADD4S
   844  		return true
   845  	case ssaop.OpAverageInt8x16:
   846  		v.Op = ssaop.OpARM64VSRHADD16B
   847  		return true
   848  	case ssaop.OpAverageUint16x8:
   849  		v.Op = ssaop.OpARM64VURHADD8H
   850  		return true
   851  	case ssaop.OpAverageUint32x4:
   852  		v.Op = ssaop.OpARM64VURHADD4S
   853  		return true
   854  	case ssaop.OpAverageUint8x16:
   855  		v.Op = ssaop.OpARM64VURHADD16B
   856  		return true
   857  	case ssaop.OpAvg64u:
   858  		return rewriteValue_OpAvg64u(v)
   859  	case ssaop.OpBitLen16:
   860  		return rewriteValue_OpBitLen16(v)
   861  	case ssaop.OpBitLen32:
   862  		return rewriteValue_OpBitLen32(v)
   863  	case ssaop.OpBitLen64:
   864  		return rewriteValue_OpBitLen64(v)
   865  	case ssaop.OpBitLen8:
   866  		return rewriteValue_OpBitLen8(v)
   867  	case ssaop.OpBitRev16:
   868  		return rewriteValue_OpBitRev16(v)
   869  	case ssaop.OpBitRev32:
   870  		v.Op = ssaop.OpARM64RBITW
   871  		return true
   872  	case ssaop.OpBitRev64:
   873  		v.Op = ssaop.OpARM64RBIT
   874  		return true
   875  	case ssaop.OpBitRev8:
   876  		return rewriteValue_OpBitRev8(v)
   877  	case ssaop.OpBswap16:
   878  		v.Op = ssaop.OpARM64REV16W
   879  		return true
   880  	case ssaop.OpBswap32:
   881  		v.Op = ssaop.OpARM64REVW
   882  		return true
   883  	case ssaop.OpBswap64:
   884  		v.Op = ssaop.OpARM64REV
   885  		return true
   886  	case ssaop.OpCeil:
   887  		v.Op = ssaop.OpARM64FRINTPD
   888  		return true
   889  	case ssaop.OpCeilFloat32x4:
   890  		v.Op = ssaop.OpARM64VFRINTP4S
   891  		return true
   892  	case ssaop.OpCeilFloat64x2:
   893  		v.Op = ssaop.OpARM64VFRINTP2D
   894  		return true
   895  	case ssaop.OpClosureCall:
   896  		v.Op = ssaop.OpARM64CALLclosure
   897  		return true
   898  	case ssaop.OpCom16:
   899  		v.Op = ssaop.OpARM64MVN
   900  		return true
   901  	case ssaop.OpCom32:
   902  		v.Op = ssaop.OpARM64MVN
   903  		return true
   904  	case ssaop.OpCom64:
   905  		v.Op = ssaop.OpARM64MVN
   906  		return true
   907  	case ssaop.OpCom8:
   908  		v.Op = ssaop.OpARM64MVN
   909  		return true
   910  	case ssaop.OpConcatAddPairsFloat32x4:
   911  		v.Op = ssaop.OpARM64VFADDP4S
   912  		return true
   913  	case ssaop.OpConcatAddPairsFloat64x2:
   914  		v.Op = ssaop.OpARM64VFADDP2D
   915  		return true
   916  	case ssaop.OpConcatAddPairsInt16x8:
   917  		v.Op = ssaop.OpARM64VADDP8H
   918  		return true
   919  	case ssaop.OpConcatAddPairsInt32x4:
   920  		v.Op = ssaop.OpARM64VADDP4S
   921  		return true
   922  	case ssaop.OpConcatAddPairsInt64x2:
   923  		v.Op = ssaop.OpARM64VADDP2D
   924  		return true
   925  	case ssaop.OpConcatAddPairsUint16x8:
   926  		v.Op = ssaop.OpARM64VADDP8H
   927  		return true
   928  	case ssaop.OpConcatAddPairsUint32x4:
   929  		v.Op = ssaop.OpARM64VADDP4S
   930  		return true
   931  	case ssaop.OpConcatAddPairsUint64x2:
   932  		v.Op = ssaop.OpARM64VADDP2D
   933  		return true
   934  	case ssaop.OpConcatEvenInt16x8:
   935  		v.Op = ssaop.OpARM64VUZP18H
   936  		return true
   937  	case ssaop.OpConcatEvenInt32x4:
   938  		v.Op = ssaop.OpARM64VUZP14S
   939  		return true
   940  	case ssaop.OpConcatEvenInt64x2:
   941  		v.Op = ssaop.OpARM64VUZP12D
   942  		return true
   943  	case ssaop.OpConcatEvenInt8x16:
   944  		v.Op = ssaop.OpARM64VUZP116B
   945  		return true
   946  	case ssaop.OpConcatEvenUint16x8:
   947  		v.Op = ssaop.OpARM64VUZP18H
   948  		return true
   949  	case ssaop.OpConcatEvenUint32x4:
   950  		v.Op = ssaop.OpARM64VUZP14S
   951  		return true
   952  	case ssaop.OpConcatEvenUint64x2:
   953  		v.Op = ssaop.OpARM64VUZP12D
   954  		return true
   955  	case ssaop.OpConcatEvenUint8x16:
   956  		v.Op = ssaop.OpARM64VUZP116B
   957  		return true
   958  	case ssaop.OpConcatOddInt16x8:
   959  		v.Op = ssaop.OpARM64VUZP28H
   960  		return true
   961  	case ssaop.OpConcatOddInt32x4:
   962  		v.Op = ssaop.OpARM64VUZP24S
   963  		return true
   964  	case ssaop.OpConcatOddInt64x2:
   965  		v.Op = ssaop.OpARM64VUZP22D
   966  		return true
   967  	case ssaop.OpConcatOddInt8x16:
   968  		v.Op = ssaop.OpARM64VUZP216B
   969  		return true
   970  	case ssaop.OpConcatOddUint16x8:
   971  		v.Op = ssaop.OpARM64VUZP28H
   972  		return true
   973  	case ssaop.OpConcatOddUint32x4:
   974  		v.Op = ssaop.OpARM64VUZP24S
   975  		return true
   976  	case ssaop.OpConcatOddUint64x2:
   977  		v.Op = ssaop.OpARM64VUZP22D
   978  		return true
   979  	case ssaop.OpConcatOddUint8x16:
   980  		v.Op = ssaop.OpARM64VUZP216B
   981  		return true
   982  	case ssaop.OpConcatShiftBytesRightUint8x16:
   983  		v.Op = ssaop.OpARM64VEXT16B
   984  		return true
   985  	case ssaop.OpCondSelect:
   986  		return rewriteValue_OpCondSelect(v)
   987  	case ssaop.OpConst16:
   988  		return rewriteValue_OpConst16(v)
   989  	case ssaop.OpConst32:
   990  		return rewriteValue_OpConst32(v)
   991  	case ssaop.OpConst32F:
   992  		return rewriteValue_OpConst32F(v)
   993  	case ssaop.OpConst64:
   994  		return rewriteValue_OpConst64(v)
   995  	case ssaop.OpConst64F:
   996  		return rewriteValue_OpConst64F(v)
   997  	case ssaop.OpConst8:
   998  		return rewriteValue_OpConst8(v)
   999  	case ssaop.OpConstBool:
  1000  		return rewriteValue_OpConstBool(v)
  1001  	case ssaop.OpConstNil:
  1002  		return rewriteValue_OpConstNil(v)
  1003  	case ssaop.OpConvertLo2ToFloat64Float32x4:
  1004  		v.Op = ssaop.OpARM64VFCVTL4S
  1005  		return true
  1006  	case ssaop.OpConvertToFloat32Float64x2:
  1007  		v.Op = ssaop.OpARM64VFCVTN2D
  1008  		return true
  1009  	case ssaop.OpConvertToFloat32Int32x4:
  1010  		v.Op = ssaop.OpARM64VSCVTF4S
  1011  		return true
  1012  	case ssaop.OpConvertToFloat32Uint32x4:
  1013  		v.Op = ssaop.OpARM64VUCVTF4S
  1014  		return true
  1015  	case ssaop.OpConvertToFloat64Int64x2:
  1016  		v.Op = ssaop.OpARM64VSCVTF2D
  1017  		return true
  1018  	case ssaop.OpConvertToFloat64Uint64x2:
  1019  		v.Op = ssaop.OpARM64VUCVTF2D
  1020  		return true
  1021  	case ssaop.OpConvertToInt32Float32x4:
  1022  		v.Op = ssaop.OpARM64VFCVTZS4S
  1023  		return true
  1024  	case ssaop.OpConvertToInt64Float64x2:
  1025  		v.Op = ssaop.OpARM64VFCVTZS2D
  1026  		return true
  1027  	case ssaop.OpConvertToUint32Float32x4:
  1028  		v.Op = ssaop.OpARM64VFCVTZU4S
  1029  		return true
  1030  	case ssaop.OpConvertToUint64Float64x2:
  1031  		v.Op = ssaop.OpARM64VFCVTZU2D
  1032  		return true
  1033  	case ssaop.OpCount8s:
  1034  		return rewriteValue_OpCount8s(v)
  1035  	case ssaop.OpCtz16:
  1036  		return rewriteValue_OpCtz16(v)
  1037  	case ssaop.OpCtz16NonZero:
  1038  		v.Op = ssaop.OpCtz32
  1039  		return true
  1040  	case ssaop.OpCtz32:
  1041  		return rewriteValue_OpCtz32(v)
  1042  	case ssaop.OpCtz32NonZero:
  1043  		v.Op = ssaop.OpCtz32
  1044  		return true
  1045  	case ssaop.OpCtz64:
  1046  		return rewriteValue_OpCtz64(v)
  1047  	case ssaop.OpCtz64NonZero:
  1048  		v.Op = ssaop.OpCtz64
  1049  		return true
  1050  	case ssaop.OpCtz8:
  1051  		return rewriteValue_OpCtz8(v)
  1052  	case ssaop.OpCtz8NonZero:
  1053  		v.Op = ssaop.OpCtz32
  1054  		return true
  1055  	case ssaop.OpCvt32Fto32:
  1056  		v.Op = ssaop.OpARM64FCVTZSSW
  1057  		return true
  1058  	case ssaop.OpCvt32Fto32U:
  1059  		v.Op = ssaop.OpARM64FCVTZUSW
  1060  		return true
  1061  	case ssaop.OpCvt32Fto64:
  1062  		v.Op = ssaop.OpARM64FCVTZSS
  1063  		return true
  1064  	case ssaop.OpCvt32Fto64F:
  1065  		v.Op = ssaop.OpARM64FCVTSD
  1066  		return true
  1067  	case ssaop.OpCvt32Fto64U:
  1068  		v.Op = ssaop.OpARM64FCVTZUS
  1069  		return true
  1070  	case ssaop.OpCvt32Uto32F:
  1071  		v.Op = ssaop.OpARM64UCVTFWS
  1072  		return true
  1073  	case ssaop.OpCvt32Uto64F:
  1074  		v.Op = ssaop.OpARM64UCVTFWD
  1075  		return true
  1076  	case ssaop.OpCvt32to32F:
  1077  		v.Op = ssaop.OpARM64SCVTFWS
  1078  		return true
  1079  	case ssaop.OpCvt32to64F:
  1080  		v.Op = ssaop.OpARM64SCVTFWD
  1081  		return true
  1082  	case ssaop.OpCvt64Fto32:
  1083  		v.Op = ssaop.OpARM64FCVTZSDW
  1084  		return true
  1085  	case ssaop.OpCvt64Fto32F:
  1086  		v.Op = ssaop.OpARM64FCVTDS
  1087  		return true
  1088  	case ssaop.OpCvt64Fto32U:
  1089  		v.Op = ssaop.OpARM64FCVTZUDW
  1090  		return true
  1091  	case ssaop.OpCvt64Fto64:
  1092  		v.Op = ssaop.OpARM64FCVTZSD
  1093  		return true
  1094  	case ssaop.OpCvt64Fto64U:
  1095  		v.Op = ssaop.OpARM64FCVTZUD
  1096  		return true
  1097  	case ssaop.OpCvt64Uto32F:
  1098  		v.Op = ssaop.OpARM64UCVTFS
  1099  		return true
  1100  	case ssaop.OpCvt64Uto64F:
  1101  		v.Op = ssaop.OpARM64UCVTFD
  1102  		return true
  1103  	case ssaop.OpCvt64to32F:
  1104  		v.Op = ssaop.OpARM64SCVTFS
  1105  		return true
  1106  	case ssaop.OpCvt64to64F:
  1107  		v.Op = ssaop.OpARM64SCVTFD
  1108  		return true
  1109  	case ssaop.OpCvtBoolToUint8:
  1110  		v.Op = ssaop.OpCopy
  1111  		return true
  1112  	case ssaop.OpDiv16:
  1113  		return rewriteValue_OpDiv16(v)
  1114  	case ssaop.OpDiv16u:
  1115  		return rewriteValue_OpDiv16u(v)
  1116  	case ssaop.OpDiv32:
  1117  		return rewriteValue_OpDiv32(v)
  1118  	case ssaop.OpDiv32F:
  1119  		v.Op = ssaop.OpARM64FDIVS
  1120  		return true
  1121  	case ssaop.OpDiv32u:
  1122  		v.Op = ssaop.OpARM64UDIVW
  1123  		return true
  1124  	case ssaop.OpDiv64:
  1125  		return rewriteValue_OpDiv64(v)
  1126  	case ssaop.OpDiv64F:
  1127  		v.Op = ssaop.OpARM64FDIVD
  1128  		return true
  1129  	case ssaop.OpDiv64u:
  1130  		v.Op = ssaop.OpARM64UDIV
  1131  		return true
  1132  	case ssaop.OpDiv8:
  1133  		return rewriteValue_OpDiv8(v)
  1134  	case ssaop.OpDiv8u:
  1135  		return rewriteValue_OpDiv8u(v)
  1136  	case ssaop.OpDivFloat32x4:
  1137  		v.Op = ssaop.OpARM64VFDIV4S
  1138  		return true
  1139  	case ssaop.OpDivFloat64x2:
  1140  		v.Op = ssaop.OpARM64VFDIV2D
  1141  		return true
  1142  	case ssaop.OpEq16:
  1143  		return rewriteValue_OpEq16(v)
  1144  	case ssaop.OpEq32:
  1145  		return rewriteValue_OpEq32(v)
  1146  	case ssaop.OpEq32F:
  1147  		return rewriteValue_OpEq32F(v)
  1148  	case ssaop.OpEq64:
  1149  		return rewriteValue_OpEq64(v)
  1150  	case ssaop.OpEq64F:
  1151  		return rewriteValue_OpEq64F(v)
  1152  	case ssaop.OpEq8:
  1153  		return rewriteValue_OpEq8(v)
  1154  	case ssaop.OpEqB:
  1155  		return rewriteValue_OpEqB(v)
  1156  	case ssaop.OpEqPtr:
  1157  		return rewriteValue_OpEqPtr(v)
  1158  	case ssaop.OpEqualFloat32x4:
  1159  		v.Op = ssaop.OpARM64VFCMEQ4S
  1160  		return true
  1161  	case ssaop.OpEqualFloat64x2:
  1162  		v.Op = ssaop.OpARM64VFCMEQ2D
  1163  		return true
  1164  	case ssaop.OpEqualInt16x8:
  1165  		v.Op = ssaop.OpARM64VCMEQ8H
  1166  		return true
  1167  	case ssaop.OpEqualInt32x4:
  1168  		v.Op = ssaop.OpARM64VCMEQ4S
  1169  		return true
  1170  	case ssaop.OpEqualInt64x2:
  1171  		v.Op = ssaop.OpARM64VCMEQ2D
  1172  		return true
  1173  	case ssaop.OpEqualInt8x16:
  1174  		v.Op = ssaop.OpARM64VCMEQ16B
  1175  		return true
  1176  	case ssaop.OpEqualUint16x8:
  1177  		v.Op = ssaop.OpARM64VCMEQ8H
  1178  		return true
  1179  	case ssaop.OpEqualUint32x4:
  1180  		v.Op = ssaop.OpARM64VCMEQ4S
  1181  		return true
  1182  	case ssaop.OpEqualUint64x2:
  1183  		v.Op = ssaop.OpARM64VCMEQ2D
  1184  		return true
  1185  	case ssaop.OpEqualUint8x16:
  1186  		v.Op = ssaop.OpARM64VCMEQ16B
  1187  		return true
  1188  	case ssaop.OpExtendLo2ToInt64Int32x4:
  1189  		v.Op = ssaop.OpARM64VSXTL4S
  1190  		return true
  1191  	case ssaop.OpExtendLo2ToUint64Uint32x4:
  1192  		v.Op = ssaop.OpARM64VUXTL4S
  1193  		return true
  1194  	case ssaop.OpExtendLo4ToInt32Int16x8:
  1195  		v.Op = ssaop.OpARM64VSXTL8H
  1196  		return true
  1197  	case ssaop.OpExtendLo4ToUint32Uint16x8:
  1198  		v.Op = ssaop.OpARM64VUXTL8H
  1199  		return true
  1200  	case ssaop.OpExtendLo8ToInt16Int8x16:
  1201  		v.Op = ssaop.OpARM64VSXTL16B
  1202  		return true
  1203  	case ssaop.OpExtendLo8ToUint16Uint8x16:
  1204  		v.Op = ssaop.OpARM64VUXTL16B
  1205  		return true
  1206  	case ssaop.OpFMA:
  1207  		return rewriteValue_OpFMA(v)
  1208  	case ssaop.OpFloor:
  1209  		v.Op = ssaop.OpARM64FRINTMD
  1210  		return true
  1211  	case ssaop.OpFloorFloat32x4:
  1212  		v.Op = ssaop.OpARM64VFRINTM4S
  1213  		return true
  1214  	case ssaop.OpFloorFloat64x2:
  1215  		v.Op = ssaop.OpARM64VFRINTM2D
  1216  		return true
  1217  	case ssaop.OpGetCallerPC:
  1218  		v.Op = ssaop.OpARM64LoweredGetCallerPC
  1219  		return true
  1220  	case ssaop.OpGetCallerSP:
  1221  		v.Op = ssaop.OpARM64LoweredGetCallerSP
  1222  		return true
  1223  	case ssaop.OpGetClosurePtr:
  1224  		v.Op = ssaop.OpARM64LoweredGetClosurePtr
  1225  		return true
  1226  	case ssaop.OpGetElemFloat32x4:
  1227  		v.Op = ssaop.OpARM64VDUPSextr
  1228  		return true
  1229  	case ssaop.OpGetElemFloat64x2:
  1230  		v.Op = ssaop.OpARM64VDUPDextr
  1231  		return true
  1232  	case ssaop.OpGetElemInt16x8:
  1233  		v.Op = ssaop.OpARM64VMOVHextr
  1234  		return true
  1235  	case ssaop.OpGetElemInt32x4:
  1236  		v.Op = ssaop.OpARM64VMOVSextr
  1237  		return true
  1238  	case ssaop.OpGetElemInt64x2:
  1239  		v.Op = ssaop.OpARM64VMOVDextr
  1240  		return true
  1241  	case ssaop.OpGetElemInt8x16:
  1242  		v.Op = ssaop.OpARM64VMOVBextr
  1243  		return true
  1244  	case ssaop.OpGetElemUint16x8:
  1245  		v.Op = ssaop.OpARM64VMOVHextr
  1246  		return true
  1247  	case ssaop.OpGetElemUint32x4:
  1248  		v.Op = ssaop.OpARM64VMOVSextr
  1249  		return true
  1250  	case ssaop.OpGetElemUint64x2:
  1251  		v.Op = ssaop.OpARM64VMOVDextr
  1252  		return true
  1253  	case ssaop.OpGetElemUint8x16:
  1254  		v.Op = ssaop.OpARM64VMOVBextr
  1255  		return true
  1256  	case ssaop.OpGreaterEqualFloat32x4:
  1257  		v.Op = ssaop.OpARM64VFCMGE4S
  1258  		return true
  1259  	case ssaop.OpGreaterEqualFloat64x2:
  1260  		v.Op = ssaop.OpARM64VFCMGE2D
  1261  		return true
  1262  	case ssaop.OpGreaterEqualInt16x8:
  1263  		v.Op = ssaop.OpARM64VCMGE8H
  1264  		return true
  1265  	case ssaop.OpGreaterEqualInt32x4:
  1266  		v.Op = ssaop.OpARM64VCMGE4S
  1267  		return true
  1268  	case ssaop.OpGreaterEqualInt64x2:
  1269  		v.Op = ssaop.OpARM64VCMGE2D
  1270  		return true
  1271  	case ssaop.OpGreaterEqualInt8x16:
  1272  		v.Op = ssaop.OpARM64VCMGE16B
  1273  		return true
  1274  	case ssaop.OpGreaterEqualUint16x8:
  1275  		v.Op = ssaop.OpARM64VCMHS8H
  1276  		return true
  1277  	case ssaop.OpGreaterEqualUint32x4:
  1278  		v.Op = ssaop.OpARM64VCMHS4S
  1279  		return true
  1280  	case ssaop.OpGreaterEqualUint64x2:
  1281  		v.Op = ssaop.OpARM64VCMHS2D
  1282  		return true
  1283  	case ssaop.OpGreaterEqualUint8x16:
  1284  		v.Op = ssaop.OpARM64VCMHS16B
  1285  		return true
  1286  	case ssaop.OpGreaterFloat32x4:
  1287  		v.Op = ssaop.OpARM64VFCMGT4S
  1288  		return true
  1289  	case ssaop.OpGreaterFloat64x2:
  1290  		v.Op = ssaop.OpARM64VFCMGT2D
  1291  		return true
  1292  	case ssaop.OpGreaterInt16s:
  1293  		return rewriteValue_OpGreaterInt16s(v)
  1294  	case ssaop.OpGreaterInt16x8:
  1295  		v.Op = ssaop.OpARM64VCMGT8H
  1296  		return true
  1297  	case ssaop.OpGreaterInt32s:
  1298  		return rewriteValue_OpGreaterInt32s(v)
  1299  	case ssaop.OpGreaterInt32x4:
  1300  		v.Op = ssaop.OpARM64VCMGT4S
  1301  		return true
  1302  	case ssaop.OpGreaterInt64s:
  1303  		return rewriteValue_OpGreaterInt64s(v)
  1304  	case ssaop.OpGreaterInt64x2:
  1305  		v.Op = ssaop.OpARM64VCMGT2D
  1306  		return true
  1307  	case ssaop.OpGreaterInt8s:
  1308  		return rewriteValue_OpGreaterInt8s(v)
  1309  	case ssaop.OpGreaterInt8x16:
  1310  		v.Op = ssaop.OpARM64VCMGT16B
  1311  		return true
  1312  	case ssaop.OpGreaterUint16x8:
  1313  		v.Op = ssaop.OpARM64VCMHI8H
  1314  		return true
  1315  	case ssaop.OpGreaterUint32x4:
  1316  		v.Op = ssaop.OpARM64VCMHI4S
  1317  		return true
  1318  	case ssaop.OpGreaterUint64x2:
  1319  		v.Op = ssaop.OpARM64VCMHI2D
  1320  		return true
  1321  	case ssaop.OpGreaterUint8x16:
  1322  		v.Op = ssaop.OpARM64VCMHI16B
  1323  		return true
  1324  	case ssaop.OpHmul32:
  1325  		return rewriteValue_OpHmul32(v)
  1326  	case ssaop.OpHmul32u:
  1327  		return rewriteValue_OpHmul32u(v)
  1328  	case ssaop.OpHmul64:
  1329  		v.Op = ssaop.OpARM64MULH
  1330  		return true
  1331  	case ssaop.OpHmul64u:
  1332  		v.Op = ssaop.OpARM64UMULH
  1333  		return true
  1334  	case ssaop.OpInterCall:
  1335  		v.Op = ssaop.OpARM64CALLinter
  1336  		return true
  1337  	case ssaop.OpInterleaveEvenInt16x8:
  1338  		v.Op = ssaop.OpARM64VTRN18H
  1339  		return true
  1340  	case ssaop.OpInterleaveEvenInt32x4:
  1341  		v.Op = ssaop.OpARM64VTRN14S
  1342  		return true
  1343  	case ssaop.OpInterleaveEvenInt64x2:
  1344  		v.Op = ssaop.OpARM64VTRN12D
  1345  		return true
  1346  	case ssaop.OpInterleaveEvenInt8x16:
  1347  		v.Op = ssaop.OpARM64VTRN116B
  1348  		return true
  1349  	case ssaop.OpInterleaveEvenUint16x8:
  1350  		v.Op = ssaop.OpARM64VTRN18H
  1351  		return true
  1352  	case ssaop.OpInterleaveEvenUint32x4:
  1353  		v.Op = ssaop.OpARM64VTRN14S
  1354  		return true
  1355  	case ssaop.OpInterleaveEvenUint64x2:
  1356  		v.Op = ssaop.OpARM64VTRN12D
  1357  		return true
  1358  	case ssaop.OpInterleaveEvenUint8x16:
  1359  		v.Op = ssaop.OpARM64VTRN116B
  1360  		return true
  1361  	case ssaop.OpInterleaveHiInt16x8:
  1362  		v.Op = ssaop.OpARM64VZIP28H
  1363  		return true
  1364  	case ssaop.OpInterleaveHiInt32x4:
  1365  		v.Op = ssaop.OpARM64VZIP24S
  1366  		return true
  1367  	case ssaop.OpInterleaveHiInt64x2:
  1368  		v.Op = ssaop.OpARM64VZIP22D
  1369  		return true
  1370  	case ssaop.OpInterleaveHiInt8x16:
  1371  		v.Op = ssaop.OpARM64VZIP216B
  1372  		return true
  1373  	case ssaop.OpInterleaveHiUint16x8:
  1374  		v.Op = ssaop.OpARM64VZIP28H
  1375  		return true
  1376  	case ssaop.OpInterleaveHiUint32x4:
  1377  		v.Op = ssaop.OpARM64VZIP24S
  1378  		return true
  1379  	case ssaop.OpInterleaveHiUint64x2:
  1380  		v.Op = ssaop.OpARM64VZIP22D
  1381  		return true
  1382  	case ssaop.OpInterleaveHiUint8x16:
  1383  		v.Op = ssaop.OpARM64VZIP216B
  1384  		return true
  1385  	case ssaop.OpInterleaveLoInt16x8:
  1386  		v.Op = ssaop.OpARM64VZIP18H
  1387  		return true
  1388  	case ssaop.OpInterleaveLoInt32x4:
  1389  		v.Op = ssaop.OpARM64VZIP14S
  1390  		return true
  1391  	case ssaop.OpInterleaveLoInt64x2:
  1392  		v.Op = ssaop.OpARM64VZIP12D
  1393  		return true
  1394  	case ssaop.OpInterleaveLoInt8x16:
  1395  		v.Op = ssaop.OpARM64VZIP116B
  1396  		return true
  1397  	case ssaop.OpInterleaveLoUint16x8:
  1398  		v.Op = ssaop.OpARM64VZIP18H
  1399  		return true
  1400  	case ssaop.OpInterleaveLoUint32x4:
  1401  		v.Op = ssaop.OpARM64VZIP14S
  1402  		return true
  1403  	case ssaop.OpInterleaveLoUint64x2:
  1404  		v.Op = ssaop.OpARM64VZIP12D
  1405  		return true
  1406  	case ssaop.OpInterleaveLoUint8x16:
  1407  		v.Op = ssaop.OpARM64VZIP116B
  1408  		return true
  1409  	case ssaop.OpInterleaveOddInt16x8:
  1410  		v.Op = ssaop.OpARM64VTRN28H
  1411  		return true
  1412  	case ssaop.OpInterleaveOddInt32x4:
  1413  		v.Op = ssaop.OpARM64VTRN24S
  1414  		return true
  1415  	case ssaop.OpInterleaveOddInt64x2:
  1416  		v.Op = ssaop.OpARM64VTRN22D
  1417  		return true
  1418  	case ssaop.OpInterleaveOddInt8x16:
  1419  		v.Op = ssaop.OpARM64VTRN216B
  1420  		return true
  1421  	case ssaop.OpInterleaveOddUint16x8:
  1422  		v.Op = ssaop.OpARM64VTRN28H
  1423  		return true
  1424  	case ssaop.OpInterleaveOddUint32x4:
  1425  		v.Op = ssaop.OpARM64VTRN24S
  1426  		return true
  1427  	case ssaop.OpInterleaveOddUint64x2:
  1428  		v.Op = ssaop.OpARM64VTRN22D
  1429  		return true
  1430  	case ssaop.OpInterleaveOddUint8x16:
  1431  		v.Op = ssaop.OpARM64VTRN216B
  1432  		return true
  1433  	case ssaop.OpIsInBounds:
  1434  		return rewriteValue_OpIsInBounds(v)
  1435  	case ssaop.OpIsNonNil:
  1436  		return rewriteValue_OpIsNonNil(v)
  1437  	case ssaop.OpIsSliceInBounds:
  1438  		return rewriteValue_OpIsSliceInBounds(v)
  1439  	case ssaop.OpLeadingSignBitsInt16x8:
  1440  		v.Op = ssaop.OpARM64VCLS8H
  1441  		return true
  1442  	case ssaop.OpLeadingSignBitsInt32x4:
  1443  		v.Op = ssaop.OpARM64VCLS4S
  1444  		return true
  1445  	case ssaop.OpLeadingSignBitsInt8x16:
  1446  		v.Op = ssaop.OpARM64VCLS16B
  1447  		return true
  1448  	case ssaop.OpLeadingSignBitsUint16x8:
  1449  		v.Op = ssaop.OpARM64VCLS8H
  1450  		return true
  1451  	case ssaop.OpLeadingSignBitsUint32x4:
  1452  		v.Op = ssaop.OpARM64VCLS4S
  1453  		return true
  1454  	case ssaop.OpLeadingSignBitsUint8x16:
  1455  		v.Op = ssaop.OpARM64VCLS16B
  1456  		return true
  1457  	case ssaop.OpLeadingZerosInt16x8:
  1458  		v.Op = ssaop.OpARM64VCLZ8H
  1459  		return true
  1460  	case ssaop.OpLeadingZerosInt32x4:
  1461  		v.Op = ssaop.OpARM64VCLZ4S
  1462  		return true
  1463  	case ssaop.OpLeadingZerosInt8x16:
  1464  		v.Op = ssaop.OpARM64VCLZ16B
  1465  		return true
  1466  	case ssaop.OpLeadingZerosUint16x8:
  1467  		v.Op = ssaop.OpARM64VCLZ8H
  1468  		return true
  1469  	case ssaop.OpLeadingZerosUint32x4:
  1470  		v.Op = ssaop.OpARM64VCLZ4S
  1471  		return true
  1472  	case ssaop.OpLeadingZerosUint8x16:
  1473  		v.Op = ssaop.OpARM64VCLZ16B
  1474  		return true
  1475  	case ssaop.OpLeq16:
  1476  		return rewriteValue_OpLeq16(v)
  1477  	case ssaop.OpLeq16U:
  1478  		return rewriteValue_OpLeq16U(v)
  1479  	case ssaop.OpLeq32:
  1480  		return rewriteValue_OpLeq32(v)
  1481  	case ssaop.OpLeq32F:
  1482  		return rewriteValue_OpLeq32F(v)
  1483  	case ssaop.OpLeq32U:
  1484  		return rewriteValue_OpLeq32U(v)
  1485  	case ssaop.OpLeq64:
  1486  		return rewriteValue_OpLeq64(v)
  1487  	case ssaop.OpLeq64F:
  1488  		return rewriteValue_OpLeq64F(v)
  1489  	case ssaop.OpLeq64U:
  1490  		return rewriteValue_OpLeq64U(v)
  1491  	case ssaop.OpLeq8:
  1492  		return rewriteValue_OpLeq8(v)
  1493  	case ssaop.OpLeq8U:
  1494  		return rewriteValue_OpLeq8U(v)
  1495  	case ssaop.OpLess16:
  1496  		return rewriteValue_OpLess16(v)
  1497  	case ssaop.OpLess16U:
  1498  		return rewriteValue_OpLess16U(v)
  1499  	case ssaop.OpLess32:
  1500  		return rewriteValue_OpLess32(v)
  1501  	case ssaop.OpLess32F:
  1502  		return rewriteValue_OpLess32F(v)
  1503  	case ssaop.OpLess32U:
  1504  		return rewriteValue_OpLess32U(v)
  1505  	case ssaop.OpLess64:
  1506  		return rewriteValue_OpLess64(v)
  1507  	case ssaop.OpLess64F:
  1508  		return rewriteValue_OpLess64F(v)
  1509  	case ssaop.OpLess64U:
  1510  		return rewriteValue_OpLess64U(v)
  1511  	case ssaop.OpLess8:
  1512  		return rewriteValue_OpLess8(v)
  1513  	case ssaop.OpLess8U:
  1514  		return rewriteValue_OpLess8U(v)
  1515  	case ssaop.OpLoad:
  1516  		return rewriteValue_OpLoad(v)
  1517  	case ssaop.OpLoadMasked8:
  1518  		return rewriteValue_OpLoadMasked8(v)
  1519  	case ssaop.OpLocalAddr:
  1520  		return rewriteValue_OpLocalAddr(v)
  1521  	case ssaop.OpLookupOrZeroInt8x16:
  1522  		v.Op = ssaop.OpARM64VTBL16B
  1523  		return true
  1524  	case ssaop.OpLookupOrZeroUint8x16:
  1525  		v.Op = ssaop.OpARM64VTBL16B
  1526  		return true
  1527  	case ssaop.OpLsh16x16:
  1528  		v.Op = ssaop.OpLsh64x16
  1529  		return true
  1530  	case ssaop.OpLsh16x32:
  1531  		v.Op = ssaop.OpLsh64x32
  1532  		return true
  1533  	case ssaop.OpLsh16x64:
  1534  		v.Op = ssaop.OpLsh64x64
  1535  		return true
  1536  	case ssaop.OpLsh16x8:
  1537  		v.Op = ssaop.OpLsh64x8
  1538  		return true
  1539  	case ssaop.OpLsh32x16:
  1540  		v.Op = ssaop.OpLsh64x16
  1541  		return true
  1542  	case ssaop.OpLsh32x32:
  1543  		v.Op = ssaop.OpLsh64x32
  1544  		return true
  1545  	case ssaop.OpLsh32x64:
  1546  		v.Op = ssaop.OpLsh64x64
  1547  		return true
  1548  	case ssaop.OpLsh32x8:
  1549  		v.Op = ssaop.OpLsh64x8
  1550  		return true
  1551  	case ssaop.OpLsh64x16:
  1552  		return rewriteValue_OpLsh64x16(v)
  1553  	case ssaop.OpLsh64x32:
  1554  		return rewriteValue_OpLsh64x32(v)
  1555  	case ssaop.OpLsh64x64:
  1556  		return rewriteValue_OpLsh64x64(v)
  1557  	case ssaop.OpLsh64x8:
  1558  		return rewriteValue_OpLsh64x8(v)
  1559  	case ssaop.OpLsh8x16:
  1560  		v.Op = ssaop.OpLsh64x16
  1561  		return true
  1562  	case ssaop.OpLsh8x32:
  1563  		v.Op = ssaop.OpLsh64x32
  1564  		return true
  1565  	case ssaop.OpLsh8x64:
  1566  		v.Op = ssaop.OpLsh64x64
  1567  		return true
  1568  	case ssaop.OpLsh8x8:
  1569  		v.Op = ssaop.OpLsh64x8
  1570  		return true
  1571  	case ssaop.OpMax32F:
  1572  		v.Op = ssaop.OpARM64FMAXS
  1573  		return true
  1574  	case ssaop.OpMax32FSel:
  1575  		return rewriteValue_OpMax32FSel(v)
  1576  	case ssaop.OpMax64F:
  1577  		v.Op = ssaop.OpARM64FMAXD
  1578  		return true
  1579  	case ssaop.OpMax64FSel:
  1580  		return rewriteValue_OpMax64FSel(v)
  1581  	case ssaop.OpMaxFloat32x4:
  1582  		v.Op = ssaop.OpARM64VFMAX4S
  1583  		return true
  1584  	case ssaop.OpMaxFloat64x2:
  1585  		v.Op = ssaop.OpARM64VFMAX2D
  1586  		return true
  1587  	case ssaop.OpMaxInt16x8:
  1588  		v.Op = ssaop.OpARM64VSMAX8H
  1589  		return true
  1590  	case ssaop.OpMaxInt32x4:
  1591  		v.Op = ssaop.OpARM64VSMAX4S
  1592  		return true
  1593  	case ssaop.OpMaxInt8x16:
  1594  		v.Op = ssaop.OpARM64VSMAX16B
  1595  		return true
  1596  	case ssaop.OpMaxUint16x8:
  1597  		v.Op = ssaop.OpARM64VUMAX8H
  1598  		return true
  1599  	case ssaop.OpMaxUint32x4:
  1600  		v.Op = ssaop.OpARM64VUMAX4S
  1601  		return true
  1602  	case ssaop.OpMaxUint8x16:
  1603  		v.Op = ssaop.OpARM64VUMAX16B
  1604  		return true
  1605  	case ssaop.OpMemEq:
  1606  		v.Op = ssaop.OpARM64LoweredMemEq
  1607  		return true
  1608  	case ssaop.OpMin32F:
  1609  		v.Op = ssaop.OpARM64FMINS
  1610  		return true
  1611  	case ssaop.OpMin32FSel:
  1612  		return rewriteValue_OpMin32FSel(v)
  1613  	case ssaop.OpMin64F:
  1614  		v.Op = ssaop.OpARM64FMIND
  1615  		return true
  1616  	case ssaop.OpMin64FSel:
  1617  		return rewriteValue_OpMin64FSel(v)
  1618  	case ssaop.OpMinFloat32x4:
  1619  		v.Op = ssaop.OpARM64VFMIN4S
  1620  		return true
  1621  	case ssaop.OpMinFloat64x2:
  1622  		v.Op = ssaop.OpARM64VFMIN2D
  1623  		return true
  1624  	case ssaop.OpMinInt16x8:
  1625  		v.Op = ssaop.OpARM64VSMIN8H
  1626  		return true
  1627  	case ssaop.OpMinInt32x4:
  1628  		v.Op = ssaop.OpARM64VSMIN4S
  1629  		return true
  1630  	case ssaop.OpMinInt8x16:
  1631  		v.Op = ssaop.OpARM64VSMIN16B
  1632  		return true
  1633  	case ssaop.OpMinUint16x8:
  1634  		v.Op = ssaop.OpARM64VUMIN8H
  1635  		return true
  1636  	case ssaop.OpMinUint32x4:
  1637  		v.Op = ssaop.OpARM64VUMIN4S
  1638  		return true
  1639  	case ssaop.OpMinUint8x16:
  1640  		v.Op = ssaop.OpARM64VUMIN16B
  1641  		return true
  1642  	case ssaop.OpMod16:
  1643  		return rewriteValue_OpMod16(v)
  1644  	case ssaop.OpMod16u:
  1645  		return rewriteValue_OpMod16u(v)
  1646  	case ssaop.OpMod32:
  1647  		return rewriteValue_OpMod32(v)
  1648  	case ssaop.OpMod32u:
  1649  		v.Op = ssaop.OpARM64UMODW
  1650  		return true
  1651  	case ssaop.OpMod64:
  1652  		return rewriteValue_OpMod64(v)
  1653  	case ssaop.OpMod64u:
  1654  		v.Op = ssaop.OpARM64UMOD
  1655  		return true
  1656  	case ssaop.OpMod8:
  1657  		return rewriteValue_OpMod8(v)
  1658  	case ssaop.OpMod8u:
  1659  		return rewriteValue_OpMod8u(v)
  1660  	case ssaop.OpMove:
  1661  		return rewriteValue_OpMove(v)
  1662  	case ssaop.OpMul16:
  1663  		v.Op = ssaop.OpARM64MULW
  1664  		return true
  1665  	case ssaop.OpMul32:
  1666  		v.Op = ssaop.OpARM64MULW
  1667  		return true
  1668  	case ssaop.OpMul32F:
  1669  		v.Op = ssaop.OpARM64FMULS
  1670  		return true
  1671  	case ssaop.OpMul64:
  1672  		v.Op = ssaop.OpARM64MUL
  1673  		return true
  1674  	case ssaop.OpMul64F:
  1675  		v.Op = ssaop.OpARM64FMULD
  1676  		return true
  1677  	case ssaop.OpMul8:
  1678  		v.Op = ssaop.OpARM64MULW
  1679  		return true
  1680  	case ssaop.OpMulAddFloat32x4:
  1681  		return rewriteValue_OpMulAddFloat32x4(v)
  1682  	case ssaop.OpMulAddFloat64x2:
  1683  		return rewriteValue_OpMulAddFloat64x2(v)
  1684  	case ssaop.OpMulAddInt16x8:
  1685  		return rewriteValue_OpMulAddInt16x8(v)
  1686  	case ssaop.OpMulAddInt32x4:
  1687  		return rewriteValue_OpMulAddInt32x4(v)
  1688  	case ssaop.OpMulAddInt8x16:
  1689  		return rewriteValue_OpMulAddInt8x16(v)
  1690  	case ssaop.OpMulAddUint16x8:
  1691  		return rewriteValue_OpMulAddUint16x8(v)
  1692  	case ssaop.OpMulAddUint32x4:
  1693  		return rewriteValue_OpMulAddUint32x4(v)
  1694  	case ssaop.OpMulAddUint8x16:
  1695  		return rewriteValue_OpMulAddUint8x16(v)
  1696  	case ssaop.OpMulFloat32x4:
  1697  		v.Op = ssaop.OpARM64VFMUL4S
  1698  		return true
  1699  	case ssaop.OpMulFloat64x2:
  1700  		v.Op = ssaop.OpARM64VFMUL2D
  1701  		return true
  1702  	case ssaop.OpMulInt16x8:
  1703  		v.Op = ssaop.OpARM64VMUL8H
  1704  		return true
  1705  	case ssaop.OpMulInt32x4:
  1706  		v.Op = ssaop.OpARM64VMUL4S
  1707  		return true
  1708  	case ssaop.OpMulInt8x16:
  1709  		v.Op = ssaop.OpARM64VMUL16B
  1710  		return true
  1711  	case ssaop.OpMulUint16x8:
  1712  		v.Op = ssaop.OpARM64VMUL8H
  1713  		return true
  1714  	case ssaop.OpMulUint32x4:
  1715  		v.Op = ssaop.OpARM64VMUL4S
  1716  		return true
  1717  	case ssaop.OpMulUint8x16:
  1718  		v.Op = ssaop.OpARM64VMUL16B
  1719  		return true
  1720  	case ssaop.OpMulWidenLoInt16x8:
  1721  		v.Op = ssaop.OpARM64VSMULL8H
  1722  		return true
  1723  	case ssaop.OpMulWidenLoInt32x4:
  1724  		v.Op = ssaop.OpARM64VSMULL4S
  1725  		return true
  1726  	case ssaop.OpMulWidenLoInt8x16:
  1727  		v.Op = ssaop.OpARM64VSMULL16B
  1728  		return true
  1729  	case ssaop.OpMulWidenLoUint16x8:
  1730  		v.Op = ssaop.OpARM64VUMULL8H
  1731  		return true
  1732  	case ssaop.OpMulWidenLoUint32x4:
  1733  		v.Op = ssaop.OpARM64VUMULL4S
  1734  		return true
  1735  	case ssaop.OpMulWidenLoUint8x16:
  1736  		v.Op = ssaop.OpARM64VUMULL16B
  1737  		return true
  1738  	case ssaop.OpNeg16:
  1739  		v.Op = ssaop.OpARM64NEG
  1740  		return true
  1741  	case ssaop.OpNeg32:
  1742  		v.Op = ssaop.OpARM64NEG
  1743  		return true
  1744  	case ssaop.OpNeg32F:
  1745  		v.Op = ssaop.OpARM64FNEGS
  1746  		return true
  1747  	case ssaop.OpNeg64:
  1748  		v.Op = ssaop.OpARM64NEG
  1749  		return true
  1750  	case ssaop.OpNeg64F:
  1751  		v.Op = ssaop.OpARM64FNEGD
  1752  		return true
  1753  	case ssaop.OpNeg8:
  1754  		v.Op = ssaop.OpARM64NEG
  1755  		return true
  1756  	case ssaop.OpNegFloat32x4:
  1757  		v.Op = ssaop.OpARM64VFNEG4S
  1758  		return true
  1759  	case ssaop.OpNegFloat64x2:
  1760  		v.Op = ssaop.OpARM64VFNEG2D
  1761  		return true
  1762  	case ssaop.OpNegInt16x8:
  1763  		v.Op = ssaop.OpARM64VNEG8H
  1764  		return true
  1765  	case ssaop.OpNegInt32x4:
  1766  		v.Op = ssaop.OpARM64VNEG4S
  1767  		return true
  1768  	case ssaop.OpNegInt64x2:
  1769  		v.Op = ssaop.OpARM64VNEG2D
  1770  		return true
  1771  	case ssaop.OpNegInt8x16:
  1772  		v.Op = ssaop.OpARM64VNEG16B
  1773  		return true
  1774  	case ssaop.OpNeq16:
  1775  		return rewriteValue_OpNeq16(v)
  1776  	case ssaop.OpNeq32:
  1777  		return rewriteValue_OpNeq32(v)
  1778  	case ssaop.OpNeq32F:
  1779  		return rewriteValue_OpNeq32F(v)
  1780  	case ssaop.OpNeq64:
  1781  		return rewriteValue_OpNeq64(v)
  1782  	case ssaop.OpNeq64F:
  1783  		return rewriteValue_OpNeq64F(v)
  1784  	case ssaop.OpNeq8:
  1785  		return rewriteValue_OpNeq8(v)
  1786  	case ssaop.OpNeqB:
  1787  		v.Op = ssaop.OpARM64XOR
  1788  		return true
  1789  	case ssaop.OpNeqPtr:
  1790  		return rewriteValue_OpNeqPtr(v)
  1791  	case ssaop.OpNilCheck:
  1792  		v.Op = ssaop.OpARM64LoweredNilCheck
  1793  		return true
  1794  	case ssaop.OpNot:
  1795  		return rewriteValue_OpNot(v)
  1796  	case ssaop.OpNotInt16x8:
  1797  		v.Op = ssaop.OpARM64VNOT16B
  1798  		return true
  1799  	case ssaop.OpNotInt32x4:
  1800  		v.Op = ssaop.OpARM64VNOT16B
  1801  		return true
  1802  	case ssaop.OpNotInt64x2:
  1803  		v.Op = ssaop.OpARM64VNOT16B
  1804  		return true
  1805  	case ssaop.OpNotInt8x16:
  1806  		v.Op = ssaop.OpARM64VNOT16B
  1807  		return true
  1808  	case ssaop.OpNotUint16x8:
  1809  		v.Op = ssaop.OpARM64VNOT16B
  1810  		return true
  1811  	case ssaop.OpNotUint32x4:
  1812  		v.Op = ssaop.OpARM64VNOT16B
  1813  		return true
  1814  	case ssaop.OpNotUint64x2:
  1815  		v.Op = ssaop.OpARM64VNOT16B
  1816  		return true
  1817  	case ssaop.OpNotUint8x16:
  1818  		v.Op = ssaop.OpARM64VNOT16B
  1819  		return true
  1820  	case ssaop.OpOffPtr:
  1821  		return rewriteValue_OpOffPtr(v)
  1822  	case ssaop.OpOnesCountInt8x16:
  1823  		v.Op = ssaop.OpARM64VCNT16B
  1824  		return true
  1825  	case ssaop.OpOnesCountUint8x16:
  1826  		v.Op = ssaop.OpARM64VCNT16B
  1827  		return true
  1828  	case ssaop.OpOr16:
  1829  		v.Op = ssaop.OpARM64OR
  1830  		return true
  1831  	case ssaop.OpOr32:
  1832  		v.Op = ssaop.OpARM64OR
  1833  		return true
  1834  	case ssaop.OpOr64:
  1835  		v.Op = ssaop.OpARM64OR
  1836  		return true
  1837  	case ssaop.OpOr8:
  1838  		v.Op = ssaop.OpARM64OR
  1839  		return true
  1840  	case ssaop.OpOrB:
  1841  		v.Op = ssaop.OpARM64OR
  1842  		return true
  1843  	case ssaop.OpOrInt16x8:
  1844  		v.Op = ssaop.OpARM64VORR16B
  1845  		return true
  1846  	case ssaop.OpOrInt32x4:
  1847  		v.Op = ssaop.OpARM64VORR16B
  1848  		return true
  1849  	case ssaop.OpOrInt64x2:
  1850  		v.Op = ssaop.OpARM64VORR16B
  1851  		return true
  1852  	case ssaop.OpOrInt8x16:
  1853  		v.Op = ssaop.OpARM64VORR16B
  1854  		return true
  1855  	case ssaop.OpOrNotInt16x8:
  1856  		v.Op = ssaop.OpARM64VORN16B
  1857  		return true
  1858  	case ssaop.OpOrNotInt32x4:
  1859  		v.Op = ssaop.OpARM64VORN16B
  1860  		return true
  1861  	case ssaop.OpOrNotInt64x2:
  1862  		v.Op = ssaop.OpARM64VORN16B
  1863  		return true
  1864  	case ssaop.OpOrNotInt8x16:
  1865  		v.Op = ssaop.OpARM64VORN16B
  1866  		return true
  1867  	case ssaop.OpOrNotUint16x8:
  1868  		v.Op = ssaop.OpARM64VORN16B
  1869  		return true
  1870  	case ssaop.OpOrNotUint32x4:
  1871  		v.Op = ssaop.OpARM64VORN16B
  1872  		return true
  1873  	case ssaop.OpOrNotUint64x2:
  1874  		v.Op = ssaop.OpARM64VORN16B
  1875  		return true
  1876  	case ssaop.OpOrNotUint8x16:
  1877  		v.Op = ssaop.OpARM64VORN16B
  1878  		return true
  1879  	case ssaop.OpOrUint16x8:
  1880  		v.Op = ssaop.OpARM64VORR16B
  1881  		return true
  1882  	case ssaop.OpOrUint32x4:
  1883  		v.Op = ssaop.OpARM64VORR16B
  1884  		return true
  1885  	case ssaop.OpOrUint64x2:
  1886  		v.Op = ssaop.OpARM64VORR16B
  1887  		return true
  1888  	case ssaop.OpOrUint8x16:
  1889  		v.Op = ssaop.OpARM64VORR16B
  1890  		return true
  1891  	case ssaop.OpPanicBounds:
  1892  		v.Op = ssaop.OpARM64LoweredPanicBoundsRR
  1893  		return true
  1894  	case ssaop.OpPopCount16:
  1895  		return rewriteValue_OpPopCount16(v)
  1896  	case ssaop.OpPopCount32:
  1897  		return rewriteValue_OpPopCount32(v)
  1898  	case ssaop.OpPopCount64:
  1899  		return rewriteValue_OpPopCount64(v)
  1900  	case ssaop.OpPrefetchCache:
  1901  		return rewriteValue_OpPrefetchCache(v)
  1902  	case ssaop.OpPrefetchCacheStreamed:
  1903  		return rewriteValue_OpPrefetchCacheStreamed(v)
  1904  	case ssaop.OpPubBarrier:
  1905  		return rewriteValue_OpPubBarrier(v)
  1906  	case ssaop.OpRotateLeft16:
  1907  		return rewriteValue_OpRotateLeft16(v)
  1908  	case ssaop.OpRotateLeft32:
  1909  		return rewriteValue_OpRotateLeft32(v)
  1910  	case ssaop.OpRotateLeft64:
  1911  		return rewriteValue_OpRotateLeft64(v)
  1912  	case ssaop.OpRotateLeft8:
  1913  		return rewriteValue_OpRotateLeft8(v)
  1914  	case ssaop.OpRound:
  1915  		v.Op = ssaop.OpARM64FRINTAD
  1916  		return true
  1917  	case ssaop.OpRound32F:
  1918  		v.Op = ssaop.OpARM64LoweredRound32F
  1919  		return true
  1920  	case ssaop.OpRound64F:
  1921  		v.Op = ssaop.OpARM64LoweredRound64F
  1922  		return true
  1923  	case ssaop.OpRoundFloat32x4:
  1924  		v.Op = ssaop.OpARM64VFRINTN4S
  1925  		return true
  1926  	case ssaop.OpRoundFloat64x2:
  1927  		v.Op = ssaop.OpARM64VFRINTN2D
  1928  		return true
  1929  	case ssaop.OpRoundToEven:
  1930  		v.Op = ssaop.OpARM64FRINTND
  1931  		return true
  1932  	case ssaop.OpRsh16Ux16:
  1933  		return rewriteValue_OpRsh16Ux16(v)
  1934  	case ssaop.OpRsh16Ux32:
  1935  		return rewriteValue_OpRsh16Ux32(v)
  1936  	case ssaop.OpRsh16Ux64:
  1937  		return rewriteValue_OpRsh16Ux64(v)
  1938  	case ssaop.OpRsh16Ux8:
  1939  		return rewriteValue_OpRsh16Ux8(v)
  1940  	case ssaop.OpRsh16x16:
  1941  		return rewriteValue_OpRsh16x16(v)
  1942  	case ssaop.OpRsh16x32:
  1943  		return rewriteValue_OpRsh16x32(v)
  1944  	case ssaop.OpRsh16x64:
  1945  		return rewriteValue_OpRsh16x64(v)
  1946  	case ssaop.OpRsh16x8:
  1947  		return rewriteValue_OpRsh16x8(v)
  1948  	case ssaop.OpRsh32Ux16:
  1949  		return rewriteValue_OpRsh32Ux16(v)
  1950  	case ssaop.OpRsh32Ux32:
  1951  		return rewriteValue_OpRsh32Ux32(v)
  1952  	case ssaop.OpRsh32Ux64:
  1953  		return rewriteValue_OpRsh32Ux64(v)
  1954  	case ssaop.OpRsh32Ux8:
  1955  		return rewriteValue_OpRsh32Ux8(v)
  1956  	case ssaop.OpRsh32x16:
  1957  		return rewriteValue_OpRsh32x16(v)
  1958  	case ssaop.OpRsh32x32:
  1959  		return rewriteValue_OpRsh32x32(v)
  1960  	case ssaop.OpRsh32x64:
  1961  		return rewriteValue_OpRsh32x64(v)
  1962  	case ssaop.OpRsh32x8:
  1963  		return rewriteValue_OpRsh32x8(v)
  1964  	case ssaop.OpRsh64Ux16:
  1965  		return rewriteValue_OpRsh64Ux16(v)
  1966  	case ssaop.OpRsh64Ux32:
  1967  		return rewriteValue_OpRsh64Ux32(v)
  1968  	case ssaop.OpRsh64Ux64:
  1969  		return rewriteValue_OpRsh64Ux64(v)
  1970  	case ssaop.OpRsh64Ux8:
  1971  		return rewriteValue_OpRsh64Ux8(v)
  1972  	case ssaop.OpRsh64x16:
  1973  		return rewriteValue_OpRsh64x16(v)
  1974  	case ssaop.OpRsh64x32:
  1975  		return rewriteValue_OpRsh64x32(v)
  1976  	case ssaop.OpRsh64x64:
  1977  		return rewriteValue_OpRsh64x64(v)
  1978  	case ssaop.OpRsh64x8:
  1979  		return rewriteValue_OpRsh64x8(v)
  1980  	case ssaop.OpRsh8Ux16:
  1981  		return rewriteValue_OpRsh8Ux16(v)
  1982  	case ssaop.OpRsh8Ux32:
  1983  		return rewriteValue_OpRsh8Ux32(v)
  1984  	case ssaop.OpRsh8Ux64:
  1985  		return rewriteValue_OpRsh8Ux64(v)
  1986  	case ssaop.OpRsh8Ux8:
  1987  		return rewriteValue_OpRsh8Ux8(v)
  1988  	case ssaop.OpRsh8x16:
  1989  		return rewriteValue_OpRsh8x16(v)
  1990  	case ssaop.OpRsh8x32:
  1991  		return rewriteValue_OpRsh8x32(v)
  1992  	case ssaop.OpRsh8x64:
  1993  		return rewriteValue_OpRsh8x64(v)
  1994  	case ssaop.OpRsh8x8:
  1995  		return rewriteValue_OpRsh8x8(v)
  1996  	case ssaop.OpSaturateToInt16Int32x4:
  1997  		v.Op = ssaop.OpARM64VSQXTN4S
  1998  		return true
  1999  	case ssaop.OpSaturateToInt32Int64x2:
  2000  		v.Op = ssaop.OpARM64VSQXTN2D
  2001  		return true
  2002  	case ssaop.OpSaturateToInt8Int16x8:
  2003  		v.Op = ssaop.OpARM64VSQXTN8H
  2004  		return true
  2005  	case ssaop.OpSaturateToUint16Int32x4:
  2006  		v.Op = ssaop.OpARM64VSQXTUN4S
  2007  		return true
  2008  	case ssaop.OpSaturateToUint16Uint32x4:
  2009  		v.Op = ssaop.OpARM64VUQXTN4S
  2010  		return true
  2011  	case ssaop.OpSaturateToUint32Int64x2:
  2012  		v.Op = ssaop.OpARM64VSQXTUN2D
  2013  		return true
  2014  	case ssaop.OpSaturateToUint32Uint64x2:
  2015  		v.Op = ssaop.OpARM64VUQXTN2D
  2016  		return true
  2017  	case ssaop.OpSaturateToUint8Int16x8:
  2018  		v.Op = ssaop.OpARM64VSQXTUN8H
  2019  		return true
  2020  	case ssaop.OpSaturateToUint8Uint16x8:
  2021  		v.Op = ssaop.OpARM64VUQXTN8H
  2022  		return true
  2023  	case ssaop.OpScalableVectorLen:
  2024  		return rewriteValue_OpScalableVectorLen(v)
  2025  	case ssaop.OpSelect0:
  2026  		return rewriteValue_OpSelect0(v)
  2027  	case ssaop.OpSelect1:
  2028  		return rewriteValue_OpSelect1(v)
  2029  	case ssaop.OpSelectN:
  2030  		return rewriteValue_OpSelectN(v)
  2031  	case ssaop.OpSetElemFloat32x4:
  2032  		v.Op = ssaop.OpARM64VMOVSins0
  2033  		return true
  2034  	case ssaop.OpSetElemFloat64x2:
  2035  		v.Op = ssaop.OpARM64VMOVDins0
  2036  		return true
  2037  	case ssaop.OpSetElemInt16x8:
  2038  		v.Op = ssaop.OpARM64VMOVHins
  2039  		return true
  2040  	case ssaop.OpSetElemInt32x4:
  2041  		v.Op = ssaop.OpARM64VMOVSins
  2042  		return true
  2043  	case ssaop.OpSetElemInt64x2:
  2044  		v.Op = ssaop.OpARM64VMOVDins
  2045  		return true
  2046  	case ssaop.OpSetElemInt8x16:
  2047  		v.Op = ssaop.OpARM64VMOVBins
  2048  		return true
  2049  	case ssaop.OpSetElemUint16x8:
  2050  		v.Op = ssaop.OpARM64VMOVHins
  2051  		return true
  2052  	case ssaop.OpSetElemUint32x4:
  2053  		v.Op = ssaop.OpARM64VMOVSins
  2054  		return true
  2055  	case ssaop.OpSetElemUint64x2:
  2056  		v.Op = ssaop.OpARM64VMOVDins
  2057  		return true
  2058  	case ssaop.OpSetElemUint8x16:
  2059  		v.Op = ssaop.OpARM64VMOVBins
  2060  		return true
  2061  	case ssaop.OpShiftAllLeftInt16x8:
  2062  		return rewriteValue_OpShiftAllLeftInt16x8(v)
  2063  	case ssaop.OpShiftAllLeftInt32x4:
  2064  		return rewriteValue_OpShiftAllLeftInt32x4(v)
  2065  	case ssaop.OpShiftAllLeftInt64x2:
  2066  		return rewriteValue_OpShiftAllLeftInt64x2(v)
  2067  	case ssaop.OpShiftAllLeftInt8x16:
  2068  		return rewriteValue_OpShiftAllLeftInt8x16(v)
  2069  	case ssaop.OpShiftAllLeftUint16x8:
  2070  		return rewriteValue_OpShiftAllLeftUint16x8(v)
  2071  	case ssaop.OpShiftAllLeftUint32x4:
  2072  		return rewriteValue_OpShiftAllLeftUint32x4(v)
  2073  	case ssaop.OpShiftAllLeftUint64x2:
  2074  		return rewriteValue_OpShiftAllLeftUint64x2(v)
  2075  	case ssaop.OpShiftAllLeftUint8x16:
  2076  		return rewriteValue_OpShiftAllLeftUint8x16(v)
  2077  	case ssaop.OpShiftAllRightInt16x8:
  2078  		return rewriteValue_OpShiftAllRightInt16x8(v)
  2079  	case ssaop.OpShiftAllRightInt32x4:
  2080  		return rewriteValue_OpShiftAllRightInt32x4(v)
  2081  	case ssaop.OpShiftAllRightInt64x2:
  2082  		return rewriteValue_OpShiftAllRightInt64x2(v)
  2083  	case ssaop.OpShiftAllRightInt8x16:
  2084  		return rewriteValue_OpShiftAllRightInt8x16(v)
  2085  	case ssaop.OpShiftAllRightUint16x8:
  2086  		return rewriteValue_OpShiftAllRightUint16x8(v)
  2087  	case ssaop.OpShiftAllRightUint32x4:
  2088  		return rewriteValue_OpShiftAllRightUint32x4(v)
  2089  	case ssaop.OpShiftAllRightUint64x2:
  2090  		return rewriteValue_OpShiftAllRightUint64x2(v)
  2091  	case ssaop.OpShiftAllRightUint8x16:
  2092  		return rewriteValue_OpShiftAllRightUint8x16(v)
  2093  	case ssaop.OpShiftInt16x8:
  2094  		v.Op = ssaop.OpARM64VSSHL8H
  2095  		return true
  2096  	case ssaop.OpShiftInt32x4:
  2097  		v.Op = ssaop.OpARM64VSSHL4S
  2098  		return true
  2099  	case ssaop.OpShiftInt64x2:
  2100  		v.Op = ssaop.OpARM64VSSHL2D
  2101  		return true
  2102  	case ssaop.OpShiftInt8x16:
  2103  		v.Op = ssaop.OpARM64VSSHL16B
  2104  		return true
  2105  	case ssaop.OpShiftSaturatedInt16x8:
  2106  		v.Op = ssaop.OpARM64VSQSHL8H
  2107  		return true
  2108  	case ssaop.OpShiftSaturatedInt32x4:
  2109  		v.Op = ssaop.OpARM64VSQSHL4S
  2110  		return true
  2111  	case ssaop.OpShiftSaturatedInt64x2:
  2112  		v.Op = ssaop.OpARM64VSQSHL2D
  2113  		return true
  2114  	case ssaop.OpShiftSaturatedInt8x16:
  2115  		v.Op = ssaop.OpARM64VSQSHL16B
  2116  		return true
  2117  	case ssaop.OpShiftSaturatedUint16x8:
  2118  		v.Op = ssaop.OpARM64VUQSHL8H
  2119  		return true
  2120  	case ssaop.OpShiftSaturatedUint32x4:
  2121  		v.Op = ssaop.OpARM64VUQSHL4S
  2122  		return true
  2123  	case ssaop.OpShiftSaturatedUint64x2:
  2124  		v.Op = ssaop.OpARM64VUQSHL2D
  2125  		return true
  2126  	case ssaop.OpShiftSaturatedUint8x16:
  2127  		v.Op = ssaop.OpARM64VUQSHL16B
  2128  		return true
  2129  	case ssaop.OpShiftUint16x8:
  2130  		v.Op = ssaop.OpARM64VUSHL8H
  2131  		return true
  2132  	case ssaop.OpShiftUint32x4:
  2133  		v.Op = ssaop.OpARM64VUSHL4S
  2134  		return true
  2135  	case ssaop.OpShiftUint64x2:
  2136  		v.Op = ssaop.OpARM64VUSHL2D
  2137  		return true
  2138  	case ssaop.OpShiftUint8x16:
  2139  		v.Op = ssaop.OpARM64VUSHL16B
  2140  		return true
  2141  	case ssaop.OpSignExt16to32:
  2142  		v.Op = ssaop.OpARM64MOVHreg
  2143  		return true
  2144  	case ssaop.OpSignExt16to64:
  2145  		v.Op = ssaop.OpARM64MOVHreg
  2146  		return true
  2147  	case ssaop.OpSignExt32to64:
  2148  		v.Op = ssaop.OpARM64MOVWreg
  2149  		return true
  2150  	case ssaop.OpSignExt8to16:
  2151  		v.Op = ssaop.OpARM64MOVBreg
  2152  		return true
  2153  	case ssaop.OpSignExt8to32:
  2154  		v.Op = ssaop.OpARM64MOVBreg
  2155  		return true
  2156  	case ssaop.OpSignExt8to64:
  2157  		v.Op = ssaop.OpARM64MOVBreg
  2158  		return true
  2159  	case ssaop.OpSlicemask:
  2160  		return rewriteValue_OpSlicemask(v)
  2161  	case ssaop.OpSqrt:
  2162  		v.Op = ssaop.OpARM64FSQRTD
  2163  		return true
  2164  	case ssaop.OpSqrt32:
  2165  		v.Op = ssaop.OpARM64FSQRTS
  2166  		return true
  2167  	case ssaop.OpSqrtFloat32x4:
  2168  		v.Op = ssaop.OpARM64VFSQRT4S
  2169  		return true
  2170  	case ssaop.OpSqrtFloat64x2:
  2171  		v.Op = ssaop.OpARM64VFSQRT2D
  2172  		return true
  2173  	case ssaop.OpStaticCall:
  2174  		v.Op = ssaop.OpARM64CALLstatic
  2175  		return true
  2176  	case ssaop.OpStore:
  2177  		return rewriteValue_OpStore(v)
  2178  	case ssaop.OpStoreMasked8:
  2179  		return rewriteValue_OpStoreMasked8(v)
  2180  	case ssaop.OpSub16:
  2181  		v.Op = ssaop.OpARM64SUB
  2182  		return true
  2183  	case ssaop.OpSub32:
  2184  		v.Op = ssaop.OpARM64SUB
  2185  		return true
  2186  	case ssaop.OpSub32F:
  2187  		v.Op = ssaop.OpARM64FSUBS
  2188  		return true
  2189  	case ssaop.OpSub64:
  2190  		v.Op = ssaop.OpARM64SUB
  2191  		return true
  2192  	case ssaop.OpSub64F:
  2193  		v.Op = ssaop.OpARM64FSUBD
  2194  		return true
  2195  	case ssaop.OpSub8:
  2196  		v.Op = ssaop.OpARM64SUB
  2197  		return true
  2198  	case ssaop.OpSubFloat32x4:
  2199  		v.Op = ssaop.OpARM64VFSUB4S
  2200  		return true
  2201  	case ssaop.OpSubFloat64x2:
  2202  		v.Op = ssaop.OpARM64VFSUB2D
  2203  		return true
  2204  	case ssaop.OpSubInt16x8:
  2205  		v.Op = ssaop.OpARM64VSUB8H
  2206  		return true
  2207  	case ssaop.OpSubInt32x4:
  2208  		v.Op = ssaop.OpARM64VSUB4S
  2209  		return true
  2210  	case ssaop.OpSubInt64x2:
  2211  		v.Op = ssaop.OpARM64VSUB2D
  2212  		return true
  2213  	case ssaop.OpSubInt8x16:
  2214  		v.Op = ssaop.OpARM64VSUB16B
  2215  		return true
  2216  	case ssaop.OpSubPtr:
  2217  		v.Op = ssaop.OpARM64SUB
  2218  		return true
  2219  	case ssaop.OpSubSaturatedInt16x8:
  2220  		v.Op = ssaop.OpARM64VSQSUB8H
  2221  		return true
  2222  	case ssaop.OpSubSaturatedInt32x4:
  2223  		v.Op = ssaop.OpARM64VSQSUB4S
  2224  		return true
  2225  	case ssaop.OpSubSaturatedInt64x2:
  2226  		v.Op = ssaop.OpARM64VSQSUB2D
  2227  		return true
  2228  	case ssaop.OpSubSaturatedInt8x16:
  2229  		v.Op = ssaop.OpARM64VSQSUB16B
  2230  		return true
  2231  	case ssaop.OpSubSaturatedUint16x8:
  2232  		v.Op = ssaop.OpARM64VUQSUB8H
  2233  		return true
  2234  	case ssaop.OpSubSaturatedUint32x4:
  2235  		v.Op = ssaop.OpARM64VUQSUB4S
  2236  		return true
  2237  	case ssaop.OpSubSaturatedUint64x2:
  2238  		v.Op = ssaop.OpARM64VUQSUB2D
  2239  		return true
  2240  	case ssaop.OpSubSaturatedUint8x16:
  2241  		v.Op = ssaop.OpARM64VUQSUB16B
  2242  		return true
  2243  	case ssaop.OpSubUint16x8:
  2244  		v.Op = ssaop.OpARM64VSUB8H
  2245  		return true
  2246  	case ssaop.OpSubUint32x4:
  2247  		v.Op = ssaop.OpARM64VSUB4S
  2248  		return true
  2249  	case ssaop.OpSubUint64x2:
  2250  		v.Op = ssaop.OpARM64VSUB2D
  2251  		return true
  2252  	case ssaop.OpSubUint8x16:
  2253  		v.Op = ssaop.OpARM64VSUB16B
  2254  		return true
  2255  	case ssaop.OpTailCall:
  2256  		v.Op = ssaop.OpARM64CALLtail
  2257  		return true
  2258  	case ssaop.OpTailCallInter:
  2259  		v.Op = ssaop.OpARM64CALLtailinter
  2260  		return true
  2261  	case ssaop.OpTrunc:
  2262  		v.Op = ssaop.OpARM64FRINTZD
  2263  		return true
  2264  	case ssaop.OpTrunc16to8:
  2265  		v.Op = ssaop.OpCopy
  2266  		return true
  2267  	case ssaop.OpTrunc32to16:
  2268  		v.Op = ssaop.OpCopy
  2269  		return true
  2270  	case ssaop.OpTrunc32to8:
  2271  		v.Op = ssaop.OpCopy
  2272  		return true
  2273  	case ssaop.OpTrunc64to16:
  2274  		v.Op = ssaop.OpCopy
  2275  		return true
  2276  	case ssaop.OpTrunc64to32:
  2277  		v.Op = ssaop.OpCopy
  2278  		return true
  2279  	case ssaop.OpTrunc64to8:
  2280  		v.Op = ssaop.OpCopy
  2281  		return true
  2282  	case ssaop.OpTruncFloat32x4:
  2283  		v.Op = ssaop.OpARM64VFRINTZ4S
  2284  		return true
  2285  	case ssaop.OpTruncFloat64x2:
  2286  		v.Op = ssaop.OpARM64VFRINTZ2D
  2287  		return true
  2288  	case ssaop.OpTruncToInt16Int32x4:
  2289  		v.Op = ssaop.OpARM64VXTN4S
  2290  		return true
  2291  	case ssaop.OpTruncToInt32Int64x2:
  2292  		v.Op = ssaop.OpARM64VXTN2D
  2293  		return true
  2294  	case ssaop.OpTruncToInt8Int16x8:
  2295  		v.Op = ssaop.OpARM64VXTN8H
  2296  		return true
  2297  	case ssaop.OpTruncToUint16Uint32x4:
  2298  		v.Op = ssaop.OpARM64VXTN4S
  2299  		return true
  2300  	case ssaop.OpTruncToUint32Uint64x2:
  2301  		v.Op = ssaop.OpARM64VXTN2D
  2302  		return true
  2303  	case ssaop.OpTruncToUint8Uint16x8:
  2304  		v.Op = ssaop.OpARM64VXTN8H
  2305  		return true
  2306  	case ssaop.OpWB:
  2307  		v.Op = ssaop.OpARM64LoweredWB
  2308  		return true
  2309  	case ssaop.OpXor16:
  2310  		v.Op = ssaop.OpARM64XOR
  2311  		return true
  2312  	case ssaop.OpXor32:
  2313  		v.Op = ssaop.OpARM64XOR
  2314  		return true
  2315  	case ssaop.OpXor64:
  2316  		v.Op = ssaop.OpARM64XOR
  2317  		return true
  2318  	case ssaop.OpXor8:
  2319  		v.Op = ssaop.OpARM64XOR
  2320  		return true
  2321  	case ssaop.OpXorInt16x8:
  2322  		v.Op = ssaop.OpARM64VEOR16B
  2323  		return true
  2324  	case ssaop.OpXorInt32x4:
  2325  		v.Op = ssaop.OpARM64VEOR16B
  2326  		return true
  2327  	case ssaop.OpXorInt64x2:
  2328  		v.Op = ssaop.OpARM64VEOR16B
  2329  		return true
  2330  	case ssaop.OpXorInt8x16:
  2331  		v.Op = ssaop.OpARM64VEOR16B
  2332  		return true
  2333  	case ssaop.OpXorUint16x8:
  2334  		v.Op = ssaop.OpARM64VEOR16B
  2335  		return true
  2336  	case ssaop.OpXorUint32x4:
  2337  		v.Op = ssaop.OpARM64VEOR16B
  2338  		return true
  2339  	case ssaop.OpXorUint64x2:
  2340  		v.Op = ssaop.OpARM64VEOR16B
  2341  		return true
  2342  	case ssaop.OpXorUint8x16:
  2343  		v.Op = ssaop.OpARM64VEOR16B
  2344  		return true
  2345  	case ssaop.OpZero:
  2346  		return rewriteValue_OpZero(v)
  2347  	case ssaop.OpZeroExt16to32:
  2348  		v.Op = ssaop.OpARM64MOVHUreg
  2349  		return true
  2350  	case ssaop.OpZeroExt16to64:
  2351  		v.Op = ssaop.OpARM64MOVHUreg
  2352  		return true
  2353  	case ssaop.OpZeroExt32to64:
  2354  		v.Op = ssaop.OpARM64MOVWUreg
  2355  		return true
  2356  	case ssaop.OpZeroExt8to16:
  2357  		v.Op = ssaop.OpARM64MOVBUreg
  2358  		return true
  2359  	case ssaop.OpZeroExt8to32:
  2360  		v.Op = ssaop.OpARM64MOVBUreg
  2361  		return true
  2362  	case ssaop.OpZeroExt8to64:
  2363  		v.Op = ssaop.OpARM64MOVBUreg
  2364  		return true
  2365  	case ssaop.OpZeroSIMD:
  2366  		return rewriteValue_OpZeroSIMD(v)
  2367  	case ssaop.OpbitSelectInt8x16:
  2368  		v.Op = ssaop.OpARM64VBIF16B
  2369  		return true
  2370  	case ssaop.OpbitSelectNotInt8x16:
  2371  		v.Op = ssaop.OpARM64VBIT16B
  2372  		return true
  2373  	case ssaop.Opbroadcast1To16Int8x16:
  2374  		return rewriteValue_Opbroadcast1To16Int8x16(v)
  2375  	case ssaop.Opbroadcast1To16Uint8x16:
  2376  		return rewriteValue_Opbroadcast1To16Uint8x16(v)
  2377  	case ssaop.Opbroadcast1To2Float64x2:
  2378  		return rewriteValue_Opbroadcast1To2Float64x2(v)
  2379  	case ssaop.Opbroadcast1To2Int64x2:
  2380  		return rewriteValue_Opbroadcast1To2Int64x2(v)
  2381  	case ssaop.Opbroadcast1To2Uint64x2:
  2382  		return rewriteValue_Opbroadcast1To2Uint64x2(v)
  2383  	case ssaop.Opbroadcast1To4Float32x4:
  2384  		return rewriteValue_Opbroadcast1To4Float32x4(v)
  2385  	case ssaop.Opbroadcast1To4Int32x4:
  2386  		return rewriteValue_Opbroadcast1To4Int32x4(v)
  2387  	case ssaop.Opbroadcast1To4Uint32x4:
  2388  		return rewriteValue_Opbroadcast1To4Uint32x4(v)
  2389  	case ssaop.Opbroadcast1To8Int16x8:
  2390  		return rewriteValue_Opbroadcast1To8Int16x8(v)
  2391  	case ssaop.Opbroadcast1To8Uint16x8:
  2392  		return rewriteValue_Opbroadcast1To8Uint16x8(v)
  2393  	case ssaop.OpcarrylessMultiplyWidenLoUint64x2:
  2394  		v.Op = ssaop.OpARM64VPMULL2D
  2395  		return true
  2396  	case ssaop.OpreduceMaxFloat32x4:
  2397  		v.Op = ssaop.OpARM64VFMAXV4S
  2398  		return true
  2399  	case ssaop.OpreduceMaxInt16x8:
  2400  		v.Op = ssaop.OpARM64VSMAXV8H
  2401  		return true
  2402  	case ssaop.OpreduceMaxInt32x4:
  2403  		v.Op = ssaop.OpARM64VSMAXV4S
  2404  		return true
  2405  	case ssaop.OpreduceMaxInt8x16:
  2406  		v.Op = ssaop.OpARM64VSMAXV16B
  2407  		return true
  2408  	case ssaop.OpreduceMaxUint16x8:
  2409  		v.Op = ssaop.OpARM64VUMAXV8H
  2410  		return true
  2411  	case ssaop.OpreduceMaxUint32x4:
  2412  		v.Op = ssaop.OpARM64VUMAXV4S
  2413  		return true
  2414  	case ssaop.OpreduceMaxUint8x16:
  2415  		v.Op = ssaop.OpARM64VUMAXV16B
  2416  		return true
  2417  	case ssaop.OpreduceMinFloat32x4:
  2418  		v.Op = ssaop.OpARM64VFMINV4S
  2419  		return true
  2420  	case ssaop.OpreduceMinInt16x8:
  2421  		v.Op = ssaop.OpARM64VSMINV8H
  2422  		return true
  2423  	case ssaop.OpreduceMinInt32x4:
  2424  		v.Op = ssaop.OpARM64VSMINV4S
  2425  		return true
  2426  	case ssaop.OpreduceMinInt8x16:
  2427  		v.Op = ssaop.OpARM64VSMINV16B
  2428  		return true
  2429  	case ssaop.OpreduceMinUint16x8:
  2430  		v.Op = ssaop.OpARM64VUMINV8H
  2431  		return true
  2432  	case ssaop.OpreduceMinUint32x4:
  2433  		v.Op = ssaop.OpARM64VUMINV4S
  2434  		return true
  2435  	case ssaop.OpreduceMinUint8x16:
  2436  		v.Op = ssaop.OpARM64VUMINV16B
  2437  		return true
  2438  	case ssaop.OpreduceSumInt16x8:
  2439  		v.Op = ssaop.OpARM64VADDV8H
  2440  		return true
  2441  	case ssaop.OpreduceSumInt32x4:
  2442  		v.Op = ssaop.OpARM64VADDV4S
  2443  		return true
  2444  	case ssaop.OpreduceSumInt8x16:
  2445  		v.Op = ssaop.OpARM64VADDV16B
  2446  		return true
  2447  	case ssaop.OpreduceSumUint16x8:
  2448  		v.Op = ssaop.OpARM64VADDV8H
  2449  		return true
  2450  	case ssaop.OpreduceSumUint32x4:
  2451  		v.Op = ssaop.OpARM64VADDV4S
  2452  		return true
  2453  	case ssaop.OpreduceSumUint8x16:
  2454  		v.Op = ssaop.OpARM64VADDV16B
  2455  		return true
  2456  	}
  2457  	return false
  2458  }
  2459  func rewriteValue_OpARM64ADCSflags(v *ssa.Value) bool {
  2460  	v_2 := v.Args[2]
  2461  	v_1 := v.Args[1]
  2462  	v_0 := v.Args[0]
  2463  	b := v.Block
  2464  	typ := &b.Func.Config.Types
  2465  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (ADCzerocarry <typ.UInt64> c))))
  2466  	// result: (ADCSflags x y c)
  2467  	for {
  2468  		x := v_0
  2469  		y := v_1
  2470  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
  2471  			break
  2472  		}
  2473  		v_2_0 := v_2.Args[0]
  2474  		if v_2_0.Op != ssaop.OpARM64ADDSconstflags || ssa.AuxIntToInt64(v_2_0.AuxInt) != -1 {
  2475  			break
  2476  		}
  2477  		v_2_0_0 := v_2_0.Args[0]
  2478  		if v_2_0_0.Op != ssaop.OpARM64ADCzerocarry || v_2_0_0.Type != typ.UInt64 {
  2479  			break
  2480  		}
  2481  		c := v_2_0_0.Args[0]
  2482  		v.Reset(ssaop.OpARM64ADCSflags)
  2483  		v.AddArg3(x, y, c)
  2484  		return true
  2485  	}
  2486  	// match: (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] (MOVDconst [0]))))
  2487  	// result: (ADDSflags x y)
  2488  	for {
  2489  		x := v_0
  2490  		y := v_1
  2491  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
  2492  			break
  2493  		}
  2494  		v_2_0 := v_2.Args[0]
  2495  		if v_2_0.Op != ssaop.OpARM64ADDSconstflags || ssa.AuxIntToInt64(v_2_0.AuxInt) != -1 {
  2496  			break
  2497  		}
  2498  		v_2_0_0 := v_2_0.Args[0]
  2499  		if v_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2_0_0.AuxInt) != 0 {
  2500  			break
  2501  		}
  2502  		v.Reset(ssaop.OpARM64ADDSflags)
  2503  		v.AddArg2(x, y)
  2504  		return true
  2505  	}
  2506  	return false
  2507  }
  2508  func rewriteValue_OpARM64ADD(v *ssa.Value) bool {
  2509  	v_1 := v.Args[1]
  2510  	v_0 := v.Args[0]
  2511  	b := v.Block
  2512  	// match: (ADD x (MOVDconst <t> [c]))
  2513  	// cond: !t.IsPtr()
  2514  	// result: (ADDconst [c] x)
  2515  	for {
  2516  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2517  			x := v_0
  2518  			if v_1.Op != ssaop.OpARM64MOVDconst {
  2519  				continue
  2520  			}
  2521  			t := v_1.Type
  2522  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  2523  			if !(!t.IsPtr()) {
  2524  				continue
  2525  			}
  2526  			v.Reset(ssaop.OpARM64ADDconst)
  2527  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2528  			v.AddArg(x)
  2529  			return true
  2530  		}
  2531  		break
  2532  	}
  2533  	// match: (ADD a l:(MUL x y))
  2534  	// cond: l.Uses==1 && ssa.Clobber(l)
  2535  	// result: (MADD a x y)
  2536  	for {
  2537  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2538  			a := v_0
  2539  			l := v_1
  2540  			if l.Op != ssaop.OpARM64MUL {
  2541  				continue
  2542  			}
  2543  			y := l.Args[1]
  2544  			x := l.Args[0]
  2545  			if !(l.Uses == 1 && ssa.Clobber(l)) {
  2546  				continue
  2547  			}
  2548  			v.Reset(ssaop.OpARM64MADD)
  2549  			v.AddArg3(a, x, y)
  2550  			return true
  2551  		}
  2552  		break
  2553  	}
  2554  	// match: (ADD a l:(MNEG x y))
  2555  	// cond: l.Uses==1 && ssa.Clobber(l)
  2556  	// result: (MSUB a x y)
  2557  	for {
  2558  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2559  			a := v_0
  2560  			l := v_1
  2561  			if l.Op != ssaop.OpARM64MNEG {
  2562  				continue
  2563  			}
  2564  			y := l.Args[1]
  2565  			x := l.Args[0]
  2566  			if !(l.Uses == 1 && ssa.Clobber(l)) {
  2567  				continue
  2568  			}
  2569  			v.Reset(ssaop.OpARM64MSUB)
  2570  			v.AddArg3(a, x, y)
  2571  			return true
  2572  		}
  2573  		break
  2574  	}
  2575  	// match: (ADD a l:(MULW x y))
  2576  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
  2577  	// result: (MADDW a x y)
  2578  	for {
  2579  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2580  			a := v_0
  2581  			l := v_1
  2582  			if l.Op != ssaop.OpARM64MULW {
  2583  				continue
  2584  			}
  2585  			y := l.Args[1]
  2586  			x := l.Args[0]
  2587  			if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
  2588  				continue
  2589  			}
  2590  			v.Reset(ssaop.OpARM64MADDW)
  2591  			v.AddArg3(a, x, y)
  2592  			return true
  2593  		}
  2594  		break
  2595  	}
  2596  	// match: (ADD a l:(MNEGW x y))
  2597  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
  2598  	// result: (MSUBW a x y)
  2599  	for {
  2600  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2601  			a := v_0
  2602  			l := v_1
  2603  			if l.Op != ssaop.OpARM64MNEGW {
  2604  				continue
  2605  			}
  2606  			y := l.Args[1]
  2607  			x := l.Args[0]
  2608  			if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
  2609  				continue
  2610  			}
  2611  			v.Reset(ssaop.OpARM64MSUBW)
  2612  			v.AddArg3(a, x, y)
  2613  			return true
  2614  		}
  2615  		break
  2616  	}
  2617  	// match: (ADD <t> a p:(ADDconst [c] m:(MUL _ _)))
  2618  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2619  	// result: (ADDconst [c] (ADD <v.Type> a m))
  2620  	for {
  2621  		t := v.Type
  2622  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2623  			a := v_0
  2624  			p := v_1
  2625  			if p.Op != ssaop.OpARM64ADDconst {
  2626  				continue
  2627  			}
  2628  			c := ssa.AuxIntToInt64(p.AuxInt)
  2629  			m := p.Args[0]
  2630  			if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2631  				continue
  2632  			}
  2633  			v.Reset(ssaop.OpARM64ADDconst)
  2634  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2635  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2636  			v0.AddArg2(a, m)
  2637  			v.AddArg(v0)
  2638  			return true
  2639  		}
  2640  		break
  2641  	}
  2642  	// match: (ADD <t> a p:(ADDconst [c] m:(MULW _ _)))
  2643  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2644  	// result: (ADDconst [c] (ADD <v.Type> a m))
  2645  	for {
  2646  		t := v.Type
  2647  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2648  			a := v_0
  2649  			p := v_1
  2650  			if p.Op != ssaop.OpARM64ADDconst {
  2651  				continue
  2652  			}
  2653  			c := ssa.AuxIntToInt64(p.AuxInt)
  2654  			m := p.Args[0]
  2655  			if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2656  				continue
  2657  			}
  2658  			v.Reset(ssaop.OpARM64ADDconst)
  2659  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2660  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2661  			v0.AddArg2(a, m)
  2662  			v.AddArg(v0)
  2663  			return true
  2664  		}
  2665  		break
  2666  	}
  2667  	// match: (ADD <t> a p:(ADDconst [c] m:(MNEG _ _)))
  2668  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2669  	// result: (ADDconst [c] (ADD <v.Type> a m))
  2670  	for {
  2671  		t := v.Type
  2672  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2673  			a := v_0
  2674  			p := v_1
  2675  			if p.Op != ssaop.OpARM64ADDconst {
  2676  				continue
  2677  			}
  2678  			c := ssa.AuxIntToInt64(p.AuxInt)
  2679  			m := p.Args[0]
  2680  			if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2681  				continue
  2682  			}
  2683  			v.Reset(ssaop.OpARM64ADDconst)
  2684  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2685  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2686  			v0.AddArg2(a, m)
  2687  			v.AddArg(v0)
  2688  			return true
  2689  		}
  2690  		break
  2691  	}
  2692  	// match: (ADD <t> a p:(ADDconst [c] m:(MNEGW _ _)))
  2693  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2694  	// result: (ADDconst [c] (ADD <v.Type> a m))
  2695  	for {
  2696  		t := v.Type
  2697  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2698  			a := v_0
  2699  			p := v_1
  2700  			if p.Op != ssaop.OpARM64ADDconst {
  2701  				continue
  2702  			}
  2703  			c := ssa.AuxIntToInt64(p.AuxInt)
  2704  			m := p.Args[0]
  2705  			if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2706  				continue
  2707  			}
  2708  			v.Reset(ssaop.OpARM64ADDconst)
  2709  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2710  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2711  			v0.AddArg2(a, m)
  2712  			v.AddArg(v0)
  2713  			return true
  2714  		}
  2715  		break
  2716  	}
  2717  	// match: (ADD <t> a p:(SUBconst [c] m:(MUL _ _)))
  2718  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2719  	// result: (SUBconst [c] (ADD <v.Type> a m))
  2720  	for {
  2721  		t := v.Type
  2722  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2723  			a := v_0
  2724  			p := v_1
  2725  			if p.Op != ssaop.OpARM64SUBconst {
  2726  				continue
  2727  			}
  2728  			c := ssa.AuxIntToInt64(p.AuxInt)
  2729  			m := p.Args[0]
  2730  			if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2731  				continue
  2732  			}
  2733  			v.Reset(ssaop.OpARM64SUBconst)
  2734  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2735  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2736  			v0.AddArg2(a, m)
  2737  			v.AddArg(v0)
  2738  			return true
  2739  		}
  2740  		break
  2741  	}
  2742  	// match: (ADD <t> a p:(SUBconst [c] m:(MULW _ _)))
  2743  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2744  	// result: (SUBconst [c] (ADD <v.Type> a m))
  2745  	for {
  2746  		t := v.Type
  2747  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2748  			a := v_0
  2749  			p := v_1
  2750  			if p.Op != ssaop.OpARM64SUBconst {
  2751  				continue
  2752  			}
  2753  			c := ssa.AuxIntToInt64(p.AuxInt)
  2754  			m := p.Args[0]
  2755  			if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2756  				continue
  2757  			}
  2758  			v.Reset(ssaop.OpARM64SUBconst)
  2759  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2760  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2761  			v0.AddArg2(a, m)
  2762  			v.AddArg(v0)
  2763  			return true
  2764  		}
  2765  		break
  2766  	}
  2767  	// match: (ADD <t> a p:(SUBconst [c] m:(MNEG _ _)))
  2768  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2769  	// result: (SUBconst [c] (ADD <v.Type> a m))
  2770  	for {
  2771  		t := v.Type
  2772  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2773  			a := v_0
  2774  			p := v_1
  2775  			if p.Op != ssaop.OpARM64SUBconst {
  2776  				continue
  2777  			}
  2778  			c := ssa.AuxIntToInt64(p.AuxInt)
  2779  			m := p.Args[0]
  2780  			if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2781  				continue
  2782  			}
  2783  			v.Reset(ssaop.OpARM64SUBconst)
  2784  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2785  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2786  			v0.AddArg2(a, m)
  2787  			v.AddArg(v0)
  2788  			return true
  2789  		}
  2790  		break
  2791  	}
  2792  	// match: (ADD <t> a p:(SUBconst [c] m:(MNEGW _ _)))
  2793  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
  2794  	// result: (SUBconst [c] (ADD <v.Type> a m))
  2795  	for {
  2796  		t := v.Type
  2797  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2798  			a := v_0
  2799  			p := v_1
  2800  			if p.Op != ssaop.OpARM64SUBconst {
  2801  				continue
  2802  			}
  2803  			c := ssa.AuxIntToInt64(p.AuxInt)
  2804  			m := p.Args[0]
  2805  			if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
  2806  				continue
  2807  			}
  2808  			v.Reset(ssaop.OpARM64SUBconst)
  2809  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2810  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
  2811  			v0.AddArg2(a, m)
  2812  			v.AddArg(v0)
  2813  			return true
  2814  		}
  2815  		break
  2816  	}
  2817  	// match: (ADD x (NEG y))
  2818  	// result: (SUB x y)
  2819  	for {
  2820  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2821  			x := v_0
  2822  			if v_1.Op != ssaop.OpARM64NEG {
  2823  				continue
  2824  			}
  2825  			y := v_1.Args[0]
  2826  			v.Reset(ssaop.OpARM64SUB)
  2827  			v.AddArg2(x, y)
  2828  			return true
  2829  		}
  2830  		break
  2831  	}
  2832  	// match: (ADD x0 x1:(SLLconst [c] y))
  2833  	// cond: ssa.ClobberIfDead(x1)
  2834  	// result: (ADDshiftLL x0 y [c])
  2835  	for {
  2836  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2837  			x0 := v_0
  2838  			x1 := v_1
  2839  			if x1.Op != ssaop.OpARM64SLLconst {
  2840  				continue
  2841  			}
  2842  			c := ssa.AuxIntToInt64(x1.AuxInt)
  2843  			y := x1.Args[0]
  2844  			if !(ssa.ClobberIfDead(x1)) {
  2845  				continue
  2846  			}
  2847  			v.Reset(ssaop.OpARM64ADDshiftLL)
  2848  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2849  			v.AddArg2(x0, y)
  2850  			return true
  2851  		}
  2852  		break
  2853  	}
  2854  	// match: (ADD x0 x1:(SRLconst [c] y))
  2855  	// cond: ssa.ClobberIfDead(x1)
  2856  	// result: (ADDshiftRL x0 y [c])
  2857  	for {
  2858  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2859  			x0 := v_0
  2860  			x1 := v_1
  2861  			if x1.Op != ssaop.OpARM64SRLconst {
  2862  				continue
  2863  			}
  2864  			c := ssa.AuxIntToInt64(x1.AuxInt)
  2865  			y := x1.Args[0]
  2866  			if !(ssa.ClobberIfDead(x1)) {
  2867  				continue
  2868  			}
  2869  			v.Reset(ssaop.OpARM64ADDshiftRL)
  2870  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2871  			v.AddArg2(x0, y)
  2872  			return true
  2873  		}
  2874  		break
  2875  	}
  2876  	// match: (ADD x0 x1:(SRAconst [c] y))
  2877  	// cond: ssa.ClobberIfDead(x1)
  2878  	// result: (ADDshiftRA x0 y [c])
  2879  	for {
  2880  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2881  			x0 := v_0
  2882  			x1 := v_1
  2883  			if x1.Op != ssaop.OpARM64SRAconst {
  2884  				continue
  2885  			}
  2886  			c := ssa.AuxIntToInt64(x1.AuxInt)
  2887  			y := x1.Args[0]
  2888  			if !(ssa.ClobberIfDead(x1)) {
  2889  				continue
  2890  			}
  2891  			v.Reset(ssaop.OpARM64ADDshiftRA)
  2892  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2893  			v.AddArg2(x0, y)
  2894  			return true
  2895  		}
  2896  		break
  2897  	}
  2898  	// match: (ADD x0 x1:(ANDshiftRA x2:(SLLconst [sl] y) z [63]))
  2899  	// cond: x1.Uses == 1 && x2.Uses == 1
  2900  	// result: (ADDshiftLL x0 (ANDshiftRA <y.Type> y z [63]) [sl])
  2901  	for {
  2902  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2903  			x0 := v_0
  2904  			x1 := v_1
  2905  			if x1.Op != ssaop.OpARM64ANDshiftRA || ssa.AuxIntToInt64(x1.AuxInt) != 63 {
  2906  				continue
  2907  			}
  2908  			z := x1.Args[1]
  2909  			x2 := x1.Args[0]
  2910  			if x2.Op != ssaop.OpARM64SLLconst {
  2911  				continue
  2912  			}
  2913  			sl := ssa.AuxIntToInt64(x2.AuxInt)
  2914  			y := x2.Args[0]
  2915  			if !(x1.Uses == 1 && x2.Uses == 1) {
  2916  				continue
  2917  			}
  2918  			v.Reset(ssaop.OpARM64ADDshiftLL)
  2919  			v.AuxInt = ssa.Int64ToAuxInt(sl)
  2920  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDshiftRA, y.Type)
  2921  			v0.AuxInt = ssa.Int64ToAuxInt(63)
  2922  			v0.AddArg2(y, z)
  2923  			v.AddArg2(x0, v0)
  2924  			return true
  2925  		}
  2926  		break
  2927  	}
  2928  	// match: (ADD x0 x1:(ANDshiftLL x2:(SRAconst [63] z) y [sl]))
  2929  	// cond: x1.Uses == 1 && x2.Uses == 1
  2930  	// result: (ADDshiftLL x0 (ANDshiftRA <y.Type> y z [63]) [sl])
  2931  	for {
  2932  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2933  			x0 := v_0
  2934  			x1 := v_1
  2935  			if x1.Op != ssaop.OpARM64ANDshiftLL {
  2936  				continue
  2937  			}
  2938  			sl := ssa.AuxIntToInt64(x1.AuxInt)
  2939  			y := x1.Args[1]
  2940  			x2 := x1.Args[0]
  2941  			if x2.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(x2.AuxInt) != 63 {
  2942  				continue
  2943  			}
  2944  			z := x2.Args[0]
  2945  			if !(x1.Uses == 1 && x2.Uses == 1) {
  2946  				continue
  2947  			}
  2948  			v.Reset(ssaop.OpARM64ADDshiftLL)
  2949  			v.AuxInt = ssa.Int64ToAuxInt(sl)
  2950  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDshiftRA, y.Type)
  2951  			v0.AuxInt = ssa.Int64ToAuxInt(63)
  2952  			v0.AddArg2(y, z)
  2953  			v.AddArg2(x0, v0)
  2954  			return true
  2955  		}
  2956  		break
  2957  	}
  2958  	return false
  2959  }
  2960  func rewriteValue_OpARM64ADDSflags(v *ssa.Value) bool {
  2961  	v_1 := v.Args[1]
  2962  	v_0 := v.Args[0]
  2963  	// match: (ADDSflags x (MOVDconst [c]))
  2964  	// result: (ADDSconstflags [c] x)
  2965  	for {
  2966  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  2967  			x := v_0
  2968  			if v_1.Op != ssaop.OpARM64MOVDconst {
  2969  				continue
  2970  			}
  2971  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  2972  			v.Reset(ssaop.OpARM64ADDSconstflags)
  2973  			v.AuxInt = ssa.Int64ToAuxInt(c)
  2974  			v.AddArg(x)
  2975  			return true
  2976  		}
  2977  		break
  2978  	}
  2979  	return false
  2980  }
  2981  func rewriteValue_OpARM64ADDconst(v *ssa.Value) bool {
  2982  	v_0 := v.Args[0]
  2983  	// match: (ADDconst [off1] (MOVDaddr [off2] {sym} ptr))
  2984  	// cond: ssa.Is32Bit(off1+int64(off2))
  2985  	// result: (MOVDaddr [int32(off1)+off2] {sym} ptr)
  2986  	for {
  2987  		off1 := ssa.AuxIntToInt64(v.AuxInt)
  2988  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  2989  			break
  2990  		}
  2991  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  2992  		sym := ssa.AuxToSym(v_0.Aux)
  2993  		ptr := v_0.Args[0]
  2994  		if !(ssa.Is32Bit(off1 + int64(off2))) {
  2995  			break
  2996  		}
  2997  		v.Reset(ssaop.OpARM64MOVDaddr)
  2998  		v.AuxInt = ssa.Int32ToAuxInt(int32(off1) + off2)
  2999  		v.Aux = ssa.SymToAux(sym)
  3000  		v.AddArg(ptr)
  3001  		return true
  3002  	}
  3003  	// match: (ADDconst [c] y)
  3004  	// cond: c < 0
  3005  	// result: (SUBconst [-c] y)
  3006  	for {
  3007  		c := ssa.AuxIntToInt64(v.AuxInt)
  3008  		y := v_0
  3009  		if !(c < 0) {
  3010  			break
  3011  		}
  3012  		v.Reset(ssaop.OpARM64SUBconst)
  3013  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  3014  		v.AddArg(y)
  3015  		return true
  3016  	}
  3017  	// match: (ADDconst [0] x)
  3018  	// result: x
  3019  	for {
  3020  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  3021  			break
  3022  		}
  3023  		x := v_0
  3024  		v.CopyOf(x)
  3025  		return true
  3026  	}
  3027  	// match: (ADDconst [c] (MOVDconst [d]))
  3028  	// result: (MOVDconst [c+d])
  3029  	for {
  3030  		c := ssa.AuxIntToInt64(v.AuxInt)
  3031  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3032  			break
  3033  		}
  3034  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3035  		v.Reset(ssaop.OpARM64MOVDconst)
  3036  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  3037  		return true
  3038  	}
  3039  	// match: (ADDconst [c] (ADDconst [d] x))
  3040  	// result: (ADDconst [c+d] x)
  3041  	for {
  3042  		c := ssa.AuxIntToInt64(v.AuxInt)
  3043  		if v_0.Op != ssaop.OpARM64ADDconst {
  3044  			break
  3045  		}
  3046  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3047  		x := v_0.Args[0]
  3048  		v.Reset(ssaop.OpARM64ADDconst)
  3049  		v.AuxInt = ssa.Int64ToAuxInt(c + d)
  3050  		v.AddArg(x)
  3051  		return true
  3052  	}
  3053  	// match: (ADDconst [c] (SUBconst [d] x))
  3054  	// result: (ADDconst [c-d] x)
  3055  	for {
  3056  		c := ssa.AuxIntToInt64(v.AuxInt)
  3057  		if v_0.Op != ssaop.OpARM64SUBconst {
  3058  			break
  3059  		}
  3060  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3061  		x := v_0.Args[0]
  3062  		v.Reset(ssaop.OpARM64ADDconst)
  3063  		v.AuxInt = ssa.Int64ToAuxInt(c - d)
  3064  		v.AddArg(x)
  3065  		return true
  3066  	}
  3067  	return false
  3068  }
  3069  func rewriteValue_OpARM64ADDshiftLL(v *ssa.Value) bool {
  3070  	v_1 := v.Args[1]
  3071  	v_0 := v.Args[0]
  3072  	b := v.Block
  3073  	typ := &b.Func.Config.Types
  3074  	// match: (ADDshiftLL (MOVDconst [c]) x [d])
  3075  	// result: (ADDconst [c] (SLLconst <x.Type> x [d]))
  3076  	for {
  3077  		d := ssa.AuxIntToInt64(v.AuxInt)
  3078  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3079  			break
  3080  		}
  3081  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3082  		x := v_1
  3083  		v.Reset(ssaop.OpARM64ADDconst)
  3084  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3085  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  3086  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3087  		v0.AddArg(x)
  3088  		v.AddArg(v0)
  3089  		return true
  3090  	}
  3091  	// match: (ADDshiftLL x (MOVDconst [c]) [d])
  3092  	// result: (ADDconst x [int64(uint64(c)<<uint64(d))])
  3093  	for {
  3094  		d := ssa.AuxIntToInt64(v.AuxInt)
  3095  		x := v_0
  3096  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3097  			break
  3098  		}
  3099  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3100  		v.Reset(ssaop.OpARM64ADDconst)
  3101  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  3102  		v.AddArg(x)
  3103  		return true
  3104  	}
  3105  	// match: (ADDshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
  3106  	// result: (REV16W x)
  3107  	for {
  3108  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
  3109  			break
  3110  		}
  3111  		x := v_0.Args[0]
  3112  		if x != v_1 {
  3113  			break
  3114  		}
  3115  		v.Reset(ssaop.OpARM64REV16W)
  3116  		v.AddArg(x)
  3117  		return true
  3118  	}
  3119  	// match: (ADDshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
  3120  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
  3121  	// result: (REV16W x)
  3122  	for {
  3123  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
  3124  			break
  3125  		}
  3126  		v_0_0 := v_0.Args[0]
  3127  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3128  			break
  3129  		}
  3130  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3131  		x := v_0_0.Args[0]
  3132  		if v_1.Op != ssaop.OpARM64ANDconst {
  3133  			break
  3134  		}
  3135  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3136  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
  3137  			break
  3138  		}
  3139  		v.Reset(ssaop.OpARM64REV16W)
  3140  		v.AddArg(x)
  3141  		return true
  3142  	}
  3143  	// match: (ADDshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
  3144  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
  3145  	// result: (REV16 x)
  3146  	for {
  3147  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
  3148  			break
  3149  		}
  3150  		v_0_0 := v_0.Args[0]
  3151  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3152  			break
  3153  		}
  3154  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3155  		x := v_0_0.Args[0]
  3156  		if v_1.Op != ssaop.OpARM64ANDconst {
  3157  			break
  3158  		}
  3159  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3160  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
  3161  			break
  3162  		}
  3163  		v.Reset(ssaop.OpARM64REV16)
  3164  		v.AddArg(x)
  3165  		return true
  3166  	}
  3167  	// match: (ADDshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
  3168  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
  3169  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
  3170  	for {
  3171  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
  3172  			break
  3173  		}
  3174  		v_0_0 := v_0.Args[0]
  3175  		if v_0_0.Op != ssaop.OpARM64ANDconst {
  3176  			break
  3177  		}
  3178  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
  3179  		x := v_0_0.Args[0]
  3180  		if v_1.Op != ssaop.OpARM64ANDconst {
  3181  			break
  3182  		}
  3183  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
  3184  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
  3185  			break
  3186  		}
  3187  		v.Reset(ssaop.OpARM64REV16)
  3188  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
  3189  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
  3190  		v0.AddArg(x)
  3191  		v.AddArg(v0)
  3192  		return true
  3193  	}
  3194  	// match: (ADDshiftLL [c] (SRLconst x [64-c]) x2)
  3195  	// result: (EXTRconst [64-c] x2 x)
  3196  	for {
  3197  		c := ssa.AuxIntToInt64(v.AuxInt)
  3198  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
  3199  			break
  3200  		}
  3201  		x := v_0.Args[0]
  3202  		x2 := v_1
  3203  		v.Reset(ssaop.OpARM64EXTRconst)
  3204  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
  3205  		v.AddArg2(x2, x)
  3206  		return true
  3207  	}
  3208  	// match: (ADDshiftLL <t> [c] (UBFX [bfc] x) x2)
  3209  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
  3210  	// result: (EXTRWconst [32-c] x2 x)
  3211  	for {
  3212  		t := v.Type
  3213  		c := ssa.AuxIntToInt64(v.AuxInt)
  3214  		if v_0.Op != ssaop.OpARM64UBFX {
  3215  			break
  3216  		}
  3217  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
  3218  		x := v_0.Args[0]
  3219  		x2 := v_1
  3220  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
  3221  			break
  3222  		}
  3223  		v.Reset(ssaop.OpARM64EXTRWconst)
  3224  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
  3225  		v.AddArg2(x2, x)
  3226  		return true
  3227  	}
  3228  	return false
  3229  }
  3230  func rewriteValue_OpARM64ADDshiftRA(v *ssa.Value) bool {
  3231  	v_1 := v.Args[1]
  3232  	v_0 := v.Args[0]
  3233  	b := v.Block
  3234  	// match: (ADDshiftRA (MOVDconst [c]) x [d])
  3235  	// result: (ADDconst [c] (SRAconst <x.Type> x [d]))
  3236  	for {
  3237  		d := ssa.AuxIntToInt64(v.AuxInt)
  3238  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3239  			break
  3240  		}
  3241  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3242  		x := v_1
  3243  		v.Reset(ssaop.OpARM64ADDconst)
  3244  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3245  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  3246  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3247  		v0.AddArg(x)
  3248  		v.AddArg(v0)
  3249  		return true
  3250  	}
  3251  	// match: (ADDshiftRA x (MOVDconst [c]) [d])
  3252  	// result: (ADDconst x [c>>uint64(d)])
  3253  	for {
  3254  		d := ssa.AuxIntToInt64(v.AuxInt)
  3255  		x := v_0
  3256  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3257  			break
  3258  		}
  3259  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3260  		v.Reset(ssaop.OpARM64ADDconst)
  3261  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  3262  		v.AddArg(x)
  3263  		return true
  3264  	}
  3265  	return false
  3266  }
  3267  func rewriteValue_OpARM64ADDshiftRL(v *ssa.Value) bool {
  3268  	v_1 := v.Args[1]
  3269  	v_0 := v.Args[0]
  3270  	b := v.Block
  3271  	// match: (ADDshiftRL (MOVDconst [c]) x [d])
  3272  	// result: (ADDconst [c] (SRLconst <x.Type> x [d]))
  3273  	for {
  3274  		d := ssa.AuxIntToInt64(v.AuxInt)
  3275  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3276  			break
  3277  		}
  3278  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3279  		x := v_1
  3280  		v.Reset(ssaop.OpARM64ADDconst)
  3281  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3282  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  3283  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3284  		v0.AddArg(x)
  3285  		v.AddArg(v0)
  3286  		return true
  3287  	}
  3288  	// match: (ADDshiftRL x (MOVDconst [c]) [d])
  3289  	// result: (ADDconst x [int64(uint64(c)>>uint64(d))])
  3290  	for {
  3291  		d := ssa.AuxIntToInt64(v.AuxInt)
  3292  		x := v_0
  3293  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3294  			break
  3295  		}
  3296  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3297  		v.Reset(ssaop.OpARM64ADDconst)
  3298  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  3299  		v.AddArg(x)
  3300  		return true
  3301  	}
  3302  	return false
  3303  }
  3304  func rewriteValue_OpARM64AND(v *ssa.Value) bool {
  3305  	v_1 := v.Args[1]
  3306  	v_0 := v.Args[0]
  3307  	// match: (AND x (MOVDconst [c]))
  3308  	// result: (ANDconst [c] x)
  3309  	for {
  3310  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3311  			x := v_0
  3312  			if v_1.Op != ssaop.OpARM64MOVDconst {
  3313  				continue
  3314  			}
  3315  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  3316  			v.Reset(ssaop.OpARM64ANDconst)
  3317  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3318  			v.AddArg(x)
  3319  			return true
  3320  		}
  3321  		break
  3322  	}
  3323  	// match: (AND x x)
  3324  	// result: x
  3325  	for {
  3326  		x := v_0
  3327  		if x != v_1 {
  3328  			break
  3329  		}
  3330  		v.CopyOf(x)
  3331  		return true
  3332  	}
  3333  	// match: (AND x (MVN y))
  3334  	// result: (BIC x y)
  3335  	for {
  3336  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3337  			x := v_0
  3338  			if v_1.Op != ssaop.OpARM64MVN {
  3339  				continue
  3340  			}
  3341  			y := v_1.Args[0]
  3342  			v.Reset(ssaop.OpARM64BIC)
  3343  			v.AddArg2(x, y)
  3344  			return true
  3345  		}
  3346  		break
  3347  	}
  3348  	// match: (AND x0 x1:(SLLconst [c] y))
  3349  	// cond: ssa.ClobberIfDead(x1)
  3350  	// result: (ANDshiftLL x0 y [c])
  3351  	for {
  3352  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3353  			x0 := v_0
  3354  			x1 := v_1
  3355  			if x1.Op != ssaop.OpARM64SLLconst {
  3356  				continue
  3357  			}
  3358  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3359  			y := x1.Args[0]
  3360  			if !(ssa.ClobberIfDead(x1)) {
  3361  				continue
  3362  			}
  3363  			v.Reset(ssaop.OpARM64ANDshiftLL)
  3364  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3365  			v.AddArg2(x0, y)
  3366  			return true
  3367  		}
  3368  		break
  3369  	}
  3370  	// match: (AND x0 x1:(SRLconst [c] y))
  3371  	// cond: ssa.ClobberIfDead(x1)
  3372  	// result: (ANDshiftRL x0 y [c])
  3373  	for {
  3374  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3375  			x0 := v_0
  3376  			x1 := v_1
  3377  			if x1.Op != ssaop.OpARM64SRLconst {
  3378  				continue
  3379  			}
  3380  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3381  			y := x1.Args[0]
  3382  			if !(ssa.ClobberIfDead(x1)) {
  3383  				continue
  3384  			}
  3385  			v.Reset(ssaop.OpARM64ANDshiftRL)
  3386  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3387  			v.AddArg2(x0, y)
  3388  			return true
  3389  		}
  3390  		break
  3391  	}
  3392  	// match: (AND x0 x1:(SRAconst [c] y))
  3393  	// cond: ssa.ClobberIfDead(x1)
  3394  	// result: (ANDshiftRA x0 y [c])
  3395  	for {
  3396  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3397  			x0 := v_0
  3398  			x1 := v_1
  3399  			if x1.Op != ssaop.OpARM64SRAconst {
  3400  				continue
  3401  			}
  3402  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3403  			y := x1.Args[0]
  3404  			if !(ssa.ClobberIfDead(x1)) {
  3405  				continue
  3406  			}
  3407  			v.Reset(ssaop.OpARM64ANDshiftRA)
  3408  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3409  			v.AddArg2(x0, y)
  3410  			return true
  3411  		}
  3412  		break
  3413  	}
  3414  	// match: (AND x0 x1:(RORconst [c] y))
  3415  	// cond: ssa.ClobberIfDead(x1)
  3416  	// result: (ANDshiftRO x0 y [c])
  3417  	for {
  3418  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  3419  			x0 := v_0
  3420  			x1 := v_1
  3421  			if x1.Op != ssaop.OpARM64RORconst {
  3422  				continue
  3423  			}
  3424  			c := ssa.AuxIntToInt64(x1.AuxInt)
  3425  			y := x1.Args[0]
  3426  			if !(ssa.ClobberIfDead(x1)) {
  3427  				continue
  3428  			}
  3429  			v.Reset(ssaop.OpARM64ANDshiftRO)
  3430  			v.AuxInt = ssa.Int64ToAuxInt(c)
  3431  			v.AddArg2(x0, y)
  3432  			return true
  3433  		}
  3434  		break
  3435  	}
  3436  	return false
  3437  }
  3438  func rewriteValue_OpARM64ANDconst(v *ssa.Value) bool {
  3439  	v_0 := v.Args[0]
  3440  	// match: (ANDconst [0] _)
  3441  	// result: (MOVDconst [0])
  3442  	for {
  3443  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
  3444  			break
  3445  		}
  3446  		v.Reset(ssaop.OpARM64MOVDconst)
  3447  		v.AuxInt = ssa.Int64ToAuxInt(0)
  3448  		return true
  3449  	}
  3450  	// match: (ANDconst [-1] x)
  3451  	// result: x
  3452  	for {
  3453  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
  3454  			break
  3455  		}
  3456  		x := v_0
  3457  		v.CopyOf(x)
  3458  		return true
  3459  	}
  3460  	// match: (ANDconst [c] (MOVDconst [d]))
  3461  	// result: (MOVDconst [c&d])
  3462  	for {
  3463  		c := ssa.AuxIntToInt64(v.AuxInt)
  3464  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3465  			break
  3466  		}
  3467  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3468  		v.Reset(ssaop.OpARM64MOVDconst)
  3469  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  3470  		return true
  3471  	}
  3472  	// match: (ANDconst [c] (ANDconst [d] x))
  3473  	// result: (ANDconst [c&d] x)
  3474  	for {
  3475  		c := ssa.AuxIntToInt64(v.AuxInt)
  3476  		if v_0.Op != ssaop.OpARM64ANDconst {
  3477  			break
  3478  		}
  3479  		d := ssa.AuxIntToInt64(v_0.AuxInt)
  3480  		x := v_0.Args[0]
  3481  		v.Reset(ssaop.OpARM64ANDconst)
  3482  		v.AuxInt = ssa.Int64ToAuxInt(c & d)
  3483  		v.AddArg(x)
  3484  		return true
  3485  	}
  3486  	// match: (ANDconst [c] (MOVWUreg x))
  3487  	// result: (ANDconst [c&(1<<32-1)] x)
  3488  	for {
  3489  		c := ssa.AuxIntToInt64(v.AuxInt)
  3490  		if v_0.Op != ssaop.OpARM64MOVWUreg {
  3491  			break
  3492  		}
  3493  		x := v_0.Args[0]
  3494  		v.Reset(ssaop.OpARM64ANDconst)
  3495  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<32 - 1))
  3496  		v.AddArg(x)
  3497  		return true
  3498  	}
  3499  	// match: (ANDconst [c] (MOVHUreg x))
  3500  	// result: (ANDconst [c&(1<<16-1)] x)
  3501  	for {
  3502  		c := ssa.AuxIntToInt64(v.AuxInt)
  3503  		if v_0.Op != ssaop.OpARM64MOVHUreg {
  3504  			break
  3505  		}
  3506  		x := v_0.Args[0]
  3507  		v.Reset(ssaop.OpARM64ANDconst)
  3508  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<16 - 1))
  3509  		v.AddArg(x)
  3510  		return true
  3511  	}
  3512  	// match: (ANDconst [c] (MOVBUreg x))
  3513  	// result: (ANDconst [c&(1<<8-1)] x)
  3514  	for {
  3515  		c := ssa.AuxIntToInt64(v.AuxInt)
  3516  		if v_0.Op != ssaop.OpARM64MOVBUreg {
  3517  			break
  3518  		}
  3519  		x := v_0.Args[0]
  3520  		v.Reset(ssaop.OpARM64ANDconst)
  3521  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<8 - 1))
  3522  		v.AddArg(x)
  3523  		return true
  3524  	}
  3525  	// match: (ANDconst [ac] (SLLconst [sc] x))
  3526  	// cond: isARM64BFMask(sc, ac, sc)
  3527  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
  3528  	for {
  3529  		ac := ssa.AuxIntToInt64(v.AuxInt)
  3530  		if v_0.Op != ssaop.OpARM64SLLconst {
  3531  			break
  3532  		}
  3533  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
  3534  		x := v_0.Args[0]
  3535  		if !(isARM64BFMask(sc, ac, sc)) {
  3536  			break
  3537  		}
  3538  		v.Reset(ssaop.OpARM64UBFIZ)
  3539  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc)))
  3540  		v.AddArg(x)
  3541  		return true
  3542  	}
  3543  	// match: (ANDconst [ac] (SRLconst [sc] x))
  3544  	// cond: isARM64BFMask(sc, ac, 0)
  3545  	// result: (UBFX [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
  3546  	for {
  3547  		ac := ssa.AuxIntToInt64(v.AuxInt)
  3548  		if v_0.Op != ssaop.OpARM64SRLconst {
  3549  			break
  3550  		}
  3551  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
  3552  		x := v_0.Args[0]
  3553  		if !(isARM64BFMask(sc, ac, 0)) {
  3554  			break
  3555  		}
  3556  		v.Reset(ssaop.OpARM64UBFX)
  3557  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0)))
  3558  		v.AddArg(x)
  3559  		return true
  3560  	}
  3561  	// match: (ANDconst [c] (UBFX [bfc] x))
  3562  	// cond: isARM64BFMask(0, c, 0)
  3563  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), arm64BFWidth(c, 0)))] x)
  3564  	for {
  3565  		c := ssa.AuxIntToInt64(v.AuxInt)
  3566  		if v_0.Op != ssaop.OpARM64UBFX {
  3567  			break
  3568  		}
  3569  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
  3570  		x := v_0.Args[0]
  3571  		if !(isARM64BFMask(0, c, 0)) {
  3572  			break
  3573  		}
  3574  		v.Reset(ssaop.OpARM64UBFX)
  3575  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), arm64BFWidth(c, 0))))
  3576  		v.AddArg(x)
  3577  		return true
  3578  	}
  3579  	// match: (ANDconst [0xffffffff] x)
  3580  	// result: (MOVWUreg x)
  3581  	for {
  3582  		if ssa.AuxIntToInt64(v.AuxInt) != 0xffffffff {
  3583  			break
  3584  		}
  3585  		x := v_0
  3586  		v.Reset(ssaop.OpARM64MOVWUreg)
  3587  		v.AddArg(x)
  3588  		return true
  3589  	}
  3590  	// match: (ANDconst [0xffff ] x)
  3591  	// result: (MOVHUreg x)
  3592  	for {
  3593  		if ssa.AuxIntToInt64(v.AuxInt) != 0xffff {
  3594  			break
  3595  		}
  3596  		x := v_0
  3597  		v.Reset(ssaop.OpARM64MOVHUreg)
  3598  		v.AddArg(x)
  3599  		return true
  3600  	}
  3601  	// match: (ANDconst [0xff ] x)
  3602  	// result: (MOVBUreg x)
  3603  	for {
  3604  		if ssa.AuxIntToInt64(v.AuxInt) != 0xff {
  3605  			break
  3606  		}
  3607  		x := v_0
  3608  		v.Reset(ssaop.OpARM64MOVBUreg)
  3609  		v.AddArg(x)
  3610  		return true
  3611  	}
  3612  	return false
  3613  }
  3614  func rewriteValue_OpARM64ANDshiftLL(v *ssa.Value) bool {
  3615  	v_1 := v.Args[1]
  3616  	v_0 := v.Args[0]
  3617  	b := v.Block
  3618  	// match: (ANDshiftLL (MOVDconst [c]) x [d])
  3619  	// result: (ANDconst [c] (SLLconst <x.Type> x [d]))
  3620  	for {
  3621  		d := ssa.AuxIntToInt64(v.AuxInt)
  3622  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3623  			break
  3624  		}
  3625  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3626  		x := v_1
  3627  		v.Reset(ssaop.OpARM64ANDconst)
  3628  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3629  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  3630  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3631  		v0.AddArg(x)
  3632  		v.AddArg(v0)
  3633  		return true
  3634  	}
  3635  	// match: (ANDshiftLL x (MOVDconst [c]) [d])
  3636  	// result: (ANDconst x [int64(uint64(c)<<uint64(d))])
  3637  	for {
  3638  		d := ssa.AuxIntToInt64(v.AuxInt)
  3639  		x := v_0
  3640  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3641  			break
  3642  		}
  3643  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3644  		v.Reset(ssaop.OpARM64ANDconst)
  3645  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  3646  		v.AddArg(x)
  3647  		return true
  3648  	}
  3649  	// match: (ANDshiftLL y:(SLLconst x [c]) x [c])
  3650  	// result: y
  3651  	for {
  3652  		c := ssa.AuxIntToInt64(v.AuxInt)
  3653  		y := v_0
  3654  		if y.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  3655  			break
  3656  		}
  3657  		x := y.Args[0]
  3658  		if x != v_1 {
  3659  			break
  3660  		}
  3661  		v.CopyOf(y)
  3662  		return true
  3663  	}
  3664  	return false
  3665  }
  3666  func rewriteValue_OpARM64ANDshiftRA(v *ssa.Value) bool {
  3667  	v_1 := v.Args[1]
  3668  	v_0 := v.Args[0]
  3669  	b := v.Block
  3670  	// match: (ANDshiftRA (MOVDconst [c]) x [d])
  3671  	// result: (ANDconst [c] (SRAconst <x.Type> x [d]))
  3672  	for {
  3673  		d := ssa.AuxIntToInt64(v.AuxInt)
  3674  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3675  			break
  3676  		}
  3677  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3678  		x := v_1
  3679  		v.Reset(ssaop.OpARM64ANDconst)
  3680  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3681  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  3682  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3683  		v0.AddArg(x)
  3684  		v.AddArg(v0)
  3685  		return true
  3686  	}
  3687  	// match: (ANDshiftRA x (MOVDconst [c]) [d])
  3688  	// result: (ANDconst x [c>>uint64(d)])
  3689  	for {
  3690  		d := ssa.AuxIntToInt64(v.AuxInt)
  3691  		x := v_0
  3692  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3693  			break
  3694  		}
  3695  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3696  		v.Reset(ssaop.OpARM64ANDconst)
  3697  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  3698  		v.AddArg(x)
  3699  		return true
  3700  	}
  3701  	// match: (ANDshiftRA y:(SRAconst x [c]) x [c])
  3702  	// result: y
  3703  	for {
  3704  		c := ssa.AuxIntToInt64(v.AuxInt)
  3705  		y := v_0
  3706  		if y.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  3707  			break
  3708  		}
  3709  		x := y.Args[0]
  3710  		if x != v_1 {
  3711  			break
  3712  		}
  3713  		v.CopyOf(y)
  3714  		return true
  3715  	}
  3716  	return false
  3717  }
  3718  func rewriteValue_OpARM64ANDshiftRL(v *ssa.Value) bool {
  3719  	v_1 := v.Args[1]
  3720  	v_0 := v.Args[0]
  3721  	b := v.Block
  3722  	// match: (ANDshiftRL (MOVDconst [c]) x [d])
  3723  	// result: (ANDconst [c] (SRLconst <x.Type> x [d]))
  3724  	for {
  3725  		d := ssa.AuxIntToInt64(v.AuxInt)
  3726  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3727  			break
  3728  		}
  3729  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3730  		x := v_1
  3731  		v.Reset(ssaop.OpARM64ANDconst)
  3732  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3733  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  3734  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3735  		v0.AddArg(x)
  3736  		v.AddArg(v0)
  3737  		return true
  3738  	}
  3739  	// match: (ANDshiftRL x (MOVDconst [c]) [d])
  3740  	// result: (ANDconst x [int64(uint64(c)>>uint64(d))])
  3741  	for {
  3742  		d := ssa.AuxIntToInt64(v.AuxInt)
  3743  		x := v_0
  3744  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3745  			break
  3746  		}
  3747  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3748  		v.Reset(ssaop.OpARM64ANDconst)
  3749  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  3750  		v.AddArg(x)
  3751  		return true
  3752  	}
  3753  	// match: (ANDshiftRL y:(SRLconst x [c]) x [c])
  3754  	// result: y
  3755  	for {
  3756  		c := ssa.AuxIntToInt64(v.AuxInt)
  3757  		y := v_0
  3758  		if y.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  3759  			break
  3760  		}
  3761  		x := y.Args[0]
  3762  		if x != v_1 {
  3763  			break
  3764  		}
  3765  		v.CopyOf(y)
  3766  		return true
  3767  	}
  3768  	return false
  3769  }
  3770  func rewriteValue_OpARM64ANDshiftRO(v *ssa.Value) bool {
  3771  	v_1 := v.Args[1]
  3772  	v_0 := v.Args[0]
  3773  	b := v.Block
  3774  	// match: (ANDshiftRO (MOVDconst [c]) x [d])
  3775  	// result: (ANDconst [c] (RORconst <x.Type> x [d]))
  3776  	for {
  3777  		d := ssa.AuxIntToInt64(v.AuxInt)
  3778  		if v_0.Op != ssaop.OpARM64MOVDconst {
  3779  			break
  3780  		}
  3781  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  3782  		x := v_1
  3783  		v.Reset(ssaop.OpARM64ANDconst)
  3784  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3785  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
  3786  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  3787  		v0.AddArg(x)
  3788  		v.AddArg(v0)
  3789  		return true
  3790  	}
  3791  	// match: (ANDshiftRO x (MOVDconst [c]) [d])
  3792  	// result: (ANDconst x [rotateRight64(c, d)])
  3793  	for {
  3794  		d := ssa.AuxIntToInt64(v.AuxInt)
  3795  		x := v_0
  3796  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3797  			break
  3798  		}
  3799  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3800  		v.Reset(ssaop.OpARM64ANDconst)
  3801  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
  3802  		v.AddArg(x)
  3803  		return true
  3804  	}
  3805  	// match: (ANDshiftRO y:(RORconst x [c]) x [c])
  3806  	// result: y
  3807  	for {
  3808  		c := ssa.AuxIntToInt64(v.AuxInt)
  3809  		y := v_0
  3810  		if y.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(y.AuxInt) != c {
  3811  			break
  3812  		}
  3813  		x := y.Args[0]
  3814  		if x != v_1 {
  3815  			break
  3816  		}
  3817  		v.CopyOf(y)
  3818  		return true
  3819  	}
  3820  	return false
  3821  }
  3822  func rewriteValue_OpARM64BIC(v *ssa.Value) bool {
  3823  	v_1 := v.Args[1]
  3824  	v_0 := v.Args[0]
  3825  	// match: (BIC x (MOVDconst [c]))
  3826  	// result: (ANDconst [^c] x)
  3827  	for {
  3828  		x := v_0
  3829  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3830  			break
  3831  		}
  3832  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3833  		v.Reset(ssaop.OpARM64ANDconst)
  3834  		v.AuxInt = ssa.Int64ToAuxInt(^c)
  3835  		v.AddArg(x)
  3836  		return true
  3837  	}
  3838  	// match: (BIC x x)
  3839  	// result: (MOVDconst [0])
  3840  	for {
  3841  		x := v_0
  3842  		if x != v_1 {
  3843  			break
  3844  		}
  3845  		v.Reset(ssaop.OpARM64MOVDconst)
  3846  		v.AuxInt = ssa.Int64ToAuxInt(0)
  3847  		return true
  3848  	}
  3849  	// match: (BIC x0 x1:(SLLconst [c] y))
  3850  	// cond: ssa.ClobberIfDead(x1)
  3851  	// result: (BICshiftLL x0 y [c])
  3852  	for {
  3853  		x0 := v_0
  3854  		x1 := v_1
  3855  		if x1.Op != ssaop.OpARM64SLLconst {
  3856  			break
  3857  		}
  3858  		c := ssa.AuxIntToInt64(x1.AuxInt)
  3859  		y := x1.Args[0]
  3860  		if !(ssa.ClobberIfDead(x1)) {
  3861  			break
  3862  		}
  3863  		v.Reset(ssaop.OpARM64BICshiftLL)
  3864  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3865  		v.AddArg2(x0, y)
  3866  		return true
  3867  	}
  3868  	// match: (BIC x0 x1:(SRLconst [c] y))
  3869  	// cond: ssa.ClobberIfDead(x1)
  3870  	// result: (BICshiftRL x0 y [c])
  3871  	for {
  3872  		x0 := v_0
  3873  		x1 := v_1
  3874  		if x1.Op != ssaop.OpARM64SRLconst {
  3875  			break
  3876  		}
  3877  		c := ssa.AuxIntToInt64(x1.AuxInt)
  3878  		y := x1.Args[0]
  3879  		if !(ssa.ClobberIfDead(x1)) {
  3880  			break
  3881  		}
  3882  		v.Reset(ssaop.OpARM64BICshiftRL)
  3883  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3884  		v.AddArg2(x0, y)
  3885  		return true
  3886  	}
  3887  	// match: (BIC x0 x1:(SRAconst [c] y))
  3888  	// cond: ssa.ClobberIfDead(x1)
  3889  	// result: (BICshiftRA x0 y [c])
  3890  	for {
  3891  		x0 := v_0
  3892  		x1 := v_1
  3893  		if x1.Op != ssaop.OpARM64SRAconst {
  3894  			break
  3895  		}
  3896  		c := ssa.AuxIntToInt64(x1.AuxInt)
  3897  		y := x1.Args[0]
  3898  		if !(ssa.ClobberIfDead(x1)) {
  3899  			break
  3900  		}
  3901  		v.Reset(ssaop.OpARM64BICshiftRA)
  3902  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3903  		v.AddArg2(x0, y)
  3904  		return true
  3905  	}
  3906  	// match: (BIC x0 x1:(RORconst [c] y))
  3907  	// cond: ssa.ClobberIfDead(x1)
  3908  	// result: (BICshiftRO x0 y [c])
  3909  	for {
  3910  		x0 := v_0
  3911  		x1 := v_1
  3912  		if x1.Op != ssaop.OpARM64RORconst {
  3913  			break
  3914  		}
  3915  		c := ssa.AuxIntToInt64(x1.AuxInt)
  3916  		y := x1.Args[0]
  3917  		if !(ssa.ClobberIfDead(x1)) {
  3918  			break
  3919  		}
  3920  		v.Reset(ssaop.OpARM64BICshiftRO)
  3921  		v.AuxInt = ssa.Int64ToAuxInt(c)
  3922  		v.AddArg2(x0, y)
  3923  		return true
  3924  	}
  3925  	return false
  3926  }
  3927  func rewriteValue_OpARM64BICshiftLL(v *ssa.Value) bool {
  3928  	v_1 := v.Args[1]
  3929  	v_0 := v.Args[0]
  3930  	// match: (BICshiftLL x (MOVDconst [c]) [d])
  3931  	// result: (ANDconst x [^int64(uint64(c)<<uint64(d))])
  3932  	for {
  3933  		d := ssa.AuxIntToInt64(v.AuxInt)
  3934  		x := v_0
  3935  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3936  			break
  3937  		}
  3938  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3939  		v.Reset(ssaop.OpARM64ANDconst)
  3940  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  3941  		v.AddArg(x)
  3942  		return true
  3943  	}
  3944  	// match: (BICshiftLL (SLLconst x [c]) x [c])
  3945  	// result: (MOVDconst [0])
  3946  	for {
  3947  		c := ssa.AuxIntToInt64(v.AuxInt)
  3948  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  3949  			break
  3950  		}
  3951  		x := v_0.Args[0]
  3952  		if x != v_1 {
  3953  			break
  3954  		}
  3955  		v.Reset(ssaop.OpARM64MOVDconst)
  3956  		v.AuxInt = ssa.Int64ToAuxInt(0)
  3957  		return true
  3958  	}
  3959  	return false
  3960  }
  3961  func rewriteValue_OpARM64BICshiftRA(v *ssa.Value) bool {
  3962  	v_1 := v.Args[1]
  3963  	v_0 := v.Args[0]
  3964  	// match: (BICshiftRA x (MOVDconst [c]) [d])
  3965  	// result: (ANDconst x [^(c>>uint64(d))])
  3966  	for {
  3967  		d := ssa.AuxIntToInt64(v.AuxInt)
  3968  		x := v_0
  3969  		if v_1.Op != ssaop.OpARM64MOVDconst {
  3970  			break
  3971  		}
  3972  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  3973  		v.Reset(ssaop.OpARM64ANDconst)
  3974  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
  3975  		v.AddArg(x)
  3976  		return true
  3977  	}
  3978  	// match: (BICshiftRA (SRAconst x [c]) x [c])
  3979  	// result: (MOVDconst [0])
  3980  	for {
  3981  		c := ssa.AuxIntToInt64(v.AuxInt)
  3982  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  3983  			break
  3984  		}
  3985  		x := v_0.Args[0]
  3986  		if x != v_1 {
  3987  			break
  3988  		}
  3989  		v.Reset(ssaop.OpARM64MOVDconst)
  3990  		v.AuxInt = ssa.Int64ToAuxInt(0)
  3991  		return true
  3992  	}
  3993  	return false
  3994  }
  3995  func rewriteValue_OpARM64BICshiftRL(v *ssa.Value) bool {
  3996  	v_1 := v.Args[1]
  3997  	v_0 := v.Args[0]
  3998  	// match: (BICshiftRL x (MOVDconst [c]) [d])
  3999  	// result: (ANDconst x [^int64(uint64(c)>>uint64(d))])
  4000  	for {
  4001  		d := ssa.AuxIntToInt64(v.AuxInt)
  4002  		x := v_0
  4003  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4004  			break
  4005  		}
  4006  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4007  		v.Reset(ssaop.OpARM64ANDconst)
  4008  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  4009  		v.AddArg(x)
  4010  		return true
  4011  	}
  4012  	// match: (BICshiftRL (SRLconst x [c]) x [c])
  4013  	// result: (MOVDconst [0])
  4014  	for {
  4015  		c := ssa.AuxIntToInt64(v.AuxInt)
  4016  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  4017  			break
  4018  		}
  4019  		x := v_0.Args[0]
  4020  		if x != v_1 {
  4021  			break
  4022  		}
  4023  		v.Reset(ssaop.OpARM64MOVDconst)
  4024  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4025  		return true
  4026  	}
  4027  	return false
  4028  }
  4029  func rewriteValue_OpARM64BICshiftRO(v *ssa.Value) bool {
  4030  	v_1 := v.Args[1]
  4031  	v_0 := v.Args[0]
  4032  	// match: (BICshiftRO x (MOVDconst [c]) [d])
  4033  	// result: (ANDconst x [^rotateRight64(c, d)])
  4034  	for {
  4035  		d := ssa.AuxIntToInt64(v.AuxInt)
  4036  		x := v_0
  4037  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4038  			break
  4039  		}
  4040  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4041  		v.Reset(ssaop.OpARM64ANDconst)
  4042  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
  4043  		v.AddArg(x)
  4044  		return true
  4045  	}
  4046  	// match: (BICshiftRO (RORconst x [c]) x [c])
  4047  	// result: (MOVDconst [0])
  4048  	for {
  4049  		c := ssa.AuxIntToInt64(v.AuxInt)
  4050  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  4051  			break
  4052  		}
  4053  		x := v_0.Args[0]
  4054  		if x != v_1 {
  4055  			break
  4056  		}
  4057  		v.Reset(ssaop.OpARM64MOVDconst)
  4058  		v.AuxInt = ssa.Int64ToAuxInt(0)
  4059  		return true
  4060  	}
  4061  	return false
  4062  }
  4063  func rewriteValue_OpARM64CMN(v *ssa.Value) bool {
  4064  	v_1 := v.Args[1]
  4065  	v_0 := v.Args[0]
  4066  	// match: (CMN x (MOVDconst [c]))
  4067  	// result: (CMNconst [c] x)
  4068  	for {
  4069  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4070  			x := v_0
  4071  			if v_1.Op != ssaop.OpARM64MOVDconst {
  4072  				continue
  4073  			}
  4074  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  4075  			v.Reset(ssaop.OpARM64CMNconst)
  4076  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4077  			v.AddArg(x)
  4078  			return true
  4079  		}
  4080  		break
  4081  	}
  4082  	// match: (CMN x0 x1:(SLLconst [c] y))
  4083  	// cond: ssa.ClobberIfDead(x1)
  4084  	// result: (CMNshiftLL x0 y [c])
  4085  	for {
  4086  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4087  			x0 := v_0
  4088  			x1 := v_1
  4089  			if x1.Op != ssaop.OpARM64SLLconst {
  4090  				continue
  4091  			}
  4092  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4093  			y := x1.Args[0]
  4094  			if !(ssa.ClobberIfDead(x1)) {
  4095  				continue
  4096  			}
  4097  			v.Reset(ssaop.OpARM64CMNshiftLL)
  4098  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4099  			v.AddArg2(x0, y)
  4100  			return true
  4101  		}
  4102  		break
  4103  	}
  4104  	// match: (CMN x0 x1:(SRLconst [c] y))
  4105  	// cond: ssa.ClobberIfDead(x1)
  4106  	// result: (CMNshiftRL x0 y [c])
  4107  	for {
  4108  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4109  			x0 := v_0
  4110  			x1 := v_1
  4111  			if x1.Op != ssaop.OpARM64SRLconst {
  4112  				continue
  4113  			}
  4114  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4115  			y := x1.Args[0]
  4116  			if !(ssa.ClobberIfDead(x1)) {
  4117  				continue
  4118  			}
  4119  			v.Reset(ssaop.OpARM64CMNshiftRL)
  4120  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4121  			v.AddArg2(x0, y)
  4122  			return true
  4123  		}
  4124  		break
  4125  	}
  4126  	// match: (CMN x0 x1:(SRAconst [c] y))
  4127  	// cond: ssa.ClobberIfDead(x1)
  4128  	// result: (CMNshiftRA x0 y [c])
  4129  	for {
  4130  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4131  			x0 := v_0
  4132  			x1 := v_1
  4133  			if x1.Op != ssaop.OpARM64SRAconst {
  4134  				continue
  4135  			}
  4136  			c := ssa.AuxIntToInt64(x1.AuxInt)
  4137  			y := x1.Args[0]
  4138  			if !(ssa.ClobberIfDead(x1)) {
  4139  				continue
  4140  			}
  4141  			v.Reset(ssaop.OpARM64CMNshiftRA)
  4142  			v.AuxInt = ssa.Int64ToAuxInt(c)
  4143  			v.AddArg2(x0, y)
  4144  			return true
  4145  		}
  4146  		break
  4147  	}
  4148  	return false
  4149  }
  4150  func rewriteValue_OpARM64CMNW(v *ssa.Value) bool {
  4151  	v_1 := v.Args[1]
  4152  	v_0 := v.Args[0]
  4153  	// match: (CMNW x (MOVDconst [c]))
  4154  	// result: (CMNWconst [int32(c)] x)
  4155  	for {
  4156  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  4157  			x := v_0
  4158  			if v_1.Op != ssaop.OpARM64MOVDconst {
  4159  				continue
  4160  			}
  4161  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  4162  			v.Reset(ssaop.OpARM64CMNWconst)
  4163  			v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  4164  			v.AddArg(x)
  4165  			return true
  4166  		}
  4167  		break
  4168  	}
  4169  	return false
  4170  }
  4171  func rewriteValue_OpARM64CMNWconst(v *ssa.Value) bool {
  4172  	v_0 := v.Args[0]
  4173  	// match: (CMNWconst [c] y)
  4174  	// cond: c < 0 && c != -1<<31
  4175  	// result: (CMPWconst [-c] y)
  4176  	for {
  4177  		c := ssa.AuxIntToInt32(v.AuxInt)
  4178  		y := v_0
  4179  		if !(c < 0 && c != -1<<31) {
  4180  			break
  4181  		}
  4182  		v.Reset(ssaop.OpARM64CMPWconst)
  4183  		v.AuxInt = ssa.Int32ToAuxInt(-c)
  4184  		v.AddArg(y)
  4185  		return true
  4186  	}
  4187  	// match: (CMNWconst (MOVDconst [x]) [y])
  4188  	// result: (FlagConstant [ssa.AddFlags32(int32(x),y)])
  4189  	for {
  4190  		y := ssa.AuxIntToInt32(v.AuxInt)
  4191  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4192  			break
  4193  		}
  4194  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4195  		v.Reset(ssaop.OpARM64FlagConstant)
  4196  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.AddFlags32(int32(x), y))
  4197  		return true
  4198  	}
  4199  	return false
  4200  }
  4201  func rewriteValue_OpARM64CMNconst(v *ssa.Value) bool {
  4202  	v_0 := v.Args[0]
  4203  	// match: (CMNconst [c] y)
  4204  	// cond: c < 0 && c != -1<<63
  4205  	// result: (CMPconst [-c] y)
  4206  	for {
  4207  		c := ssa.AuxIntToInt64(v.AuxInt)
  4208  		y := v_0
  4209  		if !(c < 0 && c != -1<<63) {
  4210  			break
  4211  		}
  4212  		v.Reset(ssaop.OpARM64CMPconst)
  4213  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  4214  		v.AddArg(y)
  4215  		return true
  4216  	}
  4217  	// match: (CMNconst (MOVDconst [x]) [y])
  4218  	// result: (FlagConstant [ssa.AddFlags64(x,y)])
  4219  	for {
  4220  		y := ssa.AuxIntToInt64(v.AuxInt)
  4221  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4222  			break
  4223  		}
  4224  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4225  		v.Reset(ssaop.OpARM64FlagConstant)
  4226  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.AddFlags64(x, y))
  4227  		return true
  4228  	}
  4229  	return false
  4230  }
  4231  func rewriteValue_OpARM64CMNshiftLL(v *ssa.Value) bool {
  4232  	v_1 := v.Args[1]
  4233  	v_0 := v.Args[0]
  4234  	b := v.Block
  4235  	// match: (CMNshiftLL (MOVDconst [c]) x [d])
  4236  	// result: (CMNconst [c] (SLLconst <x.Type> x [d]))
  4237  	for {
  4238  		d := ssa.AuxIntToInt64(v.AuxInt)
  4239  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4240  			break
  4241  		}
  4242  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4243  		x := v_1
  4244  		v.Reset(ssaop.OpARM64CMNconst)
  4245  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4246  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  4247  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4248  		v0.AddArg(x)
  4249  		v.AddArg(v0)
  4250  		return true
  4251  	}
  4252  	// match: (CMNshiftLL x (MOVDconst [c]) [d])
  4253  	// result: (CMNconst x [int64(uint64(c)<<uint64(d))])
  4254  	for {
  4255  		d := ssa.AuxIntToInt64(v.AuxInt)
  4256  		x := v_0
  4257  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4258  			break
  4259  		}
  4260  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4261  		v.Reset(ssaop.OpARM64CMNconst)
  4262  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  4263  		v.AddArg(x)
  4264  		return true
  4265  	}
  4266  	return false
  4267  }
  4268  func rewriteValue_OpARM64CMNshiftRA(v *ssa.Value) bool {
  4269  	v_1 := v.Args[1]
  4270  	v_0 := v.Args[0]
  4271  	b := v.Block
  4272  	// match: (CMNshiftRA (MOVDconst [c]) x [d])
  4273  	// result: (CMNconst [c] (SRAconst <x.Type> x [d]))
  4274  	for {
  4275  		d := ssa.AuxIntToInt64(v.AuxInt)
  4276  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4277  			break
  4278  		}
  4279  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4280  		x := v_1
  4281  		v.Reset(ssaop.OpARM64CMNconst)
  4282  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4283  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  4284  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4285  		v0.AddArg(x)
  4286  		v.AddArg(v0)
  4287  		return true
  4288  	}
  4289  	// match: (CMNshiftRA x (MOVDconst [c]) [d])
  4290  	// result: (CMNconst x [c>>uint64(d)])
  4291  	for {
  4292  		d := ssa.AuxIntToInt64(v.AuxInt)
  4293  		x := v_0
  4294  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4295  			break
  4296  		}
  4297  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4298  		v.Reset(ssaop.OpARM64CMNconst)
  4299  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  4300  		v.AddArg(x)
  4301  		return true
  4302  	}
  4303  	return false
  4304  }
  4305  func rewriteValue_OpARM64CMNshiftRL(v *ssa.Value) bool {
  4306  	v_1 := v.Args[1]
  4307  	v_0 := v.Args[0]
  4308  	b := v.Block
  4309  	// match: (CMNshiftRL (MOVDconst [c]) x [d])
  4310  	// result: (CMNconst [c] (SRLconst <x.Type> x [d]))
  4311  	for {
  4312  		d := ssa.AuxIntToInt64(v.AuxInt)
  4313  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4314  			break
  4315  		}
  4316  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4317  		x := v_1
  4318  		v.Reset(ssaop.OpARM64CMNconst)
  4319  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4320  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  4321  		v0.AuxInt = ssa.Int64ToAuxInt(d)
  4322  		v0.AddArg(x)
  4323  		v.AddArg(v0)
  4324  		return true
  4325  	}
  4326  	// match: (CMNshiftRL x (MOVDconst [c]) [d])
  4327  	// result: (CMNconst x [int64(uint64(c)>>uint64(d))])
  4328  	for {
  4329  		d := ssa.AuxIntToInt64(v.AuxInt)
  4330  		x := v_0
  4331  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4332  			break
  4333  		}
  4334  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4335  		v.Reset(ssaop.OpARM64CMNconst)
  4336  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  4337  		v.AddArg(x)
  4338  		return true
  4339  	}
  4340  	return false
  4341  }
  4342  func rewriteValue_OpARM64CMP(v *ssa.Value) bool {
  4343  	v_1 := v.Args[1]
  4344  	v_0 := v.Args[0]
  4345  	b := v.Block
  4346  	// match: (CMP x (MOVDconst [c]))
  4347  	// result: (CMPconst [c] x)
  4348  	for {
  4349  		x := v_0
  4350  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4351  			break
  4352  		}
  4353  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4354  		v.Reset(ssaop.OpARM64CMPconst)
  4355  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4356  		v.AddArg(x)
  4357  		return true
  4358  	}
  4359  	// match: (CMP (MOVDconst [c]) x)
  4360  	// result: (InvertFlags (CMPconst [c] x))
  4361  	for {
  4362  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4363  			break
  4364  		}
  4365  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4366  		x := v_1
  4367  		v.Reset(ssaop.OpARM64InvertFlags)
  4368  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  4369  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4370  		v0.AddArg(x)
  4371  		v.AddArg(v0)
  4372  		return true
  4373  	}
  4374  	// match: (CMP x y)
  4375  	// cond: ssa.CanonLessThan(x,y)
  4376  	// result: (InvertFlags (CMP y x))
  4377  	for {
  4378  		x := v_0
  4379  		y := v_1
  4380  		if !(ssa.CanonLessThan(x, y)) {
  4381  			break
  4382  		}
  4383  		v.Reset(ssaop.OpARM64InvertFlags)
  4384  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
  4385  		v0.AddArg2(y, x)
  4386  		v.AddArg(v0)
  4387  		return true
  4388  	}
  4389  	// match: (CMP x0 x1:(SLLconst [c] y))
  4390  	// cond: ssa.ClobberIfDead(x1)
  4391  	// result: (CMPshiftLL x0 y [c])
  4392  	for {
  4393  		x0 := v_0
  4394  		x1 := v_1
  4395  		if x1.Op != ssaop.OpARM64SLLconst {
  4396  			break
  4397  		}
  4398  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4399  		y := x1.Args[0]
  4400  		if !(ssa.ClobberIfDead(x1)) {
  4401  			break
  4402  		}
  4403  		v.Reset(ssaop.OpARM64CMPshiftLL)
  4404  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4405  		v.AddArg2(x0, y)
  4406  		return true
  4407  	}
  4408  	// match: (CMP x0:(SLLconst [c] y) x1)
  4409  	// cond: ssa.ClobberIfDead(x0)
  4410  	// result: (InvertFlags (CMPshiftLL x1 y [c]))
  4411  	for {
  4412  		x0 := v_0
  4413  		if x0.Op != ssaop.OpARM64SLLconst {
  4414  			break
  4415  		}
  4416  		c := ssa.AuxIntToInt64(x0.AuxInt)
  4417  		y := x0.Args[0]
  4418  		x1 := v_1
  4419  		if !(ssa.ClobberIfDead(x0)) {
  4420  			break
  4421  		}
  4422  		v.Reset(ssaop.OpARM64InvertFlags)
  4423  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftLL, types.TypeFlags)
  4424  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4425  		v0.AddArg2(x1, y)
  4426  		v.AddArg(v0)
  4427  		return true
  4428  	}
  4429  	// match: (CMP x0 x1:(SRLconst [c] y))
  4430  	// cond: ssa.ClobberIfDead(x1)
  4431  	// result: (CMPshiftRL x0 y [c])
  4432  	for {
  4433  		x0 := v_0
  4434  		x1 := v_1
  4435  		if x1.Op != ssaop.OpARM64SRLconst {
  4436  			break
  4437  		}
  4438  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4439  		y := x1.Args[0]
  4440  		if !(ssa.ClobberIfDead(x1)) {
  4441  			break
  4442  		}
  4443  		v.Reset(ssaop.OpARM64CMPshiftRL)
  4444  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4445  		v.AddArg2(x0, y)
  4446  		return true
  4447  	}
  4448  	// match: (CMP x0:(SRLconst [c] y) x1)
  4449  	// cond: ssa.ClobberIfDead(x0)
  4450  	// result: (InvertFlags (CMPshiftRL x1 y [c]))
  4451  	for {
  4452  		x0 := v_0
  4453  		if x0.Op != ssaop.OpARM64SRLconst {
  4454  			break
  4455  		}
  4456  		c := ssa.AuxIntToInt64(x0.AuxInt)
  4457  		y := x0.Args[0]
  4458  		x1 := v_1
  4459  		if !(ssa.ClobberIfDead(x0)) {
  4460  			break
  4461  		}
  4462  		v.Reset(ssaop.OpARM64InvertFlags)
  4463  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftRL, types.TypeFlags)
  4464  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4465  		v0.AddArg2(x1, y)
  4466  		v.AddArg(v0)
  4467  		return true
  4468  	}
  4469  	// match: (CMP x0 x1:(SRAconst [c] y))
  4470  	// cond: ssa.ClobberIfDead(x1)
  4471  	// result: (CMPshiftRA x0 y [c])
  4472  	for {
  4473  		x0 := v_0
  4474  		x1 := v_1
  4475  		if x1.Op != ssaop.OpARM64SRAconst {
  4476  			break
  4477  		}
  4478  		c := ssa.AuxIntToInt64(x1.AuxInt)
  4479  		y := x1.Args[0]
  4480  		if !(ssa.ClobberIfDead(x1)) {
  4481  			break
  4482  		}
  4483  		v.Reset(ssaop.OpARM64CMPshiftRA)
  4484  		v.AuxInt = ssa.Int64ToAuxInt(c)
  4485  		v.AddArg2(x0, y)
  4486  		return true
  4487  	}
  4488  	// match: (CMP x0:(SRAconst [c] y) x1)
  4489  	// cond: ssa.ClobberIfDead(x0)
  4490  	// result: (InvertFlags (CMPshiftRA x1 y [c]))
  4491  	for {
  4492  		x0 := v_0
  4493  		if x0.Op != ssaop.OpARM64SRAconst {
  4494  			break
  4495  		}
  4496  		c := ssa.AuxIntToInt64(x0.AuxInt)
  4497  		y := x0.Args[0]
  4498  		x1 := v_1
  4499  		if !(ssa.ClobberIfDead(x0)) {
  4500  			break
  4501  		}
  4502  		v.Reset(ssaop.OpARM64InvertFlags)
  4503  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPshiftRA, types.TypeFlags)
  4504  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4505  		v0.AddArg2(x1, y)
  4506  		v.AddArg(v0)
  4507  		return true
  4508  	}
  4509  	return false
  4510  }
  4511  func rewriteValue_OpARM64CMPW(v *ssa.Value) bool {
  4512  	v_1 := v.Args[1]
  4513  	v_0 := v.Args[0]
  4514  	b := v.Block
  4515  	// match: (CMPW x (MOVDconst [c]))
  4516  	// result: (CMPWconst [int32(c)] x)
  4517  	for {
  4518  		x := v_0
  4519  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4520  			break
  4521  		}
  4522  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4523  		v.Reset(ssaop.OpARM64CMPWconst)
  4524  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  4525  		v.AddArg(x)
  4526  		return true
  4527  	}
  4528  	// match: (CMPW (MOVDconst [c]) x)
  4529  	// result: (InvertFlags (CMPWconst [int32(c)] x))
  4530  	for {
  4531  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4532  			break
  4533  		}
  4534  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4535  		x := v_1
  4536  		v.Reset(ssaop.OpARM64InvertFlags)
  4537  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
  4538  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  4539  		v0.AddArg(x)
  4540  		v.AddArg(v0)
  4541  		return true
  4542  	}
  4543  	// match: (CMPW x y)
  4544  	// cond: ssa.CanonLessThan(x,y)
  4545  	// result: (InvertFlags (CMPW y x))
  4546  	for {
  4547  		x := v_0
  4548  		y := v_1
  4549  		if !(ssa.CanonLessThan(x, y)) {
  4550  			break
  4551  		}
  4552  		v.Reset(ssaop.OpARM64InvertFlags)
  4553  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
  4554  		v0.AddArg2(y, x)
  4555  		v.AddArg(v0)
  4556  		return true
  4557  	}
  4558  	return false
  4559  }
  4560  func rewriteValue_OpARM64CMPWconst(v *ssa.Value) bool {
  4561  	v_0 := v.Args[0]
  4562  	// match: (CMPWconst [c] y)
  4563  	// cond: c < 0 && c != -1<<31
  4564  	// result: (CMNWconst [-c] y)
  4565  	for {
  4566  		c := ssa.AuxIntToInt32(v.AuxInt)
  4567  		y := v_0
  4568  		if !(c < 0 && c != -1<<31) {
  4569  			break
  4570  		}
  4571  		v.Reset(ssaop.OpARM64CMNWconst)
  4572  		v.AuxInt = ssa.Int32ToAuxInt(-c)
  4573  		v.AddArg(y)
  4574  		return true
  4575  	}
  4576  	// match: (CMPWconst (MOVDconst [x]) [y])
  4577  	// result: (FlagConstant [ssa.SubFlags32(int32(x),y)])
  4578  	for {
  4579  		y := ssa.AuxIntToInt32(v.AuxInt)
  4580  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4581  			break
  4582  		}
  4583  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4584  		v.Reset(ssaop.OpARM64FlagConstant)
  4585  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags32(int32(x), y))
  4586  		return true
  4587  	}
  4588  	// match: (CMPWconst (MOVBUreg _) [c])
  4589  	// cond: 0xff < c
  4590  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4591  	for {
  4592  		c := ssa.AuxIntToInt32(v.AuxInt)
  4593  		if v_0.Op != ssaop.OpARM64MOVBUreg || !(0xff < c) {
  4594  			break
  4595  		}
  4596  		v.Reset(ssaop.OpARM64FlagConstant)
  4597  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4598  		return true
  4599  	}
  4600  	// match: (CMPWconst (MOVHUreg _) [c])
  4601  	// cond: 0xffff < c
  4602  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4603  	for {
  4604  		c := ssa.AuxIntToInt32(v.AuxInt)
  4605  		if v_0.Op != ssaop.OpARM64MOVHUreg || !(0xffff < c) {
  4606  			break
  4607  		}
  4608  		v.Reset(ssaop.OpARM64FlagConstant)
  4609  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4610  		return true
  4611  	}
  4612  	return false
  4613  }
  4614  func rewriteValue_OpARM64CMPconst(v *ssa.Value) bool {
  4615  	v_0 := v.Args[0]
  4616  	// match: (CMPconst [c] y)
  4617  	// cond: c < 0 && c != -1<<63
  4618  	// result: (CMNconst [-c] y)
  4619  	for {
  4620  		c := ssa.AuxIntToInt64(v.AuxInt)
  4621  		y := v_0
  4622  		if !(c < 0 && c != -1<<63) {
  4623  			break
  4624  		}
  4625  		v.Reset(ssaop.OpARM64CMNconst)
  4626  		v.AuxInt = ssa.Int64ToAuxInt(-c)
  4627  		v.AddArg(y)
  4628  		return true
  4629  	}
  4630  	// match: (CMPconst (MOVDconst [x]) [y])
  4631  	// result: (FlagConstant [ssa.SubFlags64(x,y)])
  4632  	for {
  4633  		y := ssa.AuxIntToInt64(v.AuxInt)
  4634  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4635  			break
  4636  		}
  4637  		x := ssa.AuxIntToInt64(v_0.AuxInt)
  4638  		v.Reset(ssaop.OpARM64FlagConstant)
  4639  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(x, y))
  4640  		return true
  4641  	}
  4642  	// match: (CMPconst (MOVBUreg _) [c])
  4643  	// cond: 0xff < c
  4644  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4645  	for {
  4646  		c := ssa.AuxIntToInt64(v.AuxInt)
  4647  		if v_0.Op != ssaop.OpARM64MOVBUreg || !(0xff < c) {
  4648  			break
  4649  		}
  4650  		v.Reset(ssaop.OpARM64FlagConstant)
  4651  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4652  		return true
  4653  	}
  4654  	// match: (CMPconst (MOVHUreg _) [c])
  4655  	// cond: 0xffff < c
  4656  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4657  	for {
  4658  		c := ssa.AuxIntToInt64(v.AuxInt)
  4659  		if v_0.Op != ssaop.OpARM64MOVHUreg || !(0xffff < c) {
  4660  			break
  4661  		}
  4662  		v.Reset(ssaop.OpARM64FlagConstant)
  4663  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4664  		return true
  4665  	}
  4666  	// match: (CMPconst (MOVWUreg _) [c])
  4667  	// cond: 0xffffffff < c
  4668  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4669  	for {
  4670  		c := ssa.AuxIntToInt64(v.AuxInt)
  4671  		if v_0.Op != ssaop.OpARM64MOVWUreg || !(0xffffffff < c) {
  4672  			break
  4673  		}
  4674  		v.Reset(ssaop.OpARM64FlagConstant)
  4675  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4676  		return true
  4677  	}
  4678  	// match: (CMPconst (ANDconst _ [m]) [n])
  4679  	// cond: 0 <= m && m < n
  4680  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4681  	for {
  4682  		n := ssa.AuxIntToInt64(v.AuxInt)
  4683  		if v_0.Op != ssaop.OpARM64ANDconst {
  4684  			break
  4685  		}
  4686  		m := ssa.AuxIntToInt64(v_0.AuxInt)
  4687  		if !(0 <= m && m < n) {
  4688  			break
  4689  		}
  4690  		v.Reset(ssaop.OpARM64FlagConstant)
  4691  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4692  		return true
  4693  	}
  4694  	// match: (CMPconst (SRLconst _ [c]) [n])
  4695  	// cond: 0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)
  4696  	// result: (FlagConstant [ssa.SubFlags64(0,1)])
  4697  	for {
  4698  		n := ssa.AuxIntToInt64(v.AuxInt)
  4699  		if v_0.Op != ssaop.OpARM64SRLconst {
  4700  			break
  4701  		}
  4702  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4703  		if !(0 <= n && 0 < c && c <= 63 && (1<<uint64(64-c)) <= uint64(n)) {
  4704  			break
  4705  		}
  4706  		v.Reset(ssaop.OpARM64FlagConstant)
  4707  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.SubFlags64(0, 1))
  4708  		return true
  4709  	}
  4710  	return false
  4711  }
  4712  func rewriteValue_OpARM64CMPshiftLL(v *ssa.Value) bool {
  4713  	v_1 := v.Args[1]
  4714  	v_0 := v.Args[0]
  4715  	b := v.Block
  4716  	// match: (CMPshiftLL (MOVDconst [c]) x [d])
  4717  	// result: (InvertFlags (CMPconst [c] (SLLconst <x.Type> x [d])))
  4718  	for {
  4719  		d := ssa.AuxIntToInt64(v.AuxInt)
  4720  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4721  			break
  4722  		}
  4723  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4724  		x := v_1
  4725  		v.Reset(ssaop.OpARM64InvertFlags)
  4726  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  4727  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4728  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  4729  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  4730  		v1.AddArg(x)
  4731  		v0.AddArg(v1)
  4732  		v.AddArg(v0)
  4733  		return true
  4734  	}
  4735  	// match: (CMPshiftLL x (MOVDconst [c]) [d])
  4736  	// result: (CMPconst x [int64(uint64(c)<<uint64(d))])
  4737  	for {
  4738  		d := ssa.AuxIntToInt64(v.AuxInt)
  4739  		x := v_0
  4740  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4741  			break
  4742  		}
  4743  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4744  		v.Reset(ssaop.OpARM64CMPconst)
  4745  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
  4746  		v.AddArg(x)
  4747  		return true
  4748  	}
  4749  	return false
  4750  }
  4751  func rewriteValue_OpARM64CMPshiftRA(v *ssa.Value) bool {
  4752  	v_1 := v.Args[1]
  4753  	v_0 := v.Args[0]
  4754  	b := v.Block
  4755  	// match: (CMPshiftRA (MOVDconst [c]) x [d])
  4756  	// result: (InvertFlags (CMPconst [c] (SRAconst <x.Type> x [d])))
  4757  	for {
  4758  		d := ssa.AuxIntToInt64(v.AuxInt)
  4759  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4760  			break
  4761  		}
  4762  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4763  		x := v_1
  4764  		v.Reset(ssaop.OpARM64InvertFlags)
  4765  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  4766  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4767  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
  4768  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  4769  		v1.AddArg(x)
  4770  		v0.AddArg(v1)
  4771  		v.AddArg(v0)
  4772  		return true
  4773  	}
  4774  	// match: (CMPshiftRA x (MOVDconst [c]) [d])
  4775  	// result: (CMPconst x [c>>uint64(d)])
  4776  	for {
  4777  		d := ssa.AuxIntToInt64(v.AuxInt)
  4778  		x := v_0
  4779  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4780  			break
  4781  		}
  4782  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4783  		v.Reset(ssaop.OpARM64CMPconst)
  4784  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
  4785  		v.AddArg(x)
  4786  		return true
  4787  	}
  4788  	return false
  4789  }
  4790  func rewriteValue_OpARM64CMPshiftRL(v *ssa.Value) bool {
  4791  	v_1 := v.Args[1]
  4792  	v_0 := v.Args[0]
  4793  	b := v.Block
  4794  	// match: (CMPshiftRL (MOVDconst [c]) x [d])
  4795  	// result: (InvertFlags (CMPconst [c] (SRLconst <x.Type> x [d])))
  4796  	for {
  4797  		d := ssa.AuxIntToInt64(v.AuxInt)
  4798  		if v_0.Op != ssaop.OpARM64MOVDconst {
  4799  			break
  4800  		}
  4801  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  4802  		x := v_1
  4803  		v.Reset(ssaop.OpARM64InvertFlags)
  4804  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
  4805  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  4806  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
  4807  		v1.AuxInt = ssa.Int64ToAuxInt(d)
  4808  		v1.AddArg(x)
  4809  		v0.AddArg(v1)
  4810  		v.AddArg(v0)
  4811  		return true
  4812  	}
  4813  	// match: (CMPshiftRL x (MOVDconst [c]) [d])
  4814  	// result: (CMPconst x [int64(uint64(c)>>uint64(d))])
  4815  	for {
  4816  		d := ssa.AuxIntToInt64(v.AuxInt)
  4817  		x := v_0
  4818  		if v_1.Op != ssaop.OpARM64MOVDconst {
  4819  			break
  4820  		}
  4821  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  4822  		v.Reset(ssaop.OpARM64CMPconst)
  4823  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
  4824  		v.AddArg(x)
  4825  		return true
  4826  	}
  4827  	return false
  4828  }
  4829  func rewriteValue_OpARM64CSEL(v *ssa.Value) bool {
  4830  	v_2 := v.Args[2]
  4831  	v_1 := v.Args[1]
  4832  	v_0 := v.Args[0]
  4833  	// match: (CSEL [cc] (MOVDconst [-1]) (MOVDconst [0]) flag)
  4834  	// result: (CSETM [cc] flag)
  4835  	for {
  4836  		cc := ssa.AuxIntToOp(v.AuxInt)
  4837  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != -1 || v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  4838  			break
  4839  		}
  4840  		flag := v_2
  4841  		v.Reset(ssaop.OpARM64CSETM)
  4842  		v.AuxInt = ssa.OpToAuxInt(cc)
  4843  		v.AddArg(flag)
  4844  		return true
  4845  	}
  4846  	// match: (CSEL [cc] (MOVDconst [0]) (MOVDconst [-1]) flag)
  4847  	// result: (CSETM [arm64Negate(cc)] flag)
  4848  	for {
  4849  		cc := ssa.AuxIntToOp(v.AuxInt)
  4850  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 || v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  4851  			break
  4852  		}
  4853  		flag := v_2
  4854  		v.Reset(ssaop.OpARM64CSETM)
  4855  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  4856  		v.AddArg(flag)
  4857  		return true
  4858  	}
  4859  	// match: (CSEL [cc] x (MOVDconst [0]) flag)
  4860  	// result: (CSEL0 [cc] x flag)
  4861  	for {
  4862  		cc := ssa.AuxIntToOp(v.AuxInt)
  4863  		x := v_0
  4864  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  4865  			break
  4866  		}
  4867  		flag := v_2
  4868  		v.Reset(ssaop.OpARM64CSEL0)
  4869  		v.AuxInt = ssa.OpToAuxInt(cc)
  4870  		v.AddArg2(x, flag)
  4871  		return true
  4872  	}
  4873  	// match: (CSEL [cc] (MOVDconst [0]) y flag)
  4874  	// result: (CSEL0 [arm64Negate(cc)] y flag)
  4875  	for {
  4876  		cc := ssa.AuxIntToOp(v.AuxInt)
  4877  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  4878  			break
  4879  		}
  4880  		y := v_1
  4881  		flag := v_2
  4882  		v.Reset(ssaop.OpARM64CSEL0)
  4883  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  4884  		v.AddArg2(y, flag)
  4885  		return true
  4886  	}
  4887  	// match: (CSEL [cc] x (ADDconst [1] a) flag)
  4888  	// result: (CSINC [cc] x a flag)
  4889  	for {
  4890  		cc := ssa.AuxIntToOp(v.AuxInt)
  4891  		x := v_0
  4892  		if v_1.Op != ssaop.OpARM64ADDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  4893  			break
  4894  		}
  4895  		a := v_1.Args[0]
  4896  		flag := v_2
  4897  		v.Reset(ssaop.OpARM64CSINC)
  4898  		v.AuxInt = ssa.OpToAuxInt(cc)
  4899  		v.AddArg3(x, a, flag)
  4900  		return true
  4901  	}
  4902  	// match: (CSEL [cc] (ADDconst [1] a) x flag)
  4903  	// result: (CSINC [arm64Negate(cc)] x a flag)
  4904  	for {
  4905  		cc := ssa.AuxIntToOp(v.AuxInt)
  4906  		if v_0.Op != ssaop.OpARM64ADDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
  4907  			break
  4908  		}
  4909  		a := v_0.Args[0]
  4910  		x := v_1
  4911  		flag := v_2
  4912  		v.Reset(ssaop.OpARM64CSINC)
  4913  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  4914  		v.AddArg3(x, a, flag)
  4915  		return true
  4916  	}
  4917  	// match: (CSEL [cc] x (MVN a) flag)
  4918  	// result: (CSINV [cc] x a flag)
  4919  	for {
  4920  		cc := ssa.AuxIntToOp(v.AuxInt)
  4921  		x := v_0
  4922  		if v_1.Op != ssaop.OpARM64MVN {
  4923  			break
  4924  		}
  4925  		a := v_1.Args[0]
  4926  		flag := v_2
  4927  		v.Reset(ssaop.OpARM64CSINV)
  4928  		v.AuxInt = ssa.OpToAuxInt(cc)
  4929  		v.AddArg3(x, a, flag)
  4930  		return true
  4931  	}
  4932  	// match: (CSEL [cc] (MVN a) x flag)
  4933  	// result: (CSINV [arm64Negate(cc)] x a flag)
  4934  	for {
  4935  		cc := ssa.AuxIntToOp(v.AuxInt)
  4936  		if v_0.Op != ssaop.OpARM64MVN {
  4937  			break
  4938  		}
  4939  		a := v_0.Args[0]
  4940  		x := v_1
  4941  		flag := v_2
  4942  		v.Reset(ssaop.OpARM64CSINV)
  4943  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  4944  		v.AddArg3(x, a, flag)
  4945  		return true
  4946  	}
  4947  	// match: (CSEL [cc] x (NEG a) flag)
  4948  	// result: (CSNEG [cc] x a flag)
  4949  	for {
  4950  		cc := ssa.AuxIntToOp(v.AuxInt)
  4951  		x := v_0
  4952  		if v_1.Op != ssaop.OpARM64NEG {
  4953  			break
  4954  		}
  4955  		a := v_1.Args[0]
  4956  		flag := v_2
  4957  		v.Reset(ssaop.OpARM64CSNEG)
  4958  		v.AuxInt = ssa.OpToAuxInt(cc)
  4959  		v.AddArg3(x, a, flag)
  4960  		return true
  4961  	}
  4962  	// match: (CSEL [cc] (NEG a) x flag)
  4963  	// result: (CSNEG [arm64Negate(cc)] x a flag)
  4964  	for {
  4965  		cc := ssa.AuxIntToOp(v.AuxInt)
  4966  		if v_0.Op != ssaop.OpARM64NEG {
  4967  			break
  4968  		}
  4969  		a := v_0.Args[0]
  4970  		x := v_1
  4971  		flag := v_2
  4972  		v.Reset(ssaop.OpARM64CSNEG)
  4973  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(cc))
  4974  		v.AddArg3(x, a, flag)
  4975  		return true
  4976  	}
  4977  	// match: (CSEL [cc] x y (InvertFlags cmp))
  4978  	// result: (CSEL [arm64Invert(cc)] x y cmp)
  4979  	for {
  4980  		cc := ssa.AuxIntToOp(v.AuxInt)
  4981  		x := v_0
  4982  		y := v_1
  4983  		if v_2.Op != ssaop.OpARM64InvertFlags {
  4984  			break
  4985  		}
  4986  		cmp := v_2.Args[0]
  4987  		v.Reset(ssaop.OpARM64CSEL)
  4988  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  4989  		v.AddArg3(x, y, cmp)
  4990  		return true
  4991  	}
  4992  	// match: (CSEL [cc] x _ flag)
  4993  	// cond: ccARM64Eval(cc, flag) > 0
  4994  	// result: x
  4995  	for {
  4996  		cc := ssa.AuxIntToOp(v.AuxInt)
  4997  		x := v_0
  4998  		flag := v_2
  4999  		if !(ccARM64Eval(cc, flag) > 0) {
  5000  			break
  5001  		}
  5002  		v.CopyOf(x)
  5003  		return true
  5004  	}
  5005  	// match: (CSEL [cc] _ y flag)
  5006  	// cond: ccARM64Eval(cc, flag) < 0
  5007  	// result: y
  5008  	for {
  5009  		cc := ssa.AuxIntToOp(v.AuxInt)
  5010  		y := v_1
  5011  		flag := v_2
  5012  		if !(ccARM64Eval(cc, flag) < 0) {
  5013  			break
  5014  		}
  5015  		v.CopyOf(y)
  5016  		return true
  5017  	}
  5018  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  5019  	// cond: cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil
  5020  	// result: (CSEL [boolval.Op] x y ssa.FlagArg(boolval))
  5021  	for {
  5022  		cc := ssa.AuxIntToOp(v.AuxInt)
  5023  		x := v_0
  5024  		y := v_1
  5025  		if v_2.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_2.AuxInt) != 0 {
  5026  			break
  5027  		}
  5028  		boolval := v_2.Args[0]
  5029  		if !(cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil) {
  5030  			break
  5031  		}
  5032  		v.Reset(ssaop.OpARM64CSEL)
  5033  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
  5034  		v.AddArg3(x, y, ssa.FlagArg(boolval))
  5035  		return true
  5036  	}
  5037  	// match: (CSEL [cc] x y (CMPWconst [0] boolval))
  5038  	// cond: cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil
  5039  	// result: (CSEL [arm64Negate(boolval.Op)] x y ssa.FlagArg(boolval))
  5040  	for {
  5041  		cc := ssa.AuxIntToOp(v.AuxInt)
  5042  		x := v_0
  5043  		y := v_1
  5044  		if v_2.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_2.AuxInt) != 0 {
  5045  			break
  5046  		}
  5047  		boolval := v_2.Args[0]
  5048  		if !(cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil) {
  5049  			break
  5050  		}
  5051  		v.Reset(ssaop.OpARM64CSEL)
  5052  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(boolval.Op))
  5053  		v.AddArg3(x, y, ssa.FlagArg(boolval))
  5054  		return true
  5055  	}
  5056  	return false
  5057  }
  5058  func rewriteValue_OpARM64CSEL0(v *ssa.Value) bool {
  5059  	v_1 := v.Args[1]
  5060  	v_0 := v.Args[0]
  5061  	// match: (CSEL0 [cc] x (InvertFlags cmp))
  5062  	// result: (CSEL0 [arm64Invert(cc)] x cmp)
  5063  	for {
  5064  		cc := ssa.AuxIntToOp(v.AuxInt)
  5065  		x := v_0
  5066  		if v_1.Op != ssaop.OpARM64InvertFlags {
  5067  			break
  5068  		}
  5069  		cmp := v_1.Args[0]
  5070  		v.Reset(ssaop.OpARM64CSEL0)
  5071  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5072  		v.AddArg2(x, cmp)
  5073  		return true
  5074  	}
  5075  	// match: (CSEL0 [cc] x flag)
  5076  	// cond: ccARM64Eval(cc, flag) > 0
  5077  	// result: x
  5078  	for {
  5079  		cc := ssa.AuxIntToOp(v.AuxInt)
  5080  		x := v_0
  5081  		flag := v_1
  5082  		if !(ccARM64Eval(cc, flag) > 0) {
  5083  			break
  5084  		}
  5085  		v.CopyOf(x)
  5086  		return true
  5087  	}
  5088  	// match: (CSEL0 [cc] _ flag)
  5089  	// cond: ccARM64Eval(cc, flag) < 0
  5090  	// result: (MOVDconst [0])
  5091  	for {
  5092  		cc := ssa.AuxIntToOp(v.AuxInt)
  5093  		flag := v_1
  5094  		if !(ccARM64Eval(cc, flag) < 0) {
  5095  			break
  5096  		}
  5097  		v.Reset(ssaop.OpARM64MOVDconst)
  5098  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5099  		return true
  5100  	}
  5101  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  5102  	// cond: cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil
  5103  	// result: (CSEL0 [boolval.Op] x ssa.FlagArg(boolval))
  5104  	for {
  5105  		cc := ssa.AuxIntToOp(v.AuxInt)
  5106  		x := v_0
  5107  		if v_1.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_1.AuxInt) != 0 {
  5108  			break
  5109  		}
  5110  		boolval := v_1.Args[0]
  5111  		if !(cc == ssaop.OpARM64NotEqual && ssa.FlagArg(boolval) != nil) {
  5112  			break
  5113  		}
  5114  		v.Reset(ssaop.OpARM64CSEL0)
  5115  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
  5116  		v.AddArg2(x, ssa.FlagArg(boolval))
  5117  		return true
  5118  	}
  5119  	// match: (CSEL0 [cc] x (CMPWconst [0] boolval))
  5120  	// cond: cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil
  5121  	// result: (CSEL0 [arm64Negate(boolval.Op)] x ssa.FlagArg(boolval))
  5122  	for {
  5123  		cc := ssa.AuxIntToOp(v.AuxInt)
  5124  		x := v_0
  5125  		if v_1.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_1.AuxInt) != 0 {
  5126  			break
  5127  		}
  5128  		boolval := v_1.Args[0]
  5129  		if !(cc == ssaop.OpARM64Equal && ssa.FlagArg(boolval) != nil) {
  5130  			break
  5131  		}
  5132  		v.Reset(ssaop.OpARM64CSEL0)
  5133  		v.AuxInt = ssa.OpToAuxInt(arm64Negate(boolval.Op))
  5134  		v.AddArg2(x, ssa.FlagArg(boolval))
  5135  		return true
  5136  	}
  5137  	return false
  5138  }
  5139  func rewriteValue_OpARM64CSETM(v *ssa.Value) bool {
  5140  	v_0 := v.Args[0]
  5141  	// match: (CSETM [cc] (InvertFlags cmp))
  5142  	// result: (CSETM [arm64Invert(cc)] cmp)
  5143  	for {
  5144  		cc := ssa.AuxIntToOp(v.AuxInt)
  5145  		if v_0.Op != ssaop.OpARM64InvertFlags {
  5146  			break
  5147  		}
  5148  		cmp := v_0.Args[0]
  5149  		v.Reset(ssaop.OpARM64CSETM)
  5150  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5151  		v.AddArg(cmp)
  5152  		return true
  5153  	}
  5154  	// match: (CSETM [cc] flag)
  5155  	// cond: ccARM64Eval(cc, flag) > 0
  5156  	// result: (MOVDconst [-1])
  5157  	for {
  5158  		cc := ssa.AuxIntToOp(v.AuxInt)
  5159  		flag := v_0
  5160  		if !(ccARM64Eval(cc, flag) > 0) {
  5161  			break
  5162  		}
  5163  		v.Reset(ssaop.OpARM64MOVDconst)
  5164  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5165  		return true
  5166  	}
  5167  	// match: (CSETM [cc] flag)
  5168  	// cond: ccARM64Eval(cc, flag) < 0
  5169  	// result: (MOVDconst [0])
  5170  	for {
  5171  		cc := ssa.AuxIntToOp(v.AuxInt)
  5172  		flag := v_0
  5173  		if !(ccARM64Eval(cc, flag) < 0) {
  5174  			break
  5175  		}
  5176  		v.Reset(ssaop.OpARM64MOVDconst)
  5177  		v.AuxInt = ssa.Int64ToAuxInt(0)
  5178  		return true
  5179  	}
  5180  	return false
  5181  }
  5182  func rewriteValue_OpARM64CSINC(v *ssa.Value) bool {
  5183  	v_2 := v.Args[2]
  5184  	v_1 := v.Args[1]
  5185  	v_0 := v.Args[0]
  5186  	// match: (CSINC [cc] x y (InvertFlags cmp))
  5187  	// result: (CSINC [arm64Invert(cc)] x y cmp)
  5188  	for {
  5189  		cc := ssa.AuxIntToOp(v.AuxInt)
  5190  		x := v_0
  5191  		y := v_1
  5192  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5193  			break
  5194  		}
  5195  		cmp := v_2.Args[0]
  5196  		v.Reset(ssaop.OpARM64CSINC)
  5197  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5198  		v.AddArg3(x, y, cmp)
  5199  		return true
  5200  	}
  5201  	// match: (CSINC [cc] x _ flag)
  5202  	// cond: ccARM64Eval(cc, flag) > 0
  5203  	// result: x
  5204  	for {
  5205  		cc := ssa.AuxIntToOp(v.AuxInt)
  5206  		x := v_0
  5207  		flag := v_2
  5208  		if !(ccARM64Eval(cc, flag) > 0) {
  5209  			break
  5210  		}
  5211  		v.CopyOf(x)
  5212  		return true
  5213  	}
  5214  	// match: (CSINC [cc] _ y flag)
  5215  	// cond: ccARM64Eval(cc, flag) < 0
  5216  	// result: (ADDconst [1] y)
  5217  	for {
  5218  		cc := ssa.AuxIntToOp(v.AuxInt)
  5219  		y := v_1
  5220  		flag := v_2
  5221  		if !(ccARM64Eval(cc, flag) < 0) {
  5222  			break
  5223  		}
  5224  		v.Reset(ssaop.OpARM64ADDconst)
  5225  		v.AuxInt = ssa.Int64ToAuxInt(1)
  5226  		v.AddArg(y)
  5227  		return true
  5228  	}
  5229  	return false
  5230  }
  5231  func rewriteValue_OpARM64CSINV(v *ssa.Value) bool {
  5232  	v_2 := v.Args[2]
  5233  	v_1 := v.Args[1]
  5234  	v_0 := v.Args[0]
  5235  	// match: (CSINV [cc] x y (InvertFlags cmp))
  5236  	// result: (CSINV [arm64Invert(cc)] x y cmp)
  5237  	for {
  5238  		cc := ssa.AuxIntToOp(v.AuxInt)
  5239  		x := v_0
  5240  		y := v_1
  5241  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5242  			break
  5243  		}
  5244  		cmp := v_2.Args[0]
  5245  		v.Reset(ssaop.OpARM64CSINV)
  5246  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5247  		v.AddArg3(x, y, cmp)
  5248  		return true
  5249  	}
  5250  	// match: (CSINV [cc] x _ flag)
  5251  	// cond: ccARM64Eval(cc, flag) > 0
  5252  	// result: x
  5253  	for {
  5254  		cc := ssa.AuxIntToOp(v.AuxInt)
  5255  		x := v_0
  5256  		flag := v_2
  5257  		if !(ccARM64Eval(cc, flag) > 0) {
  5258  			break
  5259  		}
  5260  		v.CopyOf(x)
  5261  		return true
  5262  	}
  5263  	// match: (CSINV [cc] _ y flag)
  5264  	// cond: ccARM64Eval(cc, flag) < 0
  5265  	// result: (Not y)
  5266  	for {
  5267  		cc := ssa.AuxIntToOp(v.AuxInt)
  5268  		y := v_1
  5269  		flag := v_2
  5270  		if !(ccARM64Eval(cc, flag) < 0) {
  5271  			break
  5272  		}
  5273  		v.Reset(ssaop.OpNot)
  5274  		v.AddArg(y)
  5275  		return true
  5276  	}
  5277  	return false
  5278  }
  5279  func rewriteValue_OpARM64CSNEG(v *ssa.Value) bool {
  5280  	v_2 := v.Args[2]
  5281  	v_1 := v.Args[1]
  5282  	v_0 := v.Args[0]
  5283  	// match: (CSNEG [cc] x y (InvertFlags cmp))
  5284  	// result: (CSNEG [arm64Invert(cc)] x y cmp)
  5285  	for {
  5286  		cc := ssa.AuxIntToOp(v.AuxInt)
  5287  		x := v_0
  5288  		y := v_1
  5289  		if v_2.Op != ssaop.OpARM64InvertFlags {
  5290  			break
  5291  		}
  5292  		cmp := v_2.Args[0]
  5293  		v.Reset(ssaop.OpARM64CSNEG)
  5294  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  5295  		v.AddArg3(x, y, cmp)
  5296  		return true
  5297  	}
  5298  	// match: (CSNEG [cc] x _ flag)
  5299  	// cond: ccARM64Eval(cc, flag) > 0
  5300  	// result: x
  5301  	for {
  5302  		cc := ssa.AuxIntToOp(v.AuxInt)
  5303  		x := v_0
  5304  		flag := v_2
  5305  		if !(ccARM64Eval(cc, flag) > 0) {
  5306  			break
  5307  		}
  5308  		v.CopyOf(x)
  5309  		return true
  5310  	}
  5311  	// match: (CSNEG [cc] _ y flag)
  5312  	// cond: ccARM64Eval(cc, flag) < 0
  5313  	// result: (NEG y)
  5314  	for {
  5315  		cc := ssa.AuxIntToOp(v.AuxInt)
  5316  		y := v_1
  5317  		flag := v_2
  5318  		if !(ccARM64Eval(cc, flag) < 0) {
  5319  			break
  5320  		}
  5321  		v.Reset(ssaop.OpARM64NEG)
  5322  		v.AddArg(y)
  5323  		return true
  5324  	}
  5325  	return false
  5326  }
  5327  func rewriteValue_OpARM64DIV(v *ssa.Value) bool {
  5328  	v_1 := v.Args[1]
  5329  	v_0 := v.Args[0]
  5330  	// match: (DIV (MOVDconst [c]) (MOVDconst [d]))
  5331  	// cond: d != 0
  5332  	// result: (MOVDconst [c/d])
  5333  	for {
  5334  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5335  			break
  5336  		}
  5337  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5338  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5339  			break
  5340  		}
  5341  		d := ssa.AuxIntToInt64(v_1.AuxInt)
  5342  		if !(d != 0) {
  5343  			break
  5344  		}
  5345  		v.Reset(ssaop.OpARM64MOVDconst)
  5346  		v.AuxInt = ssa.Int64ToAuxInt(c / d)
  5347  		return true
  5348  	}
  5349  	return false
  5350  }
  5351  func rewriteValue_OpARM64DIVW(v *ssa.Value) bool {
  5352  	v_1 := v.Args[1]
  5353  	v_0 := v.Args[0]
  5354  	// match: (DIVW (MOVDconst [c]) (MOVDconst [d]))
  5355  	// cond: d != 0
  5356  	// result: (MOVDconst [int64(uint32(int32(c)/int32(d)))])
  5357  	for {
  5358  		if v_0.Op != ssaop.OpARM64MOVDconst {
  5359  			break
  5360  		}
  5361  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  5362  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5363  			break
  5364  		}
  5365  		d := ssa.AuxIntToInt64(v_1.AuxInt)
  5366  		if !(d != 0) {
  5367  			break
  5368  		}
  5369  		v.Reset(ssaop.OpARM64MOVDconst)
  5370  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(int32(c) / int32(d))))
  5371  		return true
  5372  	}
  5373  	return false
  5374  }
  5375  func rewriteValue_OpARM64EON(v *ssa.Value) bool {
  5376  	v_1 := v.Args[1]
  5377  	v_0 := v.Args[0]
  5378  	// match: (EON x (MOVDconst [c]))
  5379  	// result: (XORconst [^c] x)
  5380  	for {
  5381  		x := v_0
  5382  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5383  			break
  5384  		}
  5385  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5386  		v.Reset(ssaop.OpARM64XORconst)
  5387  		v.AuxInt = ssa.Int64ToAuxInt(^c)
  5388  		v.AddArg(x)
  5389  		return true
  5390  	}
  5391  	// match: (EON x x)
  5392  	// result: (MOVDconst [-1])
  5393  	for {
  5394  		x := v_0
  5395  		if x != v_1 {
  5396  			break
  5397  		}
  5398  		v.Reset(ssaop.OpARM64MOVDconst)
  5399  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5400  		return true
  5401  	}
  5402  	// match: (EON x0 x1:(SLLconst [c] y))
  5403  	// cond: ssa.ClobberIfDead(x1)
  5404  	// result: (EONshiftLL x0 y [c])
  5405  	for {
  5406  		x0 := v_0
  5407  		x1 := v_1
  5408  		if x1.Op != ssaop.OpARM64SLLconst {
  5409  			break
  5410  		}
  5411  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5412  		y := x1.Args[0]
  5413  		if !(ssa.ClobberIfDead(x1)) {
  5414  			break
  5415  		}
  5416  		v.Reset(ssaop.OpARM64EONshiftLL)
  5417  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5418  		v.AddArg2(x0, y)
  5419  		return true
  5420  	}
  5421  	// match: (EON x0 x1:(SRLconst [c] y))
  5422  	// cond: ssa.ClobberIfDead(x1)
  5423  	// result: (EONshiftRL x0 y [c])
  5424  	for {
  5425  		x0 := v_0
  5426  		x1 := v_1
  5427  		if x1.Op != ssaop.OpARM64SRLconst {
  5428  			break
  5429  		}
  5430  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5431  		y := x1.Args[0]
  5432  		if !(ssa.ClobberIfDead(x1)) {
  5433  			break
  5434  		}
  5435  		v.Reset(ssaop.OpARM64EONshiftRL)
  5436  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5437  		v.AddArg2(x0, y)
  5438  		return true
  5439  	}
  5440  	// match: (EON x0 x1:(SRAconst [c] y))
  5441  	// cond: ssa.ClobberIfDead(x1)
  5442  	// result: (EONshiftRA x0 y [c])
  5443  	for {
  5444  		x0 := v_0
  5445  		x1 := v_1
  5446  		if x1.Op != ssaop.OpARM64SRAconst {
  5447  			break
  5448  		}
  5449  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5450  		y := x1.Args[0]
  5451  		if !(ssa.ClobberIfDead(x1)) {
  5452  			break
  5453  		}
  5454  		v.Reset(ssaop.OpARM64EONshiftRA)
  5455  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5456  		v.AddArg2(x0, y)
  5457  		return true
  5458  	}
  5459  	// match: (EON x0 x1:(RORconst [c] y))
  5460  	// cond: ssa.ClobberIfDead(x1)
  5461  	// result: (EONshiftRO x0 y [c])
  5462  	for {
  5463  		x0 := v_0
  5464  		x1 := v_1
  5465  		if x1.Op != ssaop.OpARM64RORconst {
  5466  			break
  5467  		}
  5468  		c := ssa.AuxIntToInt64(x1.AuxInt)
  5469  		y := x1.Args[0]
  5470  		if !(ssa.ClobberIfDead(x1)) {
  5471  			break
  5472  		}
  5473  		v.Reset(ssaop.OpARM64EONshiftRO)
  5474  		v.AuxInt = ssa.Int64ToAuxInt(c)
  5475  		v.AddArg2(x0, y)
  5476  		return true
  5477  	}
  5478  	return false
  5479  }
  5480  func rewriteValue_OpARM64EONshiftLL(v *ssa.Value) bool {
  5481  	v_1 := v.Args[1]
  5482  	v_0 := v.Args[0]
  5483  	// match: (EONshiftLL x (MOVDconst [c]) [d])
  5484  	// result: (XORconst x [^int64(uint64(c)<<uint64(d))])
  5485  	for {
  5486  		d := ssa.AuxIntToInt64(v.AuxInt)
  5487  		x := v_0
  5488  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5489  			break
  5490  		}
  5491  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5492  		v.Reset(ssaop.OpARM64XORconst)
  5493  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
  5494  		v.AddArg(x)
  5495  		return true
  5496  	}
  5497  	// match: (EONshiftLL (SLLconst x [c]) x [c])
  5498  	// result: (MOVDconst [-1])
  5499  	for {
  5500  		c := ssa.AuxIntToInt64(v.AuxInt)
  5501  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5502  			break
  5503  		}
  5504  		x := v_0.Args[0]
  5505  		if x != v_1 {
  5506  			break
  5507  		}
  5508  		v.Reset(ssaop.OpARM64MOVDconst)
  5509  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5510  		return true
  5511  	}
  5512  	return false
  5513  }
  5514  func rewriteValue_OpARM64EONshiftRA(v *ssa.Value) bool {
  5515  	v_1 := v.Args[1]
  5516  	v_0 := v.Args[0]
  5517  	// match: (EONshiftRA x (MOVDconst [c]) [d])
  5518  	// result: (XORconst x [^(c>>uint64(d))])
  5519  	for {
  5520  		d := ssa.AuxIntToInt64(v.AuxInt)
  5521  		x := v_0
  5522  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5523  			break
  5524  		}
  5525  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5526  		v.Reset(ssaop.OpARM64XORconst)
  5527  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
  5528  		v.AddArg(x)
  5529  		return true
  5530  	}
  5531  	// match: (EONshiftRA (SRAconst x [c]) x [c])
  5532  	// result: (MOVDconst [-1])
  5533  	for {
  5534  		c := ssa.AuxIntToInt64(v.AuxInt)
  5535  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5536  			break
  5537  		}
  5538  		x := v_0.Args[0]
  5539  		if x != v_1 {
  5540  			break
  5541  		}
  5542  		v.Reset(ssaop.OpARM64MOVDconst)
  5543  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5544  		return true
  5545  	}
  5546  	return false
  5547  }
  5548  func rewriteValue_OpARM64EONshiftRL(v *ssa.Value) bool {
  5549  	v_1 := v.Args[1]
  5550  	v_0 := v.Args[0]
  5551  	// match: (EONshiftRL x (MOVDconst [c]) [d])
  5552  	// result: (XORconst x [^int64(uint64(c)>>uint64(d))])
  5553  	for {
  5554  		d := ssa.AuxIntToInt64(v.AuxInt)
  5555  		x := v_0
  5556  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5557  			break
  5558  		}
  5559  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5560  		v.Reset(ssaop.OpARM64XORconst)
  5561  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
  5562  		v.AddArg(x)
  5563  		return true
  5564  	}
  5565  	// match: (EONshiftRL (SRLconst x [c]) x [c])
  5566  	// result: (MOVDconst [-1])
  5567  	for {
  5568  		c := ssa.AuxIntToInt64(v.AuxInt)
  5569  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5570  			break
  5571  		}
  5572  		x := v_0.Args[0]
  5573  		if x != v_1 {
  5574  			break
  5575  		}
  5576  		v.Reset(ssaop.OpARM64MOVDconst)
  5577  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5578  		return true
  5579  	}
  5580  	return false
  5581  }
  5582  func rewriteValue_OpARM64EONshiftRO(v *ssa.Value) bool {
  5583  	v_1 := v.Args[1]
  5584  	v_0 := v.Args[0]
  5585  	// match: (EONshiftRO x (MOVDconst [c]) [d])
  5586  	// result: (XORconst x [^rotateRight64(c, d)])
  5587  	for {
  5588  		d := ssa.AuxIntToInt64(v.AuxInt)
  5589  		x := v_0
  5590  		if v_1.Op != ssaop.OpARM64MOVDconst {
  5591  			break
  5592  		}
  5593  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  5594  		v.Reset(ssaop.OpARM64XORconst)
  5595  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
  5596  		v.AddArg(x)
  5597  		return true
  5598  	}
  5599  	// match: (EONshiftRO (RORconst x [c]) x [c])
  5600  	// result: (MOVDconst [-1])
  5601  	for {
  5602  		c := ssa.AuxIntToInt64(v.AuxInt)
  5603  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
  5604  			break
  5605  		}
  5606  		x := v_0.Args[0]
  5607  		if x != v_1 {
  5608  			break
  5609  		}
  5610  		v.Reset(ssaop.OpARM64MOVDconst)
  5611  		v.AuxInt = ssa.Int64ToAuxInt(-1)
  5612  		return true
  5613  	}
  5614  	return false
  5615  }
  5616  func rewriteValue_OpARM64Equal(v *ssa.Value) bool {
  5617  	v_0 := v.Args[0]
  5618  	b := v.Block
  5619  	// match: (Equal (CMPconst [0] z:(AND x y)))
  5620  	// cond: z.Uses == 1
  5621  	// result: (Equal (TST x y))
  5622  	for {
  5623  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5624  			break
  5625  		}
  5626  		z := v_0.Args[0]
  5627  		if z.Op != ssaop.OpARM64AND {
  5628  			break
  5629  		}
  5630  		y := z.Args[1]
  5631  		x := z.Args[0]
  5632  		if !(z.Uses == 1) {
  5633  			break
  5634  		}
  5635  		v.Reset(ssaop.OpARM64Equal)
  5636  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  5637  		v0.AddArg2(x, y)
  5638  		v.AddArg(v0)
  5639  		return true
  5640  	}
  5641  	// match: (Equal (CMPWconst [0] x:(ANDconst [c] y)))
  5642  	// cond: x.Uses == 1
  5643  	// result: (Equal (TSTWconst [int32(c)] y))
  5644  	for {
  5645  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5646  			break
  5647  		}
  5648  		x := v_0.Args[0]
  5649  		if x.Op != ssaop.OpARM64ANDconst {
  5650  			break
  5651  		}
  5652  		c := ssa.AuxIntToInt64(x.AuxInt)
  5653  		y := x.Args[0]
  5654  		if !(x.Uses == 1) {
  5655  			break
  5656  		}
  5657  		v.Reset(ssaop.OpARM64Equal)
  5658  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  5659  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  5660  		v0.AddArg(y)
  5661  		v.AddArg(v0)
  5662  		return true
  5663  	}
  5664  	// match: (Equal (CMPWconst [0] z:(AND x y)))
  5665  	// cond: z.Uses == 1
  5666  	// result: (Equal (TSTW x y))
  5667  	for {
  5668  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5669  			break
  5670  		}
  5671  		z := v_0.Args[0]
  5672  		if z.Op != ssaop.OpARM64AND {
  5673  			break
  5674  		}
  5675  		y := z.Args[1]
  5676  		x := z.Args[0]
  5677  		if !(z.Uses == 1) {
  5678  			break
  5679  		}
  5680  		v.Reset(ssaop.OpARM64Equal)
  5681  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  5682  		v0.AddArg2(x, y)
  5683  		v.AddArg(v0)
  5684  		return true
  5685  	}
  5686  	// match: (Equal (CMPconst [0] x:(ANDconst [c] y)))
  5687  	// cond: x.Uses == 1
  5688  	// result: (Equal (TSTconst [c] y))
  5689  	for {
  5690  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5691  			break
  5692  		}
  5693  		x := v_0.Args[0]
  5694  		if x.Op != ssaop.OpARM64ANDconst {
  5695  			break
  5696  		}
  5697  		c := ssa.AuxIntToInt64(x.AuxInt)
  5698  		y := x.Args[0]
  5699  		if !(x.Uses == 1) {
  5700  			break
  5701  		}
  5702  		v.Reset(ssaop.OpARM64Equal)
  5703  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  5704  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5705  		v0.AddArg(y)
  5706  		v.AddArg(v0)
  5707  		return true
  5708  	}
  5709  	// match: (Equal (CMP x z:(NEG y)))
  5710  	// cond: z.Uses == 1
  5711  	// result: (Equal (CMN x y))
  5712  	for {
  5713  		if v_0.Op != ssaop.OpARM64CMP {
  5714  			break
  5715  		}
  5716  		_ = v_0.Args[1]
  5717  		x := v_0.Args[0]
  5718  		z := v_0.Args[1]
  5719  		if z.Op != ssaop.OpARM64NEG {
  5720  			break
  5721  		}
  5722  		y := z.Args[0]
  5723  		if !(z.Uses == 1) {
  5724  			break
  5725  		}
  5726  		v.Reset(ssaop.OpARM64Equal)
  5727  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  5728  		v0.AddArg2(x, y)
  5729  		v.AddArg(v0)
  5730  		return true
  5731  	}
  5732  	// match: (Equal (CMPW x z:(NEG y)))
  5733  	// cond: z.Uses == 1
  5734  	// result: (Equal (CMNW x y))
  5735  	for {
  5736  		if v_0.Op != ssaop.OpARM64CMPW {
  5737  			break
  5738  		}
  5739  		_ = v_0.Args[1]
  5740  		x := v_0.Args[0]
  5741  		z := v_0.Args[1]
  5742  		if z.Op != ssaop.OpARM64NEG {
  5743  			break
  5744  		}
  5745  		y := z.Args[0]
  5746  		if !(z.Uses == 1) {
  5747  			break
  5748  		}
  5749  		v.Reset(ssaop.OpARM64Equal)
  5750  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  5751  		v0.AddArg2(x, y)
  5752  		v.AddArg(v0)
  5753  		return true
  5754  	}
  5755  	// match: (Equal (CMPconst [0] x:(ADDconst [c] y)))
  5756  	// cond: x.Uses == 1
  5757  	// result: (Equal (CMNconst [c] y))
  5758  	for {
  5759  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5760  			break
  5761  		}
  5762  		x := v_0.Args[0]
  5763  		if x.Op != ssaop.OpARM64ADDconst {
  5764  			break
  5765  		}
  5766  		c := ssa.AuxIntToInt64(x.AuxInt)
  5767  		y := x.Args[0]
  5768  		if !(x.Uses == 1) {
  5769  			break
  5770  		}
  5771  		v.Reset(ssaop.OpARM64Equal)
  5772  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  5773  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  5774  		v0.AddArg(y)
  5775  		v.AddArg(v0)
  5776  		return true
  5777  	}
  5778  	// match: (Equal (CMPWconst [0] x:(ADDconst [c] y)))
  5779  	// cond: x.Uses == 1
  5780  	// result: (Equal (CMNWconst [int32(c)] y))
  5781  	for {
  5782  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5783  			break
  5784  		}
  5785  		x := v_0.Args[0]
  5786  		if x.Op != ssaop.OpARM64ADDconst {
  5787  			break
  5788  		}
  5789  		c := ssa.AuxIntToInt64(x.AuxInt)
  5790  		y := x.Args[0]
  5791  		if !(x.Uses == 1) {
  5792  			break
  5793  		}
  5794  		v.Reset(ssaop.OpARM64Equal)
  5795  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  5796  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  5797  		v0.AddArg(y)
  5798  		v.AddArg(v0)
  5799  		return true
  5800  	}
  5801  	// match: (Equal (CMPconst [0] z:(ADD x y)))
  5802  	// cond: z.Uses == 1
  5803  	// result: (Equal (CMN x y))
  5804  	for {
  5805  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5806  			break
  5807  		}
  5808  		z := v_0.Args[0]
  5809  		if z.Op != ssaop.OpARM64ADD {
  5810  			break
  5811  		}
  5812  		y := z.Args[1]
  5813  		x := z.Args[0]
  5814  		if !(z.Uses == 1) {
  5815  			break
  5816  		}
  5817  		v.Reset(ssaop.OpARM64Equal)
  5818  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  5819  		v0.AddArg2(x, y)
  5820  		v.AddArg(v0)
  5821  		return true
  5822  	}
  5823  	// match: (Equal (CMPWconst [0] z:(ADD x y)))
  5824  	// cond: z.Uses == 1
  5825  	// result: (Equal (CMNW x y))
  5826  	for {
  5827  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5828  			break
  5829  		}
  5830  		z := v_0.Args[0]
  5831  		if z.Op != ssaop.OpARM64ADD {
  5832  			break
  5833  		}
  5834  		y := z.Args[1]
  5835  		x := z.Args[0]
  5836  		if !(z.Uses == 1) {
  5837  			break
  5838  		}
  5839  		v.Reset(ssaop.OpARM64Equal)
  5840  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  5841  		v0.AddArg2(x, y)
  5842  		v.AddArg(v0)
  5843  		return true
  5844  	}
  5845  	// match: (Equal (CMPconst [0] z:(MADD a x y)))
  5846  	// cond: z.Uses == 1
  5847  	// result: (Equal (CMN a (MUL <x.Type> x y)))
  5848  	for {
  5849  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5850  			break
  5851  		}
  5852  		z := v_0.Args[0]
  5853  		if z.Op != ssaop.OpARM64MADD {
  5854  			break
  5855  		}
  5856  		y := z.Args[2]
  5857  		a := z.Args[0]
  5858  		x := z.Args[1]
  5859  		if !(z.Uses == 1) {
  5860  			break
  5861  		}
  5862  		v.Reset(ssaop.OpARM64Equal)
  5863  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  5864  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  5865  		v1.AddArg2(x, y)
  5866  		v0.AddArg2(a, v1)
  5867  		v.AddArg(v0)
  5868  		return true
  5869  	}
  5870  	// match: (Equal (CMPWconst [0] z:(MADDW a x y)))
  5871  	// cond: z.Uses == 1
  5872  	// result: (Equal (CMNW a (MULW <x.Type> x y)))
  5873  	for {
  5874  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5875  			break
  5876  		}
  5877  		z := v_0.Args[0]
  5878  		if z.Op != ssaop.OpARM64MADDW {
  5879  			break
  5880  		}
  5881  		y := z.Args[2]
  5882  		a := z.Args[0]
  5883  		x := z.Args[1]
  5884  		if !(z.Uses == 1) {
  5885  			break
  5886  		}
  5887  		v.Reset(ssaop.OpARM64Equal)
  5888  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  5889  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  5890  		v1.AddArg2(x, y)
  5891  		v0.AddArg2(a, v1)
  5892  		v.AddArg(v0)
  5893  		return true
  5894  	}
  5895  	// match: (Equal (CMPconst [0] z:(MSUB a x y)))
  5896  	// cond: z.Uses == 1
  5897  	// result: (Equal (CMP a (MUL <x.Type> x y)))
  5898  	for {
  5899  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  5900  			break
  5901  		}
  5902  		z := v_0.Args[0]
  5903  		if z.Op != ssaop.OpARM64MSUB {
  5904  			break
  5905  		}
  5906  		y := z.Args[2]
  5907  		a := z.Args[0]
  5908  		x := z.Args[1]
  5909  		if !(z.Uses == 1) {
  5910  			break
  5911  		}
  5912  		v.Reset(ssaop.OpARM64Equal)
  5913  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
  5914  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  5915  		v1.AddArg2(x, y)
  5916  		v0.AddArg2(a, v1)
  5917  		v.AddArg(v0)
  5918  		return true
  5919  	}
  5920  	// match: (Equal (CMPWconst [0] z:(MSUBW a x y)))
  5921  	// cond: z.Uses == 1
  5922  	// result: (Equal (CMPW a (MULW <x.Type> x y)))
  5923  	for {
  5924  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  5925  			break
  5926  		}
  5927  		z := v_0.Args[0]
  5928  		if z.Op != ssaop.OpARM64MSUBW {
  5929  			break
  5930  		}
  5931  		y := z.Args[2]
  5932  		a := z.Args[0]
  5933  		x := z.Args[1]
  5934  		if !(z.Uses == 1) {
  5935  			break
  5936  		}
  5937  		v.Reset(ssaop.OpARM64Equal)
  5938  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
  5939  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  5940  		v1.AddArg2(x, y)
  5941  		v0.AddArg2(a, v1)
  5942  		v.AddArg(v0)
  5943  		return true
  5944  	}
  5945  	// match: (Equal (FlagConstant [fc]))
  5946  	// result: (MOVDconst [ssa.B2i(fc.Eq())])
  5947  	for {
  5948  		if v_0.Op != ssaop.OpARM64FlagConstant {
  5949  			break
  5950  		}
  5951  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  5952  		v.Reset(ssaop.OpARM64MOVDconst)
  5953  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Eq()))
  5954  		return true
  5955  	}
  5956  	// match: (Equal (InvertFlags x))
  5957  	// result: (Equal x)
  5958  	for {
  5959  		if v_0.Op != ssaop.OpARM64InvertFlags {
  5960  			break
  5961  		}
  5962  		x := v_0.Args[0]
  5963  		v.Reset(ssaop.OpARM64Equal)
  5964  		v.AddArg(x)
  5965  		return true
  5966  	}
  5967  	return false
  5968  }
  5969  func rewriteValue_OpARM64FADDD(v *ssa.Value) bool {
  5970  	v_1 := v.Args[1]
  5971  	v_0 := v.Args[0]
  5972  	// match: (FADDD a (FMULD x y))
  5973  	// cond: a.Block.Func.UseFMA(v)
  5974  	// result: (FMADDD a x y)
  5975  	for {
  5976  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5977  			a := v_0
  5978  			if v_1.Op != ssaop.OpARM64FMULD {
  5979  				continue
  5980  			}
  5981  			y := v_1.Args[1]
  5982  			x := v_1.Args[0]
  5983  			if !(a.Block.Func.UseFMA(v)) {
  5984  				continue
  5985  			}
  5986  			v.Reset(ssaop.OpARM64FMADDD)
  5987  			v.AddArg3(a, x, y)
  5988  			return true
  5989  		}
  5990  		break
  5991  	}
  5992  	// match: (FADDD a (FNMULD x y))
  5993  	// cond: a.Block.Func.UseFMA(v)
  5994  	// result: (FMSUBD a x y)
  5995  	for {
  5996  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  5997  			a := v_0
  5998  			if v_1.Op != ssaop.OpARM64FNMULD {
  5999  				continue
  6000  			}
  6001  			y := v_1.Args[1]
  6002  			x := v_1.Args[0]
  6003  			if !(a.Block.Func.UseFMA(v)) {
  6004  				continue
  6005  			}
  6006  			v.Reset(ssaop.OpARM64FMSUBD)
  6007  			v.AddArg3(a, x, y)
  6008  			return true
  6009  		}
  6010  		break
  6011  	}
  6012  	return false
  6013  }
  6014  func rewriteValue_OpARM64FADDS(v *ssa.Value) bool {
  6015  	v_1 := v.Args[1]
  6016  	v_0 := v.Args[0]
  6017  	// match: (FADDS a (FMULS x y))
  6018  	// cond: a.Block.Func.UseFMA(v)
  6019  	// result: (FMADDS a x y)
  6020  	for {
  6021  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6022  			a := v_0
  6023  			if v_1.Op != ssaop.OpARM64FMULS {
  6024  				continue
  6025  			}
  6026  			y := v_1.Args[1]
  6027  			x := v_1.Args[0]
  6028  			if !(a.Block.Func.UseFMA(v)) {
  6029  				continue
  6030  			}
  6031  			v.Reset(ssaop.OpARM64FMADDS)
  6032  			v.AddArg3(a, x, y)
  6033  			return true
  6034  		}
  6035  		break
  6036  	}
  6037  	// match: (FADDS a (FNMULS x y))
  6038  	// cond: a.Block.Func.UseFMA(v)
  6039  	// result: (FMSUBS a x y)
  6040  	for {
  6041  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  6042  			a := v_0
  6043  			if v_1.Op != ssaop.OpARM64FNMULS {
  6044  				continue
  6045  			}
  6046  			y := v_1.Args[1]
  6047  			x := v_1.Args[0]
  6048  			if !(a.Block.Func.UseFMA(v)) {
  6049  				continue
  6050  			}
  6051  			v.Reset(ssaop.OpARM64FMSUBS)
  6052  			v.AddArg3(a, x, y)
  6053  			return true
  6054  		}
  6055  		break
  6056  	}
  6057  	return false
  6058  }
  6059  func rewriteValue_OpARM64FCMPD(v *ssa.Value) bool {
  6060  	v_1 := v.Args[1]
  6061  	v_0 := v.Args[0]
  6062  	b := v.Block
  6063  	// match: (FCMPD x (FMOVDconst [0]))
  6064  	// result: (FCMPD0 x)
  6065  	for {
  6066  		x := v_0
  6067  		if v_1.Op != ssaop.OpARM64FMOVDconst || ssa.AuxIntToFloat64(v_1.AuxInt) != 0 {
  6068  			break
  6069  		}
  6070  		v.Reset(ssaop.OpARM64FCMPD0)
  6071  		v.AddArg(x)
  6072  		return true
  6073  	}
  6074  	// match: (FCMPD (FMOVDconst [0]) x)
  6075  	// result: (InvertFlags (FCMPD0 x))
  6076  	for {
  6077  		if v_0.Op != ssaop.OpARM64FMOVDconst || ssa.AuxIntToFloat64(v_0.AuxInt) != 0 {
  6078  			break
  6079  		}
  6080  		x := v_1
  6081  		v.Reset(ssaop.OpARM64InvertFlags)
  6082  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD0, types.TypeFlags)
  6083  		v0.AddArg(x)
  6084  		v.AddArg(v0)
  6085  		return true
  6086  	}
  6087  	return false
  6088  }
  6089  func rewriteValue_OpARM64FCMPS(v *ssa.Value) bool {
  6090  	v_1 := v.Args[1]
  6091  	v_0 := v.Args[0]
  6092  	b := v.Block
  6093  	// match: (FCMPS x (FMOVSconst [0]))
  6094  	// result: (FCMPS0 x)
  6095  	for {
  6096  		x := v_0
  6097  		if v_1.Op != ssaop.OpARM64FMOVSconst || ssa.AuxIntToFloat64(v_1.AuxInt) != 0 {
  6098  			break
  6099  		}
  6100  		v.Reset(ssaop.OpARM64FCMPS0)
  6101  		v.AddArg(x)
  6102  		return true
  6103  	}
  6104  	// match: (FCMPS (FMOVSconst [0]) x)
  6105  	// result: (InvertFlags (FCMPS0 x))
  6106  	for {
  6107  		if v_0.Op != ssaop.OpARM64FMOVSconst || ssa.AuxIntToFloat64(v_0.AuxInt) != 0 {
  6108  			break
  6109  		}
  6110  		x := v_1
  6111  		v.Reset(ssaop.OpARM64InvertFlags)
  6112  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS0, types.TypeFlags)
  6113  		v0.AddArg(x)
  6114  		v.AddArg(v0)
  6115  		return true
  6116  	}
  6117  	return false
  6118  }
  6119  func rewriteValue_OpARM64FCSELD(v *ssa.Value) bool {
  6120  	v_2 := v.Args[2]
  6121  	v_1 := v.Args[1]
  6122  	v_0 := v.Args[0]
  6123  	// match: (FCSELD [cc] x y (InvertFlags cmp))
  6124  	// result: (FCSELD [arm64Invert(cc)] x y cmp)
  6125  	for {
  6126  		cc := ssa.AuxIntToOp(v.AuxInt)
  6127  		x := v_0
  6128  		y := v_1
  6129  		if v_2.Op != ssaop.OpARM64InvertFlags {
  6130  			break
  6131  		}
  6132  		cmp := v_2.Args[0]
  6133  		v.Reset(ssaop.OpARM64FCSELD)
  6134  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  6135  		v.AddArg3(x, y, cmp)
  6136  		return true
  6137  	}
  6138  	return false
  6139  }
  6140  func rewriteValue_OpARM64FCSELS(v *ssa.Value) bool {
  6141  	v_2 := v.Args[2]
  6142  	v_1 := v.Args[1]
  6143  	v_0 := v.Args[0]
  6144  	// match: (FCSELS [cc] x y (InvertFlags cmp))
  6145  	// result: (FCSELS [arm64Invert(cc)] x y cmp)
  6146  	for {
  6147  		cc := ssa.AuxIntToOp(v.AuxInt)
  6148  		x := v_0
  6149  		y := v_1
  6150  		if v_2.Op != ssaop.OpARM64InvertFlags {
  6151  			break
  6152  		}
  6153  		cmp := v_2.Args[0]
  6154  		v.Reset(ssaop.OpARM64FCSELS)
  6155  		v.AuxInt = ssa.OpToAuxInt(arm64Invert(cc))
  6156  		v.AddArg3(x, y, cmp)
  6157  		return true
  6158  	}
  6159  	return false
  6160  }
  6161  func rewriteValue_OpARM64FCVTDS(v *ssa.Value) bool {
  6162  	v_0 := v.Args[0]
  6163  	// match: (FCVTDS (FABSD (FCVTSD x)))
  6164  	// result: (FABSS x)
  6165  	for {
  6166  		if v_0.Op != ssaop.OpARM64FABSD {
  6167  			break
  6168  		}
  6169  		v_0_0 := v_0.Args[0]
  6170  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6171  			break
  6172  		}
  6173  		x := v_0_0.Args[0]
  6174  		v.Reset(ssaop.OpARM64FABSS)
  6175  		v.AddArg(x)
  6176  		return true
  6177  	}
  6178  	// match: (FCVTDS (FSQRTD (FCVTSD x)))
  6179  	// result: (FSQRTS x)
  6180  	for {
  6181  		if v_0.Op != ssaop.OpARM64FSQRTD {
  6182  			break
  6183  		}
  6184  		v_0_0 := v_0.Args[0]
  6185  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6186  			break
  6187  		}
  6188  		x := v_0_0.Args[0]
  6189  		v.Reset(ssaop.OpARM64FSQRTS)
  6190  		v.AddArg(x)
  6191  		return true
  6192  	}
  6193  	// match: (FCVTDS (FRINTPD (FCVTSD x)))
  6194  	// result: (FRINTPS x)
  6195  	for {
  6196  		if v_0.Op != ssaop.OpARM64FRINTPD {
  6197  			break
  6198  		}
  6199  		v_0_0 := v_0.Args[0]
  6200  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6201  			break
  6202  		}
  6203  		x := v_0_0.Args[0]
  6204  		v.Reset(ssaop.OpARM64FRINTPS)
  6205  		v.AddArg(x)
  6206  		return true
  6207  	}
  6208  	// match: (FCVTDS (FRINTMD (FCVTSD x)))
  6209  	// result: (FRINTMS x)
  6210  	for {
  6211  		if v_0.Op != ssaop.OpARM64FRINTMD {
  6212  			break
  6213  		}
  6214  		v_0_0 := v_0.Args[0]
  6215  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6216  			break
  6217  		}
  6218  		x := v_0_0.Args[0]
  6219  		v.Reset(ssaop.OpARM64FRINTMS)
  6220  		v.AddArg(x)
  6221  		return true
  6222  	}
  6223  	// match: (FCVTDS (FRINTAD (FCVTSD x)))
  6224  	// result: (FRINTAS x)
  6225  	for {
  6226  		if v_0.Op != ssaop.OpARM64FRINTAD {
  6227  			break
  6228  		}
  6229  		v_0_0 := v_0.Args[0]
  6230  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6231  			break
  6232  		}
  6233  		x := v_0_0.Args[0]
  6234  		v.Reset(ssaop.OpARM64FRINTAS)
  6235  		v.AddArg(x)
  6236  		return true
  6237  	}
  6238  	// match: (FCVTDS (FRINTND (FCVTSD x)))
  6239  	// result: (FRINTNS x)
  6240  	for {
  6241  		if v_0.Op != ssaop.OpARM64FRINTND {
  6242  			break
  6243  		}
  6244  		v_0_0 := v_0.Args[0]
  6245  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6246  			break
  6247  		}
  6248  		x := v_0_0.Args[0]
  6249  		v.Reset(ssaop.OpARM64FRINTNS)
  6250  		v.AddArg(x)
  6251  		return true
  6252  	}
  6253  	// match: (FCVTDS (FRINTZD (FCVTSD x)))
  6254  	// result: (FRINTZS x)
  6255  	for {
  6256  		if v_0.Op != ssaop.OpARM64FRINTZD {
  6257  			break
  6258  		}
  6259  		v_0_0 := v_0.Args[0]
  6260  		if v_0_0.Op != ssaop.OpARM64FCVTSD {
  6261  			break
  6262  		}
  6263  		x := v_0_0.Args[0]
  6264  		v.Reset(ssaop.OpARM64FRINTZS)
  6265  		v.AddArg(x)
  6266  		return true
  6267  	}
  6268  	return false
  6269  }
  6270  func rewriteValue_OpARM64FLDPQ(v *ssa.Value) bool {
  6271  	v_1 := v.Args[1]
  6272  	v_0 := v.Args[0]
  6273  	b := v.Block
  6274  	config := b.Func.Config
  6275  	// match: (FLDPQ [off1] {sym} (ADDconst [off2] ptr) mem)
  6276  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6277  	// result: (FLDPQ [off1+int32(off2)] {sym} ptr mem)
  6278  	for {
  6279  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6280  		sym := ssa.AuxToSym(v.Aux)
  6281  		if v_0.Op != ssaop.OpARM64ADDconst {
  6282  			break
  6283  		}
  6284  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6285  		ptr := v_0.Args[0]
  6286  		mem := v_1
  6287  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6288  			break
  6289  		}
  6290  		v.Reset(ssaop.OpARM64FLDPQ)
  6291  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6292  		v.Aux = ssa.SymToAux(sym)
  6293  		v.AddArg2(ptr, mem)
  6294  		return true
  6295  	}
  6296  	// match: (FLDPQ [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6297  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6298  	// result: (FLDPQ [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6299  	for {
  6300  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6301  		sym1 := ssa.AuxToSym(v.Aux)
  6302  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6303  			break
  6304  		}
  6305  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6306  		sym2 := ssa.AuxToSym(v_0.Aux)
  6307  		ptr := v_0.Args[0]
  6308  		mem := v_1
  6309  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6310  			break
  6311  		}
  6312  		v.Reset(ssaop.OpARM64FLDPQ)
  6313  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6314  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6315  		v.AddArg2(ptr, mem)
  6316  		return true
  6317  	}
  6318  	return false
  6319  }
  6320  func rewriteValue_OpARM64FMOVDfpgp(v *ssa.Value) bool {
  6321  	v_0 := v.Args[0]
  6322  	b := v.Block
  6323  	// match: (FMOVDfpgp <t> (Arg [off] {sym}))
  6324  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  6325  	for {
  6326  		t := v.Type
  6327  		if v_0.Op != ssaop.OpArg {
  6328  			break
  6329  		}
  6330  		off := ssa.AuxIntToInt32(v_0.AuxInt)
  6331  		sym := ssa.AuxToSym(v_0.Aux)
  6332  		b = b.Func.Entry
  6333  		v0 := b.NewValue0(v.Pos, ssaop.OpArg, t)
  6334  		v.CopyOf(v0)
  6335  		v0.AuxInt = ssa.Int32ToAuxInt(off)
  6336  		v0.Aux = ssa.SymToAux(sym)
  6337  		return true
  6338  	}
  6339  	return false
  6340  }
  6341  func rewriteValue_OpARM64FMOVDgpfp(v *ssa.Value) bool {
  6342  	v_0 := v.Args[0]
  6343  	b := v.Block
  6344  	// match: (FMOVDgpfp <t> (Arg [off] {sym}))
  6345  	// result: @b.Func.Entry (Arg <t> [off] {sym})
  6346  	for {
  6347  		t := v.Type
  6348  		if v_0.Op != ssaop.OpArg {
  6349  			break
  6350  		}
  6351  		off := ssa.AuxIntToInt32(v_0.AuxInt)
  6352  		sym := ssa.AuxToSym(v_0.Aux)
  6353  		b = b.Func.Entry
  6354  		v0 := b.NewValue0(v.Pos, ssaop.OpArg, t)
  6355  		v.CopyOf(v0)
  6356  		v0.AuxInt = ssa.Int32ToAuxInt(off)
  6357  		v0.Aux = ssa.SymToAux(sym)
  6358  		return true
  6359  	}
  6360  	return false
  6361  }
  6362  func rewriteValue_OpARM64FMOVDload(v *ssa.Value) bool {
  6363  	v_1 := v.Args[1]
  6364  	v_0 := v.Args[0]
  6365  	b := v.Block
  6366  	config := b.Func.Config
  6367  	// match: (FMOVDload [off] {sym} ptr (MOVDstore [off] {sym} ptr val _))
  6368  	// result: (FMOVDgpfp val)
  6369  	for {
  6370  		off := ssa.AuxIntToInt32(v.AuxInt)
  6371  		sym := ssa.AuxToSym(v.Aux)
  6372  		ptr := v_0
  6373  		if v_1.Op != ssaop.OpARM64MOVDstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  6374  			break
  6375  		}
  6376  		val := v_1.Args[1]
  6377  		if ptr != v_1.Args[0] {
  6378  			break
  6379  		}
  6380  		v.Reset(ssaop.OpARM64FMOVDgpfp)
  6381  		v.AddArg(val)
  6382  		return true
  6383  	}
  6384  	// match: (FMOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
  6385  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6386  	// result: (FMOVDload [off1+int32(off2)] {sym} ptr mem)
  6387  	for {
  6388  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6389  		sym := ssa.AuxToSym(v.Aux)
  6390  		if v_0.Op != ssaop.OpARM64ADDconst {
  6391  			break
  6392  		}
  6393  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6394  		ptr := v_0.Args[0]
  6395  		mem := v_1
  6396  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6397  			break
  6398  		}
  6399  		v.Reset(ssaop.OpARM64FMOVDload)
  6400  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6401  		v.Aux = ssa.SymToAux(sym)
  6402  		v.AddArg2(ptr, mem)
  6403  		return true
  6404  	}
  6405  	// match: (FMOVDload [off] {sym} (ADD ptr idx) mem)
  6406  	// cond: off == 0 && sym == nil
  6407  	// result: (FMOVDloadidx ptr idx mem)
  6408  	for {
  6409  		off := ssa.AuxIntToInt32(v.AuxInt)
  6410  		sym := ssa.AuxToSym(v.Aux)
  6411  		if v_0.Op != ssaop.OpARM64ADD {
  6412  			break
  6413  		}
  6414  		idx := v_0.Args[1]
  6415  		ptr := v_0.Args[0]
  6416  		mem := v_1
  6417  		if !(off == 0 && sym == nil) {
  6418  			break
  6419  		}
  6420  		v.Reset(ssaop.OpARM64FMOVDloadidx)
  6421  		v.AddArg3(ptr, idx, mem)
  6422  		return true
  6423  	}
  6424  	// match: (FMOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
  6425  	// cond: off == 0 && sym == nil
  6426  	// result: (FMOVDloadidx8 ptr idx mem)
  6427  	for {
  6428  		off := ssa.AuxIntToInt32(v.AuxInt)
  6429  		sym := ssa.AuxToSym(v.Aux)
  6430  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6431  			break
  6432  		}
  6433  		idx := v_0.Args[1]
  6434  		ptr := v_0.Args[0]
  6435  		mem := v_1
  6436  		if !(off == 0 && sym == nil) {
  6437  			break
  6438  		}
  6439  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  6440  		v.AddArg3(ptr, idx, mem)
  6441  		return true
  6442  	}
  6443  	// match: (FMOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6444  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6445  	// result: (FMOVDload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6446  	for {
  6447  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6448  		sym1 := ssa.AuxToSym(v.Aux)
  6449  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6450  			break
  6451  		}
  6452  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6453  		sym2 := ssa.AuxToSym(v_0.Aux)
  6454  		ptr := v_0.Args[0]
  6455  		mem := v_1
  6456  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6457  			break
  6458  		}
  6459  		v.Reset(ssaop.OpARM64FMOVDload)
  6460  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6461  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6462  		v.AddArg2(ptr, mem)
  6463  		return true
  6464  	}
  6465  	return false
  6466  }
  6467  func rewriteValue_OpARM64FMOVDloadidx(v *ssa.Value) bool {
  6468  	v_2 := v.Args[2]
  6469  	v_1 := v.Args[1]
  6470  	v_0 := v.Args[0]
  6471  	// match: (FMOVDloadidx ptr (MOVDconst [c]) mem)
  6472  	// cond: ssa.Is32Bit(c)
  6473  	// result: (FMOVDload [int32(c)] ptr mem)
  6474  	for {
  6475  		ptr := v_0
  6476  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6477  			break
  6478  		}
  6479  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6480  		mem := v_2
  6481  		if !(ssa.Is32Bit(c)) {
  6482  			break
  6483  		}
  6484  		v.Reset(ssaop.OpARM64FMOVDload)
  6485  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6486  		v.AddArg2(ptr, mem)
  6487  		return true
  6488  	}
  6489  	// match: (FMOVDloadidx (MOVDconst [c]) ptr mem)
  6490  	// cond: ssa.Is32Bit(c)
  6491  	// result: (FMOVDload [int32(c)] ptr mem)
  6492  	for {
  6493  		if v_0.Op != ssaop.OpARM64MOVDconst {
  6494  			break
  6495  		}
  6496  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  6497  		ptr := v_1
  6498  		mem := v_2
  6499  		if !(ssa.Is32Bit(c)) {
  6500  			break
  6501  		}
  6502  		v.Reset(ssaop.OpARM64FMOVDload)
  6503  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6504  		v.AddArg2(ptr, mem)
  6505  		return true
  6506  	}
  6507  	// match: (FMOVDloadidx ptr (SLLconst [3] idx) mem)
  6508  	// result: (FMOVDloadidx8 ptr idx mem)
  6509  	for {
  6510  		ptr := v_0
  6511  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
  6512  			break
  6513  		}
  6514  		idx := v_1.Args[0]
  6515  		mem := v_2
  6516  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  6517  		v.AddArg3(ptr, idx, mem)
  6518  		return true
  6519  	}
  6520  	// match: (FMOVDloadidx (SLLconst [3] idx) ptr mem)
  6521  	// result: (FMOVDloadidx8 ptr idx mem)
  6522  	for {
  6523  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6524  			break
  6525  		}
  6526  		idx := v_0.Args[0]
  6527  		ptr := v_1
  6528  		mem := v_2
  6529  		v.Reset(ssaop.OpARM64FMOVDloadidx8)
  6530  		v.AddArg3(ptr, idx, mem)
  6531  		return true
  6532  	}
  6533  	return false
  6534  }
  6535  func rewriteValue_OpARM64FMOVDloadidx8(v *ssa.Value) bool {
  6536  	v_2 := v.Args[2]
  6537  	v_1 := v.Args[1]
  6538  	v_0 := v.Args[0]
  6539  	// match: (FMOVDloadidx8 ptr (MOVDconst [c]) mem)
  6540  	// cond: ssa.Is32Bit(c<<3)
  6541  	// result: (FMOVDload ptr [int32(c)<<3] mem)
  6542  	for {
  6543  		ptr := v_0
  6544  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6545  			break
  6546  		}
  6547  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6548  		mem := v_2
  6549  		if !(ssa.Is32Bit(c << 3)) {
  6550  			break
  6551  		}
  6552  		v.Reset(ssaop.OpARM64FMOVDload)
  6553  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
  6554  		v.AddArg2(ptr, mem)
  6555  		return true
  6556  	}
  6557  	return false
  6558  }
  6559  func rewriteValue_OpARM64FMOVDstore(v *ssa.Value) bool {
  6560  	v_2 := v.Args[2]
  6561  	v_1 := v.Args[1]
  6562  	v_0 := v.Args[0]
  6563  	b := v.Block
  6564  	config := b.Func.Config
  6565  	// match: (FMOVDstore [off] {sym} ptr (FMOVDgpfp val) mem)
  6566  	// result: (MOVDstore [off] {sym} ptr val mem)
  6567  	for {
  6568  		off := ssa.AuxIntToInt32(v.AuxInt)
  6569  		sym := ssa.AuxToSym(v.Aux)
  6570  		ptr := v_0
  6571  		if v_1.Op != ssaop.OpARM64FMOVDgpfp {
  6572  			break
  6573  		}
  6574  		val := v_1.Args[0]
  6575  		mem := v_2
  6576  		v.Reset(ssaop.OpARM64MOVDstore)
  6577  		v.AuxInt = ssa.Int32ToAuxInt(off)
  6578  		v.Aux = ssa.SymToAux(sym)
  6579  		v.AddArg3(ptr, val, mem)
  6580  		return true
  6581  	}
  6582  	// match: (FMOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6583  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6584  	// result: (FMOVDstore [off1+int32(off2)] {sym} ptr val mem)
  6585  	for {
  6586  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6587  		sym := ssa.AuxToSym(v.Aux)
  6588  		if v_0.Op != ssaop.OpARM64ADDconst {
  6589  			break
  6590  		}
  6591  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6592  		ptr := v_0.Args[0]
  6593  		val := v_1
  6594  		mem := v_2
  6595  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6596  			break
  6597  		}
  6598  		v.Reset(ssaop.OpARM64FMOVDstore)
  6599  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6600  		v.Aux = ssa.SymToAux(sym)
  6601  		v.AddArg3(ptr, val, mem)
  6602  		return true
  6603  	}
  6604  	// match: (FMOVDstore [off] {sym} (ADD ptr idx) val mem)
  6605  	// cond: off == 0 && sym == nil
  6606  	// result: (FMOVDstoreidx ptr idx val mem)
  6607  	for {
  6608  		off := ssa.AuxIntToInt32(v.AuxInt)
  6609  		sym := ssa.AuxToSym(v.Aux)
  6610  		if v_0.Op != ssaop.OpARM64ADD {
  6611  			break
  6612  		}
  6613  		idx := v_0.Args[1]
  6614  		ptr := v_0.Args[0]
  6615  		val := v_1
  6616  		mem := v_2
  6617  		if !(off == 0 && sym == nil) {
  6618  			break
  6619  		}
  6620  		v.Reset(ssaop.OpARM64FMOVDstoreidx)
  6621  		v.AddArg4(ptr, idx, val, mem)
  6622  		return true
  6623  	}
  6624  	// match: (FMOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
  6625  	// cond: off == 0 && sym == nil
  6626  	// result: (FMOVDstoreidx8 ptr idx val mem)
  6627  	for {
  6628  		off := ssa.AuxIntToInt32(v.AuxInt)
  6629  		sym := ssa.AuxToSym(v.Aux)
  6630  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6631  			break
  6632  		}
  6633  		idx := v_0.Args[1]
  6634  		ptr := v_0.Args[0]
  6635  		val := v_1
  6636  		mem := v_2
  6637  		if !(off == 0 && sym == nil) {
  6638  			break
  6639  		}
  6640  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  6641  		v.AddArg4(ptr, idx, val, mem)
  6642  		return true
  6643  	}
  6644  	// match: (FMOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  6645  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6646  	// result: (FMOVDstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  6647  	for {
  6648  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6649  		sym1 := ssa.AuxToSym(v.Aux)
  6650  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6651  			break
  6652  		}
  6653  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6654  		sym2 := ssa.AuxToSym(v_0.Aux)
  6655  		ptr := v_0.Args[0]
  6656  		val := v_1
  6657  		mem := v_2
  6658  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6659  			break
  6660  		}
  6661  		v.Reset(ssaop.OpARM64FMOVDstore)
  6662  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6663  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6664  		v.AddArg3(ptr, val, mem)
  6665  		return true
  6666  	}
  6667  	return false
  6668  }
  6669  func rewriteValue_OpARM64FMOVDstoreidx(v *ssa.Value) bool {
  6670  	v_3 := v.Args[3]
  6671  	v_2 := v.Args[2]
  6672  	v_1 := v.Args[1]
  6673  	v_0 := v.Args[0]
  6674  	// match: (FMOVDstoreidx ptr (MOVDconst [c]) val mem)
  6675  	// cond: ssa.Is32Bit(c)
  6676  	// result: (FMOVDstore [int32(c)] ptr val mem)
  6677  	for {
  6678  		ptr := v_0
  6679  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6680  			break
  6681  		}
  6682  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6683  		val := v_2
  6684  		mem := v_3
  6685  		if !(ssa.Is32Bit(c)) {
  6686  			break
  6687  		}
  6688  		v.Reset(ssaop.OpARM64FMOVDstore)
  6689  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6690  		v.AddArg3(ptr, val, mem)
  6691  		return true
  6692  	}
  6693  	// match: (FMOVDstoreidx (MOVDconst [c]) idx val mem)
  6694  	// cond: ssa.Is32Bit(c)
  6695  	// result: (FMOVDstore [int32(c)] idx val mem)
  6696  	for {
  6697  		if v_0.Op != ssaop.OpARM64MOVDconst {
  6698  			break
  6699  		}
  6700  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  6701  		idx := v_1
  6702  		val := v_2
  6703  		mem := v_3
  6704  		if !(ssa.Is32Bit(c)) {
  6705  			break
  6706  		}
  6707  		v.Reset(ssaop.OpARM64FMOVDstore)
  6708  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6709  		v.AddArg3(idx, val, mem)
  6710  		return true
  6711  	}
  6712  	// match: (FMOVDstoreidx ptr (SLLconst [3] idx) val mem)
  6713  	// result: (FMOVDstoreidx8 ptr idx val mem)
  6714  	for {
  6715  		ptr := v_0
  6716  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
  6717  			break
  6718  		}
  6719  		idx := v_1.Args[0]
  6720  		val := v_2
  6721  		mem := v_3
  6722  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  6723  		v.AddArg4(ptr, idx, val, mem)
  6724  		return true
  6725  	}
  6726  	// match: (FMOVDstoreidx (SLLconst [3] idx) ptr val mem)
  6727  	// result: (FMOVDstoreidx8 ptr idx val mem)
  6728  	for {
  6729  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
  6730  			break
  6731  		}
  6732  		idx := v_0.Args[0]
  6733  		ptr := v_1
  6734  		val := v_2
  6735  		mem := v_3
  6736  		v.Reset(ssaop.OpARM64FMOVDstoreidx8)
  6737  		v.AddArg4(ptr, idx, val, mem)
  6738  		return true
  6739  	}
  6740  	return false
  6741  }
  6742  func rewriteValue_OpARM64FMOVDstoreidx8(v *ssa.Value) bool {
  6743  	v_3 := v.Args[3]
  6744  	v_2 := v.Args[2]
  6745  	v_1 := v.Args[1]
  6746  	v_0 := v.Args[0]
  6747  	// match: (FMOVDstoreidx8 ptr (MOVDconst [c]) val mem)
  6748  	// cond: ssa.Is32Bit(c<<3)
  6749  	// result: (FMOVDstore [int32(c)<<3] ptr val mem)
  6750  	for {
  6751  		ptr := v_0
  6752  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6753  			break
  6754  		}
  6755  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6756  		val := v_2
  6757  		mem := v_3
  6758  		if !(ssa.Is32Bit(c << 3)) {
  6759  			break
  6760  		}
  6761  		v.Reset(ssaop.OpARM64FMOVDstore)
  6762  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
  6763  		v.AddArg3(ptr, val, mem)
  6764  		return true
  6765  	}
  6766  	return false
  6767  }
  6768  func rewriteValue_OpARM64FMOVQload(v *ssa.Value) bool {
  6769  	v_1 := v.Args[1]
  6770  	v_0 := v.Args[0]
  6771  	b := v.Block
  6772  	config := b.Func.Config
  6773  	// match: (FMOVQload [off1] {sym} (ADDconst [off2] ptr) mem)
  6774  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6775  	// result: (FMOVQload [off1+int32(off2)] {sym} ptr mem)
  6776  	for {
  6777  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6778  		sym := ssa.AuxToSym(v.Aux)
  6779  		if v_0.Op != ssaop.OpARM64ADDconst {
  6780  			break
  6781  		}
  6782  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6783  		ptr := v_0.Args[0]
  6784  		mem := v_1
  6785  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6786  			break
  6787  		}
  6788  		v.Reset(ssaop.OpARM64FMOVQload)
  6789  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6790  		v.Aux = ssa.SymToAux(sym)
  6791  		v.AddArg2(ptr, mem)
  6792  		return true
  6793  	}
  6794  	// match: (FMOVQload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6795  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6796  	// result: (FMOVQload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6797  	for {
  6798  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6799  		sym1 := ssa.AuxToSym(v.Aux)
  6800  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6801  			break
  6802  		}
  6803  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6804  		sym2 := ssa.AuxToSym(v_0.Aux)
  6805  		ptr := v_0.Args[0]
  6806  		mem := v_1
  6807  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6808  			break
  6809  		}
  6810  		v.Reset(ssaop.OpARM64FMOVQload)
  6811  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6812  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6813  		v.AddArg2(ptr, mem)
  6814  		return true
  6815  	}
  6816  	return false
  6817  }
  6818  func rewriteValue_OpARM64FMOVQstore(v *ssa.Value) bool {
  6819  	v_2 := v.Args[2]
  6820  	v_1 := v.Args[1]
  6821  	v_0 := v.Args[0]
  6822  	b := v.Block
  6823  	config := b.Func.Config
  6824  	// match: (FMOVQstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  6825  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6826  	// result: (FMOVQstore [off1+int32(off2)] {sym} ptr val mem)
  6827  	for {
  6828  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6829  		sym := ssa.AuxToSym(v.Aux)
  6830  		if v_0.Op != ssaop.OpARM64ADDconst {
  6831  			break
  6832  		}
  6833  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6834  		ptr := v_0.Args[0]
  6835  		val := v_1
  6836  		mem := v_2
  6837  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6838  			break
  6839  		}
  6840  		v.Reset(ssaop.OpARM64FMOVQstore)
  6841  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6842  		v.Aux = ssa.SymToAux(sym)
  6843  		v.AddArg3(ptr, val, mem)
  6844  		return true
  6845  	}
  6846  	// match: (FMOVQstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  6847  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6848  	// result: (FMOVQstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  6849  	for {
  6850  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6851  		sym1 := ssa.AuxToSym(v.Aux)
  6852  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6853  			break
  6854  		}
  6855  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6856  		sym2 := ssa.AuxToSym(v_0.Aux)
  6857  		ptr := v_0.Args[0]
  6858  		val := v_1
  6859  		mem := v_2
  6860  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6861  			break
  6862  		}
  6863  		v.Reset(ssaop.OpARM64FMOVQstore)
  6864  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6865  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6866  		v.AddArg3(ptr, val, mem)
  6867  		return true
  6868  	}
  6869  	return false
  6870  }
  6871  func rewriteValue_OpARM64FMOVSload(v *ssa.Value) bool {
  6872  	v_1 := v.Args[1]
  6873  	v_0 := v.Args[0]
  6874  	b := v.Block
  6875  	config := b.Func.Config
  6876  	// match: (FMOVSload [off] {sym} ptr (MOVWstore [off] {sym} ptr val _))
  6877  	// result: (FMOVSgpfp val)
  6878  	for {
  6879  		off := ssa.AuxIntToInt32(v.AuxInt)
  6880  		sym := ssa.AuxToSym(v.Aux)
  6881  		ptr := v_0
  6882  		if v_1.Op != ssaop.OpARM64MOVWstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
  6883  			break
  6884  		}
  6885  		val := v_1.Args[1]
  6886  		if ptr != v_1.Args[0] {
  6887  			break
  6888  		}
  6889  		v.Reset(ssaop.OpARM64FMOVSgpfp)
  6890  		v.AddArg(val)
  6891  		return true
  6892  	}
  6893  	// match: (FMOVSload [off1] {sym} (ADDconst [off2] ptr) mem)
  6894  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6895  	// result: (FMOVSload [off1+int32(off2)] {sym} ptr mem)
  6896  	for {
  6897  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6898  		sym := ssa.AuxToSym(v.Aux)
  6899  		if v_0.Op != ssaop.OpARM64ADDconst {
  6900  			break
  6901  		}
  6902  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  6903  		ptr := v_0.Args[0]
  6904  		mem := v_1
  6905  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6906  			break
  6907  		}
  6908  		v.Reset(ssaop.OpARM64FMOVSload)
  6909  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  6910  		v.Aux = ssa.SymToAux(sym)
  6911  		v.AddArg2(ptr, mem)
  6912  		return true
  6913  	}
  6914  	// match: (FMOVSload [off] {sym} (ADD ptr idx) mem)
  6915  	// cond: off == 0 && sym == nil
  6916  	// result: (FMOVSloadidx ptr idx mem)
  6917  	for {
  6918  		off := ssa.AuxIntToInt32(v.AuxInt)
  6919  		sym := ssa.AuxToSym(v.Aux)
  6920  		if v_0.Op != ssaop.OpARM64ADD {
  6921  			break
  6922  		}
  6923  		idx := v_0.Args[1]
  6924  		ptr := v_0.Args[0]
  6925  		mem := v_1
  6926  		if !(off == 0 && sym == nil) {
  6927  			break
  6928  		}
  6929  		v.Reset(ssaop.OpARM64FMOVSloadidx)
  6930  		v.AddArg3(ptr, idx, mem)
  6931  		return true
  6932  	}
  6933  	// match: (FMOVSload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
  6934  	// cond: off == 0 && sym == nil
  6935  	// result: (FMOVSloadidx4 ptr idx mem)
  6936  	for {
  6937  		off := ssa.AuxIntToInt32(v.AuxInt)
  6938  		sym := ssa.AuxToSym(v.Aux)
  6939  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  6940  			break
  6941  		}
  6942  		idx := v_0.Args[1]
  6943  		ptr := v_0.Args[0]
  6944  		mem := v_1
  6945  		if !(off == 0 && sym == nil) {
  6946  			break
  6947  		}
  6948  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  6949  		v.AddArg3(ptr, idx, mem)
  6950  		return true
  6951  	}
  6952  	// match: (FMOVSload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  6953  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  6954  	// result: (FMOVSload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  6955  	for {
  6956  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  6957  		sym1 := ssa.AuxToSym(v.Aux)
  6958  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  6959  			break
  6960  		}
  6961  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  6962  		sym2 := ssa.AuxToSym(v_0.Aux)
  6963  		ptr := v_0.Args[0]
  6964  		mem := v_1
  6965  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  6966  			break
  6967  		}
  6968  		v.Reset(ssaop.OpARM64FMOVSload)
  6969  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  6970  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  6971  		v.AddArg2(ptr, mem)
  6972  		return true
  6973  	}
  6974  	return false
  6975  }
  6976  func rewriteValue_OpARM64FMOVSloadidx(v *ssa.Value) bool {
  6977  	v_2 := v.Args[2]
  6978  	v_1 := v.Args[1]
  6979  	v_0 := v.Args[0]
  6980  	// match: (FMOVSloadidx ptr (MOVDconst [c]) mem)
  6981  	// cond: ssa.Is32Bit(c)
  6982  	// result: (FMOVSload [int32(c)] ptr mem)
  6983  	for {
  6984  		ptr := v_0
  6985  		if v_1.Op != ssaop.OpARM64MOVDconst {
  6986  			break
  6987  		}
  6988  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  6989  		mem := v_2
  6990  		if !(ssa.Is32Bit(c)) {
  6991  			break
  6992  		}
  6993  		v.Reset(ssaop.OpARM64FMOVSload)
  6994  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  6995  		v.AddArg2(ptr, mem)
  6996  		return true
  6997  	}
  6998  	// match: (FMOVSloadidx (MOVDconst [c]) ptr mem)
  6999  	// cond: ssa.Is32Bit(c)
  7000  	// result: (FMOVSload [int32(c)] ptr mem)
  7001  	for {
  7002  		if v_0.Op != ssaop.OpARM64MOVDconst {
  7003  			break
  7004  		}
  7005  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  7006  		ptr := v_1
  7007  		mem := v_2
  7008  		if !(ssa.Is32Bit(c)) {
  7009  			break
  7010  		}
  7011  		v.Reset(ssaop.OpARM64FMOVSload)
  7012  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7013  		v.AddArg2(ptr, mem)
  7014  		return true
  7015  	}
  7016  	// match: (FMOVSloadidx ptr (SLLconst [2] idx) mem)
  7017  	// result: (FMOVSloadidx4 ptr idx mem)
  7018  	for {
  7019  		ptr := v_0
  7020  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
  7021  			break
  7022  		}
  7023  		idx := v_1.Args[0]
  7024  		mem := v_2
  7025  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  7026  		v.AddArg3(ptr, idx, mem)
  7027  		return true
  7028  	}
  7029  	// match: (FMOVSloadidx (SLLconst [2] idx) ptr mem)
  7030  	// result: (FMOVSloadidx4 ptr idx mem)
  7031  	for {
  7032  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7033  			break
  7034  		}
  7035  		idx := v_0.Args[0]
  7036  		ptr := v_1
  7037  		mem := v_2
  7038  		v.Reset(ssaop.OpARM64FMOVSloadidx4)
  7039  		v.AddArg3(ptr, idx, mem)
  7040  		return true
  7041  	}
  7042  	return false
  7043  }
  7044  func rewriteValue_OpARM64FMOVSloadidx4(v *ssa.Value) bool {
  7045  	v_2 := v.Args[2]
  7046  	v_1 := v.Args[1]
  7047  	v_0 := v.Args[0]
  7048  	// match: (FMOVSloadidx4 ptr (MOVDconst [c]) mem)
  7049  	// cond: ssa.Is32Bit(c<<2)
  7050  	// result: (FMOVSload ptr [int32(c)<<2] mem)
  7051  	for {
  7052  		ptr := v_0
  7053  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7054  			break
  7055  		}
  7056  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7057  		mem := v_2
  7058  		if !(ssa.Is32Bit(c << 2)) {
  7059  			break
  7060  		}
  7061  		v.Reset(ssaop.OpARM64FMOVSload)
  7062  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
  7063  		v.AddArg2(ptr, mem)
  7064  		return true
  7065  	}
  7066  	return false
  7067  }
  7068  func rewriteValue_OpARM64FMOVSstore(v *ssa.Value) bool {
  7069  	v_2 := v.Args[2]
  7070  	v_1 := v.Args[1]
  7071  	v_0 := v.Args[0]
  7072  	b := v.Block
  7073  	config := b.Func.Config
  7074  	// match: (FMOVSstore [off] {sym} ptr (FMOVSgpfp val) mem)
  7075  	// result: (MOVWstore [off] {sym} ptr val mem)
  7076  	for {
  7077  		off := ssa.AuxIntToInt32(v.AuxInt)
  7078  		sym := ssa.AuxToSym(v.Aux)
  7079  		ptr := v_0
  7080  		if v_1.Op != ssaop.OpARM64FMOVSgpfp {
  7081  			break
  7082  		}
  7083  		val := v_1.Args[0]
  7084  		mem := v_2
  7085  		v.Reset(ssaop.OpARM64MOVWstore)
  7086  		v.AuxInt = ssa.Int32ToAuxInt(off)
  7087  		v.Aux = ssa.SymToAux(sym)
  7088  		v.AddArg3(ptr, val, mem)
  7089  		return true
  7090  	}
  7091  	// match: (FMOVSstore [off1] {sym} (ADDconst [off2] ptr) val mem)
  7092  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7093  	// result: (FMOVSstore [off1+int32(off2)] {sym} ptr val mem)
  7094  	for {
  7095  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7096  		sym := ssa.AuxToSym(v.Aux)
  7097  		if v_0.Op != ssaop.OpARM64ADDconst {
  7098  			break
  7099  		}
  7100  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7101  		ptr := v_0.Args[0]
  7102  		val := v_1
  7103  		mem := v_2
  7104  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7105  			break
  7106  		}
  7107  		v.Reset(ssaop.OpARM64FMOVSstore)
  7108  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7109  		v.Aux = ssa.SymToAux(sym)
  7110  		v.AddArg3(ptr, val, mem)
  7111  		return true
  7112  	}
  7113  	// match: (FMOVSstore [off] {sym} (ADD ptr idx) val mem)
  7114  	// cond: off == 0 && sym == nil
  7115  	// result: (FMOVSstoreidx ptr idx val mem)
  7116  	for {
  7117  		off := ssa.AuxIntToInt32(v.AuxInt)
  7118  		sym := ssa.AuxToSym(v.Aux)
  7119  		if v_0.Op != ssaop.OpARM64ADD {
  7120  			break
  7121  		}
  7122  		idx := v_0.Args[1]
  7123  		ptr := v_0.Args[0]
  7124  		val := v_1
  7125  		mem := v_2
  7126  		if !(off == 0 && sym == nil) {
  7127  			break
  7128  		}
  7129  		v.Reset(ssaop.OpARM64FMOVSstoreidx)
  7130  		v.AddArg4(ptr, idx, val, mem)
  7131  		return true
  7132  	}
  7133  	// match: (FMOVSstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
  7134  	// cond: off == 0 && sym == nil
  7135  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7136  	for {
  7137  		off := ssa.AuxIntToInt32(v.AuxInt)
  7138  		sym := ssa.AuxToSym(v.Aux)
  7139  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7140  			break
  7141  		}
  7142  		idx := v_0.Args[1]
  7143  		ptr := v_0.Args[0]
  7144  		val := v_1
  7145  		mem := v_2
  7146  		if !(off == 0 && sym == nil) {
  7147  			break
  7148  		}
  7149  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7150  		v.AddArg4(ptr, idx, val, mem)
  7151  		return true
  7152  	}
  7153  	// match: (FMOVSstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
  7154  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7155  	// result: (FMOVSstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
  7156  	for {
  7157  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7158  		sym1 := ssa.AuxToSym(v.Aux)
  7159  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7160  			break
  7161  		}
  7162  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7163  		sym2 := ssa.AuxToSym(v_0.Aux)
  7164  		ptr := v_0.Args[0]
  7165  		val := v_1
  7166  		mem := v_2
  7167  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7168  			break
  7169  		}
  7170  		v.Reset(ssaop.OpARM64FMOVSstore)
  7171  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7172  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7173  		v.AddArg3(ptr, val, mem)
  7174  		return true
  7175  	}
  7176  	return false
  7177  }
  7178  func rewriteValue_OpARM64FMOVSstoreidx(v *ssa.Value) bool {
  7179  	v_3 := v.Args[3]
  7180  	v_2 := v.Args[2]
  7181  	v_1 := v.Args[1]
  7182  	v_0 := v.Args[0]
  7183  	// match: (FMOVSstoreidx ptr (MOVDconst [c]) val mem)
  7184  	// cond: ssa.Is32Bit(c)
  7185  	// result: (FMOVSstore [int32(c)] ptr val mem)
  7186  	for {
  7187  		ptr := v_0
  7188  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7189  			break
  7190  		}
  7191  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7192  		val := v_2
  7193  		mem := v_3
  7194  		if !(ssa.Is32Bit(c)) {
  7195  			break
  7196  		}
  7197  		v.Reset(ssaop.OpARM64FMOVSstore)
  7198  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7199  		v.AddArg3(ptr, val, mem)
  7200  		return true
  7201  	}
  7202  	// match: (FMOVSstoreidx (MOVDconst [c]) idx val mem)
  7203  	// cond: ssa.Is32Bit(c)
  7204  	// result: (FMOVSstore [int32(c)] idx val mem)
  7205  	for {
  7206  		if v_0.Op != ssaop.OpARM64MOVDconst {
  7207  			break
  7208  		}
  7209  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  7210  		idx := v_1
  7211  		val := v_2
  7212  		mem := v_3
  7213  		if !(ssa.Is32Bit(c)) {
  7214  			break
  7215  		}
  7216  		v.Reset(ssaop.OpARM64FMOVSstore)
  7217  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7218  		v.AddArg3(idx, val, mem)
  7219  		return true
  7220  	}
  7221  	// match: (FMOVSstoreidx ptr (SLLconst [2] idx) val mem)
  7222  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7223  	for {
  7224  		ptr := v_0
  7225  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
  7226  			break
  7227  		}
  7228  		idx := v_1.Args[0]
  7229  		val := v_2
  7230  		mem := v_3
  7231  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7232  		v.AddArg4(ptr, idx, val, mem)
  7233  		return true
  7234  	}
  7235  	// match: (FMOVSstoreidx (SLLconst [2] idx) ptr val mem)
  7236  	// result: (FMOVSstoreidx4 ptr idx val mem)
  7237  	for {
  7238  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
  7239  			break
  7240  		}
  7241  		idx := v_0.Args[0]
  7242  		ptr := v_1
  7243  		val := v_2
  7244  		mem := v_3
  7245  		v.Reset(ssaop.OpARM64FMOVSstoreidx4)
  7246  		v.AddArg4(ptr, idx, val, mem)
  7247  		return true
  7248  	}
  7249  	return false
  7250  }
  7251  func rewriteValue_OpARM64FMOVSstoreidx4(v *ssa.Value) bool {
  7252  	v_3 := v.Args[3]
  7253  	v_2 := v.Args[2]
  7254  	v_1 := v.Args[1]
  7255  	v_0 := v.Args[0]
  7256  	// match: (FMOVSstoreidx4 ptr (MOVDconst [c]) val mem)
  7257  	// cond: ssa.Is32Bit(c<<2)
  7258  	// result: (FMOVSstore [int32(c)<<2] ptr val mem)
  7259  	for {
  7260  		ptr := v_0
  7261  		if v_1.Op != ssaop.OpARM64MOVDconst {
  7262  			break
  7263  		}
  7264  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  7265  		val := v_2
  7266  		mem := v_3
  7267  		if !(ssa.Is32Bit(c << 2)) {
  7268  			break
  7269  		}
  7270  		v.Reset(ssaop.OpARM64FMOVSstore)
  7271  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
  7272  		v.AddArg3(ptr, val, mem)
  7273  		return true
  7274  	}
  7275  	return false
  7276  }
  7277  func rewriteValue_OpARM64FMULD(v *ssa.Value) bool {
  7278  	v_1 := v.Args[1]
  7279  	v_0 := v.Args[0]
  7280  	// match: (FMULD (FNEGD x) y)
  7281  	// result: (FNMULD x y)
  7282  	for {
  7283  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7284  			if v_0.Op != ssaop.OpARM64FNEGD {
  7285  				continue
  7286  			}
  7287  			x := v_0.Args[0]
  7288  			y := v_1
  7289  			v.Reset(ssaop.OpARM64FNMULD)
  7290  			v.AddArg2(x, y)
  7291  			return true
  7292  		}
  7293  		break
  7294  	}
  7295  	return false
  7296  }
  7297  func rewriteValue_OpARM64FMULS(v *ssa.Value) bool {
  7298  	v_1 := v.Args[1]
  7299  	v_0 := v.Args[0]
  7300  	// match: (FMULS (FNEGS x) y)
  7301  	// result: (FNMULS x y)
  7302  	for {
  7303  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7304  			if v_0.Op != ssaop.OpARM64FNEGS {
  7305  				continue
  7306  			}
  7307  			x := v_0.Args[0]
  7308  			y := v_1
  7309  			v.Reset(ssaop.OpARM64FNMULS)
  7310  			v.AddArg2(x, y)
  7311  			return true
  7312  		}
  7313  		break
  7314  	}
  7315  	return false
  7316  }
  7317  func rewriteValue_OpARM64FNEGD(v *ssa.Value) bool {
  7318  	v_0 := v.Args[0]
  7319  	// match: (FNEGD (FMULD x y))
  7320  	// result: (FNMULD x y)
  7321  	for {
  7322  		if v_0.Op != ssaop.OpARM64FMULD {
  7323  			break
  7324  		}
  7325  		y := v_0.Args[1]
  7326  		x := v_0.Args[0]
  7327  		v.Reset(ssaop.OpARM64FNMULD)
  7328  		v.AddArg2(x, y)
  7329  		return true
  7330  	}
  7331  	// match: (FNEGD (FNMULD x y))
  7332  	// result: (FMULD x y)
  7333  	for {
  7334  		if v_0.Op != ssaop.OpARM64FNMULD {
  7335  			break
  7336  		}
  7337  		y := v_0.Args[1]
  7338  		x := v_0.Args[0]
  7339  		v.Reset(ssaop.OpARM64FMULD)
  7340  		v.AddArg2(x, y)
  7341  		return true
  7342  	}
  7343  	return false
  7344  }
  7345  func rewriteValue_OpARM64FNEGS(v *ssa.Value) bool {
  7346  	v_0 := v.Args[0]
  7347  	// match: (FNEGS (FMULS x y))
  7348  	// result: (FNMULS x y)
  7349  	for {
  7350  		if v_0.Op != ssaop.OpARM64FMULS {
  7351  			break
  7352  		}
  7353  		y := v_0.Args[1]
  7354  		x := v_0.Args[0]
  7355  		v.Reset(ssaop.OpARM64FNMULS)
  7356  		v.AddArg2(x, y)
  7357  		return true
  7358  	}
  7359  	// match: (FNEGS (FNMULS x y))
  7360  	// result: (FMULS x y)
  7361  	for {
  7362  		if v_0.Op != ssaop.OpARM64FNMULS {
  7363  			break
  7364  		}
  7365  		y := v_0.Args[1]
  7366  		x := v_0.Args[0]
  7367  		v.Reset(ssaop.OpARM64FMULS)
  7368  		v.AddArg2(x, y)
  7369  		return true
  7370  	}
  7371  	return false
  7372  }
  7373  func rewriteValue_OpARM64FNMULD(v *ssa.Value) bool {
  7374  	v_1 := v.Args[1]
  7375  	v_0 := v.Args[0]
  7376  	// match: (FNMULD (FNEGD x) y)
  7377  	// result: (FMULD x y)
  7378  	for {
  7379  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7380  			if v_0.Op != ssaop.OpARM64FNEGD {
  7381  				continue
  7382  			}
  7383  			x := v_0.Args[0]
  7384  			y := v_1
  7385  			v.Reset(ssaop.OpARM64FMULD)
  7386  			v.AddArg2(x, y)
  7387  			return true
  7388  		}
  7389  		break
  7390  	}
  7391  	return false
  7392  }
  7393  func rewriteValue_OpARM64FNMULS(v *ssa.Value) bool {
  7394  	v_1 := v.Args[1]
  7395  	v_0 := v.Args[0]
  7396  	// match: (FNMULS (FNEGS x) y)
  7397  	// result: (FMULS x y)
  7398  	for {
  7399  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  7400  			if v_0.Op != ssaop.OpARM64FNEGS {
  7401  				continue
  7402  			}
  7403  			x := v_0.Args[0]
  7404  			y := v_1
  7405  			v.Reset(ssaop.OpARM64FMULS)
  7406  			v.AddArg2(x, y)
  7407  			return true
  7408  		}
  7409  		break
  7410  	}
  7411  	return false
  7412  }
  7413  func rewriteValue_OpARM64FSTPQ(v *ssa.Value) bool {
  7414  	v_3 := v.Args[3]
  7415  	v_2 := v.Args[2]
  7416  	v_1 := v.Args[1]
  7417  	v_0 := v.Args[0]
  7418  	b := v.Block
  7419  	config := b.Func.Config
  7420  	// match: (FSTPQ [off1] {sym} (ADDconst [off2] ptr) val1 val2 mem)
  7421  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7422  	// result: (FSTPQ [off1+int32(off2)] {sym} ptr val1 val2 mem)
  7423  	for {
  7424  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7425  		sym := ssa.AuxToSym(v.Aux)
  7426  		if v_0.Op != ssaop.OpARM64ADDconst {
  7427  			break
  7428  		}
  7429  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  7430  		ptr := v_0.Args[0]
  7431  		val1 := v_1
  7432  		val2 := v_2
  7433  		mem := v_3
  7434  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7435  			break
  7436  		}
  7437  		v.Reset(ssaop.OpARM64FSTPQ)
  7438  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  7439  		v.Aux = ssa.SymToAux(sym)
  7440  		v.AddArg4(ptr, val1, val2, mem)
  7441  		return true
  7442  	}
  7443  	// match: (FSTPQ [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val1 val2 mem)
  7444  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  7445  	// result: (FSTPQ [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val1 val2 mem)
  7446  	for {
  7447  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  7448  		sym1 := ssa.AuxToSym(v.Aux)
  7449  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  7450  			break
  7451  		}
  7452  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  7453  		sym2 := ssa.AuxToSym(v_0.Aux)
  7454  		ptr := v_0.Args[0]
  7455  		val1 := v_1
  7456  		val2 := v_2
  7457  		mem := v_3
  7458  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  7459  			break
  7460  		}
  7461  		v.Reset(ssaop.OpARM64FSTPQ)
  7462  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  7463  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  7464  		v.AddArg4(ptr, val1, val2, mem)
  7465  		return true
  7466  	}
  7467  	return false
  7468  }
  7469  func rewriteValue_OpARM64FSUBD(v *ssa.Value) bool {
  7470  	v_1 := v.Args[1]
  7471  	v_0 := v.Args[0]
  7472  	// match: (FSUBD a (FMULD x y))
  7473  	// cond: a.Block.Func.UseFMA(v)
  7474  	// result: (FMSUBD a x y)
  7475  	for {
  7476  		a := v_0
  7477  		if v_1.Op != ssaop.OpARM64FMULD {
  7478  			break
  7479  		}
  7480  		y := v_1.Args[1]
  7481  		x := v_1.Args[0]
  7482  		if !(a.Block.Func.UseFMA(v)) {
  7483  			break
  7484  		}
  7485  		v.Reset(ssaop.OpARM64FMSUBD)
  7486  		v.AddArg3(a, x, y)
  7487  		return true
  7488  	}
  7489  	// match: (FSUBD (FMULD x y) a)
  7490  	// cond: a.Block.Func.UseFMA(v)
  7491  	// result: (FNMSUBD a x y)
  7492  	for {
  7493  		if v_0.Op != ssaop.OpARM64FMULD {
  7494  			break
  7495  		}
  7496  		y := v_0.Args[1]
  7497  		x := v_0.Args[0]
  7498  		a := v_1
  7499  		if !(a.Block.Func.UseFMA(v)) {
  7500  			break
  7501  		}
  7502  		v.Reset(ssaop.OpARM64FNMSUBD)
  7503  		v.AddArg3(a, x, y)
  7504  		return true
  7505  	}
  7506  	// match: (FSUBD a (FNMULD x y))
  7507  	// cond: a.Block.Func.UseFMA(v)
  7508  	// result: (FMADDD a x y)
  7509  	for {
  7510  		a := v_0
  7511  		if v_1.Op != ssaop.OpARM64FNMULD {
  7512  			break
  7513  		}
  7514  		y := v_1.Args[1]
  7515  		x := v_1.Args[0]
  7516  		if !(a.Block.Func.UseFMA(v)) {
  7517  			break
  7518  		}
  7519  		v.Reset(ssaop.OpARM64FMADDD)
  7520  		v.AddArg3(a, x, y)
  7521  		return true
  7522  	}
  7523  	// match: (FSUBD (FNMULD x y) a)
  7524  	// cond: a.Block.Func.UseFMA(v)
  7525  	// result: (FNMADDD a x y)
  7526  	for {
  7527  		if v_0.Op != ssaop.OpARM64FNMULD {
  7528  			break
  7529  		}
  7530  		y := v_0.Args[1]
  7531  		x := v_0.Args[0]
  7532  		a := v_1
  7533  		if !(a.Block.Func.UseFMA(v)) {
  7534  			break
  7535  		}
  7536  		v.Reset(ssaop.OpARM64FNMADDD)
  7537  		v.AddArg3(a, x, y)
  7538  		return true
  7539  	}
  7540  	return false
  7541  }
  7542  func rewriteValue_OpARM64FSUBS(v *ssa.Value) bool {
  7543  	v_1 := v.Args[1]
  7544  	v_0 := v.Args[0]
  7545  	// match: (FSUBS a (FMULS x y))
  7546  	// cond: a.Block.Func.UseFMA(v)
  7547  	// result: (FMSUBS a x y)
  7548  	for {
  7549  		a := v_0
  7550  		if v_1.Op != ssaop.OpARM64FMULS {
  7551  			break
  7552  		}
  7553  		y := v_1.Args[1]
  7554  		x := v_1.Args[0]
  7555  		if !(a.Block.Func.UseFMA(v)) {
  7556  			break
  7557  		}
  7558  		v.Reset(ssaop.OpARM64FMSUBS)
  7559  		v.AddArg3(a, x, y)
  7560  		return true
  7561  	}
  7562  	// match: (FSUBS (FMULS x y) a)
  7563  	// cond: a.Block.Func.UseFMA(v)
  7564  	// result: (FNMSUBS a x y)
  7565  	for {
  7566  		if v_0.Op != ssaop.OpARM64FMULS {
  7567  			break
  7568  		}
  7569  		y := v_0.Args[1]
  7570  		x := v_0.Args[0]
  7571  		a := v_1
  7572  		if !(a.Block.Func.UseFMA(v)) {
  7573  			break
  7574  		}
  7575  		v.Reset(ssaop.OpARM64FNMSUBS)
  7576  		v.AddArg3(a, x, y)
  7577  		return true
  7578  	}
  7579  	// match: (FSUBS a (FNMULS x y))
  7580  	// cond: a.Block.Func.UseFMA(v)
  7581  	// result: (FMADDS a x y)
  7582  	for {
  7583  		a := v_0
  7584  		if v_1.Op != ssaop.OpARM64FNMULS {
  7585  			break
  7586  		}
  7587  		y := v_1.Args[1]
  7588  		x := v_1.Args[0]
  7589  		if !(a.Block.Func.UseFMA(v)) {
  7590  			break
  7591  		}
  7592  		v.Reset(ssaop.OpARM64FMADDS)
  7593  		v.AddArg3(a, x, y)
  7594  		return true
  7595  	}
  7596  	// match: (FSUBS (FNMULS x y) a)
  7597  	// cond: a.Block.Func.UseFMA(v)
  7598  	// result: (FNMADDS a x y)
  7599  	for {
  7600  		if v_0.Op != ssaop.OpARM64FNMULS {
  7601  			break
  7602  		}
  7603  		y := v_0.Args[1]
  7604  		x := v_0.Args[0]
  7605  		a := v_1
  7606  		if !(a.Block.Func.UseFMA(v)) {
  7607  			break
  7608  		}
  7609  		v.Reset(ssaop.OpARM64FNMADDS)
  7610  		v.AddArg3(a, x, y)
  7611  		return true
  7612  	}
  7613  	return false
  7614  }
  7615  func rewriteValue_OpARM64GreaterEqual(v *ssa.Value) bool {
  7616  	v_0 := v.Args[0]
  7617  	b := v.Block
  7618  	// match: (GreaterEqual (CMPconst [0] z:(AND x y)))
  7619  	// cond: z.Uses == 1
  7620  	// result: (GreaterEqual (TST x y))
  7621  	for {
  7622  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7623  			break
  7624  		}
  7625  		z := v_0.Args[0]
  7626  		if z.Op != ssaop.OpARM64AND {
  7627  			break
  7628  		}
  7629  		y := z.Args[1]
  7630  		x := z.Args[0]
  7631  		if !(z.Uses == 1) {
  7632  			break
  7633  		}
  7634  		v.Reset(ssaop.OpARM64GreaterEqual)
  7635  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  7636  		v0.AddArg2(x, y)
  7637  		v.AddArg(v0)
  7638  		return true
  7639  	}
  7640  	// match: (GreaterEqual (CMPWconst [0] x:(ANDconst [c] y)))
  7641  	// cond: x.Uses == 1
  7642  	// result: (GreaterEqual (TSTWconst [int32(c)] y))
  7643  	for {
  7644  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7645  			break
  7646  		}
  7647  		x := v_0.Args[0]
  7648  		if x.Op != ssaop.OpARM64ANDconst {
  7649  			break
  7650  		}
  7651  		c := ssa.AuxIntToInt64(x.AuxInt)
  7652  		y := x.Args[0]
  7653  		if !(x.Uses == 1) {
  7654  			break
  7655  		}
  7656  		v.Reset(ssaop.OpARM64GreaterEqual)
  7657  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  7658  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7659  		v0.AddArg(y)
  7660  		v.AddArg(v0)
  7661  		return true
  7662  	}
  7663  	// match: (GreaterEqual (CMPWconst [0] z:(AND x y)))
  7664  	// cond: z.Uses == 1
  7665  	// result: (GreaterEqual (TSTW x y))
  7666  	for {
  7667  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7668  			break
  7669  		}
  7670  		z := v_0.Args[0]
  7671  		if z.Op != ssaop.OpARM64AND {
  7672  			break
  7673  		}
  7674  		y := z.Args[1]
  7675  		x := z.Args[0]
  7676  		if !(z.Uses == 1) {
  7677  			break
  7678  		}
  7679  		v.Reset(ssaop.OpARM64GreaterEqual)
  7680  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  7681  		v0.AddArg2(x, y)
  7682  		v.AddArg(v0)
  7683  		return true
  7684  	}
  7685  	// match: (GreaterEqual (CMPconst [0] x:(ANDconst [c] y)))
  7686  	// cond: x.Uses == 1
  7687  	// result: (GreaterEqual (TSTconst [c] y))
  7688  	for {
  7689  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7690  			break
  7691  		}
  7692  		x := v_0.Args[0]
  7693  		if x.Op != ssaop.OpARM64ANDconst {
  7694  			break
  7695  		}
  7696  		c := ssa.AuxIntToInt64(x.AuxInt)
  7697  		y := x.Args[0]
  7698  		if !(x.Uses == 1) {
  7699  			break
  7700  		}
  7701  		v.Reset(ssaop.OpARM64GreaterEqual)
  7702  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  7703  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  7704  		v0.AddArg(y)
  7705  		v.AddArg(v0)
  7706  		return true
  7707  	}
  7708  	// match: (GreaterEqual (CMPconst [0] x:(ADDconst [c] y)))
  7709  	// cond: x.Uses == 1
  7710  	// result: (GreaterEqualNoov (CMNconst [c] y))
  7711  	for {
  7712  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7713  			break
  7714  		}
  7715  		x := v_0.Args[0]
  7716  		if x.Op != ssaop.OpARM64ADDconst {
  7717  			break
  7718  		}
  7719  		c := ssa.AuxIntToInt64(x.AuxInt)
  7720  		y := x.Args[0]
  7721  		if !(x.Uses == 1) {
  7722  			break
  7723  		}
  7724  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7725  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  7726  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  7727  		v0.AddArg(y)
  7728  		v.AddArg(v0)
  7729  		return true
  7730  	}
  7731  	// match: (GreaterEqual (CMPWconst [0] x:(ADDconst [c] y)))
  7732  	// cond: x.Uses == 1
  7733  	// result: (GreaterEqualNoov (CMNWconst [int32(c)] y))
  7734  	for {
  7735  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7736  			break
  7737  		}
  7738  		x := v_0.Args[0]
  7739  		if x.Op != ssaop.OpARM64ADDconst {
  7740  			break
  7741  		}
  7742  		c := ssa.AuxIntToInt64(x.AuxInt)
  7743  		y := x.Args[0]
  7744  		if !(x.Uses == 1) {
  7745  			break
  7746  		}
  7747  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7748  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  7749  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  7750  		v0.AddArg(y)
  7751  		v.AddArg(v0)
  7752  		return true
  7753  	}
  7754  	// match: (GreaterEqual (CMPconst [0] z:(ADD x y)))
  7755  	// cond: z.Uses == 1
  7756  	// result: (GreaterEqualNoov (CMN x y))
  7757  	for {
  7758  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7759  			break
  7760  		}
  7761  		z := v_0.Args[0]
  7762  		if z.Op != ssaop.OpARM64ADD {
  7763  			break
  7764  		}
  7765  		y := z.Args[1]
  7766  		x := z.Args[0]
  7767  		if !(z.Uses == 1) {
  7768  			break
  7769  		}
  7770  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7771  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  7772  		v0.AddArg2(x, y)
  7773  		v.AddArg(v0)
  7774  		return true
  7775  	}
  7776  	// match: (GreaterEqual (CMPWconst [0] z:(ADD x y)))
  7777  	// cond: z.Uses == 1
  7778  	// result: (GreaterEqualNoov (CMNW x y))
  7779  	for {
  7780  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7781  			break
  7782  		}
  7783  		z := v_0.Args[0]
  7784  		if z.Op != ssaop.OpARM64ADD {
  7785  			break
  7786  		}
  7787  		y := z.Args[1]
  7788  		x := z.Args[0]
  7789  		if !(z.Uses == 1) {
  7790  			break
  7791  		}
  7792  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7793  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  7794  		v0.AddArg2(x, y)
  7795  		v.AddArg(v0)
  7796  		return true
  7797  	}
  7798  	// match: (GreaterEqual (CMPconst [0] z:(MADD a x y)))
  7799  	// cond: z.Uses == 1
  7800  	// result: (GreaterEqualNoov (CMN a (MUL <x.Type> x y)))
  7801  	for {
  7802  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7803  			break
  7804  		}
  7805  		z := v_0.Args[0]
  7806  		if z.Op != ssaop.OpARM64MADD {
  7807  			break
  7808  		}
  7809  		y := z.Args[2]
  7810  		a := z.Args[0]
  7811  		x := z.Args[1]
  7812  		if !(z.Uses == 1) {
  7813  			break
  7814  		}
  7815  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7816  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  7817  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  7818  		v1.AddArg2(x, y)
  7819  		v0.AddArg2(a, v1)
  7820  		v.AddArg(v0)
  7821  		return true
  7822  	}
  7823  	// match: (GreaterEqual (CMPWconst [0] z:(MADDW a x y)))
  7824  	// cond: z.Uses == 1
  7825  	// result: (GreaterEqualNoov (CMNW a (MULW <x.Type> x y)))
  7826  	for {
  7827  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7828  			break
  7829  		}
  7830  		z := v_0.Args[0]
  7831  		if z.Op != ssaop.OpARM64MADDW {
  7832  			break
  7833  		}
  7834  		y := z.Args[2]
  7835  		a := z.Args[0]
  7836  		x := z.Args[1]
  7837  		if !(z.Uses == 1) {
  7838  			break
  7839  		}
  7840  		v.Reset(ssaop.OpARM64GreaterEqualNoov)
  7841  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  7842  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  7843  		v1.AddArg2(x, y)
  7844  		v0.AddArg2(a, v1)
  7845  		v.AddArg(v0)
  7846  		return true
  7847  	}
  7848  	// match: (GreaterEqual (FlagConstant [fc]))
  7849  	// result: (MOVDconst [ssa.B2i(fc.Ge())])
  7850  	for {
  7851  		if v_0.Op != ssaop.OpARM64FlagConstant {
  7852  			break
  7853  		}
  7854  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  7855  		v.Reset(ssaop.OpARM64MOVDconst)
  7856  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ge()))
  7857  		return true
  7858  	}
  7859  	// match: (GreaterEqual (InvertFlags x))
  7860  	// result: (LessEqual x)
  7861  	for {
  7862  		if v_0.Op != ssaop.OpARM64InvertFlags {
  7863  			break
  7864  		}
  7865  		x := v_0.Args[0]
  7866  		v.Reset(ssaop.OpARM64LessEqual)
  7867  		v.AddArg(x)
  7868  		return true
  7869  	}
  7870  	// match: (GreaterEqual (CMPconst x [0]))
  7871  	// result: (XORconst [1] (SRLconst <v.Type> [63] x))
  7872  	for {
  7873  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7874  			break
  7875  		}
  7876  		x := v_0.Args[0]
  7877  		v.Reset(ssaop.OpARM64XORconst)
  7878  		v.AuxInt = ssa.Int64ToAuxInt(1)
  7879  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, v.Type)
  7880  		v0.AuxInt = ssa.Int64ToAuxInt(63)
  7881  		v0.AddArg(x)
  7882  		v.AddArg(v0)
  7883  		return true
  7884  	}
  7885  	// match: (GreaterEqual (CMPWconst x [0]))
  7886  	// result: (XORconst [1] (UBFX <v.Type> [ssa.ArmBFAuxInt(31,1)] x))
  7887  	for {
  7888  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7889  			break
  7890  		}
  7891  		x := v_0.Args[0]
  7892  		v.Reset(ssaop.OpARM64XORconst)
  7893  		v.AuxInt = ssa.Int64ToAuxInt(1)
  7894  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UBFX, v.Type)
  7895  		v0.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(31, 1))
  7896  		v0.AddArg(x)
  7897  		v.AddArg(v0)
  7898  		return true
  7899  	}
  7900  	return false
  7901  }
  7902  func rewriteValue_OpARM64GreaterEqualF(v *ssa.Value) bool {
  7903  	v_0 := v.Args[0]
  7904  	// match: (GreaterEqualF (InvertFlags x))
  7905  	// result: (LessEqualF x)
  7906  	for {
  7907  		if v_0.Op != ssaop.OpARM64InvertFlags {
  7908  			break
  7909  		}
  7910  		x := v_0.Args[0]
  7911  		v.Reset(ssaop.OpARM64LessEqualF)
  7912  		v.AddArg(x)
  7913  		return true
  7914  	}
  7915  	return false
  7916  }
  7917  func rewriteValue_OpARM64GreaterEqualNoov(v *ssa.Value) bool {
  7918  	v_0 := v.Args[0]
  7919  	// match: (GreaterEqualNoov (FlagConstant [fc]))
  7920  	// result: (MOVDconst [ssa.B2i(fc.GeNoov())])
  7921  	for {
  7922  		if v_0.Op != ssaop.OpARM64FlagConstant {
  7923  			break
  7924  		}
  7925  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  7926  		v.Reset(ssaop.OpARM64MOVDconst)
  7927  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.GeNoov()))
  7928  		return true
  7929  	}
  7930  	return false
  7931  }
  7932  func rewriteValue_OpARM64GreaterEqualU(v *ssa.Value) bool {
  7933  	v_0 := v.Args[0]
  7934  	// match: (GreaterEqualU (FlagConstant [fc]))
  7935  	// result: (MOVDconst [ssa.B2i(fc.Uge())])
  7936  	for {
  7937  		if v_0.Op != ssaop.OpARM64FlagConstant {
  7938  			break
  7939  		}
  7940  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  7941  		v.Reset(ssaop.OpARM64MOVDconst)
  7942  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Uge()))
  7943  		return true
  7944  	}
  7945  	// match: (GreaterEqualU (InvertFlags x))
  7946  	// result: (LessEqualU x)
  7947  	for {
  7948  		if v_0.Op != ssaop.OpARM64InvertFlags {
  7949  			break
  7950  		}
  7951  		x := v_0.Args[0]
  7952  		v.Reset(ssaop.OpARM64LessEqualU)
  7953  		v.AddArg(x)
  7954  		return true
  7955  	}
  7956  	return false
  7957  }
  7958  func rewriteValue_OpARM64GreaterThan(v *ssa.Value) bool {
  7959  	v_0 := v.Args[0]
  7960  	b := v.Block
  7961  	// match: (GreaterThan (CMPconst [0] z:(AND x y)))
  7962  	// cond: z.Uses == 1
  7963  	// result: (GreaterThan (TST x y))
  7964  	for {
  7965  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  7966  			break
  7967  		}
  7968  		z := v_0.Args[0]
  7969  		if z.Op != ssaop.OpARM64AND {
  7970  			break
  7971  		}
  7972  		y := z.Args[1]
  7973  		x := z.Args[0]
  7974  		if !(z.Uses == 1) {
  7975  			break
  7976  		}
  7977  		v.Reset(ssaop.OpARM64GreaterThan)
  7978  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  7979  		v0.AddArg2(x, y)
  7980  		v.AddArg(v0)
  7981  		return true
  7982  	}
  7983  	// match: (GreaterThan (CMPWconst [0] x:(ANDconst [c] y)))
  7984  	// cond: x.Uses == 1
  7985  	// result: (GreaterThan (TSTWconst [int32(c)] y))
  7986  	for {
  7987  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  7988  			break
  7989  		}
  7990  		x := v_0.Args[0]
  7991  		if x.Op != ssaop.OpARM64ANDconst {
  7992  			break
  7993  		}
  7994  		c := ssa.AuxIntToInt64(x.AuxInt)
  7995  		y := x.Args[0]
  7996  		if !(x.Uses == 1) {
  7997  			break
  7998  		}
  7999  		v.Reset(ssaop.OpARM64GreaterThan)
  8000  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8001  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8002  		v0.AddArg(y)
  8003  		v.AddArg(v0)
  8004  		return true
  8005  	}
  8006  	// match: (GreaterThan (CMPWconst [0] z:(AND x y)))
  8007  	// cond: z.Uses == 1
  8008  	// result: (GreaterThan (TSTW x y))
  8009  	for {
  8010  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8011  			break
  8012  		}
  8013  		z := v_0.Args[0]
  8014  		if z.Op != ssaop.OpARM64AND {
  8015  			break
  8016  		}
  8017  		y := z.Args[1]
  8018  		x := z.Args[0]
  8019  		if !(z.Uses == 1) {
  8020  			break
  8021  		}
  8022  		v.Reset(ssaop.OpARM64GreaterThan)
  8023  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8024  		v0.AddArg2(x, y)
  8025  		v.AddArg(v0)
  8026  		return true
  8027  	}
  8028  	// match: (GreaterThan (CMPconst [0] x:(ANDconst [c] y)))
  8029  	// cond: x.Uses == 1
  8030  	// result: (GreaterThan (TSTconst [c] y))
  8031  	for {
  8032  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8033  			break
  8034  		}
  8035  		x := v_0.Args[0]
  8036  		if x.Op != ssaop.OpARM64ANDconst {
  8037  			break
  8038  		}
  8039  		c := ssa.AuxIntToInt64(x.AuxInt)
  8040  		y := x.Args[0]
  8041  		if !(x.Uses == 1) {
  8042  			break
  8043  		}
  8044  		v.Reset(ssaop.OpARM64GreaterThan)
  8045  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8046  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8047  		v0.AddArg(y)
  8048  		v.AddArg(v0)
  8049  		return true
  8050  	}
  8051  	// match: (GreaterThan (FlagConstant [fc]))
  8052  	// result: (MOVDconst [ssa.B2i(fc.Gt())])
  8053  	for {
  8054  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8055  			break
  8056  		}
  8057  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8058  		v.Reset(ssaop.OpARM64MOVDconst)
  8059  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Gt()))
  8060  		return true
  8061  	}
  8062  	// match: (GreaterThan (InvertFlags x))
  8063  	// result: (LessThan x)
  8064  	for {
  8065  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8066  			break
  8067  		}
  8068  		x := v_0.Args[0]
  8069  		v.Reset(ssaop.OpARM64LessThan)
  8070  		v.AddArg(x)
  8071  		return true
  8072  	}
  8073  	return false
  8074  }
  8075  func rewriteValue_OpARM64GreaterThanF(v *ssa.Value) bool {
  8076  	v_0 := v.Args[0]
  8077  	// match: (GreaterThanF (InvertFlags x))
  8078  	// result: (LessThanF x)
  8079  	for {
  8080  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8081  			break
  8082  		}
  8083  		x := v_0.Args[0]
  8084  		v.Reset(ssaop.OpARM64LessThanF)
  8085  		v.AddArg(x)
  8086  		return true
  8087  	}
  8088  	return false
  8089  }
  8090  func rewriteValue_OpARM64GreaterThanU(v *ssa.Value) bool {
  8091  	v_0 := v.Args[0]
  8092  	// match: (GreaterThanU (FlagConstant [fc]))
  8093  	// result: (MOVDconst [ssa.B2i(fc.Ugt())])
  8094  	for {
  8095  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8096  			break
  8097  		}
  8098  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8099  		v.Reset(ssaop.OpARM64MOVDconst)
  8100  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ugt()))
  8101  		return true
  8102  	}
  8103  	// match: (GreaterThanU (InvertFlags x))
  8104  	// result: (LessThanU x)
  8105  	for {
  8106  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8107  			break
  8108  		}
  8109  		x := v_0.Args[0]
  8110  		v.Reset(ssaop.OpARM64LessThanU)
  8111  		v.AddArg(x)
  8112  		return true
  8113  	}
  8114  	return false
  8115  }
  8116  func rewriteValue_OpARM64LDP(v *ssa.Value) bool {
  8117  	v_1 := v.Args[1]
  8118  	v_0 := v.Args[0]
  8119  	b := v.Block
  8120  	config := b.Func.Config
  8121  	// match: (LDP [off1] {sym} (ADDconst [off2] ptr) mem)
  8122  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  8123  	// result: (LDP [off1+int32(off2)] {sym} ptr mem)
  8124  	for {
  8125  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  8126  		sym := ssa.AuxToSym(v.Aux)
  8127  		if v_0.Op != ssaop.OpARM64ADDconst {
  8128  			break
  8129  		}
  8130  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
  8131  		ptr := v_0.Args[0]
  8132  		mem := v_1
  8133  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  8134  			break
  8135  		}
  8136  		v.Reset(ssaop.OpARM64LDP)
  8137  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
  8138  		v.Aux = ssa.SymToAux(sym)
  8139  		v.AddArg2(ptr, mem)
  8140  		return true
  8141  	}
  8142  	// match: (LDP [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
  8143  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
  8144  	// result: (LDP [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
  8145  	for {
  8146  		off1 := ssa.AuxIntToInt32(v.AuxInt)
  8147  		sym1 := ssa.AuxToSym(v.Aux)
  8148  		if v_0.Op != ssaop.OpARM64MOVDaddr {
  8149  			break
  8150  		}
  8151  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
  8152  		sym2 := ssa.AuxToSym(v_0.Aux)
  8153  		ptr := v_0.Args[0]
  8154  		mem := v_1
  8155  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
  8156  			break
  8157  		}
  8158  		v.Reset(ssaop.OpARM64LDP)
  8159  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
  8160  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
  8161  		v.AddArg2(ptr, mem)
  8162  		return true
  8163  	}
  8164  	return false
  8165  }
  8166  func rewriteValue_OpARM64LessEqual(v *ssa.Value) bool {
  8167  	v_0 := v.Args[0]
  8168  	b := v.Block
  8169  	// match: (LessEqual (CMPconst [0] z:(AND x y)))
  8170  	// cond: z.Uses == 1
  8171  	// result: (LessEqual (TST x y))
  8172  	for {
  8173  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8174  			break
  8175  		}
  8176  		z := v_0.Args[0]
  8177  		if z.Op != ssaop.OpARM64AND {
  8178  			break
  8179  		}
  8180  		y := z.Args[1]
  8181  		x := z.Args[0]
  8182  		if !(z.Uses == 1) {
  8183  			break
  8184  		}
  8185  		v.Reset(ssaop.OpARM64LessEqual)
  8186  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8187  		v0.AddArg2(x, y)
  8188  		v.AddArg(v0)
  8189  		return true
  8190  	}
  8191  	// match: (LessEqual (CMPWconst [0] x:(ANDconst [c] y)))
  8192  	// cond: x.Uses == 1
  8193  	// result: (LessEqual (TSTWconst [int32(c)] y))
  8194  	for {
  8195  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8196  			break
  8197  		}
  8198  		x := v_0.Args[0]
  8199  		if x.Op != ssaop.OpARM64ANDconst {
  8200  			break
  8201  		}
  8202  		c := ssa.AuxIntToInt64(x.AuxInt)
  8203  		y := x.Args[0]
  8204  		if !(x.Uses == 1) {
  8205  			break
  8206  		}
  8207  		v.Reset(ssaop.OpARM64LessEqual)
  8208  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8209  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8210  		v0.AddArg(y)
  8211  		v.AddArg(v0)
  8212  		return true
  8213  	}
  8214  	// match: (LessEqual (CMPWconst [0] z:(AND x y)))
  8215  	// cond: z.Uses == 1
  8216  	// result: (LessEqual (TSTW x y))
  8217  	for {
  8218  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8219  			break
  8220  		}
  8221  		z := v_0.Args[0]
  8222  		if z.Op != ssaop.OpARM64AND {
  8223  			break
  8224  		}
  8225  		y := z.Args[1]
  8226  		x := z.Args[0]
  8227  		if !(z.Uses == 1) {
  8228  			break
  8229  		}
  8230  		v.Reset(ssaop.OpARM64LessEqual)
  8231  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8232  		v0.AddArg2(x, y)
  8233  		v.AddArg(v0)
  8234  		return true
  8235  	}
  8236  	// match: (LessEqual (CMPconst [0] x:(ANDconst [c] y)))
  8237  	// cond: x.Uses == 1
  8238  	// result: (LessEqual (TSTconst [c] y))
  8239  	for {
  8240  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8241  			break
  8242  		}
  8243  		x := v_0.Args[0]
  8244  		if x.Op != ssaop.OpARM64ANDconst {
  8245  			break
  8246  		}
  8247  		c := ssa.AuxIntToInt64(x.AuxInt)
  8248  		y := x.Args[0]
  8249  		if !(x.Uses == 1) {
  8250  			break
  8251  		}
  8252  		v.Reset(ssaop.OpARM64LessEqual)
  8253  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8254  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8255  		v0.AddArg(y)
  8256  		v.AddArg(v0)
  8257  		return true
  8258  	}
  8259  	// match: (LessEqual (FlagConstant [fc]))
  8260  	// result: (MOVDconst [ssa.B2i(fc.Le())])
  8261  	for {
  8262  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8263  			break
  8264  		}
  8265  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8266  		v.Reset(ssaop.OpARM64MOVDconst)
  8267  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Le()))
  8268  		return true
  8269  	}
  8270  	// match: (LessEqual (InvertFlags x))
  8271  	// result: (GreaterEqual x)
  8272  	for {
  8273  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8274  			break
  8275  		}
  8276  		x := v_0.Args[0]
  8277  		v.Reset(ssaop.OpARM64GreaterEqual)
  8278  		v.AddArg(x)
  8279  		return true
  8280  	}
  8281  	return false
  8282  }
  8283  func rewriteValue_OpARM64LessEqualF(v *ssa.Value) bool {
  8284  	v_0 := v.Args[0]
  8285  	// match: (LessEqualF (InvertFlags x))
  8286  	// result: (GreaterEqualF x)
  8287  	for {
  8288  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8289  			break
  8290  		}
  8291  		x := v_0.Args[0]
  8292  		v.Reset(ssaop.OpARM64GreaterEqualF)
  8293  		v.AddArg(x)
  8294  		return true
  8295  	}
  8296  	return false
  8297  }
  8298  func rewriteValue_OpARM64LessEqualU(v *ssa.Value) bool {
  8299  	v_0 := v.Args[0]
  8300  	// match: (LessEqualU (FlagConstant [fc]))
  8301  	// result: (MOVDconst [ssa.B2i(fc.Ule())])
  8302  	for {
  8303  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8304  			break
  8305  		}
  8306  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8307  		v.Reset(ssaop.OpARM64MOVDconst)
  8308  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ule()))
  8309  		return true
  8310  	}
  8311  	// match: (LessEqualU (InvertFlags x))
  8312  	// result: (GreaterEqualU x)
  8313  	for {
  8314  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8315  			break
  8316  		}
  8317  		x := v_0.Args[0]
  8318  		v.Reset(ssaop.OpARM64GreaterEqualU)
  8319  		v.AddArg(x)
  8320  		return true
  8321  	}
  8322  	return false
  8323  }
  8324  func rewriteValue_OpARM64LessThan(v *ssa.Value) bool {
  8325  	v_0 := v.Args[0]
  8326  	b := v.Block
  8327  	// match: (LessThan (CMPconst [0] z:(AND x y)))
  8328  	// cond: z.Uses == 1
  8329  	// result: (LessThan (TST x y))
  8330  	for {
  8331  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8332  			break
  8333  		}
  8334  		z := v_0.Args[0]
  8335  		if z.Op != ssaop.OpARM64AND {
  8336  			break
  8337  		}
  8338  		y := z.Args[1]
  8339  		x := z.Args[0]
  8340  		if !(z.Uses == 1) {
  8341  			break
  8342  		}
  8343  		v.Reset(ssaop.OpARM64LessThan)
  8344  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
  8345  		v0.AddArg2(x, y)
  8346  		v.AddArg(v0)
  8347  		return true
  8348  	}
  8349  	// match: (LessThan (CMPWconst [0] x:(ANDconst [c] y)))
  8350  	// cond: x.Uses == 1
  8351  	// result: (LessThan (TSTWconst [int32(c)] y))
  8352  	for {
  8353  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8354  			break
  8355  		}
  8356  		x := v_0.Args[0]
  8357  		if x.Op != ssaop.OpARM64ANDconst {
  8358  			break
  8359  		}
  8360  		c := ssa.AuxIntToInt64(x.AuxInt)
  8361  		y := x.Args[0]
  8362  		if !(x.Uses == 1) {
  8363  			break
  8364  		}
  8365  		v.Reset(ssaop.OpARM64LessThan)
  8366  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
  8367  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8368  		v0.AddArg(y)
  8369  		v.AddArg(v0)
  8370  		return true
  8371  	}
  8372  	// match: (LessThan (CMPWconst [0] z:(AND x y)))
  8373  	// cond: z.Uses == 1
  8374  	// result: (LessThan (TSTW x y))
  8375  	for {
  8376  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8377  			break
  8378  		}
  8379  		z := v_0.Args[0]
  8380  		if z.Op != ssaop.OpARM64AND {
  8381  			break
  8382  		}
  8383  		y := z.Args[1]
  8384  		x := z.Args[0]
  8385  		if !(z.Uses == 1) {
  8386  			break
  8387  		}
  8388  		v.Reset(ssaop.OpARM64LessThan)
  8389  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
  8390  		v0.AddArg2(x, y)
  8391  		v.AddArg(v0)
  8392  		return true
  8393  	}
  8394  	// match: (LessThan (CMPconst [0] x:(ANDconst [c] y)))
  8395  	// cond: x.Uses == 1
  8396  	// result: (LessThan (TSTconst [c] y))
  8397  	for {
  8398  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8399  			break
  8400  		}
  8401  		x := v_0.Args[0]
  8402  		if x.Op != ssaop.OpARM64ANDconst {
  8403  			break
  8404  		}
  8405  		c := ssa.AuxIntToInt64(x.AuxInt)
  8406  		y := x.Args[0]
  8407  		if !(x.Uses == 1) {
  8408  			break
  8409  		}
  8410  		v.Reset(ssaop.OpARM64LessThan)
  8411  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
  8412  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8413  		v0.AddArg(y)
  8414  		v.AddArg(v0)
  8415  		return true
  8416  	}
  8417  	// match: (LessThan (CMPconst [0] x:(ADDconst [c] y)))
  8418  	// cond: x.Uses == 1
  8419  	// result: (LessThanNoov (CMNconst [c] y))
  8420  	for {
  8421  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8422  			break
  8423  		}
  8424  		x := v_0.Args[0]
  8425  		if x.Op != ssaop.OpARM64ADDconst {
  8426  			break
  8427  		}
  8428  		c := ssa.AuxIntToInt64(x.AuxInt)
  8429  		y := x.Args[0]
  8430  		if !(x.Uses == 1) {
  8431  			break
  8432  		}
  8433  		v.Reset(ssaop.OpARM64LessThanNoov)
  8434  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
  8435  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  8436  		v0.AddArg(y)
  8437  		v.AddArg(v0)
  8438  		return true
  8439  	}
  8440  	// match: (LessThan (CMPWconst [0] x:(ADDconst [c] y)))
  8441  	// cond: x.Uses == 1
  8442  	// result: (LessThanNoov (CMNWconst [int32(c)] y))
  8443  	for {
  8444  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8445  			break
  8446  		}
  8447  		x := v_0.Args[0]
  8448  		if x.Op != ssaop.OpARM64ADDconst {
  8449  			break
  8450  		}
  8451  		c := ssa.AuxIntToInt64(x.AuxInt)
  8452  		y := x.Args[0]
  8453  		if !(x.Uses == 1) {
  8454  			break
  8455  		}
  8456  		v.Reset(ssaop.OpARM64LessThanNoov)
  8457  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
  8458  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
  8459  		v0.AddArg(y)
  8460  		v.AddArg(v0)
  8461  		return true
  8462  	}
  8463  	// match: (LessThan (CMPconst [0] z:(ADD x y)))
  8464  	// cond: z.Uses == 1
  8465  	// result: (LessThanNoov (CMN x y))
  8466  	for {
  8467  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8468  			break
  8469  		}
  8470  		z := v_0.Args[0]
  8471  		if z.Op != ssaop.OpARM64ADD {
  8472  			break
  8473  		}
  8474  		y := z.Args[1]
  8475  		x := z.Args[0]
  8476  		if !(z.Uses == 1) {
  8477  			break
  8478  		}
  8479  		v.Reset(ssaop.OpARM64LessThanNoov)
  8480  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  8481  		v0.AddArg2(x, y)
  8482  		v.AddArg(v0)
  8483  		return true
  8484  	}
  8485  	// match: (LessThan (CMPWconst [0] z:(ADD x y)))
  8486  	// cond: z.Uses == 1
  8487  	// result: (LessThanNoov (CMNW x y))
  8488  	for {
  8489  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8490  			break
  8491  		}
  8492  		z := v_0.Args[0]
  8493  		if z.Op != ssaop.OpARM64ADD {
  8494  			break
  8495  		}
  8496  		y := z.Args[1]
  8497  		x := z.Args[0]
  8498  		if !(z.Uses == 1) {
  8499  			break
  8500  		}
  8501  		v.Reset(ssaop.OpARM64LessThanNoov)
  8502  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  8503  		v0.AddArg2(x, y)
  8504  		v.AddArg(v0)
  8505  		return true
  8506  	}
  8507  	// match: (LessThan (CMPconst [0] z:(MADD a x y)))
  8508  	// cond: z.Uses == 1
  8509  	// result: (LessThanNoov (CMN a (MUL <x.Type> x y)))
  8510  	for {
  8511  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8512  			break
  8513  		}
  8514  		z := v_0.Args[0]
  8515  		if z.Op != ssaop.OpARM64MADD {
  8516  			break
  8517  		}
  8518  		y := z.Args[2]
  8519  		a := z.Args[0]
  8520  		x := z.Args[1]
  8521  		if !(z.Uses == 1) {
  8522  			break
  8523  		}
  8524  		v.Reset(ssaop.OpARM64LessThanNoov)
  8525  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
  8526  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  8527  		v1.AddArg2(x, y)
  8528  		v0.AddArg2(a, v1)
  8529  		v.AddArg(v0)
  8530  		return true
  8531  	}
  8532  	// match: (LessThan (CMPWconst [0] z:(MADDW a x y)))
  8533  	// cond: z.Uses == 1
  8534  	// result: (LessThanNoov (CMNW a (MULW <x.Type> x y)))
  8535  	for {
  8536  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8537  			break
  8538  		}
  8539  		z := v_0.Args[0]
  8540  		if z.Op != ssaop.OpARM64MADDW {
  8541  			break
  8542  		}
  8543  		y := z.Args[2]
  8544  		a := z.Args[0]
  8545  		x := z.Args[1]
  8546  		if !(z.Uses == 1) {
  8547  			break
  8548  		}
  8549  		v.Reset(ssaop.OpARM64LessThanNoov)
  8550  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
  8551  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  8552  		v1.AddArg2(x, y)
  8553  		v0.AddArg2(a, v1)
  8554  		v.AddArg(v0)
  8555  		return true
  8556  	}
  8557  	// match: (LessThan (FlagConstant [fc]))
  8558  	// result: (MOVDconst [ssa.B2i(fc.Lt())])
  8559  	for {
  8560  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8561  			break
  8562  		}
  8563  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8564  		v.Reset(ssaop.OpARM64MOVDconst)
  8565  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Lt()))
  8566  		return true
  8567  	}
  8568  	// match: (LessThan (InvertFlags x))
  8569  	// result: (GreaterThan x)
  8570  	for {
  8571  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8572  			break
  8573  		}
  8574  		x := v_0.Args[0]
  8575  		v.Reset(ssaop.OpARM64GreaterThan)
  8576  		v.AddArg(x)
  8577  		return true
  8578  	}
  8579  	// match: (LessThan (CMPconst x [0]))
  8580  	// result: (SRLconst [63] x)
  8581  	for {
  8582  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
  8583  			break
  8584  		}
  8585  		x := v_0.Args[0]
  8586  		v.Reset(ssaop.OpARM64SRLconst)
  8587  		v.AuxInt = ssa.Int64ToAuxInt(63)
  8588  		v.AddArg(x)
  8589  		return true
  8590  	}
  8591  	// match: (LessThan (CMPWconst x [0]))
  8592  	// result: (UBFX [ssa.ArmBFAuxInt(31,1)] x)
  8593  	for {
  8594  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
  8595  			break
  8596  		}
  8597  		x := v_0.Args[0]
  8598  		v.Reset(ssaop.OpARM64UBFX)
  8599  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(31, 1))
  8600  		v.AddArg(x)
  8601  		return true
  8602  	}
  8603  	return false
  8604  }
  8605  func rewriteValue_OpARM64LessThanF(v *ssa.Value) bool {
  8606  	v_0 := v.Args[0]
  8607  	// match: (LessThanF (InvertFlags x))
  8608  	// result: (GreaterThanF x)
  8609  	for {
  8610  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8611  			break
  8612  		}
  8613  		x := v_0.Args[0]
  8614  		v.Reset(ssaop.OpARM64GreaterThanF)
  8615  		v.AddArg(x)
  8616  		return true
  8617  	}
  8618  	return false
  8619  }
  8620  func rewriteValue_OpARM64LessThanNoov(v *ssa.Value) bool {
  8621  	v_0 := v.Args[0]
  8622  	// match: (LessThanNoov (FlagConstant [fc]))
  8623  	// result: (MOVDconst [ssa.B2i(fc.LtNoov())])
  8624  	for {
  8625  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8626  			break
  8627  		}
  8628  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8629  		v.Reset(ssaop.OpARM64MOVDconst)
  8630  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.LtNoov()))
  8631  		return true
  8632  	}
  8633  	return false
  8634  }
  8635  func rewriteValue_OpARM64LessThanU(v *ssa.Value) bool {
  8636  	v_0 := v.Args[0]
  8637  	// match: (LessThanU (FlagConstant [fc]))
  8638  	// result: (MOVDconst [ssa.B2i(fc.Ult())])
  8639  	for {
  8640  		if v_0.Op != ssaop.OpARM64FlagConstant {
  8641  			break
  8642  		}
  8643  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
  8644  		v.Reset(ssaop.OpARM64MOVDconst)
  8645  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ult()))
  8646  		return true
  8647  	}
  8648  	// match: (LessThanU (InvertFlags x))
  8649  	// result: (GreaterThanU x)
  8650  	for {
  8651  		if v_0.Op != ssaop.OpARM64InvertFlags {
  8652  			break
  8653  		}
  8654  		x := v_0.Args[0]
  8655  		v.Reset(ssaop.OpARM64GreaterThanU)
  8656  		v.AddArg(x)
  8657  		return true
  8658  	}
  8659  	return false
  8660  }
  8661  func rewriteValue_OpARM64LoweredPanicBoundsCR(v *ssa.Value) bool {
  8662  	v_1 := v.Args[1]
  8663  	v_0 := v.Args[0]
  8664  	// match: (LoweredPanicBoundsCR [kind] {p} (MOVDconst [c]) mem)
  8665  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:p.C, Cy:c}} mem)
  8666  	for {
  8667  		kind := ssa.AuxIntToInt64(v.AuxInt)
  8668  		p := ssa.AuxToPanicBoundsC(v.Aux)
  8669  		if v_0.Op != ssaop.OpARM64MOVDconst {
  8670  			break
  8671  		}
  8672  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  8673  		mem := v_1
  8674  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCC)
  8675  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  8676  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: p.C, Cy: c})
  8677  		v.AddArg(mem)
  8678  		return true
  8679  	}
  8680  	return false
  8681  }
  8682  func rewriteValue_OpARM64LoweredPanicBoundsRC(v *ssa.Value) bool {
  8683  	v_1 := v.Args[1]
  8684  	v_0 := v.Args[0]
  8685  	// match: (LoweredPanicBoundsRC [kind] {p} (MOVDconst [c]) mem)
  8686  	// result: (LoweredPanicBoundsCC [kind] {ssa.PanicBoundsCC{Cx:c, Cy:p.C}} mem)
  8687  	for {
  8688  		kind := ssa.AuxIntToInt64(v.AuxInt)
  8689  		p := ssa.AuxToPanicBoundsC(v.Aux)
  8690  		if v_0.Op != ssaop.OpARM64MOVDconst {
  8691  			break
  8692  		}
  8693  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  8694  		mem := v_1
  8695  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCC)
  8696  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  8697  		v.Aux = ssa.PanicBoundsCCToAux(ssa.PanicBoundsCC{Cx: c, Cy: p.C})
  8698  		v.AddArg(mem)
  8699  		return true
  8700  	}
  8701  	return false
  8702  }
  8703  func rewriteValue_OpARM64LoweredPanicBoundsRR(v *ssa.Value) bool {
  8704  	v_2 := v.Args[2]
  8705  	v_1 := v.Args[1]
  8706  	v_0 := v.Args[0]
  8707  	// match: (LoweredPanicBoundsRR [kind] x (MOVDconst [c]) mem)
  8708  	// result: (LoweredPanicBoundsRC [kind] x {ssa.PanicBoundsC{C:c}} mem)
  8709  	for {
  8710  		kind := ssa.AuxIntToInt64(v.AuxInt)
  8711  		x := v_0
  8712  		if v_1.Op != ssaop.OpARM64MOVDconst {
  8713  			break
  8714  		}
  8715  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  8716  		mem := v_2
  8717  		v.Reset(ssaop.OpARM64LoweredPanicBoundsRC)
  8718  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  8719  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  8720  		v.AddArg2(x, mem)
  8721  		return true
  8722  	}
  8723  	// match: (LoweredPanicBoundsRR [kind] (MOVDconst [c]) y mem)
  8724  	// result: (LoweredPanicBoundsCR [kind] {ssa.PanicBoundsC{C:c}} y mem)
  8725  	for {
  8726  		kind := ssa.AuxIntToInt64(v.AuxInt)
  8727  		if v_0.Op != ssaop.OpARM64MOVDconst {
  8728  			break
  8729  		}
  8730  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  8731  		y := v_1
  8732  		mem := v_2
  8733  		v.Reset(ssaop.OpARM64LoweredPanicBoundsCR)
  8734  		v.AuxInt = ssa.Int64ToAuxInt(kind)
  8735  		v.Aux = ssa.PanicBoundsCToAux(ssa.PanicBoundsC{C: c})
  8736  		v.AddArg2(y, mem)
  8737  		return true
  8738  	}
  8739  	return false
  8740  }
  8741  func rewriteValue_OpARM64MADD(v *ssa.Value) bool {
  8742  	v_2 := v.Args[2]
  8743  	v_1 := v.Args[1]
  8744  	v_0 := v.Args[0]
  8745  	b := v.Block
  8746  	// match: (MADD a x (MOVDconst [-1]))
  8747  	// result: (SUB a x)
  8748  	for {
  8749  		a := v_0
  8750  		x := v_1
  8751  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != -1 {
  8752  			break
  8753  		}
  8754  		v.Reset(ssaop.OpARM64SUB)
  8755  		v.AddArg2(a, x)
  8756  		return true
  8757  	}
  8758  	// match: (MADD a _ (MOVDconst [0]))
  8759  	// result: a
  8760  	for {
  8761  		a := v_0
  8762  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 0 {
  8763  			break
  8764  		}
  8765  		v.CopyOf(a)
  8766  		return true
  8767  	}
  8768  	// match: (MADD a x (MOVDconst [1]))
  8769  	// result: (ADD a x)
  8770  	for {
  8771  		a := v_0
  8772  		x := v_1
  8773  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 1 {
  8774  			break
  8775  		}
  8776  		v.Reset(ssaop.OpARM64ADD)
  8777  		v.AddArg2(a, x)
  8778  		return true
  8779  	}
  8780  	// match: (MADD a x (MOVDconst [c]))
  8781  	// cond: ssa.IsPowerOfTwo(c)
  8782  	// result: (ADDshiftLL a x [ssa.Log64(c)])
  8783  	for {
  8784  		a := v_0
  8785  		x := v_1
  8786  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8787  			break
  8788  		}
  8789  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8790  		if !(ssa.IsPowerOfTwo(c)) {
  8791  			break
  8792  		}
  8793  		v.Reset(ssaop.OpARM64ADDshiftLL)
  8794  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  8795  		v.AddArg2(a, x)
  8796  		return true
  8797  	}
  8798  	// match: (MADD a x (MOVDconst [c]))
  8799  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
  8800  	// result: (ADD a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  8801  	for {
  8802  		a := v_0
  8803  		x := v_1
  8804  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8805  			break
  8806  		}
  8807  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8808  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
  8809  			break
  8810  		}
  8811  		v.Reset(ssaop.OpARM64ADD)
  8812  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  8813  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  8814  		v0.AddArg2(x, x)
  8815  		v.AddArg2(a, v0)
  8816  		return true
  8817  	}
  8818  	// match: (MADD a x (MOVDconst [c]))
  8819  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
  8820  	// result: (SUB a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
  8821  	for {
  8822  		a := v_0
  8823  		x := v_1
  8824  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8825  			break
  8826  		}
  8827  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8828  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
  8829  			break
  8830  		}
  8831  		v.Reset(ssaop.OpARM64SUB)
  8832  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  8833  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  8834  		v0.AddArg2(x, x)
  8835  		v.AddArg2(a, v0)
  8836  		return true
  8837  	}
  8838  	// match: (MADD a x (MOVDconst [c]))
  8839  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
  8840  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
  8841  	for {
  8842  		a := v_0
  8843  		x := v_1
  8844  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8845  			break
  8846  		}
  8847  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8848  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
  8849  			break
  8850  		}
  8851  		v.Reset(ssaop.OpARM64SUBshiftLL)
  8852  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  8853  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  8854  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  8855  		v0.AddArg2(x, x)
  8856  		v.AddArg2(a, v0)
  8857  		return true
  8858  	}
  8859  	// match: (MADD a x (MOVDconst [c]))
  8860  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
  8861  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
  8862  	for {
  8863  		a := v_0
  8864  		x := v_1
  8865  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8866  			break
  8867  		}
  8868  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8869  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
  8870  			break
  8871  		}
  8872  		v.Reset(ssaop.OpARM64ADDshiftLL)
  8873  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  8874  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  8875  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  8876  		v0.AddArg2(x, x)
  8877  		v.AddArg2(a, v0)
  8878  		return true
  8879  	}
  8880  	// match: (MADD a x (MOVDconst [c]))
  8881  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
  8882  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
  8883  	for {
  8884  		a := v_0
  8885  		x := v_1
  8886  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8887  			break
  8888  		}
  8889  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8890  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
  8891  			break
  8892  		}
  8893  		v.Reset(ssaop.OpARM64SUBshiftLL)
  8894  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  8895  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  8896  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  8897  		v0.AddArg2(x, x)
  8898  		v.AddArg2(a, v0)
  8899  		return true
  8900  	}
  8901  	// match: (MADD a x (MOVDconst [c]))
  8902  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
  8903  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
  8904  	for {
  8905  		a := v_0
  8906  		x := v_1
  8907  		if v_2.Op != ssaop.OpARM64MOVDconst {
  8908  			break
  8909  		}
  8910  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  8911  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
  8912  			break
  8913  		}
  8914  		v.Reset(ssaop.OpARM64ADDshiftLL)
  8915  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  8916  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  8917  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  8918  		v0.AddArg2(x, x)
  8919  		v.AddArg2(a, v0)
  8920  		return true
  8921  	}
  8922  	// match: (MADD a (MOVDconst [-1]) x)
  8923  	// result: (SUB a x)
  8924  	for {
  8925  		a := v_0
  8926  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  8927  			break
  8928  		}
  8929  		x := v_2
  8930  		v.Reset(ssaop.OpARM64SUB)
  8931  		v.AddArg2(a, x)
  8932  		return true
  8933  	}
  8934  	// match: (MADD a (MOVDconst [0]) _)
  8935  	// result: a
  8936  	for {
  8937  		a := v_0
  8938  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  8939  			break
  8940  		}
  8941  		v.CopyOf(a)
  8942  		return true
  8943  	}
  8944  	// match: (MADD a (MOVDconst [1]) x)
  8945  	// result: (ADD a x)
  8946  	for {
  8947  		a := v_0
  8948  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  8949  			break
  8950  		}
  8951  		x := v_2
  8952  		v.Reset(ssaop.OpARM64ADD)
  8953  		v.AddArg2(a, x)
  8954  		return true
  8955  	}
  8956  	// match: (MADD a (MOVDconst [c]) x)
  8957  	// cond: ssa.IsPowerOfTwo(c)
  8958  	// result: (ADDshiftLL a x [ssa.Log64(c)])
  8959  	for {
  8960  		a := v_0
  8961  		if v_1.Op != ssaop.OpARM64MOVDconst {
  8962  			break
  8963  		}
  8964  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  8965  		x := v_2
  8966  		if !(ssa.IsPowerOfTwo(c)) {
  8967  			break
  8968  		}
  8969  		v.Reset(ssaop.OpARM64ADDshiftLL)
  8970  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  8971  		v.AddArg2(a, x)
  8972  		return true
  8973  	}
  8974  	// match: (MADD a (MOVDconst [c]) x)
  8975  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
  8976  	// result: (ADD a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  8977  	for {
  8978  		a := v_0
  8979  		if v_1.Op != ssaop.OpARM64MOVDconst {
  8980  			break
  8981  		}
  8982  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  8983  		x := v_2
  8984  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
  8985  			break
  8986  		}
  8987  		v.Reset(ssaop.OpARM64ADD)
  8988  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  8989  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  8990  		v0.AddArg2(x, x)
  8991  		v.AddArg2(a, v0)
  8992  		return true
  8993  	}
  8994  	// match: (MADD a (MOVDconst [c]) x)
  8995  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
  8996  	// result: (SUB a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
  8997  	for {
  8998  		a := v_0
  8999  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9000  			break
  9001  		}
  9002  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9003  		x := v_2
  9004  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
  9005  			break
  9006  		}
  9007  		v.Reset(ssaop.OpARM64SUB)
  9008  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9009  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9010  		v0.AddArg2(x, x)
  9011  		v.AddArg2(a, v0)
  9012  		return true
  9013  	}
  9014  	// match: (MADD a (MOVDconst [c]) x)
  9015  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
  9016  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
  9017  	for {
  9018  		a := v_0
  9019  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9020  			break
  9021  		}
  9022  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9023  		x := v_2
  9024  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
  9025  			break
  9026  		}
  9027  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9028  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9029  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9030  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  9031  		v0.AddArg2(x, x)
  9032  		v.AddArg2(a, v0)
  9033  		return true
  9034  	}
  9035  	// match: (MADD a (MOVDconst [c]) x)
  9036  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
  9037  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
  9038  	for {
  9039  		a := v_0
  9040  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9041  			break
  9042  		}
  9043  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9044  		x := v_2
  9045  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
  9046  			break
  9047  		}
  9048  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9049  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9050  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9051  		v0.AuxInt = ssa.Int64ToAuxInt(2)
  9052  		v0.AddArg2(x, x)
  9053  		v.AddArg2(a, v0)
  9054  		return true
  9055  	}
  9056  	// match: (MADD a (MOVDconst [c]) x)
  9057  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
  9058  	// result: (SUBshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
  9059  	for {
  9060  		a := v_0
  9061  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9062  			break
  9063  		}
  9064  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9065  		x := v_2
  9066  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
  9067  			break
  9068  		}
  9069  		v.Reset(ssaop.OpARM64SUBshiftLL)
  9070  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9071  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9072  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9073  		v0.AddArg2(x, x)
  9074  		v.AddArg2(a, v0)
  9075  		return true
  9076  	}
  9077  	// match: (MADD a (MOVDconst [c]) x)
  9078  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
  9079  	// result: (ADDshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
  9080  	for {
  9081  		a := v_0
  9082  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9083  			break
  9084  		}
  9085  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9086  		x := v_2
  9087  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
  9088  			break
  9089  		}
  9090  		v.Reset(ssaop.OpARM64ADDshiftLL)
  9091  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9092  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9093  		v0.AuxInt = ssa.Int64ToAuxInt(3)
  9094  		v0.AddArg2(x, x)
  9095  		v.AddArg2(a, v0)
  9096  		return true
  9097  	}
  9098  	// match: (MADD (MOVDconst [c]) x y)
  9099  	// result: (ADDconst [c] (MUL <x.Type> x y))
  9100  	for {
  9101  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9102  			break
  9103  		}
  9104  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9105  		x := v_1
  9106  		y := v_2
  9107  		v.Reset(ssaop.OpARM64ADDconst)
  9108  		v.AuxInt = ssa.Int64ToAuxInt(c)
  9109  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
  9110  		v0.AddArg2(x, y)
  9111  		v.AddArg(v0)
  9112  		return true
  9113  	}
  9114  	// match: (MADD a (MOVDconst [c]) (MOVDconst [d]))
  9115  	// result: (ADDconst [c*d] a)
  9116  	for {
  9117  		a := v_0
  9118  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9119  			break
  9120  		}
  9121  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9122  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9123  			break
  9124  		}
  9125  		d := ssa.AuxIntToInt64(v_2.AuxInt)
  9126  		v.Reset(ssaop.OpARM64ADDconst)
  9127  		v.AuxInt = ssa.Int64ToAuxInt(c * d)
  9128  		v.AddArg(a)
  9129  		return true
  9130  	}
  9131  	return false
  9132  }
  9133  func rewriteValue_OpARM64MADDW(v *ssa.Value) bool {
  9134  	v_2 := v.Args[2]
  9135  	v_1 := v.Args[1]
  9136  	v_0 := v.Args[0]
  9137  	b := v.Block
  9138  	// match: (MADDW a x (MOVDconst [c]))
  9139  	// cond: int32(c)==-1
  9140  	// result: (MOVWUreg (SUB <a.Type> a x))
  9141  	for {
  9142  		a := v_0
  9143  		x := v_1
  9144  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9145  			break
  9146  		}
  9147  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9148  		if !(int32(c) == -1) {
  9149  			break
  9150  		}
  9151  		v.Reset(ssaop.OpARM64MOVWUreg)
  9152  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9153  		v0.AddArg2(a, x)
  9154  		v.AddArg(v0)
  9155  		return true
  9156  	}
  9157  	// match: (MADDW a _ (MOVDconst [c]))
  9158  	// cond: int32(c)==0
  9159  	// result: (MOVWUreg a)
  9160  	for {
  9161  		a := v_0
  9162  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9163  			break
  9164  		}
  9165  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9166  		if !(int32(c) == 0) {
  9167  			break
  9168  		}
  9169  		v.Reset(ssaop.OpARM64MOVWUreg)
  9170  		v.AddArg(a)
  9171  		return true
  9172  	}
  9173  	// match: (MADDW a x (MOVDconst [c]))
  9174  	// cond: int32(c)==1
  9175  	// result: (MOVWUreg (ADD <a.Type> a x))
  9176  	for {
  9177  		a := v_0
  9178  		x := v_1
  9179  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9180  			break
  9181  		}
  9182  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9183  		if !(int32(c) == 1) {
  9184  			break
  9185  		}
  9186  		v.Reset(ssaop.OpARM64MOVWUreg)
  9187  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9188  		v0.AddArg2(a, x)
  9189  		v.AddArg(v0)
  9190  		return true
  9191  	}
  9192  	// match: (MADDW a x (MOVDconst [c]))
  9193  	// cond: ssa.IsPowerOfTwo(c)
  9194  	// result: (MOVWUreg (ADDshiftLL <a.Type> a x [ssa.Log64(c)]))
  9195  	for {
  9196  		a := v_0
  9197  		x := v_1
  9198  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9199  			break
  9200  		}
  9201  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9202  		if !(ssa.IsPowerOfTwo(c)) {
  9203  			break
  9204  		}
  9205  		v.Reset(ssaop.OpARM64MOVWUreg)
  9206  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9207  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9208  		v0.AddArg2(a, x)
  9209  		v.AddArg(v0)
  9210  		return true
  9211  	}
  9212  	// match: (MADDW a x (MOVDconst [c]))
  9213  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
  9214  	// result: (MOVWUreg (ADD <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
  9215  	for {
  9216  		a := v_0
  9217  		x := v_1
  9218  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9219  			break
  9220  		}
  9221  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9222  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
  9223  			break
  9224  		}
  9225  		v.Reset(ssaop.OpARM64MOVWUreg)
  9226  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9227  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9228  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9229  		v1.AddArg2(x, x)
  9230  		v0.AddArg2(a, v1)
  9231  		v.AddArg(v0)
  9232  		return true
  9233  	}
  9234  	// match: (MADDW a x (MOVDconst [c]))
  9235  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
  9236  	// result: (MOVWUreg (SUB <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
  9237  	for {
  9238  		a := v_0
  9239  		x := v_1
  9240  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9241  			break
  9242  		}
  9243  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9244  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
  9245  			break
  9246  		}
  9247  		v.Reset(ssaop.OpARM64MOVWUreg)
  9248  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9249  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9250  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9251  		v1.AddArg2(x, x)
  9252  		v0.AddArg2(a, v1)
  9253  		v.AddArg(v0)
  9254  		return true
  9255  	}
  9256  	// match: (MADDW a x (MOVDconst [c]))
  9257  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
  9258  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
  9259  	for {
  9260  		a := v_0
  9261  		x := v_1
  9262  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9263  			break
  9264  		}
  9265  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9266  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
  9267  			break
  9268  		}
  9269  		v.Reset(ssaop.OpARM64MOVWUreg)
  9270  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9271  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9272  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9273  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9274  		v1.AddArg2(x, x)
  9275  		v0.AddArg2(a, v1)
  9276  		v.AddArg(v0)
  9277  		return true
  9278  	}
  9279  	// match: (MADDW a x (MOVDconst [c]))
  9280  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
  9281  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
  9282  	for {
  9283  		a := v_0
  9284  		x := v_1
  9285  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9286  			break
  9287  		}
  9288  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9289  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
  9290  			break
  9291  		}
  9292  		v.Reset(ssaop.OpARM64MOVWUreg)
  9293  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9294  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9295  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9296  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9297  		v1.AddArg2(x, x)
  9298  		v0.AddArg2(a, v1)
  9299  		v.AddArg(v0)
  9300  		return true
  9301  	}
  9302  	// match: (MADDW a x (MOVDconst [c]))
  9303  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
  9304  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
  9305  	for {
  9306  		a := v_0
  9307  		x := v_1
  9308  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9309  			break
  9310  		}
  9311  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9312  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
  9313  			break
  9314  		}
  9315  		v.Reset(ssaop.OpARM64MOVWUreg)
  9316  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9317  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9318  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9319  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9320  		v1.AddArg2(x, x)
  9321  		v0.AddArg2(a, v1)
  9322  		v.AddArg(v0)
  9323  		return true
  9324  	}
  9325  	// match: (MADDW a x (MOVDconst [c]))
  9326  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
  9327  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
  9328  	for {
  9329  		a := v_0
  9330  		x := v_1
  9331  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9332  			break
  9333  		}
  9334  		c := ssa.AuxIntToInt64(v_2.AuxInt)
  9335  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
  9336  			break
  9337  		}
  9338  		v.Reset(ssaop.OpARM64MOVWUreg)
  9339  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9340  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9341  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9342  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9343  		v1.AddArg2(x, x)
  9344  		v0.AddArg2(a, v1)
  9345  		v.AddArg(v0)
  9346  		return true
  9347  	}
  9348  	// match: (MADDW a (MOVDconst [c]) x)
  9349  	// cond: int32(c)==-1
  9350  	// result: (MOVWUreg (SUB <a.Type> a x))
  9351  	for {
  9352  		a := v_0
  9353  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9354  			break
  9355  		}
  9356  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9357  		x := v_2
  9358  		if !(int32(c) == -1) {
  9359  			break
  9360  		}
  9361  		v.Reset(ssaop.OpARM64MOVWUreg)
  9362  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9363  		v0.AddArg2(a, x)
  9364  		v.AddArg(v0)
  9365  		return true
  9366  	}
  9367  	// match: (MADDW a (MOVDconst [c]) _)
  9368  	// cond: int32(c)==0
  9369  	// result: (MOVWUreg a)
  9370  	for {
  9371  		a := v_0
  9372  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9373  			break
  9374  		}
  9375  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9376  		if !(int32(c) == 0) {
  9377  			break
  9378  		}
  9379  		v.Reset(ssaop.OpARM64MOVWUreg)
  9380  		v.AddArg(a)
  9381  		return true
  9382  	}
  9383  	// match: (MADDW a (MOVDconst [c]) x)
  9384  	// cond: int32(c)==1
  9385  	// result: (MOVWUreg (ADD <a.Type> a x))
  9386  	for {
  9387  		a := v_0
  9388  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9389  			break
  9390  		}
  9391  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9392  		x := v_2
  9393  		if !(int32(c) == 1) {
  9394  			break
  9395  		}
  9396  		v.Reset(ssaop.OpARM64MOVWUreg)
  9397  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9398  		v0.AddArg2(a, x)
  9399  		v.AddArg(v0)
  9400  		return true
  9401  	}
  9402  	// match: (MADDW a (MOVDconst [c]) x)
  9403  	// cond: ssa.IsPowerOfTwo(c)
  9404  	// result: (MOVWUreg (ADDshiftLL <a.Type> a x [ssa.Log64(c)]))
  9405  	for {
  9406  		a := v_0
  9407  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9408  			break
  9409  		}
  9410  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9411  		x := v_2
  9412  		if !(ssa.IsPowerOfTwo(c)) {
  9413  			break
  9414  		}
  9415  		v.Reset(ssaop.OpARM64MOVWUreg)
  9416  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9417  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9418  		v0.AddArg2(a, x)
  9419  		v.AddArg(v0)
  9420  		return true
  9421  	}
  9422  	// match: (MADDW a (MOVDconst [c]) x)
  9423  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
  9424  	// result: (MOVWUreg (ADD <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
  9425  	for {
  9426  		a := v_0
  9427  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9428  			break
  9429  		}
  9430  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9431  		x := v_2
  9432  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
  9433  			break
  9434  		}
  9435  		v.Reset(ssaop.OpARM64MOVWUreg)
  9436  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
  9437  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9438  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9439  		v1.AddArg2(x, x)
  9440  		v0.AddArg2(a, v1)
  9441  		v.AddArg(v0)
  9442  		return true
  9443  	}
  9444  	// match: (MADDW a (MOVDconst [c]) x)
  9445  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
  9446  	// result: (MOVWUreg (SUB <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
  9447  	for {
  9448  		a := v_0
  9449  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9450  			break
  9451  		}
  9452  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9453  		x := v_2
  9454  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
  9455  			break
  9456  		}
  9457  		v.Reset(ssaop.OpARM64MOVWUreg)
  9458  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
  9459  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9460  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9461  		v1.AddArg2(x, x)
  9462  		v0.AddArg2(a, v1)
  9463  		v.AddArg(v0)
  9464  		return true
  9465  	}
  9466  	// match: (MADDW a (MOVDconst [c]) x)
  9467  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
  9468  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
  9469  	for {
  9470  		a := v_0
  9471  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9472  			break
  9473  		}
  9474  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9475  		x := v_2
  9476  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
  9477  			break
  9478  		}
  9479  		v.Reset(ssaop.OpARM64MOVWUreg)
  9480  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9481  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9482  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9483  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9484  		v1.AddArg2(x, x)
  9485  		v0.AddArg2(a, v1)
  9486  		v.AddArg(v0)
  9487  		return true
  9488  	}
  9489  	// match: (MADDW a (MOVDconst [c]) x)
  9490  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
  9491  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
  9492  	for {
  9493  		a := v_0
  9494  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9495  			break
  9496  		}
  9497  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9498  		x := v_2
  9499  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
  9500  			break
  9501  		}
  9502  		v.Reset(ssaop.OpARM64MOVWUreg)
  9503  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9504  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9505  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9506  		v1.AuxInt = ssa.Int64ToAuxInt(2)
  9507  		v1.AddArg2(x, x)
  9508  		v0.AddArg2(a, v1)
  9509  		v.AddArg(v0)
  9510  		return true
  9511  	}
  9512  	// match: (MADDW a (MOVDconst [c]) x)
  9513  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
  9514  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
  9515  	for {
  9516  		a := v_0
  9517  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9518  			break
  9519  		}
  9520  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9521  		x := v_2
  9522  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
  9523  			break
  9524  		}
  9525  		v.Reset(ssaop.OpARM64MOVWUreg)
  9526  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
  9527  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9528  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9529  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9530  		v1.AddArg2(x, x)
  9531  		v0.AddArg2(a, v1)
  9532  		v.AddArg(v0)
  9533  		return true
  9534  	}
  9535  	// match: (MADDW a (MOVDconst [c]) x)
  9536  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
  9537  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
  9538  	for {
  9539  		a := v_0
  9540  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9541  			break
  9542  		}
  9543  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9544  		x := v_2
  9545  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
  9546  			break
  9547  		}
  9548  		v.Reset(ssaop.OpARM64MOVWUreg)
  9549  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
  9550  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9551  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9552  		v1.AuxInt = ssa.Int64ToAuxInt(3)
  9553  		v1.AddArg2(x, x)
  9554  		v0.AddArg2(a, v1)
  9555  		v.AddArg(v0)
  9556  		return true
  9557  	}
  9558  	// match: (MADDW (MOVDconst [c]) x y)
  9559  	// result: (MOVWUreg (ADDconst <x.Type> [c] (MULW <x.Type> x y)))
  9560  	for {
  9561  		if v_0.Op != ssaop.OpARM64MOVDconst {
  9562  			break
  9563  		}
  9564  		c := ssa.AuxIntToInt64(v_0.AuxInt)
  9565  		x := v_1
  9566  		y := v_2
  9567  		v.Reset(ssaop.OpARM64MOVWUreg)
  9568  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, x.Type)
  9569  		v0.AuxInt = ssa.Int64ToAuxInt(c)
  9570  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
  9571  		v1.AddArg2(x, y)
  9572  		v0.AddArg(v1)
  9573  		v.AddArg(v0)
  9574  		return true
  9575  	}
  9576  	// match: (MADDW a (MOVDconst [c]) (MOVDconst [d]))
  9577  	// result: (MOVWUreg (ADDconst <a.Type> [c*d] a))
  9578  	for {
  9579  		a := v_0
  9580  		if v_1.Op != ssaop.OpARM64MOVDconst {
  9581  			break
  9582  		}
  9583  		c := ssa.AuxIntToInt64(v_1.AuxInt)
  9584  		if v_2.Op != ssaop.OpARM64MOVDconst {
  9585  			break
  9586  		}
  9587  		d := ssa.AuxIntToInt64(v_2.AuxInt)
  9588  		v.Reset(ssaop.OpARM64MOVWUreg)
  9589  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, a.Type)
  9590  		v0.AuxInt = ssa.Int64ToAuxInt(c * d)
  9591  		v0.AddArg(a)
  9592  		v.AddArg(v0)
  9593  		return true
  9594  	}
  9595  	return false
  9596  }
  9597  func rewriteValue_OpARM64MNEG(v *ssa.Value) bool {
  9598  	v_1 := v.Args[1]
  9599  	v_0 := v.Args[0]
  9600  	b := v.Block
  9601  	// match: (MNEG x (MOVDconst [-1]))
  9602  	// result: x
  9603  	for {
  9604  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9605  			x := v_0
  9606  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
  9607  				continue
  9608  			}
  9609  			v.CopyOf(x)
  9610  			return true
  9611  		}
  9612  		break
  9613  	}
  9614  	// match: (MNEG _ (MOVDconst [0]))
  9615  	// result: (MOVDconst [0])
  9616  	for {
  9617  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9618  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
  9619  				continue
  9620  			}
  9621  			v.Reset(ssaop.OpARM64MOVDconst)
  9622  			v.AuxInt = ssa.Int64ToAuxInt(0)
  9623  			return true
  9624  		}
  9625  		break
  9626  	}
  9627  	// match: (MNEG x (MOVDconst [1]))
  9628  	// result: (NEG x)
  9629  	for {
  9630  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9631  			x := v_0
  9632  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
  9633  				continue
  9634  			}
  9635  			v.Reset(ssaop.OpARM64NEG)
  9636  			v.AddArg(x)
  9637  			return true
  9638  		}
  9639  		break
  9640  	}
  9641  	// match: (MNEG x (MOVDconst [c]))
  9642  	// cond: ssa.IsPowerOfTwo(c)
  9643  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c)] x))
  9644  	for {
  9645  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9646  			x := v_0
  9647  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9648  				continue
  9649  			}
  9650  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9651  			if !(ssa.IsPowerOfTwo(c)) {
  9652  				continue
  9653  			}
  9654  			v.Reset(ssaop.OpARM64NEG)
  9655  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9656  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9657  			v0.AddArg(x)
  9658  			v.AddArg(v0)
  9659  			return true
  9660  		}
  9661  		break
  9662  	}
  9663  	// match: (MNEG x (MOVDconst [c]))
  9664  	// cond: ssa.IsPowerOfTwo(c-1) && c >= 3
  9665  	// result: (NEG (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
  9666  	for {
  9667  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9668  			x := v_0
  9669  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9670  				continue
  9671  			}
  9672  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9673  			if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
  9674  				continue
  9675  			}
  9676  			v.Reset(ssaop.OpARM64NEG)
  9677  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9678  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9679  			v0.AddArg2(x, x)
  9680  			v.AddArg(v0)
  9681  			return true
  9682  		}
  9683  		break
  9684  	}
  9685  	// match: (MNEG x (MOVDconst [c]))
  9686  	// cond: ssa.IsPowerOfTwo(c+1) && c >= 7
  9687  	// result: (NEG (ADDshiftLL <x.Type> (NEG <x.Type> x) x [ssa.Log64(c+1)]))
  9688  	for {
  9689  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9690  			x := v_0
  9691  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9692  				continue
  9693  			}
  9694  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9695  			if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
  9696  				continue
  9697  			}
  9698  			v.Reset(ssaop.OpARM64NEG)
  9699  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9700  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9701  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9702  			v1.AddArg(x)
  9703  			v0.AddArg2(v1, x)
  9704  			v.AddArg(v0)
  9705  			return true
  9706  		}
  9707  		break
  9708  	}
  9709  	// match: (MNEG x (MOVDconst [c]))
  9710  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
  9711  	// result: (SLLconst <x.Type> [ssa.Log64(c/3)] (SUBshiftLL <x.Type> x x [2]))
  9712  	for {
  9713  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9714  			x := v_0
  9715  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9716  				continue
  9717  			}
  9718  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9719  			if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
  9720  				continue
  9721  			}
  9722  			v.Reset(ssaop.OpARM64SLLconst)
  9723  			v.Type = x.Type
  9724  			v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9725  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9726  			v0.AuxInt = ssa.Int64ToAuxInt(2)
  9727  			v0.AddArg2(x, x)
  9728  			v.AddArg(v0)
  9729  			return true
  9730  		}
  9731  		break
  9732  	}
  9733  	// match: (MNEG x (MOVDconst [c]))
  9734  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
  9735  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c/5)] (ADDshiftLL <x.Type> x x [2])))
  9736  	for {
  9737  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9738  			x := v_0
  9739  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9740  				continue
  9741  			}
  9742  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9743  			if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
  9744  				continue
  9745  			}
  9746  			v.Reset(ssaop.OpARM64NEG)
  9747  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9748  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
  9749  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9750  			v1.AuxInt = ssa.Int64ToAuxInt(2)
  9751  			v1.AddArg2(x, x)
  9752  			v0.AddArg(v1)
  9753  			v.AddArg(v0)
  9754  			return true
  9755  		}
  9756  		break
  9757  	}
  9758  	// match: (MNEG x (MOVDconst [c]))
  9759  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
  9760  	// result: (SLLconst <x.Type> [ssa.Log64(c/7)] (SUBshiftLL <x.Type> x x [3]))
  9761  	for {
  9762  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9763  			x := v_0
  9764  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9765  				continue
  9766  			}
  9767  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9768  			if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
  9769  				continue
  9770  			}
  9771  			v.Reset(ssaop.OpARM64SLLconst)
  9772  			v.Type = x.Type
  9773  			v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
  9774  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9775  			v0.AuxInt = ssa.Int64ToAuxInt(3)
  9776  			v0.AddArg2(x, x)
  9777  			v.AddArg(v0)
  9778  			return true
  9779  		}
  9780  		break
  9781  	}
  9782  	// match: (MNEG x (MOVDconst [c]))
  9783  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
  9784  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c/9)] (ADDshiftLL <x.Type> x x [3])))
  9785  	for {
  9786  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9787  			x := v_0
  9788  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9789  				continue
  9790  			}
  9791  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9792  			if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
  9793  				continue
  9794  			}
  9795  			v.Reset(ssaop.OpARM64NEG)
  9796  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9797  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
  9798  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9799  			v1.AuxInt = ssa.Int64ToAuxInt(3)
  9800  			v1.AddArg2(x, x)
  9801  			v0.AddArg(v1)
  9802  			v.AddArg(v0)
  9803  			return true
  9804  		}
  9805  		break
  9806  	}
  9807  	// match: (MNEG (MOVDconst [c]) (MOVDconst [d]))
  9808  	// result: (MOVDconst [-c*d])
  9809  	for {
  9810  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9811  			if v_0.Op != ssaop.OpARM64MOVDconst {
  9812  				continue
  9813  			}
  9814  			c := ssa.AuxIntToInt64(v_0.AuxInt)
  9815  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9816  				continue
  9817  			}
  9818  			d := ssa.AuxIntToInt64(v_1.AuxInt)
  9819  			v.Reset(ssaop.OpARM64MOVDconst)
  9820  			v.AuxInt = ssa.Int64ToAuxInt(-c * d)
  9821  			return true
  9822  		}
  9823  		break
  9824  	}
  9825  	return false
  9826  }
  9827  func rewriteValue_OpARM64MNEGW(v *ssa.Value) bool {
  9828  	v_1 := v.Args[1]
  9829  	v_0 := v.Args[0]
  9830  	b := v.Block
  9831  	// match: (MNEGW x (MOVDconst [c]))
  9832  	// cond: int32(c)==-1
  9833  	// result: (MOVWUreg x)
  9834  	for {
  9835  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9836  			x := v_0
  9837  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9838  				continue
  9839  			}
  9840  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9841  			if !(int32(c) == -1) {
  9842  				continue
  9843  			}
  9844  			v.Reset(ssaop.OpARM64MOVWUreg)
  9845  			v.AddArg(x)
  9846  			return true
  9847  		}
  9848  		break
  9849  	}
  9850  	// match: (MNEGW _ (MOVDconst [c]))
  9851  	// cond: int32(c)==0
  9852  	// result: (MOVDconst [0])
  9853  	for {
  9854  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9855  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9856  				continue
  9857  			}
  9858  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9859  			if !(int32(c) == 0) {
  9860  				continue
  9861  			}
  9862  			v.Reset(ssaop.OpARM64MOVDconst)
  9863  			v.AuxInt = ssa.Int64ToAuxInt(0)
  9864  			return true
  9865  		}
  9866  		break
  9867  	}
  9868  	// match: (MNEGW x (MOVDconst [c]))
  9869  	// cond: int32(c)==1
  9870  	// result: (MOVWUreg (NEG <x.Type> x))
  9871  	for {
  9872  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9873  			x := v_0
  9874  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9875  				continue
  9876  			}
  9877  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9878  			if !(int32(c) == 1) {
  9879  				continue
  9880  			}
  9881  			v.Reset(ssaop.OpARM64MOVWUreg)
  9882  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9883  			v0.AddArg(x)
  9884  			v.AddArg(v0)
  9885  			return true
  9886  		}
  9887  		break
  9888  	}
  9889  	// match: (MNEGW x (MOVDconst [c]))
  9890  	// cond: ssa.IsPowerOfTwo(c)
  9891  	// result: (NEG (SLLconst <x.Type> [ssa.Log64(c)] x))
  9892  	for {
  9893  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9894  			x := v_0
  9895  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9896  				continue
  9897  			}
  9898  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9899  			if !(ssa.IsPowerOfTwo(c)) {
  9900  				continue
  9901  			}
  9902  			v.Reset(ssaop.OpARM64NEG)
  9903  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9904  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
  9905  			v0.AddArg(x)
  9906  			v.AddArg(v0)
  9907  			return true
  9908  		}
  9909  		break
  9910  	}
  9911  	// match: (MNEGW x (MOVDconst [c]))
  9912  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c) >= 3
  9913  	// result: (MOVWUreg (NEG <x.Type> (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
  9914  	for {
  9915  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9916  			x := v_0
  9917  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9918  				continue
  9919  			}
  9920  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9921  			if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
  9922  				continue
  9923  			}
  9924  			v.Reset(ssaop.OpARM64MOVWUreg)
  9925  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9926  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9927  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
  9928  			v1.AddArg2(x, x)
  9929  			v0.AddArg(v1)
  9930  			v.AddArg(v0)
  9931  			return true
  9932  		}
  9933  		break
  9934  	}
  9935  	// match: (MNEGW x (MOVDconst [c]))
  9936  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c) >= 7
  9937  	// result: (MOVWUreg (NEG <x.Type> (ADDshiftLL <x.Type> (NEG <x.Type> x) x [ssa.Log64(c+1)])))
  9938  	for {
  9939  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9940  			x := v_0
  9941  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9942  				continue
  9943  			}
  9944  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9945  			if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
  9946  				continue
  9947  			}
  9948  			v.Reset(ssaop.OpARM64MOVWUreg)
  9949  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9950  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
  9951  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
  9952  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
  9953  			v2.AddArg(x)
  9954  			v1.AddArg2(v2, x)
  9955  			v0.AddArg(v1)
  9956  			v.AddArg(v0)
  9957  			return true
  9958  		}
  9959  		break
  9960  	}
  9961  	// match: (MNEGW x (MOVDconst [c]))
  9962  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
  9963  	// result: (MOVWUreg (SLLconst <x.Type> [ssa.Log64(c/3)] (SUBshiftLL <x.Type> x x [2])))
  9964  	for {
  9965  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9966  			x := v_0
  9967  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9968  				continue
  9969  			}
  9970  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9971  			if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
  9972  				continue
  9973  			}
  9974  			v.Reset(ssaop.OpARM64MOVWUreg)
  9975  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
  9976  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
  9977  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
  9978  			v1.AuxInt = ssa.Int64ToAuxInt(2)
  9979  			v1.AddArg2(x, x)
  9980  			v0.AddArg(v1)
  9981  			v.AddArg(v0)
  9982  			return true
  9983  		}
  9984  		break
  9985  	}
  9986  	// match: (MNEGW x (MOVDconst [c]))
  9987  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
  9988  	// result: (MOVWUreg (NEG <x.Type> (SLLconst <x.Type> [ssa.Log64(c/5)] (ADDshiftLL <x.Type> x x [2]))))
  9989  	for {
  9990  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
  9991  			x := v_0
  9992  			if v_1.Op != ssaop.OpARM64MOVDconst {
  9993  				continue
  9994  			}
  9995  			c := ssa.AuxIntToInt64(v_1.AuxInt)
  9996  			if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
  9997  				continue
  9998  			}
  9999  			v.Reset(ssaop.OpARM64MOVWUreg)
 10000  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10001  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10002  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 10003  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10004  			v2.AuxInt = ssa.Int64ToAuxInt(2)
 10005  			v2.AddArg2(x, x)
 10006  			v1.AddArg(v2)
 10007  			v0.AddArg(v1)
 10008  			v.AddArg(v0)
 10009  			return true
 10010  		}
 10011  		break
 10012  	}
 10013  	// match: (MNEGW x (MOVDconst [c]))
 10014  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 10015  	// result: (MOVWUreg (SLLconst <x.Type> [ssa.Log64(c/7)] (SUBshiftLL <x.Type> x x [3])))
 10016  	for {
 10017  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10018  			x := v_0
 10019  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10020  				continue
 10021  			}
 10022  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10023  			if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 10024  				continue
 10025  			}
 10026  			v.Reset(ssaop.OpARM64MOVWUreg)
 10027  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10028  			v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 10029  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 10030  			v1.AuxInt = ssa.Int64ToAuxInt(3)
 10031  			v1.AddArg2(x, x)
 10032  			v0.AddArg(v1)
 10033  			v.AddArg(v0)
 10034  			return true
 10035  		}
 10036  		break
 10037  	}
 10038  	// match: (MNEGW x (MOVDconst [c]))
 10039  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 10040  	// result: (MOVWUreg (NEG <x.Type> (SLLconst <x.Type> [ssa.Log64(c/9)] (ADDshiftLL <x.Type> x x [3]))))
 10041  	for {
 10042  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10043  			x := v_0
 10044  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10045  				continue
 10046  			}
 10047  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 10048  			if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 10049  				continue
 10050  			}
 10051  			v.Reset(ssaop.OpARM64MOVWUreg)
 10052  			v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, x.Type)
 10053  			v1 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 10054  			v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 10055  			v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 10056  			v2.AuxInt = ssa.Int64ToAuxInt(3)
 10057  			v2.AddArg2(x, x)
 10058  			v1.AddArg(v2)
 10059  			v0.AddArg(v1)
 10060  			v.AddArg(v0)
 10061  			return true
 10062  		}
 10063  		break
 10064  	}
 10065  	// match: (MNEGW (MOVDconst [c]) (MOVDconst [d]))
 10066  	// result: (MOVDconst [int64(uint32(-c*d))])
 10067  	for {
 10068  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 10069  			if v_0.Op != ssaop.OpARM64MOVDconst {
 10070  				continue
 10071  			}
 10072  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 10073  			if v_1.Op != ssaop.OpARM64MOVDconst {
 10074  				continue
 10075  			}
 10076  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 10077  			v.Reset(ssaop.OpARM64MOVDconst)
 10078  			v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(-c * d)))
 10079  			return true
 10080  		}
 10081  		break
 10082  	}
 10083  	return false
 10084  }
 10085  func rewriteValue_OpARM64MOD(v *ssa.Value) bool {
 10086  	v_1 := v.Args[1]
 10087  	v_0 := v.Args[0]
 10088  	// match: (MOD (MOVDconst [c]) (MOVDconst [d]))
 10089  	// cond: d != 0
 10090  	// result: (MOVDconst [c%d])
 10091  	for {
 10092  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10093  			break
 10094  		}
 10095  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10096  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10097  			break
 10098  		}
 10099  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 10100  		if !(d != 0) {
 10101  			break
 10102  		}
 10103  		v.Reset(ssaop.OpARM64MOVDconst)
 10104  		v.AuxInt = ssa.Int64ToAuxInt(c % d)
 10105  		return true
 10106  	}
 10107  	return false
 10108  }
 10109  func rewriteValue_OpARM64MODW(v *ssa.Value) bool {
 10110  	v_1 := v.Args[1]
 10111  	v_0 := v.Args[0]
 10112  	// match: (MODW (MOVDconst [c]) (MOVDconst [d]))
 10113  	// cond: d != 0
 10114  	// result: (MOVDconst [int64(uint32(int32(c)%int32(d)))])
 10115  	for {
 10116  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10117  			break
 10118  		}
 10119  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10120  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10121  			break
 10122  		}
 10123  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 10124  		if !(d != 0) {
 10125  			break
 10126  		}
 10127  		v.Reset(ssaop.OpARM64MOVDconst)
 10128  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(int32(c) % int32(d))))
 10129  		return true
 10130  	}
 10131  	return false
 10132  }
 10133  func rewriteValue_OpARM64MOVBUload(v *ssa.Value) bool {
 10134  	v_1 := v.Args[1]
 10135  	v_0 := v.Args[0]
 10136  	b := v.Block
 10137  	config := b.Func.Config
 10138  	// match: (MOVBUload [off1] {sym} (ADDconst [off2] ptr) mem)
 10139  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10140  	// result: (MOVBUload [off1+int32(off2)] {sym} ptr mem)
 10141  	for {
 10142  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10143  		sym := ssa.AuxToSym(v.Aux)
 10144  		if v_0.Op != ssaop.OpARM64ADDconst {
 10145  			break
 10146  		}
 10147  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10148  		ptr := v_0.Args[0]
 10149  		mem := v_1
 10150  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10151  			break
 10152  		}
 10153  		v.Reset(ssaop.OpARM64MOVBUload)
 10154  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10155  		v.Aux = ssa.SymToAux(sym)
 10156  		v.AddArg2(ptr, mem)
 10157  		return true
 10158  	}
 10159  	// match: (MOVBUload [off] {sym} (ADD ptr idx) mem)
 10160  	// cond: off == 0 && sym == nil
 10161  	// result: (MOVBUloadidx ptr idx mem)
 10162  	for {
 10163  		off := ssa.AuxIntToInt32(v.AuxInt)
 10164  		sym := ssa.AuxToSym(v.Aux)
 10165  		if v_0.Op != ssaop.OpARM64ADD {
 10166  			break
 10167  		}
 10168  		idx := v_0.Args[1]
 10169  		ptr := v_0.Args[0]
 10170  		mem := v_1
 10171  		if !(off == 0 && sym == nil) {
 10172  			break
 10173  		}
 10174  		v.Reset(ssaop.OpARM64MOVBUloadidx)
 10175  		v.AddArg3(ptr, idx, mem)
 10176  		return true
 10177  	}
 10178  	// match: (MOVBUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10179  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10180  	// result: (MOVBUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 10181  	for {
 10182  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10183  		sym1 := ssa.AuxToSym(v.Aux)
 10184  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10185  			break
 10186  		}
 10187  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10188  		sym2 := ssa.AuxToSym(v_0.Aux)
 10189  		ptr := v_0.Args[0]
 10190  		mem := v_1
 10191  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10192  			break
 10193  		}
 10194  		v.Reset(ssaop.OpARM64MOVBUload)
 10195  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10196  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10197  		v.AddArg2(ptr, mem)
 10198  		return true
 10199  	}
 10200  	// match: (MOVBUload [off] {sym} (SB) _)
 10201  	// cond: ssa.SymIsRO(sym)
 10202  	// result: (MOVDconst [int64(ssa.Read8(sym, int64(off)))])
 10203  	for {
 10204  		off := ssa.AuxIntToInt32(v.AuxInt)
 10205  		sym := ssa.AuxToSym(v.Aux)
 10206  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 10207  			break
 10208  		}
 10209  		v.Reset(ssaop.OpARM64MOVDconst)
 10210  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read8(sym, int64(off))))
 10211  		return true
 10212  	}
 10213  	return false
 10214  }
 10215  func rewriteValue_OpARM64MOVBUloadidx(v *ssa.Value) bool {
 10216  	v_2 := v.Args[2]
 10217  	v_1 := v.Args[1]
 10218  	v_0 := v.Args[0]
 10219  	// match: (MOVBUloadidx ptr (MOVDconst [c]) mem)
 10220  	// cond: ssa.Is32Bit(c)
 10221  	// result: (MOVBUload [int32(c)] ptr mem)
 10222  	for {
 10223  		ptr := v_0
 10224  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10225  			break
 10226  		}
 10227  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10228  		mem := v_2
 10229  		if !(ssa.Is32Bit(c)) {
 10230  			break
 10231  		}
 10232  		v.Reset(ssaop.OpARM64MOVBUload)
 10233  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10234  		v.AddArg2(ptr, mem)
 10235  		return true
 10236  	}
 10237  	// match: (MOVBUloadidx (MOVDconst [c]) ptr mem)
 10238  	// cond: ssa.Is32Bit(c)
 10239  	// result: (MOVBUload [int32(c)] ptr mem)
 10240  	for {
 10241  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10242  			break
 10243  		}
 10244  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10245  		ptr := v_1
 10246  		mem := v_2
 10247  		if !(ssa.Is32Bit(c)) {
 10248  			break
 10249  		}
 10250  		v.Reset(ssaop.OpARM64MOVBUload)
 10251  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10252  		v.AddArg2(ptr, mem)
 10253  		return true
 10254  	}
 10255  	return false
 10256  }
 10257  func rewriteValue_OpARM64MOVBUreg(v *ssa.Value) bool {
 10258  	v_0 := v.Args[0]
 10259  	// match: (MOVBUreg (ANDconst [c] x))
 10260  	// result: (ANDconst [c&(1<<8-1)] x)
 10261  	for {
 10262  		if v_0.Op != ssaop.OpARM64ANDconst {
 10263  			break
 10264  		}
 10265  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10266  		x := v_0.Args[0]
 10267  		v.Reset(ssaop.OpARM64ANDconst)
 10268  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<8 - 1))
 10269  		v.AddArg(x)
 10270  		return true
 10271  	}
 10272  	// match: (MOVBUreg (MOVDconst [c]))
 10273  	// result: (MOVDconst [int64(uint8(c))])
 10274  	for {
 10275  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10276  			break
 10277  		}
 10278  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10279  		v.Reset(ssaop.OpARM64MOVDconst)
 10280  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint8(c)))
 10281  		return true
 10282  	}
 10283  	// match: (MOVBUreg x)
 10284  	// cond: v.Type.Size() <= 1
 10285  	// result: x
 10286  	for {
 10287  		x := v_0
 10288  		if !(v.Type.Size() <= 1) {
 10289  			break
 10290  		}
 10291  		v.CopyOf(x)
 10292  		return true
 10293  	}
 10294  	// match: (MOVBUreg (SLLconst [lc] x))
 10295  	// cond: lc >= 8
 10296  	// result: (MOVDconst [0])
 10297  	for {
 10298  		if v_0.Op != ssaop.OpARM64SLLconst {
 10299  			break
 10300  		}
 10301  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10302  		if !(lc >= 8) {
 10303  			break
 10304  		}
 10305  		v.Reset(ssaop.OpARM64MOVDconst)
 10306  		v.AuxInt = ssa.Int64ToAuxInt(0)
 10307  		return true
 10308  	}
 10309  	// match: (MOVBUreg (SLLconst [lc] x))
 10310  	// cond: lc < 8
 10311  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 8-lc)] x)
 10312  	for {
 10313  		if v_0.Op != ssaop.OpARM64SLLconst {
 10314  			break
 10315  		}
 10316  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10317  		x := v_0.Args[0]
 10318  		if !(lc < 8) {
 10319  			break
 10320  		}
 10321  		v.Reset(ssaop.OpARM64UBFIZ)
 10322  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 8-lc))
 10323  		v.AddArg(x)
 10324  		return true
 10325  	}
 10326  	// match: (MOVBUreg (SRLconst [rc] x))
 10327  	// cond: rc < 8
 10328  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 8)] x)
 10329  	for {
 10330  		if v_0.Op != ssaop.OpARM64SRLconst {
 10331  			break
 10332  		}
 10333  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 10334  		x := v_0.Args[0]
 10335  		if !(rc < 8) {
 10336  			break
 10337  		}
 10338  		v.Reset(ssaop.OpARM64UBFX)
 10339  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8))
 10340  		v.AddArg(x)
 10341  		return true
 10342  	}
 10343  	// match: (MOVBUreg (UBFX [bfc] x))
 10344  	// cond: bfc.Width() <= 8
 10345  	// result: (UBFX [bfc] x)
 10346  	for {
 10347  		if v_0.Op != ssaop.OpARM64UBFX {
 10348  			break
 10349  		}
 10350  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 10351  		x := v_0.Args[0]
 10352  		if !(bfc.Width() <= 8) {
 10353  			break
 10354  		}
 10355  		v.Reset(ssaop.OpARM64UBFX)
 10356  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 10357  		v.AddArg(x)
 10358  		return true
 10359  	}
 10360  	return false
 10361  }
 10362  func rewriteValue_OpARM64MOVBload(v *ssa.Value) bool {
 10363  	v_1 := v.Args[1]
 10364  	v_0 := v.Args[0]
 10365  	b := v.Block
 10366  	config := b.Func.Config
 10367  	// match: (MOVBload [off1] {sym} (ADDconst [off2] ptr) mem)
 10368  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10369  	// result: (MOVBload [off1+int32(off2)] {sym} ptr mem)
 10370  	for {
 10371  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10372  		sym := ssa.AuxToSym(v.Aux)
 10373  		if v_0.Op != ssaop.OpARM64ADDconst {
 10374  			break
 10375  		}
 10376  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10377  		ptr := v_0.Args[0]
 10378  		mem := v_1
 10379  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10380  			break
 10381  		}
 10382  		v.Reset(ssaop.OpARM64MOVBload)
 10383  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10384  		v.Aux = ssa.SymToAux(sym)
 10385  		v.AddArg2(ptr, mem)
 10386  		return true
 10387  	}
 10388  	// match: (MOVBload [off] {sym} (ADD ptr idx) mem)
 10389  	// cond: off == 0 && sym == nil
 10390  	// result: (MOVBloadidx ptr idx mem)
 10391  	for {
 10392  		off := ssa.AuxIntToInt32(v.AuxInt)
 10393  		sym := ssa.AuxToSym(v.Aux)
 10394  		if v_0.Op != ssaop.OpARM64ADD {
 10395  			break
 10396  		}
 10397  		idx := v_0.Args[1]
 10398  		ptr := v_0.Args[0]
 10399  		mem := v_1
 10400  		if !(off == 0 && sym == nil) {
 10401  			break
 10402  		}
 10403  		v.Reset(ssaop.OpARM64MOVBloadidx)
 10404  		v.AddArg3(ptr, idx, mem)
 10405  		return true
 10406  	}
 10407  	// match: (MOVBload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10408  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10409  	// result: (MOVBload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 10410  	for {
 10411  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10412  		sym1 := ssa.AuxToSym(v.Aux)
 10413  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10414  			break
 10415  		}
 10416  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10417  		sym2 := ssa.AuxToSym(v_0.Aux)
 10418  		ptr := v_0.Args[0]
 10419  		mem := v_1
 10420  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10421  			break
 10422  		}
 10423  		v.Reset(ssaop.OpARM64MOVBload)
 10424  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10425  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10426  		v.AddArg2(ptr, mem)
 10427  		return true
 10428  	}
 10429  	// match: (MOVBload [off] {sym} (SB) _)
 10430  	// cond: ssa.SymIsRO(sym)
 10431  	// result: (MOVDconst [int64(int8(ssa.Read8(sym, int64(off))))])
 10432  	for {
 10433  		off := ssa.AuxIntToInt32(v.AuxInt)
 10434  		sym := ssa.AuxToSym(v.Aux)
 10435  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 10436  			break
 10437  		}
 10438  		v.Reset(ssaop.OpARM64MOVDconst)
 10439  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(ssa.Read8(sym, int64(off)))))
 10440  		return true
 10441  	}
 10442  	return false
 10443  }
 10444  func rewriteValue_OpARM64MOVBloadidx(v *ssa.Value) bool {
 10445  	v_2 := v.Args[2]
 10446  	v_1 := v.Args[1]
 10447  	v_0 := v.Args[0]
 10448  	// match: (MOVBloadidx ptr (MOVDconst [c]) mem)
 10449  	// cond: ssa.Is32Bit(c)
 10450  	// result: (MOVBload [int32(c)] ptr mem)
 10451  	for {
 10452  		ptr := v_0
 10453  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10454  			break
 10455  		}
 10456  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10457  		mem := v_2
 10458  		if !(ssa.Is32Bit(c)) {
 10459  			break
 10460  		}
 10461  		v.Reset(ssaop.OpARM64MOVBload)
 10462  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10463  		v.AddArg2(ptr, mem)
 10464  		return true
 10465  	}
 10466  	// match: (MOVBloadidx (MOVDconst [c]) ptr mem)
 10467  	// cond: ssa.Is32Bit(c)
 10468  	// result: (MOVBload [int32(c)] ptr mem)
 10469  	for {
 10470  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10471  			break
 10472  		}
 10473  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10474  		ptr := v_1
 10475  		mem := v_2
 10476  		if !(ssa.Is32Bit(c)) {
 10477  			break
 10478  		}
 10479  		v.Reset(ssaop.OpARM64MOVBload)
 10480  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10481  		v.AddArg2(ptr, mem)
 10482  		return true
 10483  	}
 10484  	return false
 10485  }
 10486  func rewriteValue_OpARM64MOVBreg(v *ssa.Value) bool {
 10487  	v_0 := v.Args[0]
 10488  	// match: (MOVBreg (MOVDconst [c]))
 10489  	// result: (MOVDconst [int64(int8(c))])
 10490  	for {
 10491  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10492  			break
 10493  		}
 10494  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10495  		v.Reset(ssaop.OpARM64MOVDconst)
 10496  		v.AuxInt = ssa.Int64ToAuxInt(int64(int8(c)))
 10497  		return true
 10498  	}
 10499  	// match: (MOVBreg x)
 10500  	// cond: v.Type.Size() <= 1
 10501  	// result: x
 10502  	for {
 10503  		x := v_0
 10504  		if !(v.Type.Size() <= 1) {
 10505  			break
 10506  		}
 10507  		v.CopyOf(x)
 10508  		return true
 10509  	}
 10510  	// match: (MOVBreg <t> (ANDconst x [c]))
 10511  	// cond: uint64(c) & uint64(0xffffffffffffff80) == 0
 10512  	// result: (ANDconst <t> x [c])
 10513  	for {
 10514  		t := v.Type
 10515  		if v_0.Op != ssaop.OpARM64ANDconst {
 10516  			break
 10517  		}
 10518  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10519  		x := v_0.Args[0]
 10520  		if !(uint64(c)&uint64(0xffffffffffffff80) == 0) {
 10521  			break
 10522  		}
 10523  		v.Reset(ssaop.OpARM64ANDconst)
 10524  		v.Type = t
 10525  		v.AuxInt = ssa.Int64ToAuxInt(c)
 10526  		v.AddArg(x)
 10527  		return true
 10528  	}
 10529  	// match: (MOVBreg (SLLconst [lc] x))
 10530  	// cond: lc < 8
 10531  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 8-lc)] x)
 10532  	for {
 10533  		if v_0.Op != ssaop.OpARM64SLLconst {
 10534  			break
 10535  		}
 10536  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 10537  		x := v_0.Args[0]
 10538  		if !(lc < 8) {
 10539  			break
 10540  		}
 10541  		v.Reset(ssaop.OpARM64SBFIZ)
 10542  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 8-lc))
 10543  		v.AddArg(x)
 10544  		return true
 10545  	}
 10546  	// match: (MOVBreg (SBFX [bfc] x))
 10547  	// cond: bfc.Width() <= 8
 10548  	// result: (SBFX [bfc] x)
 10549  	for {
 10550  		if v_0.Op != ssaop.OpARM64SBFX {
 10551  			break
 10552  		}
 10553  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 10554  		x := v_0.Args[0]
 10555  		if !(bfc.Width() <= 8) {
 10556  			break
 10557  		}
 10558  		v.Reset(ssaop.OpARM64SBFX)
 10559  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 10560  		v.AddArg(x)
 10561  		return true
 10562  	}
 10563  	return false
 10564  }
 10565  func rewriteValue_OpARM64MOVBstore(v *ssa.Value) bool {
 10566  	v_2 := v.Args[2]
 10567  	v_1 := v.Args[1]
 10568  	v_0 := v.Args[0]
 10569  	b := v.Block
 10570  	config := b.Func.Config
 10571  	// match: (MOVBstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 10572  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10573  	// result: (MOVBstore [off1+int32(off2)] {sym} ptr val mem)
 10574  	for {
 10575  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10576  		sym := ssa.AuxToSym(v.Aux)
 10577  		if v_0.Op != ssaop.OpARM64ADDconst {
 10578  			break
 10579  		}
 10580  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10581  		ptr := v_0.Args[0]
 10582  		val := v_1
 10583  		mem := v_2
 10584  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10585  			break
 10586  		}
 10587  		v.Reset(ssaop.OpARM64MOVBstore)
 10588  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10589  		v.Aux = ssa.SymToAux(sym)
 10590  		v.AddArg3(ptr, val, mem)
 10591  		return true
 10592  	}
 10593  	// match: (MOVBstore [off] {sym} (ADD ptr idx) val mem)
 10594  	// cond: off == 0 && sym == nil
 10595  	// result: (MOVBstoreidx ptr idx val mem)
 10596  	for {
 10597  		off := ssa.AuxIntToInt32(v.AuxInt)
 10598  		sym := ssa.AuxToSym(v.Aux)
 10599  		if v_0.Op != ssaop.OpARM64ADD {
 10600  			break
 10601  		}
 10602  		idx := v_0.Args[1]
 10603  		ptr := v_0.Args[0]
 10604  		val := v_1
 10605  		mem := v_2
 10606  		if !(off == 0 && sym == nil) {
 10607  			break
 10608  		}
 10609  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10610  		v.AddArg4(ptr, idx, val, mem)
 10611  		return true
 10612  	}
 10613  	// match: (MOVBstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 10614  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10615  	// result: (MOVBstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 10616  	for {
 10617  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10618  		sym1 := ssa.AuxToSym(v.Aux)
 10619  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10620  			break
 10621  		}
 10622  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10623  		sym2 := ssa.AuxToSym(v_0.Aux)
 10624  		ptr := v_0.Args[0]
 10625  		val := v_1
 10626  		mem := v_2
 10627  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10628  			break
 10629  		}
 10630  		v.Reset(ssaop.OpARM64MOVBstore)
 10631  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10632  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10633  		v.AddArg3(ptr, val, mem)
 10634  		return true
 10635  	}
 10636  	// match: (MOVBstore [off] {sym} ptr (MOVBreg x) mem)
 10637  	// result: (MOVBstore [off] {sym} ptr x mem)
 10638  	for {
 10639  		off := ssa.AuxIntToInt32(v.AuxInt)
 10640  		sym := ssa.AuxToSym(v.Aux)
 10641  		ptr := v_0
 10642  		if v_1.Op != ssaop.OpARM64MOVBreg {
 10643  			break
 10644  		}
 10645  		x := v_1.Args[0]
 10646  		mem := v_2
 10647  		v.Reset(ssaop.OpARM64MOVBstore)
 10648  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10649  		v.Aux = ssa.SymToAux(sym)
 10650  		v.AddArg3(ptr, x, mem)
 10651  		return true
 10652  	}
 10653  	// match: (MOVBstore [off] {sym} ptr (MOVBUreg x) mem)
 10654  	// result: (MOVBstore [off] {sym} ptr x mem)
 10655  	for {
 10656  		off := ssa.AuxIntToInt32(v.AuxInt)
 10657  		sym := ssa.AuxToSym(v.Aux)
 10658  		ptr := v_0
 10659  		if v_1.Op != ssaop.OpARM64MOVBUreg {
 10660  			break
 10661  		}
 10662  		x := v_1.Args[0]
 10663  		mem := v_2
 10664  		v.Reset(ssaop.OpARM64MOVBstore)
 10665  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10666  		v.Aux = ssa.SymToAux(sym)
 10667  		v.AddArg3(ptr, x, mem)
 10668  		return true
 10669  	}
 10670  	// match: (MOVBstore [off] {sym} ptr (MOVHreg x) mem)
 10671  	// result: (MOVBstore [off] {sym} ptr x mem)
 10672  	for {
 10673  		off := ssa.AuxIntToInt32(v.AuxInt)
 10674  		sym := ssa.AuxToSym(v.Aux)
 10675  		ptr := v_0
 10676  		if v_1.Op != ssaop.OpARM64MOVHreg {
 10677  			break
 10678  		}
 10679  		x := v_1.Args[0]
 10680  		mem := v_2
 10681  		v.Reset(ssaop.OpARM64MOVBstore)
 10682  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10683  		v.Aux = ssa.SymToAux(sym)
 10684  		v.AddArg3(ptr, x, mem)
 10685  		return true
 10686  	}
 10687  	// match: (MOVBstore [off] {sym} ptr (MOVHUreg x) mem)
 10688  	// result: (MOVBstore [off] {sym} ptr x mem)
 10689  	for {
 10690  		off := ssa.AuxIntToInt32(v.AuxInt)
 10691  		sym := ssa.AuxToSym(v.Aux)
 10692  		ptr := v_0
 10693  		if v_1.Op != ssaop.OpARM64MOVHUreg {
 10694  			break
 10695  		}
 10696  		x := v_1.Args[0]
 10697  		mem := v_2
 10698  		v.Reset(ssaop.OpARM64MOVBstore)
 10699  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10700  		v.Aux = ssa.SymToAux(sym)
 10701  		v.AddArg3(ptr, x, mem)
 10702  		return true
 10703  	}
 10704  	// match: (MOVBstore [off] {sym} ptr (MOVWreg x) mem)
 10705  	// result: (MOVBstore [off] {sym} ptr x mem)
 10706  	for {
 10707  		off := ssa.AuxIntToInt32(v.AuxInt)
 10708  		sym := ssa.AuxToSym(v.Aux)
 10709  		ptr := v_0
 10710  		if v_1.Op != ssaop.OpARM64MOVWreg {
 10711  			break
 10712  		}
 10713  		x := v_1.Args[0]
 10714  		mem := v_2
 10715  		v.Reset(ssaop.OpARM64MOVBstore)
 10716  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10717  		v.Aux = ssa.SymToAux(sym)
 10718  		v.AddArg3(ptr, x, mem)
 10719  		return true
 10720  	}
 10721  	// match: (MOVBstore [off] {sym} ptr (MOVWUreg x) mem)
 10722  	// result: (MOVBstore [off] {sym} ptr x mem)
 10723  	for {
 10724  		off := ssa.AuxIntToInt32(v.AuxInt)
 10725  		sym := ssa.AuxToSym(v.Aux)
 10726  		ptr := v_0
 10727  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 10728  			break
 10729  		}
 10730  		x := v_1.Args[0]
 10731  		mem := v_2
 10732  		v.Reset(ssaop.OpARM64MOVBstore)
 10733  		v.AuxInt = ssa.Int32ToAuxInt(off)
 10734  		v.Aux = ssa.SymToAux(sym)
 10735  		v.AddArg3(ptr, x, mem)
 10736  		return true
 10737  	}
 10738  	return false
 10739  }
 10740  func rewriteValue_OpARM64MOVBstoreidx(v *ssa.Value) bool {
 10741  	v_3 := v.Args[3]
 10742  	v_2 := v.Args[2]
 10743  	v_1 := v.Args[1]
 10744  	v_0 := v.Args[0]
 10745  	// match: (MOVBstoreidx ptr (MOVDconst [c]) val mem)
 10746  	// cond: ssa.Is32Bit(c)
 10747  	// result: (MOVBstore [int32(c)] ptr val mem)
 10748  	for {
 10749  		ptr := v_0
 10750  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10751  			break
 10752  		}
 10753  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 10754  		val := v_2
 10755  		mem := v_3
 10756  		if !(ssa.Is32Bit(c)) {
 10757  			break
 10758  		}
 10759  		v.Reset(ssaop.OpARM64MOVBstore)
 10760  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10761  		v.AddArg3(ptr, val, mem)
 10762  		return true
 10763  	}
 10764  	// match: (MOVBstoreidx (MOVDconst [c]) idx val mem)
 10765  	// cond: ssa.Is32Bit(c)
 10766  	// result: (MOVBstore [int32(c)] idx val mem)
 10767  	for {
 10768  		if v_0.Op != ssaop.OpARM64MOVDconst {
 10769  			break
 10770  		}
 10771  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 10772  		idx := v_1
 10773  		val := v_2
 10774  		mem := v_3
 10775  		if !(ssa.Is32Bit(c)) {
 10776  			break
 10777  		}
 10778  		v.Reset(ssaop.OpARM64MOVBstore)
 10779  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 10780  		v.AddArg3(idx, val, mem)
 10781  		return true
 10782  	}
 10783  	// match: (MOVBstoreidx ptr idx (MOVBreg x) mem)
 10784  	// result: (MOVBstoreidx ptr idx x mem)
 10785  	for {
 10786  		ptr := v_0
 10787  		idx := v_1
 10788  		if v_2.Op != ssaop.OpARM64MOVBreg {
 10789  			break
 10790  		}
 10791  		x := v_2.Args[0]
 10792  		mem := v_3
 10793  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10794  		v.AddArg4(ptr, idx, x, mem)
 10795  		return true
 10796  	}
 10797  	// match: (MOVBstoreidx ptr idx (MOVBUreg x) mem)
 10798  	// result: (MOVBstoreidx ptr idx x mem)
 10799  	for {
 10800  		ptr := v_0
 10801  		idx := v_1
 10802  		if v_2.Op != ssaop.OpARM64MOVBUreg {
 10803  			break
 10804  		}
 10805  		x := v_2.Args[0]
 10806  		mem := v_3
 10807  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10808  		v.AddArg4(ptr, idx, x, mem)
 10809  		return true
 10810  	}
 10811  	// match: (MOVBstoreidx ptr idx (MOVHreg x) mem)
 10812  	// result: (MOVBstoreidx ptr idx x mem)
 10813  	for {
 10814  		ptr := v_0
 10815  		idx := v_1
 10816  		if v_2.Op != ssaop.OpARM64MOVHreg {
 10817  			break
 10818  		}
 10819  		x := v_2.Args[0]
 10820  		mem := v_3
 10821  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10822  		v.AddArg4(ptr, idx, x, mem)
 10823  		return true
 10824  	}
 10825  	// match: (MOVBstoreidx ptr idx (MOVHUreg x) mem)
 10826  	// result: (MOVBstoreidx ptr idx x mem)
 10827  	for {
 10828  		ptr := v_0
 10829  		idx := v_1
 10830  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 10831  			break
 10832  		}
 10833  		x := v_2.Args[0]
 10834  		mem := v_3
 10835  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10836  		v.AddArg4(ptr, idx, x, mem)
 10837  		return true
 10838  	}
 10839  	// match: (MOVBstoreidx ptr idx (MOVWreg x) mem)
 10840  	// result: (MOVBstoreidx ptr idx x mem)
 10841  	for {
 10842  		ptr := v_0
 10843  		idx := v_1
 10844  		if v_2.Op != ssaop.OpARM64MOVWreg {
 10845  			break
 10846  		}
 10847  		x := v_2.Args[0]
 10848  		mem := v_3
 10849  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10850  		v.AddArg4(ptr, idx, x, mem)
 10851  		return true
 10852  	}
 10853  	// match: (MOVBstoreidx ptr idx (MOVWUreg x) mem)
 10854  	// result: (MOVBstoreidx ptr idx x mem)
 10855  	for {
 10856  		ptr := v_0
 10857  		idx := v_1
 10858  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 10859  			break
 10860  		}
 10861  		x := v_2.Args[0]
 10862  		mem := v_3
 10863  		v.Reset(ssaop.OpARM64MOVBstoreidx)
 10864  		v.AddArg4(ptr, idx, x, mem)
 10865  		return true
 10866  	}
 10867  	return false
 10868  }
 10869  func rewriteValue_OpARM64MOVDload(v *ssa.Value) bool {
 10870  	v_1 := v.Args[1]
 10871  	v_0 := v.Args[0]
 10872  	b := v.Block
 10873  	config := b.Func.Config
 10874  	// match: (MOVDload [off] {sym} ptr (FMOVDstore [off] {sym} ptr val _))
 10875  	// result: (FMOVDfpgp val)
 10876  	for {
 10877  		off := ssa.AuxIntToInt32(v.AuxInt)
 10878  		sym := ssa.AuxToSym(v.Aux)
 10879  		ptr := v_0
 10880  		if v_1.Op != ssaop.OpARM64FMOVDstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
 10881  			break
 10882  		}
 10883  		val := v_1.Args[1]
 10884  		if ptr != v_1.Args[0] {
 10885  			break
 10886  		}
 10887  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 10888  		v.AddArg(val)
 10889  		return true
 10890  	}
 10891  	// match: (MOVDload [off1] {sym} (ADDconst [off2] ptr) mem)
 10892  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10893  	// result: (MOVDload [off1+int32(off2)] {sym} ptr mem)
 10894  	for {
 10895  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10896  		sym := ssa.AuxToSym(v.Aux)
 10897  		if v_0.Op != ssaop.OpARM64ADDconst {
 10898  			break
 10899  		}
 10900  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 10901  		ptr := v_0.Args[0]
 10902  		mem := v_1
 10903  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10904  			break
 10905  		}
 10906  		v.Reset(ssaop.OpARM64MOVDload)
 10907  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 10908  		v.Aux = ssa.SymToAux(sym)
 10909  		v.AddArg2(ptr, mem)
 10910  		return true
 10911  	}
 10912  	// match: (MOVDload [off] {sym} (ADD ptr idx) mem)
 10913  	// cond: off == 0 && sym == nil
 10914  	// result: (MOVDloadidx ptr idx mem)
 10915  	for {
 10916  		off := ssa.AuxIntToInt32(v.AuxInt)
 10917  		sym := ssa.AuxToSym(v.Aux)
 10918  		if v_0.Op != ssaop.OpARM64ADD {
 10919  			break
 10920  		}
 10921  		idx := v_0.Args[1]
 10922  		ptr := v_0.Args[0]
 10923  		mem := v_1
 10924  		if !(off == 0 && sym == nil) {
 10925  			break
 10926  		}
 10927  		v.Reset(ssaop.OpARM64MOVDloadidx)
 10928  		v.AddArg3(ptr, idx, mem)
 10929  		return true
 10930  	}
 10931  	// match: (MOVDload [off] {sym} (ADDshiftLL [3] ptr idx) mem)
 10932  	// cond: off == 0 && sym == nil
 10933  	// result: (MOVDloadidx8 ptr idx mem)
 10934  	for {
 10935  		off := ssa.AuxIntToInt32(v.AuxInt)
 10936  		sym := ssa.AuxToSym(v.Aux)
 10937  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 10938  			break
 10939  		}
 10940  		idx := v_0.Args[1]
 10941  		ptr := v_0.Args[0]
 10942  		mem := v_1
 10943  		if !(off == 0 && sym == nil) {
 10944  			break
 10945  		}
 10946  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 10947  		v.AddArg3(ptr, idx, mem)
 10948  		return true
 10949  	}
 10950  	// match: (MOVDload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 10951  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 10952  	// result: (MOVDload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 10953  	for {
 10954  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 10955  		sym1 := ssa.AuxToSym(v.Aux)
 10956  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 10957  			break
 10958  		}
 10959  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 10960  		sym2 := ssa.AuxToSym(v_0.Aux)
 10961  		ptr := v_0.Args[0]
 10962  		mem := v_1
 10963  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 10964  			break
 10965  		}
 10966  		v.Reset(ssaop.OpARM64MOVDload)
 10967  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 10968  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 10969  		v.AddArg2(ptr, mem)
 10970  		return true
 10971  	}
 10972  	// match: (MOVDload [off] {sym} (SB) _)
 10973  	// cond: ssa.SymIsRO(sym)
 10974  	// result: (MOVDconst [int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 10975  	for {
 10976  		off := ssa.AuxIntToInt32(v.AuxInt)
 10977  		sym := ssa.AuxToSym(v.Aux)
 10978  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 10979  			break
 10980  		}
 10981  		v.Reset(ssaop.OpARM64MOVDconst)
 10982  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read64(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 10983  		return true
 10984  	}
 10985  	return false
 10986  }
 10987  func rewriteValue_OpARM64MOVDloadidx(v *ssa.Value) bool {
 10988  	v_2 := v.Args[2]
 10989  	v_1 := v.Args[1]
 10990  	v_0 := v.Args[0]
 10991  	// match: (MOVDloadidx ptr (MOVDconst [c]) mem)
 10992  	// cond: ssa.Is32Bit(c)
 10993  	// result: (MOVDload [int32(c)] ptr mem)
 10994  	for {
 10995  		ptr := v_0
 10996  		if v_1.Op != ssaop.OpARM64MOVDconst {
 10997  			break
 10998  		}
 10999  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11000  		mem := v_2
 11001  		if !(ssa.Is32Bit(c)) {
 11002  			break
 11003  		}
 11004  		v.Reset(ssaop.OpARM64MOVDload)
 11005  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11006  		v.AddArg2(ptr, mem)
 11007  		return true
 11008  	}
 11009  	// match: (MOVDloadidx (MOVDconst [c]) ptr mem)
 11010  	// cond: ssa.Is32Bit(c)
 11011  	// result: (MOVDload [int32(c)] ptr mem)
 11012  	for {
 11013  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11014  			break
 11015  		}
 11016  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11017  		ptr := v_1
 11018  		mem := v_2
 11019  		if !(ssa.Is32Bit(c)) {
 11020  			break
 11021  		}
 11022  		v.Reset(ssaop.OpARM64MOVDload)
 11023  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11024  		v.AddArg2(ptr, mem)
 11025  		return true
 11026  	}
 11027  	// match: (MOVDloadidx ptr (SLLconst [3] idx) mem)
 11028  	// result: (MOVDloadidx8 ptr idx mem)
 11029  	for {
 11030  		ptr := v_0
 11031  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
 11032  			break
 11033  		}
 11034  		idx := v_1.Args[0]
 11035  		mem := v_2
 11036  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 11037  		v.AddArg3(ptr, idx, mem)
 11038  		return true
 11039  	}
 11040  	// match: (MOVDloadidx (SLLconst [3] idx) ptr mem)
 11041  	// result: (MOVDloadidx8 ptr idx mem)
 11042  	for {
 11043  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11044  			break
 11045  		}
 11046  		idx := v_0.Args[0]
 11047  		ptr := v_1
 11048  		mem := v_2
 11049  		v.Reset(ssaop.OpARM64MOVDloadidx8)
 11050  		v.AddArg3(ptr, idx, mem)
 11051  		return true
 11052  	}
 11053  	return false
 11054  }
 11055  func rewriteValue_OpARM64MOVDloadidx8(v *ssa.Value) bool {
 11056  	v_2 := v.Args[2]
 11057  	v_1 := v.Args[1]
 11058  	v_0 := v.Args[0]
 11059  	// match: (MOVDloadidx8 ptr (MOVDconst [c]) mem)
 11060  	// cond: ssa.Is32Bit(c<<3)
 11061  	// result: (MOVDload [int32(c)<<3] ptr mem)
 11062  	for {
 11063  		ptr := v_0
 11064  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11065  			break
 11066  		}
 11067  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11068  		mem := v_2
 11069  		if !(ssa.Is32Bit(c << 3)) {
 11070  			break
 11071  		}
 11072  		v.Reset(ssaop.OpARM64MOVDload)
 11073  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
 11074  		v.AddArg2(ptr, mem)
 11075  		return true
 11076  	}
 11077  	return false
 11078  }
 11079  func rewriteValue_OpARM64MOVDnop(v *ssa.Value) bool {
 11080  	v_0 := v.Args[0]
 11081  	// match: (MOVDnop (MOVDconst [c]))
 11082  	// result: (MOVDconst [c])
 11083  	for {
 11084  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11085  			break
 11086  		}
 11087  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11088  		v.Reset(ssaop.OpARM64MOVDconst)
 11089  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11090  		return true
 11091  	}
 11092  	return false
 11093  }
 11094  func rewriteValue_OpARM64MOVDreg(v *ssa.Value) bool {
 11095  	v_0 := v.Args[0]
 11096  	// match: (MOVDreg x)
 11097  	// cond: x.Uses == 1
 11098  	// result: (MOVDnop x)
 11099  	for {
 11100  		x := v_0
 11101  		if !(x.Uses == 1) {
 11102  			break
 11103  		}
 11104  		v.Reset(ssaop.OpARM64MOVDnop)
 11105  		v.AddArg(x)
 11106  		return true
 11107  	}
 11108  	// match: (MOVDreg (MOVDconst [c]))
 11109  	// result: (MOVDconst [c])
 11110  	for {
 11111  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11112  			break
 11113  		}
 11114  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11115  		v.Reset(ssaop.OpARM64MOVDconst)
 11116  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11117  		return true
 11118  	}
 11119  	return false
 11120  }
 11121  func rewriteValue_OpARM64MOVDstore(v *ssa.Value) bool {
 11122  	v_2 := v.Args[2]
 11123  	v_1 := v.Args[1]
 11124  	v_0 := v.Args[0]
 11125  	b := v.Block
 11126  	config := b.Func.Config
 11127  	// match: (MOVDstore [off] {sym} ptr (FMOVDfpgp val) mem)
 11128  	// result: (FMOVDstore [off] {sym} ptr val mem)
 11129  	for {
 11130  		off := ssa.AuxIntToInt32(v.AuxInt)
 11131  		sym := ssa.AuxToSym(v.Aux)
 11132  		ptr := v_0
 11133  		if v_1.Op != ssaop.OpARM64FMOVDfpgp {
 11134  			break
 11135  		}
 11136  		val := v_1.Args[0]
 11137  		mem := v_2
 11138  		v.Reset(ssaop.OpARM64FMOVDstore)
 11139  		v.AuxInt = ssa.Int32ToAuxInt(off)
 11140  		v.Aux = ssa.SymToAux(sym)
 11141  		v.AddArg3(ptr, val, mem)
 11142  		return true
 11143  	}
 11144  	// match: (MOVDstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 11145  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11146  	// result: (MOVDstore [off1+int32(off2)] {sym} ptr val mem)
 11147  	for {
 11148  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11149  		sym := ssa.AuxToSym(v.Aux)
 11150  		if v_0.Op != ssaop.OpARM64ADDconst {
 11151  			break
 11152  		}
 11153  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11154  		ptr := v_0.Args[0]
 11155  		val := v_1
 11156  		mem := v_2
 11157  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11158  			break
 11159  		}
 11160  		v.Reset(ssaop.OpARM64MOVDstore)
 11161  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11162  		v.Aux = ssa.SymToAux(sym)
 11163  		v.AddArg3(ptr, val, mem)
 11164  		return true
 11165  	}
 11166  	// match: (MOVDstore [off] {sym} (ADD ptr idx) val mem)
 11167  	// cond: off == 0 && sym == nil
 11168  	// result: (MOVDstoreidx ptr idx val mem)
 11169  	for {
 11170  		off := ssa.AuxIntToInt32(v.AuxInt)
 11171  		sym := ssa.AuxToSym(v.Aux)
 11172  		if v_0.Op != ssaop.OpARM64ADD {
 11173  			break
 11174  		}
 11175  		idx := v_0.Args[1]
 11176  		ptr := v_0.Args[0]
 11177  		val := v_1
 11178  		mem := v_2
 11179  		if !(off == 0 && sym == nil) {
 11180  			break
 11181  		}
 11182  		v.Reset(ssaop.OpARM64MOVDstoreidx)
 11183  		v.AddArg4(ptr, idx, val, mem)
 11184  		return true
 11185  	}
 11186  	// match: (MOVDstore [off] {sym} (ADDshiftLL [3] ptr idx) val mem)
 11187  	// cond: off == 0 && sym == nil
 11188  	// result: (MOVDstoreidx8 ptr idx val mem)
 11189  	for {
 11190  		off := ssa.AuxIntToInt32(v.AuxInt)
 11191  		sym := ssa.AuxToSym(v.Aux)
 11192  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11193  			break
 11194  		}
 11195  		idx := v_0.Args[1]
 11196  		ptr := v_0.Args[0]
 11197  		val := v_1
 11198  		mem := v_2
 11199  		if !(off == 0 && sym == nil) {
 11200  			break
 11201  		}
 11202  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11203  		v.AddArg4(ptr, idx, val, mem)
 11204  		return true
 11205  	}
 11206  	// match: (MOVDstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 11207  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11208  	// result: (MOVDstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 11209  	for {
 11210  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11211  		sym1 := ssa.AuxToSym(v.Aux)
 11212  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11213  			break
 11214  		}
 11215  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11216  		sym2 := ssa.AuxToSym(v_0.Aux)
 11217  		ptr := v_0.Args[0]
 11218  		val := v_1
 11219  		mem := v_2
 11220  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11221  			break
 11222  		}
 11223  		v.Reset(ssaop.OpARM64MOVDstore)
 11224  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11225  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11226  		v.AddArg3(ptr, val, mem)
 11227  		return true
 11228  	}
 11229  	return false
 11230  }
 11231  func rewriteValue_OpARM64MOVDstoreidx(v *ssa.Value) bool {
 11232  	v_3 := v.Args[3]
 11233  	v_2 := v.Args[2]
 11234  	v_1 := v.Args[1]
 11235  	v_0 := v.Args[0]
 11236  	// match: (MOVDstoreidx ptr (MOVDconst [c]) val mem)
 11237  	// cond: ssa.Is32Bit(c)
 11238  	// result: (MOVDstore [int32(c)] ptr val mem)
 11239  	for {
 11240  		ptr := v_0
 11241  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11242  			break
 11243  		}
 11244  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11245  		val := v_2
 11246  		mem := v_3
 11247  		if !(ssa.Is32Bit(c)) {
 11248  			break
 11249  		}
 11250  		v.Reset(ssaop.OpARM64MOVDstore)
 11251  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11252  		v.AddArg3(ptr, val, mem)
 11253  		return true
 11254  	}
 11255  	// match: (MOVDstoreidx (MOVDconst [c]) idx val mem)
 11256  	// cond: ssa.Is32Bit(c)
 11257  	// result: (MOVDstore [int32(c)] idx val mem)
 11258  	for {
 11259  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11260  			break
 11261  		}
 11262  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11263  		idx := v_1
 11264  		val := v_2
 11265  		mem := v_3
 11266  		if !(ssa.Is32Bit(c)) {
 11267  			break
 11268  		}
 11269  		v.Reset(ssaop.OpARM64MOVDstore)
 11270  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11271  		v.AddArg3(idx, val, mem)
 11272  		return true
 11273  	}
 11274  	// match: (MOVDstoreidx ptr (SLLconst [3] idx) val mem)
 11275  	// result: (MOVDstoreidx8 ptr idx val mem)
 11276  	for {
 11277  		ptr := v_0
 11278  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 3 {
 11279  			break
 11280  		}
 11281  		idx := v_1.Args[0]
 11282  		val := v_2
 11283  		mem := v_3
 11284  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11285  		v.AddArg4(ptr, idx, val, mem)
 11286  		return true
 11287  	}
 11288  	// match: (MOVDstoreidx (SLLconst [3] idx) ptr val mem)
 11289  	// result: (MOVDstoreidx8 ptr idx val mem)
 11290  	for {
 11291  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 3 {
 11292  			break
 11293  		}
 11294  		idx := v_0.Args[0]
 11295  		ptr := v_1
 11296  		val := v_2
 11297  		mem := v_3
 11298  		v.Reset(ssaop.OpARM64MOVDstoreidx8)
 11299  		v.AddArg4(ptr, idx, val, mem)
 11300  		return true
 11301  	}
 11302  	return false
 11303  }
 11304  func rewriteValue_OpARM64MOVDstoreidx8(v *ssa.Value) bool {
 11305  	v_3 := v.Args[3]
 11306  	v_2 := v.Args[2]
 11307  	v_1 := v.Args[1]
 11308  	v_0 := v.Args[0]
 11309  	// match: (MOVDstoreidx8 ptr (MOVDconst [c]) val mem)
 11310  	// cond: ssa.Is32Bit(c<<3)
 11311  	// result: (MOVDstore [int32(c)<<3] ptr val mem)
 11312  	for {
 11313  		ptr := v_0
 11314  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11315  			break
 11316  		}
 11317  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11318  		val := v_2
 11319  		mem := v_3
 11320  		if !(ssa.Is32Bit(c << 3)) {
 11321  			break
 11322  		}
 11323  		v.Reset(ssaop.OpARM64MOVDstore)
 11324  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 3)
 11325  		v.AddArg3(ptr, val, mem)
 11326  		return true
 11327  	}
 11328  	return false
 11329  }
 11330  func rewriteValue_OpARM64MOVHUload(v *ssa.Value) bool {
 11331  	v_1 := v.Args[1]
 11332  	v_0 := v.Args[0]
 11333  	b := v.Block
 11334  	config := b.Func.Config
 11335  	// match: (MOVHUload [off1] {sym} (ADDconst [off2] ptr) mem)
 11336  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11337  	// result: (MOVHUload [off1+int32(off2)] {sym} ptr mem)
 11338  	for {
 11339  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11340  		sym := ssa.AuxToSym(v.Aux)
 11341  		if v_0.Op != ssaop.OpARM64ADDconst {
 11342  			break
 11343  		}
 11344  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11345  		ptr := v_0.Args[0]
 11346  		mem := v_1
 11347  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11348  			break
 11349  		}
 11350  		v.Reset(ssaop.OpARM64MOVHUload)
 11351  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11352  		v.Aux = ssa.SymToAux(sym)
 11353  		v.AddArg2(ptr, mem)
 11354  		return true
 11355  	}
 11356  	// match: (MOVHUload [off] {sym} (ADD ptr idx) mem)
 11357  	// cond: off == 0 && sym == nil
 11358  	// result: (MOVHUloadidx ptr idx mem)
 11359  	for {
 11360  		off := ssa.AuxIntToInt32(v.AuxInt)
 11361  		sym := ssa.AuxToSym(v.Aux)
 11362  		if v_0.Op != ssaop.OpARM64ADD {
 11363  			break
 11364  		}
 11365  		idx := v_0.Args[1]
 11366  		ptr := v_0.Args[0]
 11367  		mem := v_1
 11368  		if !(off == 0 && sym == nil) {
 11369  			break
 11370  		}
 11371  		v.Reset(ssaop.OpARM64MOVHUloadidx)
 11372  		v.AddArg3(ptr, idx, mem)
 11373  		return true
 11374  	}
 11375  	// match: (MOVHUload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 11376  	// cond: off == 0 && sym == nil
 11377  	// result: (MOVHUloadidx2 ptr idx mem)
 11378  	for {
 11379  		off := ssa.AuxIntToInt32(v.AuxInt)
 11380  		sym := ssa.AuxToSym(v.Aux)
 11381  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 11382  			break
 11383  		}
 11384  		idx := v_0.Args[1]
 11385  		ptr := v_0.Args[0]
 11386  		mem := v_1
 11387  		if !(off == 0 && sym == nil) {
 11388  			break
 11389  		}
 11390  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11391  		v.AddArg3(ptr, idx, mem)
 11392  		return true
 11393  	}
 11394  	// match: (MOVHUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11395  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11396  	// result: (MOVHUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 11397  	for {
 11398  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11399  		sym1 := ssa.AuxToSym(v.Aux)
 11400  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11401  			break
 11402  		}
 11403  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11404  		sym2 := ssa.AuxToSym(v_0.Aux)
 11405  		ptr := v_0.Args[0]
 11406  		mem := v_1
 11407  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11408  			break
 11409  		}
 11410  		v.Reset(ssaop.OpARM64MOVHUload)
 11411  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11412  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11413  		v.AddArg2(ptr, mem)
 11414  		return true
 11415  	}
 11416  	// match: (MOVHUload [off] {sym} (SB) _)
 11417  	// cond: ssa.SymIsRO(sym)
 11418  	// result: (MOVDconst [int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 11419  	for {
 11420  		off := ssa.AuxIntToInt32(v.AuxInt)
 11421  		sym := ssa.AuxToSym(v.Aux)
 11422  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 11423  			break
 11424  		}
 11425  		v.Reset(ssaop.OpARM64MOVDconst)
 11426  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 11427  		return true
 11428  	}
 11429  	return false
 11430  }
 11431  func rewriteValue_OpARM64MOVHUloadidx(v *ssa.Value) bool {
 11432  	v_2 := v.Args[2]
 11433  	v_1 := v.Args[1]
 11434  	v_0 := v.Args[0]
 11435  	// match: (MOVHUloadidx ptr (MOVDconst [c]) mem)
 11436  	// cond: ssa.Is32Bit(c)
 11437  	// result: (MOVHUload [int32(c)] ptr mem)
 11438  	for {
 11439  		ptr := v_0
 11440  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11441  			break
 11442  		}
 11443  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11444  		mem := v_2
 11445  		if !(ssa.Is32Bit(c)) {
 11446  			break
 11447  		}
 11448  		v.Reset(ssaop.OpARM64MOVHUload)
 11449  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11450  		v.AddArg2(ptr, mem)
 11451  		return true
 11452  	}
 11453  	// match: (MOVHUloadidx (MOVDconst [c]) ptr mem)
 11454  	// cond: ssa.Is32Bit(c)
 11455  	// result: (MOVHUload [int32(c)] ptr mem)
 11456  	for {
 11457  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11458  			break
 11459  		}
 11460  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11461  		ptr := v_1
 11462  		mem := v_2
 11463  		if !(ssa.Is32Bit(c)) {
 11464  			break
 11465  		}
 11466  		v.Reset(ssaop.OpARM64MOVHUload)
 11467  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11468  		v.AddArg2(ptr, mem)
 11469  		return true
 11470  	}
 11471  	// match: (MOVHUloadidx ptr (SLLconst [1] idx) mem)
 11472  	// result: (MOVHUloadidx2 ptr idx mem)
 11473  	for {
 11474  		ptr := v_0
 11475  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 11476  			break
 11477  		}
 11478  		idx := v_1.Args[0]
 11479  		mem := v_2
 11480  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11481  		v.AddArg3(ptr, idx, mem)
 11482  		return true
 11483  	}
 11484  	// match: (MOVHUloadidx ptr (ADD idx idx) mem)
 11485  	// result: (MOVHUloadidx2 ptr idx mem)
 11486  	for {
 11487  		ptr := v_0
 11488  		if v_1.Op != ssaop.OpARM64ADD {
 11489  			break
 11490  		}
 11491  		idx := v_1.Args[1]
 11492  		if idx != v_1.Args[0] {
 11493  			break
 11494  		}
 11495  		mem := v_2
 11496  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11497  		v.AddArg3(ptr, idx, mem)
 11498  		return true
 11499  	}
 11500  	// match: (MOVHUloadidx (ADD idx idx) ptr mem)
 11501  	// result: (MOVHUloadidx2 ptr idx mem)
 11502  	for {
 11503  		if v_0.Op != ssaop.OpARM64ADD {
 11504  			break
 11505  		}
 11506  		idx := v_0.Args[1]
 11507  		if idx != v_0.Args[0] {
 11508  			break
 11509  		}
 11510  		ptr := v_1
 11511  		mem := v_2
 11512  		v.Reset(ssaop.OpARM64MOVHUloadidx2)
 11513  		v.AddArg3(ptr, idx, mem)
 11514  		return true
 11515  	}
 11516  	return false
 11517  }
 11518  func rewriteValue_OpARM64MOVHUloadidx2(v *ssa.Value) bool {
 11519  	v_2 := v.Args[2]
 11520  	v_1 := v.Args[1]
 11521  	v_0 := v.Args[0]
 11522  	// match: (MOVHUloadidx2 ptr (MOVDconst [c]) mem)
 11523  	// cond: ssa.Is32Bit(c<<1)
 11524  	// result: (MOVHUload [int32(c)<<1] ptr mem)
 11525  	for {
 11526  		ptr := v_0
 11527  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11528  			break
 11529  		}
 11530  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11531  		mem := v_2
 11532  		if !(ssa.Is32Bit(c << 1)) {
 11533  			break
 11534  		}
 11535  		v.Reset(ssaop.OpARM64MOVHUload)
 11536  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 11537  		v.AddArg2(ptr, mem)
 11538  		return true
 11539  	}
 11540  	return false
 11541  }
 11542  func rewriteValue_OpARM64MOVHUreg(v *ssa.Value) bool {
 11543  	v_0 := v.Args[0]
 11544  	// match: (MOVHUreg (ANDconst [c] x))
 11545  	// result: (ANDconst [c&(1<<16-1)] x)
 11546  	for {
 11547  		if v_0.Op != ssaop.OpARM64ANDconst {
 11548  			break
 11549  		}
 11550  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11551  		x := v_0.Args[0]
 11552  		v.Reset(ssaop.OpARM64ANDconst)
 11553  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<16 - 1))
 11554  		v.AddArg(x)
 11555  		return true
 11556  	}
 11557  	// match: (MOVHUreg (MOVDconst [c]))
 11558  	// result: (MOVDconst [int64(uint16(c))])
 11559  	for {
 11560  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11561  			break
 11562  		}
 11563  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11564  		v.Reset(ssaop.OpARM64MOVDconst)
 11565  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint16(c)))
 11566  		return true
 11567  	}
 11568  	// match: (MOVHUreg x)
 11569  	// cond: v.Type.Size() <= 2
 11570  	// result: x
 11571  	for {
 11572  		x := v_0
 11573  		if !(v.Type.Size() <= 2) {
 11574  			break
 11575  		}
 11576  		v.CopyOf(x)
 11577  		return true
 11578  	}
 11579  	// match: (MOVHUreg (SLLconst [lc] x))
 11580  	// cond: lc >= 16
 11581  	// result: (MOVDconst [0])
 11582  	for {
 11583  		if v_0.Op != ssaop.OpARM64SLLconst {
 11584  			break
 11585  		}
 11586  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 11587  		if !(lc >= 16) {
 11588  			break
 11589  		}
 11590  		v.Reset(ssaop.OpARM64MOVDconst)
 11591  		v.AuxInt = ssa.Int64ToAuxInt(0)
 11592  		return true
 11593  	}
 11594  	// match: (MOVHUreg (SLLconst [lc] x))
 11595  	// cond: lc < 16
 11596  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 16-lc)] x)
 11597  	for {
 11598  		if v_0.Op != ssaop.OpARM64SLLconst {
 11599  			break
 11600  		}
 11601  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 11602  		x := v_0.Args[0]
 11603  		if !(lc < 16) {
 11604  			break
 11605  		}
 11606  		v.Reset(ssaop.OpARM64UBFIZ)
 11607  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 16-lc))
 11608  		v.AddArg(x)
 11609  		return true
 11610  	}
 11611  	// match: (MOVHUreg (SRLconst [rc] x))
 11612  	// cond: rc < 16
 11613  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 16)] x)
 11614  	for {
 11615  		if v_0.Op != ssaop.OpARM64SRLconst {
 11616  			break
 11617  		}
 11618  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 11619  		x := v_0.Args[0]
 11620  		if !(rc < 16) {
 11621  			break
 11622  		}
 11623  		v.Reset(ssaop.OpARM64UBFX)
 11624  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16))
 11625  		v.AddArg(x)
 11626  		return true
 11627  	}
 11628  	// match: (MOVHUreg (UBFX [bfc] x))
 11629  	// cond: bfc.Width() <= 16
 11630  	// result: (UBFX [bfc] x)
 11631  	for {
 11632  		if v_0.Op != ssaop.OpARM64UBFX {
 11633  			break
 11634  		}
 11635  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 11636  		x := v_0.Args[0]
 11637  		if !(bfc.Width() <= 16) {
 11638  			break
 11639  		}
 11640  		v.Reset(ssaop.OpARM64UBFX)
 11641  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 11642  		v.AddArg(x)
 11643  		return true
 11644  	}
 11645  	return false
 11646  }
 11647  func rewriteValue_OpARM64MOVHload(v *ssa.Value) bool {
 11648  	v_1 := v.Args[1]
 11649  	v_0 := v.Args[0]
 11650  	b := v.Block
 11651  	config := b.Func.Config
 11652  	// match: (MOVHload [off1] {sym} (ADDconst [off2] ptr) mem)
 11653  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11654  	// result: (MOVHload [off1+int32(off2)] {sym} ptr mem)
 11655  	for {
 11656  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11657  		sym := ssa.AuxToSym(v.Aux)
 11658  		if v_0.Op != ssaop.OpARM64ADDconst {
 11659  			break
 11660  		}
 11661  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11662  		ptr := v_0.Args[0]
 11663  		mem := v_1
 11664  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11665  			break
 11666  		}
 11667  		v.Reset(ssaop.OpARM64MOVHload)
 11668  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11669  		v.Aux = ssa.SymToAux(sym)
 11670  		v.AddArg2(ptr, mem)
 11671  		return true
 11672  	}
 11673  	// match: (MOVHload [off] {sym} (ADD ptr idx) mem)
 11674  	// cond: off == 0 && sym == nil
 11675  	// result: (MOVHloadidx ptr idx mem)
 11676  	for {
 11677  		off := ssa.AuxIntToInt32(v.AuxInt)
 11678  		sym := ssa.AuxToSym(v.Aux)
 11679  		if v_0.Op != ssaop.OpARM64ADD {
 11680  			break
 11681  		}
 11682  		idx := v_0.Args[1]
 11683  		ptr := v_0.Args[0]
 11684  		mem := v_1
 11685  		if !(off == 0 && sym == nil) {
 11686  			break
 11687  		}
 11688  		v.Reset(ssaop.OpARM64MOVHloadidx)
 11689  		v.AddArg3(ptr, idx, mem)
 11690  		return true
 11691  	}
 11692  	// match: (MOVHload [off] {sym} (ADDshiftLL [1] ptr idx) mem)
 11693  	// cond: off == 0 && sym == nil
 11694  	// result: (MOVHloadidx2 ptr idx mem)
 11695  	for {
 11696  		off := ssa.AuxIntToInt32(v.AuxInt)
 11697  		sym := ssa.AuxToSym(v.Aux)
 11698  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 11699  			break
 11700  		}
 11701  		idx := v_0.Args[1]
 11702  		ptr := v_0.Args[0]
 11703  		mem := v_1
 11704  		if !(off == 0 && sym == nil) {
 11705  			break
 11706  		}
 11707  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 11708  		v.AddArg3(ptr, idx, mem)
 11709  		return true
 11710  	}
 11711  	// match: (MOVHload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 11712  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11713  	// result: (MOVHload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 11714  	for {
 11715  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11716  		sym1 := ssa.AuxToSym(v.Aux)
 11717  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 11718  			break
 11719  		}
 11720  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 11721  		sym2 := ssa.AuxToSym(v_0.Aux)
 11722  		ptr := v_0.Args[0]
 11723  		mem := v_1
 11724  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11725  			break
 11726  		}
 11727  		v.Reset(ssaop.OpARM64MOVHload)
 11728  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 11729  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 11730  		v.AddArg2(ptr, mem)
 11731  		return true
 11732  	}
 11733  	// match: (MOVHload [off] {sym} (SB) _)
 11734  	// cond: ssa.SymIsRO(sym)
 11735  	// result: (MOVDconst [int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
 11736  	for {
 11737  		off := ssa.AuxIntToInt32(v.AuxInt)
 11738  		sym := ssa.AuxToSym(v.Aux)
 11739  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 11740  			break
 11741  		}
 11742  		v.Reset(ssaop.OpARM64MOVDconst)
 11743  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(ssa.Read16(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
 11744  		return true
 11745  	}
 11746  	return false
 11747  }
 11748  func rewriteValue_OpARM64MOVHloadidx(v *ssa.Value) bool {
 11749  	v_2 := v.Args[2]
 11750  	v_1 := v.Args[1]
 11751  	v_0 := v.Args[0]
 11752  	// match: (MOVHloadidx ptr (MOVDconst [c]) mem)
 11753  	// cond: ssa.Is32Bit(c)
 11754  	// result: (MOVHload [int32(c)] ptr mem)
 11755  	for {
 11756  		ptr := v_0
 11757  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11758  			break
 11759  		}
 11760  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11761  		mem := v_2
 11762  		if !(ssa.Is32Bit(c)) {
 11763  			break
 11764  		}
 11765  		v.Reset(ssaop.OpARM64MOVHload)
 11766  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11767  		v.AddArg2(ptr, mem)
 11768  		return true
 11769  	}
 11770  	// match: (MOVHloadidx (MOVDconst [c]) ptr mem)
 11771  	// cond: ssa.Is32Bit(c)
 11772  	// result: (MOVHload [int32(c)] ptr mem)
 11773  	for {
 11774  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11775  			break
 11776  		}
 11777  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11778  		ptr := v_1
 11779  		mem := v_2
 11780  		if !(ssa.Is32Bit(c)) {
 11781  			break
 11782  		}
 11783  		v.Reset(ssaop.OpARM64MOVHload)
 11784  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 11785  		v.AddArg2(ptr, mem)
 11786  		return true
 11787  	}
 11788  	// match: (MOVHloadidx ptr (SLLconst [1] idx) mem)
 11789  	// result: (MOVHloadidx2 ptr idx mem)
 11790  	for {
 11791  		ptr := v_0
 11792  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 11793  			break
 11794  		}
 11795  		idx := v_1.Args[0]
 11796  		mem := v_2
 11797  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 11798  		v.AddArg3(ptr, idx, mem)
 11799  		return true
 11800  	}
 11801  	// match: (MOVHloadidx ptr (ADD idx idx) mem)
 11802  	// result: (MOVHloadidx2 ptr idx mem)
 11803  	for {
 11804  		ptr := v_0
 11805  		if v_1.Op != ssaop.OpARM64ADD {
 11806  			break
 11807  		}
 11808  		idx := v_1.Args[1]
 11809  		if idx != v_1.Args[0] {
 11810  			break
 11811  		}
 11812  		mem := v_2
 11813  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 11814  		v.AddArg3(ptr, idx, mem)
 11815  		return true
 11816  	}
 11817  	// match: (MOVHloadidx (ADD idx idx) ptr mem)
 11818  	// result: (MOVHloadidx2 ptr idx mem)
 11819  	for {
 11820  		if v_0.Op != ssaop.OpARM64ADD {
 11821  			break
 11822  		}
 11823  		idx := v_0.Args[1]
 11824  		if idx != v_0.Args[0] {
 11825  			break
 11826  		}
 11827  		ptr := v_1
 11828  		mem := v_2
 11829  		v.Reset(ssaop.OpARM64MOVHloadidx2)
 11830  		v.AddArg3(ptr, idx, mem)
 11831  		return true
 11832  	}
 11833  	return false
 11834  }
 11835  func rewriteValue_OpARM64MOVHloadidx2(v *ssa.Value) bool {
 11836  	v_2 := v.Args[2]
 11837  	v_1 := v.Args[1]
 11838  	v_0 := v.Args[0]
 11839  	// match: (MOVHloadidx2 ptr (MOVDconst [c]) mem)
 11840  	// cond: ssa.Is32Bit(c<<1)
 11841  	// result: (MOVHload [int32(c)<<1] ptr mem)
 11842  	for {
 11843  		ptr := v_0
 11844  		if v_1.Op != ssaop.OpARM64MOVDconst {
 11845  			break
 11846  		}
 11847  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 11848  		mem := v_2
 11849  		if !(ssa.Is32Bit(c << 1)) {
 11850  			break
 11851  		}
 11852  		v.Reset(ssaop.OpARM64MOVHload)
 11853  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 11854  		v.AddArg2(ptr, mem)
 11855  		return true
 11856  	}
 11857  	return false
 11858  }
 11859  func rewriteValue_OpARM64MOVHreg(v *ssa.Value) bool {
 11860  	v_0 := v.Args[0]
 11861  	// match: (MOVHreg (MOVDconst [c]))
 11862  	// result: (MOVDconst [int64(int16(c))])
 11863  	for {
 11864  		if v_0.Op != ssaop.OpARM64MOVDconst {
 11865  			break
 11866  		}
 11867  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11868  		v.Reset(ssaop.OpARM64MOVDconst)
 11869  		v.AuxInt = ssa.Int64ToAuxInt(int64(int16(c)))
 11870  		return true
 11871  	}
 11872  	// match: (MOVHreg x)
 11873  	// cond: v.Type.Size() <= 2
 11874  	// result: x
 11875  	for {
 11876  		x := v_0
 11877  		if !(v.Type.Size() <= 2) {
 11878  			break
 11879  		}
 11880  		v.CopyOf(x)
 11881  		return true
 11882  	}
 11883  	// match: (MOVHreg <t> (ANDconst x [c]))
 11884  	// cond: uint64(c) & uint64(0xffffffffffff8000) == 0
 11885  	// result: (ANDconst <t> x [c])
 11886  	for {
 11887  		t := v.Type
 11888  		if v_0.Op != ssaop.OpARM64ANDconst {
 11889  			break
 11890  		}
 11891  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 11892  		x := v_0.Args[0]
 11893  		if !(uint64(c)&uint64(0xffffffffffff8000) == 0) {
 11894  			break
 11895  		}
 11896  		v.Reset(ssaop.OpARM64ANDconst)
 11897  		v.Type = t
 11898  		v.AuxInt = ssa.Int64ToAuxInt(c)
 11899  		v.AddArg(x)
 11900  		return true
 11901  	}
 11902  	// match: (MOVHreg (SLLconst [lc] x))
 11903  	// cond: lc < 16
 11904  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 16-lc)] x)
 11905  	for {
 11906  		if v_0.Op != ssaop.OpARM64SLLconst {
 11907  			break
 11908  		}
 11909  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 11910  		x := v_0.Args[0]
 11911  		if !(lc < 16) {
 11912  			break
 11913  		}
 11914  		v.Reset(ssaop.OpARM64SBFIZ)
 11915  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 16-lc))
 11916  		v.AddArg(x)
 11917  		return true
 11918  	}
 11919  	// match: (MOVHreg (SBFX [bfc] x))
 11920  	// cond: bfc.Width() <= 16
 11921  	// result: (SBFX [bfc] x)
 11922  	for {
 11923  		if v_0.Op != ssaop.OpARM64SBFX {
 11924  			break
 11925  		}
 11926  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 11927  		x := v_0.Args[0]
 11928  		if !(bfc.Width() <= 16) {
 11929  			break
 11930  		}
 11931  		v.Reset(ssaop.OpARM64SBFX)
 11932  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 11933  		v.AddArg(x)
 11934  		return true
 11935  	}
 11936  	return false
 11937  }
 11938  func rewriteValue_OpARM64MOVHstore(v *ssa.Value) bool {
 11939  	v_2 := v.Args[2]
 11940  	v_1 := v.Args[1]
 11941  	v_0 := v.Args[0]
 11942  	b := v.Block
 11943  	config := b.Func.Config
 11944  	// match: (MOVHstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 11945  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 11946  	// result: (MOVHstore [off1+int32(off2)] {sym} ptr val mem)
 11947  	for {
 11948  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 11949  		sym := ssa.AuxToSym(v.Aux)
 11950  		if v_0.Op != ssaop.OpARM64ADDconst {
 11951  			break
 11952  		}
 11953  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 11954  		ptr := v_0.Args[0]
 11955  		val := v_1
 11956  		mem := v_2
 11957  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 11958  			break
 11959  		}
 11960  		v.Reset(ssaop.OpARM64MOVHstore)
 11961  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 11962  		v.Aux = ssa.SymToAux(sym)
 11963  		v.AddArg3(ptr, val, mem)
 11964  		return true
 11965  	}
 11966  	// match: (MOVHstore [off] {sym} (ADD ptr idx) val mem)
 11967  	// cond: off == 0 && sym == nil
 11968  	// result: (MOVHstoreidx ptr idx val mem)
 11969  	for {
 11970  		off := ssa.AuxIntToInt32(v.AuxInt)
 11971  		sym := ssa.AuxToSym(v.Aux)
 11972  		if v_0.Op != ssaop.OpARM64ADD {
 11973  			break
 11974  		}
 11975  		idx := v_0.Args[1]
 11976  		ptr := v_0.Args[0]
 11977  		val := v_1
 11978  		mem := v_2
 11979  		if !(off == 0 && sym == nil) {
 11980  			break
 11981  		}
 11982  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 11983  		v.AddArg4(ptr, idx, val, mem)
 11984  		return true
 11985  	}
 11986  	// match: (MOVHstore [off] {sym} (ADDshiftLL [1] ptr idx) val mem)
 11987  	// cond: off == 0 && sym == nil
 11988  	// result: (MOVHstoreidx2 ptr idx val mem)
 11989  	for {
 11990  		off := ssa.AuxIntToInt32(v.AuxInt)
 11991  		sym := ssa.AuxToSym(v.Aux)
 11992  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 11993  			break
 11994  		}
 11995  		idx := v_0.Args[1]
 11996  		ptr := v_0.Args[0]
 11997  		val := v_1
 11998  		mem := v_2
 11999  		if !(off == 0 && sym == nil) {
 12000  			break
 12001  		}
 12002  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12003  		v.AddArg4(ptr, idx, val, mem)
 12004  		return true
 12005  	}
 12006  	// match: (MOVHstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 12007  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12008  	// result: (MOVHstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 12009  	for {
 12010  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12011  		sym1 := ssa.AuxToSym(v.Aux)
 12012  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12013  			break
 12014  		}
 12015  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12016  		sym2 := ssa.AuxToSym(v_0.Aux)
 12017  		ptr := v_0.Args[0]
 12018  		val := v_1
 12019  		mem := v_2
 12020  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12021  			break
 12022  		}
 12023  		v.Reset(ssaop.OpARM64MOVHstore)
 12024  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12025  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12026  		v.AddArg3(ptr, val, mem)
 12027  		return true
 12028  	}
 12029  	// match: (MOVHstore [off] {sym} ptr (MOVHreg x) mem)
 12030  	// result: (MOVHstore [off] {sym} ptr x mem)
 12031  	for {
 12032  		off := ssa.AuxIntToInt32(v.AuxInt)
 12033  		sym := ssa.AuxToSym(v.Aux)
 12034  		ptr := v_0
 12035  		if v_1.Op != ssaop.OpARM64MOVHreg {
 12036  			break
 12037  		}
 12038  		x := v_1.Args[0]
 12039  		mem := v_2
 12040  		v.Reset(ssaop.OpARM64MOVHstore)
 12041  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12042  		v.Aux = ssa.SymToAux(sym)
 12043  		v.AddArg3(ptr, x, mem)
 12044  		return true
 12045  	}
 12046  	// match: (MOVHstore [off] {sym} ptr (MOVHUreg x) mem)
 12047  	// result: (MOVHstore [off] {sym} ptr x mem)
 12048  	for {
 12049  		off := ssa.AuxIntToInt32(v.AuxInt)
 12050  		sym := ssa.AuxToSym(v.Aux)
 12051  		ptr := v_0
 12052  		if v_1.Op != ssaop.OpARM64MOVHUreg {
 12053  			break
 12054  		}
 12055  		x := v_1.Args[0]
 12056  		mem := v_2
 12057  		v.Reset(ssaop.OpARM64MOVHstore)
 12058  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12059  		v.Aux = ssa.SymToAux(sym)
 12060  		v.AddArg3(ptr, x, mem)
 12061  		return true
 12062  	}
 12063  	// match: (MOVHstore [off] {sym} ptr (MOVWreg x) mem)
 12064  	// result: (MOVHstore [off] {sym} ptr x mem)
 12065  	for {
 12066  		off := ssa.AuxIntToInt32(v.AuxInt)
 12067  		sym := ssa.AuxToSym(v.Aux)
 12068  		ptr := v_0
 12069  		if v_1.Op != ssaop.OpARM64MOVWreg {
 12070  			break
 12071  		}
 12072  		x := v_1.Args[0]
 12073  		mem := v_2
 12074  		v.Reset(ssaop.OpARM64MOVHstore)
 12075  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12076  		v.Aux = ssa.SymToAux(sym)
 12077  		v.AddArg3(ptr, x, mem)
 12078  		return true
 12079  	}
 12080  	// match: (MOVHstore [off] {sym} ptr (MOVWUreg x) mem)
 12081  	// result: (MOVHstore [off] {sym} ptr x mem)
 12082  	for {
 12083  		off := ssa.AuxIntToInt32(v.AuxInt)
 12084  		sym := ssa.AuxToSym(v.Aux)
 12085  		ptr := v_0
 12086  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 12087  			break
 12088  		}
 12089  		x := v_1.Args[0]
 12090  		mem := v_2
 12091  		v.Reset(ssaop.OpARM64MOVHstore)
 12092  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12093  		v.Aux = ssa.SymToAux(sym)
 12094  		v.AddArg3(ptr, x, mem)
 12095  		return true
 12096  	}
 12097  	return false
 12098  }
 12099  func rewriteValue_OpARM64MOVHstoreidx(v *ssa.Value) bool {
 12100  	v_3 := v.Args[3]
 12101  	v_2 := v.Args[2]
 12102  	v_1 := v.Args[1]
 12103  	v_0 := v.Args[0]
 12104  	// match: (MOVHstoreidx ptr (MOVDconst [c]) val mem)
 12105  	// cond: ssa.Is32Bit(c)
 12106  	// result: (MOVHstore [int32(c)] ptr val mem)
 12107  	for {
 12108  		ptr := v_0
 12109  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12110  			break
 12111  		}
 12112  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12113  		val := v_2
 12114  		mem := v_3
 12115  		if !(ssa.Is32Bit(c)) {
 12116  			break
 12117  		}
 12118  		v.Reset(ssaop.OpARM64MOVHstore)
 12119  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12120  		v.AddArg3(ptr, val, mem)
 12121  		return true
 12122  	}
 12123  	// match: (MOVHstoreidx (MOVDconst [c]) idx val mem)
 12124  	// cond: ssa.Is32Bit(c)
 12125  	// result: (MOVHstore [int32(c)] idx val mem)
 12126  	for {
 12127  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12128  			break
 12129  		}
 12130  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12131  		idx := v_1
 12132  		val := v_2
 12133  		mem := v_3
 12134  		if !(ssa.Is32Bit(c)) {
 12135  			break
 12136  		}
 12137  		v.Reset(ssaop.OpARM64MOVHstore)
 12138  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12139  		v.AddArg3(idx, val, mem)
 12140  		return true
 12141  	}
 12142  	// match: (MOVHstoreidx ptr (SLLconst [1] idx) val mem)
 12143  	// result: (MOVHstoreidx2 ptr idx val mem)
 12144  	for {
 12145  		ptr := v_0
 12146  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 12147  			break
 12148  		}
 12149  		idx := v_1.Args[0]
 12150  		val := v_2
 12151  		mem := v_3
 12152  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12153  		v.AddArg4(ptr, idx, val, mem)
 12154  		return true
 12155  	}
 12156  	// match: (MOVHstoreidx ptr (ADD idx idx) val mem)
 12157  	// result: (MOVHstoreidx2 ptr idx val mem)
 12158  	for {
 12159  		ptr := v_0
 12160  		if v_1.Op != ssaop.OpARM64ADD {
 12161  			break
 12162  		}
 12163  		idx := v_1.Args[1]
 12164  		if idx != v_1.Args[0] {
 12165  			break
 12166  		}
 12167  		val := v_2
 12168  		mem := v_3
 12169  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12170  		v.AddArg4(ptr, idx, val, mem)
 12171  		return true
 12172  	}
 12173  	// match: (MOVHstoreidx (SLLconst [1] idx) ptr val mem)
 12174  	// result: (MOVHstoreidx2 ptr idx val mem)
 12175  	for {
 12176  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 12177  			break
 12178  		}
 12179  		idx := v_0.Args[0]
 12180  		ptr := v_1
 12181  		val := v_2
 12182  		mem := v_3
 12183  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12184  		v.AddArg4(ptr, idx, val, mem)
 12185  		return true
 12186  	}
 12187  	// match: (MOVHstoreidx (ADD idx idx) ptr val mem)
 12188  	// result: (MOVHstoreidx2 ptr idx val mem)
 12189  	for {
 12190  		if v_0.Op != ssaop.OpARM64ADD {
 12191  			break
 12192  		}
 12193  		idx := v_0.Args[1]
 12194  		if idx != v_0.Args[0] {
 12195  			break
 12196  		}
 12197  		ptr := v_1
 12198  		val := v_2
 12199  		mem := v_3
 12200  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12201  		v.AddArg4(ptr, idx, val, mem)
 12202  		return true
 12203  	}
 12204  	// match: (MOVHstoreidx ptr idx (MOVHreg x) mem)
 12205  	// result: (MOVHstoreidx ptr idx x mem)
 12206  	for {
 12207  		ptr := v_0
 12208  		idx := v_1
 12209  		if v_2.Op != ssaop.OpARM64MOVHreg {
 12210  			break
 12211  		}
 12212  		x := v_2.Args[0]
 12213  		mem := v_3
 12214  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12215  		v.AddArg4(ptr, idx, x, mem)
 12216  		return true
 12217  	}
 12218  	// match: (MOVHstoreidx ptr idx (MOVHUreg x) mem)
 12219  	// result: (MOVHstoreidx ptr idx x mem)
 12220  	for {
 12221  		ptr := v_0
 12222  		idx := v_1
 12223  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 12224  			break
 12225  		}
 12226  		x := v_2.Args[0]
 12227  		mem := v_3
 12228  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12229  		v.AddArg4(ptr, idx, x, mem)
 12230  		return true
 12231  	}
 12232  	// match: (MOVHstoreidx ptr idx (MOVWreg x) mem)
 12233  	// result: (MOVHstoreidx ptr idx x mem)
 12234  	for {
 12235  		ptr := v_0
 12236  		idx := v_1
 12237  		if v_2.Op != ssaop.OpARM64MOVWreg {
 12238  			break
 12239  		}
 12240  		x := v_2.Args[0]
 12241  		mem := v_3
 12242  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12243  		v.AddArg4(ptr, idx, x, mem)
 12244  		return true
 12245  	}
 12246  	// match: (MOVHstoreidx ptr idx (MOVWUreg x) mem)
 12247  	// result: (MOVHstoreidx ptr idx x mem)
 12248  	for {
 12249  		ptr := v_0
 12250  		idx := v_1
 12251  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 12252  			break
 12253  		}
 12254  		x := v_2.Args[0]
 12255  		mem := v_3
 12256  		v.Reset(ssaop.OpARM64MOVHstoreidx)
 12257  		v.AddArg4(ptr, idx, x, mem)
 12258  		return true
 12259  	}
 12260  	return false
 12261  }
 12262  func rewriteValue_OpARM64MOVHstoreidx2(v *ssa.Value) bool {
 12263  	v_3 := v.Args[3]
 12264  	v_2 := v.Args[2]
 12265  	v_1 := v.Args[1]
 12266  	v_0 := v.Args[0]
 12267  	// match: (MOVHstoreidx2 ptr (MOVDconst [c]) val mem)
 12268  	// cond: ssa.Is32Bit(c<<1)
 12269  	// result: (MOVHstore [int32(c)<<1] ptr val mem)
 12270  	for {
 12271  		ptr := v_0
 12272  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12273  			break
 12274  		}
 12275  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12276  		val := v_2
 12277  		mem := v_3
 12278  		if !(ssa.Is32Bit(c << 1)) {
 12279  			break
 12280  		}
 12281  		v.Reset(ssaop.OpARM64MOVHstore)
 12282  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 1)
 12283  		v.AddArg3(ptr, val, mem)
 12284  		return true
 12285  	}
 12286  	// match: (MOVHstoreidx2 ptr idx (MOVHreg x) mem)
 12287  	// result: (MOVHstoreidx2 ptr idx x mem)
 12288  	for {
 12289  		ptr := v_0
 12290  		idx := v_1
 12291  		if v_2.Op != ssaop.OpARM64MOVHreg {
 12292  			break
 12293  		}
 12294  		x := v_2.Args[0]
 12295  		mem := v_3
 12296  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12297  		v.AddArg4(ptr, idx, x, mem)
 12298  		return true
 12299  	}
 12300  	// match: (MOVHstoreidx2 ptr idx (MOVHUreg x) mem)
 12301  	// result: (MOVHstoreidx2 ptr idx x mem)
 12302  	for {
 12303  		ptr := v_0
 12304  		idx := v_1
 12305  		if v_2.Op != ssaop.OpARM64MOVHUreg {
 12306  			break
 12307  		}
 12308  		x := v_2.Args[0]
 12309  		mem := v_3
 12310  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12311  		v.AddArg4(ptr, idx, x, mem)
 12312  		return true
 12313  	}
 12314  	// match: (MOVHstoreidx2 ptr idx (MOVWreg x) mem)
 12315  	// result: (MOVHstoreidx2 ptr idx x mem)
 12316  	for {
 12317  		ptr := v_0
 12318  		idx := v_1
 12319  		if v_2.Op != ssaop.OpARM64MOVWreg {
 12320  			break
 12321  		}
 12322  		x := v_2.Args[0]
 12323  		mem := v_3
 12324  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12325  		v.AddArg4(ptr, idx, x, mem)
 12326  		return true
 12327  	}
 12328  	// match: (MOVHstoreidx2 ptr idx (MOVWUreg x) mem)
 12329  	// result: (MOVHstoreidx2 ptr idx x mem)
 12330  	for {
 12331  		ptr := v_0
 12332  		idx := v_1
 12333  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 12334  			break
 12335  		}
 12336  		x := v_2.Args[0]
 12337  		mem := v_3
 12338  		v.Reset(ssaop.OpARM64MOVHstoreidx2)
 12339  		v.AddArg4(ptr, idx, x, mem)
 12340  		return true
 12341  	}
 12342  	return false
 12343  }
 12344  func rewriteValue_OpARM64MOVWUload(v *ssa.Value) bool {
 12345  	v_1 := v.Args[1]
 12346  	v_0 := v.Args[0]
 12347  	b := v.Block
 12348  	config := b.Func.Config
 12349  	// match: (MOVWUload [off] {sym} ptr (FMOVSstore [off] {sym} ptr val _))
 12350  	// result: (FMOVSfpgp val)
 12351  	for {
 12352  		off := ssa.AuxIntToInt32(v.AuxInt)
 12353  		sym := ssa.AuxToSym(v.Aux)
 12354  		ptr := v_0
 12355  		if v_1.Op != ssaop.OpARM64FMOVSstore || ssa.AuxIntToInt32(v_1.AuxInt) != off || ssa.AuxToSym(v_1.Aux) != sym {
 12356  			break
 12357  		}
 12358  		val := v_1.Args[1]
 12359  		if ptr != v_1.Args[0] {
 12360  			break
 12361  		}
 12362  		v.Reset(ssaop.OpARM64FMOVSfpgp)
 12363  		v.AddArg(val)
 12364  		return true
 12365  	}
 12366  	// match: (MOVWUload [off1] {sym} (ADDconst [off2] ptr) mem)
 12367  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12368  	// result: (MOVWUload [off1+int32(off2)] {sym} ptr mem)
 12369  	for {
 12370  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12371  		sym := ssa.AuxToSym(v.Aux)
 12372  		if v_0.Op != ssaop.OpARM64ADDconst {
 12373  			break
 12374  		}
 12375  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12376  		ptr := v_0.Args[0]
 12377  		mem := v_1
 12378  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12379  			break
 12380  		}
 12381  		v.Reset(ssaop.OpARM64MOVWUload)
 12382  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12383  		v.Aux = ssa.SymToAux(sym)
 12384  		v.AddArg2(ptr, mem)
 12385  		return true
 12386  	}
 12387  	// match: (MOVWUload [off] {sym} (ADD ptr idx) mem)
 12388  	// cond: off == 0 && sym == nil
 12389  	// result: (MOVWUloadidx ptr idx mem)
 12390  	for {
 12391  		off := ssa.AuxIntToInt32(v.AuxInt)
 12392  		sym := ssa.AuxToSym(v.Aux)
 12393  		if v_0.Op != ssaop.OpARM64ADD {
 12394  			break
 12395  		}
 12396  		idx := v_0.Args[1]
 12397  		ptr := v_0.Args[0]
 12398  		mem := v_1
 12399  		if !(off == 0 && sym == nil) {
 12400  			break
 12401  		}
 12402  		v.Reset(ssaop.OpARM64MOVWUloadidx)
 12403  		v.AddArg3(ptr, idx, mem)
 12404  		return true
 12405  	}
 12406  	// match: (MOVWUload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 12407  	// cond: off == 0 && sym == nil
 12408  	// result: (MOVWUloadidx4 ptr idx mem)
 12409  	for {
 12410  		off := ssa.AuxIntToInt32(v.AuxInt)
 12411  		sym := ssa.AuxToSym(v.Aux)
 12412  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12413  			break
 12414  		}
 12415  		idx := v_0.Args[1]
 12416  		ptr := v_0.Args[0]
 12417  		mem := v_1
 12418  		if !(off == 0 && sym == nil) {
 12419  			break
 12420  		}
 12421  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 12422  		v.AddArg3(ptr, idx, mem)
 12423  		return true
 12424  	}
 12425  	// match: (MOVWUload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 12426  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12427  	// result: (MOVWUload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 12428  	for {
 12429  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12430  		sym1 := ssa.AuxToSym(v.Aux)
 12431  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12432  			break
 12433  		}
 12434  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12435  		sym2 := ssa.AuxToSym(v_0.Aux)
 12436  		ptr := v_0.Args[0]
 12437  		mem := v_1
 12438  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12439  			break
 12440  		}
 12441  		v.Reset(ssaop.OpARM64MOVWUload)
 12442  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12443  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12444  		v.AddArg2(ptr, mem)
 12445  		return true
 12446  	}
 12447  	// match: (MOVWUload [off] {sym} (SB) _)
 12448  	// cond: ssa.SymIsRO(sym)
 12449  	// result: (MOVDconst [int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))])
 12450  	for {
 12451  		off := ssa.AuxIntToInt32(v.AuxInt)
 12452  		sym := ssa.AuxToSym(v.Aux)
 12453  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 12454  			break
 12455  		}
 12456  		v.Reset(ssaop.OpARM64MOVDconst)
 12457  		v.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))
 12458  		return true
 12459  	}
 12460  	return false
 12461  }
 12462  func rewriteValue_OpARM64MOVWUloadidx(v *ssa.Value) bool {
 12463  	v_2 := v.Args[2]
 12464  	v_1 := v.Args[1]
 12465  	v_0 := v.Args[0]
 12466  	// match: (MOVWUloadidx ptr (MOVDconst [c]) mem)
 12467  	// cond: ssa.Is32Bit(c)
 12468  	// result: (MOVWUload [int32(c)] ptr mem)
 12469  	for {
 12470  		ptr := v_0
 12471  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12472  			break
 12473  		}
 12474  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12475  		mem := v_2
 12476  		if !(ssa.Is32Bit(c)) {
 12477  			break
 12478  		}
 12479  		v.Reset(ssaop.OpARM64MOVWUload)
 12480  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12481  		v.AddArg2(ptr, mem)
 12482  		return true
 12483  	}
 12484  	// match: (MOVWUloadidx (MOVDconst [c]) ptr mem)
 12485  	// cond: ssa.Is32Bit(c)
 12486  	// result: (MOVWUload [int32(c)] ptr mem)
 12487  	for {
 12488  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12489  			break
 12490  		}
 12491  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12492  		ptr := v_1
 12493  		mem := v_2
 12494  		if !(ssa.Is32Bit(c)) {
 12495  			break
 12496  		}
 12497  		v.Reset(ssaop.OpARM64MOVWUload)
 12498  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12499  		v.AddArg2(ptr, mem)
 12500  		return true
 12501  	}
 12502  	// match: (MOVWUloadidx ptr (SLLconst [2] idx) mem)
 12503  	// result: (MOVWUloadidx4 ptr idx mem)
 12504  	for {
 12505  		ptr := v_0
 12506  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 12507  			break
 12508  		}
 12509  		idx := v_1.Args[0]
 12510  		mem := v_2
 12511  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 12512  		v.AddArg3(ptr, idx, mem)
 12513  		return true
 12514  	}
 12515  	// match: (MOVWUloadidx (SLLconst [2] idx) ptr mem)
 12516  	// result: (MOVWUloadidx4 ptr idx mem)
 12517  	for {
 12518  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12519  			break
 12520  		}
 12521  		idx := v_0.Args[0]
 12522  		ptr := v_1
 12523  		mem := v_2
 12524  		v.Reset(ssaop.OpARM64MOVWUloadidx4)
 12525  		v.AddArg3(ptr, idx, mem)
 12526  		return true
 12527  	}
 12528  	return false
 12529  }
 12530  func rewriteValue_OpARM64MOVWUloadidx4(v *ssa.Value) bool {
 12531  	v_2 := v.Args[2]
 12532  	v_1 := v.Args[1]
 12533  	v_0 := v.Args[0]
 12534  	// match: (MOVWUloadidx4 ptr (MOVDconst [c]) mem)
 12535  	// cond: ssa.Is32Bit(c<<2)
 12536  	// result: (MOVWUload [int32(c)<<2] ptr mem)
 12537  	for {
 12538  		ptr := v_0
 12539  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12540  			break
 12541  		}
 12542  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12543  		mem := v_2
 12544  		if !(ssa.Is32Bit(c << 2)) {
 12545  			break
 12546  		}
 12547  		v.Reset(ssaop.OpARM64MOVWUload)
 12548  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 12549  		v.AddArg2(ptr, mem)
 12550  		return true
 12551  	}
 12552  	return false
 12553  }
 12554  func rewriteValue_OpARM64MOVWUreg(v *ssa.Value) bool {
 12555  	v_0 := v.Args[0]
 12556  	// match: (MOVWUreg (ANDconst [c] x))
 12557  	// result: (ANDconst [c&(1<<32-1)] x)
 12558  	for {
 12559  		if v_0.Op != ssaop.OpARM64ANDconst {
 12560  			break
 12561  		}
 12562  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12563  		x := v_0.Args[0]
 12564  		v.Reset(ssaop.OpARM64ANDconst)
 12565  		v.AuxInt = ssa.Int64ToAuxInt(c & (1<<32 - 1))
 12566  		v.AddArg(x)
 12567  		return true
 12568  	}
 12569  	// match: (MOVWUreg (MOVDconst [c]))
 12570  	// result: (MOVDconst [int64(uint32(c))])
 12571  	for {
 12572  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12573  			break
 12574  		}
 12575  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12576  		v.Reset(ssaop.OpARM64MOVDconst)
 12577  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c)))
 12578  		return true
 12579  	}
 12580  	// match: (MOVWUreg x)
 12581  	// cond: v.Type.Size() <= 4
 12582  	// result: x
 12583  	for {
 12584  		x := v_0
 12585  		if !(v.Type.Size() <= 4) {
 12586  			break
 12587  		}
 12588  		v.CopyOf(x)
 12589  		return true
 12590  	}
 12591  	// match: (MOVWUreg (SLLconst [lc] x))
 12592  	// cond: lc >= 32
 12593  	// result: (MOVDconst [0])
 12594  	for {
 12595  		if v_0.Op != ssaop.OpARM64SLLconst {
 12596  			break
 12597  		}
 12598  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12599  		if !(lc >= 32) {
 12600  			break
 12601  		}
 12602  		v.Reset(ssaop.OpARM64MOVDconst)
 12603  		v.AuxInt = ssa.Int64ToAuxInt(0)
 12604  		return true
 12605  	}
 12606  	// match: (MOVWUreg (SLLconst [lc] x))
 12607  	// cond: lc < 32
 12608  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, 32-lc)] x)
 12609  	for {
 12610  		if v_0.Op != ssaop.OpARM64SLLconst {
 12611  			break
 12612  		}
 12613  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12614  		x := v_0.Args[0]
 12615  		if !(lc < 32) {
 12616  			break
 12617  		}
 12618  		v.Reset(ssaop.OpARM64UBFIZ)
 12619  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 32-lc))
 12620  		v.AddArg(x)
 12621  		return true
 12622  	}
 12623  	// match: (MOVWUreg (SRLconst [rc] x))
 12624  	// cond: rc < 32
 12625  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 32)] x)
 12626  	for {
 12627  		if v_0.Op != ssaop.OpARM64SRLconst {
 12628  			break
 12629  		}
 12630  		rc := ssa.AuxIntToInt64(v_0.AuxInt)
 12631  		x := v_0.Args[0]
 12632  		if !(rc < 32) {
 12633  			break
 12634  		}
 12635  		v.Reset(ssaop.OpARM64UBFX)
 12636  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32))
 12637  		v.AddArg(x)
 12638  		return true
 12639  	}
 12640  	// match: (MOVWUreg (UBFX [bfc] x))
 12641  	// cond: bfc.Width() <= 32
 12642  	// result: (UBFX [bfc] x)
 12643  	for {
 12644  		if v_0.Op != ssaop.OpARM64UBFX {
 12645  			break
 12646  		}
 12647  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 12648  		x := v_0.Args[0]
 12649  		if !(bfc.Width() <= 32) {
 12650  			break
 12651  		}
 12652  		v.Reset(ssaop.OpARM64UBFX)
 12653  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 12654  		v.AddArg(x)
 12655  		return true
 12656  	}
 12657  	return false
 12658  }
 12659  func rewriteValue_OpARM64MOVWload(v *ssa.Value) bool {
 12660  	v_1 := v.Args[1]
 12661  	v_0 := v.Args[0]
 12662  	b := v.Block
 12663  	config := b.Func.Config
 12664  	// match: (MOVWload [off1] {sym} (ADDconst [off2] ptr) mem)
 12665  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12666  	// result: (MOVWload [off1+int32(off2)] {sym} ptr mem)
 12667  	for {
 12668  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12669  		sym := ssa.AuxToSym(v.Aux)
 12670  		if v_0.Op != ssaop.OpARM64ADDconst {
 12671  			break
 12672  		}
 12673  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12674  		ptr := v_0.Args[0]
 12675  		mem := v_1
 12676  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12677  			break
 12678  		}
 12679  		v.Reset(ssaop.OpARM64MOVWload)
 12680  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12681  		v.Aux = ssa.SymToAux(sym)
 12682  		v.AddArg2(ptr, mem)
 12683  		return true
 12684  	}
 12685  	// match: (MOVWload [off] {sym} (ADD ptr idx) mem)
 12686  	// cond: off == 0 && sym == nil
 12687  	// result: (MOVWloadidx ptr idx mem)
 12688  	for {
 12689  		off := ssa.AuxIntToInt32(v.AuxInt)
 12690  		sym := ssa.AuxToSym(v.Aux)
 12691  		if v_0.Op != ssaop.OpARM64ADD {
 12692  			break
 12693  		}
 12694  		idx := v_0.Args[1]
 12695  		ptr := v_0.Args[0]
 12696  		mem := v_1
 12697  		if !(off == 0 && sym == nil) {
 12698  			break
 12699  		}
 12700  		v.Reset(ssaop.OpARM64MOVWloadidx)
 12701  		v.AddArg3(ptr, idx, mem)
 12702  		return true
 12703  	}
 12704  	// match: (MOVWload [off] {sym} (ADDshiftLL [2] ptr idx) mem)
 12705  	// cond: off == 0 && sym == nil
 12706  	// result: (MOVWloadidx4 ptr idx mem)
 12707  	for {
 12708  		off := ssa.AuxIntToInt32(v.AuxInt)
 12709  		sym := ssa.AuxToSym(v.Aux)
 12710  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12711  			break
 12712  		}
 12713  		idx := v_0.Args[1]
 12714  		ptr := v_0.Args[0]
 12715  		mem := v_1
 12716  		if !(off == 0 && sym == nil) {
 12717  			break
 12718  		}
 12719  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 12720  		v.AddArg3(ptr, idx, mem)
 12721  		return true
 12722  	}
 12723  	// match: (MOVWload [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) mem)
 12724  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12725  	// result: (MOVWload [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr mem)
 12726  	for {
 12727  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12728  		sym1 := ssa.AuxToSym(v.Aux)
 12729  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 12730  			break
 12731  		}
 12732  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 12733  		sym2 := ssa.AuxToSym(v_0.Aux)
 12734  		ptr := v_0.Args[0]
 12735  		mem := v_1
 12736  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12737  			break
 12738  		}
 12739  		v.Reset(ssaop.OpARM64MOVWload)
 12740  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 12741  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 12742  		v.AddArg2(ptr, mem)
 12743  		return true
 12744  	}
 12745  	// match: (MOVWload [off] {sym} (SB) _)
 12746  	// cond: ssa.SymIsRO(sym)
 12747  	// result: (MOVDconst [int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder)))])
 12748  	for {
 12749  		off := ssa.AuxIntToInt32(v.AuxInt)
 12750  		sym := ssa.AuxToSym(v.Aux)
 12751  		if v_0.Op != ssaop.OpSB || !(ssa.SymIsRO(sym)) {
 12752  			break
 12753  		}
 12754  		v.Reset(ssaop.OpARM64MOVDconst)
 12755  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(ssa.Read32(sym, int64(off), config.Ctxt.Arch.ByteOrder))))
 12756  		return true
 12757  	}
 12758  	return false
 12759  }
 12760  func rewriteValue_OpARM64MOVWloadidx(v *ssa.Value) bool {
 12761  	v_2 := v.Args[2]
 12762  	v_1 := v.Args[1]
 12763  	v_0 := v.Args[0]
 12764  	// match: (MOVWloadidx ptr (MOVDconst [c]) mem)
 12765  	// cond: ssa.Is32Bit(c)
 12766  	// result: (MOVWload [int32(c)] ptr mem)
 12767  	for {
 12768  		ptr := v_0
 12769  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12770  			break
 12771  		}
 12772  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12773  		mem := v_2
 12774  		if !(ssa.Is32Bit(c)) {
 12775  			break
 12776  		}
 12777  		v.Reset(ssaop.OpARM64MOVWload)
 12778  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12779  		v.AddArg2(ptr, mem)
 12780  		return true
 12781  	}
 12782  	// match: (MOVWloadidx (MOVDconst [c]) ptr mem)
 12783  	// cond: ssa.Is32Bit(c)
 12784  	// result: (MOVWload [int32(c)] ptr mem)
 12785  	for {
 12786  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12787  			break
 12788  		}
 12789  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12790  		ptr := v_1
 12791  		mem := v_2
 12792  		if !(ssa.Is32Bit(c)) {
 12793  			break
 12794  		}
 12795  		v.Reset(ssaop.OpARM64MOVWload)
 12796  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 12797  		v.AddArg2(ptr, mem)
 12798  		return true
 12799  	}
 12800  	// match: (MOVWloadidx ptr (SLLconst [2] idx) mem)
 12801  	// result: (MOVWloadidx4 ptr idx mem)
 12802  	for {
 12803  		ptr := v_0
 12804  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 12805  			break
 12806  		}
 12807  		idx := v_1.Args[0]
 12808  		mem := v_2
 12809  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 12810  		v.AddArg3(ptr, idx, mem)
 12811  		return true
 12812  	}
 12813  	// match: (MOVWloadidx (SLLconst [2] idx) ptr mem)
 12814  	// result: (MOVWloadidx4 ptr idx mem)
 12815  	for {
 12816  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 12817  			break
 12818  		}
 12819  		idx := v_0.Args[0]
 12820  		ptr := v_1
 12821  		mem := v_2
 12822  		v.Reset(ssaop.OpARM64MOVWloadidx4)
 12823  		v.AddArg3(ptr, idx, mem)
 12824  		return true
 12825  	}
 12826  	return false
 12827  }
 12828  func rewriteValue_OpARM64MOVWloadidx4(v *ssa.Value) bool {
 12829  	v_2 := v.Args[2]
 12830  	v_1 := v.Args[1]
 12831  	v_0 := v.Args[0]
 12832  	// match: (MOVWloadidx4 ptr (MOVDconst [c]) mem)
 12833  	// cond: ssa.Is32Bit(c<<2)
 12834  	// result: (MOVWload [int32(c)<<2] ptr mem)
 12835  	for {
 12836  		ptr := v_0
 12837  		if v_1.Op != ssaop.OpARM64MOVDconst {
 12838  			break
 12839  		}
 12840  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 12841  		mem := v_2
 12842  		if !(ssa.Is32Bit(c << 2)) {
 12843  			break
 12844  		}
 12845  		v.Reset(ssaop.OpARM64MOVWload)
 12846  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 12847  		v.AddArg2(ptr, mem)
 12848  		return true
 12849  	}
 12850  	return false
 12851  }
 12852  func rewriteValue_OpARM64MOVWreg(v *ssa.Value) bool {
 12853  	v_0 := v.Args[0]
 12854  	// match: (MOVWreg (MOVDconst [c]))
 12855  	// result: (MOVDconst [int64(int32(c))])
 12856  	for {
 12857  		if v_0.Op != ssaop.OpARM64MOVDconst {
 12858  			break
 12859  		}
 12860  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12861  		v.Reset(ssaop.OpARM64MOVDconst)
 12862  		v.AuxInt = ssa.Int64ToAuxInt(int64(int32(c)))
 12863  		return true
 12864  	}
 12865  	// match: (MOVWreg x)
 12866  	// cond: v.Type.Size() <= 4
 12867  	// result: x
 12868  	for {
 12869  		x := v_0
 12870  		if !(v.Type.Size() <= 4) {
 12871  			break
 12872  		}
 12873  		v.CopyOf(x)
 12874  		return true
 12875  	}
 12876  	// match: (MOVWreg <t> (ANDconst x [c]))
 12877  	// cond: uint64(c) & uint64(0xffffffff80000000) == 0
 12878  	// result: (ANDconst <t> x [c])
 12879  	for {
 12880  		t := v.Type
 12881  		if v_0.Op != ssaop.OpARM64ANDconst {
 12882  			break
 12883  		}
 12884  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 12885  		x := v_0.Args[0]
 12886  		if !(uint64(c)&uint64(0xffffffff80000000) == 0) {
 12887  			break
 12888  		}
 12889  		v.Reset(ssaop.OpARM64ANDconst)
 12890  		v.Type = t
 12891  		v.AuxInt = ssa.Int64ToAuxInt(c)
 12892  		v.AddArg(x)
 12893  		return true
 12894  	}
 12895  	// match: (MOVWreg (SLLconst [lc] x))
 12896  	// cond: lc < 32
 12897  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, 32-lc)] x)
 12898  	for {
 12899  		if v_0.Op != ssaop.OpARM64SLLconst {
 12900  			break
 12901  		}
 12902  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 12903  		x := v_0.Args[0]
 12904  		if !(lc < 32) {
 12905  			break
 12906  		}
 12907  		v.Reset(ssaop.OpARM64SBFIZ)
 12908  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, 32-lc))
 12909  		v.AddArg(x)
 12910  		return true
 12911  	}
 12912  	// match: (MOVWreg (SBFX [bfc] x))
 12913  	// cond: bfc.Width() <= 32
 12914  	// result: (SBFX [bfc] x)
 12915  	for {
 12916  		if v_0.Op != ssaop.OpARM64SBFX {
 12917  			break
 12918  		}
 12919  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 12920  		x := v_0.Args[0]
 12921  		if !(bfc.Width() <= 32) {
 12922  			break
 12923  		}
 12924  		v.Reset(ssaop.OpARM64SBFX)
 12925  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 12926  		v.AddArg(x)
 12927  		return true
 12928  	}
 12929  	return false
 12930  }
 12931  func rewriteValue_OpARM64MOVWstore(v *ssa.Value) bool {
 12932  	v_2 := v.Args[2]
 12933  	v_1 := v.Args[1]
 12934  	v_0 := v.Args[0]
 12935  	b := v.Block
 12936  	config := b.Func.Config
 12937  	// match: (MOVWstore [off] {sym} ptr (FMOVSfpgp val) mem)
 12938  	// result: (FMOVSstore [off] {sym} ptr val mem)
 12939  	for {
 12940  		off := ssa.AuxIntToInt32(v.AuxInt)
 12941  		sym := ssa.AuxToSym(v.Aux)
 12942  		ptr := v_0
 12943  		if v_1.Op != ssaop.OpARM64FMOVSfpgp {
 12944  			break
 12945  		}
 12946  		val := v_1.Args[0]
 12947  		mem := v_2
 12948  		v.Reset(ssaop.OpARM64FMOVSstore)
 12949  		v.AuxInt = ssa.Int32ToAuxInt(off)
 12950  		v.Aux = ssa.SymToAux(sym)
 12951  		v.AddArg3(ptr, val, mem)
 12952  		return true
 12953  	}
 12954  	// match: (MOVWstore [off1] {sym} (ADDconst [off2] ptr) val mem)
 12955  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 12956  	// result: (MOVWstore [off1+int32(off2)] {sym} ptr val mem)
 12957  	for {
 12958  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 12959  		sym := ssa.AuxToSym(v.Aux)
 12960  		if v_0.Op != ssaop.OpARM64ADDconst {
 12961  			break
 12962  		}
 12963  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 12964  		ptr := v_0.Args[0]
 12965  		val := v_1
 12966  		mem := v_2
 12967  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 12968  			break
 12969  		}
 12970  		v.Reset(ssaop.OpARM64MOVWstore)
 12971  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 12972  		v.Aux = ssa.SymToAux(sym)
 12973  		v.AddArg3(ptr, val, mem)
 12974  		return true
 12975  	}
 12976  	// match: (MOVWstore [off] {sym} (ADD ptr idx) val mem)
 12977  	// cond: off == 0 && sym == nil
 12978  	// result: (MOVWstoreidx ptr idx val mem)
 12979  	for {
 12980  		off := ssa.AuxIntToInt32(v.AuxInt)
 12981  		sym := ssa.AuxToSym(v.Aux)
 12982  		if v_0.Op != ssaop.OpARM64ADD {
 12983  			break
 12984  		}
 12985  		idx := v_0.Args[1]
 12986  		ptr := v_0.Args[0]
 12987  		val := v_1
 12988  		mem := v_2
 12989  		if !(off == 0 && sym == nil) {
 12990  			break
 12991  		}
 12992  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 12993  		v.AddArg4(ptr, idx, val, mem)
 12994  		return true
 12995  	}
 12996  	// match: (MOVWstore [off] {sym} (ADDshiftLL [2] ptr idx) val mem)
 12997  	// cond: off == 0 && sym == nil
 12998  	// result: (MOVWstoreidx4 ptr idx val mem)
 12999  	for {
 13000  		off := ssa.AuxIntToInt32(v.AuxInt)
 13001  		sym := ssa.AuxToSym(v.Aux)
 13002  		if v_0.Op != ssaop.OpARM64ADDshiftLL || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13003  			break
 13004  		}
 13005  		idx := v_0.Args[1]
 13006  		ptr := v_0.Args[0]
 13007  		val := v_1
 13008  		mem := v_2
 13009  		if !(off == 0 && sym == nil) {
 13010  			break
 13011  		}
 13012  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13013  		v.AddArg4(ptr, idx, val, mem)
 13014  		return true
 13015  	}
 13016  	// match: (MOVWstore [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val mem)
 13017  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 13018  	// result: (MOVWstore [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val mem)
 13019  	for {
 13020  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 13021  		sym1 := ssa.AuxToSym(v.Aux)
 13022  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 13023  			break
 13024  		}
 13025  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 13026  		sym2 := ssa.AuxToSym(v_0.Aux)
 13027  		ptr := v_0.Args[0]
 13028  		val := v_1
 13029  		mem := v_2
 13030  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 13031  			break
 13032  		}
 13033  		v.Reset(ssaop.OpARM64MOVWstore)
 13034  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 13035  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 13036  		v.AddArg3(ptr, val, mem)
 13037  		return true
 13038  	}
 13039  	// match: (MOVWstore [off] {sym} ptr (MOVWreg x) mem)
 13040  	// result: (MOVWstore [off] {sym} ptr x mem)
 13041  	for {
 13042  		off := ssa.AuxIntToInt32(v.AuxInt)
 13043  		sym := ssa.AuxToSym(v.Aux)
 13044  		ptr := v_0
 13045  		if v_1.Op != ssaop.OpARM64MOVWreg {
 13046  			break
 13047  		}
 13048  		x := v_1.Args[0]
 13049  		mem := v_2
 13050  		v.Reset(ssaop.OpARM64MOVWstore)
 13051  		v.AuxInt = ssa.Int32ToAuxInt(off)
 13052  		v.Aux = ssa.SymToAux(sym)
 13053  		v.AddArg3(ptr, x, mem)
 13054  		return true
 13055  	}
 13056  	// match: (MOVWstore [off] {sym} ptr (MOVWUreg x) mem)
 13057  	// result: (MOVWstore [off] {sym} ptr x mem)
 13058  	for {
 13059  		off := ssa.AuxIntToInt32(v.AuxInt)
 13060  		sym := ssa.AuxToSym(v.Aux)
 13061  		ptr := v_0
 13062  		if v_1.Op != ssaop.OpARM64MOVWUreg {
 13063  			break
 13064  		}
 13065  		x := v_1.Args[0]
 13066  		mem := v_2
 13067  		v.Reset(ssaop.OpARM64MOVWstore)
 13068  		v.AuxInt = ssa.Int32ToAuxInt(off)
 13069  		v.Aux = ssa.SymToAux(sym)
 13070  		v.AddArg3(ptr, x, mem)
 13071  		return true
 13072  	}
 13073  	return false
 13074  }
 13075  func rewriteValue_OpARM64MOVWstoreidx(v *ssa.Value) bool {
 13076  	v_3 := v.Args[3]
 13077  	v_2 := v.Args[2]
 13078  	v_1 := v.Args[1]
 13079  	v_0 := v.Args[0]
 13080  	// match: (MOVWstoreidx ptr (MOVDconst [c]) val mem)
 13081  	// cond: ssa.Is32Bit(c)
 13082  	// result: (MOVWstore [int32(c)] ptr val mem)
 13083  	for {
 13084  		ptr := v_0
 13085  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13086  			break
 13087  		}
 13088  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13089  		val := v_2
 13090  		mem := v_3
 13091  		if !(ssa.Is32Bit(c)) {
 13092  			break
 13093  		}
 13094  		v.Reset(ssaop.OpARM64MOVWstore)
 13095  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13096  		v.AddArg3(ptr, val, mem)
 13097  		return true
 13098  	}
 13099  	// match: (MOVWstoreidx (MOVDconst [c]) idx val mem)
 13100  	// cond: ssa.Is32Bit(c)
 13101  	// result: (MOVWstore [int32(c)] idx val mem)
 13102  	for {
 13103  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13104  			break
 13105  		}
 13106  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13107  		idx := v_1
 13108  		val := v_2
 13109  		mem := v_3
 13110  		if !(ssa.Is32Bit(c)) {
 13111  			break
 13112  		}
 13113  		v.Reset(ssaop.OpARM64MOVWstore)
 13114  		v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 13115  		v.AddArg3(idx, val, mem)
 13116  		return true
 13117  	}
 13118  	// match: (MOVWstoreidx ptr (SLLconst [2] idx) val mem)
 13119  	// result: (MOVWstoreidx4 ptr idx val mem)
 13120  	for {
 13121  		ptr := v_0
 13122  		if v_1.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_1.AuxInt) != 2 {
 13123  			break
 13124  		}
 13125  		idx := v_1.Args[0]
 13126  		val := v_2
 13127  		mem := v_3
 13128  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13129  		v.AddArg4(ptr, idx, val, mem)
 13130  		return true
 13131  	}
 13132  	// match: (MOVWstoreidx (SLLconst [2] idx) ptr val mem)
 13133  	// result: (MOVWstoreidx4 ptr idx val mem)
 13134  	for {
 13135  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 2 {
 13136  			break
 13137  		}
 13138  		idx := v_0.Args[0]
 13139  		ptr := v_1
 13140  		val := v_2
 13141  		mem := v_3
 13142  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13143  		v.AddArg4(ptr, idx, val, mem)
 13144  		return true
 13145  	}
 13146  	// match: (MOVWstoreidx ptr idx (MOVWreg x) mem)
 13147  	// result: (MOVWstoreidx ptr idx x mem)
 13148  	for {
 13149  		ptr := v_0
 13150  		idx := v_1
 13151  		if v_2.Op != ssaop.OpARM64MOVWreg {
 13152  			break
 13153  		}
 13154  		x := v_2.Args[0]
 13155  		mem := v_3
 13156  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 13157  		v.AddArg4(ptr, idx, x, mem)
 13158  		return true
 13159  	}
 13160  	// match: (MOVWstoreidx ptr idx (MOVWUreg x) mem)
 13161  	// result: (MOVWstoreidx ptr idx x mem)
 13162  	for {
 13163  		ptr := v_0
 13164  		idx := v_1
 13165  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 13166  			break
 13167  		}
 13168  		x := v_2.Args[0]
 13169  		mem := v_3
 13170  		v.Reset(ssaop.OpARM64MOVWstoreidx)
 13171  		v.AddArg4(ptr, idx, x, mem)
 13172  		return true
 13173  	}
 13174  	return false
 13175  }
 13176  func rewriteValue_OpARM64MOVWstoreidx4(v *ssa.Value) bool {
 13177  	v_3 := v.Args[3]
 13178  	v_2 := v.Args[2]
 13179  	v_1 := v.Args[1]
 13180  	v_0 := v.Args[0]
 13181  	// match: (MOVWstoreidx4 ptr (MOVDconst [c]) val mem)
 13182  	// cond: ssa.Is32Bit(c<<2)
 13183  	// result: (MOVWstore [int32(c)<<2] ptr val mem)
 13184  	for {
 13185  		ptr := v_0
 13186  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13187  			break
 13188  		}
 13189  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13190  		val := v_2
 13191  		mem := v_3
 13192  		if !(ssa.Is32Bit(c << 2)) {
 13193  			break
 13194  		}
 13195  		v.Reset(ssaop.OpARM64MOVWstore)
 13196  		v.AuxInt = ssa.Int32ToAuxInt(int32(c) << 2)
 13197  		v.AddArg3(ptr, val, mem)
 13198  		return true
 13199  	}
 13200  	// match: (MOVWstoreidx4 ptr idx (MOVWreg x) mem)
 13201  	// result: (MOVWstoreidx4 ptr idx x mem)
 13202  	for {
 13203  		ptr := v_0
 13204  		idx := v_1
 13205  		if v_2.Op != ssaop.OpARM64MOVWreg {
 13206  			break
 13207  		}
 13208  		x := v_2.Args[0]
 13209  		mem := v_3
 13210  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13211  		v.AddArg4(ptr, idx, x, mem)
 13212  		return true
 13213  	}
 13214  	// match: (MOVWstoreidx4 ptr idx (MOVWUreg x) mem)
 13215  	// result: (MOVWstoreidx4 ptr idx x mem)
 13216  	for {
 13217  		ptr := v_0
 13218  		idx := v_1
 13219  		if v_2.Op != ssaop.OpARM64MOVWUreg {
 13220  			break
 13221  		}
 13222  		x := v_2.Args[0]
 13223  		mem := v_3
 13224  		v.Reset(ssaop.OpARM64MOVWstoreidx4)
 13225  		v.AddArg4(ptr, idx, x, mem)
 13226  		return true
 13227  	}
 13228  	return false
 13229  }
 13230  func rewriteValue_OpARM64MSUB(v *ssa.Value) bool {
 13231  	v_2 := v.Args[2]
 13232  	v_1 := v.Args[1]
 13233  	v_0 := v.Args[0]
 13234  	b := v.Block
 13235  	// match: (MSUB a x (MOVDconst [-1]))
 13236  	// result: (ADD a x)
 13237  	for {
 13238  		a := v_0
 13239  		x := v_1
 13240  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != -1 {
 13241  			break
 13242  		}
 13243  		v.Reset(ssaop.OpARM64ADD)
 13244  		v.AddArg2(a, x)
 13245  		return true
 13246  	}
 13247  	// match: (MSUB a _ (MOVDconst [0]))
 13248  	// result: a
 13249  	for {
 13250  		a := v_0
 13251  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 0 {
 13252  			break
 13253  		}
 13254  		v.CopyOf(a)
 13255  		return true
 13256  	}
 13257  	// match: (MSUB a x (MOVDconst [1]))
 13258  	// result: (SUB a x)
 13259  	for {
 13260  		a := v_0
 13261  		x := v_1
 13262  		if v_2.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2.AuxInt) != 1 {
 13263  			break
 13264  		}
 13265  		v.Reset(ssaop.OpARM64SUB)
 13266  		v.AddArg2(a, x)
 13267  		return true
 13268  	}
 13269  	// match: (MSUB a x (MOVDconst [c]))
 13270  	// cond: ssa.IsPowerOfTwo(c)
 13271  	// result: (SUBshiftLL a x [ssa.Log64(c)])
 13272  	for {
 13273  		a := v_0
 13274  		x := v_1
 13275  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13276  			break
 13277  		}
 13278  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13279  		if !(ssa.IsPowerOfTwo(c)) {
 13280  			break
 13281  		}
 13282  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13283  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13284  		v.AddArg2(a, x)
 13285  		return true
 13286  	}
 13287  	// match: (MSUB a x (MOVDconst [c]))
 13288  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
 13289  	// result: (SUB a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
 13290  	for {
 13291  		a := v_0
 13292  		x := v_1
 13293  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13294  			break
 13295  		}
 13296  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13297  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
 13298  			break
 13299  		}
 13300  		v.Reset(ssaop.OpARM64SUB)
 13301  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13302  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13303  		v0.AddArg2(x, x)
 13304  		v.AddArg2(a, v0)
 13305  		return true
 13306  	}
 13307  	// match: (MSUB a x (MOVDconst [c]))
 13308  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
 13309  	// result: (ADD a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
 13310  	for {
 13311  		a := v_0
 13312  		x := v_1
 13313  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13314  			break
 13315  		}
 13316  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13317  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
 13318  			break
 13319  		}
 13320  		v.Reset(ssaop.OpARM64ADD)
 13321  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13322  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13323  		v0.AddArg2(x, x)
 13324  		v.AddArg2(a, v0)
 13325  		return true
 13326  	}
 13327  	// match: (MSUB a x (MOVDconst [c]))
 13328  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
 13329  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
 13330  	for {
 13331  		a := v_0
 13332  		x := v_1
 13333  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13334  			break
 13335  		}
 13336  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13337  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
 13338  			break
 13339  		}
 13340  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13341  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13342  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13343  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13344  		v0.AddArg2(x, x)
 13345  		v.AddArg2(a, v0)
 13346  		return true
 13347  	}
 13348  	// match: (MSUB a x (MOVDconst [c]))
 13349  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
 13350  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
 13351  	for {
 13352  		a := v_0
 13353  		x := v_1
 13354  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13355  			break
 13356  		}
 13357  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13358  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
 13359  			break
 13360  		}
 13361  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13362  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13363  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13364  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13365  		v0.AddArg2(x, x)
 13366  		v.AddArg2(a, v0)
 13367  		return true
 13368  	}
 13369  	// match: (MSUB a x (MOVDconst [c]))
 13370  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
 13371  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
 13372  	for {
 13373  		a := v_0
 13374  		x := v_1
 13375  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13376  			break
 13377  		}
 13378  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13379  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
 13380  			break
 13381  		}
 13382  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13383  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 13384  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13385  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13386  		v0.AddArg2(x, x)
 13387  		v.AddArg2(a, v0)
 13388  		return true
 13389  	}
 13390  	// match: (MSUB a x (MOVDconst [c]))
 13391  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
 13392  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
 13393  	for {
 13394  		a := v_0
 13395  		x := v_1
 13396  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13397  			break
 13398  		}
 13399  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13400  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
 13401  			break
 13402  		}
 13403  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13404  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 13405  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13406  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13407  		v0.AddArg2(x, x)
 13408  		v.AddArg2(a, v0)
 13409  		return true
 13410  	}
 13411  	// match: (MSUB a (MOVDconst [-1]) x)
 13412  	// result: (ADD a x)
 13413  	for {
 13414  		a := v_0
 13415  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != -1 {
 13416  			break
 13417  		}
 13418  		x := v_2
 13419  		v.Reset(ssaop.OpARM64ADD)
 13420  		v.AddArg2(a, x)
 13421  		return true
 13422  	}
 13423  	// match: (MSUB a (MOVDconst [0]) _)
 13424  	// result: a
 13425  	for {
 13426  		a := v_0
 13427  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
 13428  			break
 13429  		}
 13430  		v.CopyOf(a)
 13431  		return true
 13432  	}
 13433  	// match: (MSUB a (MOVDconst [1]) x)
 13434  	// result: (SUB a x)
 13435  	for {
 13436  		a := v_0
 13437  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 13438  			break
 13439  		}
 13440  		x := v_2
 13441  		v.Reset(ssaop.OpARM64SUB)
 13442  		v.AddArg2(a, x)
 13443  		return true
 13444  	}
 13445  	// match: (MSUB a (MOVDconst [c]) x)
 13446  	// cond: ssa.IsPowerOfTwo(c)
 13447  	// result: (SUBshiftLL a x [ssa.Log64(c)])
 13448  	for {
 13449  		a := v_0
 13450  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13451  			break
 13452  		}
 13453  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13454  		x := v_2
 13455  		if !(ssa.IsPowerOfTwo(c)) {
 13456  			break
 13457  		}
 13458  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13459  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13460  		v.AddArg2(a, x)
 13461  		return true
 13462  	}
 13463  	// match: (MSUB a (MOVDconst [c]) x)
 13464  	// cond: ssa.IsPowerOfTwo(c-1) && c>=3
 13465  	// result: (SUB a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)]))
 13466  	for {
 13467  		a := v_0
 13468  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13469  			break
 13470  		}
 13471  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13472  		x := v_2
 13473  		if !(ssa.IsPowerOfTwo(c-1) && c >= 3) {
 13474  			break
 13475  		}
 13476  		v.Reset(ssaop.OpARM64SUB)
 13477  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13478  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13479  		v0.AddArg2(x, x)
 13480  		v.AddArg2(a, v0)
 13481  		return true
 13482  	}
 13483  	// match: (MSUB a (MOVDconst [c]) x)
 13484  	// cond: ssa.IsPowerOfTwo(c+1) && c>=7
 13485  	// result: (ADD a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)]))
 13486  	for {
 13487  		a := v_0
 13488  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13489  			break
 13490  		}
 13491  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13492  		x := v_2
 13493  		if !(ssa.IsPowerOfTwo(c+1) && c >= 7) {
 13494  			break
 13495  		}
 13496  		v.Reset(ssaop.OpARM64ADD)
 13497  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13498  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13499  		v0.AddArg2(x, x)
 13500  		v.AddArg2(a, v0)
 13501  		return true
 13502  	}
 13503  	// match: (MSUB a (MOVDconst [c]) x)
 13504  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3)
 13505  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)])
 13506  	for {
 13507  		a := v_0
 13508  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13509  			break
 13510  		}
 13511  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13512  		x := v_2
 13513  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3)) {
 13514  			break
 13515  		}
 13516  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13517  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13518  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13519  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13520  		v0.AddArg2(x, x)
 13521  		v.AddArg2(a, v0)
 13522  		return true
 13523  	}
 13524  	// match: (MSUB a (MOVDconst [c]) x)
 13525  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5)
 13526  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)])
 13527  	for {
 13528  		a := v_0
 13529  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13530  			break
 13531  		}
 13532  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13533  		x := v_2
 13534  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5)) {
 13535  			break
 13536  		}
 13537  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13538  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13539  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13540  		v0.AuxInt = ssa.Int64ToAuxInt(2)
 13541  		v0.AddArg2(x, x)
 13542  		v.AddArg2(a, v0)
 13543  		return true
 13544  	}
 13545  	// match: (MSUB a (MOVDconst [c]) x)
 13546  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7)
 13547  	// result: (ADDshiftLL a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)])
 13548  	for {
 13549  		a := v_0
 13550  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13551  			break
 13552  		}
 13553  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13554  		x := v_2
 13555  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7)) {
 13556  			break
 13557  		}
 13558  		v.Reset(ssaop.OpARM64ADDshiftLL)
 13559  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 13560  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13561  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13562  		v0.AddArg2(x, x)
 13563  		v.AddArg2(a, v0)
 13564  		return true
 13565  	}
 13566  	// match: (MSUB a (MOVDconst [c]) x)
 13567  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9)
 13568  	// result: (SUBshiftLL a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)])
 13569  	for {
 13570  		a := v_0
 13571  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13572  			break
 13573  		}
 13574  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13575  		x := v_2
 13576  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9)) {
 13577  			break
 13578  		}
 13579  		v.Reset(ssaop.OpARM64SUBshiftLL)
 13580  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 13581  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13582  		v0.AuxInt = ssa.Int64ToAuxInt(3)
 13583  		v0.AddArg2(x, x)
 13584  		v.AddArg2(a, v0)
 13585  		return true
 13586  	}
 13587  	// match: (MSUB (MOVDconst [c]) x y)
 13588  	// result: (ADDconst [c] (MNEG <x.Type> x y))
 13589  	for {
 13590  		if v_0.Op != ssaop.OpARM64MOVDconst {
 13591  			break
 13592  		}
 13593  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 13594  		x := v_1
 13595  		y := v_2
 13596  		v.Reset(ssaop.OpARM64ADDconst)
 13597  		v.AuxInt = ssa.Int64ToAuxInt(c)
 13598  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MNEG, x.Type)
 13599  		v0.AddArg2(x, y)
 13600  		v.AddArg(v0)
 13601  		return true
 13602  	}
 13603  	// match: (MSUB a (MOVDconst [c]) (MOVDconst [d]))
 13604  	// result: (SUBconst [c*d] a)
 13605  	for {
 13606  		a := v_0
 13607  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13608  			break
 13609  		}
 13610  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13611  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13612  			break
 13613  		}
 13614  		d := ssa.AuxIntToInt64(v_2.AuxInt)
 13615  		v.Reset(ssaop.OpARM64SUBconst)
 13616  		v.AuxInt = ssa.Int64ToAuxInt(c * d)
 13617  		v.AddArg(a)
 13618  		return true
 13619  	}
 13620  	return false
 13621  }
 13622  func rewriteValue_OpARM64MSUBW(v *ssa.Value) bool {
 13623  	v_2 := v.Args[2]
 13624  	v_1 := v.Args[1]
 13625  	v_0 := v.Args[0]
 13626  	b := v.Block
 13627  	// match: (MSUBW a x (MOVDconst [c]))
 13628  	// cond: int32(c)==-1
 13629  	// result: (MOVWUreg (ADD <a.Type> a x))
 13630  	for {
 13631  		a := v_0
 13632  		x := v_1
 13633  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13634  			break
 13635  		}
 13636  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13637  		if !(int32(c) == -1) {
 13638  			break
 13639  		}
 13640  		v.Reset(ssaop.OpARM64MOVWUreg)
 13641  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 13642  		v0.AddArg2(a, x)
 13643  		v.AddArg(v0)
 13644  		return true
 13645  	}
 13646  	// match: (MSUBW a _ (MOVDconst [c]))
 13647  	// cond: int32(c)==0
 13648  	// result: (MOVWUreg a)
 13649  	for {
 13650  		a := v_0
 13651  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13652  			break
 13653  		}
 13654  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13655  		if !(int32(c) == 0) {
 13656  			break
 13657  		}
 13658  		v.Reset(ssaop.OpARM64MOVWUreg)
 13659  		v.AddArg(a)
 13660  		return true
 13661  	}
 13662  	// match: (MSUBW a x (MOVDconst [c]))
 13663  	// cond: int32(c)==1
 13664  	// result: (MOVWUreg (SUB <a.Type> a x))
 13665  	for {
 13666  		a := v_0
 13667  		x := v_1
 13668  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13669  			break
 13670  		}
 13671  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13672  		if !(int32(c) == 1) {
 13673  			break
 13674  		}
 13675  		v.Reset(ssaop.OpARM64MOVWUreg)
 13676  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 13677  		v0.AddArg2(a, x)
 13678  		v.AddArg(v0)
 13679  		return true
 13680  	}
 13681  	// match: (MSUBW a x (MOVDconst [c]))
 13682  	// cond: ssa.IsPowerOfTwo(c)
 13683  	// result: (MOVWUreg (SUBshiftLL <a.Type> a x [ssa.Log64(c)]))
 13684  	for {
 13685  		a := v_0
 13686  		x := v_1
 13687  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13688  			break
 13689  		}
 13690  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13691  		if !(ssa.IsPowerOfTwo(c)) {
 13692  			break
 13693  		}
 13694  		v.Reset(ssaop.OpARM64MOVWUreg)
 13695  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13696  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13697  		v0.AddArg2(a, x)
 13698  		v.AddArg(v0)
 13699  		return true
 13700  	}
 13701  	// match: (MSUBW a x (MOVDconst [c]))
 13702  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
 13703  	// result: (MOVWUreg (SUB <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
 13704  	for {
 13705  		a := v_0
 13706  		x := v_1
 13707  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13708  			break
 13709  		}
 13710  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13711  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
 13712  			break
 13713  		}
 13714  		v.Reset(ssaop.OpARM64MOVWUreg)
 13715  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 13716  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13717  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13718  		v1.AddArg2(x, x)
 13719  		v0.AddArg2(a, v1)
 13720  		v.AddArg(v0)
 13721  		return true
 13722  	}
 13723  	// match: (MSUBW a x (MOVDconst [c]))
 13724  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
 13725  	// result: (MOVWUreg (ADD <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
 13726  	for {
 13727  		a := v_0
 13728  		x := v_1
 13729  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13730  			break
 13731  		}
 13732  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13733  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 13734  			break
 13735  		}
 13736  		v.Reset(ssaop.OpARM64MOVWUreg)
 13737  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 13738  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13739  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13740  		v1.AddArg2(x, x)
 13741  		v0.AddArg2(a, v1)
 13742  		v.AddArg(v0)
 13743  		return true
 13744  	}
 13745  	// match: (MSUBW a x (MOVDconst [c]))
 13746  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 13747  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
 13748  	for {
 13749  		a := v_0
 13750  		x := v_1
 13751  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13752  			break
 13753  		}
 13754  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13755  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 13756  			break
 13757  		}
 13758  		v.Reset(ssaop.OpARM64MOVWUreg)
 13759  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 13760  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13761  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13762  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 13763  		v1.AddArg2(x, x)
 13764  		v0.AddArg2(a, v1)
 13765  		v.AddArg(v0)
 13766  		return true
 13767  	}
 13768  	// match: (MSUBW a x (MOVDconst [c]))
 13769  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 13770  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
 13771  	for {
 13772  		a := v_0
 13773  		x := v_1
 13774  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13775  			break
 13776  		}
 13777  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13778  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 13779  			break
 13780  		}
 13781  		v.Reset(ssaop.OpARM64MOVWUreg)
 13782  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13783  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13784  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13785  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 13786  		v1.AddArg2(x, x)
 13787  		v0.AddArg2(a, v1)
 13788  		v.AddArg(v0)
 13789  		return true
 13790  	}
 13791  	// match: (MSUBW a x (MOVDconst [c]))
 13792  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 13793  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
 13794  	for {
 13795  		a := v_0
 13796  		x := v_1
 13797  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13798  			break
 13799  		}
 13800  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13801  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 13802  			break
 13803  		}
 13804  		v.Reset(ssaop.OpARM64MOVWUreg)
 13805  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 13806  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 13807  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13808  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 13809  		v1.AddArg2(x, x)
 13810  		v0.AddArg2(a, v1)
 13811  		v.AddArg(v0)
 13812  		return true
 13813  	}
 13814  	// match: (MSUBW a x (MOVDconst [c]))
 13815  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 13816  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
 13817  	for {
 13818  		a := v_0
 13819  		x := v_1
 13820  		if v_2.Op != ssaop.OpARM64MOVDconst {
 13821  			break
 13822  		}
 13823  		c := ssa.AuxIntToInt64(v_2.AuxInt)
 13824  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 13825  			break
 13826  		}
 13827  		v.Reset(ssaop.OpARM64MOVWUreg)
 13828  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13829  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 13830  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13831  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 13832  		v1.AddArg2(x, x)
 13833  		v0.AddArg2(a, v1)
 13834  		v.AddArg(v0)
 13835  		return true
 13836  	}
 13837  	// match: (MSUBW a (MOVDconst [c]) x)
 13838  	// cond: int32(c)==-1
 13839  	// result: (MOVWUreg (ADD <a.Type> a x))
 13840  	for {
 13841  		a := v_0
 13842  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13843  			break
 13844  		}
 13845  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13846  		x := v_2
 13847  		if !(int32(c) == -1) {
 13848  			break
 13849  		}
 13850  		v.Reset(ssaop.OpARM64MOVWUreg)
 13851  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 13852  		v0.AddArg2(a, x)
 13853  		v.AddArg(v0)
 13854  		return true
 13855  	}
 13856  	// match: (MSUBW a (MOVDconst [c]) _)
 13857  	// cond: int32(c)==0
 13858  	// result: (MOVWUreg a)
 13859  	for {
 13860  		a := v_0
 13861  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13862  			break
 13863  		}
 13864  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13865  		if !(int32(c) == 0) {
 13866  			break
 13867  		}
 13868  		v.Reset(ssaop.OpARM64MOVWUreg)
 13869  		v.AddArg(a)
 13870  		return true
 13871  	}
 13872  	// match: (MSUBW a (MOVDconst [c]) x)
 13873  	// cond: int32(c)==1
 13874  	// result: (MOVWUreg (SUB <a.Type> a x))
 13875  	for {
 13876  		a := v_0
 13877  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13878  			break
 13879  		}
 13880  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13881  		x := v_2
 13882  		if !(int32(c) == 1) {
 13883  			break
 13884  		}
 13885  		v.Reset(ssaop.OpARM64MOVWUreg)
 13886  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 13887  		v0.AddArg2(a, x)
 13888  		v.AddArg(v0)
 13889  		return true
 13890  	}
 13891  	// match: (MSUBW a (MOVDconst [c]) x)
 13892  	// cond: ssa.IsPowerOfTwo(c)
 13893  	// result: (MOVWUreg (SUBshiftLL <a.Type> a x [ssa.Log64(c)]))
 13894  	for {
 13895  		a := v_0
 13896  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13897  			break
 13898  		}
 13899  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13900  		x := v_2
 13901  		if !(ssa.IsPowerOfTwo(c)) {
 13902  			break
 13903  		}
 13904  		v.Reset(ssaop.OpARM64MOVWUreg)
 13905  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13906  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 13907  		v0.AddArg2(a, x)
 13908  		v.AddArg(v0)
 13909  		return true
 13910  	}
 13911  	// match: (MSUBW a (MOVDconst [c]) x)
 13912  	// cond: ssa.IsPowerOfTwo(c-1) && int32(c)>=3
 13913  	// result: (MOVWUreg (SUB <a.Type> a (ADDshiftLL <x.Type> x x [ssa.Log64(c-1)])))
 13914  	for {
 13915  		a := v_0
 13916  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13917  			break
 13918  		}
 13919  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13920  		x := v_2
 13921  		if !(ssa.IsPowerOfTwo(c-1) && int32(c) >= 3) {
 13922  			break
 13923  		}
 13924  		v.Reset(ssaop.OpARM64MOVWUreg)
 13925  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, a.Type)
 13926  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13927  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c - 1))
 13928  		v1.AddArg2(x, x)
 13929  		v0.AddArg2(a, v1)
 13930  		v.AddArg(v0)
 13931  		return true
 13932  	}
 13933  	// match: (MSUBW a (MOVDconst [c]) x)
 13934  	// cond: ssa.IsPowerOfTwo(c+1) && int32(c)>=7
 13935  	// result: (MOVWUreg (ADD <a.Type> a (SUBshiftLL <x.Type> x x [ssa.Log64(c+1)])))
 13936  	for {
 13937  		a := v_0
 13938  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13939  			break
 13940  		}
 13941  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13942  		x := v_2
 13943  		if !(ssa.IsPowerOfTwo(c+1) && int32(c) >= 7) {
 13944  			break
 13945  		}
 13946  		v.Reset(ssaop.OpARM64MOVWUreg)
 13947  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, a.Type)
 13948  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13949  		v1.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c + 1))
 13950  		v1.AddArg2(x, x)
 13951  		v0.AddArg2(a, v1)
 13952  		v.AddArg(v0)
 13953  		return true
 13954  	}
 13955  	// match: (MSUBW a (MOVDconst [c]) x)
 13956  	// cond: c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)
 13957  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [2]) [ssa.Log64(c/3)]))
 13958  	for {
 13959  		a := v_0
 13960  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13961  			break
 13962  		}
 13963  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13964  		x := v_2
 13965  		if !(c%3 == 0 && ssa.IsPowerOfTwo(c/3) && ssa.Is32Bit(c)) {
 13966  			break
 13967  		}
 13968  		v.Reset(ssaop.OpARM64MOVWUreg)
 13969  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 13970  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 3))
 13971  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 13972  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 13973  		v1.AddArg2(x, x)
 13974  		v0.AddArg2(a, v1)
 13975  		v.AddArg(v0)
 13976  		return true
 13977  	}
 13978  	// match: (MSUBW a (MOVDconst [c]) x)
 13979  	// cond: c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)
 13980  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [2]) [ssa.Log64(c/5)]))
 13981  	for {
 13982  		a := v_0
 13983  		if v_1.Op != ssaop.OpARM64MOVDconst {
 13984  			break
 13985  		}
 13986  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 13987  		x := v_2
 13988  		if !(c%5 == 0 && ssa.IsPowerOfTwo(c/5) && ssa.Is32Bit(c)) {
 13989  			break
 13990  		}
 13991  		v.Reset(ssaop.OpARM64MOVWUreg)
 13992  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 13993  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 5))
 13994  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 13995  		v1.AuxInt = ssa.Int64ToAuxInt(2)
 13996  		v1.AddArg2(x, x)
 13997  		v0.AddArg2(a, v1)
 13998  		v.AddArg(v0)
 13999  		return true
 14000  	}
 14001  	// match: (MSUBW a (MOVDconst [c]) x)
 14002  	// cond: c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)
 14003  	// result: (MOVWUreg (ADDshiftLL <a.Type> a (SUBshiftLL <x.Type> x x [3]) [ssa.Log64(c/7)]))
 14004  	for {
 14005  		a := v_0
 14006  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14007  			break
 14008  		}
 14009  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14010  		x := v_2
 14011  		if !(c%7 == 0 && ssa.IsPowerOfTwo(c/7) && ssa.Is32Bit(c)) {
 14012  			break
 14013  		}
 14014  		v.Reset(ssaop.OpARM64MOVWUreg)
 14015  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, a.Type)
 14016  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 7))
 14017  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, x.Type)
 14018  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 14019  		v1.AddArg2(x, x)
 14020  		v0.AddArg2(a, v1)
 14021  		v.AddArg(v0)
 14022  		return true
 14023  	}
 14024  	// match: (MSUBW a (MOVDconst [c]) x)
 14025  	// cond: c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)
 14026  	// result: (MOVWUreg (SUBshiftLL <a.Type> a (ADDshiftLL <x.Type> x x [3]) [ssa.Log64(c/9)]))
 14027  	for {
 14028  		a := v_0
 14029  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14030  			break
 14031  		}
 14032  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14033  		x := v_2
 14034  		if !(c%9 == 0 && ssa.IsPowerOfTwo(c/9) && ssa.Is32Bit(c)) {
 14035  			break
 14036  		}
 14037  		v.Reset(ssaop.OpARM64MOVWUreg)
 14038  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBshiftLL, a.Type)
 14039  		v0.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c / 9))
 14040  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADDshiftLL, x.Type)
 14041  		v1.AuxInt = ssa.Int64ToAuxInt(3)
 14042  		v1.AddArg2(x, x)
 14043  		v0.AddArg2(a, v1)
 14044  		v.AddArg(v0)
 14045  		return true
 14046  	}
 14047  	// match: (MSUBW (MOVDconst [c]) x y)
 14048  	// result: (MOVWUreg (ADDconst <x.Type> [c] (MNEGW <x.Type> x y)))
 14049  	for {
 14050  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14051  			break
 14052  		}
 14053  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14054  		x := v_1
 14055  		y := v_2
 14056  		v.Reset(ssaop.OpARM64MOVWUreg)
 14057  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADDconst, x.Type)
 14058  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 14059  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MNEGW, x.Type)
 14060  		v1.AddArg2(x, y)
 14061  		v0.AddArg(v1)
 14062  		v.AddArg(v0)
 14063  		return true
 14064  	}
 14065  	// match: (MSUBW a (MOVDconst [c]) (MOVDconst [d]))
 14066  	// result: (MOVWUreg (SUBconst <a.Type> [c*d] a))
 14067  	for {
 14068  		a := v_0
 14069  		if v_1.Op != ssaop.OpARM64MOVDconst {
 14070  			break
 14071  		}
 14072  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 14073  		if v_2.Op != ssaop.OpARM64MOVDconst {
 14074  			break
 14075  		}
 14076  		d := ssa.AuxIntToInt64(v_2.AuxInt)
 14077  		v.Reset(ssaop.OpARM64MOVWUreg)
 14078  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUBconst, a.Type)
 14079  		v0.AuxInt = ssa.Int64ToAuxInt(c * d)
 14080  		v0.AddArg(a)
 14081  		v.AddArg(v0)
 14082  		return true
 14083  	}
 14084  	return false
 14085  }
 14086  func rewriteValue_OpARM64MUL(v *ssa.Value) bool {
 14087  	v_1 := v.Args[1]
 14088  	v_0 := v.Args[0]
 14089  	b := v.Block
 14090  	config := b.Func.Config
 14091  	// match: (MUL (NEG x) y)
 14092  	// result: (MNEG x y)
 14093  	for {
 14094  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14095  			if v_0.Op != ssaop.OpARM64NEG {
 14096  				continue
 14097  			}
 14098  			x := v_0.Args[0]
 14099  			y := v_1
 14100  			v.Reset(ssaop.OpARM64MNEG)
 14101  			v.AddArg2(x, y)
 14102  			return true
 14103  		}
 14104  		break
 14105  	}
 14106  	// match: (MUL _ (MOVDconst [0]))
 14107  	// result: (MOVDconst [0])
 14108  	for {
 14109  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14110  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 0 {
 14111  				continue
 14112  			}
 14113  			v.Reset(ssaop.OpARM64MOVDconst)
 14114  			v.AuxInt = ssa.Int64ToAuxInt(0)
 14115  			return true
 14116  		}
 14117  		break
 14118  	}
 14119  	// match: (MUL x (MOVDconst [1]))
 14120  	// result: x
 14121  	for {
 14122  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14123  			x := v_0
 14124  			if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 14125  				continue
 14126  			}
 14127  			v.CopyOf(x)
 14128  			return true
 14129  		}
 14130  		break
 14131  	}
 14132  	// match: (MUL x (MOVDconst [c]))
 14133  	// cond: ssa.CanMulStrengthReduce(config, c)
 14134  	// result: {ssa.MulStrengthReduce(v, x, c)}
 14135  	for {
 14136  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14137  			x := v_0
 14138  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14139  				continue
 14140  			}
 14141  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14142  			if !(ssa.CanMulStrengthReduce(config, c)) {
 14143  				continue
 14144  			}
 14145  			v.CopyOf(ssa.MulStrengthReduce(v, x, c))
 14146  			return true
 14147  		}
 14148  		break
 14149  	}
 14150  	// match: (MUL (MOVDconst [c]) (MOVDconst [d]))
 14151  	// result: (MOVDconst [c*d])
 14152  	for {
 14153  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14154  			if v_0.Op != ssaop.OpARM64MOVDconst {
 14155  				continue
 14156  			}
 14157  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 14158  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14159  				continue
 14160  			}
 14161  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 14162  			v.Reset(ssaop.OpARM64MOVDconst)
 14163  			v.AuxInt = ssa.Int64ToAuxInt(c * d)
 14164  			return true
 14165  		}
 14166  		break
 14167  	}
 14168  	// match: (MUL r:(MOVWUreg x) s:(MOVWUreg y))
 14169  	// cond: r.Uses == 1 && s.Uses == 1
 14170  	// result: (UMULL x y)
 14171  	for {
 14172  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14173  			r := v_0
 14174  			if r.Op != ssaop.OpARM64MOVWUreg {
 14175  				continue
 14176  			}
 14177  			x := r.Args[0]
 14178  			s := v_1
 14179  			if s.Op != ssaop.OpARM64MOVWUreg {
 14180  				continue
 14181  			}
 14182  			y := s.Args[0]
 14183  			if !(r.Uses == 1 && s.Uses == 1) {
 14184  				continue
 14185  			}
 14186  			v.Reset(ssaop.OpARM64UMULL)
 14187  			v.AddArg2(x, y)
 14188  			return true
 14189  		}
 14190  		break
 14191  	}
 14192  	// match: (MUL r:(MOVWreg x) s:(MOVWreg y))
 14193  	// cond: r.Uses == 1 && s.Uses == 1
 14194  	// result: (MULL x y)
 14195  	for {
 14196  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14197  			r := v_0
 14198  			if r.Op != ssaop.OpARM64MOVWreg {
 14199  				continue
 14200  			}
 14201  			x := r.Args[0]
 14202  			s := v_1
 14203  			if s.Op != ssaop.OpARM64MOVWreg {
 14204  				continue
 14205  			}
 14206  			y := s.Args[0]
 14207  			if !(r.Uses == 1 && s.Uses == 1) {
 14208  				continue
 14209  			}
 14210  			v.Reset(ssaop.OpARM64MULL)
 14211  			v.AddArg2(x, y)
 14212  			return true
 14213  		}
 14214  		break
 14215  	}
 14216  	return false
 14217  }
 14218  func rewriteValue_OpARM64MULW(v *ssa.Value) bool {
 14219  	v_1 := v.Args[1]
 14220  	v_0 := v.Args[0]
 14221  	b := v.Block
 14222  	config := b.Func.Config
 14223  	// match: (MULW (NEG x) y)
 14224  	// result: (MNEGW x y)
 14225  	for {
 14226  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14227  			if v_0.Op != ssaop.OpARM64NEG {
 14228  				continue
 14229  			}
 14230  			x := v_0.Args[0]
 14231  			y := v_1
 14232  			v.Reset(ssaop.OpARM64MNEGW)
 14233  			v.AddArg2(x, y)
 14234  			return true
 14235  		}
 14236  		break
 14237  	}
 14238  	// match: (MULW _ (MOVDconst [c]))
 14239  	// cond: int32(c)==0
 14240  	// result: (MOVDconst [0])
 14241  	for {
 14242  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14243  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14244  				continue
 14245  			}
 14246  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14247  			if !(int32(c) == 0) {
 14248  				continue
 14249  			}
 14250  			v.Reset(ssaop.OpARM64MOVDconst)
 14251  			v.AuxInt = ssa.Int64ToAuxInt(0)
 14252  			return true
 14253  		}
 14254  		break
 14255  	}
 14256  	// match: (MULW x (MOVDconst [c]))
 14257  	// cond: int32(c)==1
 14258  	// result: (MOVWUreg x)
 14259  	for {
 14260  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14261  			x := v_0
 14262  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14263  				continue
 14264  			}
 14265  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14266  			if !(int32(c) == 1) {
 14267  				continue
 14268  			}
 14269  			v.Reset(ssaop.OpARM64MOVWUreg)
 14270  			v.AddArg(x)
 14271  			return true
 14272  		}
 14273  		break
 14274  	}
 14275  	// match: (MULW x (MOVDconst [c]))
 14276  	// cond: v.Type.Size() <= 4 && ssa.CanMulStrengthReduce32(config, int32(c))
 14277  	// result: {ssa.MulStrengthReduce32(v, x, int32(c))}
 14278  	for {
 14279  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14280  			x := v_0
 14281  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14282  				continue
 14283  			}
 14284  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 14285  			if !(v.Type.Size() <= 4 && ssa.CanMulStrengthReduce32(config, int32(c))) {
 14286  				continue
 14287  			}
 14288  			v.CopyOf(ssa.MulStrengthReduce32(v, x, int32(c)))
 14289  			return true
 14290  		}
 14291  		break
 14292  	}
 14293  	// match: (MULW (MOVDconst [c]) (MOVDconst [d]))
 14294  	// result: (MOVDconst [int64(uint32(c*d))])
 14295  	for {
 14296  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 14297  			if v_0.Op != ssaop.OpARM64MOVDconst {
 14298  				continue
 14299  			}
 14300  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 14301  			if v_1.Op != ssaop.OpARM64MOVDconst {
 14302  				continue
 14303  			}
 14304  			d := ssa.AuxIntToInt64(v_1.AuxInt)
 14305  			v.Reset(ssaop.OpARM64MOVDconst)
 14306  			v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c * d)))
 14307  			return true
 14308  		}
 14309  		break
 14310  	}
 14311  	return false
 14312  }
 14313  func rewriteValue_OpARM64MVN(v *ssa.Value) bool {
 14314  	v_0 := v.Args[0]
 14315  	// match: (MVN (XOR x y))
 14316  	// result: (EON x y)
 14317  	for {
 14318  		if v_0.Op != ssaop.OpARM64XOR {
 14319  			break
 14320  		}
 14321  		y := v_0.Args[1]
 14322  		x := v_0.Args[0]
 14323  		v.Reset(ssaop.OpARM64EON)
 14324  		v.AddArg2(x, y)
 14325  		return true
 14326  	}
 14327  	// match: (MVN (MOVDconst [c]))
 14328  	// result: (MOVDconst [^c])
 14329  	for {
 14330  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14331  			break
 14332  		}
 14333  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14334  		v.Reset(ssaop.OpARM64MOVDconst)
 14335  		v.AuxInt = ssa.Int64ToAuxInt(^c)
 14336  		return true
 14337  	}
 14338  	// match: (MVN x:(SLLconst [c] y))
 14339  	// cond: ssa.ClobberIfDead(x)
 14340  	// result: (MVNshiftLL [c] y)
 14341  	for {
 14342  		x := v_0
 14343  		if x.Op != ssaop.OpARM64SLLconst {
 14344  			break
 14345  		}
 14346  		c := ssa.AuxIntToInt64(x.AuxInt)
 14347  		y := x.Args[0]
 14348  		if !(ssa.ClobberIfDead(x)) {
 14349  			break
 14350  		}
 14351  		v.Reset(ssaop.OpARM64MVNshiftLL)
 14352  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14353  		v.AddArg(y)
 14354  		return true
 14355  	}
 14356  	// match: (MVN x:(SRLconst [c] y))
 14357  	// cond: ssa.ClobberIfDead(x)
 14358  	// result: (MVNshiftRL [c] y)
 14359  	for {
 14360  		x := v_0
 14361  		if x.Op != ssaop.OpARM64SRLconst {
 14362  			break
 14363  		}
 14364  		c := ssa.AuxIntToInt64(x.AuxInt)
 14365  		y := x.Args[0]
 14366  		if !(ssa.ClobberIfDead(x)) {
 14367  			break
 14368  		}
 14369  		v.Reset(ssaop.OpARM64MVNshiftRL)
 14370  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14371  		v.AddArg(y)
 14372  		return true
 14373  	}
 14374  	// match: (MVN x:(SRAconst [c] y))
 14375  	// cond: ssa.ClobberIfDead(x)
 14376  	// result: (MVNshiftRA [c] y)
 14377  	for {
 14378  		x := v_0
 14379  		if x.Op != ssaop.OpARM64SRAconst {
 14380  			break
 14381  		}
 14382  		c := ssa.AuxIntToInt64(x.AuxInt)
 14383  		y := x.Args[0]
 14384  		if !(ssa.ClobberIfDead(x)) {
 14385  			break
 14386  		}
 14387  		v.Reset(ssaop.OpARM64MVNshiftRA)
 14388  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14389  		v.AddArg(y)
 14390  		return true
 14391  	}
 14392  	// match: (MVN x:(RORconst [c] y))
 14393  	// cond: ssa.ClobberIfDead(x)
 14394  	// result: (MVNshiftRO [c] y)
 14395  	for {
 14396  		x := v_0
 14397  		if x.Op != ssaop.OpARM64RORconst {
 14398  			break
 14399  		}
 14400  		c := ssa.AuxIntToInt64(x.AuxInt)
 14401  		y := x.Args[0]
 14402  		if !(ssa.ClobberIfDead(x)) {
 14403  			break
 14404  		}
 14405  		v.Reset(ssaop.OpARM64MVNshiftRO)
 14406  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14407  		v.AddArg(y)
 14408  		return true
 14409  	}
 14410  	return false
 14411  }
 14412  func rewriteValue_OpARM64MVNshiftLL(v *ssa.Value) bool {
 14413  	v_0 := v.Args[0]
 14414  	// match: (MVNshiftLL (MOVDconst [c]) [d])
 14415  	// result: (MOVDconst [^int64(uint64(c)<<uint64(d))])
 14416  	for {
 14417  		d := ssa.AuxIntToInt64(v.AuxInt)
 14418  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14419  			break
 14420  		}
 14421  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14422  		v.Reset(ssaop.OpARM64MOVDconst)
 14423  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
 14424  		return true
 14425  	}
 14426  	return false
 14427  }
 14428  func rewriteValue_OpARM64MVNshiftRA(v *ssa.Value) bool {
 14429  	v_0 := v.Args[0]
 14430  	// match: (MVNshiftRA (MOVDconst [c]) [d])
 14431  	// result: (MOVDconst [^(c>>uint64(d))])
 14432  	for {
 14433  		d := ssa.AuxIntToInt64(v.AuxInt)
 14434  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14435  			break
 14436  		}
 14437  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14438  		v.Reset(ssaop.OpARM64MOVDconst)
 14439  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
 14440  		return true
 14441  	}
 14442  	return false
 14443  }
 14444  func rewriteValue_OpARM64MVNshiftRL(v *ssa.Value) bool {
 14445  	v_0 := v.Args[0]
 14446  	// match: (MVNshiftRL (MOVDconst [c]) [d])
 14447  	// result: (MOVDconst [^int64(uint64(c)>>uint64(d))])
 14448  	for {
 14449  		d := ssa.AuxIntToInt64(v.AuxInt)
 14450  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14451  			break
 14452  		}
 14453  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14454  		v.Reset(ssaop.OpARM64MOVDconst)
 14455  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
 14456  		return true
 14457  	}
 14458  	return false
 14459  }
 14460  func rewriteValue_OpARM64MVNshiftRO(v *ssa.Value) bool {
 14461  	v_0 := v.Args[0]
 14462  	// match: (MVNshiftRO (MOVDconst [c]) [d])
 14463  	// result: (MOVDconst [^rotateRight64(c, d)])
 14464  	for {
 14465  		d := ssa.AuxIntToInt64(v.AuxInt)
 14466  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14467  			break
 14468  		}
 14469  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14470  		v.Reset(ssaop.OpARM64MOVDconst)
 14471  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
 14472  		return true
 14473  	}
 14474  	return false
 14475  }
 14476  func rewriteValue_OpARM64NEG(v *ssa.Value) bool {
 14477  	v_0 := v.Args[0]
 14478  	// match: (NEG (MUL x y))
 14479  	// result: (MNEG x y)
 14480  	for {
 14481  		if v_0.Op != ssaop.OpARM64MUL {
 14482  			break
 14483  		}
 14484  		y := v_0.Args[1]
 14485  		x := v_0.Args[0]
 14486  		v.Reset(ssaop.OpARM64MNEG)
 14487  		v.AddArg2(x, y)
 14488  		return true
 14489  	}
 14490  	// match: (NEG (MULW x y))
 14491  	// cond: v.Type.Size() <= 4
 14492  	// result: (MNEGW x y)
 14493  	for {
 14494  		if v_0.Op != ssaop.OpARM64MULW {
 14495  			break
 14496  		}
 14497  		y := v_0.Args[1]
 14498  		x := v_0.Args[0]
 14499  		if !(v.Type.Size() <= 4) {
 14500  			break
 14501  		}
 14502  		v.Reset(ssaop.OpARM64MNEGW)
 14503  		v.AddArg2(x, y)
 14504  		return true
 14505  	}
 14506  	// match: (NEG (SUB x y))
 14507  	// result: (SUB y x)
 14508  	for {
 14509  		if v_0.Op != ssaop.OpARM64SUB {
 14510  			break
 14511  		}
 14512  		y := v_0.Args[1]
 14513  		x := v_0.Args[0]
 14514  		v.Reset(ssaop.OpARM64SUB)
 14515  		v.AddArg2(y, x)
 14516  		return true
 14517  	}
 14518  	// match: (NEG (NEG x))
 14519  	// result: x
 14520  	for {
 14521  		if v_0.Op != ssaop.OpARM64NEG {
 14522  			break
 14523  		}
 14524  		x := v_0.Args[0]
 14525  		v.CopyOf(x)
 14526  		return true
 14527  	}
 14528  	// match: (NEG (MOVDconst [c]))
 14529  	// result: (MOVDconst [-c])
 14530  	for {
 14531  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14532  			break
 14533  		}
 14534  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14535  		v.Reset(ssaop.OpARM64MOVDconst)
 14536  		v.AuxInt = ssa.Int64ToAuxInt(-c)
 14537  		return true
 14538  	}
 14539  	// match: (NEG x:(SLLconst [c] y))
 14540  	// cond: ssa.ClobberIfDead(x)
 14541  	// result: (NEGshiftLL [c] y)
 14542  	for {
 14543  		x := v_0
 14544  		if x.Op != ssaop.OpARM64SLLconst {
 14545  			break
 14546  		}
 14547  		c := ssa.AuxIntToInt64(x.AuxInt)
 14548  		y := x.Args[0]
 14549  		if !(ssa.ClobberIfDead(x)) {
 14550  			break
 14551  		}
 14552  		v.Reset(ssaop.OpARM64NEGshiftLL)
 14553  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14554  		v.AddArg(y)
 14555  		return true
 14556  	}
 14557  	// match: (NEG x:(SRLconst [c] y))
 14558  	// cond: ssa.ClobberIfDead(x)
 14559  	// result: (NEGshiftRL [c] y)
 14560  	for {
 14561  		x := v_0
 14562  		if x.Op != ssaop.OpARM64SRLconst {
 14563  			break
 14564  		}
 14565  		c := ssa.AuxIntToInt64(x.AuxInt)
 14566  		y := x.Args[0]
 14567  		if !(ssa.ClobberIfDead(x)) {
 14568  			break
 14569  		}
 14570  		v.Reset(ssaop.OpARM64NEGshiftRL)
 14571  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14572  		v.AddArg(y)
 14573  		return true
 14574  	}
 14575  	// match: (NEG x:(SRAconst [c] y))
 14576  	// cond: ssa.ClobberIfDead(x)
 14577  	// result: (NEGshiftRA [c] y)
 14578  	for {
 14579  		x := v_0
 14580  		if x.Op != ssaop.OpARM64SRAconst {
 14581  			break
 14582  		}
 14583  		c := ssa.AuxIntToInt64(x.AuxInt)
 14584  		y := x.Args[0]
 14585  		if !(ssa.ClobberIfDead(x)) {
 14586  			break
 14587  		}
 14588  		v.Reset(ssaop.OpARM64NEGshiftRA)
 14589  		v.AuxInt = ssa.Int64ToAuxInt(c)
 14590  		v.AddArg(y)
 14591  		return true
 14592  	}
 14593  	return false
 14594  }
 14595  func rewriteValue_OpARM64NEGshiftLL(v *ssa.Value) bool {
 14596  	v_0 := v.Args[0]
 14597  	// match: (NEGshiftLL (MOVDconst [c]) [d])
 14598  	// result: (MOVDconst [-int64(uint64(c)<<uint64(d))])
 14599  	for {
 14600  		d := ssa.AuxIntToInt64(v.AuxInt)
 14601  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14602  			break
 14603  		}
 14604  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14605  		v.Reset(ssaop.OpARM64MOVDconst)
 14606  		v.AuxInt = ssa.Int64ToAuxInt(-int64(uint64(c) << uint64(d)))
 14607  		return true
 14608  	}
 14609  	return false
 14610  }
 14611  func rewriteValue_OpARM64NEGshiftRA(v *ssa.Value) bool {
 14612  	v_0 := v.Args[0]
 14613  	// match: (NEGshiftRA (MOVDconst [c]) [d])
 14614  	// result: (MOVDconst [-(c>>uint64(d))])
 14615  	for {
 14616  		d := ssa.AuxIntToInt64(v.AuxInt)
 14617  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14618  			break
 14619  		}
 14620  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14621  		v.Reset(ssaop.OpARM64MOVDconst)
 14622  		v.AuxInt = ssa.Int64ToAuxInt(-(c >> uint64(d)))
 14623  		return true
 14624  	}
 14625  	return false
 14626  }
 14627  func rewriteValue_OpARM64NEGshiftRL(v *ssa.Value) bool {
 14628  	v_0 := v.Args[0]
 14629  	// match: (NEGshiftRL (MOVDconst [c]) [d])
 14630  	// result: (MOVDconst [-int64(uint64(c)>>uint64(d))])
 14631  	for {
 14632  		d := ssa.AuxIntToInt64(v.AuxInt)
 14633  		if v_0.Op != ssaop.OpARM64MOVDconst {
 14634  			break
 14635  		}
 14636  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 14637  		v.Reset(ssaop.OpARM64MOVDconst)
 14638  		v.AuxInt = ssa.Int64ToAuxInt(-int64(uint64(c) >> uint64(d)))
 14639  		return true
 14640  	}
 14641  	return false
 14642  }
 14643  func rewriteValue_OpARM64NotEqual(v *ssa.Value) bool {
 14644  	v_0 := v.Args[0]
 14645  	b := v.Block
 14646  	// match: (NotEqual (CMPconst [0] z:(AND x y)))
 14647  	// cond: z.Uses == 1
 14648  	// result: (NotEqual (TST x y))
 14649  	for {
 14650  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14651  			break
 14652  		}
 14653  		z := v_0.Args[0]
 14654  		if z.Op != ssaop.OpARM64AND {
 14655  			break
 14656  		}
 14657  		y := z.Args[1]
 14658  		x := z.Args[0]
 14659  		if !(z.Uses == 1) {
 14660  			break
 14661  		}
 14662  		v.Reset(ssaop.OpARM64NotEqual)
 14663  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TST, types.TypeFlags)
 14664  		v0.AddArg2(x, y)
 14665  		v.AddArg(v0)
 14666  		return true
 14667  	}
 14668  	// match: (NotEqual (CMPWconst [0] x:(ANDconst [c] y)))
 14669  	// cond: x.Uses == 1
 14670  	// result: (NotEqual (TSTWconst [int32(c)] y))
 14671  	for {
 14672  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14673  			break
 14674  		}
 14675  		x := v_0.Args[0]
 14676  		if x.Op != ssaop.OpARM64ANDconst {
 14677  			break
 14678  		}
 14679  		c := ssa.AuxIntToInt64(x.AuxInt)
 14680  		y := x.Args[0]
 14681  		if !(x.Uses == 1) {
 14682  			break
 14683  		}
 14684  		v.Reset(ssaop.OpARM64NotEqual)
 14685  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 14686  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 14687  		v0.AddArg(y)
 14688  		v.AddArg(v0)
 14689  		return true
 14690  	}
 14691  	// match: (NotEqual (CMPWconst [0] z:(AND x y)))
 14692  	// cond: z.Uses == 1
 14693  	// result: (NotEqual (TSTW x y))
 14694  	for {
 14695  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14696  			break
 14697  		}
 14698  		z := v_0.Args[0]
 14699  		if z.Op != ssaop.OpARM64AND {
 14700  			break
 14701  		}
 14702  		y := z.Args[1]
 14703  		x := z.Args[0]
 14704  		if !(z.Uses == 1) {
 14705  			break
 14706  		}
 14707  		v.Reset(ssaop.OpARM64NotEqual)
 14708  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 14709  		v0.AddArg2(x, y)
 14710  		v.AddArg(v0)
 14711  		return true
 14712  	}
 14713  	// match: (NotEqual (CMPconst [0] x:(ANDconst [c] y)))
 14714  	// cond: x.Uses == 1
 14715  	// result: (NotEqual (TSTconst [c] y))
 14716  	for {
 14717  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14718  			break
 14719  		}
 14720  		x := v_0.Args[0]
 14721  		if x.Op != ssaop.OpARM64ANDconst {
 14722  			break
 14723  		}
 14724  		c := ssa.AuxIntToInt64(x.AuxInt)
 14725  		y := x.Args[0]
 14726  		if !(x.Uses == 1) {
 14727  			break
 14728  		}
 14729  		v.Reset(ssaop.OpARM64NotEqual)
 14730  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 14731  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 14732  		v0.AddArg(y)
 14733  		v.AddArg(v0)
 14734  		return true
 14735  	}
 14736  	// match: (NotEqual (CMP x z:(NEG y)))
 14737  	// cond: z.Uses == 1
 14738  	// result: (NotEqual (CMN x y))
 14739  	for {
 14740  		if v_0.Op != ssaop.OpARM64CMP {
 14741  			break
 14742  		}
 14743  		_ = v_0.Args[1]
 14744  		x := v_0.Args[0]
 14745  		z := v_0.Args[1]
 14746  		if z.Op != ssaop.OpARM64NEG {
 14747  			break
 14748  		}
 14749  		y := z.Args[0]
 14750  		if !(z.Uses == 1) {
 14751  			break
 14752  		}
 14753  		v.Reset(ssaop.OpARM64NotEqual)
 14754  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 14755  		v0.AddArg2(x, y)
 14756  		v.AddArg(v0)
 14757  		return true
 14758  	}
 14759  	// match: (NotEqual (CMPW x z:(NEG y)))
 14760  	// cond: z.Uses == 1
 14761  	// result: (NotEqual (CMNW x y))
 14762  	for {
 14763  		if v_0.Op != ssaop.OpARM64CMPW {
 14764  			break
 14765  		}
 14766  		_ = v_0.Args[1]
 14767  		x := v_0.Args[0]
 14768  		z := v_0.Args[1]
 14769  		if z.Op != ssaop.OpARM64NEG {
 14770  			break
 14771  		}
 14772  		y := z.Args[0]
 14773  		if !(z.Uses == 1) {
 14774  			break
 14775  		}
 14776  		v.Reset(ssaop.OpARM64NotEqual)
 14777  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 14778  		v0.AddArg2(x, y)
 14779  		v.AddArg(v0)
 14780  		return true
 14781  	}
 14782  	// match: (NotEqual (CMPconst [0] x:(ADDconst [c] y)))
 14783  	// cond: x.Uses == 1
 14784  	// result: (NotEqual (CMNconst [c] y))
 14785  	for {
 14786  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14787  			break
 14788  		}
 14789  		x := v_0.Args[0]
 14790  		if x.Op != ssaop.OpARM64ADDconst {
 14791  			break
 14792  		}
 14793  		c := ssa.AuxIntToInt64(x.AuxInt)
 14794  		y := x.Args[0]
 14795  		if !(x.Uses == 1) {
 14796  			break
 14797  		}
 14798  		v.Reset(ssaop.OpARM64NotEqual)
 14799  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 14800  		v0.AuxInt = ssa.Int64ToAuxInt(c)
 14801  		v0.AddArg(y)
 14802  		v.AddArg(v0)
 14803  		return true
 14804  	}
 14805  	// match: (NotEqual (CMPWconst [0] x:(ADDconst [c] y)))
 14806  	// cond: x.Uses == 1
 14807  	// result: (NotEqual (CMNWconst [int32(c)] y))
 14808  	for {
 14809  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14810  			break
 14811  		}
 14812  		x := v_0.Args[0]
 14813  		if x.Op != ssaop.OpARM64ADDconst {
 14814  			break
 14815  		}
 14816  		c := ssa.AuxIntToInt64(x.AuxInt)
 14817  		y := x.Args[0]
 14818  		if !(x.Uses == 1) {
 14819  			break
 14820  		}
 14821  		v.Reset(ssaop.OpARM64NotEqual)
 14822  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 14823  		v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 14824  		v0.AddArg(y)
 14825  		v.AddArg(v0)
 14826  		return true
 14827  	}
 14828  	// match: (NotEqual (CMPconst [0] z:(ADD x y)))
 14829  	// cond: z.Uses == 1
 14830  	// result: (NotEqual (CMN x y))
 14831  	for {
 14832  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14833  			break
 14834  		}
 14835  		z := v_0.Args[0]
 14836  		if z.Op != ssaop.OpARM64ADD {
 14837  			break
 14838  		}
 14839  		y := z.Args[1]
 14840  		x := z.Args[0]
 14841  		if !(z.Uses == 1) {
 14842  			break
 14843  		}
 14844  		v.Reset(ssaop.OpARM64NotEqual)
 14845  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 14846  		v0.AddArg2(x, y)
 14847  		v.AddArg(v0)
 14848  		return true
 14849  	}
 14850  	// match: (NotEqual (CMPWconst [0] z:(ADD x y)))
 14851  	// cond: z.Uses == 1
 14852  	// result: (NotEqual (CMNW x y))
 14853  	for {
 14854  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14855  			break
 14856  		}
 14857  		z := v_0.Args[0]
 14858  		if z.Op != ssaop.OpARM64ADD {
 14859  			break
 14860  		}
 14861  		y := z.Args[1]
 14862  		x := z.Args[0]
 14863  		if !(z.Uses == 1) {
 14864  			break
 14865  		}
 14866  		v.Reset(ssaop.OpARM64NotEqual)
 14867  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 14868  		v0.AddArg2(x, y)
 14869  		v.AddArg(v0)
 14870  		return true
 14871  	}
 14872  	// match: (NotEqual (CMPconst [0] z:(MADD a x y)))
 14873  	// cond: z.Uses == 1
 14874  	// result: (NotEqual (CMN a (MUL <x.Type> x y)))
 14875  	for {
 14876  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14877  			break
 14878  		}
 14879  		z := v_0.Args[0]
 14880  		if z.Op != ssaop.OpARM64MADD {
 14881  			break
 14882  		}
 14883  		y := z.Args[2]
 14884  		a := z.Args[0]
 14885  		x := z.Args[1]
 14886  		if !(z.Uses == 1) {
 14887  			break
 14888  		}
 14889  		v.Reset(ssaop.OpARM64NotEqual)
 14890  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 14891  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
 14892  		v1.AddArg2(x, y)
 14893  		v0.AddArg2(a, v1)
 14894  		v.AddArg(v0)
 14895  		return true
 14896  	}
 14897  	// match: (NotEqual (CMPWconst [0] z:(MADDW a x y)))
 14898  	// cond: z.Uses == 1
 14899  	// result: (NotEqual (CMNW a (MULW <x.Type> x y)))
 14900  	for {
 14901  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14902  			break
 14903  		}
 14904  		z := v_0.Args[0]
 14905  		if z.Op != ssaop.OpARM64MADDW {
 14906  			break
 14907  		}
 14908  		y := z.Args[2]
 14909  		a := z.Args[0]
 14910  		x := z.Args[1]
 14911  		if !(z.Uses == 1) {
 14912  			break
 14913  		}
 14914  		v.Reset(ssaop.OpARM64NotEqual)
 14915  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 14916  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
 14917  		v1.AddArg2(x, y)
 14918  		v0.AddArg2(a, v1)
 14919  		v.AddArg(v0)
 14920  		return true
 14921  	}
 14922  	// match: (NotEqual (CMPconst [0] z:(MSUB a x y)))
 14923  	// cond: z.Uses == 1
 14924  	// result: (NotEqual (CMP a (MUL <x.Type> x y)))
 14925  	for {
 14926  		if v_0.Op != ssaop.OpARM64CMPconst || ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 14927  			break
 14928  		}
 14929  		z := v_0.Args[0]
 14930  		if z.Op != ssaop.OpARM64MSUB {
 14931  			break
 14932  		}
 14933  		y := z.Args[2]
 14934  		a := z.Args[0]
 14935  		x := z.Args[1]
 14936  		if !(z.Uses == 1) {
 14937  			break
 14938  		}
 14939  		v.Reset(ssaop.OpARM64NotEqual)
 14940  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 14941  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MUL, x.Type)
 14942  		v1.AddArg2(x, y)
 14943  		v0.AddArg2(a, v1)
 14944  		v.AddArg(v0)
 14945  		return true
 14946  	}
 14947  	// match: (NotEqual (CMPWconst [0] z:(MSUBW a x y)))
 14948  	// cond: z.Uses == 1
 14949  	// result: (NotEqual (CMPW a (MULW <x.Type> x y)))
 14950  	for {
 14951  		if v_0.Op != ssaop.OpARM64CMPWconst || ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 14952  			break
 14953  		}
 14954  		z := v_0.Args[0]
 14955  		if z.Op != ssaop.OpARM64MSUBW {
 14956  			break
 14957  		}
 14958  		y := z.Args[2]
 14959  		a := z.Args[0]
 14960  		x := z.Args[1]
 14961  		if !(z.Uses == 1) {
 14962  			break
 14963  		}
 14964  		v.Reset(ssaop.OpARM64NotEqual)
 14965  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 14966  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MULW, x.Type)
 14967  		v1.AddArg2(x, y)
 14968  		v0.AddArg2(a, v1)
 14969  		v.AddArg(v0)
 14970  		return true
 14971  	}
 14972  	// match: (NotEqual (FlagConstant [fc]))
 14973  	// result: (MOVDconst [ssa.B2i(fc.Ne())])
 14974  	for {
 14975  		if v_0.Op != ssaop.OpARM64FlagConstant {
 14976  			break
 14977  		}
 14978  		fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 14979  		v.Reset(ssaop.OpARM64MOVDconst)
 14980  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(fc.Ne()))
 14981  		return true
 14982  	}
 14983  	// match: (NotEqual (InvertFlags x))
 14984  	// result: (NotEqual x)
 14985  	for {
 14986  		if v_0.Op != ssaop.OpARM64InvertFlags {
 14987  			break
 14988  		}
 14989  		x := v_0.Args[0]
 14990  		v.Reset(ssaop.OpARM64NotEqual)
 14991  		v.AddArg(x)
 14992  		return true
 14993  	}
 14994  	return false
 14995  }
 14996  func rewriteValue_OpARM64OR(v *ssa.Value) bool {
 14997  	v_1 := v.Args[1]
 14998  	v_0 := v.Args[0]
 14999  	// match: (OR x (MOVDconst [c]))
 15000  	// result: (ORconst [c] x)
 15001  	for {
 15002  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15003  			x := v_0
 15004  			if v_1.Op != ssaop.OpARM64MOVDconst {
 15005  				continue
 15006  			}
 15007  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 15008  			v.Reset(ssaop.OpARM64ORconst)
 15009  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15010  			v.AddArg(x)
 15011  			return true
 15012  		}
 15013  		break
 15014  	}
 15015  	// match: (OR x x)
 15016  	// result: x
 15017  	for {
 15018  		x := v_0
 15019  		if x != v_1 {
 15020  			break
 15021  		}
 15022  		v.CopyOf(x)
 15023  		return true
 15024  	}
 15025  	// match: (OR x (MVN y))
 15026  	// result: (ORN x y)
 15027  	for {
 15028  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15029  			x := v_0
 15030  			if v_1.Op != ssaop.OpARM64MVN {
 15031  				continue
 15032  			}
 15033  			y := v_1.Args[0]
 15034  			v.Reset(ssaop.OpARM64ORN)
 15035  			v.AddArg2(x, y)
 15036  			return true
 15037  		}
 15038  		break
 15039  	}
 15040  	// match: (OR x0 x1:(SLLconst [c] y))
 15041  	// cond: ssa.ClobberIfDead(x1)
 15042  	// result: (ORshiftLL x0 y [c])
 15043  	for {
 15044  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15045  			x0 := v_0
 15046  			x1 := v_1
 15047  			if x1.Op != ssaop.OpARM64SLLconst {
 15048  				continue
 15049  			}
 15050  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15051  			y := x1.Args[0]
 15052  			if !(ssa.ClobberIfDead(x1)) {
 15053  				continue
 15054  			}
 15055  			v.Reset(ssaop.OpARM64ORshiftLL)
 15056  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15057  			v.AddArg2(x0, y)
 15058  			return true
 15059  		}
 15060  		break
 15061  	}
 15062  	// match: (OR x0 x1:(SRLconst [c] y))
 15063  	// cond: ssa.ClobberIfDead(x1)
 15064  	// result: (ORshiftRL x0 y [c])
 15065  	for {
 15066  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15067  			x0 := v_0
 15068  			x1 := v_1
 15069  			if x1.Op != ssaop.OpARM64SRLconst {
 15070  				continue
 15071  			}
 15072  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15073  			y := x1.Args[0]
 15074  			if !(ssa.ClobberIfDead(x1)) {
 15075  				continue
 15076  			}
 15077  			v.Reset(ssaop.OpARM64ORshiftRL)
 15078  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15079  			v.AddArg2(x0, y)
 15080  			return true
 15081  		}
 15082  		break
 15083  	}
 15084  	// match: (OR x0 x1:(SRAconst [c] y))
 15085  	// cond: ssa.ClobberIfDead(x1)
 15086  	// result: (ORshiftRA x0 y [c])
 15087  	for {
 15088  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15089  			x0 := v_0
 15090  			x1 := v_1
 15091  			if x1.Op != ssaop.OpARM64SRAconst {
 15092  				continue
 15093  			}
 15094  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15095  			y := x1.Args[0]
 15096  			if !(ssa.ClobberIfDead(x1)) {
 15097  				continue
 15098  			}
 15099  			v.Reset(ssaop.OpARM64ORshiftRA)
 15100  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15101  			v.AddArg2(x0, y)
 15102  			return true
 15103  		}
 15104  		break
 15105  	}
 15106  	// match: (OR x0 x1:(RORconst [c] y))
 15107  	// cond: ssa.ClobberIfDead(x1)
 15108  	// result: (ORshiftRO x0 y [c])
 15109  	for {
 15110  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15111  			x0 := v_0
 15112  			x1 := v_1
 15113  			if x1.Op != ssaop.OpARM64RORconst {
 15114  				continue
 15115  			}
 15116  			c := ssa.AuxIntToInt64(x1.AuxInt)
 15117  			y := x1.Args[0]
 15118  			if !(ssa.ClobberIfDead(x1)) {
 15119  				continue
 15120  			}
 15121  			v.Reset(ssaop.OpARM64ORshiftRO)
 15122  			v.AuxInt = ssa.Int64ToAuxInt(c)
 15123  			v.AddArg2(x0, y)
 15124  			return true
 15125  		}
 15126  		break
 15127  	}
 15128  	// match: (OR (UBFIZ [bfc] x) (ANDconst [ac] y))
 15129  	// cond: ac == ^((1<<uint(bfc.Width())-1) << uint(bfc.Lsb()))
 15130  	// result: (BFI [bfc] y x)
 15131  	for {
 15132  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15133  			if v_0.Op != ssaop.OpARM64UBFIZ {
 15134  				continue
 15135  			}
 15136  			bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15137  			x := v_0.Args[0]
 15138  			if v_1.Op != ssaop.OpARM64ANDconst {
 15139  				continue
 15140  			}
 15141  			ac := ssa.AuxIntToInt64(v_1.AuxInt)
 15142  			y := v_1.Args[0]
 15143  			if !(ac == ^((1<<uint(bfc.Width()) - 1) << uint(bfc.Lsb()))) {
 15144  				continue
 15145  			}
 15146  			v.Reset(ssaop.OpARM64BFI)
 15147  			v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 15148  			v.AddArg2(y, x)
 15149  			return true
 15150  		}
 15151  		break
 15152  	}
 15153  	// match: (OR (UBFX [bfc] x) (ANDconst [ac] y))
 15154  	// cond: ac == ^(1<<uint(bfc.Width())-1)
 15155  	// result: (BFXIL [bfc] y x)
 15156  	for {
 15157  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 15158  			if v_0.Op != ssaop.OpARM64UBFX {
 15159  				continue
 15160  			}
 15161  			bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15162  			x := v_0.Args[0]
 15163  			if v_1.Op != ssaop.OpARM64ANDconst {
 15164  				continue
 15165  			}
 15166  			ac := ssa.AuxIntToInt64(v_1.AuxInt)
 15167  			y := v_1.Args[0]
 15168  			if !(ac == ^(1<<uint(bfc.Width()) - 1)) {
 15169  				continue
 15170  			}
 15171  			v.Reset(ssaop.OpARM64BFXIL)
 15172  			v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 15173  			v.AddArg2(y, x)
 15174  			return true
 15175  		}
 15176  		break
 15177  	}
 15178  	return false
 15179  }
 15180  func rewriteValue_OpARM64ORN(v *ssa.Value) bool {
 15181  	v_1 := v.Args[1]
 15182  	v_0 := v.Args[0]
 15183  	// match: (ORN x (MOVDconst [c]))
 15184  	// result: (ORconst [^c] x)
 15185  	for {
 15186  		x := v_0
 15187  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15188  			break
 15189  		}
 15190  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15191  		v.Reset(ssaop.OpARM64ORconst)
 15192  		v.AuxInt = ssa.Int64ToAuxInt(^c)
 15193  		v.AddArg(x)
 15194  		return true
 15195  	}
 15196  	// match: (ORN x x)
 15197  	// result: (MOVDconst [-1])
 15198  	for {
 15199  		x := v_0
 15200  		if x != v_1 {
 15201  			break
 15202  		}
 15203  		v.Reset(ssaop.OpARM64MOVDconst)
 15204  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15205  		return true
 15206  	}
 15207  	// match: (ORN x0 x1:(SLLconst [c] y))
 15208  	// cond: ssa.ClobberIfDead(x1)
 15209  	// result: (ORNshiftLL x0 y [c])
 15210  	for {
 15211  		x0 := v_0
 15212  		x1 := v_1
 15213  		if x1.Op != ssaop.OpARM64SLLconst {
 15214  			break
 15215  		}
 15216  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15217  		y := x1.Args[0]
 15218  		if !(ssa.ClobberIfDead(x1)) {
 15219  			break
 15220  		}
 15221  		v.Reset(ssaop.OpARM64ORNshiftLL)
 15222  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15223  		v.AddArg2(x0, y)
 15224  		return true
 15225  	}
 15226  	// match: (ORN x0 x1:(SRLconst [c] y))
 15227  	// cond: ssa.ClobberIfDead(x1)
 15228  	// result: (ORNshiftRL x0 y [c])
 15229  	for {
 15230  		x0 := v_0
 15231  		x1 := v_1
 15232  		if x1.Op != ssaop.OpARM64SRLconst {
 15233  			break
 15234  		}
 15235  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15236  		y := x1.Args[0]
 15237  		if !(ssa.ClobberIfDead(x1)) {
 15238  			break
 15239  		}
 15240  		v.Reset(ssaop.OpARM64ORNshiftRL)
 15241  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15242  		v.AddArg2(x0, y)
 15243  		return true
 15244  	}
 15245  	// match: (ORN x0 x1:(SRAconst [c] y))
 15246  	// cond: ssa.ClobberIfDead(x1)
 15247  	// result: (ORNshiftRA x0 y [c])
 15248  	for {
 15249  		x0 := v_0
 15250  		x1 := v_1
 15251  		if x1.Op != ssaop.OpARM64SRAconst {
 15252  			break
 15253  		}
 15254  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15255  		y := x1.Args[0]
 15256  		if !(ssa.ClobberIfDead(x1)) {
 15257  			break
 15258  		}
 15259  		v.Reset(ssaop.OpARM64ORNshiftRA)
 15260  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15261  		v.AddArg2(x0, y)
 15262  		return true
 15263  	}
 15264  	// match: (ORN x0 x1:(RORconst [c] y))
 15265  	// cond: ssa.ClobberIfDead(x1)
 15266  	// result: (ORNshiftRO x0 y [c])
 15267  	for {
 15268  		x0 := v_0
 15269  		x1 := v_1
 15270  		if x1.Op != ssaop.OpARM64RORconst {
 15271  			break
 15272  		}
 15273  		c := ssa.AuxIntToInt64(x1.AuxInt)
 15274  		y := x1.Args[0]
 15275  		if !(ssa.ClobberIfDead(x1)) {
 15276  			break
 15277  		}
 15278  		v.Reset(ssaop.OpARM64ORNshiftRO)
 15279  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15280  		v.AddArg2(x0, y)
 15281  		return true
 15282  	}
 15283  	return false
 15284  }
 15285  func rewriteValue_OpARM64ORNshiftLL(v *ssa.Value) bool {
 15286  	v_1 := v.Args[1]
 15287  	v_0 := v.Args[0]
 15288  	// match: (ORNshiftLL x (MOVDconst [c]) [d])
 15289  	// result: (ORconst x [^int64(uint64(c)<<uint64(d))])
 15290  	for {
 15291  		d := ssa.AuxIntToInt64(v.AuxInt)
 15292  		x := v_0
 15293  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15294  			break
 15295  		}
 15296  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15297  		v.Reset(ssaop.OpARM64ORconst)
 15298  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) << uint64(d)))
 15299  		v.AddArg(x)
 15300  		return true
 15301  	}
 15302  	// match: (ORNshiftLL (SLLconst x [c]) x [c])
 15303  	// result: (MOVDconst [-1])
 15304  	for {
 15305  		c := ssa.AuxIntToInt64(v.AuxInt)
 15306  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15307  			break
 15308  		}
 15309  		x := v_0.Args[0]
 15310  		if x != v_1 {
 15311  			break
 15312  		}
 15313  		v.Reset(ssaop.OpARM64MOVDconst)
 15314  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15315  		return true
 15316  	}
 15317  	return false
 15318  }
 15319  func rewriteValue_OpARM64ORNshiftRA(v *ssa.Value) bool {
 15320  	v_1 := v.Args[1]
 15321  	v_0 := v.Args[0]
 15322  	// match: (ORNshiftRA x (MOVDconst [c]) [d])
 15323  	// result: (ORconst x [^(c>>uint64(d))])
 15324  	for {
 15325  		d := ssa.AuxIntToInt64(v.AuxInt)
 15326  		x := v_0
 15327  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15328  			break
 15329  		}
 15330  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15331  		v.Reset(ssaop.OpARM64ORconst)
 15332  		v.AuxInt = ssa.Int64ToAuxInt(^(c >> uint64(d)))
 15333  		v.AddArg(x)
 15334  		return true
 15335  	}
 15336  	// match: (ORNshiftRA (SRAconst x [c]) x [c])
 15337  	// result: (MOVDconst [-1])
 15338  	for {
 15339  		c := ssa.AuxIntToInt64(v.AuxInt)
 15340  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15341  			break
 15342  		}
 15343  		x := v_0.Args[0]
 15344  		if x != v_1 {
 15345  			break
 15346  		}
 15347  		v.Reset(ssaop.OpARM64MOVDconst)
 15348  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15349  		return true
 15350  	}
 15351  	return false
 15352  }
 15353  func rewriteValue_OpARM64ORNshiftRL(v *ssa.Value) bool {
 15354  	v_1 := v.Args[1]
 15355  	v_0 := v.Args[0]
 15356  	// match: (ORNshiftRL x (MOVDconst [c]) [d])
 15357  	// result: (ORconst x [^int64(uint64(c)>>uint64(d))])
 15358  	for {
 15359  		d := ssa.AuxIntToInt64(v.AuxInt)
 15360  		x := v_0
 15361  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15362  			break
 15363  		}
 15364  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15365  		v.Reset(ssaop.OpARM64ORconst)
 15366  		v.AuxInt = ssa.Int64ToAuxInt(^int64(uint64(c) >> uint64(d)))
 15367  		v.AddArg(x)
 15368  		return true
 15369  	}
 15370  	// match: (ORNshiftRL (SRLconst x [c]) x [c])
 15371  	// result: (MOVDconst [-1])
 15372  	for {
 15373  		c := ssa.AuxIntToInt64(v.AuxInt)
 15374  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15375  			break
 15376  		}
 15377  		x := v_0.Args[0]
 15378  		if x != v_1 {
 15379  			break
 15380  		}
 15381  		v.Reset(ssaop.OpARM64MOVDconst)
 15382  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15383  		return true
 15384  	}
 15385  	return false
 15386  }
 15387  func rewriteValue_OpARM64ORNshiftRO(v *ssa.Value) bool {
 15388  	v_1 := v.Args[1]
 15389  	v_0 := v.Args[0]
 15390  	// match: (ORNshiftRO x (MOVDconst [c]) [d])
 15391  	// result: (ORconst x [^rotateRight64(c, d)])
 15392  	for {
 15393  		d := ssa.AuxIntToInt64(v.AuxInt)
 15394  		x := v_0
 15395  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15396  			break
 15397  		}
 15398  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15399  		v.Reset(ssaop.OpARM64ORconst)
 15400  		v.AuxInt = ssa.Int64ToAuxInt(^rotateRight64(c, d))
 15401  		v.AddArg(x)
 15402  		return true
 15403  	}
 15404  	// match: (ORNshiftRO (RORconst x [c]) x [c])
 15405  	// result: (MOVDconst [-1])
 15406  	for {
 15407  		c := ssa.AuxIntToInt64(v.AuxInt)
 15408  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 15409  			break
 15410  		}
 15411  		x := v_0.Args[0]
 15412  		if x != v_1 {
 15413  			break
 15414  		}
 15415  		v.Reset(ssaop.OpARM64MOVDconst)
 15416  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15417  		return true
 15418  	}
 15419  	return false
 15420  }
 15421  func rewriteValue_OpARM64ORconst(v *ssa.Value) bool {
 15422  	v_0 := v.Args[0]
 15423  	// match: (ORconst [0] x)
 15424  	// result: x
 15425  	for {
 15426  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 15427  			break
 15428  		}
 15429  		x := v_0
 15430  		v.CopyOf(x)
 15431  		return true
 15432  	}
 15433  	// match: (ORconst [-1] _)
 15434  	// result: (MOVDconst [-1])
 15435  	for {
 15436  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
 15437  			break
 15438  		}
 15439  		v.Reset(ssaop.OpARM64MOVDconst)
 15440  		v.AuxInt = ssa.Int64ToAuxInt(-1)
 15441  		return true
 15442  	}
 15443  	// match: (ORconst [c] (MOVDconst [d]))
 15444  	// result: (MOVDconst [c|d])
 15445  	for {
 15446  		c := ssa.AuxIntToInt64(v.AuxInt)
 15447  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15448  			break
 15449  		}
 15450  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 15451  		v.Reset(ssaop.OpARM64MOVDconst)
 15452  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
 15453  		return true
 15454  	}
 15455  	// match: (ORconst [c] (ORconst [d] x))
 15456  	// result: (ORconst [c|d] x)
 15457  	for {
 15458  		c := ssa.AuxIntToInt64(v.AuxInt)
 15459  		if v_0.Op != ssaop.OpARM64ORconst {
 15460  			break
 15461  		}
 15462  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 15463  		x := v_0.Args[0]
 15464  		v.Reset(ssaop.OpARM64ORconst)
 15465  		v.AuxInt = ssa.Int64ToAuxInt(c | d)
 15466  		v.AddArg(x)
 15467  		return true
 15468  	}
 15469  	// match: (ORconst [c1] (ANDconst [c2] x))
 15470  	// cond: c2|c1 == ^0
 15471  	// result: (ORconst [c1] x)
 15472  	for {
 15473  		c1 := ssa.AuxIntToInt64(v.AuxInt)
 15474  		if v_0.Op != ssaop.OpARM64ANDconst {
 15475  			break
 15476  		}
 15477  		c2 := ssa.AuxIntToInt64(v_0.AuxInt)
 15478  		x := v_0.Args[0]
 15479  		if !(c2|c1 == ^0) {
 15480  			break
 15481  		}
 15482  		v.Reset(ssaop.OpARM64ORconst)
 15483  		v.AuxInt = ssa.Int64ToAuxInt(c1)
 15484  		v.AddArg(x)
 15485  		return true
 15486  	}
 15487  	return false
 15488  }
 15489  func rewriteValue_OpARM64ORshiftLL(v *ssa.Value) bool {
 15490  	v_1 := v.Args[1]
 15491  	v_0 := v.Args[0]
 15492  	b := v.Block
 15493  	typ := &b.Func.Config.Types
 15494  	// match: (ORshiftLL (MOVDconst [c]) x [d])
 15495  	// result: (ORconst [c] (SLLconst <x.Type> x [d]))
 15496  	for {
 15497  		d := ssa.AuxIntToInt64(v.AuxInt)
 15498  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15499  			break
 15500  		}
 15501  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15502  		x := v_1
 15503  		v.Reset(ssaop.OpARM64ORconst)
 15504  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15505  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 15506  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 15507  		v0.AddArg(x)
 15508  		v.AddArg(v0)
 15509  		return true
 15510  	}
 15511  	// match: (ORshiftLL x (MOVDconst [c]) [d])
 15512  	// result: (ORconst x [int64(uint64(c)<<uint64(d))])
 15513  	for {
 15514  		d := ssa.AuxIntToInt64(v.AuxInt)
 15515  		x := v_0
 15516  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15517  			break
 15518  		}
 15519  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15520  		v.Reset(ssaop.OpARM64ORconst)
 15521  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 15522  		v.AddArg(x)
 15523  		return true
 15524  	}
 15525  	// match: (ORshiftLL y:(SLLconst x [c]) x [c])
 15526  	// result: y
 15527  	for {
 15528  		c := ssa.AuxIntToInt64(v.AuxInt)
 15529  		y := v_0
 15530  		if y.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 15531  			break
 15532  		}
 15533  		x := y.Args[0]
 15534  		if x != v_1 {
 15535  			break
 15536  		}
 15537  		v.CopyOf(y)
 15538  		return true
 15539  	}
 15540  	// match: (ORshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
 15541  	// result: (REV16W x)
 15542  	for {
 15543  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
 15544  			break
 15545  		}
 15546  		x := v_0.Args[0]
 15547  		if x != v_1 {
 15548  			break
 15549  		}
 15550  		v.Reset(ssaop.OpARM64REV16W)
 15551  		v.AddArg(x)
 15552  		return true
 15553  	}
 15554  	// match: (ORshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
 15555  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
 15556  	// result: (REV16W x)
 15557  	for {
 15558  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
 15559  			break
 15560  		}
 15561  		v_0_0 := v_0.Args[0]
 15562  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 15563  			break
 15564  		}
 15565  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 15566  		x := v_0_0.Args[0]
 15567  		if v_1.Op != ssaop.OpARM64ANDconst {
 15568  			break
 15569  		}
 15570  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 15571  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
 15572  			break
 15573  		}
 15574  		v.Reset(ssaop.OpARM64REV16W)
 15575  		v.AddArg(x)
 15576  		return true
 15577  	}
 15578  	// match: (ORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 15579  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
 15580  	// result: (REV16 x)
 15581  	for {
 15582  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 15583  			break
 15584  		}
 15585  		v_0_0 := v_0.Args[0]
 15586  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 15587  			break
 15588  		}
 15589  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 15590  		x := v_0_0.Args[0]
 15591  		if v_1.Op != ssaop.OpARM64ANDconst {
 15592  			break
 15593  		}
 15594  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 15595  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
 15596  			break
 15597  		}
 15598  		v.Reset(ssaop.OpARM64REV16)
 15599  		v.AddArg(x)
 15600  		return true
 15601  	}
 15602  	// match: (ORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 15603  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
 15604  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
 15605  	for {
 15606  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 15607  			break
 15608  		}
 15609  		v_0_0 := v_0.Args[0]
 15610  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 15611  			break
 15612  		}
 15613  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 15614  		x := v_0_0.Args[0]
 15615  		if v_1.Op != ssaop.OpARM64ANDconst {
 15616  			break
 15617  		}
 15618  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 15619  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
 15620  			break
 15621  		}
 15622  		v.Reset(ssaop.OpARM64REV16)
 15623  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
 15624  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
 15625  		v0.AddArg(x)
 15626  		v.AddArg(v0)
 15627  		return true
 15628  	}
 15629  	// match: ( ORshiftLL [c] (SRLconst x [64-c]) x2)
 15630  	// result: (EXTRconst [64-c] x2 x)
 15631  	for {
 15632  		c := ssa.AuxIntToInt64(v.AuxInt)
 15633  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
 15634  			break
 15635  		}
 15636  		x := v_0.Args[0]
 15637  		x2 := v_1
 15638  		v.Reset(ssaop.OpARM64EXTRconst)
 15639  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
 15640  		v.AddArg2(x2, x)
 15641  		return true
 15642  	}
 15643  	// match: ( ORshiftLL <t> [c] (UBFX [bfc] x) x2)
 15644  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
 15645  	// result: (EXTRWconst [32-c] x2 x)
 15646  	for {
 15647  		t := v.Type
 15648  		c := ssa.AuxIntToInt64(v.AuxInt)
 15649  		if v_0.Op != ssaop.OpARM64UBFX {
 15650  			break
 15651  		}
 15652  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15653  		x := v_0.Args[0]
 15654  		x2 := v_1
 15655  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
 15656  			break
 15657  		}
 15658  		v.Reset(ssaop.OpARM64EXTRWconst)
 15659  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
 15660  		v.AddArg2(x2, x)
 15661  		return true
 15662  	}
 15663  	// match: (ORshiftLL [s] (ANDconst [xc] x) (ANDconst [yc] y))
 15664  	// cond: xc == ^(yc << s) && yc & (yc+1) == 0 && yc > 0 && s+ssa.Log64(yc+1) <= 64
 15665  	// result: (BFI [ssa.ArmBFAuxInt(s, ssa.Log64(yc+1))] x y)
 15666  	for {
 15667  		s := ssa.AuxIntToInt64(v.AuxInt)
 15668  		if v_0.Op != ssaop.OpARM64ANDconst {
 15669  			break
 15670  		}
 15671  		xc := ssa.AuxIntToInt64(v_0.AuxInt)
 15672  		x := v_0.Args[0]
 15673  		if v_1.Op != ssaop.OpARM64ANDconst {
 15674  			break
 15675  		}
 15676  		yc := ssa.AuxIntToInt64(v_1.AuxInt)
 15677  		y := v_1.Args[0]
 15678  		if !(xc == ^(yc<<s) && yc&(yc+1) == 0 && yc > 0 && s+ssa.Log64(yc+1) <= 64) {
 15679  			break
 15680  		}
 15681  		v.Reset(ssaop.OpARM64BFI)
 15682  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(s, ssa.Log64(yc+1)))
 15683  		v.AddArg2(x, y)
 15684  		return true
 15685  	}
 15686  	// match: (ORshiftLL [sc] (UBFX [bfc] x) (SRLconst [sc] y))
 15687  	// cond: sc == bfc.Width()
 15688  	// result: (BFXIL [bfc] y x)
 15689  	for {
 15690  		sc := ssa.AuxIntToInt64(v.AuxInt)
 15691  		if v_0.Op != ssaop.OpARM64UBFX {
 15692  			break
 15693  		}
 15694  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 15695  		x := v_0.Args[0]
 15696  		if v_1.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_1.AuxInt) != sc {
 15697  			break
 15698  		}
 15699  		y := v_1.Args[0]
 15700  		if !(sc == bfc.Width()) {
 15701  			break
 15702  		}
 15703  		v.Reset(ssaop.OpARM64BFXIL)
 15704  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 15705  		v.AddArg2(y, x)
 15706  		return true
 15707  	}
 15708  	return false
 15709  }
 15710  func rewriteValue_OpARM64ORshiftRA(v *ssa.Value) bool {
 15711  	v_1 := v.Args[1]
 15712  	v_0 := v.Args[0]
 15713  	b := v.Block
 15714  	// match: (ORshiftRA (MOVDconst [c]) x [d])
 15715  	// result: (ORconst [c] (SRAconst <x.Type> x [d]))
 15716  	for {
 15717  		d := ssa.AuxIntToInt64(v.AuxInt)
 15718  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15719  			break
 15720  		}
 15721  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15722  		x := v_1
 15723  		v.Reset(ssaop.OpARM64ORconst)
 15724  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15725  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 15726  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 15727  		v0.AddArg(x)
 15728  		v.AddArg(v0)
 15729  		return true
 15730  	}
 15731  	// match: (ORshiftRA x (MOVDconst [c]) [d])
 15732  	// result: (ORconst x [c>>uint64(d)])
 15733  	for {
 15734  		d := ssa.AuxIntToInt64(v.AuxInt)
 15735  		x := v_0
 15736  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15737  			break
 15738  		}
 15739  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15740  		v.Reset(ssaop.OpARM64ORconst)
 15741  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 15742  		v.AddArg(x)
 15743  		return true
 15744  	}
 15745  	// match: (ORshiftRA y:(SRAconst x [c]) x [c])
 15746  	// result: y
 15747  	for {
 15748  		c := ssa.AuxIntToInt64(v.AuxInt)
 15749  		y := v_0
 15750  		if y.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 15751  			break
 15752  		}
 15753  		x := y.Args[0]
 15754  		if x != v_1 {
 15755  			break
 15756  		}
 15757  		v.CopyOf(y)
 15758  		return true
 15759  	}
 15760  	return false
 15761  }
 15762  func rewriteValue_OpARM64ORshiftRL(v *ssa.Value) bool {
 15763  	v_1 := v.Args[1]
 15764  	v_0 := v.Args[0]
 15765  	b := v.Block
 15766  	// match: (ORshiftRL (MOVDconst [c]) x [d])
 15767  	// result: (ORconst [c] (SRLconst <x.Type> x [d]))
 15768  	for {
 15769  		d := ssa.AuxIntToInt64(v.AuxInt)
 15770  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15771  			break
 15772  		}
 15773  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15774  		x := v_1
 15775  		v.Reset(ssaop.OpARM64ORconst)
 15776  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15777  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 15778  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 15779  		v0.AddArg(x)
 15780  		v.AddArg(v0)
 15781  		return true
 15782  	}
 15783  	// match: (ORshiftRL x (MOVDconst [c]) [d])
 15784  	// result: (ORconst x [int64(uint64(c)>>uint64(d))])
 15785  	for {
 15786  		d := ssa.AuxIntToInt64(v.AuxInt)
 15787  		x := v_0
 15788  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15789  			break
 15790  		}
 15791  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15792  		v.Reset(ssaop.OpARM64ORconst)
 15793  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 15794  		v.AddArg(x)
 15795  		return true
 15796  	}
 15797  	// match: (ORshiftRL y:(SRLconst x [c]) x [c])
 15798  	// result: y
 15799  	for {
 15800  		c := ssa.AuxIntToInt64(v.AuxInt)
 15801  		y := v_0
 15802  		if y.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 15803  			break
 15804  		}
 15805  		x := y.Args[0]
 15806  		if x != v_1 {
 15807  			break
 15808  		}
 15809  		v.CopyOf(y)
 15810  		return true
 15811  	}
 15812  	// match: (ORshiftRL [rc] (ANDconst [ac] x) (SLLconst [lc] y))
 15813  	// cond: lc > rc && ac == ^((1<<uint(64-lc)-1) << uint64(lc-rc))
 15814  	// result: (BFI [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x y)
 15815  	for {
 15816  		rc := ssa.AuxIntToInt64(v.AuxInt)
 15817  		if v_0.Op != ssaop.OpARM64ANDconst {
 15818  			break
 15819  		}
 15820  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 15821  		x := v_0.Args[0]
 15822  		if v_1.Op != ssaop.OpARM64SLLconst {
 15823  			break
 15824  		}
 15825  		lc := ssa.AuxIntToInt64(v_1.AuxInt)
 15826  		y := v_1.Args[0]
 15827  		if !(lc > rc && ac == ^((1<<uint(64-lc)-1)<<uint64(lc-rc))) {
 15828  			break
 15829  		}
 15830  		v.Reset(ssaop.OpARM64BFI)
 15831  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 15832  		v.AddArg2(x, y)
 15833  		return true
 15834  	}
 15835  	// match: (ORshiftRL [rc] (ANDconst [ac] y) (SLLconst [lc] x))
 15836  	// cond: lc < rc && ac == ^((1<<uint(64-rc)-1))
 15837  	// result: (BFXIL [ssa.ArmBFAuxInt(rc-lc, 64-rc)] y x)
 15838  	for {
 15839  		rc := ssa.AuxIntToInt64(v.AuxInt)
 15840  		if v_0.Op != ssaop.OpARM64ANDconst {
 15841  			break
 15842  		}
 15843  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 15844  		y := v_0.Args[0]
 15845  		if v_1.Op != ssaop.OpARM64SLLconst {
 15846  			break
 15847  		}
 15848  		lc := ssa.AuxIntToInt64(v_1.AuxInt)
 15849  		x := v_1.Args[0]
 15850  		if !(lc < rc && ac == ^(1<<uint(64-rc)-1)) {
 15851  			break
 15852  		}
 15853  		v.Reset(ssaop.OpARM64BFXIL)
 15854  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 15855  		v.AddArg2(y, x)
 15856  		return true
 15857  	}
 15858  	return false
 15859  }
 15860  func rewriteValue_OpARM64ORshiftRO(v *ssa.Value) bool {
 15861  	v_1 := v.Args[1]
 15862  	v_0 := v.Args[0]
 15863  	b := v.Block
 15864  	// match: (ORshiftRO (MOVDconst [c]) x [d])
 15865  	// result: (ORconst [c] (RORconst <x.Type> x [d]))
 15866  	for {
 15867  		d := ssa.AuxIntToInt64(v.AuxInt)
 15868  		if v_0.Op != ssaop.OpARM64MOVDconst {
 15869  			break
 15870  		}
 15871  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 15872  		x := v_1
 15873  		v.Reset(ssaop.OpARM64ORconst)
 15874  		v.AuxInt = ssa.Int64ToAuxInt(c)
 15875  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 15876  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 15877  		v0.AddArg(x)
 15878  		v.AddArg(v0)
 15879  		return true
 15880  	}
 15881  	// match: (ORshiftRO x (MOVDconst [c]) [d])
 15882  	// result: (ORconst x [rotateRight64(c, d)])
 15883  	for {
 15884  		d := ssa.AuxIntToInt64(v.AuxInt)
 15885  		x := v_0
 15886  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15887  			break
 15888  		}
 15889  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15890  		v.Reset(ssaop.OpARM64ORconst)
 15891  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 15892  		v.AddArg(x)
 15893  		return true
 15894  	}
 15895  	// match: (ORshiftRO y:(RORconst x [c]) x [c])
 15896  	// result: y
 15897  	for {
 15898  		c := ssa.AuxIntToInt64(v.AuxInt)
 15899  		y := v_0
 15900  		if y.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(y.AuxInt) != c {
 15901  			break
 15902  		}
 15903  		x := y.Args[0]
 15904  		if x != v_1 {
 15905  			break
 15906  		}
 15907  		v.CopyOf(y)
 15908  		return true
 15909  	}
 15910  	return false
 15911  }
 15912  func rewriteValue_OpARM64REV(v *ssa.Value) bool {
 15913  	v_0 := v.Args[0]
 15914  	// match: (REV (REV p))
 15915  	// result: p
 15916  	for {
 15917  		if v_0.Op != ssaop.OpARM64REV {
 15918  			break
 15919  		}
 15920  		p := v_0.Args[0]
 15921  		v.CopyOf(p)
 15922  		return true
 15923  	}
 15924  	return false
 15925  }
 15926  func rewriteValue_OpARM64REV16(v *ssa.Value) bool {
 15927  	v_0 := v.Args[0]
 15928  	// match: (REV16 (MOVWUreg x))
 15929  	// result: (REV16W x)
 15930  	for {
 15931  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 15932  			break
 15933  		}
 15934  		x := v_0.Args[0]
 15935  		v.Reset(ssaop.OpARM64REV16W)
 15936  		v.AddArg(x)
 15937  		return true
 15938  	}
 15939  	return false
 15940  }
 15941  func rewriteValue_OpARM64REVW(v *ssa.Value) bool {
 15942  	v_0 := v.Args[0]
 15943  	// match: (REVW (REVW p))
 15944  	// result: p
 15945  	for {
 15946  		if v_0.Op != ssaop.OpARM64REVW {
 15947  			break
 15948  		}
 15949  		p := v_0.Args[0]
 15950  		v.CopyOf(p)
 15951  		return true
 15952  	}
 15953  	return false
 15954  }
 15955  func rewriteValue_OpARM64ROR(v *ssa.Value) bool {
 15956  	v_1 := v.Args[1]
 15957  	v_0 := v.Args[0]
 15958  	// match: (ROR x (MOVDconst [c]))
 15959  	// result: (RORconst x [c&63])
 15960  	for {
 15961  		x := v_0
 15962  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15963  			break
 15964  		}
 15965  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15966  		v.Reset(ssaop.OpARM64RORconst)
 15967  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 15968  		v.AddArg(x)
 15969  		return true
 15970  	}
 15971  	return false
 15972  }
 15973  func rewriteValue_OpARM64RORW(v *ssa.Value) bool {
 15974  	v_1 := v.Args[1]
 15975  	v_0 := v.Args[0]
 15976  	// match: (RORW x (MOVDconst [c]))
 15977  	// result: (RORWconst x [c&31])
 15978  	for {
 15979  		x := v_0
 15980  		if v_1.Op != ssaop.OpARM64MOVDconst {
 15981  			break
 15982  		}
 15983  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 15984  		v.Reset(ssaop.OpARM64RORWconst)
 15985  		v.AuxInt = ssa.Int64ToAuxInt(c & 31)
 15986  		v.AddArg(x)
 15987  		return true
 15988  	}
 15989  	return false
 15990  }
 15991  func rewriteValue_OpARM64SBCSflags(v *ssa.Value) bool {
 15992  	v_2 := v.Args[2]
 15993  	v_1 := v.Args[1]
 15994  	v_0 := v.Args[0]
 15995  	b := v.Block
 15996  	typ := &b.Func.Config.Types
 15997  	// match: (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> bo)))))
 15998  	// result: (SBCSflags x y bo)
 15999  	for {
 16000  		x := v_0
 16001  		y := v_1
 16002  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
 16003  			break
 16004  		}
 16005  		v_2_0 := v_2.Args[0]
 16006  		if v_2_0.Op != ssaop.OpARM64NEGSflags {
 16007  			break
 16008  		}
 16009  		v_2_0_0 := v_2_0.Args[0]
 16010  		if v_2_0_0.Op != ssaop.OpARM64NEG || v_2_0_0.Type != typ.UInt64 {
 16011  			break
 16012  		}
 16013  		v_2_0_0_0 := v_2_0_0.Args[0]
 16014  		if v_2_0_0_0.Op != ssaop.OpARM64NGCzerocarry || v_2_0_0_0.Type != typ.UInt64 {
 16015  			break
 16016  		}
 16017  		bo := v_2_0_0_0.Args[0]
 16018  		v.Reset(ssaop.OpARM64SBCSflags)
 16019  		v.AddArg3(x, y, bo)
 16020  		return true
 16021  	}
 16022  	// match: (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags (MOVDconst [0]))))
 16023  	// result: (SUBSflags x y)
 16024  	for {
 16025  		x := v_0
 16026  		y := v_1
 16027  		if v_2.Op != ssaop.OpSelect1 || v_2.Type != types.TypeFlags {
 16028  			break
 16029  		}
 16030  		v_2_0 := v_2.Args[0]
 16031  		if v_2_0.Op != ssaop.OpARM64NEGSflags {
 16032  			break
 16033  		}
 16034  		v_2_0_0 := v_2_0.Args[0]
 16035  		if v_2_0_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_2_0_0.AuxInt) != 0 {
 16036  			break
 16037  		}
 16038  		v.Reset(ssaop.OpARM64SUBSflags)
 16039  		v.AddArg2(x, y)
 16040  		return true
 16041  	}
 16042  	return false
 16043  }
 16044  func rewriteValue_OpARM64SBFX(v *ssa.Value) bool {
 16045  	v_0 := v.Args[0]
 16046  	// match: (SBFX [bfc] s:(SLLconst [sc] x))
 16047  	// cond: s.Uses == 1 && sc <= bfc.Lsb()
 16048  	// result: (SBFX [ssa.ArmBFAuxInt(bfc.Lsb() - sc, bfc.Width())] x)
 16049  	for {
 16050  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 16051  		s := v_0
 16052  		if s.Op != ssaop.OpARM64SLLconst {
 16053  			break
 16054  		}
 16055  		sc := ssa.AuxIntToInt64(s.AuxInt)
 16056  		x := s.Args[0]
 16057  		if !(s.Uses == 1 && sc <= bfc.Lsb()) {
 16058  			break
 16059  		}
 16060  		v.Reset(ssaop.OpARM64SBFX)
 16061  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 16062  		v.AddArg(x)
 16063  		return true
 16064  	}
 16065  	// match: (SBFX [bfc] s:(SLLconst [sc] x))
 16066  	// cond: s.Uses == 1 && sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 16067  	// result: (SBFIZ [ssa.ArmBFAuxInt(sc - bfc.Lsb(), bfc.Width() - (sc-bfc.Lsb()))] x)
 16068  	for {
 16069  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 16070  		s := v_0
 16071  		if s.Op != ssaop.OpARM64SLLconst {
 16072  			break
 16073  		}
 16074  		sc := ssa.AuxIntToInt64(s.AuxInt)
 16075  		x := s.Args[0]
 16076  		if !(s.Uses == 1 && sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 16077  			break
 16078  		}
 16079  		v.Reset(ssaop.OpARM64SBFIZ)
 16080  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Width()-(sc-bfc.Lsb())))
 16081  		v.AddArg(x)
 16082  		return true
 16083  	}
 16084  	return false
 16085  }
 16086  func rewriteValue_OpARM64SLL(v *ssa.Value) bool {
 16087  	v_1 := v.Args[1]
 16088  	v_0 := v.Args[0]
 16089  	// match: (SLL x (MOVDconst [c]))
 16090  	// result: (SLLconst x [c&63])
 16091  	for {
 16092  		x := v_0
 16093  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16094  			break
 16095  		}
 16096  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16097  		v.Reset(ssaop.OpARM64SLLconst)
 16098  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16099  		v.AddArg(x)
 16100  		return true
 16101  	}
 16102  	// match: (SLL x (ANDconst [63] y))
 16103  	// result: (SLL x y)
 16104  	for {
 16105  		x := v_0
 16106  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16107  			break
 16108  		}
 16109  		y := v_1.Args[0]
 16110  		v.Reset(ssaop.OpARM64SLL)
 16111  		v.AddArg2(x, y)
 16112  		return true
 16113  	}
 16114  	return false
 16115  }
 16116  func rewriteValue_OpARM64SLLconst(v *ssa.Value) bool {
 16117  	v_0 := v.Args[0]
 16118  	// match: (SLLconst [c] (MOVDconst [d]))
 16119  	// result: (MOVDconst [d<<uint64(c)])
 16120  	for {
 16121  		c := ssa.AuxIntToInt64(v.AuxInt)
 16122  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16123  			break
 16124  		}
 16125  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16126  		v.Reset(ssaop.OpARM64MOVDconst)
 16127  		v.AuxInt = ssa.Int64ToAuxInt(d << uint64(c))
 16128  		return true
 16129  	}
 16130  	// match: (SLLconst [c] (SRLconst [c] x))
 16131  	// cond: 0 < c && c < 64
 16132  	// result: (ANDconst [^(1<<uint(c)-1)] x)
 16133  	for {
 16134  		c := ssa.AuxIntToInt64(v.AuxInt)
 16135  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 16136  			break
 16137  		}
 16138  		x := v_0.Args[0]
 16139  		if !(0 < c && c < 64) {
 16140  			break
 16141  		}
 16142  		v.Reset(ssaop.OpARM64ANDconst)
 16143  		v.AuxInt = ssa.Int64ToAuxInt(^(1<<uint(c) - 1))
 16144  		v.AddArg(x)
 16145  		return true
 16146  	}
 16147  	// match: (SLLconst [lc] (MOVWreg x))
 16148  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(32, 64-lc))] x)
 16149  	for {
 16150  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16151  		if v_0.Op != ssaop.OpARM64MOVWreg {
 16152  			break
 16153  		}
 16154  		x := v_0.Args[0]
 16155  		v.Reset(ssaop.OpARM64SBFIZ)
 16156  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(32, 64-lc)))
 16157  		v.AddArg(x)
 16158  		return true
 16159  	}
 16160  	// match: (SLLconst [lc] (MOVHreg x))
 16161  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(16, 64-lc))] x)
 16162  	for {
 16163  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16164  		if v_0.Op != ssaop.OpARM64MOVHreg {
 16165  			break
 16166  		}
 16167  		x := v_0.Args[0]
 16168  		v.Reset(ssaop.OpARM64SBFIZ)
 16169  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(16, 64-lc)))
 16170  		v.AddArg(x)
 16171  		return true
 16172  	}
 16173  	// match: (SLLconst [lc] (MOVBreg x))
 16174  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc, min(8, 64-lc))] x)
 16175  	for {
 16176  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16177  		if v_0.Op != ssaop.OpARM64MOVBreg {
 16178  			break
 16179  		}
 16180  		x := v_0.Args[0]
 16181  		v.Reset(ssaop.OpARM64SBFIZ)
 16182  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(8, 64-lc)))
 16183  		v.AddArg(x)
 16184  		return true
 16185  	}
 16186  	// match: (SLLconst [lc] (MOVWUreg x))
 16187  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(32, 64-lc))] x)
 16188  	for {
 16189  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16190  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16191  			break
 16192  		}
 16193  		x := v_0.Args[0]
 16194  		v.Reset(ssaop.OpARM64UBFIZ)
 16195  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(32, 64-lc)))
 16196  		v.AddArg(x)
 16197  		return true
 16198  	}
 16199  	// match: (SLLconst [lc] (MOVHUreg x))
 16200  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(16, 64-lc))] x)
 16201  	for {
 16202  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16203  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 16204  			break
 16205  		}
 16206  		x := v_0.Args[0]
 16207  		v.Reset(ssaop.OpARM64UBFIZ)
 16208  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(16, 64-lc)))
 16209  		v.AddArg(x)
 16210  		return true
 16211  	}
 16212  	// match: (SLLconst [lc] (MOVBUreg x))
 16213  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc, min(8, 64-lc))] x)
 16214  	for {
 16215  		lc := ssa.AuxIntToInt64(v.AuxInt)
 16216  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 16217  			break
 16218  		}
 16219  		x := v_0.Args[0]
 16220  		v.Reset(ssaop.OpARM64UBFIZ)
 16221  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc, min(8, 64-lc)))
 16222  		v.AddArg(x)
 16223  		return true
 16224  	}
 16225  	// match: (SLLconst [sc] (ANDconst [ac] x))
 16226  	// cond: isARM64BFMask(sc, ac, 0)
 16227  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0))] x)
 16228  	for {
 16229  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16230  		if v_0.Op != ssaop.OpARM64ANDconst {
 16231  			break
 16232  		}
 16233  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16234  		x := v_0.Args[0]
 16235  		if !(isARM64BFMask(sc, ac, 0)) {
 16236  			break
 16237  		}
 16238  		v.Reset(ssaop.OpARM64UBFIZ)
 16239  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, 0)))
 16240  		v.AddArg(x)
 16241  		return true
 16242  	}
 16243  	// match: (SLLconst [sc] (UBFIZ [bfc] x))
 16244  	// cond: sc+bfc.Width()+bfc.Lsb() < 64
 16245  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width())] x)
 16246  	for {
 16247  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16248  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16249  			break
 16250  		}
 16251  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16252  		x := v_0.Args[0]
 16253  		if !(sc+bfc.Width()+bfc.Lsb() < 64) {
 16254  			break
 16255  		}
 16256  		v.Reset(ssaop.OpARM64UBFIZ)
 16257  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()))
 16258  		v.AddArg(x)
 16259  		return true
 16260  	}
 16261  	return false
 16262  }
 16263  func rewriteValue_OpARM64SRA(v *ssa.Value) bool {
 16264  	v_1 := v.Args[1]
 16265  	v_0 := v.Args[0]
 16266  	// match: (SRA x (MOVDconst [c]))
 16267  	// result: (SRAconst x [c&63])
 16268  	for {
 16269  		x := v_0
 16270  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16271  			break
 16272  		}
 16273  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16274  		v.Reset(ssaop.OpARM64SRAconst)
 16275  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16276  		v.AddArg(x)
 16277  		return true
 16278  	}
 16279  	// match: (SRA x (ANDconst [63] y))
 16280  	// result: (SRA x y)
 16281  	for {
 16282  		x := v_0
 16283  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16284  			break
 16285  		}
 16286  		y := v_1.Args[0]
 16287  		v.Reset(ssaop.OpARM64SRA)
 16288  		v.AddArg2(x, y)
 16289  		return true
 16290  	}
 16291  	return false
 16292  }
 16293  func rewriteValue_OpARM64SRAconst(v *ssa.Value) bool {
 16294  	v_0 := v.Args[0]
 16295  	// match: (SRAconst [c] (MOVDconst [d]))
 16296  	// result: (MOVDconst [d>>uint64(c)])
 16297  	for {
 16298  		c := ssa.AuxIntToInt64(v.AuxInt)
 16299  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16300  			break
 16301  		}
 16302  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16303  		v.Reset(ssaop.OpARM64MOVDconst)
 16304  		v.AuxInt = ssa.Int64ToAuxInt(d >> uint64(c))
 16305  		return true
 16306  	}
 16307  	// match: (SRAconst [rc] (SLLconst [lc] x))
 16308  	// cond: lc > rc
 16309  	// result: (SBFIZ [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x)
 16310  	for {
 16311  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16312  		if v_0.Op != ssaop.OpARM64SLLconst {
 16313  			break
 16314  		}
 16315  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16316  		x := v_0.Args[0]
 16317  		if !(lc > rc) {
 16318  			break
 16319  		}
 16320  		v.Reset(ssaop.OpARM64SBFIZ)
 16321  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 16322  		v.AddArg(x)
 16323  		return true
 16324  	}
 16325  	// match: (SRAconst [rc] (SLLconst [lc] x))
 16326  	// cond: lc <= rc
 16327  	// result: (SBFX [ssa.ArmBFAuxInt(rc-lc, 64-rc)] x)
 16328  	for {
 16329  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16330  		if v_0.Op != ssaop.OpARM64SLLconst {
 16331  			break
 16332  		}
 16333  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16334  		x := v_0.Args[0]
 16335  		if !(lc <= rc) {
 16336  			break
 16337  		}
 16338  		v.Reset(ssaop.OpARM64SBFX)
 16339  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 16340  		v.AddArg(x)
 16341  		return true
 16342  	}
 16343  	// match: (SRAconst [rc] (MOVWreg x))
 16344  	// cond: rc < 32
 16345  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 32-rc)] x)
 16346  	for {
 16347  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16348  		if v_0.Op != ssaop.OpARM64MOVWreg {
 16349  			break
 16350  		}
 16351  		x := v_0.Args[0]
 16352  		if !(rc < 32) {
 16353  			break
 16354  		}
 16355  		v.Reset(ssaop.OpARM64SBFX)
 16356  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32-rc))
 16357  		v.AddArg(x)
 16358  		return true
 16359  	}
 16360  	// match: (SRAconst [rc] (MOVHreg x))
 16361  	// cond: rc < 16
 16362  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 16-rc)] x)
 16363  	for {
 16364  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16365  		if v_0.Op != ssaop.OpARM64MOVHreg {
 16366  			break
 16367  		}
 16368  		x := v_0.Args[0]
 16369  		if !(rc < 16) {
 16370  			break
 16371  		}
 16372  		v.Reset(ssaop.OpARM64SBFX)
 16373  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16-rc))
 16374  		v.AddArg(x)
 16375  		return true
 16376  	}
 16377  	// match: (SRAconst [rc] (MOVBreg x))
 16378  	// cond: rc < 8
 16379  	// result: (SBFX [ssa.ArmBFAuxInt(rc, 8-rc)] x)
 16380  	for {
 16381  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16382  		if v_0.Op != ssaop.OpARM64MOVBreg {
 16383  			break
 16384  		}
 16385  		x := v_0.Args[0]
 16386  		if !(rc < 8) {
 16387  			break
 16388  		}
 16389  		v.Reset(ssaop.OpARM64SBFX)
 16390  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8-rc))
 16391  		v.AddArg(x)
 16392  		return true
 16393  	}
 16394  	// match: (SRAconst [sc] (SBFIZ [bfc] x))
 16395  	// cond: sc < bfc.Lsb()
 16396  	// result: (SBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 16397  	for {
 16398  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16399  		if v_0.Op != ssaop.OpARM64SBFIZ {
 16400  			break
 16401  		}
 16402  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16403  		x := v_0.Args[0]
 16404  		if !(sc < bfc.Lsb()) {
 16405  			break
 16406  		}
 16407  		v.Reset(ssaop.OpARM64SBFIZ)
 16408  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 16409  		v.AddArg(x)
 16410  		return true
 16411  	}
 16412  	// match: (SRAconst [sc] (SBFIZ [bfc] x))
 16413  	// cond: sc >= bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 16414  	// result: (SBFX [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 16415  	for {
 16416  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16417  		if v_0.Op != ssaop.OpARM64SBFIZ {
 16418  			break
 16419  		}
 16420  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16421  		x := v_0.Args[0]
 16422  		if !(sc >= bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 16423  			break
 16424  		}
 16425  		v.Reset(ssaop.OpARM64SBFX)
 16426  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 16427  		v.AddArg(x)
 16428  		return true
 16429  	}
 16430  	return false
 16431  }
 16432  func rewriteValue_OpARM64SRL(v *ssa.Value) bool {
 16433  	v_1 := v.Args[1]
 16434  	v_0 := v.Args[0]
 16435  	// match: (SRL x (MOVDconst [c]))
 16436  	// result: (SRLconst x [c&63])
 16437  	for {
 16438  		x := v_0
 16439  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16440  			break
 16441  		}
 16442  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16443  		v.Reset(ssaop.OpARM64SRLconst)
 16444  		v.AuxInt = ssa.Int64ToAuxInt(c & 63)
 16445  		v.AddArg(x)
 16446  		return true
 16447  	}
 16448  	// match: (SRL x (ANDconst [63] y))
 16449  	// result: (SRL x y)
 16450  	for {
 16451  		x := v_0
 16452  		if v_1.Op != ssaop.OpARM64ANDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 63 {
 16453  			break
 16454  		}
 16455  		y := v_1.Args[0]
 16456  		v.Reset(ssaop.OpARM64SRL)
 16457  		v.AddArg2(x, y)
 16458  		return true
 16459  	}
 16460  	return false
 16461  }
 16462  func rewriteValue_OpARM64SRLconst(v *ssa.Value) bool {
 16463  	v_0 := v.Args[0]
 16464  	// match: (SRLconst [c] (MOVDconst [d]))
 16465  	// result: (MOVDconst [int64(uint64(d)>>uint64(c))])
 16466  	for {
 16467  		c := ssa.AuxIntToInt64(v.AuxInt)
 16468  		if v_0.Op != ssaop.OpARM64MOVDconst {
 16469  			break
 16470  		}
 16471  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 16472  		v.Reset(ssaop.OpARM64MOVDconst)
 16473  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(d) >> uint64(c)))
 16474  		return true
 16475  	}
 16476  	// match: (SRLconst [c] (SLLconst [c] x))
 16477  	// cond: 0 < c && c < 64
 16478  	// result: (ANDconst [1<<uint(64-c)-1] x)
 16479  	for {
 16480  		c := ssa.AuxIntToInt64(v.AuxInt)
 16481  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 16482  			break
 16483  		}
 16484  		x := v_0.Args[0]
 16485  		if !(0 < c && c < 64) {
 16486  			break
 16487  		}
 16488  		v.Reset(ssaop.OpARM64ANDconst)
 16489  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(64-c) - 1)
 16490  		v.AddArg(x)
 16491  		return true
 16492  	}
 16493  	// match: (SRLconst [rc] (MOVWUreg x))
 16494  	// cond: rc >= 32
 16495  	// result: (MOVDconst [0])
 16496  	for {
 16497  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16498  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16499  			break
 16500  		}
 16501  		if !(rc >= 32) {
 16502  			break
 16503  		}
 16504  		v.Reset(ssaop.OpARM64MOVDconst)
 16505  		v.AuxInt = ssa.Int64ToAuxInt(0)
 16506  		return true
 16507  	}
 16508  	// match: (SRLconst [rc] (MOVHUreg x))
 16509  	// cond: rc >= 16
 16510  	// result: (MOVDconst [0])
 16511  	for {
 16512  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16513  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 16514  			break
 16515  		}
 16516  		if !(rc >= 16) {
 16517  			break
 16518  		}
 16519  		v.Reset(ssaop.OpARM64MOVDconst)
 16520  		v.AuxInt = ssa.Int64ToAuxInt(0)
 16521  		return true
 16522  	}
 16523  	// match: (SRLconst [rc] (MOVBUreg x))
 16524  	// cond: rc >= 8
 16525  	// result: (MOVDconst [0])
 16526  	for {
 16527  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16528  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 16529  			break
 16530  		}
 16531  		if !(rc >= 8) {
 16532  			break
 16533  		}
 16534  		v.Reset(ssaop.OpARM64MOVDconst)
 16535  		v.AuxInt = ssa.Int64ToAuxInt(0)
 16536  		return true
 16537  	}
 16538  	// match: (SRLconst [rc] (SLLconst [lc] x))
 16539  	// cond: lc > rc
 16540  	// result: (UBFIZ [ssa.ArmBFAuxInt(lc-rc, 64-lc)] x)
 16541  	for {
 16542  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16543  		if v_0.Op != ssaop.OpARM64SLLconst {
 16544  			break
 16545  		}
 16546  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16547  		x := v_0.Args[0]
 16548  		if !(lc > rc) {
 16549  			break
 16550  		}
 16551  		v.Reset(ssaop.OpARM64UBFIZ)
 16552  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(lc-rc, 64-lc))
 16553  		v.AddArg(x)
 16554  		return true
 16555  	}
 16556  	// match: (SRLconst [rc] (SLLconst [lc] x))
 16557  	// cond: lc < rc
 16558  	// result: (UBFX [ssa.ArmBFAuxInt(rc-lc, 64-rc)] x)
 16559  	for {
 16560  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16561  		if v_0.Op != ssaop.OpARM64SLLconst {
 16562  			break
 16563  		}
 16564  		lc := ssa.AuxIntToInt64(v_0.AuxInt)
 16565  		x := v_0.Args[0]
 16566  		if !(lc < rc) {
 16567  			break
 16568  		}
 16569  		v.Reset(ssaop.OpARM64UBFX)
 16570  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc-lc, 64-rc))
 16571  		v.AddArg(x)
 16572  		return true
 16573  	}
 16574  	// match: (SRLconst [rc] (MOVWUreg x))
 16575  	// cond: rc < 32
 16576  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 32-rc)] x)
 16577  	for {
 16578  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16579  		if v_0.Op != ssaop.OpARM64MOVWUreg {
 16580  			break
 16581  		}
 16582  		x := v_0.Args[0]
 16583  		if !(rc < 32) {
 16584  			break
 16585  		}
 16586  		v.Reset(ssaop.OpARM64UBFX)
 16587  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 32-rc))
 16588  		v.AddArg(x)
 16589  		return true
 16590  	}
 16591  	// match: (SRLconst [rc] (MOVHUreg x))
 16592  	// cond: rc < 16
 16593  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 16-rc)] x)
 16594  	for {
 16595  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16596  		if v_0.Op != ssaop.OpARM64MOVHUreg {
 16597  			break
 16598  		}
 16599  		x := v_0.Args[0]
 16600  		if !(rc < 16) {
 16601  			break
 16602  		}
 16603  		v.Reset(ssaop.OpARM64UBFX)
 16604  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 16-rc))
 16605  		v.AddArg(x)
 16606  		return true
 16607  	}
 16608  	// match: (SRLconst [rc] (MOVBUreg x))
 16609  	// cond: rc < 8
 16610  	// result: (UBFX [ssa.ArmBFAuxInt(rc, 8-rc)] x)
 16611  	for {
 16612  		rc := ssa.AuxIntToInt64(v.AuxInt)
 16613  		if v_0.Op != ssaop.OpARM64MOVBUreg {
 16614  			break
 16615  		}
 16616  		x := v_0.Args[0]
 16617  		if !(rc < 8) {
 16618  			break
 16619  		}
 16620  		v.Reset(ssaop.OpARM64UBFX)
 16621  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(rc, 8-rc))
 16622  		v.AddArg(x)
 16623  		return true
 16624  	}
 16625  	// match: (SRLconst [sc] (ANDconst [ac] x))
 16626  	// cond: isARM64BFMask(sc, ac, sc)
 16627  	// result: (UBFX [ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc))] x)
 16628  	for {
 16629  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16630  		if v_0.Op != ssaop.OpARM64ANDconst {
 16631  			break
 16632  		}
 16633  		ac := ssa.AuxIntToInt64(v_0.AuxInt)
 16634  		x := v_0.Args[0]
 16635  		if !(isARM64BFMask(sc, ac, sc)) {
 16636  			break
 16637  		}
 16638  		v.Reset(ssaop.OpARM64UBFX)
 16639  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc, arm64BFWidth(ac, sc)))
 16640  		v.AddArg(x)
 16641  		return true
 16642  	}
 16643  	// match: (SRLconst [sc] (UBFX [bfc] x))
 16644  	// cond: sc < bfc.Width()
 16645  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc)] x)
 16646  	for {
 16647  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16648  		if v_0.Op != ssaop.OpARM64UBFX {
 16649  			break
 16650  		}
 16651  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16652  		x := v_0.Args[0]
 16653  		if !(sc < bfc.Width()) {
 16654  			break
 16655  		}
 16656  		v.Reset(ssaop.OpARM64UBFX)
 16657  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc))
 16658  		v.AddArg(x)
 16659  		return true
 16660  	}
 16661  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 16662  	// cond: sc == bfc.Lsb()
 16663  	// result: (ANDconst [1<<uint(bfc.Width())-1] x)
 16664  	for {
 16665  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16666  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16667  			break
 16668  		}
 16669  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16670  		x := v_0.Args[0]
 16671  		if !(sc == bfc.Lsb()) {
 16672  			break
 16673  		}
 16674  		v.Reset(ssaop.OpARM64ANDconst)
 16675  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(bfc.Width()) - 1)
 16676  		v.AddArg(x)
 16677  		return true
 16678  	}
 16679  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 16680  	// cond: sc < bfc.Lsb()
 16681  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 16682  	for {
 16683  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16684  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16685  			break
 16686  		}
 16687  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16688  		x := v_0.Args[0]
 16689  		if !(sc < bfc.Lsb()) {
 16690  			break
 16691  		}
 16692  		v.Reset(ssaop.OpARM64UBFIZ)
 16693  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 16694  		v.AddArg(x)
 16695  		return true
 16696  	}
 16697  	// match: (SRLconst [sc] (UBFIZ [bfc] x))
 16698  	// cond: sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 16699  	// result: (UBFX [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 16700  	for {
 16701  		sc := ssa.AuxIntToInt64(v.AuxInt)
 16702  		if v_0.Op != ssaop.OpARM64UBFIZ {
 16703  			break
 16704  		}
 16705  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 16706  		x := v_0.Args[0]
 16707  		if !(sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 16708  			break
 16709  		}
 16710  		v.Reset(ssaop.OpARM64UBFX)
 16711  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 16712  		v.AddArg(x)
 16713  		return true
 16714  	}
 16715  	return false
 16716  }
 16717  func rewriteValue_OpARM64STP(v *ssa.Value) bool {
 16718  	v_3 := v.Args[3]
 16719  	v_2 := v.Args[2]
 16720  	v_1 := v.Args[1]
 16721  	v_0 := v.Args[0]
 16722  	b := v.Block
 16723  	config := b.Func.Config
 16724  	// match: (STP [off1] {sym} (ADDconst [off2] ptr) val1 val2 mem)
 16725  	// cond: ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 16726  	// result: (STP [off1+int32(off2)] {sym} ptr val1 val2 mem)
 16727  	for {
 16728  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 16729  		sym := ssa.AuxToSym(v.Aux)
 16730  		if v_0.Op != ssaop.OpARM64ADDconst {
 16731  			break
 16732  		}
 16733  		off2 := ssa.AuxIntToInt64(v_0.AuxInt)
 16734  		ptr := v_0.Args[0]
 16735  		val1 := v_1
 16736  		val2 := v_2
 16737  		mem := v_3
 16738  		if !(ssa.Is32Bit(int64(off1)+off2) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 16739  			break
 16740  		}
 16741  		v.Reset(ssaop.OpARM64STP)
 16742  		v.AuxInt = ssa.Int32ToAuxInt(off1 + int32(off2))
 16743  		v.Aux = ssa.SymToAux(sym)
 16744  		v.AddArg4(ptr, val1, val2, mem)
 16745  		return true
 16746  	}
 16747  	// match: (STP [off1] {sym1} (MOVDaddr [off2] {sym2} ptr) val1 val2 mem)
 16748  	// cond: ssa.CanMergeSym(sym1,sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)
 16749  	// result: (STP [off1+off2] {ssa.MergeSym(sym1,sym2)} ptr val1 val2 mem)
 16750  	for {
 16751  		off1 := ssa.AuxIntToInt32(v.AuxInt)
 16752  		sym1 := ssa.AuxToSym(v.Aux)
 16753  		if v_0.Op != ssaop.OpARM64MOVDaddr {
 16754  			break
 16755  		}
 16756  		off2 := ssa.AuxIntToInt32(v_0.AuxInt)
 16757  		sym2 := ssa.AuxToSym(v_0.Aux)
 16758  		ptr := v_0.Args[0]
 16759  		val1 := v_1
 16760  		val2 := v_2
 16761  		mem := v_3
 16762  		if !(ssa.CanMergeSym(sym1, sym2) && ssa.Is32Bit(int64(off1)+int64(off2)) && (ptr.Op != ssaop.OpSB || !config.Ctxt.Flag_dynlink)) {
 16763  			break
 16764  		}
 16765  		v.Reset(ssaop.OpARM64STP)
 16766  		v.AuxInt = ssa.Int32ToAuxInt(off1 + off2)
 16767  		v.Aux = ssa.SymToAux(ssa.MergeSym(sym1, sym2))
 16768  		v.AddArg4(ptr, val1, val2, mem)
 16769  		return true
 16770  	}
 16771  	return false
 16772  }
 16773  func rewriteValue_OpARM64SUB(v *ssa.Value) bool {
 16774  	v_1 := v.Args[1]
 16775  	v_0 := v.Args[0]
 16776  	b := v.Block
 16777  	// match: (SUB x (MOVDconst [c]))
 16778  	// result: (SUBconst [c] x)
 16779  	for {
 16780  		x := v_0
 16781  		if v_1.Op != ssaop.OpARM64MOVDconst {
 16782  			break
 16783  		}
 16784  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 16785  		v.Reset(ssaop.OpARM64SUBconst)
 16786  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16787  		v.AddArg(x)
 16788  		return true
 16789  	}
 16790  	// match: (SUB a l:(MUL x y))
 16791  	// cond: l.Uses==1 && ssa.Clobber(l)
 16792  	// result: (MSUB a x y)
 16793  	for {
 16794  		a := v_0
 16795  		l := v_1
 16796  		if l.Op != ssaop.OpARM64MUL {
 16797  			break
 16798  		}
 16799  		y := l.Args[1]
 16800  		x := l.Args[0]
 16801  		if !(l.Uses == 1 && ssa.Clobber(l)) {
 16802  			break
 16803  		}
 16804  		v.Reset(ssaop.OpARM64MSUB)
 16805  		v.AddArg3(a, x, y)
 16806  		return true
 16807  	}
 16808  	// match: (SUB a l:(MNEG x y))
 16809  	// cond: l.Uses==1 && ssa.Clobber(l)
 16810  	// result: (MADD a x y)
 16811  	for {
 16812  		a := v_0
 16813  		l := v_1
 16814  		if l.Op != ssaop.OpARM64MNEG {
 16815  			break
 16816  		}
 16817  		y := l.Args[1]
 16818  		x := l.Args[0]
 16819  		if !(l.Uses == 1 && ssa.Clobber(l)) {
 16820  			break
 16821  		}
 16822  		v.Reset(ssaop.OpARM64MADD)
 16823  		v.AddArg3(a, x, y)
 16824  		return true
 16825  	}
 16826  	// match: (SUB a l:(MULW x y))
 16827  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
 16828  	// result: (MSUBW a x y)
 16829  	for {
 16830  		a := v_0
 16831  		l := v_1
 16832  		if l.Op != ssaop.OpARM64MULW {
 16833  			break
 16834  		}
 16835  		y := l.Args[1]
 16836  		x := l.Args[0]
 16837  		if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
 16838  			break
 16839  		}
 16840  		v.Reset(ssaop.OpARM64MSUBW)
 16841  		v.AddArg3(a, x, y)
 16842  		return true
 16843  	}
 16844  	// match: (SUB a l:(MNEGW x y))
 16845  	// cond: v.Type.Size() <= 4 && l.Uses==1 && ssa.Clobber(l)
 16846  	// result: (MADDW a x y)
 16847  	for {
 16848  		a := v_0
 16849  		l := v_1
 16850  		if l.Op != ssaop.OpARM64MNEGW {
 16851  			break
 16852  		}
 16853  		y := l.Args[1]
 16854  		x := l.Args[0]
 16855  		if !(v.Type.Size() <= 4 && l.Uses == 1 && ssa.Clobber(l)) {
 16856  			break
 16857  		}
 16858  		v.Reset(ssaop.OpARM64MADDW)
 16859  		v.AddArg3(a, x, y)
 16860  		return true
 16861  	}
 16862  	// match: (SUB <t> a p:(ADDconst [c] m:(MUL _ _)))
 16863  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16864  	// result: (SUBconst [c] (SUB <v.Type> a m))
 16865  	for {
 16866  		t := v.Type
 16867  		a := v_0
 16868  		p := v_1
 16869  		if p.Op != ssaop.OpARM64ADDconst {
 16870  			break
 16871  		}
 16872  		c := ssa.AuxIntToInt64(p.AuxInt)
 16873  		m := p.Args[0]
 16874  		if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16875  			break
 16876  		}
 16877  		v.Reset(ssaop.OpARM64SUBconst)
 16878  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16879  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16880  		v0.AddArg2(a, m)
 16881  		v.AddArg(v0)
 16882  		return true
 16883  	}
 16884  	// match: (SUB <t> a p:(ADDconst [c] m:(MULW _ _)))
 16885  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16886  	// result: (SUBconst [c] (SUB <v.Type> a m))
 16887  	for {
 16888  		t := v.Type
 16889  		a := v_0
 16890  		p := v_1
 16891  		if p.Op != ssaop.OpARM64ADDconst {
 16892  			break
 16893  		}
 16894  		c := ssa.AuxIntToInt64(p.AuxInt)
 16895  		m := p.Args[0]
 16896  		if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16897  			break
 16898  		}
 16899  		v.Reset(ssaop.OpARM64SUBconst)
 16900  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16901  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16902  		v0.AddArg2(a, m)
 16903  		v.AddArg(v0)
 16904  		return true
 16905  	}
 16906  	// match: (SUB <t> a p:(ADDconst [c] m:(MNEG _ _)))
 16907  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16908  	// result: (SUBconst [c] (SUB <v.Type> a m))
 16909  	for {
 16910  		t := v.Type
 16911  		a := v_0
 16912  		p := v_1
 16913  		if p.Op != ssaop.OpARM64ADDconst {
 16914  			break
 16915  		}
 16916  		c := ssa.AuxIntToInt64(p.AuxInt)
 16917  		m := p.Args[0]
 16918  		if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16919  			break
 16920  		}
 16921  		v.Reset(ssaop.OpARM64SUBconst)
 16922  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16923  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16924  		v0.AddArg2(a, m)
 16925  		v.AddArg(v0)
 16926  		return true
 16927  	}
 16928  	// match: (SUB <t> a p:(ADDconst [c] m:(MNEGW _ _)))
 16929  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16930  	// result: (SUBconst [c] (SUB <v.Type> a m))
 16931  	for {
 16932  		t := v.Type
 16933  		a := v_0
 16934  		p := v_1
 16935  		if p.Op != ssaop.OpARM64ADDconst {
 16936  			break
 16937  		}
 16938  		c := ssa.AuxIntToInt64(p.AuxInt)
 16939  		m := p.Args[0]
 16940  		if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16941  			break
 16942  		}
 16943  		v.Reset(ssaop.OpARM64SUBconst)
 16944  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16945  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16946  		v0.AddArg2(a, m)
 16947  		v.AddArg(v0)
 16948  		return true
 16949  	}
 16950  	// match: (SUB <t> a p:(SUBconst [c] m:(MUL _ _)))
 16951  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16952  	// result: (ADDconst [c] (SUB <v.Type> a m))
 16953  	for {
 16954  		t := v.Type
 16955  		a := v_0
 16956  		p := v_1
 16957  		if p.Op != ssaop.OpARM64SUBconst {
 16958  			break
 16959  		}
 16960  		c := ssa.AuxIntToInt64(p.AuxInt)
 16961  		m := p.Args[0]
 16962  		if m.Op != ssaop.OpARM64MUL || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16963  			break
 16964  		}
 16965  		v.Reset(ssaop.OpARM64ADDconst)
 16966  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16967  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16968  		v0.AddArg2(a, m)
 16969  		v.AddArg(v0)
 16970  		return true
 16971  	}
 16972  	// match: (SUB <t> a p:(SUBconst [c] m:(MULW _ _)))
 16973  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16974  	// result: (ADDconst [c] (SUB <v.Type> a m))
 16975  	for {
 16976  		t := v.Type
 16977  		a := v_0
 16978  		p := v_1
 16979  		if p.Op != ssaop.OpARM64SUBconst {
 16980  			break
 16981  		}
 16982  		c := ssa.AuxIntToInt64(p.AuxInt)
 16983  		m := p.Args[0]
 16984  		if m.Op != ssaop.OpARM64MULW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 16985  			break
 16986  		}
 16987  		v.Reset(ssaop.OpARM64ADDconst)
 16988  		v.AuxInt = ssa.Int64ToAuxInt(c)
 16989  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 16990  		v0.AddArg2(a, m)
 16991  		v.AddArg(v0)
 16992  		return true
 16993  	}
 16994  	// match: (SUB <t> a p:(SUBconst [c] m:(MNEG _ _)))
 16995  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 16996  	// result: (ADDconst [c] (SUB <v.Type> a m))
 16997  	for {
 16998  		t := v.Type
 16999  		a := v_0
 17000  		p := v_1
 17001  		if p.Op != ssaop.OpARM64SUBconst {
 17002  			break
 17003  		}
 17004  		c := ssa.AuxIntToInt64(p.AuxInt)
 17005  		m := p.Args[0]
 17006  		if m.Op != ssaop.OpARM64MNEG || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17007  			break
 17008  		}
 17009  		v.Reset(ssaop.OpARM64ADDconst)
 17010  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17011  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17012  		v0.AddArg2(a, m)
 17013  		v.AddArg(v0)
 17014  		return true
 17015  	}
 17016  	// match: (SUB <t> a p:(SUBconst [c] m:(MNEGW _ _)))
 17017  	// cond: p.Uses==1 && m.Uses==1 && !t.IsPtrShaped()
 17018  	// result: (ADDconst [c] (SUB <v.Type> a m))
 17019  	for {
 17020  		t := v.Type
 17021  		a := v_0
 17022  		p := v_1
 17023  		if p.Op != ssaop.OpARM64SUBconst {
 17024  			break
 17025  		}
 17026  		c := ssa.AuxIntToInt64(p.AuxInt)
 17027  		m := p.Args[0]
 17028  		if m.Op != ssaop.OpARM64MNEGW || !(p.Uses == 1 && m.Uses == 1 && !t.IsPtrShaped()) {
 17029  			break
 17030  		}
 17031  		v.Reset(ssaop.OpARM64ADDconst)
 17032  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17033  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, v.Type)
 17034  		v0.AddArg2(a, m)
 17035  		v.AddArg(v0)
 17036  		return true
 17037  	}
 17038  	// match: (SUB x (NEG y))
 17039  	// result: (ADD x y)
 17040  	for {
 17041  		x := v_0
 17042  		if v_1.Op != ssaop.OpARM64NEG {
 17043  			break
 17044  		}
 17045  		y := v_1.Args[0]
 17046  		v.Reset(ssaop.OpARM64ADD)
 17047  		v.AddArg2(x, y)
 17048  		return true
 17049  	}
 17050  	// match: (SUB x x)
 17051  	// result: (MOVDconst [0])
 17052  	for {
 17053  		x := v_0
 17054  		if x != v_1 {
 17055  			break
 17056  		}
 17057  		v.Reset(ssaop.OpARM64MOVDconst)
 17058  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17059  		return true
 17060  	}
 17061  	// match: (SUB x (SUB y z))
 17062  	// result: (SUB (ADD <v.Type> x z) y)
 17063  	for {
 17064  		x := v_0
 17065  		if v_1.Op != ssaop.OpARM64SUB {
 17066  			break
 17067  		}
 17068  		z := v_1.Args[1]
 17069  		y := v_1.Args[0]
 17070  		v.Reset(ssaop.OpARM64SUB)
 17071  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, v.Type)
 17072  		v0.AddArg2(x, z)
 17073  		v.AddArg2(v0, y)
 17074  		return true
 17075  	}
 17076  	// match: (SUB (SUB x y) z)
 17077  	// result: (SUB x (ADD <y.Type> y z))
 17078  	for {
 17079  		if v_0.Op != ssaop.OpARM64SUB {
 17080  			break
 17081  		}
 17082  		y := v_0.Args[1]
 17083  		x := v_0.Args[0]
 17084  		z := v_1
 17085  		v.Reset(ssaop.OpARM64SUB)
 17086  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADD, y.Type)
 17087  		v0.AddArg2(y, z)
 17088  		v.AddArg2(x, v0)
 17089  		return true
 17090  	}
 17091  	// match: (SUB x0 x1:(SLLconst [c] y))
 17092  	// cond: ssa.ClobberIfDead(x1)
 17093  	// result: (SUBshiftLL x0 y [c])
 17094  	for {
 17095  		x0 := v_0
 17096  		x1 := v_1
 17097  		if x1.Op != ssaop.OpARM64SLLconst {
 17098  			break
 17099  		}
 17100  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17101  		y := x1.Args[0]
 17102  		if !(ssa.ClobberIfDead(x1)) {
 17103  			break
 17104  		}
 17105  		v.Reset(ssaop.OpARM64SUBshiftLL)
 17106  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17107  		v.AddArg2(x0, y)
 17108  		return true
 17109  	}
 17110  	// match: (SUB x0 x1:(SRLconst [c] y))
 17111  	// cond: ssa.ClobberIfDead(x1)
 17112  	// result: (SUBshiftRL x0 y [c])
 17113  	for {
 17114  		x0 := v_0
 17115  		x1 := v_1
 17116  		if x1.Op != ssaop.OpARM64SRLconst {
 17117  			break
 17118  		}
 17119  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17120  		y := x1.Args[0]
 17121  		if !(ssa.ClobberIfDead(x1)) {
 17122  			break
 17123  		}
 17124  		v.Reset(ssaop.OpARM64SUBshiftRL)
 17125  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17126  		v.AddArg2(x0, y)
 17127  		return true
 17128  	}
 17129  	// match: (SUB x0 x1:(SRAconst [c] y))
 17130  	// cond: ssa.ClobberIfDead(x1)
 17131  	// result: (SUBshiftRA x0 y [c])
 17132  	for {
 17133  		x0 := v_0
 17134  		x1 := v_1
 17135  		if x1.Op != ssaop.OpARM64SRAconst {
 17136  			break
 17137  		}
 17138  		c := ssa.AuxIntToInt64(x1.AuxInt)
 17139  		y := x1.Args[0]
 17140  		if !(ssa.ClobberIfDead(x1)) {
 17141  			break
 17142  		}
 17143  		v.Reset(ssaop.OpARM64SUBshiftRA)
 17144  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17145  		v.AddArg2(x0, y)
 17146  		return true
 17147  	}
 17148  	return false
 17149  }
 17150  func rewriteValue_OpARM64SUBconst(v *ssa.Value) bool {
 17151  	v_0 := v.Args[0]
 17152  	// match: (SUBconst [0] x)
 17153  	// result: x
 17154  	for {
 17155  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 17156  			break
 17157  		}
 17158  		x := v_0
 17159  		v.CopyOf(x)
 17160  		return true
 17161  	}
 17162  	// match: (SUBconst [c] (MOVDconst [d]))
 17163  	// result: (MOVDconst [d-c])
 17164  	for {
 17165  		c := ssa.AuxIntToInt64(v.AuxInt)
 17166  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17167  			break
 17168  		}
 17169  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17170  		v.Reset(ssaop.OpARM64MOVDconst)
 17171  		v.AuxInt = ssa.Int64ToAuxInt(d - c)
 17172  		return true
 17173  	}
 17174  	// match: (SUBconst [c] (SUBconst [d] x))
 17175  	// result: (ADDconst [-c-d] x)
 17176  	for {
 17177  		c := ssa.AuxIntToInt64(v.AuxInt)
 17178  		if v_0.Op != ssaop.OpARM64SUBconst {
 17179  			break
 17180  		}
 17181  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17182  		x := v_0.Args[0]
 17183  		v.Reset(ssaop.OpARM64ADDconst)
 17184  		v.AuxInt = ssa.Int64ToAuxInt(-c - d)
 17185  		v.AddArg(x)
 17186  		return true
 17187  	}
 17188  	// match: (SUBconst [c] (ADDconst [d] x))
 17189  	// result: (ADDconst [-c+d] x)
 17190  	for {
 17191  		c := ssa.AuxIntToInt64(v.AuxInt)
 17192  		if v_0.Op != ssaop.OpARM64ADDconst {
 17193  			break
 17194  		}
 17195  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 17196  		x := v_0.Args[0]
 17197  		v.Reset(ssaop.OpARM64ADDconst)
 17198  		v.AuxInt = ssa.Int64ToAuxInt(-c + d)
 17199  		v.AddArg(x)
 17200  		return true
 17201  	}
 17202  	return false
 17203  }
 17204  func rewriteValue_OpARM64SUBshiftLL(v *ssa.Value) bool {
 17205  	v_1 := v.Args[1]
 17206  	v_0 := v.Args[0]
 17207  	// match: (SUBshiftLL x (MOVDconst [c]) [d])
 17208  	// result: (SUBconst x [int64(uint64(c)<<uint64(d))])
 17209  	for {
 17210  		d := ssa.AuxIntToInt64(v.AuxInt)
 17211  		x := v_0
 17212  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17213  			break
 17214  		}
 17215  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17216  		v.Reset(ssaop.OpARM64SUBconst)
 17217  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 17218  		v.AddArg(x)
 17219  		return true
 17220  	}
 17221  	// match: (SUBshiftLL (SLLconst x [c]) x [c])
 17222  	// result: (MOVDconst [0])
 17223  	for {
 17224  		c := ssa.AuxIntToInt64(v.AuxInt)
 17225  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17226  			break
 17227  		}
 17228  		x := v_0.Args[0]
 17229  		if x != v_1 {
 17230  			break
 17231  		}
 17232  		v.Reset(ssaop.OpARM64MOVDconst)
 17233  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17234  		return true
 17235  	}
 17236  	return false
 17237  }
 17238  func rewriteValue_OpARM64SUBshiftRA(v *ssa.Value) bool {
 17239  	v_1 := v.Args[1]
 17240  	v_0 := v.Args[0]
 17241  	// match: (SUBshiftRA x (MOVDconst [c]) [d])
 17242  	// result: (SUBconst x [c>>uint64(d)])
 17243  	for {
 17244  		d := ssa.AuxIntToInt64(v.AuxInt)
 17245  		x := v_0
 17246  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17247  			break
 17248  		}
 17249  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17250  		v.Reset(ssaop.OpARM64SUBconst)
 17251  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 17252  		v.AddArg(x)
 17253  		return true
 17254  	}
 17255  	// match: (SUBshiftRA (SRAconst x [c]) x [c])
 17256  	// result: (MOVDconst [0])
 17257  	for {
 17258  		c := ssa.AuxIntToInt64(v.AuxInt)
 17259  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17260  			break
 17261  		}
 17262  		x := v_0.Args[0]
 17263  		if x != v_1 {
 17264  			break
 17265  		}
 17266  		v.Reset(ssaop.OpARM64MOVDconst)
 17267  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17268  		return true
 17269  	}
 17270  	return false
 17271  }
 17272  func rewriteValue_OpARM64SUBshiftRL(v *ssa.Value) bool {
 17273  	v_1 := v.Args[1]
 17274  	v_0 := v.Args[0]
 17275  	// match: (SUBshiftRL x (MOVDconst [c]) [d])
 17276  	// result: (SUBconst x [int64(uint64(c)>>uint64(d))])
 17277  	for {
 17278  		d := ssa.AuxIntToInt64(v.AuxInt)
 17279  		x := v_0
 17280  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17281  			break
 17282  		}
 17283  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17284  		v.Reset(ssaop.OpARM64SUBconst)
 17285  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 17286  		v.AddArg(x)
 17287  		return true
 17288  	}
 17289  	// match: (SUBshiftRL (SRLconst x [c]) x [c])
 17290  	// result: (MOVDconst [0])
 17291  	for {
 17292  		c := ssa.AuxIntToInt64(v.AuxInt)
 17293  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 17294  			break
 17295  		}
 17296  		x := v_0.Args[0]
 17297  		if x != v_1 {
 17298  			break
 17299  		}
 17300  		v.Reset(ssaop.OpARM64MOVDconst)
 17301  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17302  		return true
 17303  	}
 17304  	return false
 17305  }
 17306  func rewriteValue_OpARM64TST(v *ssa.Value) bool {
 17307  	v_1 := v.Args[1]
 17308  	v_0 := v.Args[0]
 17309  	// match: (TST x (MOVDconst [c]))
 17310  	// result: (TSTconst [c] x)
 17311  	for {
 17312  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17313  			x := v_0
 17314  			if v_1.Op != ssaop.OpARM64MOVDconst {
 17315  				continue
 17316  			}
 17317  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 17318  			v.Reset(ssaop.OpARM64TSTconst)
 17319  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17320  			v.AddArg(x)
 17321  			return true
 17322  		}
 17323  		break
 17324  	}
 17325  	// match: (TST x0 x1:(SLLconst [c] y))
 17326  	// cond: ssa.ClobberIfDead(x1)
 17327  	// result: (TSTshiftLL x0 y [c])
 17328  	for {
 17329  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17330  			x0 := v_0
 17331  			x1 := v_1
 17332  			if x1.Op != ssaop.OpARM64SLLconst {
 17333  				continue
 17334  			}
 17335  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17336  			y := x1.Args[0]
 17337  			if !(ssa.ClobberIfDead(x1)) {
 17338  				continue
 17339  			}
 17340  			v.Reset(ssaop.OpARM64TSTshiftLL)
 17341  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17342  			v.AddArg2(x0, y)
 17343  			return true
 17344  		}
 17345  		break
 17346  	}
 17347  	// match: (TST x0 x1:(SRLconst [c] y))
 17348  	// cond: ssa.ClobberIfDead(x1)
 17349  	// result: (TSTshiftRL x0 y [c])
 17350  	for {
 17351  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17352  			x0 := v_0
 17353  			x1 := v_1
 17354  			if x1.Op != ssaop.OpARM64SRLconst {
 17355  				continue
 17356  			}
 17357  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17358  			y := x1.Args[0]
 17359  			if !(ssa.ClobberIfDead(x1)) {
 17360  				continue
 17361  			}
 17362  			v.Reset(ssaop.OpARM64TSTshiftRL)
 17363  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17364  			v.AddArg2(x0, y)
 17365  			return true
 17366  		}
 17367  		break
 17368  	}
 17369  	// match: (TST x0 x1:(SRAconst [c] y))
 17370  	// cond: ssa.ClobberIfDead(x1)
 17371  	// result: (TSTshiftRA x0 y [c])
 17372  	for {
 17373  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17374  			x0 := v_0
 17375  			x1 := v_1
 17376  			if x1.Op != ssaop.OpARM64SRAconst {
 17377  				continue
 17378  			}
 17379  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17380  			y := x1.Args[0]
 17381  			if !(ssa.ClobberIfDead(x1)) {
 17382  				continue
 17383  			}
 17384  			v.Reset(ssaop.OpARM64TSTshiftRA)
 17385  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17386  			v.AddArg2(x0, y)
 17387  			return true
 17388  		}
 17389  		break
 17390  	}
 17391  	// match: (TST x0 x1:(RORconst [c] y))
 17392  	// cond: ssa.ClobberIfDead(x1)
 17393  	// result: (TSTshiftRO x0 y [c])
 17394  	for {
 17395  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17396  			x0 := v_0
 17397  			x1 := v_1
 17398  			if x1.Op != ssaop.OpARM64RORconst {
 17399  				continue
 17400  			}
 17401  			c := ssa.AuxIntToInt64(x1.AuxInt)
 17402  			y := x1.Args[0]
 17403  			if !(ssa.ClobberIfDead(x1)) {
 17404  				continue
 17405  			}
 17406  			v.Reset(ssaop.OpARM64TSTshiftRO)
 17407  			v.AuxInt = ssa.Int64ToAuxInt(c)
 17408  			v.AddArg2(x0, y)
 17409  			return true
 17410  		}
 17411  		break
 17412  	}
 17413  	return false
 17414  }
 17415  func rewriteValue_OpARM64TSTW(v *ssa.Value) bool {
 17416  	v_1 := v.Args[1]
 17417  	v_0 := v.Args[0]
 17418  	// match: (TSTW x (MOVDconst [c]))
 17419  	// result: (TSTWconst [int32(c)] x)
 17420  	for {
 17421  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 17422  			x := v_0
 17423  			if v_1.Op != ssaop.OpARM64MOVDconst {
 17424  				continue
 17425  			}
 17426  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 17427  			v.Reset(ssaop.OpARM64TSTWconst)
 17428  			v.AuxInt = ssa.Int32ToAuxInt(int32(c))
 17429  			v.AddArg(x)
 17430  			return true
 17431  		}
 17432  		break
 17433  	}
 17434  	return false
 17435  }
 17436  func rewriteValue_OpARM64TSTWconst(v *ssa.Value) bool {
 17437  	v_0 := v.Args[0]
 17438  	// match: (TSTWconst (MOVDconst [x]) [y])
 17439  	// result: (FlagConstant [ssa.LogicFlags32(int32(x)&y)])
 17440  	for {
 17441  		y := ssa.AuxIntToInt32(v.AuxInt)
 17442  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17443  			break
 17444  		}
 17445  		x := ssa.AuxIntToInt64(v_0.AuxInt)
 17446  		v.Reset(ssaop.OpARM64FlagConstant)
 17447  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.LogicFlags32(int32(x) & y))
 17448  		return true
 17449  	}
 17450  	return false
 17451  }
 17452  func rewriteValue_OpARM64TSTconst(v *ssa.Value) bool {
 17453  	v_0 := v.Args[0]
 17454  	// match: (TSTconst (MOVDconst [x]) [y])
 17455  	// result: (FlagConstant [ssa.LogicFlags64(x&y)])
 17456  	for {
 17457  		y := ssa.AuxIntToInt64(v.AuxInt)
 17458  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17459  			break
 17460  		}
 17461  		x := ssa.AuxIntToInt64(v_0.AuxInt)
 17462  		v.Reset(ssaop.OpARM64FlagConstant)
 17463  		v.AuxInt = ssa.FlagConstantToAuxInt(ssa.LogicFlags64(x & y))
 17464  		return true
 17465  	}
 17466  	return false
 17467  }
 17468  func rewriteValue_OpARM64TSTshiftLL(v *ssa.Value) bool {
 17469  	v_1 := v.Args[1]
 17470  	v_0 := v.Args[0]
 17471  	b := v.Block
 17472  	// match: (TSTshiftLL (MOVDconst [c]) x [d])
 17473  	// result: (TSTconst [c] (SLLconst <x.Type> x [d]))
 17474  	for {
 17475  		d := ssa.AuxIntToInt64(v.AuxInt)
 17476  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17477  			break
 17478  		}
 17479  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17480  		x := v_1
 17481  		v.Reset(ssaop.OpARM64TSTconst)
 17482  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17483  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 17484  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17485  		v0.AddArg(x)
 17486  		v.AddArg(v0)
 17487  		return true
 17488  	}
 17489  	// match: (TSTshiftLL x (MOVDconst [c]) [d])
 17490  	// result: (TSTconst x [int64(uint64(c)<<uint64(d))])
 17491  	for {
 17492  		d := ssa.AuxIntToInt64(v.AuxInt)
 17493  		x := v_0
 17494  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17495  			break
 17496  		}
 17497  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17498  		v.Reset(ssaop.OpARM64TSTconst)
 17499  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 17500  		v.AddArg(x)
 17501  		return true
 17502  	}
 17503  	return false
 17504  }
 17505  func rewriteValue_OpARM64TSTshiftRA(v *ssa.Value) bool {
 17506  	v_1 := v.Args[1]
 17507  	v_0 := v.Args[0]
 17508  	b := v.Block
 17509  	// match: (TSTshiftRA (MOVDconst [c]) x [d])
 17510  	// result: (TSTconst [c] (SRAconst <x.Type> x [d]))
 17511  	for {
 17512  		d := ssa.AuxIntToInt64(v.AuxInt)
 17513  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17514  			break
 17515  		}
 17516  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17517  		x := v_1
 17518  		v.Reset(ssaop.OpARM64TSTconst)
 17519  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17520  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 17521  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17522  		v0.AddArg(x)
 17523  		v.AddArg(v0)
 17524  		return true
 17525  	}
 17526  	// match: (TSTshiftRA x (MOVDconst [c]) [d])
 17527  	// result: (TSTconst x [c>>uint64(d)])
 17528  	for {
 17529  		d := ssa.AuxIntToInt64(v.AuxInt)
 17530  		x := v_0
 17531  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17532  			break
 17533  		}
 17534  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17535  		v.Reset(ssaop.OpARM64TSTconst)
 17536  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 17537  		v.AddArg(x)
 17538  		return true
 17539  	}
 17540  	return false
 17541  }
 17542  func rewriteValue_OpARM64TSTshiftRL(v *ssa.Value) bool {
 17543  	v_1 := v.Args[1]
 17544  	v_0 := v.Args[0]
 17545  	b := v.Block
 17546  	// match: (TSTshiftRL (MOVDconst [c]) x [d])
 17547  	// result: (TSTconst [c] (SRLconst <x.Type> x [d]))
 17548  	for {
 17549  		d := ssa.AuxIntToInt64(v.AuxInt)
 17550  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17551  			break
 17552  		}
 17553  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17554  		x := v_1
 17555  		v.Reset(ssaop.OpARM64TSTconst)
 17556  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17557  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 17558  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17559  		v0.AddArg(x)
 17560  		v.AddArg(v0)
 17561  		return true
 17562  	}
 17563  	// match: (TSTshiftRL x (MOVDconst [c]) [d])
 17564  	// result: (TSTconst x [int64(uint64(c)>>uint64(d))])
 17565  	for {
 17566  		d := ssa.AuxIntToInt64(v.AuxInt)
 17567  		x := v_0
 17568  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17569  			break
 17570  		}
 17571  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17572  		v.Reset(ssaop.OpARM64TSTconst)
 17573  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 17574  		v.AddArg(x)
 17575  		return true
 17576  	}
 17577  	return false
 17578  }
 17579  func rewriteValue_OpARM64TSTshiftRO(v *ssa.Value) bool {
 17580  	v_1 := v.Args[1]
 17581  	v_0 := v.Args[0]
 17582  	b := v.Block
 17583  	// match: (TSTshiftRO (MOVDconst [c]) x [d])
 17584  	// result: (TSTconst [c] (RORconst <x.Type> x [d]))
 17585  	for {
 17586  		d := ssa.AuxIntToInt64(v.AuxInt)
 17587  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17588  			break
 17589  		}
 17590  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17591  		x := v_1
 17592  		v.Reset(ssaop.OpARM64TSTconst)
 17593  		v.AuxInt = ssa.Int64ToAuxInt(c)
 17594  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 17595  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 17596  		v0.AddArg(x)
 17597  		v.AddArg(v0)
 17598  		return true
 17599  	}
 17600  	// match: (TSTshiftRO x (MOVDconst [c]) [d])
 17601  	// result: (TSTconst x [rotateRight64(c, d)])
 17602  	for {
 17603  		d := ssa.AuxIntToInt64(v.AuxInt)
 17604  		x := v_0
 17605  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17606  			break
 17607  		}
 17608  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17609  		v.Reset(ssaop.OpARM64TSTconst)
 17610  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 17611  		v.AddArg(x)
 17612  		return true
 17613  	}
 17614  	return false
 17615  }
 17616  func rewriteValue_OpARM64UBFIZ(v *ssa.Value) bool {
 17617  	v_0 := v.Args[0]
 17618  	// match: (UBFIZ [bfc] (SLLconst [sc] x))
 17619  	// cond: sc < bfc.Width()
 17620  	// result: (UBFIZ [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc)] x)
 17621  	for {
 17622  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17623  		if v_0.Op != ssaop.OpARM64SLLconst {
 17624  			break
 17625  		}
 17626  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17627  		x := v_0.Args[0]
 17628  		if !(sc < bfc.Width()) {
 17629  			break
 17630  		}
 17631  		v.Reset(ssaop.OpARM64UBFIZ)
 17632  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()-sc))
 17633  		v.AddArg(x)
 17634  		return true
 17635  	}
 17636  	return false
 17637  }
 17638  func rewriteValue_OpARM64UBFX(v *ssa.Value) bool {
 17639  	v_0 := v.Args[0]
 17640  	// match: (UBFX [bfc] (ANDconst [c] x))
 17641  	// cond: isARM64BFMask(0, c, 0) && bfc.Lsb() + bfc.Width() <= arm64BFWidth(c, 0)
 17642  	// result: (UBFX [bfc] x)
 17643  	for {
 17644  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17645  		if v_0.Op != ssaop.OpARM64ANDconst {
 17646  			break
 17647  		}
 17648  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17649  		x := v_0.Args[0]
 17650  		if !(isARM64BFMask(0, c, 0) && bfc.Lsb()+bfc.Width() <= arm64BFWidth(c, 0)) {
 17651  			break
 17652  		}
 17653  		v.Reset(ssaop.OpARM64UBFX)
 17654  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(bfc)
 17655  		v.AddArg(x)
 17656  		return true
 17657  	}
 17658  	// match: (UBFX [bfc] e:(MOVWUreg x))
 17659  	// cond: e.Uses == 1 && bfc.Lsb() < 32
 17660  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 32-bfc.Lsb()))] x)
 17661  	for {
 17662  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17663  		e := v_0
 17664  		if e.Op != ssaop.OpARM64MOVWUreg {
 17665  			break
 17666  		}
 17667  		x := e.Args[0]
 17668  		if !(e.Uses == 1 && bfc.Lsb() < 32) {
 17669  			break
 17670  		}
 17671  		v.Reset(ssaop.OpARM64UBFX)
 17672  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 32-bfc.Lsb())))
 17673  		v.AddArg(x)
 17674  		return true
 17675  	}
 17676  	// match: (UBFX [bfc] e:(MOVHUreg x))
 17677  	// cond: e.Uses == 1 && bfc.Lsb() < 16
 17678  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 16-bfc.Lsb()))] x)
 17679  	for {
 17680  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17681  		e := v_0
 17682  		if e.Op != ssaop.OpARM64MOVHUreg {
 17683  			break
 17684  		}
 17685  		x := e.Args[0]
 17686  		if !(e.Uses == 1 && bfc.Lsb() < 16) {
 17687  			break
 17688  		}
 17689  		v.Reset(ssaop.OpARM64UBFX)
 17690  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 16-bfc.Lsb())))
 17691  		v.AddArg(x)
 17692  		return true
 17693  	}
 17694  	// match: (UBFX [bfc] e:(MOVBUreg x))
 17695  	// cond: e.Uses == 1 && bfc.Lsb() < 8
 17696  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 8-bfc.Lsb()))] x)
 17697  	for {
 17698  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17699  		e := v_0
 17700  		if e.Op != ssaop.OpARM64MOVBUreg {
 17701  			break
 17702  		}
 17703  		x := e.Args[0]
 17704  		if !(e.Uses == 1 && bfc.Lsb() < 8) {
 17705  			break
 17706  		}
 17707  		v.Reset(ssaop.OpARM64UBFX)
 17708  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb(), min(bfc.Width(), 8-bfc.Lsb())))
 17709  		v.AddArg(x)
 17710  		return true
 17711  	}
 17712  	// match: (UBFX [bfc] (SRLconst [sc] x))
 17713  	// cond: sc+bfc.Width()+bfc.Lsb() < 64
 17714  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width())] x)
 17715  	for {
 17716  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17717  		if v_0.Op != ssaop.OpARM64SRLconst {
 17718  			break
 17719  		}
 17720  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17721  		x := v_0.Args[0]
 17722  		if !(sc+bfc.Width()+bfc.Lsb() < 64) {
 17723  			break
 17724  		}
 17725  		v.Reset(ssaop.OpARM64UBFX)
 17726  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()+sc, bfc.Width()))
 17727  		v.AddArg(x)
 17728  		return true
 17729  	}
 17730  	// match: (UBFX [bfc] (SLLconst [sc] x))
 17731  	// cond: sc == bfc.Lsb()
 17732  	// result: (ANDconst [1<<uint(bfc.Width())-1] x)
 17733  	for {
 17734  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17735  		if v_0.Op != ssaop.OpARM64SLLconst {
 17736  			break
 17737  		}
 17738  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17739  		x := v_0.Args[0]
 17740  		if !(sc == bfc.Lsb()) {
 17741  			break
 17742  		}
 17743  		v.Reset(ssaop.OpARM64ANDconst)
 17744  		v.AuxInt = ssa.Int64ToAuxInt(1<<uint(bfc.Width()) - 1)
 17745  		v.AddArg(x)
 17746  		return true
 17747  	}
 17748  	// match: (UBFX [bfc] (SLLconst [sc] x))
 17749  	// cond: sc < bfc.Lsb()
 17750  	// result: (UBFX [ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width())] x)
 17751  	for {
 17752  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17753  		if v_0.Op != ssaop.OpARM64SLLconst {
 17754  			break
 17755  		}
 17756  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17757  		x := v_0.Args[0]
 17758  		if !(sc < bfc.Lsb()) {
 17759  			break
 17760  		}
 17761  		v.Reset(ssaop.OpARM64UBFX)
 17762  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(bfc.Lsb()-sc, bfc.Width()))
 17763  		v.AddArg(x)
 17764  		return true
 17765  	}
 17766  	// match: (UBFX [bfc] (SLLconst [sc] x))
 17767  	// cond: sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()
 17768  	// result: (UBFIZ [ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc)] x)
 17769  	for {
 17770  		bfc := ssa.AuxIntToArm64BitField(v.AuxInt)
 17771  		if v_0.Op != ssaop.OpARM64SLLconst {
 17772  			break
 17773  		}
 17774  		sc := ssa.AuxIntToInt64(v_0.AuxInt)
 17775  		x := v_0.Args[0]
 17776  		if !(sc > bfc.Lsb() && sc < bfc.Lsb()+bfc.Width()) {
 17777  			break
 17778  		}
 17779  		v.Reset(ssaop.OpARM64UBFIZ)
 17780  		v.AuxInt = ssa.Arm64BitFieldToAuxInt(ssa.ArmBFAuxInt(sc-bfc.Lsb(), bfc.Lsb()+bfc.Width()-sc))
 17781  		v.AddArg(x)
 17782  		return true
 17783  	}
 17784  	return false
 17785  }
 17786  func rewriteValue_OpARM64UDIV(v *ssa.Value) bool {
 17787  	v_1 := v.Args[1]
 17788  	v_0 := v.Args[0]
 17789  	// match: (UDIV x (MOVDconst [1]))
 17790  	// result: x
 17791  	for {
 17792  		x := v_0
 17793  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 17794  			break
 17795  		}
 17796  		v.CopyOf(x)
 17797  		return true
 17798  	}
 17799  	// match: (UDIV x (MOVDconst [c]))
 17800  	// cond: ssa.IsPowerOfTwo(c)
 17801  	// result: (SRLconst [ssa.Log64(c)] x)
 17802  	for {
 17803  		x := v_0
 17804  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17805  			break
 17806  		}
 17807  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17808  		if !(ssa.IsPowerOfTwo(c)) {
 17809  			break
 17810  		}
 17811  		v.Reset(ssaop.OpARM64SRLconst)
 17812  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 17813  		v.AddArg(x)
 17814  		return true
 17815  	}
 17816  	// match: (UDIV (MOVDconst [c]) (MOVDconst [d]))
 17817  	// cond: d != 0
 17818  	// result: (MOVDconst [int64(uint64(c)/uint64(d))])
 17819  	for {
 17820  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17821  			break
 17822  		}
 17823  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17824  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17825  			break
 17826  		}
 17827  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 17828  		if !(d != 0) {
 17829  			break
 17830  		}
 17831  		v.Reset(ssaop.OpARM64MOVDconst)
 17832  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) / uint64(d)))
 17833  		return true
 17834  	}
 17835  	return false
 17836  }
 17837  func rewriteValue_OpARM64UDIVW(v *ssa.Value) bool {
 17838  	v_1 := v.Args[1]
 17839  	v_0 := v.Args[0]
 17840  	b := v.Block
 17841  	// match: (UDIVW x (MOVDconst [c]))
 17842  	// cond: uint32(c)==1
 17843  	// result: (MOVWUreg x)
 17844  	for {
 17845  		x := v_0
 17846  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17847  			break
 17848  		}
 17849  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17850  		if !(uint32(c) == 1) {
 17851  			break
 17852  		}
 17853  		v.Reset(ssaop.OpARM64MOVWUreg)
 17854  		v.AddArg(x)
 17855  		return true
 17856  	}
 17857  	// match: (UDIVW x (MOVDconst [c]))
 17858  	// cond: ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)
 17859  	// result: (SRLconst [ssa.Log64(c)] (MOVWUreg <v.Type> x))
 17860  	for {
 17861  		x := v_0
 17862  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17863  			break
 17864  		}
 17865  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17866  		if !(ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)) {
 17867  			break
 17868  		}
 17869  		v.Reset(ssaop.OpARM64SRLconst)
 17870  		v.AuxInt = ssa.Int64ToAuxInt(ssa.Log64(c))
 17871  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUreg, v.Type)
 17872  		v0.AddArg(x)
 17873  		v.AddArg(v0)
 17874  		return true
 17875  	}
 17876  	// match: (UDIVW (MOVDconst [c]) (MOVDconst [d]))
 17877  	// cond: d != 0
 17878  	// result: (MOVDconst [int64(uint32(c)/uint32(d))])
 17879  	for {
 17880  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17881  			break
 17882  		}
 17883  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17884  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17885  			break
 17886  		}
 17887  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 17888  		if !(d != 0) {
 17889  			break
 17890  		}
 17891  		v.Reset(ssaop.OpARM64MOVDconst)
 17892  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c) / uint32(d)))
 17893  		return true
 17894  	}
 17895  	return false
 17896  }
 17897  func rewriteValue_OpARM64UMOD(v *ssa.Value) bool {
 17898  	v_1 := v.Args[1]
 17899  	v_0 := v.Args[0]
 17900  	b := v.Block
 17901  	typ := &b.Func.Config.Types
 17902  	// match: (UMOD <typ.UInt64> x y)
 17903  	// result: (MSUB <typ.UInt64> x y (UDIV <typ.UInt64> x y))
 17904  	for {
 17905  		if v.Type != typ.UInt64 {
 17906  			break
 17907  		}
 17908  		x := v_0
 17909  		y := v_1
 17910  		v.Reset(ssaop.OpARM64MSUB)
 17911  		v.Type = typ.UInt64
 17912  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UDIV, typ.UInt64)
 17913  		v0.AddArg2(x, y)
 17914  		v.AddArg3(x, y, v0)
 17915  		return true
 17916  	}
 17917  	// match: (UMOD _ (MOVDconst [1]))
 17918  	// result: (MOVDconst [0])
 17919  	for {
 17920  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 17921  			break
 17922  		}
 17923  		v.Reset(ssaop.OpARM64MOVDconst)
 17924  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17925  		return true
 17926  	}
 17927  	// match: (UMOD x (MOVDconst [c]))
 17928  	// cond: ssa.IsPowerOfTwo(c)
 17929  	// result: (ANDconst [c-1] x)
 17930  	for {
 17931  		x := v_0
 17932  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17933  			break
 17934  		}
 17935  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17936  		if !(ssa.IsPowerOfTwo(c)) {
 17937  			break
 17938  		}
 17939  		v.Reset(ssaop.OpARM64ANDconst)
 17940  		v.AuxInt = ssa.Int64ToAuxInt(c - 1)
 17941  		v.AddArg(x)
 17942  		return true
 17943  	}
 17944  	// match: (UMOD (MOVDconst [c]) (MOVDconst [d]))
 17945  	// cond: d != 0
 17946  	// result: (MOVDconst [int64(uint64(c)%uint64(d))])
 17947  	for {
 17948  		if v_0.Op != ssaop.OpARM64MOVDconst {
 17949  			break
 17950  		}
 17951  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 17952  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17953  			break
 17954  		}
 17955  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 17956  		if !(d != 0) {
 17957  			break
 17958  		}
 17959  		v.Reset(ssaop.OpARM64MOVDconst)
 17960  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) % uint64(d)))
 17961  		return true
 17962  	}
 17963  	return false
 17964  }
 17965  func rewriteValue_OpARM64UMODW(v *ssa.Value) bool {
 17966  	v_1 := v.Args[1]
 17967  	v_0 := v.Args[0]
 17968  	b := v.Block
 17969  	typ := &b.Func.Config.Types
 17970  	// match: (UMODW <typ.UInt32> x y)
 17971  	// result: (MSUBW <typ.UInt32> x y (UDIVW <typ.UInt32> x y))
 17972  	for {
 17973  		if v.Type != typ.UInt32 {
 17974  			break
 17975  		}
 17976  		x := v_0
 17977  		y := v_1
 17978  		v.Reset(ssaop.OpARM64MSUBW)
 17979  		v.Type = typ.UInt32
 17980  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UDIVW, typ.UInt32)
 17981  		v0.AddArg2(x, y)
 17982  		v.AddArg3(x, y, v0)
 17983  		return true
 17984  	}
 17985  	// match: (UMODW _ (MOVDconst [c]))
 17986  	// cond: uint32(c)==1
 17987  	// result: (MOVDconst [0])
 17988  	for {
 17989  		if v_1.Op != ssaop.OpARM64MOVDconst {
 17990  			break
 17991  		}
 17992  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 17993  		if !(uint32(c) == 1) {
 17994  			break
 17995  		}
 17996  		v.Reset(ssaop.OpARM64MOVDconst)
 17997  		v.AuxInt = ssa.Int64ToAuxInt(0)
 17998  		return true
 17999  	}
 18000  	// match: (UMODW x (MOVDconst [c]))
 18001  	// cond: ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)
 18002  	// result: (ANDconst [c-1] x)
 18003  	for {
 18004  		x := v_0
 18005  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18006  			break
 18007  		}
 18008  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 18009  		if !(ssa.IsPowerOfTwo(c) && ssa.Is32Bit(c)) {
 18010  			break
 18011  		}
 18012  		v.Reset(ssaop.OpARM64ANDconst)
 18013  		v.AuxInt = ssa.Int64ToAuxInt(c - 1)
 18014  		v.AddArg(x)
 18015  		return true
 18016  	}
 18017  	// match: (UMODW (MOVDconst [c]) (MOVDconst [d]))
 18018  	// cond: d != 0
 18019  	// result: (MOVDconst [int64(uint32(c)%uint32(d))])
 18020  	for {
 18021  		if v_0.Op != ssaop.OpARM64MOVDconst {
 18022  			break
 18023  		}
 18024  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 18025  		if v_1.Op != ssaop.OpARM64MOVDconst {
 18026  			break
 18027  		}
 18028  		d := ssa.AuxIntToInt64(v_1.AuxInt)
 18029  		if !(d != 0) {
 18030  			break
 18031  		}
 18032  		v.Reset(ssaop.OpARM64MOVDconst)
 18033  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint32(c) % uint32(d)))
 18034  		return true
 18035  	}
 18036  	return false
 18037  }
 18038  func rewriteValue_OpARM64VBIF16B(v *ssa.Value) bool {
 18039  	v_2 := v.Args[2]
 18040  	v_1 := v.Args[1]
 18041  	v_0 := v.Args[0]
 18042  	// match: (VBIF16B x y (VNOT16B mask))
 18043  	// result: (VBIT16B x y mask)
 18044  	for {
 18045  		x := v_0
 18046  		y := v_1
 18047  		if v_2.Op != ssaop.OpARM64VNOT16B {
 18048  			break
 18049  		}
 18050  		mask := v_2.Args[0]
 18051  		v.Reset(ssaop.OpARM64VBIT16B)
 18052  		v.AddArg3(x, y, mask)
 18053  		return true
 18054  	}
 18055  	return false
 18056  }
 18057  func rewriteValue_OpARM64VBIT16B(v *ssa.Value) bool {
 18058  	v_2 := v.Args[2]
 18059  	v_1 := v.Args[1]
 18060  	v_0 := v.Args[0]
 18061  	// match: (VBIT16B x y (VNOT16B mask))
 18062  	// result: (VBIF16B x y mask)
 18063  	for {
 18064  		x := v_0
 18065  		y := v_1
 18066  		if v_2.Op != ssaop.OpARM64VNOT16B {
 18067  			break
 18068  		}
 18069  		mask := v_2.Args[0]
 18070  		v.Reset(ssaop.OpARM64VBIF16B)
 18071  		v.AddArg3(x, y, mask)
 18072  		return true
 18073  	}
 18074  	return false
 18075  }
 18076  func rewriteValue_OpARM64VDUPBbcast(v *ssa.Value) bool {
 18077  	v_0 := v.Args[0]
 18078  	// match: (VDUPBbcast [i] (VMOVBins [j] _ (MOVDconst [c])))
 18079  	// cond: i == j && c>=-128 && c<=255
 18080  	// result: (VMOVI16B [uint8(c)])
 18081  	for {
 18082  		i := ssa.AuxIntToUint8(v.AuxInt)
 18083  		if v_0.Op != ssaop.OpARM64VMOVBins {
 18084  			break
 18085  		}
 18086  		j := ssa.AuxIntToUint8(v_0.AuxInt)
 18087  		_ = v_0.Args[1]
 18088  		v_0_1 := v_0.Args[1]
 18089  		if v_0_1.Op != ssaop.OpARM64MOVDconst {
 18090  			break
 18091  		}
 18092  		c := ssa.AuxIntToInt64(v_0_1.AuxInt)
 18093  		if !(i == j && c >= -128 && c <= 255) {
 18094  			break
 18095  		}
 18096  		v.Reset(ssaop.OpARM64VMOVI16B)
 18097  		v.AuxInt = ssa.Uint8ToAuxInt(uint8(c))
 18098  		return true
 18099  	}
 18100  	return false
 18101  }
 18102  func rewriteValue_OpARM64VEOR16B(v *ssa.Value) bool {
 18103  	v_1 := v.Args[1]
 18104  	v_0 := v.Args[0]
 18105  	// match: (VEOR16B x x)
 18106  	// result: (VMOVI16B [0])
 18107  	for {
 18108  		x := v_0
 18109  		if x != v_1 {
 18110  			break
 18111  		}
 18112  		v.Reset(ssaop.OpARM64VMOVI16B)
 18113  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 18114  		return true
 18115  	}
 18116  	return false
 18117  }
 18118  func rewriteValue_OpARM64VFCVTL4S(v *ssa.Value) bool {
 18119  	v_0 := v.Args[0]
 18120  	// match: (VFCVTL4S (VDUPDextr [1] x))
 18121  	// result: (VFCVTL2_4S x)
 18122  	for {
 18123  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18124  			break
 18125  		}
 18126  		x := v_0.Args[0]
 18127  		v.Reset(ssaop.OpARM64VFCVTL2_4S)
 18128  		v.AddArg(x)
 18129  		return true
 18130  	}
 18131  	return false
 18132  }
 18133  func rewriteValue_OpARM64VMOVDins0(v *ssa.Value) bool {
 18134  	v_1 := v.Args[1]
 18135  	v_0 := v.Args[0]
 18136  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VFCVTN2D y)))
 18137  	// result: (VFCVTN2_2D dst y)
 18138  	for {
 18139  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18140  			break
 18141  		}
 18142  		dst := v_0
 18143  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18144  			break
 18145  		}
 18146  		v_1_0 := v_1.Args[0]
 18147  		if v_1_0.Op != ssaop.OpARM64VFCVTN2D {
 18148  			break
 18149  		}
 18150  		y := v_1_0.Args[0]
 18151  		v.Reset(ssaop.OpARM64VFCVTN2_2D)
 18152  		v.AddArg2(dst, y)
 18153  		return true
 18154  	}
 18155  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN2D [c] y)))
 18156  	// result: (VSHRN2_2D dst [c] y)
 18157  	for {
 18158  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18159  			break
 18160  		}
 18161  		dst := v_0
 18162  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18163  			break
 18164  		}
 18165  		v_1_0 := v_1.Args[0]
 18166  		if v_1_0.Op != ssaop.OpARM64VSHRN2D {
 18167  			break
 18168  		}
 18169  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18170  		y := v_1_0.Args[0]
 18171  		v.Reset(ssaop.OpARM64VSHRN2_2D)
 18172  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18173  		v.AddArg2(dst, y)
 18174  		return true
 18175  	}
 18176  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN4S [c] y)))
 18177  	// result: (VSHRN2_4S dst [c] y)
 18178  	for {
 18179  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18180  			break
 18181  		}
 18182  		dst := v_0
 18183  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18184  			break
 18185  		}
 18186  		v_1_0 := v_1.Args[0]
 18187  		if v_1_0.Op != ssaop.OpARM64VSHRN4S {
 18188  			break
 18189  		}
 18190  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18191  		y := v_1_0.Args[0]
 18192  		v.Reset(ssaop.OpARM64VSHRN2_4S)
 18193  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18194  		v.AddArg2(dst, y)
 18195  		return true
 18196  	}
 18197  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSHRN8H [c] y)))
 18198  	// result: (VSHRN2_8H dst [c] y)
 18199  	for {
 18200  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18201  			break
 18202  		}
 18203  		dst := v_0
 18204  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18205  			break
 18206  		}
 18207  		v_1_0 := v_1.Args[0]
 18208  		if v_1_0.Op != ssaop.OpARM64VSHRN8H {
 18209  			break
 18210  		}
 18211  		c := ssa.AuxIntToUint8(v_1_0.AuxInt)
 18212  		y := v_1_0.Args[0]
 18213  		v.Reset(ssaop.OpARM64VSHRN2_8H)
 18214  		v.AuxInt = ssa.Uint8ToAuxInt(c)
 18215  		v.AddArg2(dst, y)
 18216  		return true
 18217  	}
 18218  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN2D y)))
 18219  	// result: (VSQXTN2_2D dst y)
 18220  	for {
 18221  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18222  			break
 18223  		}
 18224  		dst := v_0
 18225  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18226  			break
 18227  		}
 18228  		v_1_0 := v_1.Args[0]
 18229  		if v_1_0.Op != ssaop.OpARM64VSQXTN2D {
 18230  			break
 18231  		}
 18232  		y := v_1_0.Args[0]
 18233  		v.Reset(ssaop.OpARM64VSQXTN2_2D)
 18234  		v.AddArg2(dst, y)
 18235  		return true
 18236  	}
 18237  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN4S y)))
 18238  	// result: (VSQXTN2_4S dst y)
 18239  	for {
 18240  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18241  			break
 18242  		}
 18243  		dst := v_0
 18244  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18245  			break
 18246  		}
 18247  		v_1_0 := v_1.Args[0]
 18248  		if v_1_0.Op != ssaop.OpARM64VSQXTN4S {
 18249  			break
 18250  		}
 18251  		y := v_1_0.Args[0]
 18252  		v.Reset(ssaop.OpARM64VSQXTN2_4S)
 18253  		v.AddArg2(dst, y)
 18254  		return true
 18255  	}
 18256  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTN8H y)))
 18257  	// result: (VSQXTN2_8H dst y)
 18258  	for {
 18259  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18260  			break
 18261  		}
 18262  		dst := v_0
 18263  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18264  			break
 18265  		}
 18266  		v_1_0 := v_1.Args[0]
 18267  		if v_1_0.Op != ssaop.OpARM64VSQXTN8H {
 18268  			break
 18269  		}
 18270  		y := v_1_0.Args[0]
 18271  		v.Reset(ssaop.OpARM64VSQXTN2_8H)
 18272  		v.AddArg2(dst, y)
 18273  		return true
 18274  	}
 18275  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN2D y)))
 18276  	// result: (VSQXTUN2_2D dst y)
 18277  	for {
 18278  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18279  			break
 18280  		}
 18281  		dst := v_0
 18282  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18283  			break
 18284  		}
 18285  		v_1_0 := v_1.Args[0]
 18286  		if v_1_0.Op != ssaop.OpARM64VSQXTUN2D {
 18287  			break
 18288  		}
 18289  		y := v_1_0.Args[0]
 18290  		v.Reset(ssaop.OpARM64VSQXTUN2_2D)
 18291  		v.AddArg2(dst, y)
 18292  		return true
 18293  	}
 18294  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN4S y)))
 18295  	// result: (VSQXTUN2_4S dst y)
 18296  	for {
 18297  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18298  			break
 18299  		}
 18300  		dst := v_0
 18301  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18302  			break
 18303  		}
 18304  		v_1_0 := v_1.Args[0]
 18305  		if v_1_0.Op != ssaop.OpARM64VSQXTUN4S {
 18306  			break
 18307  		}
 18308  		y := v_1_0.Args[0]
 18309  		v.Reset(ssaop.OpARM64VSQXTUN2_4S)
 18310  		v.AddArg2(dst, y)
 18311  		return true
 18312  	}
 18313  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VSQXTUN8H y)))
 18314  	// result: (VSQXTUN2_8H dst y)
 18315  	for {
 18316  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18317  			break
 18318  		}
 18319  		dst := v_0
 18320  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18321  			break
 18322  		}
 18323  		v_1_0 := v_1.Args[0]
 18324  		if v_1_0.Op != ssaop.OpARM64VSQXTUN8H {
 18325  			break
 18326  		}
 18327  		y := v_1_0.Args[0]
 18328  		v.Reset(ssaop.OpARM64VSQXTUN2_8H)
 18329  		v.AddArg2(dst, y)
 18330  		return true
 18331  	}
 18332  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN2D y)))
 18333  	// result: (VUQXTN2_2D dst y)
 18334  	for {
 18335  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18336  			break
 18337  		}
 18338  		dst := v_0
 18339  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18340  			break
 18341  		}
 18342  		v_1_0 := v_1.Args[0]
 18343  		if v_1_0.Op != ssaop.OpARM64VUQXTN2D {
 18344  			break
 18345  		}
 18346  		y := v_1_0.Args[0]
 18347  		v.Reset(ssaop.OpARM64VUQXTN2_2D)
 18348  		v.AddArg2(dst, y)
 18349  		return true
 18350  	}
 18351  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN4S y)))
 18352  	// result: (VUQXTN2_4S dst y)
 18353  	for {
 18354  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18355  			break
 18356  		}
 18357  		dst := v_0
 18358  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18359  			break
 18360  		}
 18361  		v_1_0 := v_1.Args[0]
 18362  		if v_1_0.Op != ssaop.OpARM64VUQXTN4S {
 18363  			break
 18364  		}
 18365  		y := v_1_0.Args[0]
 18366  		v.Reset(ssaop.OpARM64VUQXTN2_4S)
 18367  		v.AddArg2(dst, y)
 18368  		return true
 18369  	}
 18370  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VUQXTN8H y)))
 18371  	// result: (VUQXTN2_8H dst y)
 18372  	for {
 18373  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18374  			break
 18375  		}
 18376  		dst := v_0
 18377  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18378  			break
 18379  		}
 18380  		v_1_0 := v_1.Args[0]
 18381  		if v_1_0.Op != ssaop.OpARM64VUQXTN8H {
 18382  			break
 18383  		}
 18384  		y := v_1_0.Args[0]
 18385  		v.Reset(ssaop.OpARM64VUQXTN2_8H)
 18386  		v.AddArg2(dst, y)
 18387  		return true
 18388  	}
 18389  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN2D y)))
 18390  	// result: (VXTN2_2D dst y)
 18391  	for {
 18392  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18393  			break
 18394  		}
 18395  		dst := v_0
 18396  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18397  			break
 18398  		}
 18399  		v_1_0 := v_1.Args[0]
 18400  		if v_1_0.Op != ssaop.OpARM64VXTN2D {
 18401  			break
 18402  		}
 18403  		y := v_1_0.Args[0]
 18404  		v.Reset(ssaop.OpARM64VXTN2_2D)
 18405  		v.AddArg2(dst, y)
 18406  		return true
 18407  	}
 18408  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN4S y)))
 18409  	// result: (VXTN2_4S dst y)
 18410  	for {
 18411  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18412  			break
 18413  		}
 18414  		dst := v_0
 18415  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18416  			break
 18417  		}
 18418  		v_1_0 := v_1.Args[0]
 18419  		if v_1_0.Op != ssaop.OpARM64VXTN4S {
 18420  			break
 18421  		}
 18422  		y := v_1_0.Args[0]
 18423  		v.Reset(ssaop.OpARM64VXTN2_4S)
 18424  		v.AddArg2(dst, y)
 18425  		return true
 18426  	}
 18427  	// match: (VMOVDins0 [1] dst (VDUPDextr [0] (VXTN8H y)))
 18428  	// result: (VXTN2_8H dst y)
 18429  	for {
 18430  		if ssa.AuxIntToUint8(v.AuxInt) != 1 {
 18431  			break
 18432  		}
 18433  		dst := v_0
 18434  		if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 0 {
 18435  			break
 18436  		}
 18437  		v_1_0 := v_1.Args[0]
 18438  		if v_1_0.Op != ssaop.OpARM64VXTN8H {
 18439  			break
 18440  		}
 18441  		y := v_1_0.Args[0]
 18442  		v.Reset(ssaop.OpARM64VXTN2_8H)
 18443  		v.AddArg2(dst, y)
 18444  		return true
 18445  	}
 18446  	// match: (VMOVDins0 [0] (VMOVI16B [0]) y:(VDUPDextr [i] _))
 18447  	// result: y
 18448  	for {
 18449  		if ssa.AuxIntToUint8(v.AuxInt) != 0 || v_0.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 18450  			break
 18451  		}
 18452  		y := v_1
 18453  		if y.Op != ssaop.OpARM64VDUPDextr {
 18454  			break
 18455  		}
 18456  		v.CopyOf(y)
 18457  		return true
 18458  	}
 18459  	return false
 18460  }
 18461  func rewriteValue_OpARM64VMOVSins0(v *ssa.Value) bool {
 18462  	v_1 := v.Args[1]
 18463  	v_0 := v.Args[0]
 18464  	// match: (VMOVSins0 [0] (VMOVI16B [0]) y:(VDUPSextr [i] _))
 18465  	// result: y
 18466  	for {
 18467  		if ssa.AuxIntToUint8(v.AuxInt) != 0 || v_0.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0.AuxInt) != 0 {
 18468  			break
 18469  		}
 18470  		y := v_1
 18471  		if y.Op != ssaop.OpARM64VDUPSextr {
 18472  			break
 18473  		}
 18474  		v.CopyOf(y)
 18475  		return true
 18476  	}
 18477  	return false
 18478  }
 18479  func rewriteValue_OpARM64VNOT16B(v *ssa.Value) bool {
 18480  	v_0 := v.Args[0]
 18481  	// match: (VNOT16B (VCMEQ16B (VAND16B x y) (VMOVI16B [0])))
 18482  	// result: (VCMTST16B x y)
 18483  	for {
 18484  		if v_0.Op != ssaop.OpARM64VCMEQ16B {
 18485  			break
 18486  		}
 18487  		_ = v_0.Args[1]
 18488  		v_0_0 := v_0.Args[0]
 18489  		v_0_1 := v_0.Args[1]
 18490  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 18491  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 18492  				continue
 18493  			}
 18494  			y := v_0_0.Args[1]
 18495  			x := v_0_0.Args[0]
 18496  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 18497  				continue
 18498  			}
 18499  			v.Reset(ssaop.OpARM64VCMTST16B)
 18500  			v.AddArg2(x, y)
 18501  			return true
 18502  		}
 18503  		break
 18504  	}
 18505  	// match: (VNOT16B (VCMEQ8H (VAND16B x y) (VMOVI16B [0])))
 18506  	// result: (VCMTST8H x y)
 18507  	for {
 18508  		if v_0.Op != ssaop.OpARM64VCMEQ8H {
 18509  			break
 18510  		}
 18511  		_ = v_0.Args[1]
 18512  		v_0_0 := v_0.Args[0]
 18513  		v_0_1 := v_0.Args[1]
 18514  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 18515  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 18516  				continue
 18517  			}
 18518  			y := v_0_0.Args[1]
 18519  			x := v_0_0.Args[0]
 18520  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 18521  				continue
 18522  			}
 18523  			v.Reset(ssaop.OpARM64VCMTST8H)
 18524  			v.AddArg2(x, y)
 18525  			return true
 18526  		}
 18527  		break
 18528  	}
 18529  	// match: (VNOT16B (VCMEQ4S (VAND16B x y) (VMOVI16B [0])))
 18530  	// result: (VCMTST4S x y)
 18531  	for {
 18532  		if v_0.Op != ssaop.OpARM64VCMEQ4S {
 18533  			break
 18534  		}
 18535  		_ = v_0.Args[1]
 18536  		v_0_0 := v_0.Args[0]
 18537  		v_0_1 := v_0.Args[1]
 18538  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 18539  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 18540  				continue
 18541  			}
 18542  			y := v_0_0.Args[1]
 18543  			x := v_0_0.Args[0]
 18544  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 18545  				continue
 18546  			}
 18547  			v.Reset(ssaop.OpARM64VCMTST4S)
 18548  			v.AddArg2(x, y)
 18549  			return true
 18550  		}
 18551  		break
 18552  	}
 18553  	// match: (VNOT16B (VCMEQ2D (VAND16B x y) (VMOVI16B [0])))
 18554  	// result: (VCMTST2D x y)
 18555  	for {
 18556  		if v_0.Op != ssaop.OpARM64VCMEQ2D {
 18557  			break
 18558  		}
 18559  		_ = v_0.Args[1]
 18560  		v_0_0 := v_0.Args[0]
 18561  		v_0_1 := v_0.Args[1]
 18562  		for _i0 := 0; _i0 <= 1; _i0, v_0_0, v_0_1 = _i0+1, v_0_1, v_0_0 {
 18563  			if v_0_0.Op != ssaop.OpARM64VAND16B {
 18564  				continue
 18565  			}
 18566  			y := v_0_0.Args[1]
 18567  			x := v_0_0.Args[0]
 18568  			if v_0_1.Op != ssaop.OpARM64VMOVI16B || ssa.AuxIntToUint8(v_0_1.AuxInt) != 0 {
 18569  				continue
 18570  			}
 18571  			v.Reset(ssaop.OpARM64VCMTST2D)
 18572  			v.AddArg2(x, y)
 18573  			return true
 18574  		}
 18575  		break
 18576  	}
 18577  	return false
 18578  }
 18579  func rewriteValue_OpARM64VPMULL2D(v *ssa.Value) bool {
 18580  	v_1 := v.Args[1]
 18581  	v_0 := v.Args[0]
 18582  	// match: (VPMULL2D (VDUPDextr [1] x) (VDUPDextr [1] y))
 18583  	// result: (VPMULL2_2D x y)
 18584  	for {
 18585  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18586  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18587  				continue
 18588  			}
 18589  			x := v_0.Args[0]
 18590  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18591  				continue
 18592  			}
 18593  			y := v_1.Args[0]
 18594  			v.Reset(ssaop.OpARM64VPMULL2_2D)
 18595  			v.AddArg2(x, y)
 18596  			return true
 18597  		}
 18598  		break
 18599  	}
 18600  	return false
 18601  }
 18602  func rewriteValue_OpARM64VSHL16B(v *ssa.Value) bool {
 18603  	v_0 := v.Args[0]
 18604  	// match: (VSHL16B [a] x)
 18605  	// cond: a==0
 18606  	// result: x
 18607  	for {
 18608  		a := ssa.AuxIntToUint8(v.AuxInt)
 18609  		x := v_0
 18610  		if !(a == 0) {
 18611  			break
 18612  		}
 18613  		v.CopyOf(x)
 18614  		return true
 18615  	}
 18616  	return false
 18617  }
 18618  func rewriteValue_OpARM64VSHL2D(v *ssa.Value) bool {
 18619  	v_0 := v.Args[0]
 18620  	// match: (VSHL2D [a] x)
 18621  	// cond: a==0
 18622  	// result: x
 18623  	for {
 18624  		a := ssa.AuxIntToUint8(v.AuxInt)
 18625  		x := v_0
 18626  		if !(a == 0) {
 18627  			break
 18628  		}
 18629  		v.CopyOf(x)
 18630  		return true
 18631  	}
 18632  	return false
 18633  }
 18634  func rewriteValue_OpARM64VSHL4S(v *ssa.Value) bool {
 18635  	v_0 := v.Args[0]
 18636  	// match: (VSHL4S [a] x)
 18637  	// cond: a==0
 18638  	// result: x
 18639  	for {
 18640  		a := ssa.AuxIntToUint8(v.AuxInt)
 18641  		x := v_0
 18642  		if !(a == 0) {
 18643  			break
 18644  		}
 18645  		v.CopyOf(x)
 18646  		return true
 18647  	}
 18648  	return false
 18649  }
 18650  func rewriteValue_OpARM64VSHL8H(v *ssa.Value) bool {
 18651  	v_0 := v.Args[0]
 18652  	// match: (VSHL8H [a] x)
 18653  	// cond: a==0
 18654  	// result: x
 18655  	for {
 18656  		a := ssa.AuxIntToUint8(v.AuxInt)
 18657  		x := v_0
 18658  		if !(a == 0) {
 18659  			break
 18660  		}
 18661  		v.CopyOf(x)
 18662  		return true
 18663  	}
 18664  	return false
 18665  }
 18666  func rewriteValue_OpARM64VSHRN2D(v *ssa.Value) bool {
 18667  	v_0 := v.Args[0]
 18668  	// match: (VSHRN2D [0] x)
 18669  	// result: (VXTN2D x)
 18670  	for {
 18671  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 18672  			break
 18673  		}
 18674  		x := v_0
 18675  		v.Reset(ssaop.OpARM64VXTN2D)
 18676  		v.AddArg(x)
 18677  		return true
 18678  	}
 18679  	return false
 18680  }
 18681  func rewriteValue_OpARM64VSHRN4S(v *ssa.Value) bool {
 18682  	v_0 := v.Args[0]
 18683  	// match: (VSHRN4S [0] x)
 18684  	// result: (VXTN4S x)
 18685  	for {
 18686  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 18687  			break
 18688  		}
 18689  		x := v_0
 18690  		v.Reset(ssaop.OpARM64VXTN4S)
 18691  		v.AddArg(x)
 18692  		return true
 18693  	}
 18694  	return false
 18695  }
 18696  func rewriteValue_OpARM64VSHRN8H(v *ssa.Value) bool {
 18697  	v_0 := v.Args[0]
 18698  	// match: (VSHRN8H [0] x)
 18699  	// result: (VXTN8H x)
 18700  	for {
 18701  		if ssa.AuxIntToUint8(v.AuxInt) != 0 {
 18702  			break
 18703  		}
 18704  		x := v_0
 18705  		v.Reset(ssaop.OpARM64VXTN8H)
 18706  		v.AddArg(x)
 18707  		return true
 18708  	}
 18709  	return false
 18710  }
 18711  func rewriteValue_OpARM64VSMULL16B(v *ssa.Value) bool {
 18712  	v_1 := v.Args[1]
 18713  	v_0 := v.Args[0]
 18714  	// match: (VSMULL16B (VDUPDextr [1] x) (VDUPDextr [1] y))
 18715  	// result: (VSMULL2_16B x y)
 18716  	for {
 18717  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18718  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18719  				continue
 18720  			}
 18721  			x := v_0.Args[0]
 18722  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18723  				continue
 18724  			}
 18725  			y := v_1.Args[0]
 18726  			v.Reset(ssaop.OpARM64VSMULL2_16B)
 18727  			v.AddArg2(x, y)
 18728  			return true
 18729  		}
 18730  		break
 18731  	}
 18732  	return false
 18733  }
 18734  func rewriteValue_OpARM64VSMULL4S(v *ssa.Value) bool {
 18735  	v_1 := v.Args[1]
 18736  	v_0 := v.Args[0]
 18737  	// match: (VSMULL4S (VDUPDextr [1] x) (VDUPDextr [1] y))
 18738  	// result: (VSMULL2_4S x y)
 18739  	for {
 18740  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18741  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18742  				continue
 18743  			}
 18744  			x := v_0.Args[0]
 18745  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18746  				continue
 18747  			}
 18748  			y := v_1.Args[0]
 18749  			v.Reset(ssaop.OpARM64VSMULL2_4S)
 18750  			v.AddArg2(x, y)
 18751  			return true
 18752  		}
 18753  		break
 18754  	}
 18755  	return false
 18756  }
 18757  func rewriteValue_OpARM64VSMULL8H(v *ssa.Value) bool {
 18758  	v_1 := v.Args[1]
 18759  	v_0 := v.Args[0]
 18760  	// match: (VSMULL8H (VDUPDextr [1] x) (VDUPDextr [1] y))
 18761  	// result: (VSMULL2_8H x y)
 18762  	for {
 18763  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 18764  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18765  				continue
 18766  			}
 18767  			x := v_0.Args[0]
 18768  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 18769  				continue
 18770  			}
 18771  			y := v_1.Args[0]
 18772  			v.Reset(ssaop.OpARM64VSMULL2_8H)
 18773  			v.AddArg2(x, y)
 18774  			return true
 18775  		}
 18776  		break
 18777  	}
 18778  	return false
 18779  }
 18780  func rewriteValue_OpARM64VSQSHL16Bconst(v *ssa.Value) bool {
 18781  	v_0 := v.Args[0]
 18782  	// match: (VSQSHL16Bconst [a] x)
 18783  	// cond: a==0
 18784  	// result: x
 18785  	for {
 18786  		a := ssa.AuxIntToUint8(v.AuxInt)
 18787  		x := v_0
 18788  		if !(a == 0) {
 18789  			break
 18790  		}
 18791  		v.CopyOf(x)
 18792  		return true
 18793  	}
 18794  	return false
 18795  }
 18796  func rewriteValue_OpARM64VSQSHL2Dconst(v *ssa.Value) bool {
 18797  	v_0 := v.Args[0]
 18798  	// match: (VSQSHL2Dconst [a] x)
 18799  	// cond: a==0
 18800  	// result: x
 18801  	for {
 18802  		a := ssa.AuxIntToUint8(v.AuxInt)
 18803  		x := v_0
 18804  		if !(a == 0) {
 18805  			break
 18806  		}
 18807  		v.CopyOf(x)
 18808  		return true
 18809  	}
 18810  	return false
 18811  }
 18812  func rewriteValue_OpARM64VSQSHL4Sconst(v *ssa.Value) bool {
 18813  	v_0 := v.Args[0]
 18814  	// match: (VSQSHL4Sconst [a] x)
 18815  	// cond: a==0
 18816  	// result: x
 18817  	for {
 18818  		a := ssa.AuxIntToUint8(v.AuxInt)
 18819  		x := v_0
 18820  		if !(a == 0) {
 18821  			break
 18822  		}
 18823  		v.CopyOf(x)
 18824  		return true
 18825  	}
 18826  	return false
 18827  }
 18828  func rewriteValue_OpARM64VSQSHL8Hconst(v *ssa.Value) bool {
 18829  	v_0 := v.Args[0]
 18830  	// match: (VSQSHL8Hconst [a] x)
 18831  	// cond: a==0
 18832  	// result: x
 18833  	for {
 18834  		a := ssa.AuxIntToUint8(v.AuxInt)
 18835  		x := v_0
 18836  		if !(a == 0) {
 18837  			break
 18838  		}
 18839  		v.CopyOf(x)
 18840  		return true
 18841  	}
 18842  	return false
 18843  }
 18844  func rewriteValue_OpARM64VSSHLL16B(v *ssa.Value) bool {
 18845  	v_0 := v.Args[0]
 18846  	// match: (VSSHLL16B [a] (VDUPDextr [1] x))
 18847  	// result: (VSSHLL2_16B [a] x)
 18848  	for {
 18849  		a := ssa.AuxIntToUint8(v.AuxInt)
 18850  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18851  			break
 18852  		}
 18853  		x := v_0.Args[0]
 18854  		v.Reset(ssaop.OpARM64VSSHLL2_16B)
 18855  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 18856  		v.AddArg(x)
 18857  		return true
 18858  	}
 18859  	return false
 18860  }
 18861  func rewriteValue_OpARM64VSSHLL4S(v *ssa.Value) bool {
 18862  	v_0 := v.Args[0]
 18863  	// match: (VSSHLL4S [a] (VDUPDextr [1] x))
 18864  	// result: (VSSHLL2_4S [a] x)
 18865  	for {
 18866  		a := ssa.AuxIntToUint8(v.AuxInt)
 18867  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18868  			break
 18869  		}
 18870  		x := v_0.Args[0]
 18871  		v.Reset(ssaop.OpARM64VSSHLL2_4S)
 18872  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 18873  		v.AddArg(x)
 18874  		return true
 18875  	}
 18876  	return false
 18877  }
 18878  func rewriteValue_OpARM64VSSHLL8H(v *ssa.Value) bool {
 18879  	v_0 := v.Args[0]
 18880  	// match: (VSSHLL8H [a] (VDUPDextr [1] x))
 18881  	// result: (VSSHLL2_8H [a] x)
 18882  	for {
 18883  		a := ssa.AuxIntToUint8(v.AuxInt)
 18884  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18885  			break
 18886  		}
 18887  		x := v_0.Args[0]
 18888  		v.Reset(ssaop.OpARM64VSSHLL2_8H)
 18889  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 18890  		v.AddArg(x)
 18891  		return true
 18892  	}
 18893  	return false
 18894  }
 18895  func rewriteValue_OpARM64VSSHR16B(v *ssa.Value) bool {
 18896  	v_0 := v.Args[0]
 18897  	// match: (VSSHR16B [a] x)
 18898  	// cond: a==0
 18899  	// result: x
 18900  	for {
 18901  		a := ssa.AuxIntToUint8(v.AuxInt)
 18902  		x := v_0
 18903  		if !(a == 0) {
 18904  			break
 18905  		}
 18906  		v.CopyOf(x)
 18907  		return true
 18908  	}
 18909  	return false
 18910  }
 18911  func rewriteValue_OpARM64VSSHR2D(v *ssa.Value) bool {
 18912  	v_0 := v.Args[0]
 18913  	// match: (VSSHR2D [a] x)
 18914  	// cond: a==0
 18915  	// result: x
 18916  	for {
 18917  		a := ssa.AuxIntToUint8(v.AuxInt)
 18918  		x := v_0
 18919  		if !(a == 0) {
 18920  			break
 18921  		}
 18922  		v.CopyOf(x)
 18923  		return true
 18924  	}
 18925  	return false
 18926  }
 18927  func rewriteValue_OpARM64VSSHR4S(v *ssa.Value) bool {
 18928  	v_0 := v.Args[0]
 18929  	// match: (VSSHR4S [a] x)
 18930  	// cond: a==0
 18931  	// result: x
 18932  	for {
 18933  		a := ssa.AuxIntToUint8(v.AuxInt)
 18934  		x := v_0
 18935  		if !(a == 0) {
 18936  			break
 18937  		}
 18938  		v.CopyOf(x)
 18939  		return true
 18940  	}
 18941  	return false
 18942  }
 18943  func rewriteValue_OpARM64VSSHR8H(v *ssa.Value) bool {
 18944  	v_0 := v.Args[0]
 18945  	// match: (VSSHR8H [a] x)
 18946  	// cond: a==0
 18947  	// result: x
 18948  	for {
 18949  		a := ssa.AuxIntToUint8(v.AuxInt)
 18950  		x := v_0
 18951  		if !(a == 0) {
 18952  			break
 18953  		}
 18954  		v.CopyOf(x)
 18955  		return true
 18956  	}
 18957  	return false
 18958  }
 18959  func rewriteValue_OpARM64VSXTL16B(v *ssa.Value) bool {
 18960  	v_0 := v.Args[0]
 18961  	// match: (VSXTL16B (VDUPDextr [1] x))
 18962  	// result: (VSXTL2_16B x)
 18963  	for {
 18964  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18965  			break
 18966  		}
 18967  		x := v_0.Args[0]
 18968  		v.Reset(ssaop.OpARM64VSXTL2_16B)
 18969  		v.AddArg(x)
 18970  		return true
 18971  	}
 18972  	return false
 18973  }
 18974  func rewriteValue_OpARM64VSXTL4S(v *ssa.Value) bool {
 18975  	v_0 := v.Args[0]
 18976  	// match: (VSXTL4S (VDUPDextr [1] x))
 18977  	// result: (VSXTL2_4S x)
 18978  	for {
 18979  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18980  			break
 18981  		}
 18982  		x := v_0.Args[0]
 18983  		v.Reset(ssaop.OpARM64VSXTL2_4S)
 18984  		v.AddArg(x)
 18985  		return true
 18986  	}
 18987  	return false
 18988  }
 18989  func rewriteValue_OpARM64VSXTL8H(v *ssa.Value) bool {
 18990  	v_0 := v.Args[0]
 18991  	// match: (VSXTL8H (VDUPDextr [1] x))
 18992  	// result: (VSXTL2_8H x)
 18993  	for {
 18994  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 18995  			break
 18996  		}
 18997  		x := v_0.Args[0]
 18998  		v.Reset(ssaop.OpARM64VSXTL2_8H)
 18999  		v.AddArg(x)
 19000  		return true
 19001  	}
 19002  	return false
 19003  }
 19004  func rewriteValue_OpARM64VUMULL16B(v *ssa.Value) bool {
 19005  	v_1 := v.Args[1]
 19006  	v_0 := v.Args[0]
 19007  	// match: (VUMULL16B (VDUPDextr [1] x) (VDUPDextr [1] y))
 19008  	// result: (VUMULL2_16B x y)
 19009  	for {
 19010  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19011  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19012  				continue
 19013  			}
 19014  			x := v_0.Args[0]
 19015  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19016  				continue
 19017  			}
 19018  			y := v_1.Args[0]
 19019  			v.Reset(ssaop.OpARM64VUMULL2_16B)
 19020  			v.AddArg2(x, y)
 19021  			return true
 19022  		}
 19023  		break
 19024  	}
 19025  	return false
 19026  }
 19027  func rewriteValue_OpARM64VUMULL4S(v *ssa.Value) bool {
 19028  	v_1 := v.Args[1]
 19029  	v_0 := v.Args[0]
 19030  	// match: (VUMULL4S (VDUPDextr [1] x) (VDUPDextr [1] y))
 19031  	// result: (VUMULL2_4S x y)
 19032  	for {
 19033  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19034  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19035  				continue
 19036  			}
 19037  			x := v_0.Args[0]
 19038  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19039  				continue
 19040  			}
 19041  			y := v_1.Args[0]
 19042  			v.Reset(ssaop.OpARM64VUMULL2_4S)
 19043  			v.AddArg2(x, y)
 19044  			return true
 19045  		}
 19046  		break
 19047  	}
 19048  	return false
 19049  }
 19050  func rewriteValue_OpARM64VUMULL8H(v *ssa.Value) bool {
 19051  	v_1 := v.Args[1]
 19052  	v_0 := v.Args[0]
 19053  	// match: (VUMULL8H (VDUPDextr [1] x) (VDUPDextr [1] y))
 19054  	// result: (VUMULL2_8H x y)
 19055  	for {
 19056  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19057  			if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19058  				continue
 19059  			}
 19060  			x := v_0.Args[0]
 19061  			if v_1.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_1.AuxInt) != 1 {
 19062  				continue
 19063  			}
 19064  			y := v_1.Args[0]
 19065  			v.Reset(ssaop.OpARM64VUMULL2_8H)
 19066  			v.AddArg2(x, y)
 19067  			return true
 19068  		}
 19069  		break
 19070  	}
 19071  	return false
 19072  }
 19073  func rewriteValue_OpARM64VUQSHL16Bconst(v *ssa.Value) bool {
 19074  	v_0 := v.Args[0]
 19075  	// match: (VUQSHL16Bconst [a] x)
 19076  	// cond: a==0
 19077  	// result: x
 19078  	for {
 19079  		a := ssa.AuxIntToUint8(v.AuxInt)
 19080  		x := v_0
 19081  		if !(a == 0) {
 19082  			break
 19083  		}
 19084  		v.CopyOf(x)
 19085  		return true
 19086  	}
 19087  	return false
 19088  }
 19089  func rewriteValue_OpARM64VUQSHL2Dconst(v *ssa.Value) bool {
 19090  	v_0 := v.Args[0]
 19091  	// match: (VUQSHL2Dconst [a] x)
 19092  	// cond: a==0
 19093  	// result: x
 19094  	for {
 19095  		a := ssa.AuxIntToUint8(v.AuxInt)
 19096  		x := v_0
 19097  		if !(a == 0) {
 19098  			break
 19099  		}
 19100  		v.CopyOf(x)
 19101  		return true
 19102  	}
 19103  	return false
 19104  }
 19105  func rewriteValue_OpARM64VUQSHL4Sconst(v *ssa.Value) bool {
 19106  	v_0 := v.Args[0]
 19107  	// match: (VUQSHL4Sconst [a] x)
 19108  	// cond: a==0
 19109  	// result: x
 19110  	for {
 19111  		a := ssa.AuxIntToUint8(v.AuxInt)
 19112  		x := v_0
 19113  		if !(a == 0) {
 19114  			break
 19115  		}
 19116  		v.CopyOf(x)
 19117  		return true
 19118  	}
 19119  	return false
 19120  }
 19121  func rewriteValue_OpARM64VUQSHL8Hconst(v *ssa.Value) bool {
 19122  	v_0 := v.Args[0]
 19123  	// match: (VUQSHL8Hconst [a] x)
 19124  	// cond: a==0
 19125  	// result: x
 19126  	for {
 19127  		a := ssa.AuxIntToUint8(v.AuxInt)
 19128  		x := v_0
 19129  		if !(a == 0) {
 19130  			break
 19131  		}
 19132  		v.CopyOf(x)
 19133  		return true
 19134  	}
 19135  	return false
 19136  }
 19137  func rewriteValue_OpARM64VUSHLL16B(v *ssa.Value) bool {
 19138  	v_0 := v.Args[0]
 19139  	// match: (VUSHLL16B [a] (VDUPDextr [1] x))
 19140  	// result: (VUSHLL2_16B [a] x)
 19141  	for {
 19142  		a := ssa.AuxIntToUint8(v.AuxInt)
 19143  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19144  			break
 19145  		}
 19146  		x := v_0.Args[0]
 19147  		v.Reset(ssaop.OpARM64VUSHLL2_16B)
 19148  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19149  		v.AddArg(x)
 19150  		return true
 19151  	}
 19152  	return false
 19153  }
 19154  func rewriteValue_OpARM64VUSHLL4S(v *ssa.Value) bool {
 19155  	v_0 := v.Args[0]
 19156  	// match: (VUSHLL4S [a] (VDUPDextr [1] x))
 19157  	// result: (VUSHLL2_4S [a] x)
 19158  	for {
 19159  		a := ssa.AuxIntToUint8(v.AuxInt)
 19160  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19161  			break
 19162  		}
 19163  		x := v_0.Args[0]
 19164  		v.Reset(ssaop.OpARM64VUSHLL2_4S)
 19165  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19166  		v.AddArg(x)
 19167  		return true
 19168  	}
 19169  	return false
 19170  }
 19171  func rewriteValue_OpARM64VUSHLL8H(v *ssa.Value) bool {
 19172  	v_0 := v.Args[0]
 19173  	// match: (VUSHLL8H [a] (VDUPDextr [1] x))
 19174  	// result: (VUSHLL2_8H [a] x)
 19175  	for {
 19176  		a := ssa.AuxIntToUint8(v.AuxInt)
 19177  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19178  			break
 19179  		}
 19180  		x := v_0.Args[0]
 19181  		v.Reset(ssaop.OpARM64VUSHLL2_8H)
 19182  		v.AuxInt = ssa.Uint8ToAuxInt(a)
 19183  		v.AddArg(x)
 19184  		return true
 19185  	}
 19186  	return false
 19187  }
 19188  func rewriteValue_OpARM64VUSHR16B(v *ssa.Value) bool {
 19189  	v_0 := v.Args[0]
 19190  	// match: (VUSHR16B [a] x)
 19191  	// cond: a==0
 19192  	// result: x
 19193  	for {
 19194  		a := ssa.AuxIntToUint8(v.AuxInt)
 19195  		x := v_0
 19196  		if !(a == 0) {
 19197  			break
 19198  		}
 19199  		v.CopyOf(x)
 19200  		return true
 19201  	}
 19202  	return false
 19203  }
 19204  func rewriteValue_OpARM64VUSHR2D(v *ssa.Value) bool {
 19205  	v_0 := v.Args[0]
 19206  	// match: (VUSHR2D [a] x)
 19207  	// cond: a==0
 19208  	// result: x
 19209  	for {
 19210  		a := ssa.AuxIntToUint8(v.AuxInt)
 19211  		x := v_0
 19212  		if !(a == 0) {
 19213  			break
 19214  		}
 19215  		v.CopyOf(x)
 19216  		return true
 19217  	}
 19218  	return false
 19219  }
 19220  func rewriteValue_OpARM64VUSHR4S(v *ssa.Value) bool {
 19221  	v_0 := v.Args[0]
 19222  	// match: (VUSHR4S [a] x)
 19223  	// cond: a==0
 19224  	// result: x
 19225  	for {
 19226  		a := ssa.AuxIntToUint8(v.AuxInt)
 19227  		x := v_0
 19228  		if !(a == 0) {
 19229  			break
 19230  		}
 19231  		v.CopyOf(x)
 19232  		return true
 19233  	}
 19234  	return false
 19235  }
 19236  func rewriteValue_OpARM64VUSHR8H(v *ssa.Value) bool {
 19237  	v_0 := v.Args[0]
 19238  	// match: (VUSHR8H [a] x)
 19239  	// cond: a==0
 19240  	// result: x
 19241  	for {
 19242  		a := ssa.AuxIntToUint8(v.AuxInt)
 19243  		x := v_0
 19244  		if !(a == 0) {
 19245  			break
 19246  		}
 19247  		v.CopyOf(x)
 19248  		return true
 19249  	}
 19250  	return false
 19251  }
 19252  func rewriteValue_OpARM64VUXTL16B(v *ssa.Value) bool {
 19253  	v_0 := v.Args[0]
 19254  	// match: (VUXTL16B (VDUPDextr [1] x))
 19255  	// result: (VUXTL2_16B x)
 19256  	for {
 19257  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19258  			break
 19259  		}
 19260  		x := v_0.Args[0]
 19261  		v.Reset(ssaop.OpARM64VUXTL2_16B)
 19262  		v.AddArg(x)
 19263  		return true
 19264  	}
 19265  	return false
 19266  }
 19267  func rewriteValue_OpARM64VUXTL4S(v *ssa.Value) bool {
 19268  	v_0 := v.Args[0]
 19269  	// match: (VUXTL4S (VDUPDextr [1] x))
 19270  	// result: (VUXTL2_4S x)
 19271  	for {
 19272  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19273  			break
 19274  		}
 19275  		x := v_0.Args[0]
 19276  		v.Reset(ssaop.OpARM64VUXTL2_4S)
 19277  		v.AddArg(x)
 19278  		return true
 19279  	}
 19280  	return false
 19281  }
 19282  func rewriteValue_OpARM64VUXTL8H(v *ssa.Value) bool {
 19283  	v_0 := v.Args[0]
 19284  	// match: (VUXTL8H (VDUPDextr [1] x))
 19285  	// result: (VUXTL2_8H x)
 19286  	for {
 19287  		if v_0.Op != ssaop.OpARM64VDUPDextr || ssa.AuxIntToUint8(v_0.AuxInt) != 1 {
 19288  			break
 19289  		}
 19290  		x := v_0.Args[0]
 19291  		v.Reset(ssaop.OpARM64VUXTL2_8H)
 19292  		v.AddArg(x)
 19293  		return true
 19294  	}
 19295  	return false
 19296  }
 19297  func rewriteValue_OpARM64XOR(v *ssa.Value) bool {
 19298  	v_1 := v.Args[1]
 19299  	v_0 := v.Args[0]
 19300  	// match: (XOR x (MOVDconst [c]))
 19301  	// result: (XORconst [c] x)
 19302  	for {
 19303  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19304  			x := v_0
 19305  			if v_1.Op != ssaop.OpARM64MOVDconst {
 19306  				continue
 19307  			}
 19308  			c := ssa.AuxIntToInt64(v_1.AuxInt)
 19309  			v.Reset(ssaop.OpARM64XORconst)
 19310  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19311  			v.AddArg(x)
 19312  			return true
 19313  		}
 19314  		break
 19315  	}
 19316  	// match: (XOR x x)
 19317  	// result: (MOVDconst [0])
 19318  	for {
 19319  		x := v_0
 19320  		if x != v_1 {
 19321  			break
 19322  		}
 19323  		v.Reset(ssaop.OpARM64MOVDconst)
 19324  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19325  		return true
 19326  	}
 19327  	// match: (XOR x (MVN y))
 19328  	// result: (EON x y)
 19329  	for {
 19330  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19331  			x := v_0
 19332  			if v_1.Op != ssaop.OpARM64MVN {
 19333  				continue
 19334  			}
 19335  			y := v_1.Args[0]
 19336  			v.Reset(ssaop.OpARM64EON)
 19337  			v.AddArg2(x, y)
 19338  			return true
 19339  		}
 19340  		break
 19341  	}
 19342  	// match: (XOR x0 x1:(SLLconst [c] y))
 19343  	// cond: ssa.ClobberIfDead(x1)
 19344  	// result: (XORshiftLL x0 y [c])
 19345  	for {
 19346  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19347  			x0 := v_0
 19348  			x1 := v_1
 19349  			if x1.Op != ssaop.OpARM64SLLconst {
 19350  				continue
 19351  			}
 19352  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19353  			y := x1.Args[0]
 19354  			if !(ssa.ClobberIfDead(x1)) {
 19355  				continue
 19356  			}
 19357  			v.Reset(ssaop.OpARM64XORshiftLL)
 19358  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19359  			v.AddArg2(x0, y)
 19360  			return true
 19361  		}
 19362  		break
 19363  	}
 19364  	// match: (XOR x0 x1:(SRLconst [c] y))
 19365  	// cond: ssa.ClobberIfDead(x1)
 19366  	// result: (XORshiftRL x0 y [c])
 19367  	for {
 19368  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19369  			x0 := v_0
 19370  			x1 := v_1
 19371  			if x1.Op != ssaop.OpARM64SRLconst {
 19372  				continue
 19373  			}
 19374  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19375  			y := x1.Args[0]
 19376  			if !(ssa.ClobberIfDead(x1)) {
 19377  				continue
 19378  			}
 19379  			v.Reset(ssaop.OpARM64XORshiftRL)
 19380  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19381  			v.AddArg2(x0, y)
 19382  			return true
 19383  		}
 19384  		break
 19385  	}
 19386  	// match: (XOR x0 x1:(SRAconst [c] y))
 19387  	// cond: ssa.ClobberIfDead(x1)
 19388  	// result: (XORshiftRA x0 y [c])
 19389  	for {
 19390  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19391  			x0 := v_0
 19392  			x1 := v_1
 19393  			if x1.Op != ssaop.OpARM64SRAconst {
 19394  				continue
 19395  			}
 19396  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19397  			y := x1.Args[0]
 19398  			if !(ssa.ClobberIfDead(x1)) {
 19399  				continue
 19400  			}
 19401  			v.Reset(ssaop.OpARM64XORshiftRA)
 19402  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19403  			v.AddArg2(x0, y)
 19404  			return true
 19405  		}
 19406  		break
 19407  	}
 19408  	// match: (XOR x0 x1:(RORconst [c] y))
 19409  	// cond: ssa.ClobberIfDead(x1)
 19410  	// result: (XORshiftRO x0 y [c])
 19411  	for {
 19412  		for _i0 := 0; _i0 <= 1; _i0, v_0, v_1 = _i0+1, v_1, v_0 {
 19413  			x0 := v_0
 19414  			x1 := v_1
 19415  			if x1.Op != ssaop.OpARM64RORconst {
 19416  				continue
 19417  			}
 19418  			c := ssa.AuxIntToInt64(x1.AuxInt)
 19419  			y := x1.Args[0]
 19420  			if !(ssa.ClobberIfDead(x1)) {
 19421  				continue
 19422  			}
 19423  			v.Reset(ssaop.OpARM64XORshiftRO)
 19424  			v.AuxInt = ssa.Int64ToAuxInt(c)
 19425  			v.AddArg2(x0, y)
 19426  			return true
 19427  		}
 19428  		break
 19429  	}
 19430  	return false
 19431  }
 19432  func rewriteValue_OpARM64XORconst(v *ssa.Value) bool {
 19433  	v_0 := v.Args[0]
 19434  	// match: (XORconst [0] x)
 19435  	// result: x
 19436  	for {
 19437  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 19438  			break
 19439  		}
 19440  		x := v_0
 19441  		v.CopyOf(x)
 19442  		return true
 19443  	}
 19444  	// match: (XORconst [-1] x)
 19445  	// result: (MVN x)
 19446  	for {
 19447  		if ssa.AuxIntToInt64(v.AuxInt) != -1 {
 19448  			break
 19449  		}
 19450  		x := v_0
 19451  		v.Reset(ssaop.OpARM64MVN)
 19452  		v.AddArg(x)
 19453  		return true
 19454  	}
 19455  	// match: (XORconst [c] (MOVDconst [d]))
 19456  	// result: (MOVDconst [c^d])
 19457  	for {
 19458  		c := ssa.AuxIntToInt64(v.AuxInt)
 19459  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19460  			break
 19461  		}
 19462  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 19463  		v.Reset(ssaop.OpARM64MOVDconst)
 19464  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
 19465  		return true
 19466  	}
 19467  	// match: (XORconst [c] (XORconst [d] x))
 19468  	// result: (XORconst [c^d] x)
 19469  	for {
 19470  		c := ssa.AuxIntToInt64(v.AuxInt)
 19471  		if v_0.Op != ssaop.OpARM64XORconst {
 19472  			break
 19473  		}
 19474  		d := ssa.AuxIntToInt64(v_0.AuxInt)
 19475  		x := v_0.Args[0]
 19476  		v.Reset(ssaop.OpARM64XORconst)
 19477  		v.AuxInt = ssa.Int64ToAuxInt(c ^ d)
 19478  		v.AddArg(x)
 19479  		return true
 19480  	}
 19481  	return false
 19482  }
 19483  func rewriteValue_OpARM64XORshiftLL(v *ssa.Value) bool {
 19484  	v_1 := v.Args[1]
 19485  	v_0 := v.Args[0]
 19486  	b := v.Block
 19487  	typ := &b.Func.Config.Types
 19488  	// match: (XORshiftLL (MOVDconst [c]) x [d])
 19489  	// result: (XORconst [c] (SLLconst <x.Type> x [d]))
 19490  	for {
 19491  		d := ssa.AuxIntToInt64(v.AuxInt)
 19492  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19493  			break
 19494  		}
 19495  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 19496  		x := v_1
 19497  		v.Reset(ssaop.OpARM64XORconst)
 19498  		v.AuxInt = ssa.Int64ToAuxInt(c)
 19499  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLLconst, x.Type)
 19500  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 19501  		v0.AddArg(x)
 19502  		v.AddArg(v0)
 19503  		return true
 19504  	}
 19505  	// match: (XORshiftLL x (MOVDconst [c]) [d])
 19506  	// result: (XORconst x [int64(uint64(c)<<uint64(d))])
 19507  	for {
 19508  		d := ssa.AuxIntToInt64(v.AuxInt)
 19509  		x := v_0
 19510  		if v_1.Op != ssaop.OpARM64MOVDconst {
 19511  			break
 19512  		}
 19513  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 19514  		v.Reset(ssaop.OpARM64XORconst)
 19515  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) << uint64(d)))
 19516  		v.AddArg(x)
 19517  		return true
 19518  	}
 19519  	// match: (XORshiftLL (SLLconst x [c]) x [c])
 19520  	// result: (MOVDconst [0])
 19521  	for {
 19522  		c := ssa.AuxIntToInt64(v.AuxInt)
 19523  		if v_0.Op != ssaop.OpARM64SLLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 19524  			break
 19525  		}
 19526  		x := v_0.Args[0]
 19527  		if x != v_1 {
 19528  			break
 19529  		}
 19530  		v.Reset(ssaop.OpARM64MOVDconst)
 19531  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19532  		return true
 19533  	}
 19534  	// match: (XORshiftLL <typ.UInt16> [8] (UBFX <typ.UInt16> [ssa.ArmBFAuxInt(8, 8)] x) x)
 19535  	// result: (REV16W x)
 19536  	for {
 19537  		if v.Type != typ.UInt16 || ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || v_0.Type != typ.UInt16 || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 8) {
 19538  			break
 19539  		}
 19540  		x := v_0.Args[0]
 19541  		if x != v_1 {
 19542  			break
 19543  		}
 19544  		v.Reset(ssaop.OpARM64REV16W)
 19545  		v.AddArg(x)
 19546  		return true
 19547  	}
 19548  	// match: (XORshiftLL [8] (UBFX [ssa.ArmBFAuxInt(8, 24)] (ANDconst [c1] x)) (ANDconst [c2] x))
 19549  	// cond: uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff
 19550  	// result: (REV16W x)
 19551  	for {
 19552  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64UBFX || ssa.AuxIntToArm64BitField(v_0.AuxInt) != ssa.ArmBFAuxInt(8, 24) {
 19553  			break
 19554  		}
 19555  		v_0_0 := v_0.Args[0]
 19556  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 19557  			break
 19558  		}
 19559  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 19560  		x := v_0_0.Args[0]
 19561  		if v_1.Op != ssaop.OpARM64ANDconst {
 19562  			break
 19563  		}
 19564  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 19565  		if x != v_1.Args[0] || !(uint32(c1) == 0xff00ff00 && uint32(c2) == 0x00ff00ff) {
 19566  			break
 19567  		}
 19568  		v.Reset(ssaop.OpARM64REV16W)
 19569  		v.AddArg(x)
 19570  		return true
 19571  	}
 19572  	// match: (XORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 19573  	// cond: (uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff)
 19574  	// result: (REV16 x)
 19575  	for {
 19576  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 19577  			break
 19578  		}
 19579  		v_0_0 := v_0.Args[0]
 19580  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 19581  			break
 19582  		}
 19583  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 19584  		x := v_0_0.Args[0]
 19585  		if v_1.Op != ssaop.OpARM64ANDconst {
 19586  			break
 19587  		}
 19588  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 19589  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00ff00ff00 && uint64(c2) == 0x00ff00ff00ff00ff) {
 19590  			break
 19591  		}
 19592  		v.Reset(ssaop.OpARM64REV16)
 19593  		v.AddArg(x)
 19594  		return true
 19595  	}
 19596  	// match: (XORshiftLL [8] (SRLconst [8] (ANDconst [c1] x)) (ANDconst [c2] x))
 19597  	// cond: (uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff)
 19598  	// result: (REV16 (ANDconst <x.Type> [0xffffffff] x))
 19599  	for {
 19600  		if ssa.AuxIntToInt64(v.AuxInt) != 8 || v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 8 {
 19601  			break
 19602  		}
 19603  		v_0_0 := v_0.Args[0]
 19604  		if v_0_0.Op != ssaop.OpARM64ANDconst {
 19605  			break
 19606  		}
 19607  		c1 := ssa.AuxIntToInt64(v_0_0.AuxInt)
 19608  		x := v_0_0.Args[0]
 19609  		if v_1.Op != ssaop.OpARM64ANDconst {
 19610  			break
 19611  		}
 19612  		c2 := ssa.AuxIntToInt64(v_1.AuxInt)
 19613  		if x != v_1.Args[0] || !(uint64(c1) == 0xff00ff00 && uint64(c2) == 0x00ff00ff) {
 19614  			break
 19615  		}
 19616  		v.Reset(ssaop.OpARM64REV16)
 19617  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, x.Type)
 19618  		v0.AuxInt = ssa.Int64ToAuxInt(0xffffffff)
 19619  		v0.AddArg(x)
 19620  		v.AddArg(v0)
 19621  		return true
 19622  	}
 19623  	// match: (XORshiftLL [c] (SRLconst x [64-c]) x2)
 19624  	// result: (EXTRconst [64-c] x2 x)
 19625  	for {
 19626  		c := ssa.AuxIntToInt64(v.AuxInt)
 19627  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != 64-c {
 19628  			break
 19629  		}
 19630  		x := v_0.Args[0]
 19631  		x2 := v_1
 19632  		v.Reset(ssaop.OpARM64EXTRconst)
 19633  		v.AuxInt = ssa.Int64ToAuxInt(64 - c)
 19634  		v.AddArg2(x2, x)
 19635  		return true
 19636  	}
 19637  	// match: (XORshiftLL <t> [c] (UBFX [bfc] x) x2)
 19638  	// cond: c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)
 19639  	// result: (EXTRWconst [32-c] x2 x)
 19640  	for {
 19641  		t := v.Type
 19642  		c := ssa.AuxIntToInt64(v.AuxInt)
 19643  		if v_0.Op != ssaop.OpARM64UBFX {
 19644  			break
 19645  		}
 19646  		bfc := ssa.AuxIntToArm64BitField(v_0.AuxInt)
 19647  		x := v_0.Args[0]
 19648  		x2 := v_1
 19649  		if !(c < 32 && t.Size() == 4 && bfc == ssa.ArmBFAuxInt(32-c, c)) {
 19650  			break
 19651  		}
 19652  		v.Reset(ssaop.OpARM64EXTRWconst)
 19653  		v.AuxInt = ssa.Int64ToAuxInt(32 - c)
 19654  		v.AddArg2(x2, x)
 19655  		return true
 19656  	}
 19657  	return false
 19658  }
 19659  func rewriteValue_OpARM64XORshiftRA(v *ssa.Value) bool {
 19660  	v_1 := v.Args[1]
 19661  	v_0 := v.Args[0]
 19662  	b := v.Block
 19663  	// match: (XORshiftRA (MOVDconst [c]) x [d])
 19664  	// result: (XORconst [c] (SRAconst <x.Type> x [d]))
 19665  	for {
 19666  		d := ssa.AuxIntToInt64(v.AuxInt)
 19667  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19668  			break
 19669  		}
 19670  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 19671  		x := v_1
 19672  		v.Reset(ssaop.OpARM64XORconst)
 19673  		v.AuxInt = ssa.Int64ToAuxInt(c)
 19674  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRAconst, x.Type)
 19675  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 19676  		v0.AddArg(x)
 19677  		v.AddArg(v0)
 19678  		return true
 19679  	}
 19680  	// match: (XORshiftRA x (MOVDconst [c]) [d])
 19681  	// result: (XORconst x [c>>uint64(d)])
 19682  	for {
 19683  		d := ssa.AuxIntToInt64(v.AuxInt)
 19684  		x := v_0
 19685  		if v_1.Op != ssaop.OpARM64MOVDconst {
 19686  			break
 19687  		}
 19688  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 19689  		v.Reset(ssaop.OpARM64XORconst)
 19690  		v.AuxInt = ssa.Int64ToAuxInt(c >> uint64(d))
 19691  		v.AddArg(x)
 19692  		return true
 19693  	}
 19694  	// match: (XORshiftRA (SRAconst x [c]) x [c])
 19695  	// result: (MOVDconst [0])
 19696  	for {
 19697  		c := ssa.AuxIntToInt64(v.AuxInt)
 19698  		if v_0.Op != ssaop.OpARM64SRAconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 19699  			break
 19700  		}
 19701  		x := v_0.Args[0]
 19702  		if x != v_1 {
 19703  			break
 19704  		}
 19705  		v.Reset(ssaop.OpARM64MOVDconst)
 19706  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19707  		return true
 19708  	}
 19709  	return false
 19710  }
 19711  func rewriteValue_OpARM64XORshiftRL(v *ssa.Value) bool {
 19712  	v_1 := v.Args[1]
 19713  	v_0 := v.Args[0]
 19714  	b := v.Block
 19715  	// match: (XORshiftRL (MOVDconst [c]) x [d])
 19716  	// result: (XORconst [c] (SRLconst <x.Type> x [d]))
 19717  	for {
 19718  		d := ssa.AuxIntToInt64(v.AuxInt)
 19719  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19720  			break
 19721  		}
 19722  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 19723  		x := v_1
 19724  		v.Reset(ssaop.OpARM64XORconst)
 19725  		v.AuxInt = ssa.Int64ToAuxInt(c)
 19726  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, x.Type)
 19727  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 19728  		v0.AddArg(x)
 19729  		v.AddArg(v0)
 19730  		return true
 19731  	}
 19732  	// match: (XORshiftRL x (MOVDconst [c]) [d])
 19733  	// result: (XORconst x [int64(uint64(c)>>uint64(d))])
 19734  	for {
 19735  		d := ssa.AuxIntToInt64(v.AuxInt)
 19736  		x := v_0
 19737  		if v_1.Op != ssaop.OpARM64MOVDconst {
 19738  			break
 19739  		}
 19740  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 19741  		v.Reset(ssaop.OpARM64XORconst)
 19742  		v.AuxInt = ssa.Int64ToAuxInt(int64(uint64(c) >> uint64(d)))
 19743  		v.AddArg(x)
 19744  		return true
 19745  	}
 19746  	// match: (XORshiftRL (SRLconst x [c]) x [c])
 19747  	// result: (MOVDconst [0])
 19748  	for {
 19749  		c := ssa.AuxIntToInt64(v.AuxInt)
 19750  		if v_0.Op != ssaop.OpARM64SRLconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 19751  			break
 19752  		}
 19753  		x := v_0.Args[0]
 19754  		if x != v_1 {
 19755  			break
 19756  		}
 19757  		v.Reset(ssaop.OpARM64MOVDconst)
 19758  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19759  		return true
 19760  	}
 19761  	return false
 19762  }
 19763  func rewriteValue_OpARM64XORshiftRO(v *ssa.Value) bool {
 19764  	v_1 := v.Args[1]
 19765  	v_0 := v.Args[0]
 19766  	b := v.Block
 19767  	// match: (XORshiftRO (MOVDconst [c]) x [d])
 19768  	// result: (XORconst [c] (RORconst <x.Type> x [d]))
 19769  	for {
 19770  		d := ssa.AuxIntToInt64(v.AuxInt)
 19771  		if v_0.Op != ssaop.OpARM64MOVDconst {
 19772  			break
 19773  		}
 19774  		c := ssa.AuxIntToInt64(v_0.AuxInt)
 19775  		x := v_1
 19776  		v.Reset(ssaop.OpARM64XORconst)
 19777  		v.AuxInt = ssa.Int64ToAuxInt(c)
 19778  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RORconst, x.Type)
 19779  		v0.AuxInt = ssa.Int64ToAuxInt(d)
 19780  		v0.AddArg(x)
 19781  		v.AddArg(v0)
 19782  		return true
 19783  	}
 19784  	// match: (XORshiftRO x (MOVDconst [c]) [d])
 19785  	// result: (XORconst x [rotateRight64(c, d)])
 19786  	for {
 19787  		d := ssa.AuxIntToInt64(v.AuxInt)
 19788  		x := v_0
 19789  		if v_1.Op != ssaop.OpARM64MOVDconst {
 19790  			break
 19791  		}
 19792  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 19793  		v.Reset(ssaop.OpARM64XORconst)
 19794  		v.AuxInt = ssa.Int64ToAuxInt(rotateRight64(c, d))
 19795  		v.AddArg(x)
 19796  		return true
 19797  	}
 19798  	// match: (XORshiftRO (RORconst x [c]) x [c])
 19799  	// result: (MOVDconst [0])
 19800  	for {
 19801  		c := ssa.AuxIntToInt64(v.AuxInt)
 19802  		if v_0.Op != ssaop.OpARM64RORconst || ssa.AuxIntToInt64(v_0.AuxInt) != c {
 19803  			break
 19804  		}
 19805  		x := v_0.Args[0]
 19806  		if x != v_1 {
 19807  			break
 19808  		}
 19809  		v.Reset(ssaop.OpARM64MOVDconst)
 19810  		v.AuxInt = ssa.Int64ToAuxInt(0)
 19811  		return true
 19812  	}
 19813  	return false
 19814  }
 19815  func rewriteValue_OpAddr(v *ssa.Value) bool {
 19816  	v_0 := v.Args[0]
 19817  	// match: (Addr {sym} base)
 19818  	// result: (MOVDaddr {sym} base)
 19819  	for {
 19820  		sym := ssa.AuxToSym(v.Aux)
 19821  		base := v_0
 19822  		v.Reset(ssaop.OpARM64MOVDaddr)
 19823  		v.Aux = ssa.SymToAux(sym)
 19824  		v.AddArg(base)
 19825  		return true
 19826  	}
 19827  }
 19828  func rewriteValue_OpAvg64u(v *ssa.Value) bool {
 19829  	v_1 := v.Args[1]
 19830  	v_0 := v.Args[0]
 19831  	b := v.Block
 19832  	// match: (Avg64u <t> x y)
 19833  	// result: (ADD (SRLconst <t> (SUB <t> x y) [1]) y)
 19834  	for {
 19835  		t := v.Type
 19836  		x := v_0
 19837  		y := v_1
 19838  		v.Reset(ssaop.OpARM64ADD)
 19839  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRLconst, t)
 19840  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 19841  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64SUB, t)
 19842  		v1.AddArg2(x, y)
 19843  		v0.AddArg(v1)
 19844  		v.AddArg2(v0, y)
 19845  		return true
 19846  	}
 19847  }
 19848  func rewriteValue_OpBitLen16(v *ssa.Value) bool {
 19849  	v_0 := v.Args[0]
 19850  	b := v.Block
 19851  	typ := &b.Func.Config.Types
 19852  	// match: (BitLen16 x)
 19853  	// result: (BitLen64 (ZeroExt16to64 x))
 19854  	for {
 19855  		x := v_0
 19856  		v.Reset(ssaop.OpBitLen64)
 19857  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 19858  		v0.AddArg(x)
 19859  		v.AddArg(v0)
 19860  		return true
 19861  	}
 19862  }
 19863  func rewriteValue_OpBitLen32(v *ssa.Value) bool {
 19864  	v_0 := v.Args[0]
 19865  	b := v.Block
 19866  	typ := &b.Func.Config.Types
 19867  	// match: (BitLen32 x)
 19868  	// result: (SUB (MOVDconst [32]) (CLZW <typ.Int> x))
 19869  	for {
 19870  		x := v_0
 19871  		v.Reset(ssaop.OpARM64SUB)
 19872  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 19873  		v0.AuxInt = ssa.Int64ToAuxInt(32)
 19874  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64CLZW, typ.Int)
 19875  		v1.AddArg(x)
 19876  		v.AddArg2(v0, v1)
 19877  		return true
 19878  	}
 19879  }
 19880  func rewriteValue_OpBitLen64(v *ssa.Value) bool {
 19881  	v_0 := v.Args[0]
 19882  	b := v.Block
 19883  	typ := &b.Func.Config.Types
 19884  	// match: (BitLen64 x)
 19885  	// result: (SUB (MOVDconst [64]) (CLZ <typ.Int> x))
 19886  	for {
 19887  		x := v_0
 19888  		v.Reset(ssaop.OpARM64SUB)
 19889  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 19890  		v0.AuxInt = ssa.Int64ToAuxInt(64)
 19891  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64CLZ, typ.Int)
 19892  		v1.AddArg(x)
 19893  		v.AddArg2(v0, v1)
 19894  		return true
 19895  	}
 19896  }
 19897  func rewriteValue_OpBitLen8(v *ssa.Value) bool {
 19898  	v_0 := v.Args[0]
 19899  	b := v.Block
 19900  	typ := &b.Func.Config.Types
 19901  	// match: (BitLen8 x)
 19902  	// result: (BitLen64 (ZeroExt8to64 x))
 19903  	for {
 19904  		x := v_0
 19905  		v.Reset(ssaop.OpBitLen64)
 19906  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 19907  		v0.AddArg(x)
 19908  		v.AddArg(v0)
 19909  		return true
 19910  	}
 19911  }
 19912  func rewriteValue_OpBitRev16(v *ssa.Value) bool {
 19913  	v_0 := v.Args[0]
 19914  	b := v.Block
 19915  	typ := &b.Func.Config.Types
 19916  	// match: (BitRev16 x)
 19917  	// result: (SRLconst [48] (RBIT <typ.UInt64> x))
 19918  	for {
 19919  		x := v_0
 19920  		v.Reset(ssaop.OpARM64SRLconst)
 19921  		v.AuxInt = ssa.Int64ToAuxInt(48)
 19922  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, typ.UInt64)
 19923  		v0.AddArg(x)
 19924  		v.AddArg(v0)
 19925  		return true
 19926  	}
 19927  }
 19928  func rewriteValue_OpBitRev8(v *ssa.Value) bool {
 19929  	v_0 := v.Args[0]
 19930  	b := v.Block
 19931  	typ := &b.Func.Config.Types
 19932  	// match: (BitRev8 x)
 19933  	// result: (SRLconst [56] (RBIT <typ.UInt64> x))
 19934  	for {
 19935  		x := v_0
 19936  		v.Reset(ssaop.OpARM64SRLconst)
 19937  		v.AuxInt = ssa.Int64ToAuxInt(56)
 19938  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, typ.UInt64)
 19939  		v0.AddArg(x)
 19940  		v.AddArg(v0)
 19941  		return true
 19942  	}
 19943  }
 19944  func rewriteValue_OpCondSelect(v *ssa.Value) bool {
 19945  	v_2 := v.Args[2]
 19946  	v_1 := v.Args[1]
 19947  	v_0 := v.Args[0]
 19948  	b := v.Block
 19949  	// match: (CondSelect x y boolval)
 19950  	// cond: ssa.FlagArg(boolval) != nil
 19951  	// result: (CSEL [boolval.Op] x y ssa.FlagArg(boolval))
 19952  	for {
 19953  		x := v_0
 19954  		y := v_1
 19955  		boolval := v_2
 19956  		if !(ssa.FlagArg(boolval) != nil) {
 19957  			break
 19958  		}
 19959  		v.Reset(ssaop.OpARM64CSEL)
 19960  		v.AuxInt = ssa.OpToAuxInt(boolval.Op)
 19961  		v.AddArg3(x, y, ssa.FlagArg(boolval))
 19962  		return true
 19963  	}
 19964  	// match: (CondSelect x y boolval)
 19965  	// cond: ssa.FlagArg(boolval) == nil
 19966  	// result: (CSEL [ssaop.OpARM64NotEqual] x y (TSTWconst [1] boolval))
 19967  	for {
 19968  		x := v_0
 19969  		y := v_1
 19970  		boolval := v_2
 19971  		if !(ssa.FlagArg(boolval) == nil) {
 19972  			break
 19973  		}
 19974  		v.Reset(ssaop.OpARM64CSEL)
 19975  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64NotEqual)
 19976  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 19977  		v0.AuxInt = ssa.Int32ToAuxInt(1)
 19978  		v0.AddArg(boolval)
 19979  		v.AddArg3(x, y, v0)
 19980  		return true
 19981  	}
 19982  	return false
 19983  }
 19984  func rewriteValue_OpConst16(v *ssa.Value) bool {
 19985  	// match: (Const16 [val])
 19986  	// result: (MOVDconst [int64(val)])
 19987  	for {
 19988  		val := ssa.AuxIntToInt16(v.AuxInt)
 19989  		v.Reset(ssaop.OpARM64MOVDconst)
 19990  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 19991  		return true
 19992  	}
 19993  }
 19994  func rewriteValue_OpConst32(v *ssa.Value) bool {
 19995  	// match: (Const32 [val])
 19996  	// result: (MOVDconst [int64(val)])
 19997  	for {
 19998  		val := ssa.AuxIntToInt32(v.AuxInt)
 19999  		v.Reset(ssaop.OpARM64MOVDconst)
 20000  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 20001  		return true
 20002  	}
 20003  }
 20004  func rewriteValue_OpConst32F(v *ssa.Value) bool {
 20005  	// match: (Const32F [val])
 20006  	// result: (FMOVSconst [float64(val)])
 20007  	for {
 20008  		val := ssa.AuxIntToFloat32(v.AuxInt)
 20009  		v.Reset(ssaop.OpARM64FMOVSconst)
 20010  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
 20011  		return true
 20012  	}
 20013  }
 20014  func rewriteValue_OpConst64(v *ssa.Value) bool {
 20015  	// match: (Const64 [val])
 20016  	// result: (MOVDconst [int64(val)])
 20017  	for {
 20018  		val := ssa.AuxIntToInt64(v.AuxInt)
 20019  		v.Reset(ssaop.OpARM64MOVDconst)
 20020  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 20021  		return true
 20022  	}
 20023  }
 20024  func rewriteValue_OpConst64F(v *ssa.Value) bool {
 20025  	// match: (Const64F [val])
 20026  	// result: (FMOVDconst [float64(val)])
 20027  	for {
 20028  		val := ssa.AuxIntToFloat64(v.AuxInt)
 20029  		v.Reset(ssaop.OpARM64FMOVDconst)
 20030  		v.AuxInt = ssa.Float64ToAuxInt(float64(val))
 20031  		return true
 20032  	}
 20033  }
 20034  func rewriteValue_OpConst8(v *ssa.Value) bool {
 20035  	// match: (Const8 [val])
 20036  	// result: (MOVDconst [int64(val)])
 20037  	for {
 20038  		val := ssa.AuxIntToInt8(v.AuxInt)
 20039  		v.Reset(ssaop.OpARM64MOVDconst)
 20040  		v.AuxInt = ssa.Int64ToAuxInt(int64(val))
 20041  		return true
 20042  	}
 20043  }
 20044  func rewriteValue_OpConstBool(v *ssa.Value) bool {
 20045  	// match: (ConstBool [t])
 20046  	// result: (MOVDconst [ssa.B2i(t)])
 20047  	for {
 20048  		t := ssa.AuxIntToBool(v.AuxInt)
 20049  		v.Reset(ssaop.OpARM64MOVDconst)
 20050  		v.AuxInt = ssa.Int64ToAuxInt(ssa.B2i(t))
 20051  		return true
 20052  	}
 20053  }
 20054  func rewriteValue_OpConstNil(v *ssa.Value) bool {
 20055  	// match: (ConstNil)
 20056  	// result: (MOVDconst [0])
 20057  	for {
 20058  		v.Reset(ssaop.OpARM64MOVDconst)
 20059  		v.AuxInt = ssa.Int64ToAuxInt(0)
 20060  		return true
 20061  	}
 20062  }
 20063  func rewriteValue_OpCount8s(v *ssa.Value) bool {
 20064  	v_0 := v.Args[0]
 20065  	b := v.Block
 20066  	typ := &b.Func.Config.Types
 20067  	// match: (Count8s r)
 20068  	// result: (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) r))
 20069  	for {
 20070  		r := v_0
 20071  		v.Reset(ssaop.OpSelect0)
 20072  		v.Type = types.TypeMask
 20073  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 20074  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20075  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 20076  		v0.AddArg2(v1, r)
 20077  		v.AddArg(v0)
 20078  		return true
 20079  	}
 20080  }
 20081  func rewriteValue_OpCtz16(v *ssa.Value) bool {
 20082  	v_0 := v.Args[0]
 20083  	b := v.Block
 20084  	typ := &b.Func.Config.Types
 20085  	// match: (Ctz16 <t> x)
 20086  	// result: (CLZW <t> (RBITW <typ.UInt32> (ORconst <typ.UInt32> [0x10000] x)))
 20087  	for {
 20088  		t := v.Type
 20089  		x := v_0
 20090  		v.Reset(ssaop.OpARM64CLZW)
 20091  		v.Type = t
 20092  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, typ.UInt32)
 20093  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ORconst, typ.UInt32)
 20094  		v1.AuxInt = ssa.Int64ToAuxInt(0x10000)
 20095  		v1.AddArg(x)
 20096  		v0.AddArg(v1)
 20097  		v.AddArg(v0)
 20098  		return true
 20099  	}
 20100  }
 20101  func rewriteValue_OpCtz32(v *ssa.Value) bool {
 20102  	v_0 := v.Args[0]
 20103  	b := v.Block
 20104  	// match: (Ctz32 <t> x)
 20105  	// result: (CLZW (RBITW <t> x))
 20106  	for {
 20107  		t := v.Type
 20108  		x := v_0
 20109  		v.Reset(ssaop.OpARM64CLZW)
 20110  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, t)
 20111  		v0.AddArg(x)
 20112  		v.AddArg(v0)
 20113  		return true
 20114  	}
 20115  }
 20116  func rewriteValue_OpCtz64(v *ssa.Value) bool {
 20117  	v_0 := v.Args[0]
 20118  	b := v.Block
 20119  	// match: (Ctz64 <t> x)
 20120  	// result: (CLZ (RBIT <t> x))
 20121  	for {
 20122  		t := v.Type
 20123  		x := v_0
 20124  		v.Reset(ssaop.OpARM64CLZ)
 20125  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBIT, t)
 20126  		v0.AddArg(x)
 20127  		v.AddArg(v0)
 20128  		return true
 20129  	}
 20130  }
 20131  func rewriteValue_OpCtz8(v *ssa.Value) bool {
 20132  	v_0 := v.Args[0]
 20133  	b := v.Block
 20134  	typ := &b.Func.Config.Types
 20135  	// match: (Ctz8 <t> x)
 20136  	// result: (CLZW <t> (RBITW <typ.UInt32> (ORconst <typ.UInt32> [0x100] x)))
 20137  	for {
 20138  		t := v.Type
 20139  		x := v_0
 20140  		v.Reset(ssaop.OpARM64CLZW)
 20141  		v.Type = t
 20142  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64RBITW, typ.UInt32)
 20143  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ORconst, typ.UInt32)
 20144  		v1.AuxInt = ssa.Int64ToAuxInt(0x100)
 20145  		v1.AddArg(x)
 20146  		v0.AddArg(v1)
 20147  		v.AddArg(v0)
 20148  		return true
 20149  	}
 20150  }
 20151  func rewriteValue_OpDiv16(v *ssa.Value) bool {
 20152  	v_1 := v.Args[1]
 20153  	v_0 := v.Args[0]
 20154  	b := v.Block
 20155  	typ := &b.Func.Config.Types
 20156  	// match: (Div16 [false] x y)
 20157  	// result: (DIVW (SignExt16to32 x) (SignExt16to32 y))
 20158  	for {
 20159  		if ssa.AuxIntToBool(v.AuxInt) != false {
 20160  			break
 20161  		}
 20162  		x := v_0
 20163  		y := v_1
 20164  		v.Reset(ssaop.OpARM64DIVW)
 20165  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20166  		v0.AddArg(x)
 20167  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20168  		v1.AddArg(y)
 20169  		v.AddArg2(v0, v1)
 20170  		return true
 20171  	}
 20172  	return false
 20173  }
 20174  func rewriteValue_OpDiv16u(v *ssa.Value) bool {
 20175  	v_1 := v.Args[1]
 20176  	v_0 := v.Args[0]
 20177  	b := v.Block
 20178  	typ := &b.Func.Config.Types
 20179  	// match: (Div16u x y)
 20180  	// result: (UDIVW (ZeroExt16to32 x) (ZeroExt16to32 y))
 20181  	for {
 20182  		x := v_0
 20183  		y := v_1
 20184  		v.Reset(ssaop.OpARM64UDIVW)
 20185  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20186  		v0.AddArg(x)
 20187  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20188  		v1.AddArg(y)
 20189  		v.AddArg2(v0, v1)
 20190  		return true
 20191  	}
 20192  }
 20193  func rewriteValue_OpDiv32(v *ssa.Value) bool {
 20194  	v_1 := v.Args[1]
 20195  	v_0 := v.Args[0]
 20196  	// match: (Div32 [false] x y)
 20197  	// result: (DIVW x y)
 20198  	for {
 20199  		if ssa.AuxIntToBool(v.AuxInt) != false {
 20200  			break
 20201  		}
 20202  		x := v_0
 20203  		y := v_1
 20204  		v.Reset(ssaop.OpARM64DIVW)
 20205  		v.AddArg2(x, y)
 20206  		return true
 20207  	}
 20208  	return false
 20209  }
 20210  func rewriteValue_OpDiv64(v *ssa.Value) bool {
 20211  	v_1 := v.Args[1]
 20212  	v_0 := v.Args[0]
 20213  	// match: (Div64 [false] x y)
 20214  	// result: (DIV x y)
 20215  	for {
 20216  		if ssa.AuxIntToBool(v.AuxInt) != false {
 20217  			break
 20218  		}
 20219  		x := v_0
 20220  		y := v_1
 20221  		v.Reset(ssaop.OpARM64DIV)
 20222  		v.AddArg2(x, y)
 20223  		return true
 20224  	}
 20225  	return false
 20226  }
 20227  func rewriteValue_OpDiv8(v *ssa.Value) bool {
 20228  	v_1 := v.Args[1]
 20229  	v_0 := v.Args[0]
 20230  	b := v.Block
 20231  	typ := &b.Func.Config.Types
 20232  	// match: (Div8 x y)
 20233  	// result: (DIVW (SignExt8to32 x) (SignExt8to32 y))
 20234  	for {
 20235  		x := v_0
 20236  		y := v_1
 20237  		v.Reset(ssaop.OpARM64DIVW)
 20238  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 20239  		v0.AddArg(x)
 20240  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 20241  		v1.AddArg(y)
 20242  		v.AddArg2(v0, v1)
 20243  		return true
 20244  	}
 20245  }
 20246  func rewriteValue_OpDiv8u(v *ssa.Value) bool {
 20247  	v_1 := v.Args[1]
 20248  	v_0 := v.Args[0]
 20249  	b := v.Block
 20250  	typ := &b.Func.Config.Types
 20251  	// match: (Div8u x y)
 20252  	// result: (UDIVW (ZeroExt8to32 x) (ZeroExt8to32 y))
 20253  	for {
 20254  		x := v_0
 20255  		y := v_1
 20256  		v.Reset(ssaop.OpARM64UDIVW)
 20257  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20258  		v0.AddArg(x)
 20259  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20260  		v1.AddArg(y)
 20261  		v.AddArg2(v0, v1)
 20262  		return true
 20263  	}
 20264  }
 20265  func rewriteValue_OpEq16(v *ssa.Value) bool {
 20266  	v_1 := v.Args[1]
 20267  	v_0 := v.Args[0]
 20268  	b := v.Block
 20269  	typ := &b.Func.Config.Types
 20270  	// match: (Eq16 x y)
 20271  	// result: (Equal (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 20272  	for {
 20273  		x := v_0
 20274  		y := v_1
 20275  		v.Reset(ssaop.OpARM64Equal)
 20276  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20277  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20278  		v1.AddArg(x)
 20279  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20280  		v2.AddArg(y)
 20281  		v0.AddArg2(v1, v2)
 20282  		v.AddArg(v0)
 20283  		return true
 20284  	}
 20285  }
 20286  func rewriteValue_OpEq32(v *ssa.Value) bool {
 20287  	v_1 := v.Args[1]
 20288  	v_0 := v.Args[0]
 20289  	b := v.Block
 20290  	// match: (Eq32 x y)
 20291  	// result: (Equal (CMPW x y))
 20292  	for {
 20293  		x := v_0
 20294  		y := v_1
 20295  		v.Reset(ssaop.OpARM64Equal)
 20296  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20297  		v0.AddArg2(x, y)
 20298  		v.AddArg(v0)
 20299  		return true
 20300  	}
 20301  }
 20302  func rewriteValue_OpEq32F(v *ssa.Value) bool {
 20303  	v_1 := v.Args[1]
 20304  	v_0 := v.Args[0]
 20305  	b := v.Block
 20306  	// match: (Eq32F x y)
 20307  	// result: (Equal (FCMPS x y))
 20308  	for {
 20309  		x := v_0
 20310  		y := v_1
 20311  		v.Reset(ssaop.OpARM64Equal)
 20312  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 20313  		v0.AddArg2(x, y)
 20314  		v.AddArg(v0)
 20315  		return true
 20316  	}
 20317  }
 20318  func rewriteValue_OpEq64(v *ssa.Value) bool {
 20319  	v_1 := v.Args[1]
 20320  	v_0 := v.Args[0]
 20321  	b := v.Block
 20322  	// match: (Eq64 x y)
 20323  	// result: (Equal (CMP x y))
 20324  	for {
 20325  		x := v_0
 20326  		y := v_1
 20327  		v.Reset(ssaop.OpARM64Equal)
 20328  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20329  		v0.AddArg2(x, y)
 20330  		v.AddArg(v0)
 20331  		return true
 20332  	}
 20333  }
 20334  func rewriteValue_OpEq64F(v *ssa.Value) bool {
 20335  	v_1 := v.Args[1]
 20336  	v_0 := v.Args[0]
 20337  	b := v.Block
 20338  	// match: (Eq64F x y)
 20339  	// result: (Equal (FCMPD x y))
 20340  	for {
 20341  		x := v_0
 20342  		y := v_1
 20343  		v.Reset(ssaop.OpARM64Equal)
 20344  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 20345  		v0.AddArg2(x, y)
 20346  		v.AddArg(v0)
 20347  		return true
 20348  	}
 20349  }
 20350  func rewriteValue_OpEq8(v *ssa.Value) bool {
 20351  	v_1 := v.Args[1]
 20352  	v_0 := v.Args[0]
 20353  	b := v.Block
 20354  	typ := &b.Func.Config.Types
 20355  	// match: (Eq8 x y)
 20356  	// result: (Equal (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 20357  	for {
 20358  		x := v_0
 20359  		y := v_1
 20360  		v.Reset(ssaop.OpARM64Equal)
 20361  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20362  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20363  		v1.AddArg(x)
 20364  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20365  		v2.AddArg(y)
 20366  		v0.AddArg2(v1, v2)
 20367  		v.AddArg(v0)
 20368  		return true
 20369  	}
 20370  }
 20371  func rewriteValue_OpEqB(v *ssa.Value) bool {
 20372  	v_1 := v.Args[1]
 20373  	v_0 := v.Args[0]
 20374  	b := v.Block
 20375  	typ := &b.Func.Config.Types
 20376  	// match: (EqB x y)
 20377  	// result: (XOR (MOVDconst [1]) (XOR <typ.Bool> x y))
 20378  	for {
 20379  		x := v_0
 20380  		y := v_1
 20381  		v.Reset(ssaop.OpARM64XOR)
 20382  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20383  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 20384  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64XOR, typ.Bool)
 20385  		v1.AddArg2(x, y)
 20386  		v.AddArg2(v0, v1)
 20387  		return true
 20388  	}
 20389  }
 20390  func rewriteValue_OpEqPtr(v *ssa.Value) bool {
 20391  	v_1 := v.Args[1]
 20392  	v_0 := v.Args[0]
 20393  	b := v.Block
 20394  	// match: (EqPtr x y)
 20395  	// result: (Equal (CMP x y))
 20396  	for {
 20397  		x := v_0
 20398  		y := v_1
 20399  		v.Reset(ssaop.OpARM64Equal)
 20400  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20401  		v0.AddArg2(x, y)
 20402  		v.AddArg(v0)
 20403  		return true
 20404  	}
 20405  }
 20406  func rewriteValue_OpFMA(v *ssa.Value) bool {
 20407  	v_2 := v.Args[2]
 20408  	v_1 := v.Args[1]
 20409  	v_0 := v.Args[0]
 20410  	// match: (FMA x y z)
 20411  	// result: (FMADDD z x y)
 20412  	for {
 20413  		x := v_0
 20414  		y := v_1
 20415  		z := v_2
 20416  		v.Reset(ssaop.OpARM64FMADDD)
 20417  		v.AddArg3(z, x, y)
 20418  		return true
 20419  	}
 20420  }
 20421  func rewriteValue_OpGreaterInt16s(v *ssa.Value) bool {
 20422  	v_1 := v.Args[1]
 20423  	v_0 := v.Args[0]
 20424  	b := v.Block
 20425  	typ := &b.Func.Config.Types
 20426  	// match: (GreaterInt16s x y)
 20427  	// result: (ZCMPGTH x y (Select0 <types.TypeMask> (PWHILELTH (MOVDconst [0]) (MOVDconst [16]))))
 20428  	for {
 20429  		x := v_0
 20430  		y := v_1
 20431  		v.Reset(ssaop.OpARM64ZCMPGTH)
 20432  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 20433  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTH, types.NewTuple(typ.Mask, types.TypeFlags))
 20434  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20435  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 20436  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20437  		v3.AuxInt = ssa.Int64ToAuxInt(16)
 20438  		v1.AddArg2(v2, v3)
 20439  		v0.AddArg(v1)
 20440  		v.AddArg3(x, y, v0)
 20441  		return true
 20442  	}
 20443  }
 20444  func rewriteValue_OpGreaterInt32s(v *ssa.Value) bool {
 20445  	v_1 := v.Args[1]
 20446  	v_0 := v.Args[0]
 20447  	b := v.Block
 20448  	typ := &b.Func.Config.Types
 20449  	// match: (GreaterInt32s x y)
 20450  	// result: (ZCMPGTS x y (Select0 <types.TypeMask> (PWHILELTS (MOVDconst [0]) (MOVDconst [8]))))
 20451  	for {
 20452  		x := v_0
 20453  		y := v_1
 20454  		v.Reset(ssaop.OpARM64ZCMPGTS)
 20455  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 20456  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTS, types.NewTuple(typ.Mask, types.TypeFlags))
 20457  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20458  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 20459  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20460  		v3.AuxInt = ssa.Int64ToAuxInt(8)
 20461  		v1.AddArg2(v2, v3)
 20462  		v0.AddArg(v1)
 20463  		v.AddArg3(x, y, v0)
 20464  		return true
 20465  	}
 20466  }
 20467  func rewriteValue_OpGreaterInt64s(v *ssa.Value) bool {
 20468  	v_1 := v.Args[1]
 20469  	v_0 := v.Args[0]
 20470  	b := v.Block
 20471  	typ := &b.Func.Config.Types
 20472  	// match: (GreaterInt64s x y)
 20473  	// result: (ZCMPGTD x y (Select0 <types.TypeMask> (PWHILELTD (MOVDconst [0]) (MOVDconst [4]))))
 20474  	for {
 20475  		x := v_0
 20476  		y := v_1
 20477  		v.Reset(ssaop.OpARM64ZCMPGTD)
 20478  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 20479  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTD, types.NewTuple(typ.Mask, types.TypeFlags))
 20480  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20481  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 20482  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20483  		v3.AuxInt = ssa.Int64ToAuxInt(4)
 20484  		v1.AddArg2(v2, v3)
 20485  		v0.AddArg(v1)
 20486  		v.AddArg3(x, y, v0)
 20487  		return true
 20488  	}
 20489  }
 20490  func rewriteValue_OpGreaterInt8s(v *ssa.Value) bool {
 20491  	v_1 := v.Args[1]
 20492  	v_0 := v.Args[0]
 20493  	b := v.Block
 20494  	typ := &b.Func.Config.Types
 20495  	// match: (GreaterInt8s x y)
 20496  	// result: (ZCMPGTB x y (Select0 <types.TypeMask> (PWHILELTB (MOVDconst [0]) (MOVDconst [32]))))
 20497  	for {
 20498  		x := v_0
 20499  		y := v_1
 20500  		v.Reset(ssaop.OpARM64ZCMPGTB)
 20501  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, types.TypeMask)
 20502  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64PWHILELTB, types.NewTuple(typ.Mask, types.TypeFlags))
 20503  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20504  		v2.AuxInt = ssa.Int64ToAuxInt(0)
 20505  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20506  		v3.AuxInt = ssa.Int64ToAuxInt(32)
 20507  		v1.AddArg2(v2, v3)
 20508  		v0.AddArg(v1)
 20509  		v.AddArg3(x, y, v0)
 20510  		return true
 20511  	}
 20512  }
 20513  func rewriteValue_OpHmul32(v *ssa.Value) bool {
 20514  	v_1 := v.Args[1]
 20515  	v_0 := v.Args[0]
 20516  	b := v.Block
 20517  	typ := &b.Func.Config.Types
 20518  	// match: (Hmul32 x y)
 20519  	// result: (SRAconst (MULL <typ.Int64> x y) [32])
 20520  	for {
 20521  		x := v_0
 20522  		y := v_1
 20523  		v.Reset(ssaop.OpARM64SRAconst)
 20524  		v.AuxInt = ssa.Int64ToAuxInt(32)
 20525  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MULL, typ.Int64)
 20526  		v0.AddArg2(x, y)
 20527  		v.AddArg(v0)
 20528  		return true
 20529  	}
 20530  }
 20531  func rewriteValue_OpHmul32u(v *ssa.Value) bool {
 20532  	v_1 := v.Args[1]
 20533  	v_0 := v.Args[0]
 20534  	b := v.Block
 20535  	typ := &b.Func.Config.Types
 20536  	// match: (Hmul32u x y)
 20537  	// result: (SRAconst (UMULL <typ.UInt64> x y) [32])
 20538  	for {
 20539  		x := v_0
 20540  		y := v_1
 20541  		v.Reset(ssaop.OpARM64SRAconst)
 20542  		v.AuxInt = ssa.Int64ToAuxInt(32)
 20543  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64UMULL, typ.UInt64)
 20544  		v0.AddArg2(x, y)
 20545  		v.AddArg(v0)
 20546  		return true
 20547  	}
 20548  }
 20549  func rewriteValue_OpIsInBounds(v *ssa.Value) bool {
 20550  	v_1 := v.Args[1]
 20551  	v_0 := v.Args[0]
 20552  	b := v.Block
 20553  	// match: (IsInBounds idx len)
 20554  	// result: (LessThanU (CMP idx len))
 20555  	for {
 20556  		idx := v_0
 20557  		len := v_1
 20558  		v.Reset(ssaop.OpARM64LessThanU)
 20559  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20560  		v0.AddArg2(idx, len)
 20561  		v.AddArg(v0)
 20562  		return true
 20563  	}
 20564  }
 20565  func rewriteValue_OpIsNonNil(v *ssa.Value) bool {
 20566  	v_0 := v.Args[0]
 20567  	b := v.Block
 20568  	// match: (IsNonNil ptr)
 20569  	// result: (NotEqual (CMPconst [0] ptr))
 20570  	for {
 20571  		ptr := v_0
 20572  		v.Reset(ssaop.OpARM64NotEqual)
 20573  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 20574  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20575  		v0.AddArg(ptr)
 20576  		v.AddArg(v0)
 20577  		return true
 20578  	}
 20579  }
 20580  func rewriteValue_OpIsSliceInBounds(v *ssa.Value) bool {
 20581  	v_1 := v.Args[1]
 20582  	v_0 := v.Args[0]
 20583  	b := v.Block
 20584  	// match: (IsSliceInBounds idx len)
 20585  	// result: (LessEqualU (CMP idx len))
 20586  	for {
 20587  		idx := v_0
 20588  		len := v_1
 20589  		v.Reset(ssaop.OpARM64LessEqualU)
 20590  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20591  		v0.AddArg2(idx, len)
 20592  		v.AddArg(v0)
 20593  		return true
 20594  	}
 20595  }
 20596  func rewriteValue_OpLeq16(v *ssa.Value) bool {
 20597  	v_1 := v.Args[1]
 20598  	v_0 := v.Args[0]
 20599  	b := v.Block
 20600  	typ := &b.Func.Config.Types
 20601  	// match: (Leq16 x y)
 20602  	// result: (LessEqual (CMPW (SignExt16to32 x) (SignExt16to32 y)))
 20603  	for {
 20604  		x := v_0
 20605  		y := v_1
 20606  		v.Reset(ssaop.OpARM64LessEqual)
 20607  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20608  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20609  		v1.AddArg(x)
 20610  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20611  		v2.AddArg(y)
 20612  		v0.AddArg2(v1, v2)
 20613  		v.AddArg(v0)
 20614  		return true
 20615  	}
 20616  }
 20617  func rewriteValue_OpLeq16U(v *ssa.Value) bool {
 20618  	v_1 := v.Args[1]
 20619  	v_0 := v.Args[0]
 20620  	b := v.Block
 20621  	typ := &b.Func.Config.Types
 20622  	// match: (Leq16U x zero:(MOVDconst [0]))
 20623  	// result: (Eq16 x zero)
 20624  	for {
 20625  		x := v_0
 20626  		zero := v_1
 20627  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20628  			break
 20629  		}
 20630  		v.Reset(ssaop.OpEq16)
 20631  		v.AddArg2(x, zero)
 20632  		return true
 20633  	}
 20634  	// match: (Leq16U (MOVDconst [1]) x)
 20635  	// result: (Neq16 (MOVDconst [0]) x)
 20636  	for {
 20637  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 20638  			break
 20639  		}
 20640  		x := v_1
 20641  		v.Reset(ssaop.OpNeq16)
 20642  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20643  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20644  		v.AddArg2(v0, x)
 20645  		return true
 20646  	}
 20647  	// match: (Leq16U x y)
 20648  	// result: (LessEqualU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 20649  	for {
 20650  		x := v_0
 20651  		y := v_1
 20652  		v.Reset(ssaop.OpARM64LessEqualU)
 20653  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20654  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20655  		v1.AddArg(x)
 20656  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20657  		v2.AddArg(y)
 20658  		v0.AddArg2(v1, v2)
 20659  		v.AddArg(v0)
 20660  		return true
 20661  	}
 20662  }
 20663  func rewriteValue_OpLeq32(v *ssa.Value) bool {
 20664  	v_1 := v.Args[1]
 20665  	v_0 := v.Args[0]
 20666  	b := v.Block
 20667  	// match: (Leq32 x y)
 20668  	// result: (LessEqual (CMPW x y))
 20669  	for {
 20670  		x := v_0
 20671  		y := v_1
 20672  		v.Reset(ssaop.OpARM64LessEqual)
 20673  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20674  		v0.AddArg2(x, y)
 20675  		v.AddArg(v0)
 20676  		return true
 20677  	}
 20678  }
 20679  func rewriteValue_OpLeq32F(v *ssa.Value) bool {
 20680  	v_1 := v.Args[1]
 20681  	v_0 := v.Args[0]
 20682  	b := v.Block
 20683  	// match: (Leq32F x y)
 20684  	// result: (LessEqualF (FCMPS x y))
 20685  	for {
 20686  		x := v_0
 20687  		y := v_1
 20688  		v.Reset(ssaop.OpARM64LessEqualF)
 20689  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 20690  		v0.AddArg2(x, y)
 20691  		v.AddArg(v0)
 20692  		return true
 20693  	}
 20694  }
 20695  func rewriteValue_OpLeq32U(v *ssa.Value) bool {
 20696  	v_1 := v.Args[1]
 20697  	v_0 := v.Args[0]
 20698  	b := v.Block
 20699  	typ := &b.Func.Config.Types
 20700  	// match: (Leq32U x zero:(MOVDconst [0]))
 20701  	// result: (Eq32 x zero)
 20702  	for {
 20703  		x := v_0
 20704  		zero := v_1
 20705  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20706  			break
 20707  		}
 20708  		v.Reset(ssaop.OpEq32)
 20709  		v.AddArg2(x, zero)
 20710  		return true
 20711  	}
 20712  	// match: (Leq32U (MOVDconst [1]) x)
 20713  	// result: (Neq32 (MOVDconst [0]) x)
 20714  	for {
 20715  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 20716  			break
 20717  		}
 20718  		x := v_1
 20719  		v.Reset(ssaop.OpNeq32)
 20720  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20721  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20722  		v.AddArg2(v0, x)
 20723  		return true
 20724  	}
 20725  	// match: (Leq32U x y)
 20726  	// result: (LessEqualU (CMPW x y))
 20727  	for {
 20728  		x := v_0
 20729  		y := v_1
 20730  		v.Reset(ssaop.OpARM64LessEqualU)
 20731  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20732  		v0.AddArg2(x, y)
 20733  		v.AddArg(v0)
 20734  		return true
 20735  	}
 20736  }
 20737  func rewriteValue_OpLeq64(v *ssa.Value) bool {
 20738  	v_1 := v.Args[1]
 20739  	v_0 := v.Args[0]
 20740  	b := v.Block
 20741  	// match: (Leq64 x y)
 20742  	// result: (LessEqual (CMP x y))
 20743  	for {
 20744  		x := v_0
 20745  		y := v_1
 20746  		v.Reset(ssaop.OpARM64LessEqual)
 20747  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20748  		v0.AddArg2(x, y)
 20749  		v.AddArg(v0)
 20750  		return true
 20751  	}
 20752  }
 20753  func rewriteValue_OpLeq64F(v *ssa.Value) bool {
 20754  	v_1 := v.Args[1]
 20755  	v_0 := v.Args[0]
 20756  	b := v.Block
 20757  	// match: (Leq64F x y)
 20758  	// result: (LessEqualF (FCMPD x y))
 20759  	for {
 20760  		x := v_0
 20761  		y := v_1
 20762  		v.Reset(ssaop.OpARM64LessEqualF)
 20763  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 20764  		v0.AddArg2(x, y)
 20765  		v.AddArg(v0)
 20766  		return true
 20767  	}
 20768  }
 20769  func rewriteValue_OpLeq64U(v *ssa.Value) bool {
 20770  	v_1 := v.Args[1]
 20771  	v_0 := v.Args[0]
 20772  	b := v.Block
 20773  	typ := &b.Func.Config.Types
 20774  	// match: (Leq64U x zero:(MOVDconst [0]))
 20775  	// result: (Eq64 x zero)
 20776  	for {
 20777  		x := v_0
 20778  		zero := v_1
 20779  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20780  			break
 20781  		}
 20782  		v.Reset(ssaop.OpEq64)
 20783  		v.AddArg2(x, zero)
 20784  		return true
 20785  	}
 20786  	// match: (Leq64U (MOVDconst [1]) x)
 20787  	// result: (Neq64 (MOVDconst [0]) x)
 20788  	for {
 20789  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 20790  			break
 20791  		}
 20792  		x := v_1
 20793  		v.Reset(ssaop.OpNeq64)
 20794  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20795  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20796  		v.AddArg2(v0, x)
 20797  		return true
 20798  	}
 20799  	// match: (Leq64U x y)
 20800  	// result: (LessEqualU (CMP x y))
 20801  	for {
 20802  		x := v_0
 20803  		y := v_1
 20804  		v.Reset(ssaop.OpARM64LessEqualU)
 20805  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 20806  		v0.AddArg2(x, y)
 20807  		v.AddArg(v0)
 20808  		return true
 20809  	}
 20810  }
 20811  func rewriteValue_OpLeq8(v *ssa.Value) bool {
 20812  	v_1 := v.Args[1]
 20813  	v_0 := v.Args[0]
 20814  	b := v.Block
 20815  	typ := &b.Func.Config.Types
 20816  	// match: (Leq8 x y)
 20817  	// result: (LessEqual (CMPW (SignExt8to32 x) (SignExt8to32 y)))
 20818  	for {
 20819  		x := v_0
 20820  		y := v_1
 20821  		v.Reset(ssaop.OpARM64LessEqual)
 20822  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20823  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 20824  		v1.AddArg(x)
 20825  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 20826  		v2.AddArg(y)
 20827  		v0.AddArg2(v1, v2)
 20828  		v.AddArg(v0)
 20829  		return true
 20830  	}
 20831  }
 20832  func rewriteValue_OpLeq8U(v *ssa.Value) bool {
 20833  	v_1 := v.Args[1]
 20834  	v_0 := v.Args[0]
 20835  	b := v.Block
 20836  	typ := &b.Func.Config.Types
 20837  	// match: (Leq8U x zero:(MOVDconst [0]))
 20838  	// result: (Eq8 x zero)
 20839  	for {
 20840  		x := v_0
 20841  		zero := v_1
 20842  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20843  			break
 20844  		}
 20845  		v.Reset(ssaop.OpEq8)
 20846  		v.AddArg2(x, zero)
 20847  		return true
 20848  	}
 20849  	// match: (Leq8U (MOVDconst [1]) x)
 20850  	// result: (Neq8 (MOVDconst [0]) x)
 20851  	for {
 20852  		if v_0.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 20853  			break
 20854  		}
 20855  		x := v_1
 20856  		v.Reset(ssaop.OpNeq8)
 20857  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20858  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20859  		v.AddArg2(v0, x)
 20860  		return true
 20861  	}
 20862  	// match: (Leq8U x y)
 20863  	// result: (LessEqualU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 20864  	for {
 20865  		x := v_0
 20866  		y := v_1
 20867  		v.Reset(ssaop.OpARM64LessEqualU)
 20868  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20869  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20870  		v1.AddArg(x)
 20871  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 20872  		v2.AddArg(y)
 20873  		v0.AddArg2(v1, v2)
 20874  		v.AddArg(v0)
 20875  		return true
 20876  	}
 20877  }
 20878  func rewriteValue_OpLess16(v *ssa.Value) bool {
 20879  	v_1 := v.Args[1]
 20880  	v_0 := v.Args[0]
 20881  	b := v.Block
 20882  	typ := &b.Func.Config.Types
 20883  	// match: (Less16 x y)
 20884  	// result: (LessThan (CMPW (SignExt16to32 x) (SignExt16to32 y)))
 20885  	for {
 20886  		x := v_0
 20887  		y := v_1
 20888  		v.Reset(ssaop.OpARM64LessThan)
 20889  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20890  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20891  		v1.AddArg(x)
 20892  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 20893  		v2.AddArg(y)
 20894  		v0.AddArg2(v1, v2)
 20895  		v.AddArg(v0)
 20896  		return true
 20897  	}
 20898  }
 20899  func rewriteValue_OpLess16U(v *ssa.Value) bool {
 20900  	v_1 := v.Args[1]
 20901  	v_0 := v.Args[0]
 20902  	b := v.Block
 20903  	typ := &b.Func.Config.Types
 20904  	// match: (Less16U zero:(MOVDconst [0]) x)
 20905  	// result: (Neq16 zero x)
 20906  	for {
 20907  		zero := v_0
 20908  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20909  			break
 20910  		}
 20911  		x := v_1
 20912  		v.Reset(ssaop.OpNeq16)
 20913  		v.AddArg2(zero, x)
 20914  		return true
 20915  	}
 20916  	// match: (Less16U x (MOVDconst [1]))
 20917  	// result: (Eq16 x (MOVDconst [0]))
 20918  	for {
 20919  		x := v_0
 20920  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 20921  			break
 20922  		}
 20923  		v.Reset(ssaop.OpEq16)
 20924  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 20925  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 20926  		v.AddArg2(x, v0)
 20927  		return true
 20928  	}
 20929  	// match: (Less16U x y)
 20930  	// result: (LessThanU (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 20931  	for {
 20932  		x := v_0
 20933  		y := v_1
 20934  		v.Reset(ssaop.OpARM64LessThanU)
 20935  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20936  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20937  		v1.AddArg(x)
 20938  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 20939  		v2.AddArg(y)
 20940  		v0.AddArg2(v1, v2)
 20941  		v.AddArg(v0)
 20942  		return true
 20943  	}
 20944  }
 20945  func rewriteValue_OpLess32(v *ssa.Value) bool {
 20946  	v_1 := v.Args[1]
 20947  	v_0 := v.Args[0]
 20948  	b := v.Block
 20949  	// match: (Less32 x y)
 20950  	// result: (LessThan (CMPW x y))
 20951  	for {
 20952  		x := v_0
 20953  		y := v_1
 20954  		v.Reset(ssaop.OpARM64LessThan)
 20955  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 20956  		v0.AddArg2(x, y)
 20957  		v.AddArg(v0)
 20958  		return true
 20959  	}
 20960  }
 20961  func rewriteValue_OpLess32F(v *ssa.Value) bool {
 20962  	v_1 := v.Args[1]
 20963  	v_0 := v.Args[0]
 20964  	b := v.Block
 20965  	// match: (Less32F x y)
 20966  	// result: (LessThanF (FCMPS x y))
 20967  	for {
 20968  		x := v_0
 20969  		y := v_1
 20970  		v.Reset(ssaop.OpARM64LessThanF)
 20971  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 20972  		v0.AddArg2(x, y)
 20973  		v.AddArg(v0)
 20974  		return true
 20975  	}
 20976  }
 20977  func rewriteValue_OpLess32U(v *ssa.Value) bool {
 20978  	v_1 := v.Args[1]
 20979  	v_0 := v.Args[0]
 20980  	b := v.Block
 20981  	typ := &b.Func.Config.Types
 20982  	// match: (Less32U zero:(MOVDconst [0]) x)
 20983  	// result: (Neq32 zero x)
 20984  	for {
 20985  		zero := v_0
 20986  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 20987  			break
 20988  		}
 20989  		x := v_1
 20990  		v.Reset(ssaop.OpNeq32)
 20991  		v.AddArg2(zero, x)
 20992  		return true
 20993  	}
 20994  	// match: (Less32U x (MOVDconst [1]))
 20995  	// result: (Eq32 x (MOVDconst [0]))
 20996  	for {
 20997  		x := v_0
 20998  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 20999  			break
 21000  		}
 21001  		v.Reset(ssaop.OpEq32)
 21002  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 21003  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 21004  		v.AddArg2(x, v0)
 21005  		return true
 21006  	}
 21007  	// match: (Less32U x y)
 21008  	// result: (LessThanU (CMPW x y))
 21009  	for {
 21010  		x := v_0
 21011  		y := v_1
 21012  		v.Reset(ssaop.OpARM64LessThanU)
 21013  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 21014  		v0.AddArg2(x, y)
 21015  		v.AddArg(v0)
 21016  		return true
 21017  	}
 21018  }
 21019  func rewriteValue_OpLess64(v *ssa.Value) bool {
 21020  	v_1 := v.Args[1]
 21021  	v_0 := v.Args[0]
 21022  	b := v.Block
 21023  	// match: (Less64 x y)
 21024  	// result: (LessThan (CMP x y))
 21025  	for {
 21026  		x := v_0
 21027  		y := v_1
 21028  		v.Reset(ssaop.OpARM64LessThan)
 21029  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 21030  		v0.AddArg2(x, y)
 21031  		v.AddArg(v0)
 21032  		return true
 21033  	}
 21034  }
 21035  func rewriteValue_OpLess64F(v *ssa.Value) bool {
 21036  	v_1 := v.Args[1]
 21037  	v_0 := v.Args[0]
 21038  	b := v.Block
 21039  	// match: (Less64F x y)
 21040  	// result: (LessThanF (FCMPD x y))
 21041  	for {
 21042  		x := v_0
 21043  		y := v_1
 21044  		v.Reset(ssaop.OpARM64LessThanF)
 21045  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 21046  		v0.AddArg2(x, y)
 21047  		v.AddArg(v0)
 21048  		return true
 21049  	}
 21050  }
 21051  func rewriteValue_OpLess64U(v *ssa.Value) bool {
 21052  	v_1 := v.Args[1]
 21053  	v_0 := v.Args[0]
 21054  	b := v.Block
 21055  	typ := &b.Func.Config.Types
 21056  	// match: (Less64U zero:(MOVDconst [0]) x)
 21057  	// result: (Neq64 zero x)
 21058  	for {
 21059  		zero := v_0
 21060  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 21061  			break
 21062  		}
 21063  		x := v_1
 21064  		v.Reset(ssaop.OpNeq64)
 21065  		v.AddArg2(zero, x)
 21066  		return true
 21067  	}
 21068  	// match: (Less64U x (MOVDconst [1]))
 21069  	// result: (Eq64 x (MOVDconst [0]))
 21070  	for {
 21071  		x := v_0
 21072  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 21073  			break
 21074  		}
 21075  		v.Reset(ssaop.OpEq64)
 21076  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 21077  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 21078  		v.AddArg2(x, v0)
 21079  		return true
 21080  	}
 21081  	// match: (Less64U x y)
 21082  	// result: (LessThanU (CMP x y))
 21083  	for {
 21084  		x := v_0
 21085  		y := v_1
 21086  		v.Reset(ssaop.OpARM64LessThanU)
 21087  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 21088  		v0.AddArg2(x, y)
 21089  		v.AddArg(v0)
 21090  		return true
 21091  	}
 21092  }
 21093  func rewriteValue_OpLess8(v *ssa.Value) bool {
 21094  	v_1 := v.Args[1]
 21095  	v_0 := v.Args[0]
 21096  	b := v.Block
 21097  	typ := &b.Func.Config.Types
 21098  	// match: (Less8 x y)
 21099  	// result: (LessThan (CMPW (SignExt8to32 x) (SignExt8to32 y)))
 21100  	for {
 21101  		x := v_0
 21102  		y := v_1
 21103  		v.Reset(ssaop.OpARM64LessThan)
 21104  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 21105  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 21106  		v1.AddArg(x)
 21107  		v2 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 21108  		v2.AddArg(y)
 21109  		v0.AddArg2(v1, v2)
 21110  		v.AddArg(v0)
 21111  		return true
 21112  	}
 21113  }
 21114  func rewriteValue_OpLess8U(v *ssa.Value) bool {
 21115  	v_1 := v.Args[1]
 21116  	v_0 := v.Args[0]
 21117  	b := v.Block
 21118  	typ := &b.Func.Config.Types
 21119  	// match: (Less8U zero:(MOVDconst [0]) x)
 21120  	// result: (Neq8 zero x)
 21121  	for {
 21122  		zero := v_0
 21123  		if zero.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(zero.AuxInt) != 0 {
 21124  			break
 21125  		}
 21126  		x := v_1
 21127  		v.Reset(ssaop.OpNeq8)
 21128  		v.AddArg2(zero, x)
 21129  		return true
 21130  	}
 21131  	// match: (Less8U x (MOVDconst [1]))
 21132  	// result: (Eq8 x (MOVDconst [0]))
 21133  	for {
 21134  		x := v_0
 21135  		if v_1.Op != ssaop.OpARM64MOVDconst || ssa.AuxIntToInt64(v_1.AuxInt) != 1 {
 21136  			break
 21137  		}
 21138  		v.Reset(ssaop.OpEq8)
 21139  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 21140  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 21141  		v.AddArg2(x, v0)
 21142  		return true
 21143  	}
 21144  	// match: (Less8U x y)
 21145  	// result: (LessThanU (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 21146  	for {
 21147  		x := v_0
 21148  		y := v_1
 21149  		v.Reset(ssaop.OpARM64LessThanU)
 21150  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 21151  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 21152  		v1.AddArg(x)
 21153  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 21154  		v2.AddArg(y)
 21155  		v0.AddArg2(v1, v2)
 21156  		v.AddArg(v0)
 21157  		return true
 21158  	}
 21159  }
 21160  func rewriteValue_OpLoad(v *ssa.Value) bool {
 21161  	v_1 := v.Args[1]
 21162  	v_0 := v.Args[0]
 21163  	// match: (Load <t> ptr mem)
 21164  	// cond: t.IsBoolean()
 21165  	// result: (MOVBUload ptr mem)
 21166  	for {
 21167  		t := v.Type
 21168  		ptr := v_0
 21169  		mem := v_1
 21170  		if !(t.IsBoolean()) {
 21171  			break
 21172  		}
 21173  		v.Reset(ssaop.OpARM64MOVBUload)
 21174  		v.AddArg2(ptr, mem)
 21175  		return true
 21176  	}
 21177  	// match: (Load <t> ptr mem)
 21178  	// cond: (ssa.Is8BitInt(t) && t.IsSigned())
 21179  	// result: (MOVBload ptr mem)
 21180  	for {
 21181  		t := v.Type
 21182  		ptr := v_0
 21183  		mem := v_1
 21184  		if !(ssa.Is8BitInt(t) && t.IsSigned()) {
 21185  			break
 21186  		}
 21187  		v.Reset(ssaop.OpARM64MOVBload)
 21188  		v.AddArg2(ptr, mem)
 21189  		return true
 21190  	}
 21191  	// match: (Load <t> ptr mem)
 21192  	// cond: (ssa.Is8BitInt(t) && !t.IsSigned())
 21193  	// result: (MOVBUload ptr mem)
 21194  	for {
 21195  		t := v.Type
 21196  		ptr := v_0
 21197  		mem := v_1
 21198  		if !(ssa.Is8BitInt(t) && !t.IsSigned()) {
 21199  			break
 21200  		}
 21201  		v.Reset(ssaop.OpARM64MOVBUload)
 21202  		v.AddArg2(ptr, mem)
 21203  		return true
 21204  	}
 21205  	// match: (Load <t> ptr mem)
 21206  	// cond: (ssa.Is16BitInt(t) && t.IsSigned())
 21207  	// result: (MOVHload ptr mem)
 21208  	for {
 21209  		t := v.Type
 21210  		ptr := v_0
 21211  		mem := v_1
 21212  		if !(ssa.Is16BitInt(t) && t.IsSigned()) {
 21213  			break
 21214  		}
 21215  		v.Reset(ssaop.OpARM64MOVHload)
 21216  		v.AddArg2(ptr, mem)
 21217  		return true
 21218  	}
 21219  	// match: (Load <t> ptr mem)
 21220  	// cond: (ssa.Is16BitInt(t) && !t.IsSigned())
 21221  	// result: (MOVHUload ptr mem)
 21222  	for {
 21223  		t := v.Type
 21224  		ptr := v_0
 21225  		mem := v_1
 21226  		if !(ssa.Is16BitInt(t) && !t.IsSigned()) {
 21227  			break
 21228  		}
 21229  		v.Reset(ssaop.OpARM64MOVHUload)
 21230  		v.AddArg2(ptr, mem)
 21231  		return true
 21232  	}
 21233  	// match: (Load <t> ptr mem)
 21234  	// cond: (ssa.Is32BitInt(t) && t.IsSigned())
 21235  	// result: (MOVWload ptr mem)
 21236  	for {
 21237  		t := v.Type
 21238  		ptr := v_0
 21239  		mem := v_1
 21240  		if !(ssa.Is32BitInt(t) && t.IsSigned()) {
 21241  			break
 21242  		}
 21243  		v.Reset(ssaop.OpARM64MOVWload)
 21244  		v.AddArg2(ptr, mem)
 21245  		return true
 21246  	}
 21247  	// match: (Load <t> ptr mem)
 21248  	// cond: (ssa.Is32BitInt(t) && !t.IsSigned())
 21249  	// result: (MOVWUload ptr mem)
 21250  	for {
 21251  		t := v.Type
 21252  		ptr := v_0
 21253  		mem := v_1
 21254  		if !(ssa.Is32BitInt(t) && !t.IsSigned()) {
 21255  			break
 21256  		}
 21257  		v.Reset(ssaop.OpARM64MOVWUload)
 21258  		v.AddArg2(ptr, mem)
 21259  		return true
 21260  	}
 21261  	// match: (Load <t> ptr mem)
 21262  	// cond: (ssa.Is64BitInt(t) ||ssa.IsPtr(t))
 21263  	// result: (MOVDload ptr mem)
 21264  	for {
 21265  		t := v.Type
 21266  		ptr := v_0
 21267  		mem := v_1
 21268  		if !(ssa.Is64BitInt(t) || ssa.IsPtr(t)) {
 21269  			break
 21270  		}
 21271  		v.Reset(ssaop.OpARM64MOVDload)
 21272  		v.AddArg2(ptr, mem)
 21273  		return true
 21274  	}
 21275  	// match: (Load <t> ptr mem)
 21276  	// cond: ssa.Is32BitFloat(t)
 21277  	// result: (FMOVSload ptr mem)
 21278  	for {
 21279  		t := v.Type
 21280  		ptr := v_0
 21281  		mem := v_1
 21282  		if !(ssa.Is32BitFloat(t)) {
 21283  			break
 21284  		}
 21285  		v.Reset(ssaop.OpARM64FMOVSload)
 21286  		v.AddArg2(ptr, mem)
 21287  		return true
 21288  	}
 21289  	// match: (Load <t> ptr mem)
 21290  	// cond: ssa.Is64BitFloat(t)
 21291  	// result: (FMOVDload ptr mem)
 21292  	for {
 21293  		t := v.Type
 21294  		ptr := v_0
 21295  		mem := v_1
 21296  		if !(ssa.Is64BitFloat(t)) {
 21297  			break
 21298  		}
 21299  		v.Reset(ssaop.OpARM64FMOVDload)
 21300  		v.AddArg2(ptr, mem)
 21301  		return true
 21302  	}
 21303  	// match: (Load <t> ptr mem)
 21304  	// cond: t.Size() == 16
 21305  	// result: (FMOVQload ptr mem)
 21306  	for {
 21307  		t := v.Type
 21308  		ptr := v_0
 21309  		mem := v_1
 21310  		if !(t.Size() == 16) {
 21311  			break
 21312  		}
 21313  		v.Reset(ssaop.OpARM64FMOVQload)
 21314  		v.AddArg2(ptr, mem)
 21315  		return true
 21316  	}
 21317  	// match: (Load <t> ptr mem)
 21318  	// cond: t.Size() == 32 && t.IsSIMD()
 21319  	// result: (ZLDRload ptr mem)
 21320  	for {
 21321  		t := v.Type
 21322  		ptr := v_0
 21323  		mem := v_1
 21324  		if !(t.Size() == 32 && t.IsSIMD()) {
 21325  			break
 21326  		}
 21327  		v.Reset(ssaop.OpARM64ZLDRload)
 21328  		v.AddArg2(ptr, mem)
 21329  		return true
 21330  	}
 21331  	// match: (Load <t> ptr mem)
 21332  	// cond: t.Size() == 8 && t.IsSIMD()
 21333  	// result: (PLDRload ptr mem)
 21334  	for {
 21335  		t := v.Type
 21336  		ptr := v_0
 21337  		mem := v_1
 21338  		if !(t.Size() == 8 && t.IsSIMD()) {
 21339  			break
 21340  		}
 21341  		v.Reset(ssaop.OpARM64PLDRload)
 21342  		v.AddArg2(ptr, mem)
 21343  		return true
 21344  	}
 21345  	return false
 21346  }
 21347  func rewriteValue_OpLoadMasked8(v *ssa.Value) bool {
 21348  	v_2 := v.Args[2]
 21349  	v_1 := v.Args[1]
 21350  	v_0 := v.Args[0]
 21351  	// match: (LoadMasked8 <t> ptr mask mem)
 21352  	// cond: t.Size() == 32
 21353  	// result: (ZLD1BPredload ptr mask mem)
 21354  	for {
 21355  		t := v.Type
 21356  		ptr := v_0
 21357  		mask := v_1
 21358  		mem := v_2
 21359  		if !(t.Size() == 32) {
 21360  			break
 21361  		}
 21362  		v.Reset(ssaop.OpARM64ZLD1BPredload)
 21363  		v.AddArg3(ptr, mask, mem)
 21364  		return true
 21365  	}
 21366  	return false
 21367  }
 21368  func rewriteValue_OpLocalAddr(v *ssa.Value) bool {
 21369  	v_1 := v.Args[1]
 21370  	v_0 := v.Args[0]
 21371  	b := v.Block
 21372  	typ := &b.Func.Config.Types
 21373  	// match: (LocalAddr <t> {sym} base mem)
 21374  	// cond: t.Elem().HasPointers()
 21375  	// result: (MOVDaddr {sym} (SPanchored base mem))
 21376  	for {
 21377  		t := v.Type
 21378  		sym := ssa.AuxToSym(v.Aux)
 21379  		base := v_0
 21380  		mem := v_1
 21381  		if !(t.Elem().HasPointers()) {
 21382  			break
 21383  		}
 21384  		v.Reset(ssaop.OpARM64MOVDaddr)
 21385  		v.Aux = ssa.SymToAux(sym)
 21386  		v0 := b.NewValue0(v.Pos, ssaop.OpSPanchored, typ.Uintptr)
 21387  		v0.AddArg2(base, mem)
 21388  		v.AddArg(v0)
 21389  		return true
 21390  	}
 21391  	// match: (LocalAddr <t> {sym} base _)
 21392  	// cond: !t.Elem().HasPointers()
 21393  	// result: (MOVDaddr {sym} base)
 21394  	for {
 21395  		t := v.Type
 21396  		sym := ssa.AuxToSym(v.Aux)
 21397  		base := v_0
 21398  		if !(!t.Elem().HasPointers()) {
 21399  			break
 21400  		}
 21401  		v.Reset(ssaop.OpARM64MOVDaddr)
 21402  		v.Aux = ssa.SymToAux(sym)
 21403  		v.AddArg(base)
 21404  		return true
 21405  	}
 21406  	return false
 21407  }
 21408  func rewriteValue_OpLsh64x16(v *ssa.Value) bool {
 21409  	v_1 := v.Args[1]
 21410  	v_0 := v.Args[0]
 21411  	b := v.Block
 21412  	typ := &b.Func.Config.Types
 21413  	// match: (Lsh64x16 <t> x y)
 21414  	// cond: ssa.ShiftIsBounded(v)
 21415  	// result: (SLL <t> x y)
 21416  	for {
 21417  		t := v.Type
 21418  		x := v_0
 21419  		y := v_1
 21420  		if !(ssa.ShiftIsBounded(v)) {
 21421  			break
 21422  		}
 21423  		v.Reset(ssaop.OpARM64SLL)
 21424  		v.Type = t
 21425  		v.AddArg2(x, y)
 21426  		return true
 21427  	}
 21428  	// match: (Lsh64x16 <t> [bounded] x y)
 21429  	// cond: !ssa.ShiftIsBounded(v)
 21430  	// result: (Lsh64x32 <t> [bounded] x (ZeroExt16to32 y))
 21431  	for {
 21432  		t := v.Type
 21433  		bounded := ssa.AuxIntToBool(v.AuxInt)
 21434  		x := v_0
 21435  		y := v_1
 21436  		if !(!ssa.ShiftIsBounded(v)) {
 21437  			break
 21438  		}
 21439  		v.Reset(ssaop.OpLsh64x32)
 21440  		v.Type = t
 21441  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 21442  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 21443  		v0.AddArg(y)
 21444  		v.AddArg2(x, v0)
 21445  		return true
 21446  	}
 21447  	return false
 21448  }
 21449  func rewriteValue_OpLsh64x32(v *ssa.Value) bool {
 21450  	v_1 := v.Args[1]
 21451  	v_0 := v.Args[0]
 21452  	b := v.Block
 21453  	// match: (Lsh64x32 <t> x y)
 21454  	// cond: ssa.ShiftIsBounded(v)
 21455  	// result: (SLL <t> x y)
 21456  	for {
 21457  		t := v.Type
 21458  		x := v_0
 21459  		y := v_1
 21460  		if !(ssa.ShiftIsBounded(v)) {
 21461  			break
 21462  		}
 21463  		v.Reset(ssaop.OpARM64SLL)
 21464  		v.Type = t
 21465  		v.AddArg2(x, y)
 21466  		return true
 21467  	}
 21468  	// match: (Lsh64x32 <t> x y)
 21469  	// cond: !ssa.ShiftIsBounded(v)
 21470  	// result: (CSEL [ssaop.OpARM64LessThanU] (SLL <t> x y) (Const64 <t> [0]) (CMPWconst [64] y))
 21471  	for {
 21472  		t := v.Type
 21473  		x := v_0
 21474  		y := v_1
 21475  		if !(!ssa.ShiftIsBounded(v)) {
 21476  			break
 21477  		}
 21478  		v.Reset(ssaop.OpARM64CSEL)
 21479  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 21480  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 21481  		v0.AddArg2(x, y)
 21482  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 21483  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 21484  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 21485  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 21486  		v2.AddArg(y)
 21487  		v.AddArg3(v0, v1, v2)
 21488  		return true
 21489  	}
 21490  	return false
 21491  }
 21492  func rewriteValue_OpLsh64x64(v *ssa.Value) bool {
 21493  	v_1 := v.Args[1]
 21494  	v_0 := v.Args[0]
 21495  	b := v.Block
 21496  	// match: (Lsh64x64 <t> x y)
 21497  	// cond: ssa.ShiftIsBounded(v)
 21498  	// result: (SLL <t> x y)
 21499  	for {
 21500  		t := v.Type
 21501  		x := v_0
 21502  		y := v_1
 21503  		if !(ssa.ShiftIsBounded(v)) {
 21504  			break
 21505  		}
 21506  		v.Reset(ssaop.OpARM64SLL)
 21507  		v.Type = t
 21508  		v.AddArg2(x, y)
 21509  		return true
 21510  	}
 21511  	// match: (Lsh64x64 <t> x y)
 21512  	// cond: !ssa.ShiftIsBounded(v)
 21513  	// result: (CSEL [ssaop.OpARM64LessThanU] (SLL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
 21514  	for {
 21515  		t := v.Type
 21516  		x := v_0
 21517  		y := v_1
 21518  		if !(!ssa.ShiftIsBounded(v)) {
 21519  			break
 21520  		}
 21521  		v.Reset(ssaop.OpARM64CSEL)
 21522  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 21523  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 21524  		v0.AddArg2(x, y)
 21525  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 21526  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 21527  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 21528  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 21529  		v2.AddArg(y)
 21530  		v.AddArg3(v0, v1, v2)
 21531  		return true
 21532  	}
 21533  	return false
 21534  }
 21535  func rewriteValue_OpLsh64x8(v *ssa.Value) bool {
 21536  	v_1 := v.Args[1]
 21537  	v_0 := v.Args[0]
 21538  	b := v.Block
 21539  	typ := &b.Func.Config.Types
 21540  	// match: (Lsh64x8 <t> x y)
 21541  	// cond: ssa.ShiftIsBounded(v)
 21542  	// result: (SLL <t> x y)
 21543  	for {
 21544  		t := v.Type
 21545  		x := v_0
 21546  		y := v_1
 21547  		if !(ssa.ShiftIsBounded(v)) {
 21548  			break
 21549  		}
 21550  		v.Reset(ssaop.OpARM64SLL)
 21551  		v.Type = t
 21552  		v.AddArg2(x, y)
 21553  		return true
 21554  	}
 21555  	// match: (Lsh64x8 <t> [bounded] x y)
 21556  	// cond: !ssa.ShiftIsBounded(v)
 21557  	// result: (Lsh64x32 <t> [bounded] x (ZeroExt8to32 y))
 21558  	for {
 21559  		t := v.Type
 21560  		bounded := ssa.AuxIntToBool(v.AuxInt)
 21561  		x := v_0
 21562  		y := v_1
 21563  		if !(!ssa.ShiftIsBounded(v)) {
 21564  			break
 21565  		}
 21566  		v.Reset(ssaop.OpLsh64x32)
 21567  		v.Type = t
 21568  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 21569  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 21570  		v0.AddArg(y)
 21571  		v.AddArg2(x, v0)
 21572  		return true
 21573  	}
 21574  	return false
 21575  }
 21576  func rewriteValue_OpMax32FSel(v *ssa.Value) bool {
 21577  	v_1 := v.Args[1]
 21578  	v_0 := v.Args[0]
 21579  	b := v.Block
 21580  	// match: (Max32FSel x y)
 21581  	// result: (FCSELS [ssaop.OpARM64GreaterThanF] x y (FCMPS x y))
 21582  	for {
 21583  		x := v_0
 21584  		y := v_1
 21585  		v.Reset(ssaop.OpARM64FCSELS)
 21586  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64GreaterThanF)
 21587  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 21588  		v0.AddArg2(x, y)
 21589  		v.AddArg3(x, y, v0)
 21590  		return true
 21591  	}
 21592  }
 21593  func rewriteValue_OpMax64FSel(v *ssa.Value) bool {
 21594  	v_1 := v.Args[1]
 21595  	v_0 := v.Args[0]
 21596  	b := v.Block
 21597  	// match: (Max64FSel x y)
 21598  	// result: (FCSELD [ssaop.OpARM64GreaterThanF] x y (FCMPD x y))
 21599  	for {
 21600  		x := v_0
 21601  		y := v_1
 21602  		v.Reset(ssaop.OpARM64FCSELD)
 21603  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64GreaterThanF)
 21604  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 21605  		v0.AddArg2(x, y)
 21606  		v.AddArg3(x, y, v0)
 21607  		return true
 21608  	}
 21609  }
 21610  func rewriteValue_OpMin32FSel(v *ssa.Value) bool {
 21611  	v_1 := v.Args[1]
 21612  	v_0 := v.Args[0]
 21613  	b := v.Block
 21614  	// match: (Min32FSel x y)
 21615  	// result: (FCSELS [ssaop.OpARM64LessThanF] x y (FCMPS x y))
 21616  	for {
 21617  		x := v_0
 21618  		y := v_1
 21619  		v.Reset(ssaop.OpARM64FCSELS)
 21620  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanF)
 21621  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 21622  		v0.AddArg2(x, y)
 21623  		v.AddArg3(x, y, v0)
 21624  		return true
 21625  	}
 21626  }
 21627  func rewriteValue_OpMin64FSel(v *ssa.Value) bool {
 21628  	v_1 := v.Args[1]
 21629  	v_0 := v.Args[0]
 21630  	b := v.Block
 21631  	// match: (Min64FSel x y)
 21632  	// result: (FCSELD [ssaop.OpARM64LessThanF] x y (FCMPD x y))
 21633  	for {
 21634  		x := v_0
 21635  		y := v_1
 21636  		v.Reset(ssaop.OpARM64FCSELD)
 21637  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanF)
 21638  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 21639  		v0.AddArg2(x, y)
 21640  		v.AddArg3(x, y, v0)
 21641  		return true
 21642  	}
 21643  }
 21644  func rewriteValue_OpMod16(v *ssa.Value) bool {
 21645  	v_1 := v.Args[1]
 21646  	v_0 := v.Args[0]
 21647  	b := v.Block
 21648  	typ := &b.Func.Config.Types
 21649  	// match: (Mod16 x y)
 21650  	// result: (MODW (SignExt16to32 x) (SignExt16to32 y))
 21651  	for {
 21652  		x := v_0
 21653  		y := v_1
 21654  		v.Reset(ssaop.OpARM64MODW)
 21655  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 21656  		v0.AddArg(x)
 21657  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt16to32, typ.Int32)
 21658  		v1.AddArg(y)
 21659  		v.AddArg2(v0, v1)
 21660  		return true
 21661  	}
 21662  }
 21663  func rewriteValue_OpMod16u(v *ssa.Value) bool {
 21664  	v_1 := v.Args[1]
 21665  	v_0 := v.Args[0]
 21666  	b := v.Block
 21667  	typ := &b.Func.Config.Types
 21668  	// match: (Mod16u x y)
 21669  	// result: (UMODW (ZeroExt16to32 x) (ZeroExt16to32 y))
 21670  	for {
 21671  		x := v_0
 21672  		y := v_1
 21673  		v.Reset(ssaop.OpARM64UMODW)
 21674  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 21675  		v0.AddArg(x)
 21676  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 21677  		v1.AddArg(y)
 21678  		v.AddArg2(v0, v1)
 21679  		return true
 21680  	}
 21681  }
 21682  func rewriteValue_OpMod32(v *ssa.Value) bool {
 21683  	v_1 := v.Args[1]
 21684  	v_0 := v.Args[0]
 21685  	// match: (Mod32 x y)
 21686  	// result: (MODW x y)
 21687  	for {
 21688  		x := v_0
 21689  		y := v_1
 21690  		v.Reset(ssaop.OpARM64MODW)
 21691  		v.AddArg2(x, y)
 21692  		return true
 21693  	}
 21694  }
 21695  func rewriteValue_OpMod64(v *ssa.Value) bool {
 21696  	v_1 := v.Args[1]
 21697  	v_0 := v.Args[0]
 21698  	// match: (Mod64 x y)
 21699  	// result: (MOD x y)
 21700  	for {
 21701  		x := v_0
 21702  		y := v_1
 21703  		v.Reset(ssaop.OpARM64MOD)
 21704  		v.AddArg2(x, y)
 21705  		return true
 21706  	}
 21707  }
 21708  func rewriteValue_OpMod8(v *ssa.Value) bool {
 21709  	v_1 := v.Args[1]
 21710  	v_0 := v.Args[0]
 21711  	b := v.Block
 21712  	typ := &b.Func.Config.Types
 21713  	// match: (Mod8 x y)
 21714  	// result: (MODW (SignExt8to32 x) (SignExt8to32 y))
 21715  	for {
 21716  		x := v_0
 21717  		y := v_1
 21718  		v.Reset(ssaop.OpARM64MODW)
 21719  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 21720  		v0.AddArg(x)
 21721  		v1 := b.NewValue0(v.Pos, ssaop.OpSignExt8to32, typ.Int32)
 21722  		v1.AddArg(y)
 21723  		v.AddArg2(v0, v1)
 21724  		return true
 21725  	}
 21726  }
 21727  func rewriteValue_OpMod8u(v *ssa.Value) bool {
 21728  	v_1 := v.Args[1]
 21729  	v_0 := v.Args[0]
 21730  	b := v.Block
 21731  	typ := &b.Func.Config.Types
 21732  	// match: (Mod8u x y)
 21733  	// result: (UMODW (ZeroExt8to32 x) (ZeroExt8to32 y))
 21734  	for {
 21735  		x := v_0
 21736  		y := v_1
 21737  		v.Reset(ssaop.OpARM64UMODW)
 21738  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 21739  		v0.AddArg(x)
 21740  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 21741  		v1.AddArg(y)
 21742  		v.AddArg2(v0, v1)
 21743  		return true
 21744  	}
 21745  }
 21746  func rewriteValue_OpMove(v *ssa.Value) bool {
 21747  	v_2 := v.Args[2]
 21748  	v_1 := v.Args[1]
 21749  	v_0 := v.Args[0]
 21750  	b := v.Block
 21751  	typ := &b.Func.Config.Types
 21752  	// match: (Move [0] _ _ mem)
 21753  	// result: mem
 21754  	for {
 21755  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 21756  			break
 21757  		}
 21758  		mem := v_2
 21759  		v.CopyOf(mem)
 21760  		return true
 21761  	}
 21762  	// match: (Move [1] dst src mem)
 21763  	// result: (MOVBstore dst (MOVBUload src mem) mem)
 21764  	for {
 21765  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
 21766  			break
 21767  		}
 21768  		dst := v_0
 21769  		src := v_1
 21770  		mem := v_2
 21771  		v.Reset(ssaop.OpARM64MOVBstore)
 21772  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 21773  		v0.AddArg2(src, mem)
 21774  		v.AddArg3(dst, v0, mem)
 21775  		return true
 21776  	}
 21777  	// match: (Move [2] dst src mem)
 21778  	// result: (MOVHstore dst (MOVHUload src mem) mem)
 21779  	for {
 21780  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
 21781  			break
 21782  		}
 21783  		dst := v_0
 21784  		src := v_1
 21785  		mem := v_2
 21786  		v.Reset(ssaop.OpARM64MOVHstore)
 21787  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 21788  		v0.AddArg2(src, mem)
 21789  		v.AddArg3(dst, v0, mem)
 21790  		return true
 21791  	}
 21792  	// match: (Move [3] dst src mem)
 21793  	// result: (MOVBstore [2] dst (MOVBUload [2] src mem) (MOVHstore dst (MOVHUload src mem) mem))
 21794  	for {
 21795  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
 21796  			break
 21797  		}
 21798  		dst := v_0
 21799  		src := v_1
 21800  		mem := v_2
 21801  		v.Reset(ssaop.OpARM64MOVBstore)
 21802  		v.AuxInt = ssa.Int32ToAuxInt(2)
 21803  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 21804  		v0.AuxInt = ssa.Int32ToAuxInt(2)
 21805  		v0.AddArg2(src, mem)
 21806  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHstore, types.TypeMem)
 21807  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 21808  		v2.AddArg2(src, mem)
 21809  		v1.AddArg3(dst, v2, mem)
 21810  		v.AddArg3(dst, v0, v1)
 21811  		return true
 21812  	}
 21813  	// match: (Move [4] dst src mem)
 21814  	// result: (MOVWstore dst (MOVWUload src mem) mem)
 21815  	for {
 21816  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
 21817  			break
 21818  		}
 21819  		dst := v_0
 21820  		src := v_1
 21821  		mem := v_2
 21822  		v.Reset(ssaop.OpARM64MOVWstore)
 21823  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21824  		v0.AddArg2(src, mem)
 21825  		v.AddArg3(dst, v0, mem)
 21826  		return true
 21827  	}
 21828  	// match: (Move [5] dst src mem)
 21829  	// result: (MOVBstore [4] dst (MOVBUload [4] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 21830  	for {
 21831  		if ssa.AuxIntToInt64(v.AuxInt) != 5 {
 21832  			break
 21833  		}
 21834  		dst := v_0
 21835  		src := v_1
 21836  		mem := v_2
 21837  		v.Reset(ssaop.OpARM64MOVBstore)
 21838  		v.AuxInt = ssa.Int32ToAuxInt(4)
 21839  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 21840  		v0.AuxInt = ssa.Int32ToAuxInt(4)
 21841  		v0.AddArg2(src, mem)
 21842  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 21843  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21844  		v2.AddArg2(src, mem)
 21845  		v1.AddArg3(dst, v2, mem)
 21846  		v.AddArg3(dst, v0, v1)
 21847  		return true
 21848  	}
 21849  	// match: (Move [6] dst src mem)
 21850  	// result: (MOVHstore [4] dst (MOVHUload [4] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 21851  	for {
 21852  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
 21853  			break
 21854  		}
 21855  		dst := v_0
 21856  		src := v_1
 21857  		mem := v_2
 21858  		v.Reset(ssaop.OpARM64MOVHstore)
 21859  		v.AuxInt = ssa.Int32ToAuxInt(4)
 21860  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 21861  		v0.AuxInt = ssa.Int32ToAuxInt(4)
 21862  		v0.AddArg2(src, mem)
 21863  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 21864  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21865  		v2.AddArg2(src, mem)
 21866  		v1.AddArg3(dst, v2, mem)
 21867  		v.AddArg3(dst, v0, v1)
 21868  		return true
 21869  	}
 21870  	// match: (Move [7] dst src mem)
 21871  	// result: (MOVWstore [3] dst (MOVWUload [3] src mem) (MOVWstore dst (MOVWUload src mem) mem))
 21872  	for {
 21873  		if ssa.AuxIntToInt64(v.AuxInt) != 7 {
 21874  			break
 21875  		}
 21876  		dst := v_0
 21877  		src := v_1
 21878  		mem := v_2
 21879  		v.Reset(ssaop.OpARM64MOVWstore)
 21880  		v.AuxInt = ssa.Int32ToAuxInt(3)
 21881  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21882  		v0.AuxInt = ssa.Int32ToAuxInt(3)
 21883  		v0.AddArg2(src, mem)
 21884  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 21885  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21886  		v2.AddArg2(src, mem)
 21887  		v1.AddArg3(dst, v2, mem)
 21888  		v.AddArg3(dst, v0, v1)
 21889  		return true
 21890  	}
 21891  	// match: (Move [8] dst src mem)
 21892  	// result: (MOVDstore dst (MOVDload src mem) mem)
 21893  	for {
 21894  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
 21895  			break
 21896  		}
 21897  		dst := v_0
 21898  		src := v_1
 21899  		mem := v_2
 21900  		v.Reset(ssaop.OpARM64MOVDstore)
 21901  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21902  		v0.AddArg2(src, mem)
 21903  		v.AddArg3(dst, v0, mem)
 21904  		return true
 21905  	}
 21906  	// match: (Move [9] dst src mem)
 21907  	// result: (MOVBstore [8] dst (MOVBUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21908  	for {
 21909  		if ssa.AuxIntToInt64(v.AuxInt) != 9 {
 21910  			break
 21911  		}
 21912  		dst := v_0
 21913  		src := v_1
 21914  		mem := v_2
 21915  		v.Reset(ssaop.OpARM64MOVBstore)
 21916  		v.AuxInt = ssa.Int32ToAuxInt(8)
 21917  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVBUload, typ.UInt8)
 21918  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 21919  		v0.AddArg2(src, mem)
 21920  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21921  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21922  		v2.AddArg2(src, mem)
 21923  		v1.AddArg3(dst, v2, mem)
 21924  		v.AddArg3(dst, v0, v1)
 21925  		return true
 21926  	}
 21927  	// match: (Move [10] dst src mem)
 21928  	// result: (MOVHstore [8] dst (MOVHUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21929  	for {
 21930  		if ssa.AuxIntToInt64(v.AuxInt) != 10 {
 21931  			break
 21932  		}
 21933  		dst := v_0
 21934  		src := v_1
 21935  		mem := v_2
 21936  		v.Reset(ssaop.OpARM64MOVHstore)
 21937  		v.AuxInt = ssa.Int32ToAuxInt(8)
 21938  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHUload, typ.UInt16)
 21939  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 21940  		v0.AddArg2(src, mem)
 21941  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21942  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21943  		v2.AddArg2(src, mem)
 21944  		v1.AddArg3(dst, v2, mem)
 21945  		v.AddArg3(dst, v0, v1)
 21946  		return true
 21947  	}
 21948  	// match: (Move [11] dst src mem)
 21949  	// result: (MOVDstore [3] dst (MOVDload [3] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21950  	for {
 21951  		if ssa.AuxIntToInt64(v.AuxInt) != 11 {
 21952  			break
 21953  		}
 21954  		dst := v_0
 21955  		src := v_1
 21956  		mem := v_2
 21957  		v.Reset(ssaop.OpARM64MOVDstore)
 21958  		v.AuxInt = ssa.Int32ToAuxInt(3)
 21959  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21960  		v0.AuxInt = ssa.Int32ToAuxInt(3)
 21961  		v0.AddArg2(src, mem)
 21962  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21963  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21964  		v2.AddArg2(src, mem)
 21965  		v1.AddArg3(dst, v2, mem)
 21966  		v.AddArg3(dst, v0, v1)
 21967  		return true
 21968  	}
 21969  	// match: (Move [12] dst src mem)
 21970  	// result: (MOVWstore [8] dst (MOVWUload [8] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21971  	for {
 21972  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
 21973  			break
 21974  		}
 21975  		dst := v_0
 21976  		src := v_1
 21977  		mem := v_2
 21978  		v.Reset(ssaop.OpARM64MOVWstore)
 21979  		v.AuxInt = ssa.Int32ToAuxInt(8)
 21980  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWUload, typ.UInt32)
 21981  		v0.AuxInt = ssa.Int32ToAuxInt(8)
 21982  		v0.AddArg2(src, mem)
 21983  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 21984  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 21985  		v2.AddArg2(src, mem)
 21986  		v1.AddArg3(dst, v2, mem)
 21987  		v.AddArg3(dst, v0, v1)
 21988  		return true
 21989  	}
 21990  	// match: (Move [13] dst src mem)
 21991  	// result: (MOVDstore [5] dst (MOVDload [5] src mem) (MOVDstore dst (MOVDload src mem) mem))
 21992  	for {
 21993  		if ssa.AuxIntToInt64(v.AuxInt) != 13 {
 21994  			break
 21995  		}
 21996  		dst := v_0
 21997  		src := v_1
 21998  		mem := v_2
 21999  		v.Reset(ssaop.OpARM64MOVDstore)
 22000  		v.AuxInt = ssa.Int32ToAuxInt(5)
 22001  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 22002  		v0.AuxInt = ssa.Int32ToAuxInt(5)
 22003  		v0.AddArg2(src, mem)
 22004  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 22005  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 22006  		v2.AddArg2(src, mem)
 22007  		v1.AddArg3(dst, v2, mem)
 22008  		v.AddArg3(dst, v0, v1)
 22009  		return true
 22010  	}
 22011  	// match: (Move [14] dst src mem)
 22012  	// result: (MOVDstore [6] dst (MOVDload [6] src mem) (MOVDstore dst (MOVDload src mem) mem))
 22013  	for {
 22014  		if ssa.AuxIntToInt64(v.AuxInt) != 14 {
 22015  			break
 22016  		}
 22017  		dst := v_0
 22018  		src := v_1
 22019  		mem := v_2
 22020  		v.Reset(ssaop.OpARM64MOVDstore)
 22021  		v.AuxInt = ssa.Int32ToAuxInt(6)
 22022  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 22023  		v0.AuxInt = ssa.Int32ToAuxInt(6)
 22024  		v0.AddArg2(src, mem)
 22025  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 22026  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 22027  		v2.AddArg2(src, mem)
 22028  		v1.AddArg3(dst, v2, mem)
 22029  		v.AddArg3(dst, v0, v1)
 22030  		return true
 22031  	}
 22032  	// match: (Move [15] dst src mem)
 22033  	// result: (MOVDstore [7] dst (MOVDload [7] src mem) (MOVDstore dst (MOVDload src mem) mem))
 22034  	for {
 22035  		if ssa.AuxIntToInt64(v.AuxInt) != 15 {
 22036  			break
 22037  		}
 22038  		dst := v_0
 22039  		src := v_1
 22040  		mem := v_2
 22041  		v.Reset(ssaop.OpARM64MOVDstore)
 22042  		v.AuxInt = ssa.Int32ToAuxInt(7)
 22043  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 22044  		v0.AuxInt = ssa.Int32ToAuxInt(7)
 22045  		v0.AddArg2(src, mem)
 22046  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 22047  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 22048  		v2.AddArg2(src, mem)
 22049  		v1.AddArg3(dst, v2, mem)
 22050  		v.AddArg3(dst, v0, v1)
 22051  		return true
 22052  	}
 22053  	// match: (Move [16] dst src mem)
 22054  	// result: (FMOVQstore dst (FMOVQload src mem) mem)
 22055  	for {
 22056  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
 22057  			break
 22058  		}
 22059  		dst := v_0
 22060  		src := v_1
 22061  		mem := v_2
 22062  		v.Reset(ssaop.OpARM64FMOVQstore)
 22063  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 22064  		v0.AddArg2(src, mem)
 22065  		v.AddArg3(dst, v0, mem)
 22066  		return true
 22067  	}
 22068  	// match: (Move [s] dst src mem)
 22069  	// cond: s > 16 && s <= 24
 22070  	// result: (MOVDstore [int32(s-8)] dst (MOVDload [int32(s-8)] src mem) (FMOVQstore dst (FMOVQload src mem) mem))
 22071  	for {
 22072  		s := ssa.AuxIntToInt64(v.AuxInt)
 22073  		dst := v_0
 22074  		src := v_1
 22075  		mem := v_2
 22076  		if !(s > 16 && s <= 24) {
 22077  			break
 22078  		}
 22079  		v.Reset(ssaop.OpARM64MOVDstore)
 22080  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 22081  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 22082  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 22083  		v0.AddArg2(src, mem)
 22084  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQstore, types.TypeMem)
 22085  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 22086  		v2.AddArg2(src, mem)
 22087  		v1.AddArg3(dst, v2, mem)
 22088  		v.AddArg3(dst, v0, v1)
 22089  		return true
 22090  	}
 22091  	// match: (Move [s] dst src mem)
 22092  	// cond: s > 24 && s < 32
 22093  	// result: (FMOVQstore [int32(s-16)] dst (FMOVQload [int32(s-16)] src mem) (FMOVQstore dst (FMOVQload src mem) mem))
 22094  	for {
 22095  		s := ssa.AuxIntToInt64(v.AuxInt)
 22096  		dst := v_0
 22097  		src := v_1
 22098  		mem := v_2
 22099  		if !(s > 24 && s < 32) {
 22100  			break
 22101  		}
 22102  		v.Reset(ssaop.OpARM64FMOVQstore)
 22103  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 22104  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 22105  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 22106  		v0.AddArg2(src, mem)
 22107  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQstore, types.TypeMem)
 22108  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 22109  		v2.AddArg2(src, mem)
 22110  		v1.AddArg3(dst, v2, mem)
 22111  		v.AddArg3(dst, v0, v1)
 22112  		return true
 22113  	}
 22114  	// match: (Move [32] dst src mem)
 22115  	// result: (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem)
 22116  	for {
 22117  		if ssa.AuxIntToInt64(v.AuxInt) != 32 {
 22118  			break
 22119  		}
 22120  		dst := v_0
 22121  		src := v_1
 22122  		mem := v_2
 22123  		v.Reset(ssaop.OpARM64FSTPQ)
 22124  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 22125  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 22126  		v1.AddArg2(src, mem)
 22127  		v0.AddArg(v1)
 22128  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 22129  		v2.AddArg(v1)
 22130  		v.AddArg4(dst, v0, v2, mem)
 22131  		return true
 22132  	}
 22133  	// match: (Move [s] dst src mem)
 22134  	// cond: s > 32 && s <= 40
 22135  	// result: (MOVDstore [int32(s-8)] dst (MOVDload [int32(s-8)] src mem) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 22136  	for {
 22137  		s := ssa.AuxIntToInt64(v.AuxInt)
 22138  		dst := v_0
 22139  		src := v_1
 22140  		mem := v_2
 22141  		if !(s > 32 && s <= 40) {
 22142  			break
 22143  		}
 22144  		v.Reset(ssaop.OpARM64MOVDstore)
 22145  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 22146  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDload, typ.UInt64)
 22147  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 8))
 22148  		v0.AddArg2(src, mem)
 22149  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 22150  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 22151  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 22152  		v3.AddArg2(src, mem)
 22153  		v2.AddArg(v3)
 22154  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 22155  		v4.AddArg(v3)
 22156  		v1.AddArg4(dst, v2, v4, mem)
 22157  		v.AddArg3(dst, v0, v1)
 22158  		return true
 22159  	}
 22160  	// match: (Move [s] dst src mem)
 22161  	// cond: s > 40 && s <= 48
 22162  	// result: (FMOVQstore [int32(s-16)] dst (FMOVQload [int32(s-16)] src mem) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 22163  	for {
 22164  		s := ssa.AuxIntToInt64(v.AuxInt)
 22165  		dst := v_0
 22166  		src := v_1
 22167  		mem := v_2
 22168  		if !(s > 40 && s <= 48) {
 22169  			break
 22170  		}
 22171  		v.Reset(ssaop.OpARM64FMOVQstore)
 22172  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 22173  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVQload, typ.Vec128)
 22174  		v0.AuxInt = ssa.Int32ToAuxInt(int32(s - 16))
 22175  		v0.AddArg2(src, mem)
 22176  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 22177  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 22178  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 22179  		v3.AddArg2(src, mem)
 22180  		v2.AddArg(v3)
 22181  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 22182  		v4.AddArg(v3)
 22183  		v1.AddArg4(dst, v2, v4, mem)
 22184  		v.AddArg3(dst, v0, v1)
 22185  		return true
 22186  	}
 22187  	// match: (Move [s] dst src mem)
 22188  	// cond: s > 48 && s <= 64
 22189  	// result: (FSTPQ [int32(s-32)] dst (Select0 <typ.Vec128> (FLDPQ [int32(s-32)] src mem)) (Select1 <typ.Vec128> (FLDPQ [int32(s-32)] src mem)) (FSTPQ dst (Select0 <typ.Vec128> (FLDPQ src mem)) (Select1 <typ.Vec128> (FLDPQ src mem)) mem))
 22190  	for {
 22191  		s := ssa.AuxIntToInt64(v.AuxInt)
 22192  		dst := v_0
 22193  		src := v_1
 22194  		mem := v_2
 22195  		if !(s > 48 && s <= 64) {
 22196  			break
 22197  		}
 22198  		v.Reset(ssaop.OpARM64FSTPQ)
 22199  		v.AuxInt = ssa.Int32ToAuxInt(int32(s - 32))
 22200  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 22201  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 22202  		v1.AuxInt = ssa.Int32ToAuxInt(int32(s - 32))
 22203  		v1.AddArg2(src, mem)
 22204  		v0.AddArg(v1)
 22205  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 22206  		v2.AddArg(v1)
 22207  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64FSTPQ, types.TypeMem)
 22208  		v4 := b.NewValue0(v.Pos, ssaop.OpSelect0, typ.Vec128)
 22209  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64FLDPQ, types.NewTuple(typ.Vec128, typ.Vec128))
 22210  		v5.AddArg2(src, mem)
 22211  		v4.AddArg(v5)
 22212  		v6 := b.NewValue0(v.Pos, ssaop.OpSelect1, typ.Vec128)
 22213  		v6.AddArg(v5)
 22214  		v3.AddArg4(dst, v4, v6, mem)
 22215  		v.AddArg4(dst, v0, v2, v3)
 22216  		return true
 22217  	}
 22218  	// match: (Move [s] dst src mem)
 22219  	// cond: s > 64 && s < 192 && ssa.LogLargeCopyValue(v, s)
 22220  	// result: (LoweredMove [s] dst src mem)
 22221  	for {
 22222  		s := ssa.AuxIntToInt64(v.AuxInt)
 22223  		dst := v_0
 22224  		src := v_1
 22225  		mem := v_2
 22226  		if !(s > 64 && s < 192 && ssa.LogLargeCopyValue(v, s)) {
 22227  			break
 22228  		}
 22229  		v.Reset(ssaop.OpARM64LoweredMove)
 22230  		v.AuxInt = ssa.Int64ToAuxInt(s)
 22231  		v.AddArg3(dst, src, mem)
 22232  		return true
 22233  	}
 22234  	// match: (Move [s] dst src mem)
 22235  	// cond: s >= 192 && ssa.LogLargeCopyValue(v, s)
 22236  	// result: (LoweredMoveLoop [s] dst src mem)
 22237  	for {
 22238  		s := ssa.AuxIntToInt64(v.AuxInt)
 22239  		dst := v_0
 22240  		src := v_1
 22241  		mem := v_2
 22242  		if !(s >= 192 && ssa.LogLargeCopyValue(v, s)) {
 22243  			break
 22244  		}
 22245  		v.Reset(ssaop.OpARM64LoweredMoveLoop)
 22246  		v.AuxInt = ssa.Int64ToAuxInt(s)
 22247  		v.AddArg3(dst, src, mem)
 22248  		return true
 22249  	}
 22250  	return false
 22251  }
 22252  func rewriteValue_OpMulAddFloat32x4(v *ssa.Value) bool {
 22253  	v_2 := v.Args[2]
 22254  	v_1 := v.Args[1]
 22255  	v_0 := v.Args[0]
 22256  	// match: (MulAddFloat32x4 x y z)
 22257  	// result: (VFMLA4S z x y)
 22258  	for {
 22259  		x := v_0
 22260  		y := v_1
 22261  		z := v_2
 22262  		v.Reset(ssaop.OpARM64VFMLA4S)
 22263  		v.AddArg3(z, x, y)
 22264  		return true
 22265  	}
 22266  }
 22267  func rewriteValue_OpMulAddFloat64x2(v *ssa.Value) bool {
 22268  	v_2 := v.Args[2]
 22269  	v_1 := v.Args[1]
 22270  	v_0 := v.Args[0]
 22271  	// match: (MulAddFloat64x2 x y z)
 22272  	// result: (VFMLA2D z x y)
 22273  	for {
 22274  		x := v_0
 22275  		y := v_1
 22276  		z := v_2
 22277  		v.Reset(ssaop.OpARM64VFMLA2D)
 22278  		v.AddArg3(z, x, y)
 22279  		return true
 22280  	}
 22281  }
 22282  func rewriteValue_OpMulAddInt16x8(v *ssa.Value) bool {
 22283  	v_2 := v.Args[2]
 22284  	v_1 := v.Args[1]
 22285  	v_0 := v.Args[0]
 22286  	// match: (MulAddInt16x8 x y z)
 22287  	// result: (VMLA8H z x y)
 22288  	for {
 22289  		x := v_0
 22290  		y := v_1
 22291  		z := v_2
 22292  		v.Reset(ssaop.OpARM64VMLA8H)
 22293  		v.AddArg3(z, x, y)
 22294  		return true
 22295  	}
 22296  }
 22297  func rewriteValue_OpMulAddInt32x4(v *ssa.Value) bool {
 22298  	v_2 := v.Args[2]
 22299  	v_1 := v.Args[1]
 22300  	v_0 := v.Args[0]
 22301  	// match: (MulAddInt32x4 x y z)
 22302  	// result: (VMLA4S z x y)
 22303  	for {
 22304  		x := v_0
 22305  		y := v_1
 22306  		z := v_2
 22307  		v.Reset(ssaop.OpARM64VMLA4S)
 22308  		v.AddArg3(z, x, y)
 22309  		return true
 22310  	}
 22311  }
 22312  func rewriteValue_OpMulAddInt8x16(v *ssa.Value) bool {
 22313  	v_2 := v.Args[2]
 22314  	v_1 := v.Args[1]
 22315  	v_0 := v.Args[0]
 22316  	// match: (MulAddInt8x16 x y z)
 22317  	// result: (VMLA16B z x y)
 22318  	for {
 22319  		x := v_0
 22320  		y := v_1
 22321  		z := v_2
 22322  		v.Reset(ssaop.OpARM64VMLA16B)
 22323  		v.AddArg3(z, x, y)
 22324  		return true
 22325  	}
 22326  }
 22327  func rewriteValue_OpMulAddUint16x8(v *ssa.Value) bool {
 22328  	v_2 := v.Args[2]
 22329  	v_1 := v.Args[1]
 22330  	v_0 := v.Args[0]
 22331  	// match: (MulAddUint16x8 x y z)
 22332  	// result: (VMLA8H z x y)
 22333  	for {
 22334  		x := v_0
 22335  		y := v_1
 22336  		z := v_2
 22337  		v.Reset(ssaop.OpARM64VMLA8H)
 22338  		v.AddArg3(z, x, y)
 22339  		return true
 22340  	}
 22341  }
 22342  func rewriteValue_OpMulAddUint32x4(v *ssa.Value) bool {
 22343  	v_2 := v.Args[2]
 22344  	v_1 := v.Args[1]
 22345  	v_0 := v.Args[0]
 22346  	// match: (MulAddUint32x4 x y z)
 22347  	// result: (VMLA4S z x y)
 22348  	for {
 22349  		x := v_0
 22350  		y := v_1
 22351  		z := v_2
 22352  		v.Reset(ssaop.OpARM64VMLA4S)
 22353  		v.AddArg3(z, x, y)
 22354  		return true
 22355  	}
 22356  }
 22357  func rewriteValue_OpMulAddUint8x16(v *ssa.Value) bool {
 22358  	v_2 := v.Args[2]
 22359  	v_1 := v.Args[1]
 22360  	v_0 := v.Args[0]
 22361  	// match: (MulAddUint8x16 x y z)
 22362  	// result: (VMLA16B z x y)
 22363  	for {
 22364  		x := v_0
 22365  		y := v_1
 22366  		z := v_2
 22367  		v.Reset(ssaop.OpARM64VMLA16B)
 22368  		v.AddArg3(z, x, y)
 22369  		return true
 22370  	}
 22371  }
 22372  func rewriteValue_OpNeq16(v *ssa.Value) bool {
 22373  	v_1 := v.Args[1]
 22374  	v_0 := v.Args[0]
 22375  	b := v.Block
 22376  	typ := &b.Func.Config.Types
 22377  	// match: (Neq16 x y)
 22378  	// result: (NotEqual (CMPW (ZeroExt16to32 x) (ZeroExt16to32 y)))
 22379  	for {
 22380  		x := v_0
 22381  		y := v_1
 22382  		v.Reset(ssaop.OpARM64NotEqual)
 22383  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 22384  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 22385  		v1.AddArg(x)
 22386  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 22387  		v2.AddArg(y)
 22388  		v0.AddArg2(v1, v2)
 22389  		v.AddArg(v0)
 22390  		return true
 22391  	}
 22392  }
 22393  func rewriteValue_OpNeq32(v *ssa.Value) bool {
 22394  	v_1 := v.Args[1]
 22395  	v_0 := v.Args[0]
 22396  	b := v.Block
 22397  	// match: (Neq32 x y)
 22398  	// result: (NotEqual (CMPW x y))
 22399  	for {
 22400  		x := v_0
 22401  		y := v_1
 22402  		v.Reset(ssaop.OpARM64NotEqual)
 22403  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 22404  		v0.AddArg2(x, y)
 22405  		v.AddArg(v0)
 22406  		return true
 22407  	}
 22408  }
 22409  func rewriteValue_OpNeq32F(v *ssa.Value) bool {
 22410  	v_1 := v.Args[1]
 22411  	v_0 := v.Args[0]
 22412  	b := v.Block
 22413  	// match: (Neq32F x y)
 22414  	// result: (NotEqual (FCMPS x y))
 22415  	for {
 22416  		x := v_0
 22417  		y := v_1
 22418  		v.Reset(ssaop.OpARM64NotEqual)
 22419  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPS, types.TypeFlags)
 22420  		v0.AddArg2(x, y)
 22421  		v.AddArg(v0)
 22422  		return true
 22423  	}
 22424  }
 22425  func rewriteValue_OpNeq64(v *ssa.Value) bool {
 22426  	v_1 := v.Args[1]
 22427  	v_0 := v.Args[0]
 22428  	b := v.Block
 22429  	// match: (Neq64 x y)
 22430  	// result: (NotEqual (CMP x y))
 22431  	for {
 22432  		x := v_0
 22433  		y := v_1
 22434  		v.Reset(ssaop.OpARM64NotEqual)
 22435  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 22436  		v0.AddArg2(x, y)
 22437  		v.AddArg(v0)
 22438  		return true
 22439  	}
 22440  }
 22441  func rewriteValue_OpNeq64F(v *ssa.Value) bool {
 22442  	v_1 := v.Args[1]
 22443  	v_0 := v.Args[0]
 22444  	b := v.Block
 22445  	// match: (Neq64F x y)
 22446  	// result: (NotEqual (FCMPD x y))
 22447  	for {
 22448  		x := v_0
 22449  		y := v_1
 22450  		v.Reset(ssaop.OpARM64NotEqual)
 22451  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64FCMPD, types.TypeFlags)
 22452  		v0.AddArg2(x, y)
 22453  		v.AddArg(v0)
 22454  		return true
 22455  	}
 22456  }
 22457  func rewriteValue_OpNeq8(v *ssa.Value) bool {
 22458  	v_1 := v.Args[1]
 22459  	v_0 := v.Args[0]
 22460  	b := v.Block
 22461  	typ := &b.Func.Config.Types
 22462  	// match: (Neq8 x y)
 22463  	// result: (NotEqual (CMPW (ZeroExt8to32 x) (ZeroExt8to32 y)))
 22464  	for {
 22465  		x := v_0
 22466  		y := v_1
 22467  		v.Reset(ssaop.OpARM64NotEqual)
 22468  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 22469  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 22470  		v1.AddArg(x)
 22471  		v2 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 22472  		v2.AddArg(y)
 22473  		v0.AddArg2(v1, v2)
 22474  		v.AddArg(v0)
 22475  		return true
 22476  	}
 22477  }
 22478  func rewriteValue_OpNeqPtr(v *ssa.Value) bool {
 22479  	v_1 := v.Args[1]
 22480  	v_0 := v.Args[0]
 22481  	b := v.Block
 22482  	// match: (NeqPtr x y)
 22483  	// result: (NotEqual (CMP x y))
 22484  	for {
 22485  		x := v_0
 22486  		y := v_1
 22487  		v.Reset(ssaop.OpARM64NotEqual)
 22488  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 22489  		v0.AddArg2(x, y)
 22490  		v.AddArg(v0)
 22491  		return true
 22492  	}
 22493  }
 22494  func rewriteValue_OpNot(v *ssa.Value) bool {
 22495  	v_0 := v.Args[0]
 22496  	b := v.Block
 22497  	typ := &b.Func.Config.Types
 22498  	// match: (Not x)
 22499  	// result: (XOR (MOVDconst [1]) x)
 22500  	for {
 22501  		x := v_0
 22502  		v.Reset(ssaop.OpARM64XOR)
 22503  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 22504  		v0.AuxInt = ssa.Int64ToAuxInt(1)
 22505  		v.AddArg2(v0, x)
 22506  		return true
 22507  	}
 22508  }
 22509  func rewriteValue_OpOffPtr(v *ssa.Value) bool {
 22510  	v_0 := v.Args[0]
 22511  	// match: (OffPtr [off] ptr:(SP))
 22512  	// cond: ssa.Is32Bit(off)
 22513  	// result: (MOVDaddr [int32(off)] ptr)
 22514  	for {
 22515  		off := ssa.AuxIntToInt64(v.AuxInt)
 22516  		ptr := v_0
 22517  		if ptr.Op != ssaop.OpSP || !(ssa.Is32Bit(off)) {
 22518  			break
 22519  		}
 22520  		v.Reset(ssaop.OpARM64MOVDaddr)
 22521  		v.AuxInt = ssa.Int32ToAuxInt(int32(off))
 22522  		v.AddArg(ptr)
 22523  		return true
 22524  	}
 22525  	// match: (OffPtr [off] ptr)
 22526  	// result: (ADDconst [off] ptr)
 22527  	for {
 22528  		off := ssa.AuxIntToInt64(v.AuxInt)
 22529  		ptr := v_0
 22530  		v.Reset(ssaop.OpARM64ADDconst)
 22531  		v.AuxInt = ssa.Int64ToAuxInt(off)
 22532  		v.AddArg(ptr)
 22533  		return true
 22534  	}
 22535  }
 22536  func rewriteValue_OpPopCount16(v *ssa.Value) bool {
 22537  	v_0 := v.Args[0]
 22538  	b := v.Block
 22539  	typ := &b.Func.Config.Types
 22540  	// match: (PopCount16 <t> x)
 22541  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> (ZeroExt16to64 x)))))
 22542  	for {
 22543  		t := v.Type
 22544  		x := v_0
 22545  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 22546  		v.Type = t
 22547  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 22548  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 22549  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 22550  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 22551  		v3.AddArg(x)
 22552  		v2.AddArg(v3)
 22553  		v1.AddArg(v2)
 22554  		v0.AddArg(v1)
 22555  		v.AddArg(v0)
 22556  		return true
 22557  	}
 22558  }
 22559  func rewriteValue_OpPopCount32(v *ssa.Value) bool {
 22560  	v_0 := v.Args[0]
 22561  	b := v.Block
 22562  	typ := &b.Func.Config.Types
 22563  	// match: (PopCount32 <t> x)
 22564  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> (ZeroExt32to64 x)))))
 22565  	for {
 22566  		t := v.Type
 22567  		x := v_0
 22568  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 22569  		v.Type = t
 22570  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 22571  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 22572  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 22573  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 22574  		v3.AddArg(x)
 22575  		v2.AddArg(v3)
 22576  		v1.AddArg(v2)
 22577  		v0.AddArg(v1)
 22578  		v.AddArg(v0)
 22579  		return true
 22580  	}
 22581  }
 22582  func rewriteValue_OpPopCount64(v *ssa.Value) bool {
 22583  	v_0 := v.Args[0]
 22584  	b := v.Block
 22585  	typ := &b.Func.Config.Types
 22586  	// match: (PopCount64 <t> x)
 22587  	// result: (FMOVDfpgp <t> (VUADDLV <typ.Float64> (VCNT <typ.Float64> (FMOVDgpfp <typ.Float64> x))))
 22588  	for {
 22589  		t := v.Type
 22590  		x := v_0
 22591  		v.Reset(ssaop.OpARM64FMOVDfpgp)
 22592  		v.Type = t
 22593  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VUADDLV, typ.Float64)
 22594  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VCNT, typ.Float64)
 22595  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64FMOVDgpfp, typ.Float64)
 22596  		v2.AddArg(x)
 22597  		v1.AddArg(v2)
 22598  		v0.AddArg(v1)
 22599  		v.AddArg(v0)
 22600  		return true
 22601  	}
 22602  }
 22603  func rewriteValue_OpPrefetchCache(v *ssa.Value) bool {
 22604  	v_1 := v.Args[1]
 22605  	v_0 := v.Args[0]
 22606  	// match: (PrefetchCache addr mem)
 22607  	// result: (PRFM [0] addr mem)
 22608  	for {
 22609  		addr := v_0
 22610  		mem := v_1
 22611  		v.Reset(ssaop.OpARM64PRFM)
 22612  		v.AuxInt = ssa.Int64ToAuxInt(0)
 22613  		v.AddArg2(addr, mem)
 22614  		return true
 22615  	}
 22616  }
 22617  func rewriteValue_OpPrefetchCacheStreamed(v *ssa.Value) bool {
 22618  	v_1 := v.Args[1]
 22619  	v_0 := v.Args[0]
 22620  	// match: (PrefetchCacheStreamed addr mem)
 22621  	// result: (PRFM [1] addr mem)
 22622  	for {
 22623  		addr := v_0
 22624  		mem := v_1
 22625  		v.Reset(ssaop.OpARM64PRFM)
 22626  		v.AuxInt = ssa.Int64ToAuxInt(1)
 22627  		v.AddArg2(addr, mem)
 22628  		return true
 22629  	}
 22630  }
 22631  func rewriteValue_OpPubBarrier(v *ssa.Value) bool {
 22632  	v_0 := v.Args[0]
 22633  	// match: (PubBarrier mem)
 22634  	// result: (DMB [0xe] mem)
 22635  	for {
 22636  		mem := v_0
 22637  		v.Reset(ssaop.OpARM64DMB)
 22638  		v.AuxInt = ssa.Int64ToAuxInt(0xe)
 22639  		v.AddArg(mem)
 22640  		return true
 22641  	}
 22642  }
 22643  func rewriteValue_OpRotateLeft16(v *ssa.Value) bool {
 22644  	v_1 := v.Args[1]
 22645  	v_0 := v.Args[0]
 22646  	b := v.Block
 22647  	typ := &b.Func.Config.Types
 22648  	// match: (RotateLeft16 <t> x (MOVDconst [c]))
 22649  	// result: (Or16 (Lsh16x64 <t> x (MOVDconst [c&15])) (Rsh16Ux64 <t> x (MOVDconst [-c&15])))
 22650  	for {
 22651  		t := v.Type
 22652  		x := v_0
 22653  		if v_1.Op != ssaop.OpARM64MOVDconst {
 22654  			break
 22655  		}
 22656  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 22657  		v.Reset(ssaop.OpOr16)
 22658  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh16x64, t)
 22659  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 22660  		v1.AuxInt = ssa.Int64ToAuxInt(c & 15)
 22661  		v0.AddArg2(x, v1)
 22662  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh16Ux64, t)
 22663  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 22664  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 15)
 22665  		v2.AddArg2(x, v3)
 22666  		v.AddArg2(v0, v2)
 22667  		return true
 22668  	}
 22669  	// match: (RotateLeft16 <t> x y)
 22670  	// result: (RORW <t> (ORshiftLL <typ.UInt32> (ZeroExt16to32 x) (ZeroExt16to32 x) [16]) (NEG <typ.Int64> y))
 22671  	for {
 22672  		t := v.Type
 22673  		x := v_0
 22674  		y := v_1
 22675  		v.Reset(ssaop.OpARM64RORW)
 22676  		v.Type = t
 22677  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ORshiftLL, typ.UInt32)
 22678  		v0.AuxInt = ssa.Int64ToAuxInt(16)
 22679  		v1 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 22680  		v1.AddArg(x)
 22681  		v0.AddArg2(v1, v1)
 22682  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 22683  		v2.AddArg(y)
 22684  		v.AddArg2(v0, v2)
 22685  		return true
 22686  	}
 22687  }
 22688  func rewriteValue_OpRotateLeft32(v *ssa.Value) bool {
 22689  	v_1 := v.Args[1]
 22690  	v_0 := v.Args[0]
 22691  	b := v.Block
 22692  	// match: (RotateLeft32 x y)
 22693  	// result: (RORW x (NEG <y.Type> y))
 22694  	for {
 22695  		x := v_0
 22696  		y := v_1
 22697  		v.Reset(ssaop.OpARM64RORW)
 22698  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, y.Type)
 22699  		v0.AddArg(y)
 22700  		v.AddArg2(x, v0)
 22701  		return true
 22702  	}
 22703  }
 22704  func rewriteValue_OpRotateLeft64(v *ssa.Value) bool {
 22705  	v_1 := v.Args[1]
 22706  	v_0 := v.Args[0]
 22707  	b := v.Block
 22708  	// match: (RotateLeft64 x y)
 22709  	// result: (ROR x (NEG <y.Type> y))
 22710  	for {
 22711  		x := v_0
 22712  		y := v_1
 22713  		v.Reset(ssaop.OpARM64ROR)
 22714  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, y.Type)
 22715  		v0.AddArg(y)
 22716  		v.AddArg2(x, v0)
 22717  		return true
 22718  	}
 22719  }
 22720  func rewriteValue_OpRotateLeft8(v *ssa.Value) bool {
 22721  	v_1 := v.Args[1]
 22722  	v_0 := v.Args[0]
 22723  	b := v.Block
 22724  	typ := &b.Func.Config.Types
 22725  	// match: (RotateLeft8 <t> x (MOVDconst [c]))
 22726  	// result: (Or8 (Lsh8x64 <t> x (MOVDconst [c&7])) (Rsh8Ux64 <t> x (MOVDconst [-c&7])))
 22727  	for {
 22728  		t := v.Type
 22729  		x := v_0
 22730  		if v_1.Op != ssaop.OpARM64MOVDconst {
 22731  			break
 22732  		}
 22733  		c := ssa.AuxIntToInt64(v_1.AuxInt)
 22734  		v.Reset(ssaop.OpOr8)
 22735  		v0 := b.NewValue0(v.Pos, ssaop.OpLsh8x64, t)
 22736  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 22737  		v1.AuxInt = ssa.Int64ToAuxInt(c & 7)
 22738  		v0.AddArg2(x, v1)
 22739  		v2 := b.NewValue0(v.Pos, ssaop.OpRsh8Ux64, t)
 22740  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 22741  		v3.AuxInt = ssa.Int64ToAuxInt(-c & 7)
 22742  		v2.AddArg2(x, v3)
 22743  		v.AddArg2(v0, v2)
 22744  		return true
 22745  	}
 22746  	// match: (RotateLeft8 <t> x y)
 22747  	// result: (OR <t> (SLL <t> x (ANDconst <typ.Int64> [7] y)) (SRL <t> (ZeroExt8to64 x) (ANDconst <typ.Int64> [7] (NEG <typ.Int64> y))))
 22748  	for {
 22749  		t := v.Type
 22750  		x := v_0
 22751  		y := v_1
 22752  		v.Reset(ssaop.OpARM64OR)
 22753  		v.Type = t
 22754  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SLL, t)
 22755  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, typ.Int64)
 22756  		v1.AuxInt = ssa.Int64ToAuxInt(7)
 22757  		v1.AddArg(y)
 22758  		v0.AddArg2(x, v1)
 22759  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 22760  		v3 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 22761  		v3.AddArg(x)
 22762  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64ANDconst, typ.Int64)
 22763  		v4.AuxInt = ssa.Int64ToAuxInt(7)
 22764  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 22765  		v5.AddArg(y)
 22766  		v4.AddArg(v5)
 22767  		v2.AddArg2(v3, v4)
 22768  		v.AddArg2(v0, v2)
 22769  		return true
 22770  	}
 22771  }
 22772  func rewriteValue_OpRsh16Ux16(v *ssa.Value) bool {
 22773  	v_1 := v.Args[1]
 22774  	v_0 := v.Args[0]
 22775  	b := v.Block
 22776  	typ := &b.Func.Config.Types
 22777  	// match: (Rsh16Ux16 <t> [bounded] x y)
 22778  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt16to64 x) y)
 22779  	for {
 22780  		t := v.Type
 22781  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22782  		x := v_0
 22783  		y := v_1
 22784  		v.Reset(ssaop.OpRsh64Ux16)
 22785  		v.Type = t
 22786  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22787  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 22788  		v0.AddArg(x)
 22789  		v.AddArg2(v0, y)
 22790  		return true
 22791  	}
 22792  }
 22793  func rewriteValue_OpRsh16Ux32(v *ssa.Value) bool {
 22794  	v_1 := v.Args[1]
 22795  	v_0 := v.Args[0]
 22796  	b := v.Block
 22797  	typ := &b.Func.Config.Types
 22798  	// match: (Rsh16Ux32 <t> [bounded] x y)
 22799  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt16to64 x) y)
 22800  	for {
 22801  		t := v.Type
 22802  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22803  		x := v_0
 22804  		y := v_1
 22805  		v.Reset(ssaop.OpRsh64Ux32)
 22806  		v.Type = t
 22807  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22808  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 22809  		v0.AddArg(x)
 22810  		v.AddArg2(v0, y)
 22811  		return true
 22812  	}
 22813  }
 22814  func rewriteValue_OpRsh16Ux64(v *ssa.Value) bool {
 22815  	v_1 := v.Args[1]
 22816  	v_0 := v.Args[0]
 22817  	b := v.Block
 22818  	typ := &b.Func.Config.Types
 22819  	// match: (Rsh16Ux64 <t> [bounded] x y)
 22820  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt16to64 x) y)
 22821  	for {
 22822  		t := v.Type
 22823  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22824  		x := v_0
 22825  		y := v_1
 22826  		v.Reset(ssaop.OpRsh64Ux64)
 22827  		v.Type = t
 22828  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22829  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 22830  		v0.AddArg(x)
 22831  		v.AddArg2(v0, y)
 22832  		return true
 22833  	}
 22834  }
 22835  func rewriteValue_OpRsh16Ux8(v *ssa.Value) bool {
 22836  	v_1 := v.Args[1]
 22837  	v_0 := v.Args[0]
 22838  	b := v.Block
 22839  	typ := &b.Func.Config.Types
 22840  	// match: (Rsh16Ux8 <t> [bounded] x y)
 22841  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt16to64 x) y)
 22842  	for {
 22843  		t := v.Type
 22844  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22845  		x := v_0
 22846  		y := v_1
 22847  		v.Reset(ssaop.OpRsh64Ux8)
 22848  		v.Type = t
 22849  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22850  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to64, typ.UInt64)
 22851  		v0.AddArg(x)
 22852  		v.AddArg2(v0, y)
 22853  		return true
 22854  	}
 22855  }
 22856  func rewriteValue_OpRsh16x16(v *ssa.Value) bool {
 22857  	v_1 := v.Args[1]
 22858  	v_0 := v.Args[0]
 22859  	b := v.Block
 22860  	typ := &b.Func.Config.Types
 22861  	// match: (Rsh16x16 <t> [bounded] x y)
 22862  	// result: (Rsh64x16 <t> [bounded] (SignExt16to64 x) y)
 22863  	for {
 22864  		t := v.Type
 22865  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22866  		x := v_0
 22867  		y := v_1
 22868  		v.Reset(ssaop.OpRsh64x16)
 22869  		v.Type = t
 22870  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22871  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 22872  		v0.AddArg(x)
 22873  		v.AddArg2(v0, y)
 22874  		return true
 22875  	}
 22876  }
 22877  func rewriteValue_OpRsh16x32(v *ssa.Value) bool {
 22878  	v_1 := v.Args[1]
 22879  	v_0 := v.Args[0]
 22880  	b := v.Block
 22881  	typ := &b.Func.Config.Types
 22882  	// match: (Rsh16x32 <t> [bounded] x y)
 22883  	// result: (Rsh64x32 <t> [bounded] (SignExt16to64 x) y)
 22884  	for {
 22885  		t := v.Type
 22886  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22887  		x := v_0
 22888  		y := v_1
 22889  		v.Reset(ssaop.OpRsh64x32)
 22890  		v.Type = t
 22891  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22892  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 22893  		v0.AddArg(x)
 22894  		v.AddArg2(v0, y)
 22895  		return true
 22896  	}
 22897  }
 22898  func rewriteValue_OpRsh16x64(v *ssa.Value) bool {
 22899  	v_1 := v.Args[1]
 22900  	v_0 := v.Args[0]
 22901  	b := v.Block
 22902  	typ := &b.Func.Config.Types
 22903  	// match: (Rsh16x64 <t> [bounded] x y)
 22904  	// result: (Rsh64x64 <t> [bounded] (SignExt16to64 x) y)
 22905  	for {
 22906  		t := v.Type
 22907  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22908  		x := v_0
 22909  		y := v_1
 22910  		v.Reset(ssaop.OpRsh64x64)
 22911  		v.Type = t
 22912  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22913  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 22914  		v0.AddArg(x)
 22915  		v.AddArg2(v0, y)
 22916  		return true
 22917  	}
 22918  }
 22919  func rewriteValue_OpRsh16x8(v *ssa.Value) bool {
 22920  	v_1 := v.Args[1]
 22921  	v_0 := v.Args[0]
 22922  	b := v.Block
 22923  	typ := &b.Func.Config.Types
 22924  	// match: (Rsh16x8 <t> [bounded] x y)
 22925  	// result: (Rsh64x8 <t> [bounded] (SignExt16to64 x) y)
 22926  	for {
 22927  		t := v.Type
 22928  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22929  		x := v_0
 22930  		y := v_1
 22931  		v.Reset(ssaop.OpRsh64x8)
 22932  		v.Type = t
 22933  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22934  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt16to64, typ.Int64)
 22935  		v0.AddArg(x)
 22936  		v.AddArg2(v0, y)
 22937  		return true
 22938  	}
 22939  }
 22940  func rewriteValue_OpRsh32Ux16(v *ssa.Value) bool {
 22941  	v_1 := v.Args[1]
 22942  	v_0 := v.Args[0]
 22943  	b := v.Block
 22944  	typ := &b.Func.Config.Types
 22945  	// match: (Rsh32Ux16 <t> [bounded] x y)
 22946  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt32to64 x) y)
 22947  	for {
 22948  		t := v.Type
 22949  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22950  		x := v_0
 22951  		y := v_1
 22952  		v.Reset(ssaop.OpRsh64Ux16)
 22953  		v.Type = t
 22954  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22955  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 22956  		v0.AddArg(x)
 22957  		v.AddArg2(v0, y)
 22958  		return true
 22959  	}
 22960  }
 22961  func rewriteValue_OpRsh32Ux32(v *ssa.Value) bool {
 22962  	v_1 := v.Args[1]
 22963  	v_0 := v.Args[0]
 22964  	b := v.Block
 22965  	typ := &b.Func.Config.Types
 22966  	// match: (Rsh32Ux32 <t> [bounded] x y)
 22967  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt32to64 x) y)
 22968  	for {
 22969  		t := v.Type
 22970  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22971  		x := v_0
 22972  		y := v_1
 22973  		v.Reset(ssaop.OpRsh64Ux32)
 22974  		v.Type = t
 22975  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22976  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 22977  		v0.AddArg(x)
 22978  		v.AddArg2(v0, y)
 22979  		return true
 22980  	}
 22981  }
 22982  func rewriteValue_OpRsh32Ux64(v *ssa.Value) bool {
 22983  	v_1 := v.Args[1]
 22984  	v_0 := v.Args[0]
 22985  	b := v.Block
 22986  	typ := &b.Func.Config.Types
 22987  	// match: (Rsh32Ux64 <t> [bounded] x y)
 22988  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt32to64 x) y)
 22989  	for {
 22990  		t := v.Type
 22991  		bounded := ssa.AuxIntToBool(v.AuxInt)
 22992  		x := v_0
 22993  		y := v_1
 22994  		v.Reset(ssaop.OpRsh64Ux64)
 22995  		v.Type = t
 22996  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 22997  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 22998  		v0.AddArg(x)
 22999  		v.AddArg2(v0, y)
 23000  		return true
 23001  	}
 23002  }
 23003  func rewriteValue_OpRsh32Ux8(v *ssa.Value) bool {
 23004  	v_1 := v.Args[1]
 23005  	v_0 := v.Args[0]
 23006  	b := v.Block
 23007  	typ := &b.Func.Config.Types
 23008  	// match: (Rsh32Ux8 <t> [bounded] x y)
 23009  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt32to64 x) y)
 23010  	for {
 23011  		t := v.Type
 23012  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23013  		x := v_0
 23014  		y := v_1
 23015  		v.Reset(ssaop.OpRsh64Ux8)
 23016  		v.Type = t
 23017  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23018  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt32to64, typ.UInt64)
 23019  		v0.AddArg(x)
 23020  		v.AddArg2(v0, y)
 23021  		return true
 23022  	}
 23023  }
 23024  func rewriteValue_OpRsh32x16(v *ssa.Value) bool {
 23025  	v_1 := v.Args[1]
 23026  	v_0 := v.Args[0]
 23027  	b := v.Block
 23028  	typ := &b.Func.Config.Types
 23029  	// match: (Rsh32x16 <t> [bounded] x y)
 23030  	// result: (Rsh64x16 <t> [bounded] (SignExt32to64 x) y)
 23031  	for {
 23032  		t := v.Type
 23033  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23034  		x := v_0
 23035  		y := v_1
 23036  		v.Reset(ssaop.OpRsh64x16)
 23037  		v.Type = t
 23038  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23039  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 23040  		v0.AddArg(x)
 23041  		v.AddArg2(v0, y)
 23042  		return true
 23043  	}
 23044  }
 23045  func rewriteValue_OpRsh32x32(v *ssa.Value) bool {
 23046  	v_1 := v.Args[1]
 23047  	v_0 := v.Args[0]
 23048  	b := v.Block
 23049  	typ := &b.Func.Config.Types
 23050  	// match: (Rsh32x32 <t> [bounded] x y)
 23051  	// result: (Rsh64x32 <t> [bounded] (SignExt32to64 x) y)
 23052  	for {
 23053  		t := v.Type
 23054  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23055  		x := v_0
 23056  		y := v_1
 23057  		v.Reset(ssaop.OpRsh64x32)
 23058  		v.Type = t
 23059  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23060  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 23061  		v0.AddArg(x)
 23062  		v.AddArg2(v0, y)
 23063  		return true
 23064  	}
 23065  }
 23066  func rewriteValue_OpRsh32x64(v *ssa.Value) bool {
 23067  	v_1 := v.Args[1]
 23068  	v_0 := v.Args[0]
 23069  	b := v.Block
 23070  	typ := &b.Func.Config.Types
 23071  	// match: (Rsh32x64 <t> [bounded] x y)
 23072  	// result: (Rsh64x64 <t> [bounded] (SignExt32to64 x) y)
 23073  	for {
 23074  		t := v.Type
 23075  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23076  		x := v_0
 23077  		y := v_1
 23078  		v.Reset(ssaop.OpRsh64x64)
 23079  		v.Type = t
 23080  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23081  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 23082  		v0.AddArg(x)
 23083  		v.AddArg2(v0, y)
 23084  		return true
 23085  	}
 23086  }
 23087  func rewriteValue_OpRsh32x8(v *ssa.Value) bool {
 23088  	v_1 := v.Args[1]
 23089  	v_0 := v.Args[0]
 23090  	b := v.Block
 23091  	typ := &b.Func.Config.Types
 23092  	// match: (Rsh32x8 <t> [bounded] x y)
 23093  	// result: (Rsh64x8 <t> [bounded] (SignExt32to64 x) y)
 23094  	for {
 23095  		t := v.Type
 23096  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23097  		x := v_0
 23098  		y := v_1
 23099  		v.Reset(ssaop.OpRsh64x8)
 23100  		v.Type = t
 23101  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23102  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt32to64, typ.Int64)
 23103  		v0.AddArg(x)
 23104  		v.AddArg2(v0, y)
 23105  		return true
 23106  	}
 23107  }
 23108  func rewriteValue_OpRsh64Ux16(v *ssa.Value) bool {
 23109  	v_1 := v.Args[1]
 23110  	v_0 := v.Args[0]
 23111  	b := v.Block
 23112  	typ := &b.Func.Config.Types
 23113  	// match: (Rsh64Ux16 <t> x y)
 23114  	// cond: ssa.ShiftIsBounded(v)
 23115  	// result: (SRL <t> x y)
 23116  	for {
 23117  		t := v.Type
 23118  		x := v_0
 23119  		y := v_1
 23120  		if !(ssa.ShiftIsBounded(v)) {
 23121  			break
 23122  		}
 23123  		v.Reset(ssaop.OpARM64SRL)
 23124  		v.Type = t
 23125  		v.AddArg2(x, y)
 23126  		return true
 23127  	}
 23128  	// match: (Rsh64Ux16 <t> [bounded] x y)
 23129  	// cond: !ssa.ShiftIsBounded(v)
 23130  	// result: (Rsh64Ux32 <t> [bounded] x (ZeroExt16to32 y))
 23131  	for {
 23132  		t := v.Type
 23133  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23134  		x := v_0
 23135  		y := v_1
 23136  		if !(!ssa.ShiftIsBounded(v)) {
 23137  			break
 23138  		}
 23139  		v.Reset(ssaop.OpRsh64Ux32)
 23140  		v.Type = t
 23141  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23142  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 23143  		v0.AddArg(y)
 23144  		v.AddArg2(x, v0)
 23145  		return true
 23146  	}
 23147  	return false
 23148  }
 23149  func rewriteValue_OpRsh64Ux32(v *ssa.Value) bool {
 23150  	v_1 := v.Args[1]
 23151  	v_0 := v.Args[0]
 23152  	b := v.Block
 23153  	// match: (Rsh64Ux32 <t> x y)
 23154  	// cond: ssa.ShiftIsBounded(v)
 23155  	// result: (SRL <t> x y)
 23156  	for {
 23157  		t := v.Type
 23158  		x := v_0
 23159  		y := v_1
 23160  		if !(ssa.ShiftIsBounded(v)) {
 23161  			break
 23162  		}
 23163  		v.Reset(ssaop.OpARM64SRL)
 23164  		v.Type = t
 23165  		v.AddArg2(x, y)
 23166  		return true
 23167  	}
 23168  	// match: (Rsh64Ux32 <t> x y)
 23169  	// cond: !ssa.ShiftIsBounded(v)
 23170  	// result: (CSEL [ssaop.OpARM64LessThanU] (SRL <t> x y) (Const64 <t> [0]) (CMPWconst [64] y))
 23171  	for {
 23172  		t := v.Type
 23173  		x := v_0
 23174  		y := v_1
 23175  		if !(!ssa.ShiftIsBounded(v)) {
 23176  			break
 23177  		}
 23178  		v.Reset(ssaop.OpARM64CSEL)
 23179  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23180  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 23181  		v0.AddArg2(x, y)
 23182  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 23183  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 23184  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 23185  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 23186  		v2.AddArg(y)
 23187  		v.AddArg3(v0, v1, v2)
 23188  		return true
 23189  	}
 23190  	return false
 23191  }
 23192  func rewriteValue_OpRsh64Ux64(v *ssa.Value) bool {
 23193  	v_1 := v.Args[1]
 23194  	v_0 := v.Args[0]
 23195  	b := v.Block
 23196  	// match: (Rsh64Ux64 <t> x y)
 23197  	// cond: ssa.ShiftIsBounded(v)
 23198  	// result: (SRL <t> x y)
 23199  	for {
 23200  		t := v.Type
 23201  		x := v_0
 23202  		y := v_1
 23203  		if !(ssa.ShiftIsBounded(v)) {
 23204  			break
 23205  		}
 23206  		v.Reset(ssaop.OpARM64SRL)
 23207  		v.Type = t
 23208  		v.AddArg2(x, y)
 23209  		return true
 23210  	}
 23211  	// match: (Rsh64Ux64 <t> x y)
 23212  	// cond: !ssa.ShiftIsBounded(v)
 23213  	// result: (CSEL [ssaop.OpARM64LessThanU] (SRL <t> x y) (Const64 <t> [0]) (CMPconst [64] y))
 23214  	for {
 23215  		t := v.Type
 23216  		x := v_0
 23217  		y := v_1
 23218  		if !(!ssa.ShiftIsBounded(v)) {
 23219  			break
 23220  		}
 23221  		v.Reset(ssaop.OpARM64CSEL)
 23222  		v.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23223  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SRL, t)
 23224  		v0.AddArg2(x, y)
 23225  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, t)
 23226  		v1.AuxInt = ssa.Int64ToAuxInt(0)
 23227  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23228  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 23229  		v2.AddArg(y)
 23230  		v.AddArg3(v0, v1, v2)
 23231  		return true
 23232  	}
 23233  	return false
 23234  }
 23235  func rewriteValue_OpRsh64Ux8(v *ssa.Value) bool {
 23236  	v_1 := v.Args[1]
 23237  	v_0 := v.Args[0]
 23238  	b := v.Block
 23239  	typ := &b.Func.Config.Types
 23240  	// match: (Rsh64Ux8 <t> x y)
 23241  	// cond: ssa.ShiftIsBounded(v)
 23242  	// result: (SRL <t> x y)
 23243  	for {
 23244  		t := v.Type
 23245  		x := v_0
 23246  		y := v_1
 23247  		if !(ssa.ShiftIsBounded(v)) {
 23248  			break
 23249  		}
 23250  		v.Reset(ssaop.OpARM64SRL)
 23251  		v.Type = t
 23252  		v.AddArg2(x, y)
 23253  		return true
 23254  	}
 23255  	// match: (Rsh64Ux8 <t> [bounded] x y)
 23256  	// cond: !ssa.ShiftIsBounded(v)
 23257  	// result: (Rsh64Ux32 <t> [bounded] x (ZeroExt8to32 y))
 23258  	for {
 23259  		t := v.Type
 23260  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23261  		x := v_0
 23262  		y := v_1
 23263  		if !(!ssa.ShiftIsBounded(v)) {
 23264  			break
 23265  		}
 23266  		v.Reset(ssaop.OpRsh64Ux32)
 23267  		v.Type = t
 23268  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23269  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 23270  		v0.AddArg(y)
 23271  		v.AddArg2(x, v0)
 23272  		return true
 23273  	}
 23274  	return false
 23275  }
 23276  func rewriteValue_OpRsh64x16(v *ssa.Value) bool {
 23277  	v_1 := v.Args[1]
 23278  	v_0 := v.Args[0]
 23279  	b := v.Block
 23280  	typ := &b.Func.Config.Types
 23281  	// match: (Rsh64x16 <t> x y)
 23282  	// cond: ssa.ShiftIsBounded(v)
 23283  	// result: (SRA <t> x y)
 23284  	for {
 23285  		t := v.Type
 23286  		x := v_0
 23287  		y := v_1
 23288  		if !(ssa.ShiftIsBounded(v)) {
 23289  			break
 23290  		}
 23291  		v.Reset(ssaop.OpARM64SRA)
 23292  		v.Type = t
 23293  		v.AddArg2(x, y)
 23294  		return true
 23295  	}
 23296  	// match: (Rsh64x16 <t> [bounded] x y)
 23297  	// cond: !ssa.ShiftIsBounded(v)
 23298  	// result: (Rsh64x32 <t> [bounded] x (ZeroExt16to32 y))
 23299  	for {
 23300  		t := v.Type
 23301  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23302  		x := v_0
 23303  		y := v_1
 23304  		if !(!ssa.ShiftIsBounded(v)) {
 23305  			break
 23306  		}
 23307  		v.Reset(ssaop.OpRsh64x32)
 23308  		v.Type = t
 23309  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23310  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt16to32, typ.UInt32)
 23311  		v0.AddArg(y)
 23312  		v.AddArg2(x, v0)
 23313  		return true
 23314  	}
 23315  	return false
 23316  }
 23317  func rewriteValue_OpRsh64x32(v *ssa.Value) bool {
 23318  	v_1 := v.Args[1]
 23319  	v_0 := v.Args[0]
 23320  	b := v.Block
 23321  	// match: (Rsh64x32 <t> x y)
 23322  	// cond: ssa.ShiftIsBounded(v)
 23323  	// result: (SRA <t> x y)
 23324  	for {
 23325  		t := v.Type
 23326  		x := v_0
 23327  		y := v_1
 23328  		if !(ssa.ShiftIsBounded(v)) {
 23329  			break
 23330  		}
 23331  		v.Reset(ssaop.OpARM64SRA)
 23332  		v.Type = t
 23333  		v.AddArg2(x, y)
 23334  		return true
 23335  	}
 23336  	// match: (Rsh64x32 <t> x y)
 23337  	// cond: !ssa.ShiftIsBounded(v)
 23338  	// result: (SRA x (CSEL [ssaop.OpARM64LessThanU] <y.Type> y (Const64 <y.Type> [63]) (CMPWconst [64] y)))
 23339  	for {
 23340  		x := v_0
 23341  		y := v_1
 23342  		if !(!ssa.ShiftIsBounded(v)) {
 23343  			break
 23344  		}
 23345  		v.Reset(ssaop.OpARM64SRA)
 23346  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, y.Type)
 23347  		v0.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23348  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, y.Type)
 23349  		v1.AuxInt = ssa.Int64ToAuxInt(63)
 23350  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 23351  		v2.AuxInt = ssa.Int32ToAuxInt(64)
 23352  		v2.AddArg(y)
 23353  		v0.AddArg3(y, v1, v2)
 23354  		v.AddArg2(x, v0)
 23355  		return true
 23356  	}
 23357  	return false
 23358  }
 23359  func rewriteValue_OpRsh64x64(v *ssa.Value) bool {
 23360  	v_1 := v.Args[1]
 23361  	v_0 := v.Args[0]
 23362  	b := v.Block
 23363  	// match: (Rsh64x64 <t> x y)
 23364  	// cond: ssa.ShiftIsBounded(v)
 23365  	// result: (SRA <t> x y)
 23366  	for {
 23367  		t := v.Type
 23368  		x := v_0
 23369  		y := v_1
 23370  		if !(ssa.ShiftIsBounded(v)) {
 23371  			break
 23372  		}
 23373  		v.Reset(ssaop.OpARM64SRA)
 23374  		v.Type = t
 23375  		v.AddArg2(x, y)
 23376  		return true
 23377  	}
 23378  	// match: (Rsh64x64 <t> x y)
 23379  	// cond: !ssa.ShiftIsBounded(v)
 23380  	// result: (SRA x (CSEL [ssaop.OpARM64LessThanU] <y.Type> y (Const64 <y.Type> [63]) (CMPconst [64] y)))
 23381  	for {
 23382  		x := v_0
 23383  		y := v_1
 23384  		if !(!ssa.ShiftIsBounded(v)) {
 23385  			break
 23386  		}
 23387  		v.Reset(ssaop.OpARM64SRA)
 23388  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, y.Type)
 23389  		v0.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23390  		v1 := b.NewValue0(v.Pos, ssaop.OpConst64, y.Type)
 23391  		v1.AuxInt = ssa.Int64ToAuxInt(63)
 23392  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23393  		v2.AuxInt = ssa.Int64ToAuxInt(64)
 23394  		v2.AddArg(y)
 23395  		v0.AddArg3(y, v1, v2)
 23396  		v.AddArg2(x, v0)
 23397  		return true
 23398  	}
 23399  	return false
 23400  }
 23401  func rewriteValue_OpRsh64x8(v *ssa.Value) bool {
 23402  	v_1 := v.Args[1]
 23403  	v_0 := v.Args[0]
 23404  	b := v.Block
 23405  	typ := &b.Func.Config.Types
 23406  	// match: (Rsh64x8 <t> x y)
 23407  	// cond: ssa.ShiftIsBounded(v)
 23408  	// result: (SRA <t> x y)
 23409  	for {
 23410  		t := v.Type
 23411  		x := v_0
 23412  		y := v_1
 23413  		if !(ssa.ShiftIsBounded(v)) {
 23414  			break
 23415  		}
 23416  		v.Reset(ssaop.OpARM64SRA)
 23417  		v.Type = t
 23418  		v.AddArg2(x, y)
 23419  		return true
 23420  	}
 23421  	// match: (Rsh64x8 <t> [bounded] x y)
 23422  	// cond: !ssa.ShiftIsBounded(v)
 23423  	// result: (Rsh64x32 <t> [bounded] x (ZeroExt8to32 y))
 23424  	for {
 23425  		t := v.Type
 23426  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23427  		x := v_0
 23428  		y := v_1
 23429  		if !(!ssa.ShiftIsBounded(v)) {
 23430  			break
 23431  		}
 23432  		v.Reset(ssaop.OpRsh64x32)
 23433  		v.Type = t
 23434  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23435  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to32, typ.UInt32)
 23436  		v0.AddArg(y)
 23437  		v.AddArg2(x, v0)
 23438  		return true
 23439  	}
 23440  	return false
 23441  }
 23442  func rewriteValue_OpRsh8Ux16(v *ssa.Value) bool {
 23443  	v_1 := v.Args[1]
 23444  	v_0 := v.Args[0]
 23445  	b := v.Block
 23446  	typ := &b.Func.Config.Types
 23447  	// match: (Rsh8Ux16 <t> [bounded] x y)
 23448  	// result: (Rsh64Ux16 <t> [bounded] (ZeroExt8to64 x) y)
 23449  	for {
 23450  		t := v.Type
 23451  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23452  		x := v_0
 23453  		y := v_1
 23454  		v.Reset(ssaop.OpRsh64Ux16)
 23455  		v.Type = t
 23456  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23457  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 23458  		v0.AddArg(x)
 23459  		v.AddArg2(v0, y)
 23460  		return true
 23461  	}
 23462  }
 23463  func rewriteValue_OpRsh8Ux32(v *ssa.Value) bool {
 23464  	v_1 := v.Args[1]
 23465  	v_0 := v.Args[0]
 23466  	b := v.Block
 23467  	typ := &b.Func.Config.Types
 23468  	// match: (Rsh8Ux32 <t> [bounded] x y)
 23469  	// result: (Rsh64Ux32 <t> [bounded] (ZeroExt8to64 x) y)
 23470  	for {
 23471  		t := v.Type
 23472  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23473  		x := v_0
 23474  		y := v_1
 23475  		v.Reset(ssaop.OpRsh64Ux32)
 23476  		v.Type = t
 23477  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23478  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 23479  		v0.AddArg(x)
 23480  		v.AddArg2(v0, y)
 23481  		return true
 23482  	}
 23483  }
 23484  func rewriteValue_OpRsh8Ux64(v *ssa.Value) bool {
 23485  	v_1 := v.Args[1]
 23486  	v_0 := v.Args[0]
 23487  	b := v.Block
 23488  	typ := &b.Func.Config.Types
 23489  	// match: (Rsh8Ux64 <t> [bounded] x y)
 23490  	// result: (Rsh64Ux64 <t> [bounded] (ZeroExt8to64 x) y)
 23491  	for {
 23492  		t := v.Type
 23493  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23494  		x := v_0
 23495  		y := v_1
 23496  		v.Reset(ssaop.OpRsh64Ux64)
 23497  		v.Type = t
 23498  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23499  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 23500  		v0.AddArg(x)
 23501  		v.AddArg2(v0, y)
 23502  		return true
 23503  	}
 23504  }
 23505  func rewriteValue_OpRsh8Ux8(v *ssa.Value) bool {
 23506  	v_1 := v.Args[1]
 23507  	v_0 := v.Args[0]
 23508  	b := v.Block
 23509  	typ := &b.Func.Config.Types
 23510  	// match: (Rsh8Ux8 <t> [bounded] x y)
 23511  	// result: (Rsh64Ux8 <t> [bounded] (ZeroExt8to64 x) y)
 23512  	for {
 23513  		t := v.Type
 23514  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23515  		x := v_0
 23516  		y := v_1
 23517  		v.Reset(ssaop.OpRsh64Ux8)
 23518  		v.Type = t
 23519  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23520  		v0 := b.NewValue0(v.Pos, ssaop.OpZeroExt8to64, typ.UInt64)
 23521  		v0.AddArg(x)
 23522  		v.AddArg2(v0, y)
 23523  		return true
 23524  	}
 23525  }
 23526  func rewriteValue_OpRsh8x16(v *ssa.Value) bool {
 23527  	v_1 := v.Args[1]
 23528  	v_0 := v.Args[0]
 23529  	b := v.Block
 23530  	typ := &b.Func.Config.Types
 23531  	// match: (Rsh8x16 <t> [bounded] x y)
 23532  	// result: (Rsh64x16 <t> [bounded] (SignExt8to64 x) y)
 23533  	for {
 23534  		t := v.Type
 23535  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23536  		x := v_0
 23537  		y := v_1
 23538  		v.Reset(ssaop.OpRsh64x16)
 23539  		v.Type = t
 23540  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23541  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 23542  		v0.AddArg(x)
 23543  		v.AddArg2(v0, y)
 23544  		return true
 23545  	}
 23546  }
 23547  func rewriteValue_OpRsh8x32(v *ssa.Value) bool {
 23548  	v_1 := v.Args[1]
 23549  	v_0 := v.Args[0]
 23550  	b := v.Block
 23551  	typ := &b.Func.Config.Types
 23552  	// match: (Rsh8x32 <t> [bounded] x y)
 23553  	// result: (Rsh64x32 <t> [bounded] (SignExt8to64 x) y)
 23554  	for {
 23555  		t := v.Type
 23556  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23557  		x := v_0
 23558  		y := v_1
 23559  		v.Reset(ssaop.OpRsh64x32)
 23560  		v.Type = t
 23561  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23562  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 23563  		v0.AddArg(x)
 23564  		v.AddArg2(v0, y)
 23565  		return true
 23566  	}
 23567  }
 23568  func rewriteValue_OpRsh8x64(v *ssa.Value) bool {
 23569  	v_1 := v.Args[1]
 23570  	v_0 := v.Args[0]
 23571  	b := v.Block
 23572  	typ := &b.Func.Config.Types
 23573  	// match: (Rsh8x64 <t> [bounded] x y)
 23574  	// result: (Rsh64x64 <t> [bounded] (SignExt8to64 x) y)
 23575  	for {
 23576  		t := v.Type
 23577  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23578  		x := v_0
 23579  		y := v_1
 23580  		v.Reset(ssaop.OpRsh64x64)
 23581  		v.Type = t
 23582  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23583  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 23584  		v0.AddArg(x)
 23585  		v.AddArg2(v0, y)
 23586  		return true
 23587  	}
 23588  }
 23589  func rewriteValue_OpRsh8x8(v *ssa.Value) bool {
 23590  	v_1 := v.Args[1]
 23591  	v_0 := v.Args[0]
 23592  	b := v.Block
 23593  	typ := &b.Func.Config.Types
 23594  	// match: (Rsh8x8 <t> [bounded] x y)
 23595  	// result: (Rsh64x8 <t> [bounded] (SignExt8to64 x) y)
 23596  	for {
 23597  		t := v.Type
 23598  		bounded := ssa.AuxIntToBool(v.AuxInt)
 23599  		x := v_0
 23600  		y := v_1
 23601  		v.Reset(ssaop.OpRsh64x8)
 23602  		v.Type = t
 23603  		v.AuxInt = ssa.BoolToAuxInt(bounded)
 23604  		v0 := b.NewValue0(v.Pos, ssaop.OpSignExt8to64, typ.Int64)
 23605  		v0.AddArg(x)
 23606  		v.AddArg2(v0, y)
 23607  		return true
 23608  	}
 23609  }
 23610  func rewriteValue_OpScalableVectorLen(v *ssa.Value) bool {
 23611  	// match: (ScalableVectorLen)
 23612  	// result: (RDVL [1])
 23613  	for {
 23614  		v.Reset(ssaop.OpARM64RDVL)
 23615  		v.AuxInt = ssa.Int64ToAuxInt(1)
 23616  		return true
 23617  	}
 23618  }
 23619  func rewriteValue_OpSelect0(v *ssa.Value) bool {
 23620  	v_0 := v.Args[0]
 23621  	b := v.Block
 23622  	typ := &b.Func.Config.Types
 23623  	// match: (Select0 (Mul64uhilo x y))
 23624  	// result: (UMULH x y)
 23625  	for {
 23626  		if v_0.Op != ssaop.OpMul64uhilo {
 23627  			break
 23628  		}
 23629  		y := v_0.Args[1]
 23630  		x := v_0.Args[0]
 23631  		v.Reset(ssaop.OpARM64UMULH)
 23632  		v.AddArg2(x, y)
 23633  		return true
 23634  	}
 23635  	// match: (Select0 (Add64carry x y c))
 23636  	// result: (Select0 <typ.UInt64> (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] c))))
 23637  	for {
 23638  		if v_0.Op != ssaop.OpAdd64carry {
 23639  			break
 23640  		}
 23641  		c := v_0.Args[2]
 23642  		x := v_0.Args[0]
 23643  		y := v_0.Args[1]
 23644  		v.Reset(ssaop.OpSelect0)
 23645  		v.Type = typ.UInt64
 23646  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64ADCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23647  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23648  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64ADDSconstflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23649  		v2.AuxInt = ssa.Int64ToAuxInt(-1)
 23650  		v2.AddArg(c)
 23651  		v1.AddArg(v2)
 23652  		v0.AddArg3(x, y, v1)
 23653  		v.AddArg(v0)
 23654  		return true
 23655  	}
 23656  	// match: (Select0 (Sub64borrow x y bo))
 23657  	// result: (Select0 <typ.UInt64> (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags bo))))
 23658  	for {
 23659  		if v_0.Op != ssaop.OpSub64borrow {
 23660  			break
 23661  		}
 23662  		bo := v_0.Args[2]
 23663  		x := v_0.Args[0]
 23664  		y := v_0.Args[1]
 23665  		v.Reset(ssaop.OpSelect0)
 23666  		v.Type = typ.UInt64
 23667  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64SBCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23668  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23669  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEGSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23670  		v2.AddArg(bo)
 23671  		v1.AddArg(v2)
 23672  		v0.AddArg3(x, y, v1)
 23673  		v.AddArg(v0)
 23674  		return true
 23675  	}
 23676  	// match: (Select0 (Mul64uover x y))
 23677  	// result: (MUL x y)
 23678  	for {
 23679  		if v_0.Op != ssaop.OpMul64uover {
 23680  			break
 23681  		}
 23682  		y := v_0.Args[1]
 23683  		x := v_0.Args[0]
 23684  		v.Reset(ssaop.OpARM64MUL)
 23685  		v.AddArg2(x, y)
 23686  		return true
 23687  	}
 23688  	return false
 23689  }
 23690  func rewriteValue_OpSelect1(v *ssa.Value) bool {
 23691  	v_0 := v.Args[0]
 23692  	b := v.Block
 23693  	typ := &b.Func.Config.Types
 23694  	// match: (Select1 (Mul64uhilo x y))
 23695  	// result: (MUL x y)
 23696  	for {
 23697  		if v_0.Op != ssaop.OpMul64uhilo {
 23698  			break
 23699  		}
 23700  		y := v_0.Args[1]
 23701  		x := v_0.Args[0]
 23702  		v.Reset(ssaop.OpARM64MUL)
 23703  		v.AddArg2(x, y)
 23704  		return true
 23705  	}
 23706  	// match: (Select1 (Add64carry x y c))
 23707  	// result: (ADCzerocarry <typ.UInt64> (Select1 <types.TypeFlags> (ADCSflags x y (Select1 <types.TypeFlags> (ADDSconstflags [-1] c)))))
 23708  	for {
 23709  		if v_0.Op != ssaop.OpAdd64carry {
 23710  			break
 23711  		}
 23712  		c := v_0.Args[2]
 23713  		x := v_0.Args[0]
 23714  		y := v_0.Args[1]
 23715  		v.Reset(ssaop.OpARM64ADCzerocarry)
 23716  		v.Type = typ.UInt64
 23717  		v0 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23718  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64ADCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23719  		v2 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23720  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64ADDSconstflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23721  		v3.AuxInt = ssa.Int64ToAuxInt(-1)
 23722  		v3.AddArg(c)
 23723  		v2.AddArg(v3)
 23724  		v1.AddArg3(x, y, v2)
 23725  		v0.AddArg(v1)
 23726  		v.AddArg(v0)
 23727  		return true
 23728  	}
 23729  	// match: (Select1 (Sub64borrow x y bo))
 23730  	// result: (NEG <typ.UInt64> (NGCzerocarry <typ.UInt64> (Select1 <types.TypeFlags> (SBCSflags x y (Select1 <types.TypeFlags> (NEGSflags bo))))))
 23731  	for {
 23732  		if v_0.Op != ssaop.OpSub64borrow {
 23733  			break
 23734  		}
 23735  		bo := v_0.Args[2]
 23736  		x := v_0.Args[0]
 23737  		y := v_0.Args[1]
 23738  		v.Reset(ssaop.OpARM64NEG)
 23739  		v.Type = typ.UInt64
 23740  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NGCzerocarry, typ.UInt64)
 23741  		v1 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23742  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64SBCSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23743  		v3 := b.NewValue0(v.Pos, ssaop.OpSelect1, types.TypeFlags)
 23744  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64NEGSflags, types.NewTuple(typ.UInt64, types.TypeFlags))
 23745  		v4.AddArg(bo)
 23746  		v3.AddArg(v4)
 23747  		v2.AddArg3(x, y, v3)
 23748  		v1.AddArg(v2)
 23749  		v0.AddArg(v1)
 23750  		v.AddArg(v0)
 23751  		return true
 23752  	}
 23753  	// match: (Select1 (Mul64uover x y))
 23754  	// result: (NotEqual (CMPconst (UMULH <typ.UInt64> x y) [0]))
 23755  	for {
 23756  		if v_0.Op != ssaop.OpMul64uover {
 23757  			break
 23758  		}
 23759  		y := v_0.Args[1]
 23760  		x := v_0.Args[0]
 23761  		v.Reset(ssaop.OpARM64NotEqual)
 23762  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23763  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 23764  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64UMULH, typ.UInt64)
 23765  		v1.AddArg2(x, y)
 23766  		v0.AddArg(v1)
 23767  		v.AddArg(v0)
 23768  		return true
 23769  	}
 23770  	return false
 23771  }
 23772  func rewriteValue_OpSelectN(v *ssa.Value) bool {
 23773  	v_0 := v.Args[0]
 23774  	b := v.Block
 23775  	config := b.Func.Config
 23776  	// match: (SelectN [0] call:(CALLstatic {sym} s1:(MOVDstore _ (MOVDconst [sz]) s2:(MOVDstore _ src s3:(MOVDstore {t} _ dst mem)))))
 23777  	// cond: sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(s1, s2, s3, call)
 23778  	// result: (Move [sz] dst src mem)
 23779  	for {
 23780  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 23781  			break
 23782  		}
 23783  		call := v_0
 23784  		if call.Op != ssaop.OpARM64CALLstatic || len(call.Args) != 1 {
 23785  			break
 23786  		}
 23787  		sym := ssa.AuxToCall(call.Aux)
 23788  		s1 := call.Args[0]
 23789  		if s1.Op != ssaop.OpARM64MOVDstore {
 23790  			break
 23791  		}
 23792  		_ = s1.Args[2]
 23793  		s1_1 := s1.Args[1]
 23794  		if s1_1.Op != ssaop.OpARM64MOVDconst {
 23795  			break
 23796  		}
 23797  		sz := ssa.AuxIntToInt64(s1_1.AuxInt)
 23798  		s2 := s1.Args[2]
 23799  		if s2.Op != ssaop.OpARM64MOVDstore {
 23800  			break
 23801  		}
 23802  		_ = s2.Args[2]
 23803  		src := s2.Args[1]
 23804  		s3 := s2.Args[2]
 23805  		if s3.Op != ssaop.OpARM64MOVDstore {
 23806  			break
 23807  		}
 23808  		mem := s3.Args[2]
 23809  		dst := s3.Args[1]
 23810  		if !(sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && s1.Uses == 1 && s2.Uses == 1 && s3.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(s1, s2, s3, call)) {
 23811  			break
 23812  		}
 23813  		v.Reset(ssaop.OpMove)
 23814  		v.AuxInt = ssa.Int64ToAuxInt(sz)
 23815  		v.AddArg3(dst, src, mem)
 23816  		return true
 23817  	}
 23818  	// match: (SelectN [0] call:(CALLstatic {sym} dst src (MOVDconst [sz]) mem))
 23819  	// cond: sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && call.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(call)
 23820  	// result: (Move [sz] dst src mem)
 23821  	for {
 23822  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 23823  			break
 23824  		}
 23825  		call := v_0
 23826  		if call.Op != ssaop.OpARM64CALLstatic || len(call.Args) != 4 {
 23827  			break
 23828  		}
 23829  		sym := ssa.AuxToCall(call.Aux)
 23830  		mem := call.Args[3]
 23831  		dst := call.Args[0]
 23832  		src := call.Args[1]
 23833  		call_2 := call.Args[2]
 23834  		if call_2.Op != ssaop.OpARM64MOVDconst {
 23835  			break
 23836  		}
 23837  		sz := ssa.AuxIntToInt64(call_2.AuxInt)
 23838  		if !(sz >= 0 && ssa.IsSameCall(sym, "runtime.memmove") && call.Uses == 1 && ssa.IsInlinableMemmove(dst, src, sz, config) && ssa.Clobber(call)) {
 23839  			break
 23840  		}
 23841  		v.Reset(ssaop.OpMove)
 23842  		v.AuxInt = ssa.Int64ToAuxInt(sz)
 23843  		v.AddArg3(dst, src, mem)
 23844  		return true
 23845  	}
 23846  	return false
 23847  }
 23848  func rewriteValue_OpShiftAllLeftInt16x8(v *ssa.Value) bool {
 23849  	v_1 := v.Args[1]
 23850  	v_0 := v.Args[0]
 23851  	b := v.Block
 23852  	typ := &b.Func.Config.Types
 23853  	// match: (ShiftAllLeftInt16x8 x y)
 23854  	// result: (VSSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23855  	for {
 23856  		x := v_0
 23857  		y := v_1
 23858  		v.Reset(ssaop.OpARM64VSSHL8H)
 23859  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 23860  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23861  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 23862  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23863  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23864  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23865  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23866  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23867  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23868  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23869  		v4.AddArg(y)
 23870  		v2.AddArg3(y, v3, v4)
 23871  		v1.AddArg2(x, v2)
 23872  		v0.AddArg(v1)
 23873  		v.AddArg2(x, v0)
 23874  		return true
 23875  	}
 23876  }
 23877  func rewriteValue_OpShiftAllLeftInt32x4(v *ssa.Value) bool {
 23878  	v_1 := v.Args[1]
 23879  	v_0 := v.Args[0]
 23880  	b := v.Block
 23881  	typ := &b.Func.Config.Types
 23882  	// match: (ShiftAllLeftInt32x4 x y)
 23883  	// result: (VSSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23884  	for {
 23885  		x := v_0
 23886  		y := v_1
 23887  		v.Reset(ssaop.OpARM64VSSHL4S)
 23888  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 23889  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23890  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 23891  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23892  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23893  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23894  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23895  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23896  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23897  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23898  		v4.AddArg(y)
 23899  		v2.AddArg3(y, v3, v4)
 23900  		v1.AddArg2(x, v2)
 23901  		v0.AddArg(v1)
 23902  		v.AddArg2(x, v0)
 23903  		return true
 23904  	}
 23905  }
 23906  func rewriteValue_OpShiftAllLeftInt64x2(v *ssa.Value) bool {
 23907  	v_1 := v.Args[1]
 23908  	v_0 := v.Args[0]
 23909  	b := v.Block
 23910  	typ := &b.Func.Config.Types
 23911  	// match: (ShiftAllLeftInt64x2 x y)
 23912  	// result: (VSSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23913  	for {
 23914  		x := v_0
 23915  		y := v_1
 23916  		v.Reset(ssaop.OpARM64VSSHL2D)
 23917  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 23918  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23919  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 23920  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23921  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23922  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23923  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23924  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23925  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23926  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23927  		v4.AddArg(y)
 23928  		v2.AddArg3(y, v3, v4)
 23929  		v1.AddArg2(x, v2)
 23930  		v0.AddArg(v1)
 23931  		v.AddArg2(x, v0)
 23932  		return true
 23933  	}
 23934  }
 23935  func rewriteValue_OpShiftAllLeftInt8x16(v *ssa.Value) bool {
 23936  	v_1 := v.Args[1]
 23937  	v_0 := v.Args[0]
 23938  	b := v.Block
 23939  	typ := &b.Func.Config.Types
 23940  	// match: (ShiftAllLeftInt8x16 x y)
 23941  	// result: (VSSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23942  	for {
 23943  		x := v_0
 23944  		y := v_1
 23945  		v.Reset(ssaop.OpARM64VSSHL16B)
 23946  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 23947  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23948  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 23949  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23950  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23951  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23952  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23953  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23954  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23955  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23956  		v4.AddArg(y)
 23957  		v2.AddArg3(y, v3, v4)
 23958  		v1.AddArg2(x, v2)
 23959  		v0.AddArg(v1)
 23960  		v.AddArg2(x, v0)
 23961  		return true
 23962  	}
 23963  }
 23964  func rewriteValue_OpShiftAllLeftUint16x8(v *ssa.Value) bool {
 23965  	v_1 := v.Args[1]
 23966  	v_0 := v.Args[0]
 23967  	b := v.Block
 23968  	typ := &b.Func.Config.Types
 23969  	// match: (ShiftAllLeftUint16x8 x y)
 23970  	// result: (VUSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 23971  	for {
 23972  		x := v_0
 23973  		y := v_1
 23974  		v.Reset(ssaop.OpARM64VUSHL8H)
 23975  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 23976  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 23977  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 23978  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 23979  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 23980  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 23981  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 23982  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 23983  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 23984  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 23985  		v4.AddArg(y)
 23986  		v2.AddArg3(y, v3, v4)
 23987  		v1.AddArg2(x, v2)
 23988  		v0.AddArg(v1)
 23989  		v.AddArg2(x, v0)
 23990  		return true
 23991  	}
 23992  }
 23993  func rewriteValue_OpShiftAllLeftUint32x4(v *ssa.Value) bool {
 23994  	v_1 := v.Args[1]
 23995  	v_0 := v.Args[0]
 23996  	b := v.Block
 23997  	typ := &b.Func.Config.Types
 23998  	// match: (ShiftAllLeftUint32x4 x y)
 23999  	// result: (VUSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 24000  	for {
 24001  		x := v_0
 24002  		y := v_1
 24003  		v.Reset(ssaop.OpARM64VUSHL4S)
 24004  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 24005  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24006  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 24007  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24008  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24009  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24010  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24011  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 24012  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24013  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24014  		v4.AddArg(y)
 24015  		v2.AddArg3(y, v3, v4)
 24016  		v1.AddArg2(x, v2)
 24017  		v0.AddArg(v1)
 24018  		v.AddArg2(x, v0)
 24019  		return true
 24020  	}
 24021  }
 24022  func rewriteValue_OpShiftAllLeftUint64x2(v *ssa.Value) bool {
 24023  	v_1 := v.Args[1]
 24024  	v_0 := v.Args[0]
 24025  	b := v.Block
 24026  	typ := &b.Func.Config.Types
 24027  	// match: (ShiftAllLeftUint64x2 x y)
 24028  	// result: (VUSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 24029  	for {
 24030  		x := v_0
 24031  		y := v_1
 24032  		v.Reset(ssaop.OpARM64VUSHL2D)
 24033  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 24034  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24035  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 24036  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24037  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24038  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24039  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24040  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 24041  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24042  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24043  		v4.AddArg(y)
 24044  		v2.AddArg3(y, v3, v4)
 24045  		v1.AddArg2(x, v2)
 24046  		v0.AddArg(v1)
 24047  		v.AddArg2(x, v0)
 24048  		return true
 24049  	}
 24050  }
 24051  func rewriteValue_OpShiftAllLeftUint8x16(v *ssa.Value) bool {
 24052  	v_1 := v.Args[1]
 24053  	v_0 := v.Args[0]
 24054  	b := v.Block
 24055  	typ := &b.Func.Config.Types
 24056  	// match: (ShiftAllLeftUint8x16 x y)
 24057  	// result: (VUSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y)))))
 24058  	for {
 24059  		x := v_0
 24060  		y := v_1
 24061  		v.Reset(ssaop.OpARM64VUSHL16B)
 24062  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 24063  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24064  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 24065  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24066  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24067  		v2.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24068  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24069  		v3.AuxInt = ssa.Int64ToAuxInt(127)
 24070  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24071  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24072  		v4.AddArg(y)
 24073  		v2.AddArg3(y, v3, v4)
 24074  		v1.AddArg2(x, v2)
 24075  		v0.AddArg(v1)
 24076  		v.AddArg2(x, v0)
 24077  		return true
 24078  	}
 24079  }
 24080  func rewriteValue_OpShiftAllRightInt16x8(v *ssa.Value) bool {
 24081  	v_1 := v.Args[1]
 24082  	v_0 := v.Args[0]
 24083  	b := v.Block
 24084  	typ := &b.Func.Config.Types
 24085  	// match: (ShiftAllRightInt16x8 x y)
 24086  	// result: (VSSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24087  	for {
 24088  		x := v_0
 24089  		y := v_1
 24090  		v.Reset(ssaop.OpARM64VSSHL8H)
 24091  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 24092  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24093  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 24094  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24095  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24096  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24097  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24098  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24099  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24100  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24101  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24102  		v5.AddArg(y)
 24103  		v3.AddArg3(y, v4, v5)
 24104  		v2.AddArg(v3)
 24105  		v1.AddArg2(x, v2)
 24106  		v0.AddArg(v1)
 24107  		v.AddArg2(x, v0)
 24108  		return true
 24109  	}
 24110  }
 24111  func rewriteValue_OpShiftAllRightInt32x4(v *ssa.Value) bool {
 24112  	v_1 := v.Args[1]
 24113  	v_0 := v.Args[0]
 24114  	b := v.Block
 24115  	typ := &b.Func.Config.Types
 24116  	// match: (ShiftAllRightInt32x4 x y)
 24117  	// result: (VSSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24118  	for {
 24119  		x := v_0
 24120  		y := v_1
 24121  		v.Reset(ssaop.OpARM64VSSHL4S)
 24122  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 24123  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24124  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 24125  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24126  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24127  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24128  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24129  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24130  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24131  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24132  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24133  		v5.AddArg(y)
 24134  		v3.AddArg3(y, v4, v5)
 24135  		v2.AddArg(v3)
 24136  		v1.AddArg2(x, v2)
 24137  		v0.AddArg(v1)
 24138  		v.AddArg2(x, v0)
 24139  		return true
 24140  	}
 24141  }
 24142  func rewriteValue_OpShiftAllRightInt64x2(v *ssa.Value) bool {
 24143  	v_1 := v.Args[1]
 24144  	v_0 := v.Args[0]
 24145  	b := v.Block
 24146  	typ := &b.Func.Config.Types
 24147  	// match: (ShiftAllRightInt64x2 x y)
 24148  	// result: (VSSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24149  	for {
 24150  		x := v_0
 24151  		y := v_1
 24152  		v.Reset(ssaop.OpARM64VSSHL2D)
 24153  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 24154  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24155  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 24156  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24157  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24158  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24159  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24160  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24161  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24162  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24163  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24164  		v5.AddArg(y)
 24165  		v3.AddArg3(y, v4, v5)
 24166  		v2.AddArg(v3)
 24167  		v1.AddArg2(x, v2)
 24168  		v0.AddArg(v1)
 24169  		v.AddArg2(x, v0)
 24170  		return true
 24171  	}
 24172  }
 24173  func rewriteValue_OpShiftAllRightInt8x16(v *ssa.Value) bool {
 24174  	v_1 := v.Args[1]
 24175  	v_0 := v.Args[0]
 24176  	b := v.Block
 24177  	typ := &b.Func.Config.Types
 24178  	// match: (ShiftAllRightInt8x16 x y)
 24179  	// result: (VSSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24180  	for {
 24181  		x := v_0
 24182  		y := v_1
 24183  		v.Reset(ssaop.OpARM64VSSHL16B)
 24184  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 24185  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24186  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 24187  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24188  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24189  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24190  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24191  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24192  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24193  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24194  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24195  		v5.AddArg(y)
 24196  		v3.AddArg3(y, v4, v5)
 24197  		v2.AddArg(v3)
 24198  		v1.AddArg2(x, v2)
 24199  		v0.AddArg(v1)
 24200  		v.AddArg2(x, v0)
 24201  		return true
 24202  	}
 24203  }
 24204  func rewriteValue_OpShiftAllRightUint16x8(v *ssa.Value) bool {
 24205  	v_1 := v.Args[1]
 24206  	v_0 := v.Args[0]
 24207  	b := v.Block
 24208  	typ := &b.Func.Config.Types
 24209  	// match: (ShiftAllRightUint16x8 x y)
 24210  	// result: (VUSHL8H x (VDUPHbcast [0] (VMOVHins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24211  	for {
 24212  		x := v_0
 24213  		y := v_1
 24214  		v.Reset(ssaop.OpARM64VUSHL8H)
 24215  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPHbcast, typ.Vec128)
 24216  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24217  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVHins, typ.Vec128)
 24218  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24219  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24220  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24221  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24222  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24223  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24224  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24225  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24226  		v5.AddArg(y)
 24227  		v3.AddArg3(y, v4, v5)
 24228  		v2.AddArg(v3)
 24229  		v1.AddArg2(x, v2)
 24230  		v0.AddArg(v1)
 24231  		v.AddArg2(x, v0)
 24232  		return true
 24233  	}
 24234  }
 24235  func rewriteValue_OpShiftAllRightUint32x4(v *ssa.Value) bool {
 24236  	v_1 := v.Args[1]
 24237  	v_0 := v.Args[0]
 24238  	b := v.Block
 24239  	typ := &b.Func.Config.Types
 24240  	// match: (ShiftAllRightUint32x4 x y)
 24241  	// result: (VUSHL4S x (VDUPSbcast [0] (VMOVSins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24242  	for {
 24243  		x := v_0
 24244  		y := v_1
 24245  		v.Reset(ssaop.OpARM64VUSHL4S)
 24246  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPSbcast, typ.Vec128)
 24247  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24248  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVSins, typ.Vec128)
 24249  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24250  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24251  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24252  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24253  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24254  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24255  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24256  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24257  		v5.AddArg(y)
 24258  		v3.AddArg3(y, v4, v5)
 24259  		v2.AddArg(v3)
 24260  		v1.AddArg2(x, v2)
 24261  		v0.AddArg(v1)
 24262  		v.AddArg2(x, v0)
 24263  		return true
 24264  	}
 24265  }
 24266  func rewriteValue_OpShiftAllRightUint64x2(v *ssa.Value) bool {
 24267  	v_1 := v.Args[1]
 24268  	v_0 := v.Args[0]
 24269  	b := v.Block
 24270  	typ := &b.Func.Config.Types
 24271  	// match: (ShiftAllRightUint64x2 x y)
 24272  	// result: (VUSHL2D x (VDUPDbcast [0] (VMOVDins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24273  	for {
 24274  		x := v_0
 24275  		y := v_1
 24276  		v.Reset(ssaop.OpARM64VUSHL2D)
 24277  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPDbcast, typ.Vec128)
 24278  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24279  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVDins, typ.Vec128)
 24280  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24281  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24282  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24283  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24284  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24285  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24286  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24287  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24288  		v5.AddArg(y)
 24289  		v3.AddArg3(y, v4, v5)
 24290  		v2.AddArg(v3)
 24291  		v1.AddArg2(x, v2)
 24292  		v0.AddArg(v1)
 24293  		v.AddArg2(x, v0)
 24294  		return true
 24295  	}
 24296  }
 24297  func rewriteValue_OpShiftAllRightUint8x16(v *ssa.Value) bool {
 24298  	v_1 := v.Args[1]
 24299  	v_0 := v.Args[0]
 24300  	b := v.Block
 24301  	typ := &b.Func.Config.Types
 24302  	// match: (ShiftAllRightUint8x16 x y)
 24303  	// result: (VUSHL16B x (VDUPBbcast [0] (VMOVBins [0] x (NEG <typ.Int64> (CSEL <typ.UInt64> [ssaop.OpARM64LessThanU] y (MOVDconst [127]) (CMPconst [127] y))))))
 24304  	for {
 24305  		x := v_0
 24306  		y := v_1
 24307  		v.Reset(ssaop.OpARM64VUSHL16B)
 24308  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64VDUPBbcast, typ.Vec128)
 24309  		v0.AuxInt = ssa.Uint8ToAuxInt(0)
 24310  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64VMOVBins, typ.Vec128)
 24311  		v1.AuxInt = ssa.Uint8ToAuxInt(0)
 24312  		v2 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, typ.Int64)
 24313  		v3 := b.NewValue0(v.Pos, ssaop.OpARM64CSEL, typ.UInt64)
 24314  		v3.AuxInt = ssa.OpToAuxInt(ssaop.OpARM64LessThanU)
 24315  		v4 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24316  		v4.AuxInt = ssa.Int64ToAuxInt(127)
 24317  		v5 := b.NewValue0(v.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 24318  		v5.AuxInt = ssa.Int64ToAuxInt(127)
 24319  		v5.AddArg(y)
 24320  		v3.AddArg3(y, v4, v5)
 24321  		v2.AddArg(v3)
 24322  		v1.AddArg2(x, v2)
 24323  		v0.AddArg(v1)
 24324  		v.AddArg2(x, v0)
 24325  		return true
 24326  	}
 24327  }
 24328  func rewriteValue_OpSlicemask(v *ssa.Value) bool {
 24329  	v_0 := v.Args[0]
 24330  	b := v.Block
 24331  	// match: (Slicemask <t> x)
 24332  	// result: (SRAconst (NEG <t> x) [63])
 24333  	for {
 24334  		t := v.Type
 24335  		x := v_0
 24336  		v.Reset(ssaop.OpARM64SRAconst)
 24337  		v.AuxInt = ssa.Int64ToAuxInt(63)
 24338  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64NEG, t)
 24339  		v0.AddArg(x)
 24340  		v.AddArg(v0)
 24341  		return true
 24342  	}
 24343  }
 24344  func rewriteValue_OpStore(v *ssa.Value) bool {
 24345  	v_2 := v.Args[2]
 24346  	v_1 := v.Args[1]
 24347  	v_0 := v.Args[0]
 24348  	// match: (Store {t} ptr val mem)
 24349  	// cond: t.Size() == 1
 24350  	// result: (MOVBstore ptr val mem)
 24351  	for {
 24352  		t := ssa.AuxToType(v.Aux)
 24353  		ptr := v_0
 24354  		val := v_1
 24355  		mem := v_2
 24356  		if !(t.Size() == 1) {
 24357  			break
 24358  		}
 24359  		v.Reset(ssaop.OpARM64MOVBstore)
 24360  		v.AddArg3(ptr, val, mem)
 24361  		return true
 24362  	}
 24363  	// match: (Store {t} ptr val mem)
 24364  	// cond: t.Size() == 2
 24365  	// result: (MOVHstore ptr val mem)
 24366  	for {
 24367  		t := ssa.AuxToType(v.Aux)
 24368  		ptr := v_0
 24369  		val := v_1
 24370  		mem := v_2
 24371  		if !(t.Size() == 2) {
 24372  			break
 24373  		}
 24374  		v.Reset(ssaop.OpARM64MOVHstore)
 24375  		v.AddArg3(ptr, val, mem)
 24376  		return true
 24377  	}
 24378  	// match: (Store {t} ptr val mem)
 24379  	// cond: t.Size() == 4 && !t.IsFloat()
 24380  	// result: (MOVWstore ptr val mem)
 24381  	for {
 24382  		t := ssa.AuxToType(v.Aux)
 24383  		ptr := v_0
 24384  		val := v_1
 24385  		mem := v_2
 24386  		if !(t.Size() == 4 && !t.IsFloat()) {
 24387  			break
 24388  		}
 24389  		v.Reset(ssaop.OpARM64MOVWstore)
 24390  		v.AddArg3(ptr, val, mem)
 24391  		return true
 24392  	}
 24393  	// match: (Store {t} ptr val mem)
 24394  	// cond: t.Size() == 8 && !t.IsFloat() && !t.IsSIMD()
 24395  	// result: (MOVDstore ptr val mem)
 24396  	for {
 24397  		t := ssa.AuxToType(v.Aux)
 24398  		ptr := v_0
 24399  		val := v_1
 24400  		mem := v_2
 24401  		if !(t.Size() == 8 && !t.IsFloat() && !t.IsSIMD()) {
 24402  			break
 24403  		}
 24404  		v.Reset(ssaop.OpARM64MOVDstore)
 24405  		v.AddArg3(ptr, val, mem)
 24406  		return true
 24407  	}
 24408  	// match: (Store {t} ptr val mem)
 24409  	// cond: t.Size() == 4 && t.IsFloat()
 24410  	// result: (FMOVSstore ptr val mem)
 24411  	for {
 24412  		t := ssa.AuxToType(v.Aux)
 24413  		ptr := v_0
 24414  		val := v_1
 24415  		mem := v_2
 24416  		if !(t.Size() == 4 && t.IsFloat()) {
 24417  			break
 24418  		}
 24419  		v.Reset(ssaop.OpARM64FMOVSstore)
 24420  		v.AddArg3(ptr, val, mem)
 24421  		return true
 24422  	}
 24423  	// match: (Store {t} ptr val mem)
 24424  	// cond: t.Size() == 8 && t.IsFloat()
 24425  	// result: (FMOVDstore ptr val mem)
 24426  	for {
 24427  		t := ssa.AuxToType(v.Aux)
 24428  		ptr := v_0
 24429  		val := v_1
 24430  		mem := v_2
 24431  		if !(t.Size() == 8 && t.IsFloat()) {
 24432  			break
 24433  		}
 24434  		v.Reset(ssaop.OpARM64FMOVDstore)
 24435  		v.AddArg3(ptr, val, mem)
 24436  		return true
 24437  	}
 24438  	// match: (Store {t} ptr val mem)
 24439  	// cond: t.Size() == 16
 24440  	// result: (FMOVQstore ptr val mem)
 24441  	for {
 24442  		t := ssa.AuxToType(v.Aux)
 24443  		ptr := v_0
 24444  		val := v_1
 24445  		mem := v_2
 24446  		if !(t.Size() == 16) {
 24447  			break
 24448  		}
 24449  		v.Reset(ssaop.OpARM64FMOVQstore)
 24450  		v.AddArg3(ptr, val, mem)
 24451  		return true
 24452  	}
 24453  	// match: (Store {t} ptr val mem)
 24454  	// cond: t.Size() == 32 && t.IsSIMD()
 24455  	// result: (ZSTRstore ptr val mem)
 24456  	for {
 24457  		t := ssa.AuxToType(v.Aux)
 24458  		ptr := v_0
 24459  		val := v_1
 24460  		mem := v_2
 24461  		if !(t.Size() == 32 && t.IsSIMD()) {
 24462  			break
 24463  		}
 24464  		v.Reset(ssaop.OpARM64ZSTRstore)
 24465  		v.AddArg3(ptr, val, mem)
 24466  		return true
 24467  	}
 24468  	// match: (Store {t} ptr val mem)
 24469  	// cond: t.Size() == 8 && t.IsSIMD()
 24470  	// result: (PSTRstore ptr val mem)
 24471  	for {
 24472  		t := ssa.AuxToType(v.Aux)
 24473  		ptr := v_0
 24474  		val := v_1
 24475  		mem := v_2
 24476  		if !(t.Size() == 8 && t.IsSIMD()) {
 24477  			break
 24478  		}
 24479  		v.Reset(ssaop.OpARM64PSTRstore)
 24480  		v.AddArg3(ptr, val, mem)
 24481  		return true
 24482  	}
 24483  	return false
 24484  }
 24485  func rewriteValue_OpStoreMasked8(v *ssa.Value) bool {
 24486  	v_3 := v.Args[3]
 24487  	v_2 := v.Args[2]
 24488  	v_1 := v.Args[1]
 24489  	v_0 := v.Args[0]
 24490  	// match: (StoreMasked8 {t} ptr mask val mem)
 24491  	// cond: t.Size() == 32
 24492  	// result: (ZST1BPredstore ptr val mask mem)
 24493  	for {
 24494  		t := ssa.AuxToType(v.Aux)
 24495  		ptr := v_0
 24496  		mask := v_1
 24497  		val := v_2
 24498  		mem := v_3
 24499  		if !(t.Size() == 32) {
 24500  			break
 24501  		}
 24502  		v.Reset(ssaop.OpARM64ZST1BPredstore)
 24503  		v.AddArg4(ptr, val, mask, mem)
 24504  		return true
 24505  	}
 24506  	return false
 24507  }
 24508  func rewriteValue_OpZero(v *ssa.Value) bool {
 24509  	v_1 := v.Args[1]
 24510  	v_0 := v.Args[0]
 24511  	b := v.Block
 24512  	typ := &b.Func.Config.Types
 24513  	// match: (Zero [0] _ mem)
 24514  	// result: mem
 24515  	for {
 24516  		if ssa.AuxIntToInt64(v.AuxInt) != 0 {
 24517  			break
 24518  		}
 24519  		mem := v_1
 24520  		v.CopyOf(mem)
 24521  		return true
 24522  	}
 24523  	// match: (Zero [1] ptr mem)
 24524  	// result: (MOVBstore ptr (MOVDconst [0]) mem)
 24525  	for {
 24526  		if ssa.AuxIntToInt64(v.AuxInt) != 1 {
 24527  			break
 24528  		}
 24529  		ptr := v_0
 24530  		mem := v_1
 24531  		v.Reset(ssaop.OpARM64MOVBstore)
 24532  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24533  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24534  		v.AddArg3(ptr, v0, mem)
 24535  		return true
 24536  	}
 24537  	// match: (Zero [2] ptr mem)
 24538  	// result: (MOVHstore ptr (MOVDconst [0]) mem)
 24539  	for {
 24540  		if ssa.AuxIntToInt64(v.AuxInt) != 2 {
 24541  			break
 24542  		}
 24543  		ptr := v_0
 24544  		mem := v_1
 24545  		v.Reset(ssaop.OpARM64MOVHstore)
 24546  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24547  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24548  		v.AddArg3(ptr, v0, mem)
 24549  		return true
 24550  	}
 24551  	// match: (Zero [4] ptr mem)
 24552  	// result: (MOVWstore ptr (MOVDconst [0]) mem)
 24553  	for {
 24554  		if ssa.AuxIntToInt64(v.AuxInt) != 4 {
 24555  			break
 24556  		}
 24557  		ptr := v_0
 24558  		mem := v_1
 24559  		v.Reset(ssaop.OpARM64MOVWstore)
 24560  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24561  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24562  		v.AddArg3(ptr, v0, mem)
 24563  		return true
 24564  	}
 24565  	// match: (Zero [3] ptr mem)
 24566  	// result: (MOVBstore [2] ptr (MOVDconst [0]) (MOVHstore ptr (MOVDconst [0]) mem))
 24567  	for {
 24568  		if ssa.AuxIntToInt64(v.AuxInt) != 3 {
 24569  			break
 24570  		}
 24571  		ptr := v_0
 24572  		mem := v_1
 24573  		v.Reset(ssaop.OpARM64MOVBstore)
 24574  		v.AuxInt = ssa.Int32ToAuxInt(2)
 24575  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24576  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24577  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVHstore, types.TypeMem)
 24578  		v1.AddArg3(ptr, v0, mem)
 24579  		v.AddArg3(ptr, v0, v1)
 24580  		return true
 24581  	}
 24582  	// match: (Zero [5] ptr mem)
 24583  	// result: (MOVBstore [4] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 24584  	for {
 24585  		if ssa.AuxIntToInt64(v.AuxInt) != 5 {
 24586  			break
 24587  		}
 24588  		ptr := v_0
 24589  		mem := v_1
 24590  		v.Reset(ssaop.OpARM64MOVBstore)
 24591  		v.AuxInt = ssa.Int32ToAuxInt(4)
 24592  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24593  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24594  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 24595  		v1.AddArg3(ptr, v0, mem)
 24596  		v.AddArg3(ptr, v0, v1)
 24597  		return true
 24598  	}
 24599  	// match: (Zero [6] ptr mem)
 24600  	// result: (MOVHstore [4] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 24601  	for {
 24602  		if ssa.AuxIntToInt64(v.AuxInt) != 6 {
 24603  			break
 24604  		}
 24605  		ptr := v_0
 24606  		mem := v_1
 24607  		v.Reset(ssaop.OpARM64MOVHstore)
 24608  		v.AuxInt = ssa.Int32ToAuxInt(4)
 24609  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24610  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24611  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 24612  		v1.AddArg3(ptr, v0, mem)
 24613  		v.AddArg3(ptr, v0, v1)
 24614  		return true
 24615  	}
 24616  	// match: (Zero [7] ptr mem)
 24617  	// result: (MOVWstore [3] ptr (MOVDconst [0]) (MOVWstore ptr (MOVDconst [0]) mem))
 24618  	for {
 24619  		if ssa.AuxIntToInt64(v.AuxInt) != 7 {
 24620  			break
 24621  		}
 24622  		ptr := v_0
 24623  		mem := v_1
 24624  		v.Reset(ssaop.OpARM64MOVWstore)
 24625  		v.AuxInt = ssa.Int32ToAuxInt(3)
 24626  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24627  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24628  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVWstore, types.TypeMem)
 24629  		v1.AddArg3(ptr, v0, mem)
 24630  		v.AddArg3(ptr, v0, v1)
 24631  		return true
 24632  	}
 24633  	// match: (Zero [8] ptr mem)
 24634  	// result: (MOVDstore ptr (MOVDconst [0]) mem)
 24635  	for {
 24636  		if ssa.AuxIntToInt64(v.AuxInt) != 8 {
 24637  			break
 24638  		}
 24639  		ptr := v_0
 24640  		mem := v_1
 24641  		v.Reset(ssaop.OpARM64MOVDstore)
 24642  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24643  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24644  		v.AddArg3(ptr, v0, mem)
 24645  		return true
 24646  	}
 24647  	// match: (Zero [9] ptr mem)
 24648  	// result: (MOVBstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24649  	for {
 24650  		if ssa.AuxIntToInt64(v.AuxInt) != 9 {
 24651  			break
 24652  		}
 24653  		ptr := v_0
 24654  		mem := v_1
 24655  		v.Reset(ssaop.OpARM64MOVBstore)
 24656  		v.AuxInt = ssa.Int32ToAuxInt(8)
 24657  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24658  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24659  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24660  		v1.AddArg3(ptr, v0, mem)
 24661  		v.AddArg3(ptr, v0, v1)
 24662  		return true
 24663  	}
 24664  	// match: (Zero [10] ptr mem)
 24665  	// result: (MOVHstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24666  	for {
 24667  		if ssa.AuxIntToInt64(v.AuxInt) != 10 {
 24668  			break
 24669  		}
 24670  		ptr := v_0
 24671  		mem := v_1
 24672  		v.Reset(ssaop.OpARM64MOVHstore)
 24673  		v.AuxInt = ssa.Int32ToAuxInt(8)
 24674  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24675  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24676  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24677  		v1.AddArg3(ptr, v0, mem)
 24678  		v.AddArg3(ptr, v0, v1)
 24679  		return true
 24680  	}
 24681  	// match: (Zero [11] ptr mem)
 24682  	// result: (MOVDstore [3] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24683  	for {
 24684  		if ssa.AuxIntToInt64(v.AuxInt) != 11 {
 24685  			break
 24686  		}
 24687  		ptr := v_0
 24688  		mem := v_1
 24689  		v.Reset(ssaop.OpARM64MOVDstore)
 24690  		v.AuxInt = ssa.Int32ToAuxInt(3)
 24691  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24692  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24693  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24694  		v1.AddArg3(ptr, v0, mem)
 24695  		v.AddArg3(ptr, v0, v1)
 24696  		return true
 24697  	}
 24698  	// match: (Zero [12] ptr mem)
 24699  	// result: (MOVWstore [8] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24700  	for {
 24701  		if ssa.AuxIntToInt64(v.AuxInt) != 12 {
 24702  			break
 24703  		}
 24704  		ptr := v_0
 24705  		mem := v_1
 24706  		v.Reset(ssaop.OpARM64MOVWstore)
 24707  		v.AuxInt = ssa.Int32ToAuxInt(8)
 24708  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24709  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24710  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24711  		v1.AddArg3(ptr, v0, mem)
 24712  		v.AddArg3(ptr, v0, v1)
 24713  		return true
 24714  	}
 24715  	// match: (Zero [13] ptr mem)
 24716  	// result: (MOVDstore [5] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24717  	for {
 24718  		if ssa.AuxIntToInt64(v.AuxInt) != 13 {
 24719  			break
 24720  		}
 24721  		ptr := v_0
 24722  		mem := v_1
 24723  		v.Reset(ssaop.OpARM64MOVDstore)
 24724  		v.AuxInt = ssa.Int32ToAuxInt(5)
 24725  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24726  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24727  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24728  		v1.AddArg3(ptr, v0, mem)
 24729  		v.AddArg3(ptr, v0, v1)
 24730  		return true
 24731  	}
 24732  	// match: (Zero [14] ptr mem)
 24733  	// result: (MOVDstore [6] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24734  	for {
 24735  		if ssa.AuxIntToInt64(v.AuxInt) != 14 {
 24736  			break
 24737  		}
 24738  		ptr := v_0
 24739  		mem := v_1
 24740  		v.Reset(ssaop.OpARM64MOVDstore)
 24741  		v.AuxInt = ssa.Int32ToAuxInt(6)
 24742  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24743  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24744  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24745  		v1.AddArg3(ptr, v0, mem)
 24746  		v.AddArg3(ptr, v0, v1)
 24747  		return true
 24748  	}
 24749  	// match: (Zero [15] ptr mem)
 24750  	// result: (MOVDstore [7] ptr (MOVDconst [0]) (MOVDstore ptr (MOVDconst [0]) mem))
 24751  	for {
 24752  		if ssa.AuxIntToInt64(v.AuxInt) != 15 {
 24753  			break
 24754  		}
 24755  		ptr := v_0
 24756  		mem := v_1
 24757  		v.Reset(ssaop.OpARM64MOVDstore)
 24758  		v.AuxInt = ssa.Int32ToAuxInt(7)
 24759  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24760  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24761  		v1 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDstore, types.TypeMem)
 24762  		v1.AddArg3(ptr, v0, mem)
 24763  		v.AddArg3(ptr, v0, v1)
 24764  		return true
 24765  	}
 24766  	// match: (Zero [16] ptr mem)
 24767  	// result: (STP [0] ptr (MOVDconst [0]) (MOVDconst [0]) mem)
 24768  	for {
 24769  		if ssa.AuxIntToInt64(v.AuxInt) != 16 {
 24770  			break
 24771  		}
 24772  		ptr := v_0
 24773  		mem := v_1
 24774  		v.Reset(ssaop.OpARM64STP)
 24775  		v.AuxInt = ssa.Int32ToAuxInt(0)
 24776  		v0 := b.NewValue0(v.Pos, ssaop.OpARM64MOVDconst, typ.UInt64)
 24777  		v0.AuxInt = ssa.Int64ToAuxInt(0)
 24778  		v.AddArg4(ptr, v0, v0, mem)
 24779  		return true
 24780  	}
 24781  	// match: (Zero [s] ptr mem)
 24782  	// cond: s > 16 && s < 192
 24783  	// result: (LoweredZero [s] ptr mem)
 24784  	for {
 24785  		s := ssa.AuxIntToInt64(v.AuxInt)
 24786  		ptr := v_0
 24787  		mem := v_1
 24788  		if !(s > 16 && s < 192) {
 24789  			break
 24790  		}
 24791  		v.Reset(ssaop.OpARM64LoweredZero)
 24792  		v.AuxInt = ssa.Int64ToAuxInt(s)
 24793  		v.AddArg2(ptr, mem)
 24794  		return true
 24795  	}
 24796  	// match: (Zero [s] ptr mem)
 24797  	// cond: s >= 192
 24798  	// result: (LoweredZeroLoop [s] ptr mem)
 24799  	for {
 24800  		s := ssa.AuxIntToInt64(v.AuxInt)
 24801  		ptr := v_0
 24802  		mem := v_1
 24803  		if !(s >= 192) {
 24804  			break
 24805  		}
 24806  		v.Reset(ssaop.OpARM64LoweredZeroLoop)
 24807  		v.AuxInt = ssa.Int64ToAuxInt(s)
 24808  		v.AddArg2(ptr, mem)
 24809  		return true
 24810  	}
 24811  	return false
 24812  }
 24813  func rewriteValue_OpZeroSIMD(v *ssa.Value) bool {
 24814  	// match: (ZeroSIMD <t>)
 24815  	// cond: t.Size() == 16
 24816  	// result: (VMOVI16B [0] <t>)
 24817  	for {
 24818  		t := v.Type
 24819  		if !(t.Size() == 16) {
 24820  			break
 24821  		}
 24822  		v.Reset(ssaop.OpARM64VMOVI16B)
 24823  		v.Type = t
 24824  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24825  		return true
 24826  	}
 24827  	// match: (ZeroSIMD <t>)
 24828  	// cond: t.Size() == 32 && t.IsSIMD()
 24829  	// result: (ZDUPBconst [0])
 24830  	for {
 24831  		t := v.Type
 24832  		if !(t.Size() == 32 && t.IsSIMD()) {
 24833  			break
 24834  		}
 24835  		v.Reset(ssaop.OpARM64ZDUPBconst)
 24836  		v.AuxInt = ssa.Int8ToAuxInt(0)
 24837  		return true
 24838  	}
 24839  	// match: (ZeroSIMD <t>)
 24840  	// cond: t.Size() == 8 && t.IsSIMD()
 24841  	// result: (PPFALSEB)
 24842  	for {
 24843  		t := v.Type
 24844  		if !(t.Size() == 8 && t.IsSIMD()) {
 24845  			break
 24846  		}
 24847  		v.Reset(ssaop.OpARM64PPFALSEB)
 24848  		return true
 24849  	}
 24850  	return false
 24851  }
 24852  func rewriteValue_Opbroadcast1To16Int8x16(v *ssa.Value) bool {
 24853  	v_0 := v.Args[0]
 24854  	// match: (broadcast1To16Int8x16 x)
 24855  	// result: (VDUPBbcast [0] x)
 24856  	for {
 24857  		x := v_0
 24858  		v.Reset(ssaop.OpARM64VDUPBbcast)
 24859  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24860  		v.AddArg(x)
 24861  		return true
 24862  	}
 24863  }
 24864  func rewriteValue_Opbroadcast1To16Uint8x16(v *ssa.Value) bool {
 24865  	v_0 := v.Args[0]
 24866  	// match: (broadcast1To16Uint8x16 x)
 24867  	// result: (VDUPBbcast [0] x)
 24868  	for {
 24869  		x := v_0
 24870  		v.Reset(ssaop.OpARM64VDUPBbcast)
 24871  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24872  		v.AddArg(x)
 24873  		return true
 24874  	}
 24875  }
 24876  func rewriteValue_Opbroadcast1To2Float64x2(v *ssa.Value) bool {
 24877  	v_0 := v.Args[0]
 24878  	// match: (broadcast1To2Float64x2 x)
 24879  	// result: (VDUPDbcast [0] x)
 24880  	for {
 24881  		x := v_0
 24882  		v.Reset(ssaop.OpARM64VDUPDbcast)
 24883  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24884  		v.AddArg(x)
 24885  		return true
 24886  	}
 24887  }
 24888  func rewriteValue_Opbroadcast1To2Int64x2(v *ssa.Value) bool {
 24889  	v_0 := v.Args[0]
 24890  	// match: (broadcast1To2Int64x2 x)
 24891  	// result: (VDUPDbcast [0] x)
 24892  	for {
 24893  		x := v_0
 24894  		v.Reset(ssaop.OpARM64VDUPDbcast)
 24895  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24896  		v.AddArg(x)
 24897  		return true
 24898  	}
 24899  }
 24900  func rewriteValue_Opbroadcast1To2Uint64x2(v *ssa.Value) bool {
 24901  	v_0 := v.Args[0]
 24902  	// match: (broadcast1To2Uint64x2 x)
 24903  	// result: (VDUPDbcast [0] x)
 24904  	for {
 24905  		x := v_0
 24906  		v.Reset(ssaop.OpARM64VDUPDbcast)
 24907  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24908  		v.AddArg(x)
 24909  		return true
 24910  	}
 24911  }
 24912  func rewriteValue_Opbroadcast1To4Float32x4(v *ssa.Value) bool {
 24913  	v_0 := v.Args[0]
 24914  	// match: (broadcast1To4Float32x4 x)
 24915  	// result: (VDUPSbcast [0] x)
 24916  	for {
 24917  		x := v_0
 24918  		v.Reset(ssaop.OpARM64VDUPSbcast)
 24919  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24920  		v.AddArg(x)
 24921  		return true
 24922  	}
 24923  }
 24924  func rewriteValue_Opbroadcast1To4Int32x4(v *ssa.Value) bool {
 24925  	v_0 := v.Args[0]
 24926  	// match: (broadcast1To4Int32x4 x)
 24927  	// result: (VDUPSbcast [0] x)
 24928  	for {
 24929  		x := v_0
 24930  		v.Reset(ssaop.OpARM64VDUPSbcast)
 24931  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24932  		v.AddArg(x)
 24933  		return true
 24934  	}
 24935  }
 24936  func rewriteValue_Opbroadcast1To4Uint32x4(v *ssa.Value) bool {
 24937  	v_0 := v.Args[0]
 24938  	// match: (broadcast1To4Uint32x4 x)
 24939  	// result: (VDUPSbcast [0] x)
 24940  	for {
 24941  		x := v_0
 24942  		v.Reset(ssaop.OpARM64VDUPSbcast)
 24943  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24944  		v.AddArg(x)
 24945  		return true
 24946  	}
 24947  }
 24948  func rewriteValue_Opbroadcast1To8Int16x8(v *ssa.Value) bool {
 24949  	v_0 := v.Args[0]
 24950  	// match: (broadcast1To8Int16x8 x)
 24951  	// result: (VDUPHbcast [0] x)
 24952  	for {
 24953  		x := v_0
 24954  		v.Reset(ssaop.OpARM64VDUPHbcast)
 24955  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24956  		v.AddArg(x)
 24957  		return true
 24958  	}
 24959  }
 24960  func rewriteValue_Opbroadcast1To8Uint16x8(v *ssa.Value) bool {
 24961  	v_0 := v.Args[0]
 24962  	// match: (broadcast1To8Uint16x8 x)
 24963  	// result: (VDUPHbcast [0] x)
 24964  	for {
 24965  		x := v_0
 24966  		v.Reset(ssaop.OpARM64VDUPHbcast)
 24967  		v.AuxInt = ssa.Uint8ToAuxInt(0)
 24968  		v.AddArg(x)
 24969  		return true
 24970  	}
 24971  }
 24972  func RewriteBlock(b *ssa.Block) bool {
 24973  	typ := &b.Func.Config.Types
 24974  	switch b.Kind {
 24975  	case block.BlockARM64EQ:
 24976  		// match: (EQ (CMPconst [0] z:(AND x y)) yes no)
 24977  		// cond: z.Uses == 1
 24978  		// result: (EQ (TST x y) yes no)
 24979  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 24980  			v_0 := b.Controls[0]
 24981  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 24982  				break
 24983  			}
 24984  			z := v_0.Args[0]
 24985  			if z.Op != ssaop.OpARM64AND {
 24986  				break
 24987  			}
 24988  			_ = z.Args[1]
 24989  			z_0 := z.Args[0]
 24990  			z_1 := z.Args[1]
 24991  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 24992  				x := z_0
 24993  				y := z_1
 24994  				if !(z.Uses == 1) {
 24995  					continue
 24996  				}
 24997  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 24998  				v0.AddArg2(x, y)
 24999  				b.ResetWithControl(block.BlockARM64EQ, v0)
 25000  				return true
 25001  			}
 25002  			break
 25003  		}
 25004  		// match: (EQ (CMPconst [0] x:(ANDconst [c] y)) yes no)
 25005  		// cond: x.Uses == 1
 25006  		// result: (EQ (TSTconst [c] y) yes no)
 25007  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25008  			v_0 := b.Controls[0]
 25009  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25010  				break
 25011  			}
 25012  			x := v_0.Args[0]
 25013  			if x.Op != ssaop.OpARM64ANDconst {
 25014  				break
 25015  			}
 25016  			c := ssa.AuxIntToInt64(x.AuxInt)
 25017  			y := x.Args[0]
 25018  			if !(x.Uses == 1) {
 25019  				break
 25020  			}
 25021  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 25022  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 25023  			v0.AddArg(y)
 25024  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25025  			return true
 25026  		}
 25027  		// match: (EQ (CMPWconst [0] z:(AND x y)) yes no)
 25028  		// cond: z.Uses == 1
 25029  		// result: (EQ (TSTW x y) yes no)
 25030  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25031  			v_0 := b.Controls[0]
 25032  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25033  				break
 25034  			}
 25035  			z := v_0.Args[0]
 25036  			if z.Op != ssaop.OpARM64AND {
 25037  				break
 25038  			}
 25039  			_ = z.Args[1]
 25040  			z_0 := z.Args[0]
 25041  			z_1 := z.Args[1]
 25042  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25043  				x := z_0
 25044  				y := z_1
 25045  				if !(z.Uses == 1) {
 25046  					continue
 25047  				}
 25048  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 25049  				v0.AddArg2(x, y)
 25050  				b.ResetWithControl(block.BlockARM64EQ, v0)
 25051  				return true
 25052  			}
 25053  			break
 25054  		}
 25055  		// match: (EQ (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 25056  		// cond: x.Uses == 1
 25057  		// result: (EQ (TSTWconst [int32(c)] y) yes no)
 25058  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25059  			v_0 := b.Controls[0]
 25060  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25061  				break
 25062  			}
 25063  			x := v_0.Args[0]
 25064  			if x.Op != ssaop.OpARM64ANDconst {
 25065  				break
 25066  			}
 25067  			c := ssa.AuxIntToInt64(x.AuxInt)
 25068  			y := x.Args[0]
 25069  			if !(x.Uses == 1) {
 25070  				break
 25071  			}
 25072  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 25073  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 25074  			v0.AddArg(y)
 25075  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25076  			return true
 25077  		}
 25078  		// match: (EQ (CMPconst [0] x:(ADDconst [c] y)) yes no)
 25079  		// cond: x.Uses == 1
 25080  		// result: (EQ (CMNconst [c] y) yes no)
 25081  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25082  			v_0 := b.Controls[0]
 25083  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25084  				break
 25085  			}
 25086  			x := v_0.Args[0]
 25087  			if x.Op != ssaop.OpARM64ADDconst {
 25088  				break
 25089  			}
 25090  			c := ssa.AuxIntToInt64(x.AuxInt)
 25091  			y := x.Args[0]
 25092  			if !(x.Uses == 1) {
 25093  				break
 25094  			}
 25095  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 25096  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 25097  			v0.AddArg(y)
 25098  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25099  			return true
 25100  		}
 25101  		// match: (EQ (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 25102  		// cond: x.Uses == 1
 25103  		// result: (EQ (CMNWconst [int32(c)] y) yes no)
 25104  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25105  			v_0 := b.Controls[0]
 25106  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25107  				break
 25108  			}
 25109  			x := v_0.Args[0]
 25110  			if x.Op != ssaop.OpARM64ADDconst {
 25111  				break
 25112  			}
 25113  			c := ssa.AuxIntToInt64(x.AuxInt)
 25114  			y := x.Args[0]
 25115  			if !(x.Uses == 1) {
 25116  				break
 25117  			}
 25118  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 25119  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 25120  			v0.AddArg(y)
 25121  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25122  			return true
 25123  		}
 25124  		// match: (EQ (CMPconst [0] z:(ADD x y)) yes no)
 25125  		// cond: z.Uses == 1
 25126  		// result: (EQ (CMN x y) yes no)
 25127  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25128  			v_0 := b.Controls[0]
 25129  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25130  				break
 25131  			}
 25132  			z := v_0.Args[0]
 25133  			if z.Op != ssaop.OpARM64ADD {
 25134  				break
 25135  			}
 25136  			_ = z.Args[1]
 25137  			z_0 := z.Args[0]
 25138  			z_1 := z.Args[1]
 25139  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25140  				x := z_0
 25141  				y := z_1
 25142  				if !(z.Uses == 1) {
 25143  					continue
 25144  				}
 25145  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25146  				v0.AddArg2(x, y)
 25147  				b.ResetWithControl(block.BlockARM64EQ, v0)
 25148  				return true
 25149  			}
 25150  			break
 25151  		}
 25152  		// match: (EQ (CMPWconst [0] z:(ADD x y)) yes no)
 25153  		// cond: z.Uses == 1
 25154  		// result: (EQ (CMNW x y) yes no)
 25155  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25156  			v_0 := b.Controls[0]
 25157  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25158  				break
 25159  			}
 25160  			z := v_0.Args[0]
 25161  			if z.Op != ssaop.OpARM64ADD {
 25162  				break
 25163  			}
 25164  			_ = z.Args[1]
 25165  			z_0 := z.Args[0]
 25166  			z_1 := z.Args[1]
 25167  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25168  				x := z_0
 25169  				y := z_1
 25170  				if !(z.Uses == 1) {
 25171  					continue
 25172  				}
 25173  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 25174  				v0.AddArg2(x, y)
 25175  				b.ResetWithControl(block.BlockARM64EQ, v0)
 25176  				return true
 25177  			}
 25178  			break
 25179  		}
 25180  		// match: (EQ (CMP x z:(NEG y)) yes no)
 25181  		// cond: z.Uses == 1
 25182  		// result: (EQ (CMN x y) yes no)
 25183  		for b.Controls[0].Op == ssaop.OpARM64CMP {
 25184  			v_0 := b.Controls[0]
 25185  			_ = v_0.Args[1]
 25186  			x := v_0.Args[0]
 25187  			z := v_0.Args[1]
 25188  			if z.Op != ssaop.OpARM64NEG {
 25189  				break
 25190  			}
 25191  			y := z.Args[0]
 25192  			if !(z.Uses == 1) {
 25193  				break
 25194  			}
 25195  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25196  			v0.AddArg2(x, y)
 25197  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25198  			return true
 25199  		}
 25200  		// match: (EQ (CMPW x z:(NEG y)) yes no)
 25201  		// cond: z.Uses == 1
 25202  		// result: (EQ (CMNW x y) yes no)
 25203  		for b.Controls[0].Op == ssaop.OpARM64CMPW {
 25204  			v_0 := b.Controls[0]
 25205  			_ = v_0.Args[1]
 25206  			x := v_0.Args[0]
 25207  			z := v_0.Args[1]
 25208  			if z.Op != ssaop.OpARM64NEG {
 25209  				break
 25210  			}
 25211  			y := z.Args[0]
 25212  			if !(z.Uses == 1) {
 25213  				break
 25214  			}
 25215  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 25216  			v0.AddArg2(x, y)
 25217  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25218  			return true
 25219  		}
 25220  		// match: (EQ (CMPconst [0] x) yes no)
 25221  		// result: (Z x yes no)
 25222  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25223  			v_0 := b.Controls[0]
 25224  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25225  				break
 25226  			}
 25227  			x := v_0.Args[0]
 25228  			b.ResetWithControl(block.BlockARM64Z, x)
 25229  			return true
 25230  		}
 25231  		// match: (EQ (CMPWconst [0] x) yes no)
 25232  		// result: (ZW x yes no)
 25233  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25234  			v_0 := b.Controls[0]
 25235  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25236  				break
 25237  			}
 25238  			x := v_0.Args[0]
 25239  			b.ResetWithControl(block.BlockARM64ZW, x)
 25240  			return true
 25241  		}
 25242  		// match: (EQ (CMPconst [0] z:(MADD a x y)) yes no)
 25243  		// cond: z.Uses==1
 25244  		// result: (EQ (CMN a (MUL <x.Type> x y)) yes no)
 25245  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25246  			v_0 := b.Controls[0]
 25247  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25248  				break
 25249  			}
 25250  			z := v_0.Args[0]
 25251  			if z.Op != ssaop.OpARM64MADD {
 25252  				break
 25253  			}
 25254  			y := z.Args[2]
 25255  			a := z.Args[0]
 25256  			x := z.Args[1]
 25257  			if !(z.Uses == 1) {
 25258  				break
 25259  			}
 25260  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25261  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 25262  			v1.AddArg2(x, y)
 25263  			v0.AddArg2(a, v1)
 25264  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25265  			return true
 25266  		}
 25267  		// match: (EQ (CMPWconst [0] z:(MADDW a x y)) yes no)
 25268  		// cond: z.Uses==1
 25269  		// result: (EQ (CMNW a (MULW <x.Type> x y)) yes no)
 25270  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25271  			v_0 := b.Controls[0]
 25272  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25273  				break
 25274  			}
 25275  			z := v_0.Args[0]
 25276  			if z.Op != ssaop.OpARM64MADDW {
 25277  				break
 25278  			}
 25279  			y := z.Args[2]
 25280  			a := z.Args[0]
 25281  			x := z.Args[1]
 25282  			if !(z.Uses == 1) {
 25283  				break
 25284  			}
 25285  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 25286  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 25287  			v1.AddArg2(x, y)
 25288  			v0.AddArg2(a, v1)
 25289  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25290  			return true
 25291  		}
 25292  		// match: (EQ (CMPconst [0] z:(MSUB a x y)) yes no)
 25293  		// cond: z.Uses==1
 25294  		// result: (EQ (CMP a (MUL <x.Type> x y)) yes no)
 25295  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25296  			v_0 := b.Controls[0]
 25297  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25298  				break
 25299  			}
 25300  			z := v_0.Args[0]
 25301  			if z.Op != ssaop.OpARM64MSUB {
 25302  				break
 25303  			}
 25304  			y := z.Args[2]
 25305  			a := z.Args[0]
 25306  			x := z.Args[1]
 25307  			if !(z.Uses == 1) {
 25308  				break
 25309  			}
 25310  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 25311  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 25312  			v1.AddArg2(x, y)
 25313  			v0.AddArg2(a, v1)
 25314  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25315  			return true
 25316  		}
 25317  		// match: (EQ (CMPWconst [0] z:(MSUBW a x y)) yes no)
 25318  		// cond: z.Uses==1
 25319  		// result: (EQ (CMPW a (MULW <x.Type> x y)) yes no)
 25320  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25321  			v_0 := b.Controls[0]
 25322  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25323  				break
 25324  			}
 25325  			z := v_0.Args[0]
 25326  			if z.Op != ssaop.OpARM64MSUBW {
 25327  				break
 25328  			}
 25329  			y := z.Args[2]
 25330  			a := z.Args[0]
 25331  			x := z.Args[1]
 25332  			if !(z.Uses == 1) {
 25333  				break
 25334  			}
 25335  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 25336  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 25337  			v1.AddArg2(x, y)
 25338  			v0.AddArg2(a, v1)
 25339  			b.ResetWithControl(block.BlockARM64EQ, v0)
 25340  			return true
 25341  		}
 25342  		// match: (EQ (TSTconst [c] x) yes no)
 25343  		// cond: ssa.OneBit(c)
 25344  		// result: (TBZ [int64(ssa.Ntz64(c))] x yes no)
 25345  		for b.Controls[0].Op == ssaop.OpARM64TSTconst {
 25346  			v_0 := b.Controls[0]
 25347  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 25348  			x := v_0.Args[0]
 25349  			if !(ssa.OneBit(c)) {
 25350  				break
 25351  			}
 25352  			b.ResetWithControl(block.BlockARM64TBZ, x)
 25353  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 25354  			return true
 25355  		}
 25356  		// match: (EQ (TSTWconst [c] x) yes no)
 25357  		// cond: ssa.OneBit(int64(uint32(c)))
 25358  		// result: (TBZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 25359  		for b.Controls[0].Op == ssaop.OpARM64TSTWconst {
 25360  			v_0 := b.Controls[0]
 25361  			c := ssa.AuxIntToInt32(v_0.AuxInt)
 25362  			x := v_0.Args[0]
 25363  			if !(ssa.OneBit(int64(uint32(c)))) {
 25364  				break
 25365  			}
 25366  			b.ResetWithControl(block.BlockARM64TBZ, x)
 25367  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 25368  			return true
 25369  		}
 25370  		// match: (EQ (FlagConstant [fc]) yes no)
 25371  		// cond: fc.Eq()
 25372  		// result: (First yes no)
 25373  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25374  			v_0 := b.Controls[0]
 25375  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25376  			if !(fc.Eq()) {
 25377  				break
 25378  			}
 25379  			b.Reset(block.BlockFirst)
 25380  			return true
 25381  		}
 25382  		// match: (EQ (FlagConstant [fc]) yes no)
 25383  		// cond: !fc.Eq()
 25384  		// result: (First no yes)
 25385  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25386  			v_0 := b.Controls[0]
 25387  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25388  			if !(!fc.Eq()) {
 25389  				break
 25390  			}
 25391  			b.Reset(block.BlockFirst)
 25392  			b.SwapSuccessors()
 25393  			return true
 25394  		}
 25395  		// match: (EQ (InvertFlags cmp) yes no)
 25396  		// result: (EQ cmp yes no)
 25397  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25398  			v_0 := b.Controls[0]
 25399  			cmp := v_0.Args[0]
 25400  			b.ResetWithControl(block.BlockARM64EQ, cmp)
 25401  			return true
 25402  		}
 25403  	case block.BlockARM64FGE:
 25404  		// match: (FGE (InvertFlags cmp) yes no)
 25405  		// result: (FLE cmp yes no)
 25406  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25407  			v_0 := b.Controls[0]
 25408  			cmp := v_0.Args[0]
 25409  			b.ResetWithControl(block.BlockARM64FLE, cmp)
 25410  			return true
 25411  		}
 25412  	case block.BlockARM64FGT:
 25413  		// match: (FGT (InvertFlags cmp) yes no)
 25414  		// result: (FLT cmp yes no)
 25415  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25416  			v_0 := b.Controls[0]
 25417  			cmp := v_0.Args[0]
 25418  			b.ResetWithControl(block.BlockARM64FLT, cmp)
 25419  			return true
 25420  		}
 25421  	case block.BlockARM64FLE:
 25422  		// match: (FLE (InvertFlags cmp) yes no)
 25423  		// result: (FGE cmp yes no)
 25424  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25425  			v_0 := b.Controls[0]
 25426  			cmp := v_0.Args[0]
 25427  			b.ResetWithControl(block.BlockARM64FGE, cmp)
 25428  			return true
 25429  		}
 25430  	case block.BlockARM64FLT:
 25431  		// match: (FLT (InvertFlags cmp) yes no)
 25432  		// result: (FGT cmp yes no)
 25433  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25434  			v_0 := b.Controls[0]
 25435  			cmp := v_0.Args[0]
 25436  			b.ResetWithControl(block.BlockARM64FGT, cmp)
 25437  			return true
 25438  		}
 25439  	case block.BlockARM64GE:
 25440  		// match: (GE (CMPconst [0] z:(AND x y)) yes no)
 25441  		// cond: z.Uses == 1
 25442  		// result: (GE (TST x y) yes no)
 25443  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25444  			v_0 := b.Controls[0]
 25445  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25446  				break
 25447  			}
 25448  			z := v_0.Args[0]
 25449  			if z.Op != ssaop.OpARM64AND {
 25450  				break
 25451  			}
 25452  			_ = z.Args[1]
 25453  			z_0 := z.Args[0]
 25454  			z_1 := z.Args[1]
 25455  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25456  				x := z_0
 25457  				y := z_1
 25458  				if !(z.Uses == 1) {
 25459  					continue
 25460  				}
 25461  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 25462  				v0.AddArg2(x, y)
 25463  				b.ResetWithControl(block.BlockARM64GE, v0)
 25464  				return true
 25465  			}
 25466  			break
 25467  		}
 25468  		// match: (GE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 25469  		// cond: x.Uses == 1
 25470  		// result: (GE (TSTconst [c] y) yes no)
 25471  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25472  			v_0 := b.Controls[0]
 25473  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25474  				break
 25475  			}
 25476  			x := v_0.Args[0]
 25477  			if x.Op != ssaop.OpARM64ANDconst {
 25478  				break
 25479  			}
 25480  			c := ssa.AuxIntToInt64(x.AuxInt)
 25481  			y := x.Args[0]
 25482  			if !(x.Uses == 1) {
 25483  				break
 25484  			}
 25485  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 25486  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 25487  			v0.AddArg(y)
 25488  			b.ResetWithControl(block.BlockARM64GE, v0)
 25489  			return true
 25490  		}
 25491  		// match: (GE (CMPWconst [0] z:(AND x y)) yes no)
 25492  		// cond: z.Uses == 1
 25493  		// result: (GE (TSTW x y) yes no)
 25494  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25495  			v_0 := b.Controls[0]
 25496  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25497  				break
 25498  			}
 25499  			z := v_0.Args[0]
 25500  			if z.Op != ssaop.OpARM64AND {
 25501  				break
 25502  			}
 25503  			_ = z.Args[1]
 25504  			z_0 := z.Args[0]
 25505  			z_1 := z.Args[1]
 25506  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25507  				x := z_0
 25508  				y := z_1
 25509  				if !(z.Uses == 1) {
 25510  					continue
 25511  				}
 25512  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 25513  				v0.AddArg2(x, y)
 25514  				b.ResetWithControl(block.BlockARM64GE, v0)
 25515  				return true
 25516  			}
 25517  			break
 25518  		}
 25519  		// match: (GE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 25520  		// cond: x.Uses == 1
 25521  		// result: (GE (TSTWconst [int32(c)] y) yes no)
 25522  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25523  			v_0 := b.Controls[0]
 25524  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25525  				break
 25526  			}
 25527  			x := v_0.Args[0]
 25528  			if x.Op != ssaop.OpARM64ANDconst {
 25529  				break
 25530  			}
 25531  			c := ssa.AuxIntToInt64(x.AuxInt)
 25532  			y := x.Args[0]
 25533  			if !(x.Uses == 1) {
 25534  				break
 25535  			}
 25536  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 25537  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 25538  			v0.AddArg(y)
 25539  			b.ResetWithControl(block.BlockARM64GE, v0)
 25540  			return true
 25541  		}
 25542  		// match: (GE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 25543  		// cond: x.Uses == 1
 25544  		// result: (GEnoov (CMNconst [c] y) yes no)
 25545  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25546  			v_0 := b.Controls[0]
 25547  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25548  				break
 25549  			}
 25550  			x := v_0.Args[0]
 25551  			if x.Op != ssaop.OpARM64ADDconst {
 25552  				break
 25553  			}
 25554  			c := ssa.AuxIntToInt64(x.AuxInt)
 25555  			y := x.Args[0]
 25556  			if !(x.Uses == 1) {
 25557  				break
 25558  			}
 25559  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 25560  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 25561  			v0.AddArg(y)
 25562  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25563  			return true
 25564  		}
 25565  		// match: (GE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 25566  		// cond: x.Uses == 1
 25567  		// result: (GEnoov (CMNWconst [int32(c)] y) yes no)
 25568  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25569  			v_0 := b.Controls[0]
 25570  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25571  				break
 25572  			}
 25573  			x := v_0.Args[0]
 25574  			if x.Op != ssaop.OpARM64ADDconst {
 25575  				break
 25576  			}
 25577  			c := ssa.AuxIntToInt64(x.AuxInt)
 25578  			y := x.Args[0]
 25579  			if !(x.Uses == 1) {
 25580  				break
 25581  			}
 25582  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 25583  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 25584  			v0.AddArg(y)
 25585  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25586  			return true
 25587  		}
 25588  		// match: (GE (CMPconst [0] z:(ADD x y)) yes no)
 25589  		// cond: z.Uses == 1
 25590  		// result: (GEnoov (CMN x y) yes no)
 25591  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25592  			v_0 := b.Controls[0]
 25593  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25594  				break
 25595  			}
 25596  			z := v_0.Args[0]
 25597  			if z.Op != ssaop.OpARM64ADD {
 25598  				break
 25599  			}
 25600  			_ = z.Args[1]
 25601  			z_0 := z.Args[0]
 25602  			z_1 := z.Args[1]
 25603  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25604  				x := z_0
 25605  				y := z_1
 25606  				if !(z.Uses == 1) {
 25607  					continue
 25608  				}
 25609  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25610  				v0.AddArg2(x, y)
 25611  				b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25612  				return true
 25613  			}
 25614  			break
 25615  		}
 25616  		// match: (GE (CMPWconst [0] z:(ADD x y)) yes no)
 25617  		// cond: z.Uses == 1
 25618  		// result: (GEnoov (CMNW x y) yes no)
 25619  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25620  			v_0 := b.Controls[0]
 25621  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25622  				break
 25623  			}
 25624  			z := v_0.Args[0]
 25625  			if z.Op != ssaop.OpARM64ADD {
 25626  				break
 25627  			}
 25628  			_ = z.Args[1]
 25629  			z_0 := z.Args[0]
 25630  			z_1 := z.Args[1]
 25631  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25632  				x := z_0
 25633  				y := z_1
 25634  				if !(z.Uses == 1) {
 25635  					continue
 25636  				}
 25637  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 25638  				v0.AddArg2(x, y)
 25639  				b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25640  				return true
 25641  			}
 25642  			break
 25643  		}
 25644  		// match: (GE (CMPconst [0] z:(MADD a x y)) yes no)
 25645  		// cond: z.Uses==1
 25646  		// result: (GEnoov (CMN a (MUL <x.Type> x y)) yes no)
 25647  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25648  			v_0 := b.Controls[0]
 25649  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25650  				break
 25651  			}
 25652  			z := v_0.Args[0]
 25653  			if z.Op != ssaop.OpARM64MADD {
 25654  				break
 25655  			}
 25656  			y := z.Args[2]
 25657  			a := z.Args[0]
 25658  			x := z.Args[1]
 25659  			if !(z.Uses == 1) {
 25660  				break
 25661  			}
 25662  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25663  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 25664  			v1.AddArg2(x, y)
 25665  			v0.AddArg2(a, v1)
 25666  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25667  			return true
 25668  		}
 25669  		// match: (GE (CMPWconst [0] z:(MADDW a x y)) yes no)
 25670  		// cond: z.Uses==1
 25671  		// result: (GEnoov (CMNW a (MULW <x.Type> x y)) yes no)
 25672  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25673  			v_0 := b.Controls[0]
 25674  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25675  				break
 25676  			}
 25677  			z := v_0.Args[0]
 25678  			if z.Op != ssaop.OpARM64MADDW {
 25679  				break
 25680  			}
 25681  			y := z.Args[2]
 25682  			a := z.Args[0]
 25683  			x := z.Args[1]
 25684  			if !(z.Uses == 1) {
 25685  				break
 25686  			}
 25687  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 25688  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 25689  			v1.AddArg2(x, y)
 25690  			v0.AddArg2(a, v1)
 25691  			b.ResetWithControl(block.BlockARM64GEnoov, v0)
 25692  			return true
 25693  		}
 25694  		// match: (GE (CMPWconst [0] x) yes no)
 25695  		// result: (TBZ [31] x yes no)
 25696  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25697  			v_0 := b.Controls[0]
 25698  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25699  				break
 25700  			}
 25701  			x := v_0.Args[0]
 25702  			b.ResetWithControl(block.BlockARM64TBZ, x)
 25703  			b.AuxInt = ssa.Int64ToAuxInt(31)
 25704  			return true
 25705  		}
 25706  		// match: (GE (CMPconst [0] x) yes no)
 25707  		// result: (TBZ [63] x yes no)
 25708  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25709  			v_0 := b.Controls[0]
 25710  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25711  				break
 25712  			}
 25713  			x := v_0.Args[0]
 25714  			b.ResetWithControl(block.BlockARM64TBZ, x)
 25715  			b.AuxInt = ssa.Int64ToAuxInt(63)
 25716  			return true
 25717  		}
 25718  		// match: (GE (CMPWconst [128] x) yes no)
 25719  		// cond: ssa.ZeroUpper56Bits(x)
 25720  		// result: (TBNZ [7] x yes no)
 25721  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25722  			v_0 := b.Controls[0]
 25723  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 25724  				break
 25725  			}
 25726  			x := v_0.Args[0]
 25727  			if !(ssa.ZeroUpper56Bits(x)) {
 25728  				break
 25729  			}
 25730  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 25731  			b.AuxInt = ssa.Int64ToAuxInt(7)
 25732  			return true
 25733  		}
 25734  		// match: (GE (CMPconst [128] x) yes no)
 25735  		// cond: ssa.ZeroUpper56Bits(x)
 25736  		// result: (TBNZ [7] x yes no)
 25737  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25738  			v_0 := b.Controls[0]
 25739  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 25740  				break
 25741  			}
 25742  			x := v_0.Args[0]
 25743  			if !(ssa.ZeroUpper56Bits(x)) {
 25744  				break
 25745  			}
 25746  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 25747  			b.AuxInt = ssa.Int64ToAuxInt(7)
 25748  			return true
 25749  		}
 25750  		// match: (GE (FlagConstant [fc]) yes no)
 25751  		// cond: fc.Ge()
 25752  		// result: (First yes no)
 25753  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25754  			v_0 := b.Controls[0]
 25755  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25756  			if !(fc.Ge()) {
 25757  				break
 25758  			}
 25759  			b.Reset(block.BlockFirst)
 25760  			return true
 25761  		}
 25762  		// match: (GE (FlagConstant [fc]) yes no)
 25763  		// cond: !fc.Ge()
 25764  		// result: (First no yes)
 25765  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25766  			v_0 := b.Controls[0]
 25767  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25768  			if !(!fc.Ge()) {
 25769  				break
 25770  			}
 25771  			b.Reset(block.BlockFirst)
 25772  			b.SwapSuccessors()
 25773  			return true
 25774  		}
 25775  		// match: (GE (InvertFlags cmp) yes no)
 25776  		// result: (LE cmp yes no)
 25777  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 25778  			v_0 := b.Controls[0]
 25779  			cmp := v_0.Args[0]
 25780  			b.ResetWithControl(block.BlockARM64LE, cmp)
 25781  			return true
 25782  		}
 25783  	case block.BlockARM64GEnoov:
 25784  		// match: (GEnoov (FlagConstant [fc]) yes no)
 25785  		// cond: fc.GeNoov()
 25786  		// result: (First yes no)
 25787  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25788  			v_0 := b.Controls[0]
 25789  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25790  			if !(fc.GeNoov()) {
 25791  				break
 25792  			}
 25793  			b.Reset(block.BlockFirst)
 25794  			return true
 25795  		}
 25796  		// match: (GEnoov (FlagConstant [fc]) yes no)
 25797  		// cond: !fc.GeNoov()
 25798  		// result: (First no yes)
 25799  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 25800  			v_0 := b.Controls[0]
 25801  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 25802  			if !(!fc.GeNoov()) {
 25803  				break
 25804  			}
 25805  			b.Reset(block.BlockFirst)
 25806  			b.SwapSuccessors()
 25807  			return true
 25808  		}
 25809  	case block.BlockARM64GT:
 25810  		// match: (GT (CMPconst [0] z:(AND x y)) yes no)
 25811  		// cond: z.Uses == 1
 25812  		// result: (GT (TST x y) yes no)
 25813  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25814  			v_0 := b.Controls[0]
 25815  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25816  				break
 25817  			}
 25818  			z := v_0.Args[0]
 25819  			if z.Op != ssaop.OpARM64AND {
 25820  				break
 25821  			}
 25822  			_ = z.Args[1]
 25823  			z_0 := z.Args[0]
 25824  			z_1 := z.Args[1]
 25825  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25826  				x := z_0
 25827  				y := z_1
 25828  				if !(z.Uses == 1) {
 25829  					continue
 25830  				}
 25831  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 25832  				v0.AddArg2(x, y)
 25833  				b.ResetWithControl(block.BlockARM64GT, v0)
 25834  				return true
 25835  			}
 25836  			break
 25837  		}
 25838  		// match: (GT (CMPconst [0] x:(ANDconst [c] y)) yes no)
 25839  		// cond: x.Uses == 1
 25840  		// result: (GT (TSTconst [c] y) yes no)
 25841  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25842  			v_0 := b.Controls[0]
 25843  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25844  				break
 25845  			}
 25846  			x := v_0.Args[0]
 25847  			if x.Op != ssaop.OpARM64ANDconst {
 25848  				break
 25849  			}
 25850  			c := ssa.AuxIntToInt64(x.AuxInt)
 25851  			y := x.Args[0]
 25852  			if !(x.Uses == 1) {
 25853  				break
 25854  			}
 25855  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 25856  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 25857  			v0.AddArg(y)
 25858  			b.ResetWithControl(block.BlockARM64GT, v0)
 25859  			return true
 25860  		}
 25861  		// match: (GT (CMPWconst [0] z:(AND x y)) yes no)
 25862  		// cond: z.Uses == 1
 25863  		// result: (GT (TSTW x y) yes no)
 25864  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25865  			v_0 := b.Controls[0]
 25866  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25867  				break
 25868  			}
 25869  			z := v_0.Args[0]
 25870  			if z.Op != ssaop.OpARM64AND {
 25871  				break
 25872  			}
 25873  			_ = z.Args[1]
 25874  			z_0 := z.Args[0]
 25875  			z_1 := z.Args[1]
 25876  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25877  				x := z_0
 25878  				y := z_1
 25879  				if !(z.Uses == 1) {
 25880  					continue
 25881  				}
 25882  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 25883  				v0.AddArg2(x, y)
 25884  				b.ResetWithControl(block.BlockARM64GT, v0)
 25885  				return true
 25886  			}
 25887  			break
 25888  		}
 25889  		// match: (GT (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 25890  		// cond: x.Uses == 1
 25891  		// result: (GT (TSTWconst [int32(c)] y) yes no)
 25892  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25893  			v_0 := b.Controls[0]
 25894  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25895  				break
 25896  			}
 25897  			x := v_0.Args[0]
 25898  			if x.Op != ssaop.OpARM64ANDconst {
 25899  				break
 25900  			}
 25901  			c := ssa.AuxIntToInt64(x.AuxInt)
 25902  			y := x.Args[0]
 25903  			if !(x.Uses == 1) {
 25904  				break
 25905  			}
 25906  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 25907  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 25908  			v0.AddArg(y)
 25909  			b.ResetWithControl(block.BlockARM64GT, v0)
 25910  			return true
 25911  		}
 25912  		// match: (GT (CMPconst [0] x:(ADDconst [c] y)) yes no)
 25913  		// cond: x.Uses == 1
 25914  		// result: (GTnoov (CMNconst [c] y) yes no)
 25915  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25916  			v_0 := b.Controls[0]
 25917  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25918  				break
 25919  			}
 25920  			x := v_0.Args[0]
 25921  			if x.Op != ssaop.OpARM64ADDconst {
 25922  				break
 25923  			}
 25924  			c := ssa.AuxIntToInt64(x.AuxInt)
 25925  			y := x.Args[0]
 25926  			if !(x.Uses == 1) {
 25927  				break
 25928  			}
 25929  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 25930  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 25931  			v0.AddArg(y)
 25932  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 25933  			return true
 25934  		}
 25935  		// match: (GT (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 25936  		// cond: x.Uses == 1
 25937  		// result: (GTnoov (CMNWconst [int32(c)] y) yes no)
 25938  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25939  			v_0 := b.Controls[0]
 25940  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25941  				break
 25942  			}
 25943  			x := v_0.Args[0]
 25944  			if x.Op != ssaop.OpARM64ADDconst {
 25945  				break
 25946  			}
 25947  			c := ssa.AuxIntToInt64(x.AuxInt)
 25948  			y := x.Args[0]
 25949  			if !(x.Uses == 1) {
 25950  				break
 25951  			}
 25952  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 25953  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 25954  			v0.AddArg(y)
 25955  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 25956  			return true
 25957  		}
 25958  		// match: (GT (CMPconst [0] z:(ADD x y)) yes no)
 25959  		// cond: z.Uses == 1
 25960  		// result: (GTnoov (CMN x y) yes no)
 25961  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 25962  			v_0 := b.Controls[0]
 25963  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 25964  				break
 25965  			}
 25966  			z := v_0.Args[0]
 25967  			if z.Op != ssaop.OpARM64ADD {
 25968  				break
 25969  			}
 25970  			_ = z.Args[1]
 25971  			z_0 := z.Args[0]
 25972  			z_1 := z.Args[1]
 25973  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 25974  				x := z_0
 25975  				y := z_1
 25976  				if !(z.Uses == 1) {
 25977  					continue
 25978  				}
 25979  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 25980  				v0.AddArg2(x, y)
 25981  				b.ResetWithControl(block.BlockARM64GTnoov, v0)
 25982  				return true
 25983  			}
 25984  			break
 25985  		}
 25986  		// match: (GT (CMPWconst [0] z:(ADD x y)) yes no)
 25987  		// cond: z.Uses == 1
 25988  		// result: (GTnoov (CMNW x y) yes no)
 25989  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 25990  			v_0 := b.Controls[0]
 25991  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 25992  				break
 25993  			}
 25994  			z := v_0.Args[0]
 25995  			if z.Op != ssaop.OpARM64ADD {
 25996  				break
 25997  			}
 25998  			_ = z.Args[1]
 25999  			z_0 := z.Args[0]
 26000  			z_1 := z.Args[1]
 26001  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26002  				x := z_0
 26003  				y := z_1
 26004  				if !(z.Uses == 1) {
 26005  					continue
 26006  				}
 26007  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26008  				v0.AddArg2(x, y)
 26009  				b.ResetWithControl(block.BlockARM64GTnoov, v0)
 26010  				return true
 26011  			}
 26012  			break
 26013  		}
 26014  		// match: (GT (CMPconst [0] z:(MADD a x y)) yes no)
 26015  		// cond: z.Uses==1
 26016  		// result: (GTnoov (CMN a (MUL <x.Type> x y)) yes no)
 26017  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26018  			v_0 := b.Controls[0]
 26019  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26020  				break
 26021  			}
 26022  			z := v_0.Args[0]
 26023  			if z.Op != ssaop.OpARM64MADD {
 26024  				break
 26025  			}
 26026  			y := z.Args[2]
 26027  			a := z.Args[0]
 26028  			x := z.Args[1]
 26029  			if !(z.Uses == 1) {
 26030  				break
 26031  			}
 26032  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26033  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 26034  			v1.AddArg2(x, y)
 26035  			v0.AddArg2(a, v1)
 26036  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 26037  			return true
 26038  		}
 26039  		// match: (GT (CMPWconst [0] z:(MADDW a x y)) yes no)
 26040  		// cond: z.Uses==1
 26041  		// result: (GTnoov (CMNW a (MULW <x.Type> x y)) yes no)
 26042  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26043  			v_0 := b.Controls[0]
 26044  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26045  				break
 26046  			}
 26047  			z := v_0.Args[0]
 26048  			if z.Op != ssaop.OpARM64MADDW {
 26049  				break
 26050  			}
 26051  			y := z.Args[2]
 26052  			a := z.Args[0]
 26053  			x := z.Args[1]
 26054  			if !(z.Uses == 1) {
 26055  				break
 26056  			}
 26057  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26058  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 26059  			v1.AddArg2(x, y)
 26060  			v0.AddArg2(a, v1)
 26061  			b.ResetWithControl(block.BlockARM64GTnoov, v0)
 26062  			return true
 26063  		}
 26064  		// match: (GT (FlagConstant [fc]) yes no)
 26065  		// cond: fc.Gt()
 26066  		// result: (First yes no)
 26067  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26068  			v_0 := b.Controls[0]
 26069  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26070  			if !(fc.Gt()) {
 26071  				break
 26072  			}
 26073  			b.Reset(block.BlockFirst)
 26074  			return true
 26075  		}
 26076  		// match: (GT (FlagConstant [fc]) yes no)
 26077  		// cond: !fc.Gt()
 26078  		// result: (First no yes)
 26079  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26080  			v_0 := b.Controls[0]
 26081  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26082  			if !(!fc.Gt()) {
 26083  				break
 26084  			}
 26085  			b.Reset(block.BlockFirst)
 26086  			b.SwapSuccessors()
 26087  			return true
 26088  		}
 26089  		// match: (GT (InvertFlags cmp) yes no)
 26090  		// result: (LT cmp yes no)
 26091  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 26092  			v_0 := b.Controls[0]
 26093  			cmp := v_0.Args[0]
 26094  			b.ResetWithControl(block.BlockARM64LT, cmp)
 26095  			return true
 26096  		}
 26097  	case block.BlockARM64GTnoov:
 26098  		// match: (GTnoov (FlagConstant [fc]) yes no)
 26099  		// cond: fc.GtNoov()
 26100  		// result: (First yes no)
 26101  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26102  			v_0 := b.Controls[0]
 26103  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26104  			if !(fc.GtNoov()) {
 26105  				break
 26106  			}
 26107  			b.Reset(block.BlockFirst)
 26108  			return true
 26109  		}
 26110  		// match: (GTnoov (FlagConstant [fc]) yes no)
 26111  		// cond: !fc.GtNoov()
 26112  		// result: (First no yes)
 26113  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26114  			v_0 := b.Controls[0]
 26115  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26116  			if !(!fc.GtNoov()) {
 26117  				break
 26118  			}
 26119  			b.Reset(block.BlockFirst)
 26120  			b.SwapSuccessors()
 26121  			return true
 26122  		}
 26123  	case block.BlockIf:
 26124  		// match: (If (Equal cc) yes no)
 26125  		// result: (EQ cc yes no)
 26126  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 26127  			v_0 := b.Controls[0]
 26128  			cc := v_0.Args[0]
 26129  			b.ResetWithControl(block.BlockARM64EQ, cc)
 26130  			return true
 26131  		}
 26132  		// match: (If (NotEqual cc) yes no)
 26133  		// result: (NE cc yes no)
 26134  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 26135  			v_0 := b.Controls[0]
 26136  			cc := v_0.Args[0]
 26137  			b.ResetWithControl(block.BlockARM64NE, cc)
 26138  			return true
 26139  		}
 26140  		// match: (If (LessThan cc) yes no)
 26141  		// result: (LT cc yes no)
 26142  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 26143  			v_0 := b.Controls[0]
 26144  			cc := v_0.Args[0]
 26145  			b.ResetWithControl(block.BlockARM64LT, cc)
 26146  			return true
 26147  		}
 26148  		// match: (If (LessThanU cc) yes no)
 26149  		// result: (ULT cc yes no)
 26150  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 26151  			v_0 := b.Controls[0]
 26152  			cc := v_0.Args[0]
 26153  			b.ResetWithControl(block.BlockARM64ULT, cc)
 26154  			return true
 26155  		}
 26156  		// match: (If (LessEqual cc) yes no)
 26157  		// result: (LE cc yes no)
 26158  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 26159  			v_0 := b.Controls[0]
 26160  			cc := v_0.Args[0]
 26161  			b.ResetWithControl(block.BlockARM64LE, cc)
 26162  			return true
 26163  		}
 26164  		// match: (If (LessEqualU cc) yes no)
 26165  		// result: (ULE cc yes no)
 26166  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 26167  			v_0 := b.Controls[0]
 26168  			cc := v_0.Args[0]
 26169  			b.ResetWithControl(block.BlockARM64ULE, cc)
 26170  			return true
 26171  		}
 26172  		// match: (If (GreaterThan cc) yes no)
 26173  		// result: (GT cc yes no)
 26174  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 26175  			v_0 := b.Controls[0]
 26176  			cc := v_0.Args[0]
 26177  			b.ResetWithControl(block.BlockARM64GT, cc)
 26178  			return true
 26179  		}
 26180  		// match: (If (GreaterThanU cc) yes no)
 26181  		// result: (UGT cc yes no)
 26182  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 26183  			v_0 := b.Controls[0]
 26184  			cc := v_0.Args[0]
 26185  			b.ResetWithControl(block.BlockARM64UGT, cc)
 26186  			return true
 26187  		}
 26188  		// match: (If (GreaterEqual cc) yes no)
 26189  		// result: (GE cc yes no)
 26190  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 26191  			v_0 := b.Controls[0]
 26192  			cc := v_0.Args[0]
 26193  			b.ResetWithControl(block.BlockARM64GE, cc)
 26194  			return true
 26195  		}
 26196  		// match: (If (GreaterEqualU cc) yes no)
 26197  		// result: (UGE cc yes no)
 26198  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 26199  			v_0 := b.Controls[0]
 26200  			cc := v_0.Args[0]
 26201  			b.ResetWithControl(block.BlockARM64UGE, cc)
 26202  			return true
 26203  		}
 26204  		// match: (If (LessThanF cc) yes no)
 26205  		// result: (FLT cc yes no)
 26206  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 26207  			v_0 := b.Controls[0]
 26208  			cc := v_0.Args[0]
 26209  			b.ResetWithControl(block.BlockARM64FLT, cc)
 26210  			return true
 26211  		}
 26212  		// match: (If (LessEqualF cc) yes no)
 26213  		// result: (FLE cc yes no)
 26214  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 26215  			v_0 := b.Controls[0]
 26216  			cc := v_0.Args[0]
 26217  			b.ResetWithControl(block.BlockARM64FLE, cc)
 26218  			return true
 26219  		}
 26220  		// match: (If (GreaterThanF cc) yes no)
 26221  		// result: (FGT cc yes no)
 26222  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 26223  			v_0 := b.Controls[0]
 26224  			cc := v_0.Args[0]
 26225  			b.ResetWithControl(block.BlockARM64FGT, cc)
 26226  			return true
 26227  		}
 26228  		// match: (If (GreaterEqualF cc) yes no)
 26229  		// result: (FGE cc yes no)
 26230  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 26231  			v_0 := b.Controls[0]
 26232  			cc := v_0.Args[0]
 26233  			b.ResetWithControl(block.BlockARM64FGE, cc)
 26234  			return true
 26235  		}
 26236  		// match: (If cond yes no)
 26237  		// result: (TBNZ [0] cond yes no)
 26238  		for {
 26239  			cond := b.Controls[0]
 26240  			b.ResetWithControl(block.BlockARM64TBNZ, cond)
 26241  			b.AuxInt = ssa.Int64ToAuxInt(0)
 26242  			return true
 26243  		}
 26244  	case block.BlockJumpTable:
 26245  		// match: (JumpTable idx)
 26246  		// result: (JUMPTABLE {ssa.MakeJumpTableSym(b)} idx (MOVDaddr <typ.Uintptr> {ssa.MakeJumpTableSym(b)} (SB)))
 26247  		for {
 26248  			idx := b.Controls[0]
 26249  			v0 := b.NewValue0(b.Pos, ssaop.OpARM64MOVDaddr, typ.Uintptr)
 26250  			v0.Aux = ssa.SymToAux(ssa.MakeJumpTableSym(b))
 26251  			v1 := b.NewValue0(b.Pos, ssaop.OpSB, typ.Uintptr)
 26252  			v0.AddArg(v1)
 26253  			b.ResetWithControl2(block.BlockARM64JUMPTABLE, idx, v0)
 26254  			b.Aux = ssa.SymToAux(ssa.MakeJumpTableSym(b))
 26255  			return true
 26256  		}
 26257  	case block.BlockARM64LE:
 26258  		// match: (LE (CMPconst [0] z:(AND x y)) yes no)
 26259  		// cond: z.Uses == 1
 26260  		// result: (LE (TST x y) yes no)
 26261  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26262  			v_0 := b.Controls[0]
 26263  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26264  				break
 26265  			}
 26266  			z := v_0.Args[0]
 26267  			if z.Op != ssaop.OpARM64AND {
 26268  				break
 26269  			}
 26270  			_ = z.Args[1]
 26271  			z_0 := z.Args[0]
 26272  			z_1 := z.Args[1]
 26273  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26274  				x := z_0
 26275  				y := z_1
 26276  				if !(z.Uses == 1) {
 26277  					continue
 26278  				}
 26279  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 26280  				v0.AddArg2(x, y)
 26281  				b.ResetWithControl(block.BlockARM64LE, v0)
 26282  				return true
 26283  			}
 26284  			break
 26285  		}
 26286  		// match: (LE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 26287  		// cond: x.Uses == 1
 26288  		// result: (LE (TSTconst [c] y) yes no)
 26289  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26290  			v_0 := b.Controls[0]
 26291  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26292  				break
 26293  			}
 26294  			x := v_0.Args[0]
 26295  			if x.Op != ssaop.OpARM64ANDconst {
 26296  				break
 26297  			}
 26298  			c := ssa.AuxIntToInt64(x.AuxInt)
 26299  			y := x.Args[0]
 26300  			if !(x.Uses == 1) {
 26301  				break
 26302  			}
 26303  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 26304  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26305  			v0.AddArg(y)
 26306  			b.ResetWithControl(block.BlockARM64LE, v0)
 26307  			return true
 26308  		}
 26309  		// match: (LE (CMPWconst [0] z:(AND x y)) yes no)
 26310  		// cond: z.Uses == 1
 26311  		// result: (LE (TSTW x y) yes no)
 26312  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26313  			v_0 := b.Controls[0]
 26314  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26315  				break
 26316  			}
 26317  			z := v_0.Args[0]
 26318  			if z.Op != ssaop.OpARM64AND {
 26319  				break
 26320  			}
 26321  			_ = z.Args[1]
 26322  			z_0 := z.Args[0]
 26323  			z_1 := z.Args[1]
 26324  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26325  				x := z_0
 26326  				y := z_1
 26327  				if !(z.Uses == 1) {
 26328  					continue
 26329  				}
 26330  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 26331  				v0.AddArg2(x, y)
 26332  				b.ResetWithControl(block.BlockARM64LE, v0)
 26333  				return true
 26334  			}
 26335  			break
 26336  		}
 26337  		// match: (LE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 26338  		// cond: x.Uses == 1
 26339  		// result: (LE (TSTWconst [int32(c)] y) yes no)
 26340  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26341  			v_0 := b.Controls[0]
 26342  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26343  				break
 26344  			}
 26345  			x := v_0.Args[0]
 26346  			if x.Op != ssaop.OpARM64ANDconst {
 26347  				break
 26348  			}
 26349  			c := ssa.AuxIntToInt64(x.AuxInt)
 26350  			y := x.Args[0]
 26351  			if !(x.Uses == 1) {
 26352  				break
 26353  			}
 26354  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 26355  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 26356  			v0.AddArg(y)
 26357  			b.ResetWithControl(block.BlockARM64LE, v0)
 26358  			return true
 26359  		}
 26360  		// match: (LE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 26361  		// cond: x.Uses == 1
 26362  		// result: (LEnoov (CMNconst [c] y) yes no)
 26363  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26364  			v_0 := b.Controls[0]
 26365  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26366  				break
 26367  			}
 26368  			x := v_0.Args[0]
 26369  			if x.Op != ssaop.OpARM64ADDconst {
 26370  				break
 26371  			}
 26372  			c := ssa.AuxIntToInt64(x.AuxInt)
 26373  			y := x.Args[0]
 26374  			if !(x.Uses == 1) {
 26375  				break
 26376  			}
 26377  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 26378  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26379  			v0.AddArg(y)
 26380  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26381  			return true
 26382  		}
 26383  		// match: (LE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 26384  		// cond: x.Uses == 1
 26385  		// result: (LEnoov (CMNWconst [int32(c)] y) yes no)
 26386  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26387  			v_0 := b.Controls[0]
 26388  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26389  				break
 26390  			}
 26391  			x := v_0.Args[0]
 26392  			if x.Op != ssaop.OpARM64ADDconst {
 26393  				break
 26394  			}
 26395  			c := ssa.AuxIntToInt64(x.AuxInt)
 26396  			y := x.Args[0]
 26397  			if !(x.Uses == 1) {
 26398  				break
 26399  			}
 26400  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 26401  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 26402  			v0.AddArg(y)
 26403  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26404  			return true
 26405  		}
 26406  		// match: (LE (CMPconst [0] z:(ADD x y)) yes no)
 26407  		// cond: z.Uses == 1
 26408  		// result: (LEnoov (CMN x y) yes no)
 26409  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26410  			v_0 := b.Controls[0]
 26411  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26412  				break
 26413  			}
 26414  			z := v_0.Args[0]
 26415  			if z.Op != ssaop.OpARM64ADD {
 26416  				break
 26417  			}
 26418  			_ = z.Args[1]
 26419  			z_0 := z.Args[0]
 26420  			z_1 := z.Args[1]
 26421  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26422  				x := z_0
 26423  				y := z_1
 26424  				if !(z.Uses == 1) {
 26425  					continue
 26426  				}
 26427  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26428  				v0.AddArg2(x, y)
 26429  				b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26430  				return true
 26431  			}
 26432  			break
 26433  		}
 26434  		// match: (LE (CMPWconst [0] z:(ADD x y)) yes no)
 26435  		// cond: z.Uses == 1
 26436  		// result: (LEnoov (CMNW x y) yes no)
 26437  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26438  			v_0 := b.Controls[0]
 26439  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26440  				break
 26441  			}
 26442  			z := v_0.Args[0]
 26443  			if z.Op != ssaop.OpARM64ADD {
 26444  				break
 26445  			}
 26446  			_ = z.Args[1]
 26447  			z_0 := z.Args[0]
 26448  			z_1 := z.Args[1]
 26449  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26450  				x := z_0
 26451  				y := z_1
 26452  				if !(z.Uses == 1) {
 26453  					continue
 26454  				}
 26455  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26456  				v0.AddArg2(x, y)
 26457  				b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26458  				return true
 26459  			}
 26460  			break
 26461  		}
 26462  		// match: (LE (CMPconst [0] z:(MADD a x y)) yes no)
 26463  		// cond: z.Uses==1
 26464  		// result: (LEnoov (CMN a (MUL <x.Type> x y)) yes no)
 26465  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26466  			v_0 := b.Controls[0]
 26467  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26468  				break
 26469  			}
 26470  			z := v_0.Args[0]
 26471  			if z.Op != ssaop.OpARM64MADD {
 26472  				break
 26473  			}
 26474  			y := z.Args[2]
 26475  			a := z.Args[0]
 26476  			x := z.Args[1]
 26477  			if !(z.Uses == 1) {
 26478  				break
 26479  			}
 26480  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26481  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 26482  			v1.AddArg2(x, y)
 26483  			v0.AddArg2(a, v1)
 26484  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26485  			return true
 26486  		}
 26487  		// match: (LE (CMPWconst [0] z:(MADDW a x y)) yes no)
 26488  		// cond: z.Uses==1
 26489  		// result: (LEnoov (CMNW a (MULW <x.Type> x y)) yes no)
 26490  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26491  			v_0 := b.Controls[0]
 26492  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26493  				break
 26494  			}
 26495  			z := v_0.Args[0]
 26496  			if z.Op != ssaop.OpARM64MADDW {
 26497  				break
 26498  			}
 26499  			y := z.Args[2]
 26500  			a := z.Args[0]
 26501  			x := z.Args[1]
 26502  			if !(z.Uses == 1) {
 26503  				break
 26504  			}
 26505  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26506  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 26507  			v1.AddArg2(x, y)
 26508  			v0.AddArg2(a, v1)
 26509  			b.ResetWithControl(block.BlockARM64LEnoov, v0)
 26510  			return true
 26511  		}
 26512  		// match: (LE (FlagConstant [fc]) yes no)
 26513  		// cond: fc.Le()
 26514  		// result: (First yes no)
 26515  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26516  			v_0 := b.Controls[0]
 26517  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26518  			if !(fc.Le()) {
 26519  				break
 26520  			}
 26521  			b.Reset(block.BlockFirst)
 26522  			return true
 26523  		}
 26524  		// match: (LE (FlagConstant [fc]) yes no)
 26525  		// cond: !fc.Le()
 26526  		// result: (First no yes)
 26527  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26528  			v_0 := b.Controls[0]
 26529  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26530  			if !(!fc.Le()) {
 26531  				break
 26532  			}
 26533  			b.Reset(block.BlockFirst)
 26534  			b.SwapSuccessors()
 26535  			return true
 26536  		}
 26537  		// match: (LE (InvertFlags cmp) yes no)
 26538  		// result: (GE cmp yes no)
 26539  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 26540  			v_0 := b.Controls[0]
 26541  			cmp := v_0.Args[0]
 26542  			b.ResetWithControl(block.BlockARM64GE, cmp)
 26543  			return true
 26544  		}
 26545  	case block.BlockARM64LEnoov:
 26546  		// match: (LEnoov (FlagConstant [fc]) yes no)
 26547  		// cond: fc.LeNoov()
 26548  		// result: (First yes no)
 26549  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26550  			v_0 := b.Controls[0]
 26551  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26552  			if !(fc.LeNoov()) {
 26553  				break
 26554  			}
 26555  			b.Reset(block.BlockFirst)
 26556  			return true
 26557  		}
 26558  		// match: (LEnoov (FlagConstant [fc]) yes no)
 26559  		// cond: !fc.LeNoov()
 26560  		// result: (First no yes)
 26561  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26562  			v_0 := b.Controls[0]
 26563  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26564  			if !(!fc.LeNoov()) {
 26565  				break
 26566  			}
 26567  			b.Reset(block.BlockFirst)
 26568  			b.SwapSuccessors()
 26569  			return true
 26570  		}
 26571  	case block.BlockARM64LT:
 26572  		// match: (LT (CMPconst [0] z:(AND x y)) yes no)
 26573  		// cond: z.Uses == 1
 26574  		// result: (LT (TST x y) yes no)
 26575  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26576  			v_0 := b.Controls[0]
 26577  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26578  				break
 26579  			}
 26580  			z := v_0.Args[0]
 26581  			if z.Op != ssaop.OpARM64AND {
 26582  				break
 26583  			}
 26584  			_ = z.Args[1]
 26585  			z_0 := z.Args[0]
 26586  			z_1 := z.Args[1]
 26587  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26588  				x := z_0
 26589  				y := z_1
 26590  				if !(z.Uses == 1) {
 26591  					continue
 26592  				}
 26593  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 26594  				v0.AddArg2(x, y)
 26595  				b.ResetWithControl(block.BlockARM64LT, v0)
 26596  				return true
 26597  			}
 26598  			break
 26599  		}
 26600  		// match: (LT (CMPconst [0] x:(ANDconst [c] y)) yes no)
 26601  		// cond: x.Uses == 1
 26602  		// result: (LT (TSTconst [c] y) yes no)
 26603  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26604  			v_0 := b.Controls[0]
 26605  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26606  				break
 26607  			}
 26608  			x := v_0.Args[0]
 26609  			if x.Op != ssaop.OpARM64ANDconst {
 26610  				break
 26611  			}
 26612  			c := ssa.AuxIntToInt64(x.AuxInt)
 26613  			y := x.Args[0]
 26614  			if !(x.Uses == 1) {
 26615  				break
 26616  			}
 26617  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 26618  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26619  			v0.AddArg(y)
 26620  			b.ResetWithControl(block.BlockARM64LT, v0)
 26621  			return true
 26622  		}
 26623  		// match: (LT (CMPWconst [0] z:(AND x y)) yes no)
 26624  		// cond: z.Uses == 1
 26625  		// result: (LT (TSTW x y) yes no)
 26626  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26627  			v_0 := b.Controls[0]
 26628  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26629  				break
 26630  			}
 26631  			z := v_0.Args[0]
 26632  			if z.Op != ssaop.OpARM64AND {
 26633  				break
 26634  			}
 26635  			_ = z.Args[1]
 26636  			z_0 := z.Args[0]
 26637  			z_1 := z.Args[1]
 26638  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26639  				x := z_0
 26640  				y := z_1
 26641  				if !(z.Uses == 1) {
 26642  					continue
 26643  				}
 26644  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 26645  				v0.AddArg2(x, y)
 26646  				b.ResetWithControl(block.BlockARM64LT, v0)
 26647  				return true
 26648  			}
 26649  			break
 26650  		}
 26651  		// match: (LT (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 26652  		// cond: x.Uses == 1
 26653  		// result: (LT (TSTWconst [int32(c)] y) yes no)
 26654  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26655  			v_0 := b.Controls[0]
 26656  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26657  				break
 26658  			}
 26659  			x := v_0.Args[0]
 26660  			if x.Op != ssaop.OpARM64ANDconst {
 26661  				break
 26662  			}
 26663  			c := ssa.AuxIntToInt64(x.AuxInt)
 26664  			y := x.Args[0]
 26665  			if !(x.Uses == 1) {
 26666  				break
 26667  			}
 26668  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 26669  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 26670  			v0.AddArg(y)
 26671  			b.ResetWithControl(block.BlockARM64LT, v0)
 26672  			return true
 26673  		}
 26674  		// match: (LT (CMPconst [0] x:(ADDconst [c] y)) yes no)
 26675  		// cond: x.Uses == 1
 26676  		// result: (LTnoov (CMNconst [c] y) yes no)
 26677  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26678  			v_0 := b.Controls[0]
 26679  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26680  				break
 26681  			}
 26682  			x := v_0.Args[0]
 26683  			if x.Op != ssaop.OpARM64ADDconst {
 26684  				break
 26685  			}
 26686  			c := ssa.AuxIntToInt64(x.AuxInt)
 26687  			y := x.Args[0]
 26688  			if !(x.Uses == 1) {
 26689  				break
 26690  			}
 26691  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 26692  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26693  			v0.AddArg(y)
 26694  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26695  			return true
 26696  		}
 26697  		// match: (LT (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 26698  		// cond: x.Uses == 1
 26699  		// result: (LTnoov (CMNWconst [int32(c)] y) yes no)
 26700  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26701  			v_0 := b.Controls[0]
 26702  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26703  				break
 26704  			}
 26705  			x := v_0.Args[0]
 26706  			if x.Op != ssaop.OpARM64ADDconst {
 26707  				break
 26708  			}
 26709  			c := ssa.AuxIntToInt64(x.AuxInt)
 26710  			y := x.Args[0]
 26711  			if !(x.Uses == 1) {
 26712  				break
 26713  			}
 26714  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 26715  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 26716  			v0.AddArg(y)
 26717  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26718  			return true
 26719  		}
 26720  		// match: (LT (CMPconst [0] z:(ADD x y)) yes no)
 26721  		// cond: z.Uses == 1
 26722  		// result: (LTnoov (CMN x y) yes no)
 26723  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26724  			v_0 := b.Controls[0]
 26725  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26726  				break
 26727  			}
 26728  			z := v_0.Args[0]
 26729  			if z.Op != ssaop.OpARM64ADD {
 26730  				break
 26731  			}
 26732  			_ = z.Args[1]
 26733  			z_0 := z.Args[0]
 26734  			z_1 := z.Args[1]
 26735  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26736  				x := z_0
 26737  				y := z_1
 26738  				if !(z.Uses == 1) {
 26739  					continue
 26740  				}
 26741  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26742  				v0.AddArg2(x, y)
 26743  				b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26744  				return true
 26745  			}
 26746  			break
 26747  		}
 26748  		// match: (LT (CMPWconst [0] z:(ADD x y)) yes no)
 26749  		// cond: z.Uses == 1
 26750  		// result: (LTnoov (CMNW x y) yes no)
 26751  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26752  			v_0 := b.Controls[0]
 26753  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26754  				break
 26755  			}
 26756  			z := v_0.Args[0]
 26757  			if z.Op != ssaop.OpARM64ADD {
 26758  				break
 26759  			}
 26760  			_ = z.Args[1]
 26761  			z_0 := z.Args[0]
 26762  			z_1 := z.Args[1]
 26763  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26764  				x := z_0
 26765  				y := z_1
 26766  				if !(z.Uses == 1) {
 26767  					continue
 26768  				}
 26769  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26770  				v0.AddArg2(x, y)
 26771  				b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26772  				return true
 26773  			}
 26774  			break
 26775  		}
 26776  		// match: (LT (CMPconst [0] z:(MADD a x y)) yes no)
 26777  		// cond: z.Uses==1
 26778  		// result: (LTnoov (CMN a (MUL <x.Type> x y)) yes no)
 26779  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26780  			v_0 := b.Controls[0]
 26781  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26782  				break
 26783  			}
 26784  			z := v_0.Args[0]
 26785  			if z.Op != ssaop.OpARM64MADD {
 26786  				break
 26787  			}
 26788  			y := z.Args[2]
 26789  			a := z.Args[0]
 26790  			x := z.Args[1]
 26791  			if !(z.Uses == 1) {
 26792  				break
 26793  			}
 26794  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 26795  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 26796  			v1.AddArg2(x, y)
 26797  			v0.AddArg2(a, v1)
 26798  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26799  			return true
 26800  		}
 26801  		// match: (LT (CMPWconst [0] z:(MADDW a x y)) yes no)
 26802  		// cond: z.Uses==1
 26803  		// result: (LTnoov (CMNW a (MULW <x.Type> x y)) yes no)
 26804  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26805  			v_0 := b.Controls[0]
 26806  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26807  				break
 26808  			}
 26809  			z := v_0.Args[0]
 26810  			if z.Op != ssaop.OpARM64MADDW {
 26811  				break
 26812  			}
 26813  			y := z.Args[2]
 26814  			a := z.Args[0]
 26815  			x := z.Args[1]
 26816  			if !(z.Uses == 1) {
 26817  				break
 26818  			}
 26819  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 26820  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 26821  			v1.AddArg2(x, y)
 26822  			v0.AddArg2(a, v1)
 26823  			b.ResetWithControl(block.BlockARM64LTnoov, v0)
 26824  			return true
 26825  		}
 26826  		// match: (LT (CMPWconst [0] x) yes no)
 26827  		// result: (TBNZ [31] x yes no)
 26828  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26829  			v_0 := b.Controls[0]
 26830  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26831  				break
 26832  			}
 26833  			x := v_0.Args[0]
 26834  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 26835  			b.AuxInt = ssa.Int64ToAuxInt(31)
 26836  			return true
 26837  		}
 26838  		// match: (LT (CMPconst [0] x) yes no)
 26839  		// result: (TBNZ [63] x yes no)
 26840  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26841  			v_0 := b.Controls[0]
 26842  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26843  				break
 26844  			}
 26845  			x := v_0.Args[0]
 26846  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 26847  			b.AuxInt = ssa.Int64ToAuxInt(63)
 26848  			return true
 26849  		}
 26850  		// match: (LT (CMPWconst [128] x) yes no)
 26851  		// cond: ssa.ZeroUpper56Bits(x)
 26852  		// result: (TBZ [7] x yes no)
 26853  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26854  			v_0 := b.Controls[0]
 26855  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 26856  				break
 26857  			}
 26858  			x := v_0.Args[0]
 26859  			if !(ssa.ZeroUpper56Bits(x)) {
 26860  				break
 26861  			}
 26862  			b.ResetWithControl(block.BlockARM64TBZ, x)
 26863  			b.AuxInt = ssa.Int64ToAuxInt(7)
 26864  			return true
 26865  		}
 26866  		// match: (LT (CMPconst [128] x) yes no)
 26867  		// cond: ssa.ZeroUpper56Bits(x)
 26868  		// result: (TBZ [7] x yes no)
 26869  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26870  			v_0 := b.Controls[0]
 26871  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 26872  				break
 26873  			}
 26874  			x := v_0.Args[0]
 26875  			if !(ssa.ZeroUpper56Bits(x)) {
 26876  				break
 26877  			}
 26878  			b.ResetWithControl(block.BlockARM64TBZ, x)
 26879  			b.AuxInt = ssa.Int64ToAuxInt(7)
 26880  			return true
 26881  		}
 26882  		// match: (LT (FlagConstant [fc]) yes no)
 26883  		// cond: fc.Lt()
 26884  		// result: (First yes no)
 26885  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26886  			v_0 := b.Controls[0]
 26887  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26888  			if !(fc.Lt()) {
 26889  				break
 26890  			}
 26891  			b.Reset(block.BlockFirst)
 26892  			return true
 26893  		}
 26894  		// match: (LT (FlagConstant [fc]) yes no)
 26895  		// cond: !fc.Lt()
 26896  		// result: (First no yes)
 26897  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26898  			v_0 := b.Controls[0]
 26899  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26900  			if !(!fc.Lt()) {
 26901  				break
 26902  			}
 26903  			b.Reset(block.BlockFirst)
 26904  			b.SwapSuccessors()
 26905  			return true
 26906  		}
 26907  		// match: (LT (InvertFlags cmp) yes no)
 26908  		// result: (GT cmp yes no)
 26909  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 26910  			v_0 := b.Controls[0]
 26911  			cmp := v_0.Args[0]
 26912  			b.ResetWithControl(block.BlockARM64GT, cmp)
 26913  			return true
 26914  		}
 26915  	case block.BlockARM64LTnoov:
 26916  		// match: (LTnoov (FlagConstant [fc]) yes no)
 26917  		// cond: fc.LtNoov()
 26918  		// result: (First yes no)
 26919  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26920  			v_0 := b.Controls[0]
 26921  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26922  			if !(fc.LtNoov()) {
 26923  				break
 26924  			}
 26925  			b.Reset(block.BlockFirst)
 26926  			return true
 26927  		}
 26928  		// match: (LTnoov (FlagConstant [fc]) yes no)
 26929  		// cond: !fc.LtNoov()
 26930  		// result: (First no yes)
 26931  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 26932  			v_0 := b.Controls[0]
 26933  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 26934  			if !(!fc.LtNoov()) {
 26935  				break
 26936  			}
 26937  			b.Reset(block.BlockFirst)
 26938  			b.SwapSuccessors()
 26939  			return true
 26940  		}
 26941  	case block.BlockARM64NE:
 26942  		// match: (NE (CMPconst [0] z:(AND x y)) yes no)
 26943  		// cond: z.Uses == 1
 26944  		// result: (NE (TST x y) yes no)
 26945  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26946  			v_0 := b.Controls[0]
 26947  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26948  				break
 26949  			}
 26950  			z := v_0.Args[0]
 26951  			if z.Op != ssaop.OpARM64AND {
 26952  				break
 26953  			}
 26954  			_ = z.Args[1]
 26955  			z_0 := z.Args[0]
 26956  			z_1 := z.Args[1]
 26957  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 26958  				x := z_0
 26959  				y := z_1
 26960  				if !(z.Uses == 1) {
 26961  					continue
 26962  				}
 26963  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TST, types.TypeFlags)
 26964  				v0.AddArg2(x, y)
 26965  				b.ResetWithControl(block.BlockARM64NE, v0)
 26966  				return true
 26967  			}
 26968  			break
 26969  		}
 26970  		// match: (NE (CMPconst [0] x:(ANDconst [c] y)) yes no)
 26971  		// cond: x.Uses == 1
 26972  		// result: (NE (TSTconst [c] y) yes no)
 26973  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 26974  			v_0 := b.Controls[0]
 26975  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 26976  				break
 26977  			}
 26978  			x := v_0.Args[0]
 26979  			if x.Op != ssaop.OpARM64ANDconst {
 26980  				break
 26981  			}
 26982  			c := ssa.AuxIntToInt64(x.AuxInt)
 26983  			y := x.Args[0]
 26984  			if !(x.Uses == 1) {
 26985  				break
 26986  			}
 26987  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTconst, types.TypeFlags)
 26988  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 26989  			v0.AddArg(y)
 26990  			b.ResetWithControl(block.BlockARM64NE, v0)
 26991  			return true
 26992  		}
 26993  		// match: (NE (CMPWconst [0] z:(AND x y)) yes no)
 26994  		// cond: z.Uses == 1
 26995  		// result: (NE (TSTW x y) yes no)
 26996  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 26997  			v_0 := b.Controls[0]
 26998  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 26999  				break
 27000  			}
 27001  			z := v_0.Args[0]
 27002  			if z.Op != ssaop.OpARM64AND {
 27003  				break
 27004  			}
 27005  			_ = z.Args[1]
 27006  			z_0 := z.Args[0]
 27007  			z_1 := z.Args[1]
 27008  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 27009  				x := z_0
 27010  				y := z_1
 27011  				if !(z.Uses == 1) {
 27012  					continue
 27013  				}
 27014  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTW, types.TypeFlags)
 27015  				v0.AddArg2(x, y)
 27016  				b.ResetWithControl(block.BlockARM64NE, v0)
 27017  				return true
 27018  			}
 27019  			break
 27020  		}
 27021  		// match: (NE (CMPWconst [0] x:(ANDconst [c] y)) yes no)
 27022  		// cond: x.Uses == 1
 27023  		// result: (NE (TSTWconst [int32(c)] y) yes no)
 27024  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27025  			v_0 := b.Controls[0]
 27026  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 27027  				break
 27028  			}
 27029  			x := v_0.Args[0]
 27030  			if x.Op != ssaop.OpARM64ANDconst {
 27031  				break
 27032  			}
 27033  			c := ssa.AuxIntToInt64(x.AuxInt)
 27034  			y := x.Args[0]
 27035  			if !(x.Uses == 1) {
 27036  				break
 27037  			}
 27038  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64TSTWconst, types.TypeFlags)
 27039  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 27040  			v0.AddArg(y)
 27041  			b.ResetWithControl(block.BlockARM64NE, v0)
 27042  			return true
 27043  		}
 27044  		// match: (NE (CMPconst [0] x:(ADDconst [c] y)) yes no)
 27045  		// cond: x.Uses == 1
 27046  		// result: (NE (CMNconst [c] y) yes no)
 27047  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 27048  			v_0 := b.Controls[0]
 27049  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 27050  				break
 27051  			}
 27052  			x := v_0.Args[0]
 27053  			if x.Op != ssaop.OpARM64ADDconst {
 27054  				break
 27055  			}
 27056  			c := ssa.AuxIntToInt64(x.AuxInt)
 27057  			y := x.Args[0]
 27058  			if !(x.Uses == 1) {
 27059  				break
 27060  			}
 27061  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNconst, types.TypeFlags)
 27062  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 27063  			v0.AddArg(y)
 27064  			b.ResetWithControl(block.BlockARM64NE, v0)
 27065  			return true
 27066  		}
 27067  		// match: (NE (CMPWconst [0] x:(ADDconst [c] y)) yes no)
 27068  		// cond: x.Uses == 1
 27069  		// result: (NE (CMNWconst [int32(c)] y) yes no)
 27070  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27071  			v_0 := b.Controls[0]
 27072  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 27073  				break
 27074  			}
 27075  			x := v_0.Args[0]
 27076  			if x.Op != ssaop.OpARM64ADDconst {
 27077  				break
 27078  			}
 27079  			c := ssa.AuxIntToInt64(x.AuxInt)
 27080  			y := x.Args[0]
 27081  			if !(x.Uses == 1) {
 27082  				break
 27083  			}
 27084  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNWconst, types.TypeFlags)
 27085  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 27086  			v0.AddArg(y)
 27087  			b.ResetWithControl(block.BlockARM64NE, v0)
 27088  			return true
 27089  		}
 27090  		// match: (NE (CMPconst [0] z:(ADD x y)) yes no)
 27091  		// cond: z.Uses == 1
 27092  		// result: (NE (CMN x y) yes no)
 27093  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 27094  			v_0 := b.Controls[0]
 27095  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 27096  				break
 27097  			}
 27098  			z := v_0.Args[0]
 27099  			if z.Op != ssaop.OpARM64ADD {
 27100  				break
 27101  			}
 27102  			_ = z.Args[1]
 27103  			z_0 := z.Args[0]
 27104  			z_1 := z.Args[1]
 27105  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 27106  				x := z_0
 27107  				y := z_1
 27108  				if !(z.Uses == 1) {
 27109  					continue
 27110  				}
 27111  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 27112  				v0.AddArg2(x, y)
 27113  				b.ResetWithControl(block.BlockARM64NE, v0)
 27114  				return true
 27115  			}
 27116  			break
 27117  		}
 27118  		// match: (NE (CMPWconst [0] z:(ADD x y)) yes no)
 27119  		// cond: z.Uses == 1
 27120  		// result: (NE (CMNW x y) yes no)
 27121  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27122  			v_0 := b.Controls[0]
 27123  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 27124  				break
 27125  			}
 27126  			z := v_0.Args[0]
 27127  			if z.Op != ssaop.OpARM64ADD {
 27128  				break
 27129  			}
 27130  			_ = z.Args[1]
 27131  			z_0 := z.Args[0]
 27132  			z_1 := z.Args[1]
 27133  			for _i0 := 0; _i0 <= 1; _i0, z_0, z_1 = _i0+1, z_1, z_0 {
 27134  				x := z_0
 27135  				y := z_1
 27136  				if !(z.Uses == 1) {
 27137  					continue
 27138  				}
 27139  				v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 27140  				v0.AddArg2(x, y)
 27141  				b.ResetWithControl(block.BlockARM64NE, v0)
 27142  				return true
 27143  			}
 27144  			break
 27145  		}
 27146  		// match: (NE (CMP x z:(NEG y)) yes no)
 27147  		// cond: z.Uses == 1
 27148  		// result: (NE (CMN x y) yes no)
 27149  		for b.Controls[0].Op == ssaop.OpARM64CMP {
 27150  			v_0 := b.Controls[0]
 27151  			_ = v_0.Args[1]
 27152  			x := v_0.Args[0]
 27153  			z := v_0.Args[1]
 27154  			if z.Op != ssaop.OpARM64NEG {
 27155  				break
 27156  			}
 27157  			y := z.Args[0]
 27158  			if !(z.Uses == 1) {
 27159  				break
 27160  			}
 27161  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 27162  			v0.AddArg2(x, y)
 27163  			b.ResetWithControl(block.BlockARM64NE, v0)
 27164  			return true
 27165  		}
 27166  		// match: (NE (CMPW x z:(NEG y)) yes no)
 27167  		// cond: z.Uses == 1
 27168  		// result: (NE (CMNW x y) yes no)
 27169  		for b.Controls[0].Op == ssaop.OpARM64CMPW {
 27170  			v_0 := b.Controls[0]
 27171  			_ = v_0.Args[1]
 27172  			x := v_0.Args[0]
 27173  			z := v_0.Args[1]
 27174  			if z.Op != ssaop.OpARM64NEG {
 27175  				break
 27176  			}
 27177  			y := z.Args[0]
 27178  			if !(z.Uses == 1) {
 27179  				break
 27180  			}
 27181  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 27182  			v0.AddArg2(x, y)
 27183  			b.ResetWithControl(block.BlockARM64NE, v0)
 27184  			return true
 27185  		}
 27186  		// match: (NE (CMPconst [0] x) yes no)
 27187  		// result: (NZ x yes no)
 27188  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 27189  			v_0 := b.Controls[0]
 27190  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 27191  				break
 27192  			}
 27193  			x := v_0.Args[0]
 27194  			b.ResetWithControl(block.BlockARM64NZ, x)
 27195  			return true
 27196  		}
 27197  		// match: (NE (CMPWconst [0] x) yes no)
 27198  		// result: (NZW x yes no)
 27199  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27200  			v_0 := b.Controls[0]
 27201  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 27202  				break
 27203  			}
 27204  			x := v_0.Args[0]
 27205  			b.ResetWithControl(block.BlockARM64NZW, x)
 27206  			return true
 27207  		}
 27208  		// match: (NE (CMPconst [0] z:(MADD a x y)) yes no)
 27209  		// cond: z.Uses==1
 27210  		// result: (NE (CMN a (MUL <x.Type> x y)) yes no)
 27211  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 27212  			v_0 := b.Controls[0]
 27213  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 27214  				break
 27215  			}
 27216  			z := v_0.Args[0]
 27217  			if z.Op != ssaop.OpARM64MADD {
 27218  				break
 27219  			}
 27220  			y := z.Args[2]
 27221  			a := z.Args[0]
 27222  			x := z.Args[1]
 27223  			if !(z.Uses == 1) {
 27224  				break
 27225  			}
 27226  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMN, types.TypeFlags)
 27227  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 27228  			v1.AddArg2(x, y)
 27229  			v0.AddArg2(a, v1)
 27230  			b.ResetWithControl(block.BlockARM64NE, v0)
 27231  			return true
 27232  		}
 27233  		// match: (NE (CMPWconst [0] z:(MADDW a x y)) yes no)
 27234  		// cond: z.Uses==1
 27235  		// result: (NE (CMNW a (MULW <x.Type> x y)) yes no)
 27236  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27237  			v_0 := b.Controls[0]
 27238  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 27239  				break
 27240  			}
 27241  			z := v_0.Args[0]
 27242  			if z.Op != ssaop.OpARM64MADDW {
 27243  				break
 27244  			}
 27245  			y := z.Args[2]
 27246  			a := z.Args[0]
 27247  			x := z.Args[1]
 27248  			if !(z.Uses == 1) {
 27249  				break
 27250  			}
 27251  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMNW, types.TypeFlags)
 27252  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 27253  			v1.AddArg2(x, y)
 27254  			v0.AddArg2(a, v1)
 27255  			b.ResetWithControl(block.BlockARM64NE, v0)
 27256  			return true
 27257  		}
 27258  		// match: (NE (CMPconst [0] z:(MSUB a x y)) yes no)
 27259  		// cond: z.Uses==1
 27260  		// result: (NE (CMP a (MUL <x.Type> x y)) yes no)
 27261  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 27262  			v_0 := b.Controls[0]
 27263  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 27264  				break
 27265  			}
 27266  			z := v_0.Args[0]
 27267  			if z.Op != ssaop.OpARM64MSUB {
 27268  				break
 27269  			}
 27270  			y := z.Args[2]
 27271  			a := z.Args[0]
 27272  			x := z.Args[1]
 27273  			if !(z.Uses == 1) {
 27274  				break
 27275  			}
 27276  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 27277  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MUL, x.Type)
 27278  			v1.AddArg2(x, y)
 27279  			v0.AddArg2(a, v1)
 27280  			b.ResetWithControl(block.BlockARM64NE, v0)
 27281  			return true
 27282  		}
 27283  		// match: (NE (CMPWconst [0] z:(MSUBW a x y)) yes no)
 27284  		// cond: z.Uses==1
 27285  		// result: (NE (CMPW a (MULW <x.Type> x y)) yes no)
 27286  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 27287  			v_0 := b.Controls[0]
 27288  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 27289  				break
 27290  			}
 27291  			z := v_0.Args[0]
 27292  			if z.Op != ssaop.OpARM64MSUBW {
 27293  				break
 27294  			}
 27295  			y := z.Args[2]
 27296  			a := z.Args[0]
 27297  			x := z.Args[1]
 27298  			if !(z.Uses == 1) {
 27299  				break
 27300  			}
 27301  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 27302  			v1 := b.NewValue0(v_0.Pos, ssaop.OpARM64MULW, x.Type)
 27303  			v1.AddArg2(x, y)
 27304  			v0.AddArg2(a, v1)
 27305  			b.ResetWithControl(block.BlockARM64NE, v0)
 27306  			return true
 27307  		}
 27308  		// match: (NE (TSTconst [c] x) yes no)
 27309  		// cond: ssa.OneBit(c)
 27310  		// result: (TBNZ [int64(ssa.Ntz64(c))] x yes no)
 27311  		for b.Controls[0].Op == ssaop.OpARM64TSTconst {
 27312  			v_0 := b.Controls[0]
 27313  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27314  			x := v_0.Args[0]
 27315  			if !(ssa.OneBit(c)) {
 27316  				break
 27317  			}
 27318  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27319  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 27320  			return true
 27321  		}
 27322  		// match: (NE (TSTWconst [c] x) yes no)
 27323  		// cond: ssa.OneBit(int64(uint32(c)))
 27324  		// result: (TBNZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 27325  		for b.Controls[0].Op == ssaop.OpARM64TSTWconst {
 27326  			v_0 := b.Controls[0]
 27327  			c := ssa.AuxIntToInt32(v_0.AuxInt)
 27328  			x := v_0.Args[0]
 27329  			if !(ssa.OneBit(int64(uint32(c)))) {
 27330  				break
 27331  			}
 27332  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27333  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 27334  			return true
 27335  		}
 27336  		// match: (NE (FlagConstant [fc]) yes no)
 27337  		// cond: fc.Ne()
 27338  		// result: (First yes no)
 27339  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 27340  			v_0 := b.Controls[0]
 27341  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 27342  			if !(fc.Ne()) {
 27343  				break
 27344  			}
 27345  			b.Reset(block.BlockFirst)
 27346  			return true
 27347  		}
 27348  		// match: (NE (FlagConstant [fc]) yes no)
 27349  		// cond: !fc.Ne()
 27350  		// result: (First no yes)
 27351  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 27352  			v_0 := b.Controls[0]
 27353  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 27354  			if !(!fc.Ne()) {
 27355  				break
 27356  			}
 27357  			b.Reset(block.BlockFirst)
 27358  			b.SwapSuccessors()
 27359  			return true
 27360  		}
 27361  		// match: (NE (InvertFlags cmp) yes no)
 27362  		// result: (NE cmp yes no)
 27363  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 27364  			v_0 := b.Controls[0]
 27365  			cmp := v_0.Args[0]
 27366  			b.ResetWithControl(block.BlockARM64NE, cmp)
 27367  			return true
 27368  		}
 27369  	case block.BlockARM64NZ:
 27370  		// match: (NZ (Equal cc) yes no)
 27371  		// result: (EQ cc yes no)
 27372  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 27373  			v_0 := b.Controls[0]
 27374  			cc := v_0.Args[0]
 27375  			b.ResetWithControl(block.BlockARM64EQ, cc)
 27376  			return true
 27377  		}
 27378  		// match: (NZ (NotEqual cc) yes no)
 27379  		// result: (NE cc yes no)
 27380  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 27381  			v_0 := b.Controls[0]
 27382  			cc := v_0.Args[0]
 27383  			b.ResetWithControl(block.BlockARM64NE, cc)
 27384  			return true
 27385  		}
 27386  		// match: (NZ (LessThan cc) yes no)
 27387  		// result: (LT cc yes no)
 27388  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 27389  			v_0 := b.Controls[0]
 27390  			cc := v_0.Args[0]
 27391  			b.ResetWithControl(block.BlockARM64LT, cc)
 27392  			return true
 27393  		}
 27394  		// match: (NZ (LessThanU cc) yes no)
 27395  		// result: (ULT cc yes no)
 27396  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 27397  			v_0 := b.Controls[0]
 27398  			cc := v_0.Args[0]
 27399  			b.ResetWithControl(block.BlockARM64ULT, cc)
 27400  			return true
 27401  		}
 27402  		// match: (NZ (LessEqual cc) yes no)
 27403  		// result: (LE cc yes no)
 27404  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 27405  			v_0 := b.Controls[0]
 27406  			cc := v_0.Args[0]
 27407  			b.ResetWithControl(block.BlockARM64LE, cc)
 27408  			return true
 27409  		}
 27410  		// match: (NZ (LessEqualU cc) yes no)
 27411  		// result: (ULE cc yes no)
 27412  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 27413  			v_0 := b.Controls[0]
 27414  			cc := v_0.Args[0]
 27415  			b.ResetWithControl(block.BlockARM64ULE, cc)
 27416  			return true
 27417  		}
 27418  		// match: (NZ (GreaterThan cc) yes no)
 27419  		// result: (GT cc yes no)
 27420  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 27421  			v_0 := b.Controls[0]
 27422  			cc := v_0.Args[0]
 27423  			b.ResetWithControl(block.BlockARM64GT, cc)
 27424  			return true
 27425  		}
 27426  		// match: (NZ (GreaterThanU cc) yes no)
 27427  		// result: (UGT cc yes no)
 27428  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 27429  			v_0 := b.Controls[0]
 27430  			cc := v_0.Args[0]
 27431  			b.ResetWithControl(block.BlockARM64UGT, cc)
 27432  			return true
 27433  		}
 27434  		// match: (NZ (GreaterEqual cc) yes no)
 27435  		// result: (GE cc yes no)
 27436  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 27437  			v_0 := b.Controls[0]
 27438  			cc := v_0.Args[0]
 27439  			b.ResetWithControl(block.BlockARM64GE, cc)
 27440  			return true
 27441  		}
 27442  		// match: (NZ (GreaterEqualU cc) yes no)
 27443  		// result: (UGE cc yes no)
 27444  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 27445  			v_0 := b.Controls[0]
 27446  			cc := v_0.Args[0]
 27447  			b.ResetWithControl(block.BlockARM64UGE, cc)
 27448  			return true
 27449  		}
 27450  		// match: (NZ (LessThanF cc) yes no)
 27451  		// result: (FLT cc yes no)
 27452  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 27453  			v_0 := b.Controls[0]
 27454  			cc := v_0.Args[0]
 27455  			b.ResetWithControl(block.BlockARM64FLT, cc)
 27456  			return true
 27457  		}
 27458  		// match: (NZ (LessEqualF cc) yes no)
 27459  		// result: (FLE cc yes no)
 27460  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 27461  			v_0 := b.Controls[0]
 27462  			cc := v_0.Args[0]
 27463  			b.ResetWithControl(block.BlockARM64FLE, cc)
 27464  			return true
 27465  		}
 27466  		// match: (NZ (GreaterThanF cc) yes no)
 27467  		// result: (FGT cc yes no)
 27468  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 27469  			v_0 := b.Controls[0]
 27470  			cc := v_0.Args[0]
 27471  			b.ResetWithControl(block.BlockARM64FGT, cc)
 27472  			return true
 27473  		}
 27474  		// match: (NZ (GreaterEqualF cc) yes no)
 27475  		// result: (FGE cc yes no)
 27476  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 27477  			v_0 := b.Controls[0]
 27478  			cc := v_0.Args[0]
 27479  			b.ResetWithControl(block.BlockARM64FGE, cc)
 27480  			return true
 27481  		}
 27482  		// match: (NZ sub:(SUB x y))
 27483  		// cond: sub.Uses == 1
 27484  		// result: (NE (CMP x y))
 27485  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 27486  			sub := b.Controls[0]
 27487  			y := sub.Args[1]
 27488  			x := sub.Args[0]
 27489  			if !(sub.Uses == 1) {
 27490  				break
 27491  			}
 27492  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 27493  			v0.AddArg2(x, y)
 27494  			b.ResetWithControl(block.BlockARM64NE, v0)
 27495  			return true
 27496  		}
 27497  		// match: (NZ sub:(SUBconst [c] y))
 27498  		// cond: sub.Uses == 1
 27499  		// result: (NE (CMPconst [c] y))
 27500  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 27501  			sub := b.Controls[0]
 27502  			c := ssa.AuxIntToInt64(sub.AuxInt)
 27503  			y := sub.Args[0]
 27504  			if !(sub.Uses == 1) {
 27505  				break
 27506  			}
 27507  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 27508  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 27509  			v0.AddArg(y)
 27510  			b.ResetWithControl(block.BlockARM64NE, v0)
 27511  			return true
 27512  		}
 27513  		// match: (NZ (ANDconst [c] x) yes no)
 27514  		// cond: ssa.OneBit(c)
 27515  		// result: (TBNZ [int64(ssa.Ntz64(c))] x yes no)
 27516  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 27517  			v_0 := b.Controls[0]
 27518  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27519  			x := v_0.Args[0]
 27520  			if !(ssa.OneBit(c)) {
 27521  				break
 27522  			}
 27523  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27524  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 27525  			return true
 27526  		}
 27527  		// match: (NZ s:(SRLconst [63] x) yes no)
 27528  		// cond: s.Uses == 1
 27529  		// result: (TBNZ [63] x yes no)
 27530  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 27531  			s := b.Controls[0]
 27532  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 27533  				break
 27534  			}
 27535  			x := s.Args[0]
 27536  			if !(s.Uses == 1) {
 27537  				break
 27538  			}
 27539  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27540  			b.AuxInt = ssa.Int64ToAuxInt(63)
 27541  			return true
 27542  		}
 27543  		// match: (NZ s:(SRAconst [63] x) yes no)
 27544  		// cond: s.Uses == 1
 27545  		// result: (TBNZ [63] x yes no)
 27546  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 27547  			s := b.Controls[0]
 27548  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 27549  				break
 27550  			}
 27551  			x := s.Args[0]
 27552  			if !(s.Uses == 1) {
 27553  				break
 27554  			}
 27555  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27556  			b.AuxInt = ssa.Int64ToAuxInt(63)
 27557  			return true
 27558  		}
 27559  		// match: (NZ (MOVDconst [0]) yes no)
 27560  		// result: (First no yes)
 27561  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 27562  			v_0 := b.Controls[0]
 27563  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 27564  				break
 27565  			}
 27566  			b.Reset(block.BlockFirst)
 27567  			b.SwapSuccessors()
 27568  			return true
 27569  		}
 27570  		// match: (NZ (MOVDconst [c]) yes no)
 27571  		// cond: c != 0
 27572  		// result: (First yes no)
 27573  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 27574  			v_0 := b.Controls[0]
 27575  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27576  			if !(c != 0) {
 27577  				break
 27578  			}
 27579  			b.Reset(block.BlockFirst)
 27580  			return true
 27581  		}
 27582  	case block.BlockARM64NZW:
 27583  		// match: (NZW sub:(SUB x y))
 27584  		// cond: sub.Uses == 1
 27585  		// result: (NE (CMPW x y))
 27586  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 27587  			sub := b.Controls[0]
 27588  			y := sub.Args[1]
 27589  			x := sub.Args[0]
 27590  			if !(sub.Uses == 1) {
 27591  				break
 27592  			}
 27593  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 27594  			v0.AddArg2(x, y)
 27595  			b.ResetWithControl(block.BlockARM64NE, v0)
 27596  			return true
 27597  		}
 27598  		// match: (NZW sub:(SUBconst [c] y))
 27599  		// cond: sub.Uses == 1
 27600  		// result: (NE (CMPWconst [int32(c)] y))
 27601  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 27602  			sub := b.Controls[0]
 27603  			c := ssa.AuxIntToInt64(sub.AuxInt)
 27604  			y := sub.Args[0]
 27605  			if !(sub.Uses == 1) {
 27606  				break
 27607  			}
 27608  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 27609  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 27610  			v0.AddArg(y)
 27611  			b.ResetWithControl(block.BlockARM64NE, v0)
 27612  			return true
 27613  		}
 27614  		// match: (NZW (ANDconst [c] x) yes no)
 27615  		// cond: ssa.OneBit(int64(uint32(c)))
 27616  		// result: (TBNZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 27617  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 27618  			v_0 := b.Controls[0]
 27619  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27620  			x := v_0.Args[0]
 27621  			if !(ssa.OneBit(int64(uint32(c)))) {
 27622  				break
 27623  			}
 27624  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27625  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 27626  			return true
 27627  		}
 27628  		// match: (NZW (MOVDconst [c]) yes no)
 27629  		// cond: int32(c) == 0
 27630  		// result: (First no yes)
 27631  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 27632  			v_0 := b.Controls[0]
 27633  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27634  			if !(int32(c) == 0) {
 27635  				break
 27636  			}
 27637  			b.Reset(block.BlockFirst)
 27638  			b.SwapSuccessors()
 27639  			return true
 27640  		}
 27641  		// match: (NZW (MOVDconst [c]) yes no)
 27642  		// cond: int32(c) != 0
 27643  		// result: (First yes no)
 27644  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 27645  			v_0 := b.Controls[0]
 27646  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 27647  			if !(int32(c) != 0) {
 27648  				break
 27649  			}
 27650  			b.Reset(block.BlockFirst)
 27651  			return true
 27652  		}
 27653  	case block.BlockARM64TBNZ:
 27654  		// match: (TBNZ [0] (Equal cc) yes no)
 27655  		// result: (EQ cc yes no)
 27656  		for b.Controls[0].Op == ssaop.OpARM64Equal {
 27657  			v_0 := b.Controls[0]
 27658  			cc := v_0.Args[0]
 27659  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27660  				break
 27661  			}
 27662  			b.ResetWithControl(block.BlockARM64EQ, cc)
 27663  			return true
 27664  		}
 27665  		// match: (TBNZ [0] (NotEqual cc) yes no)
 27666  		// result: (NE cc yes no)
 27667  		for b.Controls[0].Op == ssaop.OpARM64NotEqual {
 27668  			v_0 := b.Controls[0]
 27669  			cc := v_0.Args[0]
 27670  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27671  				break
 27672  			}
 27673  			b.ResetWithControl(block.BlockARM64NE, cc)
 27674  			return true
 27675  		}
 27676  		// match: (TBNZ [0] (LessThan cc) yes no)
 27677  		// result: (LT cc yes no)
 27678  		for b.Controls[0].Op == ssaop.OpARM64LessThan {
 27679  			v_0 := b.Controls[0]
 27680  			cc := v_0.Args[0]
 27681  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27682  				break
 27683  			}
 27684  			b.ResetWithControl(block.BlockARM64LT, cc)
 27685  			return true
 27686  		}
 27687  		// match: (TBNZ [0] (LessThanU cc) yes no)
 27688  		// result: (ULT cc yes no)
 27689  		for b.Controls[0].Op == ssaop.OpARM64LessThanU {
 27690  			v_0 := b.Controls[0]
 27691  			cc := v_0.Args[0]
 27692  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27693  				break
 27694  			}
 27695  			b.ResetWithControl(block.BlockARM64ULT, cc)
 27696  			return true
 27697  		}
 27698  		// match: (TBNZ [0] (LessEqual cc) yes no)
 27699  		// result: (LE cc yes no)
 27700  		for b.Controls[0].Op == ssaop.OpARM64LessEqual {
 27701  			v_0 := b.Controls[0]
 27702  			cc := v_0.Args[0]
 27703  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27704  				break
 27705  			}
 27706  			b.ResetWithControl(block.BlockARM64LE, cc)
 27707  			return true
 27708  		}
 27709  		// match: (TBNZ [0] (LessEqualU cc) yes no)
 27710  		// result: (ULE cc yes no)
 27711  		for b.Controls[0].Op == ssaop.OpARM64LessEqualU {
 27712  			v_0 := b.Controls[0]
 27713  			cc := v_0.Args[0]
 27714  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27715  				break
 27716  			}
 27717  			b.ResetWithControl(block.BlockARM64ULE, cc)
 27718  			return true
 27719  		}
 27720  		// match: (TBNZ [0] (GreaterThan cc) yes no)
 27721  		// result: (GT cc yes no)
 27722  		for b.Controls[0].Op == ssaop.OpARM64GreaterThan {
 27723  			v_0 := b.Controls[0]
 27724  			cc := v_0.Args[0]
 27725  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27726  				break
 27727  			}
 27728  			b.ResetWithControl(block.BlockARM64GT, cc)
 27729  			return true
 27730  		}
 27731  		// match: (TBNZ [0] (GreaterThanU cc) yes no)
 27732  		// result: (UGT cc yes no)
 27733  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanU {
 27734  			v_0 := b.Controls[0]
 27735  			cc := v_0.Args[0]
 27736  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27737  				break
 27738  			}
 27739  			b.ResetWithControl(block.BlockARM64UGT, cc)
 27740  			return true
 27741  		}
 27742  		// match: (TBNZ [0] (GreaterEqual cc) yes no)
 27743  		// result: (GE cc yes no)
 27744  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqual {
 27745  			v_0 := b.Controls[0]
 27746  			cc := v_0.Args[0]
 27747  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27748  				break
 27749  			}
 27750  			b.ResetWithControl(block.BlockARM64GE, cc)
 27751  			return true
 27752  		}
 27753  		// match: (TBNZ [0] (GreaterEqualU cc) yes no)
 27754  		// result: (UGE cc yes no)
 27755  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualU {
 27756  			v_0 := b.Controls[0]
 27757  			cc := v_0.Args[0]
 27758  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27759  				break
 27760  			}
 27761  			b.ResetWithControl(block.BlockARM64UGE, cc)
 27762  			return true
 27763  		}
 27764  		// match: (TBNZ [0] (LessThanF cc) yes no)
 27765  		// result: (FLT cc yes no)
 27766  		for b.Controls[0].Op == ssaop.OpARM64LessThanF {
 27767  			v_0 := b.Controls[0]
 27768  			cc := v_0.Args[0]
 27769  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27770  				break
 27771  			}
 27772  			b.ResetWithControl(block.BlockARM64FLT, cc)
 27773  			return true
 27774  		}
 27775  		// match: (TBNZ [0] (LessEqualF cc) yes no)
 27776  		// result: (FLE cc yes no)
 27777  		for b.Controls[0].Op == ssaop.OpARM64LessEqualF {
 27778  			v_0 := b.Controls[0]
 27779  			cc := v_0.Args[0]
 27780  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27781  				break
 27782  			}
 27783  			b.ResetWithControl(block.BlockARM64FLE, cc)
 27784  			return true
 27785  		}
 27786  		// match: (TBNZ [0] (GreaterThanF cc) yes no)
 27787  		// result: (FGT cc yes no)
 27788  		for b.Controls[0].Op == ssaop.OpARM64GreaterThanF {
 27789  			v_0 := b.Controls[0]
 27790  			cc := v_0.Args[0]
 27791  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27792  				break
 27793  			}
 27794  			b.ResetWithControl(block.BlockARM64FGT, cc)
 27795  			return true
 27796  		}
 27797  		// match: (TBNZ [0] (GreaterEqualF cc) yes no)
 27798  		// result: (FGE cc yes no)
 27799  		for b.Controls[0].Op == ssaop.OpARM64GreaterEqualF {
 27800  			v_0 := b.Controls[0]
 27801  			cc := v_0.Args[0]
 27802  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27803  				break
 27804  			}
 27805  			b.ResetWithControl(block.BlockARM64FGE, cc)
 27806  			return true
 27807  		}
 27808  		// match: (TBNZ [0] (XORconst [1] x) yes no)
 27809  		// result: (TBZ [0] x yes no)
 27810  		for b.Controls[0].Op == ssaop.OpARM64XORconst {
 27811  			v_0 := b.Controls[0]
 27812  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 27813  				break
 27814  			}
 27815  			x := v_0.Args[0]
 27816  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27817  				break
 27818  			}
 27819  			b.ResetWithControl(block.BlockARM64TBZ, x)
 27820  			b.AuxInt = ssa.Int64ToAuxInt(0)
 27821  			return true
 27822  		}
 27823  		// match: (TBNZ [t] sv:(SRLconst [s] x) yes no)
 27824  		// cond: t+s < 64 && sv.Uses == 1
 27825  		// result: (TBNZ [t+s] x yes no )
 27826  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 27827  			sv := b.Controls[0]
 27828  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27829  			x := sv.Args[0]
 27830  			t := ssa.AuxIntToInt64(b.AuxInt)
 27831  			if !(t+s < 64 && sv.Uses == 1) {
 27832  				break
 27833  			}
 27834  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27835  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 27836  			return true
 27837  		}
 27838  		// match: (TBNZ [t] (SRLconst [s] x) yes no)
 27839  		// cond: t+s >= 64
 27840  		// result: (First no yes)
 27841  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 27842  			v_0 := b.Controls[0]
 27843  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 27844  			t := ssa.AuxIntToInt64(b.AuxInt)
 27845  			if !(t+s >= 64) {
 27846  				break
 27847  			}
 27848  			b.Reset(block.BlockFirst)
 27849  			b.SwapSuccessors()
 27850  			return true
 27851  		}
 27852  		// match: (TBNZ [t] sv:(SLLconst [s] x) yes no)
 27853  		// cond: t-s >= 0 && sv.Uses == 1
 27854  		// result: (TBNZ [t-s] x yes no )
 27855  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 27856  			sv := b.Controls[0]
 27857  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27858  			x := sv.Args[0]
 27859  			t := ssa.AuxIntToInt64(b.AuxInt)
 27860  			if !(t-s >= 0 && sv.Uses == 1) {
 27861  				break
 27862  			}
 27863  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27864  			b.AuxInt = ssa.Int64ToAuxInt(t - s)
 27865  			return true
 27866  		}
 27867  		// match: (TBNZ [t] (SLLconst [s] x) yes no)
 27868  		// cond: t-s < 0
 27869  		// result: (First no yes)
 27870  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 27871  			v_0 := b.Controls[0]
 27872  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 27873  			t := ssa.AuxIntToInt64(b.AuxInt)
 27874  			if !(t-s < 0) {
 27875  				break
 27876  			}
 27877  			b.Reset(block.BlockFirst)
 27878  			b.SwapSuccessors()
 27879  			return true
 27880  		}
 27881  		// match: (TBNZ [t] rv:(RORconst [r] x) yes no)
 27882  		// cond: rv.Uses == 1
 27883  		// result: (TBNZ [int64(uint64(t+r)%64)] x yes no)
 27884  		for b.Controls[0].Op == ssaop.OpARM64RORconst {
 27885  			rv := b.Controls[0]
 27886  			r := ssa.AuxIntToInt64(rv.AuxInt)
 27887  			x := rv.Args[0]
 27888  			t := ssa.AuxIntToInt64(b.AuxInt)
 27889  			if !(rv.Uses == 1) {
 27890  				break
 27891  			}
 27892  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27893  			b.AuxInt = ssa.Int64ToAuxInt(int64(uint64(t+r) % 64))
 27894  			return true
 27895  		}
 27896  		// match: (TBNZ [t] sv:(SRAconst [s] x) yes no)
 27897  		// cond: t+s < 64 && sv.Uses == 1
 27898  		// result: (TBNZ [t+s] x yes no)
 27899  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 27900  			sv := b.Controls[0]
 27901  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27902  			x := sv.Args[0]
 27903  			t := ssa.AuxIntToInt64(b.AuxInt)
 27904  			if !(t+s < 64 && sv.Uses == 1) {
 27905  				break
 27906  			}
 27907  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27908  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 27909  			return true
 27910  		}
 27911  		// match: (TBNZ [t] sv:(SRAconst [s] x) yes no)
 27912  		// cond: t+s >= 64 && sv.Uses == 1
 27913  		// result: (TBNZ [63 ] x yes no)
 27914  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 27915  			sv := b.Controls[0]
 27916  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27917  			x := sv.Args[0]
 27918  			t := ssa.AuxIntToInt64(b.AuxInt)
 27919  			if !(t+s >= 64 && sv.Uses == 1) {
 27920  				break
 27921  			}
 27922  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27923  			b.AuxInt = ssa.Int64ToAuxInt(63)
 27924  			return true
 27925  		}
 27926  	case block.BlockARM64TBZ:
 27927  		// match: (TBZ [0] (XORconst [1] x) yes no)
 27928  		// result: (TBNZ [0] x yes no)
 27929  		for b.Controls[0].Op == ssaop.OpARM64XORconst {
 27930  			v_0 := b.Controls[0]
 27931  			if ssa.AuxIntToInt64(v_0.AuxInt) != 1 {
 27932  				break
 27933  			}
 27934  			x := v_0.Args[0]
 27935  			if ssa.AuxIntToInt64(b.AuxInt) != 0 {
 27936  				break
 27937  			}
 27938  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 27939  			b.AuxInt = ssa.Int64ToAuxInt(0)
 27940  			return true
 27941  		}
 27942  		// match: (TBZ [t] sv:(SRLconst [s] x) yes no)
 27943  		// cond: t+s < 64 && sv.Uses == 1
 27944  		// result: (TBZ [t+s] x yes no )
 27945  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 27946  			sv := b.Controls[0]
 27947  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27948  			x := sv.Args[0]
 27949  			t := ssa.AuxIntToInt64(b.AuxInt)
 27950  			if !(t+s < 64 && sv.Uses == 1) {
 27951  				break
 27952  			}
 27953  			b.ResetWithControl(block.BlockARM64TBZ, x)
 27954  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 27955  			return true
 27956  		}
 27957  		// match: (TBZ [t] (SRLconst [s] x) yes no)
 27958  		// cond: t+s >= 64
 27959  		// result: (First yes no )
 27960  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 27961  			v_0 := b.Controls[0]
 27962  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 27963  			t := ssa.AuxIntToInt64(b.AuxInt)
 27964  			if !(t+s >= 64) {
 27965  				break
 27966  			}
 27967  			b.Reset(block.BlockFirst)
 27968  			return true
 27969  		}
 27970  		// match: (TBZ [t] sv:(SLLconst [s] x) yes no)
 27971  		// cond: t-s >= 0 && sv.Uses == 1
 27972  		// result: (TBZ [t-s] x yes no )
 27973  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 27974  			sv := b.Controls[0]
 27975  			s := ssa.AuxIntToInt64(sv.AuxInt)
 27976  			x := sv.Args[0]
 27977  			t := ssa.AuxIntToInt64(b.AuxInt)
 27978  			if !(t-s >= 0 && sv.Uses == 1) {
 27979  				break
 27980  			}
 27981  			b.ResetWithControl(block.BlockARM64TBZ, x)
 27982  			b.AuxInt = ssa.Int64ToAuxInt(t - s)
 27983  			return true
 27984  		}
 27985  		// match: (TBZ [t] (SLLconst [s] x) yes no)
 27986  		// cond: t-s < 0
 27987  		// result: (First yes no )
 27988  		for b.Controls[0].Op == ssaop.OpARM64SLLconst {
 27989  			v_0 := b.Controls[0]
 27990  			s := ssa.AuxIntToInt64(v_0.AuxInt)
 27991  			t := ssa.AuxIntToInt64(b.AuxInt)
 27992  			if !(t-s < 0) {
 27993  				break
 27994  			}
 27995  			b.Reset(block.BlockFirst)
 27996  			return true
 27997  		}
 27998  		// match: (TBZ [t] rv:(RORconst [r] x) yes no)
 27999  		// cond: rv.Uses == 1
 28000  		// result: (TBZ [int64(uint64(t+r)%64)] x yes no)
 28001  		for b.Controls[0].Op == ssaop.OpARM64RORconst {
 28002  			rv := b.Controls[0]
 28003  			r := ssa.AuxIntToInt64(rv.AuxInt)
 28004  			x := rv.Args[0]
 28005  			t := ssa.AuxIntToInt64(b.AuxInt)
 28006  			if !(rv.Uses == 1) {
 28007  				break
 28008  			}
 28009  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28010  			b.AuxInt = ssa.Int64ToAuxInt(int64(uint64(t+r) % 64))
 28011  			return true
 28012  		}
 28013  		// match: (TBZ [t] sv:(SRAconst [s] x) yes no)
 28014  		// cond: t+s < 64 && sv.Uses == 1
 28015  		// result: (TBZ [t+s] x yes no)
 28016  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 28017  			sv := b.Controls[0]
 28018  			s := ssa.AuxIntToInt64(sv.AuxInt)
 28019  			x := sv.Args[0]
 28020  			t := ssa.AuxIntToInt64(b.AuxInt)
 28021  			if !(t+s < 64 && sv.Uses == 1) {
 28022  				break
 28023  			}
 28024  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28025  			b.AuxInt = ssa.Int64ToAuxInt(t + s)
 28026  			return true
 28027  		}
 28028  		// match: (TBZ [t] sv:(SRAconst [s] x) yes no)
 28029  		// cond: t+s >= 64 && sv.Uses == 1
 28030  		// result: (TBZ [63 ] x yes no)
 28031  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 28032  			sv := b.Controls[0]
 28033  			s := ssa.AuxIntToInt64(sv.AuxInt)
 28034  			x := sv.Args[0]
 28035  			t := ssa.AuxIntToInt64(b.AuxInt)
 28036  			if !(t+s >= 64 && sv.Uses == 1) {
 28037  				break
 28038  			}
 28039  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28040  			b.AuxInt = ssa.Int64ToAuxInt(63)
 28041  			return true
 28042  		}
 28043  	case block.BlockARM64UGE:
 28044  		// match: (UGE (CMPWconst [128] x) yes no)
 28045  		// cond: ssa.ZeroUpper56Bits(x)
 28046  		// result: (TBNZ [7] x yes no)
 28047  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 28048  			v_0 := b.Controls[0]
 28049  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 28050  				break
 28051  			}
 28052  			x := v_0.Args[0]
 28053  			if !(ssa.ZeroUpper56Bits(x)) {
 28054  				break
 28055  			}
 28056  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 28057  			b.AuxInt = ssa.Int64ToAuxInt(7)
 28058  			return true
 28059  		}
 28060  		// match: (UGE (CMPconst [128] x) yes no)
 28061  		// cond: ssa.ZeroUpper56Bits(x)
 28062  		// result: (TBNZ [7] x yes no)
 28063  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 28064  			v_0 := b.Controls[0]
 28065  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 28066  				break
 28067  			}
 28068  			x := v_0.Args[0]
 28069  			if !(ssa.ZeroUpper56Bits(x)) {
 28070  				break
 28071  			}
 28072  			b.ResetWithControl(block.BlockARM64TBNZ, x)
 28073  			b.AuxInt = ssa.Int64ToAuxInt(7)
 28074  			return true
 28075  		}
 28076  		// match: (UGE (FlagConstant [fc]) yes no)
 28077  		// cond: fc.Uge()
 28078  		// result: (First yes no)
 28079  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 28080  			v_0 := b.Controls[0]
 28081  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28082  			if !(fc.Uge()) {
 28083  				break
 28084  			}
 28085  			b.Reset(block.BlockFirst)
 28086  			return true
 28087  		}
 28088  		// match: (UGE (FlagConstant [fc]) yes no)
 28089  		// cond: !fc.Uge()
 28090  		// result: (First no yes)
 28091  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 28092  			v_0 := b.Controls[0]
 28093  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28094  			if !(!fc.Uge()) {
 28095  				break
 28096  			}
 28097  			b.Reset(block.BlockFirst)
 28098  			b.SwapSuccessors()
 28099  			return true
 28100  		}
 28101  		// match: (UGE (InvertFlags cmp) yes no)
 28102  		// result: (ULE cmp yes no)
 28103  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 28104  			v_0 := b.Controls[0]
 28105  			cmp := v_0.Args[0]
 28106  			b.ResetWithControl(block.BlockARM64ULE, cmp)
 28107  			return true
 28108  		}
 28109  	case block.BlockARM64UGT:
 28110  		// match: (UGT (CMPconst [0] x))
 28111  		// result: (NE (CMPconst [0] x))
 28112  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 28113  			v_0 := b.Controls[0]
 28114  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 28115  				break
 28116  			}
 28117  			x := v_0.Args[0]
 28118  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 28119  			v0.AuxInt = ssa.Int64ToAuxInt(0)
 28120  			v0.AddArg(x)
 28121  			b.ResetWithControl(block.BlockARM64NE, v0)
 28122  			return true
 28123  		}
 28124  		// match: (UGT (CMPWconst [0] x))
 28125  		// result: (NE (CMPWconst [0] x))
 28126  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 28127  			v_0 := b.Controls[0]
 28128  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 28129  				break
 28130  			}
 28131  			x := v_0.Args[0]
 28132  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 28133  			v0.AuxInt = ssa.Int32ToAuxInt(0)
 28134  			v0.AddArg(x)
 28135  			b.ResetWithControl(block.BlockARM64NE, v0)
 28136  			return true
 28137  		}
 28138  		// match: (UGT (FlagConstant [fc]) yes no)
 28139  		// cond: fc.Ugt()
 28140  		// result: (First yes no)
 28141  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 28142  			v_0 := b.Controls[0]
 28143  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28144  			if !(fc.Ugt()) {
 28145  				break
 28146  			}
 28147  			b.Reset(block.BlockFirst)
 28148  			return true
 28149  		}
 28150  		// match: (UGT (FlagConstant [fc]) yes no)
 28151  		// cond: !fc.Ugt()
 28152  		// result: (First no yes)
 28153  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 28154  			v_0 := b.Controls[0]
 28155  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28156  			if !(!fc.Ugt()) {
 28157  				break
 28158  			}
 28159  			b.Reset(block.BlockFirst)
 28160  			b.SwapSuccessors()
 28161  			return true
 28162  		}
 28163  		// match: (UGT (InvertFlags cmp) yes no)
 28164  		// result: (ULT cmp yes no)
 28165  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 28166  			v_0 := b.Controls[0]
 28167  			cmp := v_0.Args[0]
 28168  			b.ResetWithControl(block.BlockARM64ULT, cmp)
 28169  			return true
 28170  		}
 28171  	case block.BlockARM64ULE:
 28172  		// match: (ULE (CMPconst [0] x))
 28173  		// result: (EQ (CMPconst [0] x))
 28174  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 28175  			v_0 := b.Controls[0]
 28176  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 28177  				break
 28178  			}
 28179  			x := v_0.Args[0]
 28180  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 28181  			v0.AuxInt = ssa.Int64ToAuxInt(0)
 28182  			v0.AddArg(x)
 28183  			b.ResetWithControl(block.BlockARM64EQ, v0)
 28184  			return true
 28185  		}
 28186  		// match: (ULE (CMPWconst [0] x))
 28187  		// result: (EQ (CMPWconst [0] x))
 28188  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 28189  			v_0 := b.Controls[0]
 28190  			if ssa.AuxIntToInt32(v_0.AuxInt) != 0 {
 28191  				break
 28192  			}
 28193  			x := v_0.Args[0]
 28194  			v0 := b.NewValue0(v_0.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 28195  			v0.AuxInt = ssa.Int32ToAuxInt(0)
 28196  			v0.AddArg(x)
 28197  			b.ResetWithControl(block.BlockARM64EQ, v0)
 28198  			return true
 28199  		}
 28200  		// match: (ULE (FlagConstant [fc]) yes no)
 28201  		// cond: fc.Ule()
 28202  		// result: (First yes no)
 28203  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 28204  			v_0 := b.Controls[0]
 28205  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28206  			if !(fc.Ule()) {
 28207  				break
 28208  			}
 28209  			b.Reset(block.BlockFirst)
 28210  			return true
 28211  		}
 28212  		// match: (ULE (FlagConstant [fc]) yes no)
 28213  		// cond: !fc.Ule()
 28214  		// result: (First no yes)
 28215  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 28216  			v_0 := b.Controls[0]
 28217  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28218  			if !(!fc.Ule()) {
 28219  				break
 28220  			}
 28221  			b.Reset(block.BlockFirst)
 28222  			b.SwapSuccessors()
 28223  			return true
 28224  		}
 28225  		// match: (ULE (InvertFlags cmp) yes no)
 28226  		// result: (UGE cmp yes no)
 28227  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 28228  			v_0 := b.Controls[0]
 28229  			cmp := v_0.Args[0]
 28230  			b.ResetWithControl(block.BlockARM64UGE, cmp)
 28231  			return true
 28232  		}
 28233  	case block.BlockARM64ULT:
 28234  		// match: (ULT (CMPWconst [128] x) yes no)
 28235  		// cond: ssa.ZeroUpper56Bits(x)
 28236  		// result: (TBZ [7] x yes no)
 28237  		for b.Controls[0].Op == ssaop.OpARM64CMPWconst {
 28238  			v_0 := b.Controls[0]
 28239  			if ssa.AuxIntToInt32(v_0.AuxInt) != 128 {
 28240  				break
 28241  			}
 28242  			x := v_0.Args[0]
 28243  			if !(ssa.ZeroUpper56Bits(x)) {
 28244  				break
 28245  			}
 28246  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28247  			b.AuxInt = ssa.Int64ToAuxInt(7)
 28248  			return true
 28249  		}
 28250  		// match: (ULT (CMPconst [128] x) yes no)
 28251  		// cond: ssa.ZeroUpper56Bits(x)
 28252  		// result: (TBZ [7] x yes no)
 28253  		for b.Controls[0].Op == ssaop.OpARM64CMPconst {
 28254  			v_0 := b.Controls[0]
 28255  			if ssa.AuxIntToInt64(v_0.AuxInt) != 128 {
 28256  				break
 28257  			}
 28258  			x := v_0.Args[0]
 28259  			if !(ssa.ZeroUpper56Bits(x)) {
 28260  				break
 28261  			}
 28262  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28263  			b.AuxInt = ssa.Int64ToAuxInt(7)
 28264  			return true
 28265  		}
 28266  		// match: (ULT (FlagConstant [fc]) yes no)
 28267  		// cond: fc.Ult()
 28268  		// result: (First yes no)
 28269  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 28270  			v_0 := b.Controls[0]
 28271  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28272  			if !(fc.Ult()) {
 28273  				break
 28274  			}
 28275  			b.Reset(block.BlockFirst)
 28276  			return true
 28277  		}
 28278  		// match: (ULT (FlagConstant [fc]) yes no)
 28279  		// cond: !fc.Ult()
 28280  		// result: (First no yes)
 28281  		for b.Controls[0].Op == ssaop.OpARM64FlagConstant {
 28282  			v_0 := b.Controls[0]
 28283  			fc := ssa.AuxIntToFlagConstant(v_0.AuxInt)
 28284  			if !(!fc.Ult()) {
 28285  				break
 28286  			}
 28287  			b.Reset(block.BlockFirst)
 28288  			b.SwapSuccessors()
 28289  			return true
 28290  		}
 28291  		// match: (ULT (InvertFlags cmp) yes no)
 28292  		// result: (UGT cmp yes no)
 28293  		for b.Controls[0].Op == ssaop.OpARM64InvertFlags {
 28294  			v_0 := b.Controls[0]
 28295  			cmp := v_0.Args[0]
 28296  			b.ResetWithControl(block.BlockARM64UGT, cmp)
 28297  			return true
 28298  		}
 28299  	case block.BlockARM64Z:
 28300  		// match: (Z sub:(SUB x y))
 28301  		// cond: sub.Uses == 1
 28302  		// result: (EQ (CMP x y))
 28303  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 28304  			sub := b.Controls[0]
 28305  			y := sub.Args[1]
 28306  			x := sub.Args[0]
 28307  			if !(sub.Uses == 1) {
 28308  				break
 28309  			}
 28310  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMP, types.TypeFlags)
 28311  			v0.AddArg2(x, y)
 28312  			b.ResetWithControl(block.BlockARM64EQ, v0)
 28313  			return true
 28314  		}
 28315  		// match: (Z sub:(SUBconst [c] y))
 28316  		// cond: sub.Uses == 1
 28317  		// result: (EQ (CMPconst [c] y))
 28318  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 28319  			sub := b.Controls[0]
 28320  			c := ssa.AuxIntToInt64(sub.AuxInt)
 28321  			y := sub.Args[0]
 28322  			if !(sub.Uses == 1) {
 28323  				break
 28324  			}
 28325  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPconst, types.TypeFlags)
 28326  			v0.AuxInt = ssa.Int64ToAuxInt(c)
 28327  			v0.AddArg(y)
 28328  			b.ResetWithControl(block.BlockARM64EQ, v0)
 28329  			return true
 28330  		}
 28331  		// match: (Z (ANDconst [c] x) yes no)
 28332  		// cond: ssa.OneBit(c)
 28333  		// result: (TBZ [int64(ssa.Ntz64(c))] x yes no)
 28334  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 28335  			v_0 := b.Controls[0]
 28336  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 28337  			x := v_0.Args[0]
 28338  			if !(ssa.OneBit(c)) {
 28339  				break
 28340  			}
 28341  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28342  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(c)))
 28343  			return true
 28344  		}
 28345  		// match: (Z s:(SRLconst [63] x) yes no)
 28346  		// cond: s.Uses == 1
 28347  		// result: (TBZ [63] x yes no)
 28348  		for b.Controls[0].Op == ssaop.OpARM64SRLconst {
 28349  			s := b.Controls[0]
 28350  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 28351  				break
 28352  			}
 28353  			x := s.Args[0]
 28354  			if !(s.Uses == 1) {
 28355  				break
 28356  			}
 28357  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28358  			b.AuxInt = ssa.Int64ToAuxInt(63)
 28359  			return true
 28360  		}
 28361  		// match: (Z s:(SRAconst [63] x) yes no)
 28362  		// cond: s.Uses == 1
 28363  		// result: (TBZ [63] x yes no)
 28364  		for b.Controls[0].Op == ssaop.OpARM64SRAconst {
 28365  			s := b.Controls[0]
 28366  			if ssa.AuxIntToInt64(s.AuxInt) != 63 {
 28367  				break
 28368  			}
 28369  			x := s.Args[0]
 28370  			if !(s.Uses == 1) {
 28371  				break
 28372  			}
 28373  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28374  			b.AuxInt = ssa.Int64ToAuxInt(63)
 28375  			return true
 28376  		}
 28377  		// match: (Z (MOVDconst [0]) yes no)
 28378  		// result: (First yes no)
 28379  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 28380  			v_0 := b.Controls[0]
 28381  			if ssa.AuxIntToInt64(v_0.AuxInt) != 0 {
 28382  				break
 28383  			}
 28384  			b.Reset(block.BlockFirst)
 28385  			return true
 28386  		}
 28387  		// match: (Z (MOVDconst [c]) yes no)
 28388  		// cond: c != 0
 28389  		// result: (First no yes)
 28390  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 28391  			v_0 := b.Controls[0]
 28392  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 28393  			if !(c != 0) {
 28394  				break
 28395  			}
 28396  			b.Reset(block.BlockFirst)
 28397  			b.SwapSuccessors()
 28398  			return true
 28399  		}
 28400  	case block.BlockARM64ZW:
 28401  		// match: (ZW sub:(SUB x y))
 28402  		// cond: sub.Uses == 1
 28403  		// result: (EQ (CMPW x y))
 28404  		for b.Controls[0].Op == ssaop.OpARM64SUB {
 28405  			sub := b.Controls[0]
 28406  			y := sub.Args[1]
 28407  			x := sub.Args[0]
 28408  			if !(sub.Uses == 1) {
 28409  				break
 28410  			}
 28411  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPW, types.TypeFlags)
 28412  			v0.AddArg2(x, y)
 28413  			b.ResetWithControl(block.BlockARM64EQ, v0)
 28414  			return true
 28415  		}
 28416  		// match: (ZW sub:(SUBconst [c] y))
 28417  		// cond: sub.Uses == 1
 28418  		// result: (EQ (CMPWconst [int32(c)] y))
 28419  		for b.Controls[0].Op == ssaop.OpARM64SUBconst {
 28420  			sub := b.Controls[0]
 28421  			c := ssa.AuxIntToInt64(sub.AuxInt)
 28422  			y := sub.Args[0]
 28423  			if !(sub.Uses == 1) {
 28424  				break
 28425  			}
 28426  			v0 := b.NewValue0(sub.Pos, ssaop.OpARM64CMPWconst, types.TypeFlags)
 28427  			v0.AuxInt = ssa.Int32ToAuxInt(int32(c))
 28428  			v0.AddArg(y)
 28429  			b.ResetWithControl(block.BlockARM64EQ, v0)
 28430  			return true
 28431  		}
 28432  		// match: (ZW (ANDconst [c] x) yes no)
 28433  		// cond: ssa.OneBit(int64(uint32(c)))
 28434  		// result: (TBZ [int64(ssa.Ntz64(int64(uint32(c))))] x yes no)
 28435  		for b.Controls[0].Op == ssaop.OpARM64ANDconst {
 28436  			v_0 := b.Controls[0]
 28437  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 28438  			x := v_0.Args[0]
 28439  			if !(ssa.OneBit(int64(uint32(c)))) {
 28440  				break
 28441  			}
 28442  			b.ResetWithControl(block.BlockARM64TBZ, x)
 28443  			b.AuxInt = ssa.Int64ToAuxInt(int64(ssa.Ntz64(int64(uint32(c)))))
 28444  			return true
 28445  		}
 28446  		// match: (ZW (MOVDconst [c]) yes no)
 28447  		// cond: int32(c) == 0
 28448  		// result: (First yes no)
 28449  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 28450  			v_0 := b.Controls[0]
 28451  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 28452  			if !(int32(c) == 0) {
 28453  				break
 28454  			}
 28455  			b.Reset(block.BlockFirst)
 28456  			return true
 28457  		}
 28458  		// match: (ZW (MOVDconst [c]) yes no)
 28459  		// cond: int32(c) != 0
 28460  		// result: (First no yes)
 28461  		for b.Controls[0].Op == ssaop.OpARM64MOVDconst {
 28462  			v_0 := b.Controls[0]
 28463  			c := ssa.AuxIntToInt64(v_0.AuxInt)
 28464  			if !(int32(c) != 0) {
 28465  				break
 28466  			}
 28467  			b.Reset(block.BlockFirst)
 28468  			b.SwapSuccessors()
 28469  			return true
 28470  		}
 28471  	}
 28472  	return false
 28473  }
 28474  

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