a.out.go

     1  // cmd/7c/7.out.h  from Vita Nuova.
     2  // https://bitbucket.org/plan9-from-bell-labs/9-cc/src/master/src/cmd/7c/7.out.h
     3  //
     4  // 	Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.
     5  // 	Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
     6  // 	Portions Copyright © 1997-1999 Vita Nuova Limited
     7  // 	Portions Copyright © 2000-2007 Vita Nuova Holdings Limited (www.vitanuova.com)
     8  // 	Portions Copyright © 2004,2006 Bruce Ellis
     9  // 	Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
    10  // 	Revisions Copyright © 2000-2007 Lucent Technologies Inc. and others
    11  // 	Portions Copyright © 2009 The Go Authors. All rights reserved.
    12  //
    13  // Permission is hereby granted, free of charge, to any person obtaining a copy
    14  // of this software and associated documentation files (the "Software"), to deal
    15  // in the Software without restriction, including without limitation the rights
    16  // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    17  // copies of the Software, and to permit persons to whom the Software is
    18  // furnished to do so, subject to the following conditions:
    19  //
    20  // The above copyright notice and this permission notice shall be included in
    21  // all copies or substantial portions of the Software.
    22  //
    23  // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    24  // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    25  // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
    26  // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
    27  // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
    28  // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
    29  // THE SOFTWARE.
    30  
    31  package arm64
    32  
    33  import "cmd/internal/obj"
    34  
    35  const (
    36  	NSNAME = 8
    37  	NSYM   = 50
    38  	NREG   = 32 /* number of general registers */
    39  	NFREG  = 32 /* number of floating point registers */
    40  )
    41  
    42  // General purpose registers, kept in the low bits of Prog.Reg.
    43  const (
    44  	// integer
    45  	REG_R0 = obj.RBaseARM64 + iota
    46  	REG_R1
    47  	REG_R2
    48  	REG_R3
    49  	REG_R4
    50  	REG_R5
    51  	REG_R6
    52  	REG_R7
    53  	REG_R8
    54  	REG_R9
    55  	REG_R10
    56  	REG_R11
    57  	REG_R12
    58  	REG_R13
    59  	REG_R14
    60  	REG_R15
    61  	REG_R16
    62  	REG_R17
    63  	REG_R18
    64  	REG_R19
    65  	REG_R20
    66  	REG_R21
    67  	REG_R22
    68  	REG_R23
    69  	REG_R24
    70  	REG_R25
    71  	REG_R26
    72  	REG_R27
    73  	REG_R28
    74  	REG_R29
    75  	REG_R30
    76  	REG_R31
    77  
    78  	// scalar floating point
    79  	REG_F0
    80  	REG_F1
    81  	REG_F2
    82  	REG_F3
    83  	REG_F4
    84  	REG_F5
    85  	REG_F6
    86  	REG_F7
    87  	REG_F8
    88  	REG_F9
    89  	REG_F10
    90  	REG_F11
    91  	REG_F12
    92  	REG_F13
    93  	REG_F14
    94  	REG_F15
    95  	REG_F16
    96  	REG_F17
    97  	REG_F18
    98  	REG_F19
    99  	REG_F20
   100  	REG_F21
   101  	REG_F22
   102  	REG_F23
   103  	REG_F24
   104  	REG_F25
   105  	REG_F26
   106  	REG_F27
   107  	REG_F28
   108  	REG_F29
   109  	REG_F30
   110  	REG_F31
   111  
   112  	// SIMD
   113  	REG_V0
   114  	REG_V1
   115  	REG_V2
   116  	REG_V3
   117  	REG_V4
   118  	REG_V5
   119  	REG_V6
   120  	REG_V7
   121  	REG_V8
   122  	REG_V9
   123  	REG_V10
   124  	REG_V11
   125  	REG_V12
   126  	REG_V13
   127  	REG_V14
   128  	REG_V15
   129  	REG_V16
   130  	REG_V17
   131  	REG_V18
   132  	REG_V19
   133  	REG_V20
   134  	REG_V21
   135  	REG_V22
   136  	REG_V23
   137  	REG_V24
   138  	REG_V25
   139  	REG_V26
   140  	REG_V27
   141  	REG_V28
   142  	REG_V29
   143  	REG_V30
   144  	REG_V31
   145  
   146  	REG_RSP = REG_V31 + 32 // to differentiate ZR/SP, REG_RSP&0x1f = 31
   147  )
   148  
   149  // bits 0-4 indicates register: Vn
   150  // bits 5-8 indicates arrangement: <T>
   151  const (
   152  	REG_ARNG = obj.RBaseARM64 + 1<<10 + iota<<9 // Vn.<T>
   153  	REG_ELEM                                    // Vn.<T>[index]
   154  	REG_ELEM_END
   155  )
   156  
   157  // Not registers, but flags that can be combined with regular register
   158  // constants to indicate extended register conversion. When checking,
   159  // you should subtract obj.RBaseARM64 first. From this difference, bit 11
   160  // indicates extended register, bits 8-10 select the conversion mode.
   161  // REG_LSL is the index shift specifier, bit 9 indicates shifted offset register.
   162  const REG_LSL = obj.RBaseARM64 + 1<<9
   163  const REG_EXT = obj.RBaseARM64 + 1<<11
   164  
   165  const (
   166  	REG_UXTB = REG_EXT + iota<<8
   167  	REG_UXTH
   168  	REG_UXTW
   169  	REG_UXTX
   170  	REG_SXTB
   171  	REG_SXTH
   172  	REG_SXTW
   173  	REG_SXTX
   174  )
   175  
   176  // Special registers, after subtracting obj.RBaseARM64, bit 12 indicates
   177  // a special register and the low bits select the register.
   178  // SYSREG_END is the last item in the automatically generated system register
   179  // declaration, and it is defined in the sysRegEnc.go file.
   180  // Define the special register after REG_SPECIAL, the first value of it should be
   181  // REG_{name} = SYSREG_END + iota.
   182  const (
   183  	REG_SPECIAL = obj.RBaseARM64 + 1<<12
   184  )
   185  
   186  // Register assignments:
   187  //
   188  // compiler allocates R0 up as temps
   189  // compiler allocates register variables R7-R25
   190  // compiler allocates external registers R26 down
   191  //
   192  // compiler allocates register variables F7-F26
   193  // compiler allocates external registers F26 down
   194  const (
   195  	REGMIN = REG_R7  // register variables allocated from here to REGMAX
   196  	REGRT1 = REG_R16 // ARM64 IP0, external linker may use as a scratch register in trampoline
   197  	REGRT2 = REG_R17 // ARM64 IP1, external linker may use as a scratch register in trampoline
   198  	REGPR  = REG_R18 // ARM64 platform register, unused in the Go toolchain
   199  	REGMAX = REG_R25
   200  
   201  	REGCTXT = REG_R26 // environment for closures
   202  	REGTMP  = REG_R27 // reserved for liblink
   203  	REGG    = REG_R28 // G
   204  	REGFP   = REG_R29 // frame pointer
   205  	REGLINK = REG_R30
   206  
   207  	// ARM64 uses R31 as both stack pointer and zero register,
   208  	// depending on the instruction. To differentiate RSP from ZR,
   209  	// we use a different numeric value for REGZERO and REGSP.
   210  	REGZERO = REG_R31
   211  	REGSP   = REG_RSP
   212  
   213  	FREGRET = REG_F0
   214  	FREGMIN = REG_F7  // first register variable
   215  	FREGMAX = REG_F26 // last register variable for 7g only
   216  	FREGEXT = REG_F26 // first external register
   217  )
   218  
   219  // http://infocenter.arm.com/help/topic/com.arm.doc.ecm0665627/abi_sve_aadwarf_100985_0000_00_en.pdf
   220  var ARM64DWARFRegisters = map[int16]int16{
   221  	REG_R0:  0,
   222  	REG_R1:  1,
   223  	REG_R2:  2,
   224  	REG_R3:  3,
   225  	REG_R4:  4,
   226  	REG_R5:  5,
   227  	REG_R6:  6,
   228  	REG_R7:  7,
   229  	REG_R8:  8,
   230  	REG_R9:  9,
   231  	REG_R10: 10,
   232  	REG_R11: 11,
   233  	REG_R12: 12,
   234  	REG_R13: 13,
   235  	REG_R14: 14,
   236  	REG_R15: 15,
   237  	REG_R16: 16,
   238  	REG_R17: 17,
   239  	REG_R18: 18,
   240  	REG_R19: 19,
   241  	REG_R20: 20,
   242  	REG_R21: 21,
   243  	REG_R22: 22,
   244  	REG_R23: 23,
   245  	REG_R24: 24,
   246  	REG_R25: 25,
   247  	REG_R26: 26,
   248  	REG_R27: 27,
   249  	REG_R28: 28,
   250  	REG_R29: 29,
   251  	REG_R30: 30,
   252  
   253  	// floating point
   254  	REG_F0:  64,
   255  	REG_F1:  65,
   256  	REG_F2:  66,
   257  	REG_F3:  67,
   258  	REG_F4:  68,
   259  	REG_F5:  69,
   260  	REG_F6:  70,
   261  	REG_F7:  71,
   262  	REG_F8:  72,
   263  	REG_F9:  73,
   264  	REG_F10: 74,
   265  	REG_F11: 75,
   266  	REG_F12: 76,
   267  	REG_F13: 77,
   268  	REG_F14: 78,
   269  	REG_F15: 79,
   270  	REG_F16: 80,
   271  	REG_F17: 81,
   272  	REG_F18: 82,
   273  	REG_F19: 83,
   274  	REG_F20: 84,
   275  	REG_F21: 85,
   276  	REG_F22: 86,
   277  	REG_F23: 87,
   278  	REG_F24: 88,
   279  	REG_F25: 89,
   280  	REG_F26: 90,
   281  	REG_F27: 91,
   282  	REG_F28: 92,
   283  	REG_F29: 93,
   284  	REG_F30: 94,
   285  	REG_F31: 95,
   286  
   287  	// SIMD
   288  	REG_V0:  64,
   289  	REG_V1:  65,
   290  	REG_V2:  66,
   291  	REG_V3:  67,
   292  	REG_V4:  68,
   293  	REG_V5:  69,
   294  	REG_V6:  70,
   295  	REG_V7:  71,
   296  	REG_V8:  72,
   297  	REG_V9:  73,
   298  	REG_V10: 74,
   299  	REG_V11: 75,
   300  	REG_V12: 76,
   301  	REG_V13: 77,
   302  	REG_V14: 78,
   303  	REG_V15: 79,
   304  	REG_V16: 80,
   305  	REG_V17: 81,
   306  	REG_V18: 82,
   307  	REG_V19: 83,
   308  	REG_V20: 84,
   309  	REG_V21: 85,
   310  	REG_V22: 86,
   311  	REG_V23: 87,
   312  	REG_V24: 88,
   313  	REG_V25: 89,
   314  	REG_V26: 90,
   315  	REG_V27: 91,
   316  	REG_V28: 92,
   317  	REG_V29: 93,
   318  	REG_V30: 94,
   319  	REG_V31: 95,
   320  }
   321  
   322  const (
   323  	BIG = 2048 - 8
   324  )
   325  
   326  const (
   327  	/* mark flags */
   328  	LABEL = 1 << iota
   329  	LEAF
   330  	FLOAT
   331  	BRANCH
   332  	LOAD
   333  	FCMP
   334  	SYNC
   335  	LIST
   336  	FOLL
   337  	NOSCHED
   338  )
   339  
   340  //go:generate go run ../mkcnames.go -i a.out.go -o anames7.go -p arm64
   341  const (
   342  	// optab is sorted based on the order of these constants
   343  	// and the first match is chosen.
   344  	// The more specific class needs to come earlier.
   345  	C_NONE   = iota + 1 // starting from 1, leave unclassified Addr's class as 0
   346  	C_REG               // R0..R30
   347  	C_ZREG              // R0..R30, ZR
   348  	C_RSP               // R0..R30, RSP
   349  	C_FREG              // F0..F31
   350  	C_VREG              // V0..V31
   351  	C_PAIR              // (Rn, Rm)
   352  	C_SHIFT             // Rn<<2
   353  	C_EXTREG            // Rn.UXTB[<<3]
   354  	C_SPR               // REG_NZCV
   355  	C_COND              // condition code, EQ, NE, etc.
   356  	C_SPOP              // special operand, PLDL1KEEP, VMALLE1IS, etc.
   357  	C_ARNG              // Vn.<T>
   358  	C_ELEM              // Vn.<T>[index]
   359  	C_LIST              // [V1, V2, V3]
   360  
   361  	C_ZCON     // $0
   362  	C_ABCON0   // could be C_ADDCON0 or C_BITCON
   363  	C_ADDCON0  // 12-bit unsigned, unshifted
   364  	C_ABCON    // could be C_ADDCON or C_BITCON
   365  	C_AMCON    // could be C_ADDCON or C_MOVCON
   366  	C_ADDCON   // 12-bit unsigned, shifted left by 0 or 12
   367  	C_MBCON    // could be C_MOVCON or C_BITCON
   368  	C_MOVCON   // generated by a 16-bit constant, optionally inverted and/or shifted by multiple of 16
   369  	C_BITCON   // bitfield and logical immediate masks
   370  	C_ADDCON2  // 24-bit constant
   371  	C_LCON     // 32-bit constant
   372  	C_MOVCON2  // a constant that can be loaded with one MOVZ/MOVN and one MOVK
   373  	C_MOVCON3  // a constant that can be loaded with one MOVZ/MOVN and two MOVKs
   374  	C_VCON     // 64-bit constant
   375  	C_FCON     // floating-point constant
   376  	C_VCONADDR // 64-bit memory address
   377  
   378  	C_AACON  // ADDCON offset in auto constant $a(FP)
   379  	C_AACON2 // 24-bit offset in auto constant $a(FP)
   380  	C_LACON  // 32-bit offset in auto constant $a(FP)
   381  	C_AECON  // ADDCON offset in extern constant $e(SB)
   382  
   383  	// TODO(aram): only one branch class should be enough
   384  	C_SBRA // for TYPE_BRANCH
   385  	C_LBRA
   386  
   387  	C_ZAUTO       // 0(RSP)
   388  	C_NSAUTO_16   // -256 <= x < 0, 0 mod 16
   389  	C_NSAUTO_8    // -256 <= x < 0, 0 mod 8
   390  	C_NSAUTO_4    // -256 <= x < 0, 0 mod 4
   391  	C_NSAUTO      // -256 <= x < 0
   392  	C_NPAUTO_16   // -512 <= x < 0, 0 mod 16
   393  	C_NPAUTO      // -512 <= x < 0, 0 mod 8
   394  	C_NQAUTO_16   // -1024 <= x < 0, 0 mod 16
   395  	C_NAUTO4K     // -4095 <= x < 0
   396  	C_PSAUTO_16   // 0 to 255, 0 mod 16
   397  	C_PSAUTO_8    // 0 to 255, 0 mod 8
   398  	C_PSAUTO_4    // 0 to 255, 0 mod 4
   399  	C_PSAUTO      // 0 to 255
   400  	C_PPAUTO_16   // 0 to 504, 0 mod 16
   401  	C_PPAUTO      // 0 to 504, 0 mod 8
   402  	C_PQAUTO_16   // 0 to 1008, 0 mod 16
   403  	C_UAUTO4K_16  // 0 to 4095, 0 mod 16
   404  	C_UAUTO4K_8   // 0 to 4095, 0 mod 8
   405  	C_UAUTO4K_4   // 0 to 4095, 0 mod 4
   406  	C_UAUTO4K_2   // 0 to 4095, 0 mod 2
   407  	C_UAUTO4K     // 0 to 4095
   408  	C_UAUTO8K_16  // 0 to 8190, 0 mod 16
   409  	C_UAUTO8K_8   // 0 to 8190, 0 mod 8
   410  	C_UAUTO8K_4   // 0 to 8190, 0 mod 4
   411  	C_UAUTO8K     // 0 to 8190, 0 mod 2  + C_PSAUTO
   412  	C_UAUTO16K_16 // 0 to 16380, 0 mod 16
   413  	C_UAUTO16K_8  // 0 to 16380, 0 mod 8
   414  	C_UAUTO16K    // 0 to 16380, 0 mod 4 + C_PSAUTO
   415  	C_UAUTO32K_16 // 0 to 32760, 0 mod 16 + C_PSAUTO
   416  	C_UAUTO32K    // 0 to 32760, 0 mod 8 + C_PSAUTO
   417  	C_UAUTO64K    // 0 to 65520, 0 mod 16 + C_PSAUTO
   418  	C_LAUTOPOOL   // any other constant up to 64 bits (needs pool literal)
   419  	C_LAUTO       // any other constant up to 64 bits
   420  
   421  	C_SEXT1  // 0 to 4095, direct
   422  	C_SEXT2  // 0 to 8190
   423  	C_SEXT4  // 0 to 16380
   424  	C_SEXT8  // 0 to 32760
   425  	C_SEXT16 // 0 to 65520
   426  	C_LEXT
   427  
   428  	C_ZOREG     // 0(R)
   429  	C_NSOREG_16 // must mirror C_NSAUTO_16, etc
   430  	C_NSOREG_8
   431  	C_NSOREG_4
   432  	C_NSOREG
   433  	C_NPOREG_16
   434  	C_NPOREG
   435  	C_NQOREG_16
   436  	C_NOREG4K
   437  	C_PSOREG_16
   438  	C_PSOREG_8
   439  	C_PSOREG_4
   440  	C_PSOREG
   441  	C_PPOREG_16
   442  	C_PPOREG
   443  	C_PQOREG_16
   444  	C_UOREG4K_16
   445  	C_UOREG4K_8
   446  	C_UOREG4K_4
   447  	C_UOREG4K_2
   448  	C_UOREG4K
   449  	C_UOREG8K_16
   450  	C_UOREG8K_8
   451  	C_UOREG8K_4
   452  	C_UOREG8K
   453  	C_UOREG16K_16
   454  	C_UOREG16K_8
   455  	C_UOREG16K
   456  	C_UOREG32K_16
   457  	C_UOREG32K
   458  	C_UOREG64K
   459  	C_LOREGPOOL
   460  	C_LOREG
   461  
   462  	C_ADDR // TODO(aram): explain difference from C_VCONADDR
   463  
   464  	// The GOT slot for a symbol in -dynlink mode.
   465  	C_GOTADDR
   466  
   467  	// TLS "var" in local exec mode: will become a constant offset from
   468  	// thread local base that is ultimately chosen by the program linker.
   469  	C_TLS_LE
   470  
   471  	// TLS "var" in initial exec mode: will become a memory address (chosen
   472  	// by the program linker) that the dynamic linker will fill with the
   473  	// offset from the thread local base.
   474  	C_TLS_IE
   475  
   476  	C_ROFF // register offset (including register extended)
   477  
   478  	C_GOK
   479  	C_TEXTSIZE
   480  	C_NCLASS // must be last
   481  )
   482  
   483  const (
   484  	C_XPRE  = 1 << 6 // match arm.C_WBIT, so Prog.String know how to print it
   485  	C_XPOST = 1 << 5 // match arm.C_PBIT, so Prog.String know how to print it
   486  )
   487  
   488  //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p arm64
   489  
   490  const (
   491  	AADC = obj.ABaseARM64 + obj.A_ARCHSPECIFIC + iota
   492  	AADCS
   493  	AADCSW
   494  	AADCW
   495  	AADD
   496  	AADDS
   497  	AADDSW
   498  	AADDW
   499  	AADR
   500  	AADRP
   501  	AAESD
   502  	AAESE
   503  	AAESIMC
   504  	AAESMC
   505  	AAND
   506  	AANDS
   507  	AANDSW
   508  	AANDW
   509  	AASR
   510  	AASRW
   511  	AAT
   512  	ABCC
   513  	ABCS
   514  	ABEQ
   515  	ABFI
   516  	ABFIW
   517  	ABFM
   518  	ABFMW
   519  	ABFXIL
   520  	ABFXILW
   521  	ABGE
   522  	ABGT
   523  	ABHI
   524  	ABHS
   525  	ABIC
   526  	ABICS
   527  	ABICSW
   528  	ABICW
   529  	ABLE
   530  	ABLO
   531  	ABLS
   532  	ABLT
   533  	ABMI
   534  	ABNE
   535  	ABPL
   536  	ABRK
   537  	ABVC
   538  	ABVS
   539  	ACASAD
   540  	ACASALB
   541  	ACASALD
   542  	ACASALH
   543  	ACASALW
   544  	ACASAW
   545  	ACASB
   546  	ACASD
   547  	ACASH
   548  	ACASLD
   549  	ACASLW
   550  	ACASPD
   551  	ACASPW
   552  	ACASW
   553  	ACBNZ
   554  	ACBNZW
   555  	ACBZ
   556  	ACBZW
   557  	ACCMN
   558  	ACCMNW
   559  	ACCMP
   560  	ACCMPW
   561  	ACINC
   562  	ACINCW
   563  	ACINV
   564  	ACINVW
   565  	ACLREX
   566  	ACLS
   567  	ACLSW
   568  	ACLZ
   569  	ACLZW
   570  	ACMN
   571  	ACMNW
   572  	ACMP
   573  	ACMPW
   574  	ACNEG
   575  	ACNEGW
   576  	ACRC32B
   577  	ACRC32CB
   578  	ACRC32CH
   579  	ACRC32CW
   580  	ACRC32CX
   581  	ACRC32H
   582  	ACRC32W
   583  	ACRC32X
   584  	ACSEL
   585  	ACSELW
   586  	ACSET
   587  	ACSETM
   588  	ACSETMW
   589  	ACSETW
   590  	ACSINC
   591  	ACSINCW
   592  	ACSINV
   593  	ACSINVW
   594  	ACSNEG
   595  	ACSNEGW
   596  	ADC
   597  	ADCPS1
   598  	ADCPS2
   599  	ADCPS3
   600  	ADMB
   601  	ADRPS
   602  	ADSB
   603  	ADWORD
   604  	AEON
   605  	AEONW
   606  	AEOR
   607  	AEORW
   608  	AERET
   609  	AEXTR
   610  	AEXTRW
   611  	AFABSD
   612  	AFABSS
   613  	AFADDD
   614  	AFADDS
   615  	AFCCMPD
   616  	AFCCMPED
   617  	AFCCMPES
   618  	AFCCMPS
   619  	AFCMPD
   620  	AFCMPED
   621  	AFCMPES
   622  	AFCMPS
   623  	AFCSELD
   624  	AFCSELS
   625  	AFCVTDH
   626  	AFCVTDS
   627  	AFCVTHD
   628  	AFCVTHS
   629  	AFCVTSD
   630  	AFCVTSH
   631  	AFCVTZSD
   632  	AFCVTZSDW
   633  	AFCVTZSS
   634  	AFCVTZSSW
   635  	AFCVTZUD
   636  	AFCVTZUDW
   637  	AFCVTZUS
   638  	AFCVTZUSW
   639  	AFDIVD
   640  	AFDIVS
   641  	AFLDPD
   642  	AFLDPQ
   643  	AFLDPS
   644  	AFMADDD
   645  	AFMADDS
   646  	AFMAXD
   647  	AFMAXNMD
   648  	AFMAXNMS
   649  	AFMAXS
   650  	AFMIND
   651  	AFMINNMD
   652  	AFMINNMS
   653  	AFMINS
   654  	AFMOVD
   655  	AFMOVQ
   656  	AFMOVS
   657  	AFMSUBD
   658  	AFMSUBS
   659  	AFMULD
   660  	AFMULS
   661  	AFNEGD
   662  	AFNEGS
   663  	AFNMADDD
   664  	AFNMADDS
   665  	AFNMSUBD
   666  	AFNMSUBS
   667  	AFNMULD
   668  	AFNMULS
   669  	AFRINTAD
   670  	AFRINTAS
   671  	AFRINTID
   672  	AFRINTIS
   673  	AFRINTMD
   674  	AFRINTMS
   675  	AFRINTND
   676  	AFRINTNS
   677  	AFRINTPD
   678  	AFRINTPS
   679  	AFRINTXD
   680  	AFRINTXS
   681  	AFRINTZD
   682  	AFRINTZS
   683  	AFSQRTD
   684  	AFSQRTS
   685  	AFSTPD
   686  	AFSTPQ
   687  	AFSTPS
   688  	AFSUBD
   689  	AFSUBS
   690  	AHINT
   691  	AHLT
   692  	AHVC
   693  	AIC
   694  	AISB
   695  	ALDADDAB
   696  	ALDADDAD
   697  	ALDADDAH
   698  	ALDADDALB
   699  	ALDADDALD
   700  	ALDADDALH
   701  	ALDADDALW
   702  	ALDADDAW
   703  	ALDADDB
   704  	ALDADDD
   705  	ALDADDH
   706  	ALDADDLB
   707  	ALDADDLD
   708  	ALDADDLH
   709  	ALDADDLW
   710  	ALDADDW
   711  	ALDAR
   712  	ALDARB
   713  	ALDARH
   714  	ALDARW
   715  	ALDAXP
   716  	ALDAXPW
   717  	ALDAXR
   718  	ALDAXRB
   719  	ALDAXRH
   720  	ALDAXRW
   721  	ALDCLRAB
   722  	ALDCLRAD
   723  	ALDCLRAH
   724  	ALDCLRALB
   725  	ALDCLRALD
   726  	ALDCLRALH
   727  	ALDCLRALW
   728  	ALDCLRAW
   729  	ALDCLRB
   730  	ALDCLRD
   731  	ALDCLRH
   732  	ALDCLRLB
   733  	ALDCLRLD
   734  	ALDCLRLH
   735  	ALDCLRLW
   736  	ALDCLRW
   737  	ALDEORAB
   738  	ALDEORAD
   739  	ALDEORAH
   740  	ALDEORALB
   741  	ALDEORALD
   742  	ALDEORALH
   743  	ALDEORALW
   744  	ALDEORAW
   745  	ALDEORB
   746  	ALDEORD
   747  	ALDEORH
   748  	ALDEORLB
   749  	ALDEORLD
   750  	ALDEORLH
   751  	ALDEORLW
   752  	ALDEORW
   753  	ALDORAB
   754  	ALDORAD
   755  	ALDORAH
   756  	ALDORALB
   757  	ALDORALD
   758  	ALDORALH
   759  	ALDORALW
   760  	ALDORAW
   761  	ALDORB
   762  	ALDORD
   763  	ALDORH
   764  	ALDORLB
   765  	ALDORLD
   766  	ALDORLH
   767  	ALDORLW
   768  	ALDORW
   769  	ALDP
   770  	ALDPSW
   771  	ALDPW
   772  	ALDXP
   773  	ALDXPW
   774  	ALDXR
   775  	ALDXRB
   776  	ALDXRH
   777  	ALDXRW
   778  	ALSL
   779  	ALSLW
   780  	ALSR
   781  	ALSRW
   782  	AMADD
   783  	AMADDW
   784  	AMNEG
   785  	AMNEGW
   786  	AMOVB
   787  	AMOVBU
   788  	AMOVD
   789  	AMOVH
   790  	AMOVHU
   791  	AMOVK
   792  	AMOVKW
   793  	AMOVN
   794  	AMOVNW
   795  	AMOVP
   796  	AMOVPD
   797  	AMOVPQ
   798  	AMOVPS
   799  	AMOVPSW
   800  	AMOVPW
   801  	AMOVW
   802  	AMOVWU
   803  	AMOVZ
   804  	AMOVZW
   805  	AMRS
   806  	AMSR
   807  	AMSUB
   808  	AMSUBW
   809  	AMUL
   810  	AMULW
   811  	AMVN
   812  	AMVNW
   813  	ANEG
   814  	ANEGS
   815  	ANEGSW
   816  	ANEGW
   817  	ANGC
   818  	ANGCS
   819  	ANGCSW
   820  	ANGCW
   821  	ANOOP
   822  	AORN
   823  	AORNW
   824  	AORR
   825  	AORRW
   826  	APRFM
   827  	APRFUM
   828  	ARBIT
   829  	ARBITW
   830  	AREM
   831  	AREMW
   832  	AREV
   833  	AREV16
   834  	AREV16W
   835  	AREV32
   836  	AREVW
   837  	AROR
   838  	ARORW
   839  	ASBC
   840  	ASBCS
   841  	ASBCSW
   842  	ASBCW
   843  	ASBFIZ
   844  	ASBFIZW
   845  	ASBFM
   846  	ASBFMW
   847  	ASBFX
   848  	ASBFXW
   849  	ASCVTFD
   850  	ASCVTFS
   851  	ASCVTFWD
   852  	ASCVTFWS
   853  	ASDIV
   854  	ASDIVW
   855  	ASEV
   856  	ASEVL
   857  	ASHA1C
   858  	ASHA1H
   859  	ASHA1M
   860  	ASHA1P
   861  	ASHA1SU0
   862  	ASHA1SU1
   863  	ASHA256H
   864  	ASHA256H2
   865  	ASHA256SU0
   866  	ASHA256SU1
   867  	ASHA512H
   868  	ASHA512H2
   869  	ASHA512SU0
   870  	ASHA512SU1
   871  	ASMADDL
   872  	ASMC
   873  	ASMNEGL
   874  	ASMSUBL
   875  	ASMULH
   876  	ASMULL
   877  	ASTLR
   878  	ASTLRB
   879  	ASTLRH
   880  	ASTLRW
   881  	ASTLXP
   882  	ASTLXPW
   883  	ASTLXR
   884  	ASTLXRB
   885  	ASTLXRH
   886  	ASTLXRW
   887  	ASTP
   888  	ASTPW
   889  	ASTXP
   890  	ASTXPW
   891  	ASTXR
   892  	ASTXRB
   893  	ASTXRH
   894  	ASTXRW
   895  	ASUB
   896  	ASUBS
   897  	ASUBSW
   898  	ASUBW
   899  	ASVC
   900  	ASWPAB
   901  	ASWPAD
   902  	ASWPAH
   903  	ASWPALB
   904  	ASWPALD
   905  	ASWPALH
   906  	ASWPALW
   907  	ASWPAW
   908  	ASWPB
   909  	ASWPD
   910  	ASWPH
   911  	ASWPLB
   912  	ASWPLD
   913  	ASWPLH
   914  	ASWPLW
   915  	ASWPW
   916  	ASXTB
   917  	ASXTBW
   918  	ASXTH
   919  	ASXTHW
   920  	ASXTW
   921  	ASYS
   922  	ASYSL
   923  	ATBNZ
   924  	ATBZ
   925  	ATLBI
   926  	ATST
   927  	ATSTW
   928  	AUBFIZ
   929  	AUBFIZW
   930  	AUBFM
   931  	AUBFMW
   932  	AUBFX
   933  	AUBFXW
   934  	AUCVTFD
   935  	AUCVTFS
   936  	AUCVTFWD
   937  	AUCVTFWS
   938  	AUDIV
   939  	AUDIVW
   940  	AUMADDL
   941  	AUMNEGL
   942  	AUMSUBL
   943  	AUMULH
   944  	AUMULL
   945  	AUREM
   946  	AUREMW
   947  	AUXTB
   948  	AUXTBW
   949  	AUXTH
   950  	AUXTHW
   951  	AUXTW
   952  	AVADD
   953  	AVADDP
   954  	AVADDV
   955  	AVAND
   956  	AVBCAX
   957  	AVBIF
   958  	AVBIT
   959  	AVBSL
   960  	AVCMEQ
   961  	AVCMTST
   962  	AVCNT
   963  	AVDUP
   964  	AVEOR
   965  	AVEOR3
   966  	AVEXT
   967  	AVFMLA
   968  	AVFMLS
   969  	AVLD1
   970  	AVLD1R
   971  	AVLD2
   972  	AVLD2R
   973  	AVLD3
   974  	AVLD3R
   975  	AVLD4
   976  	AVLD4R
   977  	AVMOV
   978  	AVMOVD
   979  	AVMOVI
   980  	AVMOVQ
   981  	AVMOVS
   982  	AVORR
   983  	AVPMULL
   984  	AVPMULL2
   985  	AVRAX1
   986  	AVRBIT
   987  	AVREV16
   988  	AVREV32
   989  	AVREV64
   990  	AVSHL
   991  	AVSLI
   992  	AVSRI
   993  	AVST1
   994  	AVST2
   995  	AVST3
   996  	AVST4
   997  	AVSUB
   998  	AVTBL
   999  	AVTBX
  1000  	AVTRN1
  1001  	AVTRN2
  1002  	AVUADDLV
  1003  	AVUADDW
  1004  	AVUADDW2
  1005  	AVUMAX
  1006  	AVUMIN
  1007  	AVUSHLL
  1008  	AVUSHLL2
  1009  	AVUSHR
  1010  	AVUSRA
  1011  	AVUXTL
  1012  	AVUXTL2
  1013  	AVUZP1
  1014  	AVUZP2
  1015  	AVXAR
  1016  	AVZIP1
  1017  	AVZIP2
  1018  	AWFE
  1019  	AWFI
  1020  	AWORD
  1021  	AYIELD
  1022  	ALAST
  1023  	AB  = obj.AJMP
  1024  	ABL = obj.ACALL
  1025  )
  1026  
  1027  const (
  1028  	// shift types
  1029  	SHIFT_LL  = 0 << 22
  1030  	SHIFT_LR  = 1 << 22
  1031  	SHIFT_AR  = 2 << 22
  1032  	SHIFT_ROR = 3 << 22
  1033  )
  1034  
  1035  // Arrangement for ARM64 SIMD instructions
  1036  const (
  1037  	// arrangement types
  1038  	ARNG_8B = iota
  1039  	ARNG_16B
  1040  	ARNG_1D
  1041  	ARNG_4H
  1042  	ARNG_8H
  1043  	ARNG_2S
  1044  	ARNG_4S
  1045  	ARNG_2D
  1046  	ARNG_1Q
  1047  	ARNG_B
  1048  	ARNG_H
  1049  	ARNG_S
  1050  	ARNG_D
  1051  )
  1052  
  1053  //go:generate stringer -type SpecialOperand -trimprefix SPOP_
  1054  type SpecialOperand int
  1055  
  1056  const (
  1057  	// PRFM
  1058  	SPOP_PLDL1KEEP SpecialOperand = iota     // must be the first one
  1059  	SPOP_BEGIN     SpecialOperand = iota - 1 // set as the lower bound
  1060  	SPOP_PLDL1STRM
  1061  	SPOP_PLDL2KEEP
  1062  	SPOP_PLDL2STRM
  1063  	SPOP_PLDL3KEEP
  1064  	SPOP_PLDL3STRM
  1065  	SPOP_PLIL1KEEP
  1066  	SPOP_PLIL1STRM
  1067  	SPOP_PLIL2KEEP
  1068  	SPOP_PLIL2STRM
  1069  	SPOP_PLIL3KEEP
  1070  	SPOP_PLIL3STRM
  1071  	SPOP_PSTL1KEEP
  1072  	SPOP_PSTL1STRM
  1073  	SPOP_PSTL2KEEP
  1074  	SPOP_PSTL2STRM
  1075  	SPOP_PSTL3KEEP
  1076  	SPOP_PSTL3STRM
  1077  
  1078  	// TLBI
  1079  	SPOP_VMALLE1IS
  1080  	SPOP_VAE1IS
  1081  	SPOP_ASIDE1IS
  1082  	SPOP_VAAE1IS
  1083  	SPOP_VALE1IS
  1084  	SPOP_VAALE1IS
  1085  	SPOP_VMALLE1
  1086  	SPOP_VAE1
  1087  	SPOP_ASIDE1
  1088  	SPOP_VAAE1
  1089  	SPOP_VALE1
  1090  	SPOP_VAALE1
  1091  	SPOP_IPAS2E1IS
  1092  	SPOP_IPAS2LE1IS
  1093  	SPOP_ALLE2IS
  1094  	SPOP_VAE2IS
  1095  	SPOP_ALLE1IS
  1096  	SPOP_VALE2IS
  1097  	SPOP_VMALLS12E1IS
  1098  	SPOP_IPAS2E1
  1099  	SPOP_IPAS2LE1
  1100  	SPOP_ALLE2
  1101  	SPOP_VAE2
  1102  	SPOP_ALLE1
  1103  	SPOP_VALE2
  1104  	SPOP_VMALLS12E1
  1105  	SPOP_ALLE3IS
  1106  	SPOP_VAE3IS
  1107  	SPOP_VALE3IS
  1108  	SPOP_ALLE3
  1109  	SPOP_VAE3
  1110  	SPOP_VALE3
  1111  	SPOP_VMALLE1OS
  1112  	SPOP_VAE1OS
  1113  	SPOP_ASIDE1OS
  1114  	SPOP_VAAE1OS
  1115  	SPOP_VALE1OS
  1116  	SPOP_VAALE1OS
  1117  	SPOP_RVAE1IS
  1118  	SPOP_RVAAE1IS
  1119  	SPOP_RVALE1IS
  1120  	SPOP_RVAALE1IS
  1121  	SPOP_RVAE1OS
  1122  	SPOP_RVAAE1OS
  1123  	SPOP_RVALE1OS
  1124  	SPOP_RVAALE1OS
  1125  	SPOP_RVAE1
  1126  	SPOP_RVAAE1
  1127  	SPOP_RVALE1
  1128  	SPOP_RVAALE1
  1129  	SPOP_RIPAS2E1IS
  1130  	SPOP_RIPAS2LE1IS
  1131  	SPOP_ALLE2OS
  1132  	SPOP_VAE2OS
  1133  	SPOP_ALLE1OS
  1134  	SPOP_VALE2OS
  1135  	SPOP_VMALLS12E1OS
  1136  	SPOP_RVAE2IS
  1137  	SPOP_RVALE2IS
  1138  	SPOP_IPAS2E1OS
  1139  	SPOP_RIPAS2E1
  1140  	SPOP_RIPAS2E1OS
  1141  	SPOP_IPAS2LE1OS
  1142  	SPOP_RIPAS2LE1
  1143  	SPOP_RIPAS2LE1OS
  1144  	SPOP_RVAE2OS
  1145  	SPOP_RVALE2OS
  1146  	SPOP_RVAE2
  1147  	SPOP_RVALE2
  1148  	SPOP_ALLE3OS
  1149  	SPOP_VAE3OS
  1150  	SPOP_VALE3OS
  1151  	SPOP_RVAE3IS
  1152  	SPOP_RVALE3IS
  1153  	SPOP_RVAE3OS
  1154  	SPOP_RVALE3OS
  1155  	SPOP_RVAE3
  1156  	SPOP_RVALE3
  1157  
  1158  	// DC
  1159  	SPOP_IVAC
  1160  	SPOP_ISW
  1161  	SPOP_CSW
  1162  	SPOP_CISW
  1163  	SPOP_ZVA
  1164  	SPOP_CVAC
  1165  	SPOP_CVAU
  1166  	SPOP_CIVAC
  1167  	SPOP_IGVAC
  1168  	SPOP_IGSW
  1169  	SPOP_IGDVAC
  1170  	SPOP_IGDSW
  1171  	SPOP_CGSW
  1172  	SPOP_CGDSW
  1173  	SPOP_CIGSW
  1174  	SPOP_CIGDSW
  1175  	SPOP_GVA
  1176  	SPOP_GZVA
  1177  	SPOP_CGVAC
  1178  	SPOP_CGDVAC
  1179  	SPOP_CGVAP
  1180  	SPOP_CGDVAP
  1181  	SPOP_CGVADP
  1182  	SPOP_CGDVADP
  1183  	SPOP_CIGVAC
  1184  	SPOP_CIGDVAC
  1185  	SPOP_CVAP
  1186  	SPOP_CVADP
  1187  
  1188  	// PSTATE fields
  1189  	SPOP_DAIFSet
  1190  	SPOP_DAIFClr
  1191  
  1192  	// Condition code, EQ, NE, etc. Their relative order to EQ is matter.
  1193  	SPOP_EQ
  1194  	SPOP_NE
  1195  	SPOP_HS
  1196  	SPOP_LO
  1197  	SPOP_MI
  1198  	SPOP_PL
  1199  	SPOP_VS
  1200  	SPOP_VC
  1201  	SPOP_HI
  1202  	SPOP_LS
  1203  	SPOP_GE
  1204  	SPOP_LT
  1205  	SPOP_GT
  1206  	SPOP_LE
  1207  	SPOP_AL
  1208  	SPOP_NV
  1209  	// Condition code end.
  1210  
  1211  	SPOP_END
  1212  )
  1213
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