Source file src/cmd/vendor/golang.org/x/arch/riscv64/riscv64asm/arg.go
1 // Copyright 2024 The Go Authors. All rights reserved. 2 // Use of this source code is governed by a BSD-style 3 // license that can be found in the LICENSE file. 4 5 package riscv64asm 6 7 // Naming for Go decoder arguments: 8 // 9 // - arg_rd: a general purpose register rd encoded in rd[11:7] field 10 // 11 // - arg_rs1: a general purpose register rs1 encoded in rs1[19:15] field 12 // 13 // - arg_rs2: a general purpose register rs2 encoded in rs2[24:20] field 14 // 15 // - arg_rs3: a general purpose register rs3 encoded in rs3[31:27] field 16 // 17 // - arg_fd: a floating point register rd encoded in rd[11:7] field 18 // 19 // - arg_fs1: a floating point register rs1 encoded in rs1[19:15] field 20 // 21 // - arg_fs2: a floating point register rs2 encoded in rs2[24:20] field 22 // 23 // - arg_fs3: a floating point register rs3 encoded in rs3[31:27] field 24 // 25 // - arg_csr: a control status register encoded in csr[31:20] field 26 // 27 // - arg_rs1_mem: source register with offset in load commands 28 // 29 // - arg_rs1_store: source register with offset in store commands 30 // 31 // - arg_rs1_amo: source register with offset in atomic commands 32 // 33 // - arg_pred: predecessor memory ordering information encoded in pred[27:24] field 34 // For details, please refer to chapter 2.7 of ISA manual volume 1 35 // 36 // - arg_succ: successor memory ordering information encoded in succ[23:20] field 37 // For details, please refer to chapter 2.7 of ISA manual volume 1 38 // 39 // - arg_zimm: a unsigned immediate encoded in zimm[19:15] field 40 // 41 // - arg_imm12: an I-type immediate encoded in imm12[31:20] field 42 // 43 // - arg_simm12: a S-type immediate encoded in simm12[31:25|11:7] field 44 // 45 // - arg_bimm12: a B-type immediate encoded in bimm12[31:25|11:7] field 46 // 47 // - arg_imm20: an U-type immediate encoded in imm20[31:12] field 48 // 49 // - arg_jimm20: a J-type immediate encoded in jimm20[31:12] field 50 // 51 // - arg_shamt5: a shift amount encoded in shamt5[24:20] field 52 // 53 // - arg_shamt6: a shift amount encoded in shamt6[25:20] field 54 // 55 56 type argType uint16 57 58 const ( 59 _ argType = iota 60 arg_rd 61 arg_rs1 62 arg_rs2 63 arg_rs3 64 arg_fd 65 arg_fs1 66 arg_fs2 67 arg_fs3 68 arg_csr 69 70 arg_rs1_amo 71 arg_rs1_mem 72 arg_rs1_store 73 74 arg_pred 75 arg_succ 76 77 arg_zimm 78 arg_imm12 79 arg_simm12 80 arg_bimm12 81 arg_imm20 82 arg_jimm20 83 arg_shamt5 84 arg_shamt6 85 86 // RISC-V Compressed Extension Args 87 arg_rd_p 88 arg_fd_p 89 arg_rs1_p 90 arg_rd_rs1_p 91 arg_fs2_p 92 arg_rs2_p 93 arg_rd_n0 94 arg_rs1_n0 95 arg_rd_rs1_n0 96 arg_c_rs1_n0 97 arg_c_rs2_n0 98 arg_c_fs2 99 arg_c_rs2 100 arg_rd_n2 101 102 arg_c_imm6 103 arg_c_nzimm6 104 arg_c_nzuimm6 105 arg_c_uimm7 106 arg_c_uimm8 107 arg_c_uimm8sp_s 108 arg_c_uimm8sp 109 arg_c_uimm9sp_s 110 arg_c_uimm9sp 111 arg_c_bimm9 112 arg_c_nzimm10 113 arg_c_nzuimm10 114 arg_c_imm12 115 arg_c_nzimm18 116 ) 117