Source file src/cmd/vendor/golang.org/x/arch/s390x/s390xasm/tables.go

     1  // Code generated by s390xmap -fmt=decoder ../s390x.csv DO NOT EDIT.
     2  
     3  package s390xasm
     4  
     5  const (
     6  	_ Op = iota
     7  	A
     8  	AR
     9  	ARK
    10  	AY
    11  	AG
    12  	AGR
    13  	AGRK
    14  	AGF
    15  	AGFR
    16  	AXBR
    17  	AXTR
    18  	AXTRA
    19  	ADB
    20  	ADBR
    21  	ADTR
    22  	ADTRA
    23  	AEB
    24  	AEBR
    25  	AP
    26  	AH
    27  	AHY
    28  	AGH
    29  	AHI
    30  	AGHI
    31  	AHHHR
    32  	AHHLR
    33  	AFI
    34  	AHIK
    35  	ASI
    36  	AGHIK
    37  	AGFI
    38  	AGSI
    39  	AIH
    40  	AL
    41  	ALR
    42  	ALRK
    43  	ALY
    44  	ALG
    45  	ALGR
    46  	ALGRK
    47  	ALGF
    48  	ALGFR
    49  	ALHHHR
    50  	ALHHLR
    51  	ALFI
    52  	ALGFI
    53  	ALC
    54  	ALCR
    55  	ALCG
    56  	ALCGR
    57  	ALHSIK
    58  	ALSI
    59  	ALGHSIK
    60  	ALGSI
    61  	ALSIH
    62  	ALSIHN
    63  	AXR
    64  	AD
    65  	ADR
    66  	AE
    67  	AER
    68  	AW
    69  	AWR
    70  	AU
    71  	AUR
    72  	N
    73  	NR
    74  	NRK
    75  	NY
    76  	NG
    77  	NGR
    78  	NGRK
    79  	NC
    80  	NI
    81  	NIY
    82  	NIHH
    83  	NIHL
    84  	NIHF
    85  	NILH
    86  	NILL
    87  	NILF
    88  	NCRK
    89  	NCGRK
    90  	BAL
    91  	BALR
    92  	BAS
    93  	BASR
    94  	BASSM
    95  	BSA
    96  	BSM
    97  	BAKR
    98  	BSG
    99  	BIC
   100  	BC
   101  	BCR
   102  	BCT
   103  	BCTR
   104  	BCTG
   105  	BCTGR
   106  	BXH
   107  	BXHG
   108  	BXLE
   109  	BXLEG
   110  	BPP
   111  	BPRP
   112  	BRAS
   113  	BRASL
   114  	BRC
   115  	BRCL
   116  	BRCT
   117  	BRCTG
   118  	BRCTH
   119  	BRXH
   120  	BRXHG
   121  	BRXLE
   122  	BRXLG
   123  	XSCH
   124  	CKSM
   125  	KM
   126  	KMA
   127  	KMC
   128  	KMF
   129  	KMCTR
   130  	KMO
   131  	CSCH
   132  	C
   133  	CR
   134  	CY
   135  	CG
   136  	CGR
   137  	CGF
   138  	CGFR
   139  	CXBR
   140  	CXTR
   141  	CXR
   142  	CDB
   143  	CDBR
   144  	CDTR
   145  	CD
   146  	CDR
   147  	CEB
   148  	CEBR
   149  	CE
   150  	CER
   151  	CRB
   152  	CGRB
   153  	CRJ
   154  	CGRJ
   155  	CFC
   156  	CRDTE
   157  	KXBR
   158  	KXTR
   159  	KDB
   160  	KDBR
   161  	KDTR
   162  	KEB
   163  	KEBR
   164  	CS
   165  	CSY
   166  	CSG
   167  	CSP
   168  	CSPG
   169  	CSST
   170  	CRT
   171  	CGRT
   172  	CEXTR
   173  	CEDTR
   174  	CP
   175  	CDS
   176  	CDSY
   177  	CDSG
   178  	CH
   179  	CHY
   180  	CGH
   181  	CHHSI
   182  	CHI
   183  	CHSI
   184  	CGHI
   185  	CGHSI
   186  	CHRL
   187  	CGHRL
   188  	CHF
   189  	CHHR
   190  	CHLR
   191  	CFI
   192  	CGFI
   193  	CIB
   194  	CGIB
   195  	CIJ
   196  	CGIJ
   197  	CIT
   198  	CGIT
   199  	CIH
   200  	CL
   201  	CLR
   202  	CLY
   203  	CLG
   204  	CLGR
   205  	CLGF
   206  	CLGFR
   207  	CLC
   208  	CLI
   209  	CLIY
   210  	CLRB
   211  	CLGRB
   212  	CLRJ
   213  	CLGRJ
   214  	CLRT
   215  	CLT
   216  	CLGRT
   217  	CLGT
   218  	CLMH
   219  	CLM
   220  	CLMY
   221  	CLHF
   222  	CLHHR
   223  	CLHLR
   224  	CLHHSI
   225  	CLFI
   226  	CLFHSI
   227  	CLGHSI
   228  	CLGFI
   229  	CLIB
   230  	CLGIB
   231  	CLIJ
   232  	CLGIJ
   233  	CLFIT
   234  	CLGIT
   235  	CLIH
   236  	CLCL
   237  	CLCLE
   238  	CLCLU
   239  	CLRL
   240  	CLHRL
   241  	CLGRL
   242  	CLGHRL
   243  	CLGFRL
   244  	CLST
   245  	CRL
   246  	CGRL
   247  	CGFRL
   248  	CUSE
   249  	CMPSC
   250  	KDSA
   251  	KIMD
   252  	KLMD
   253  	KMAC
   254  	THDR
   255  	THDER
   256  	CXFBR
   257  	CXFBRA
   258  	CXFTR
   259  	CXFR
   260  	CDFBR
   261  	CDFBRA
   262  	CDFTR
   263  	CDFR
   264  	CEFBR
   265  	CEFBRA
   266  	CEFR
   267  	CXGBR
   268  	CXGBRA
   269  	CXGTR
   270  	CXGTRA
   271  	CXGR
   272  	CDGBR
   273  	CDGBRA
   274  	CDGTR
   275  	CDGTRA
   276  	CDGR
   277  	CEGBR
   278  	CEGBRA
   279  	CEGR
   280  	CXLFBR
   281  	CXLFTR
   282  	CDLFBR
   283  	CDLFTR
   284  	CELFBR
   285  	CXLGBR
   286  	CXLGTR
   287  	CDLGBR
   288  	CDLGTR
   289  	CELGBR
   290  	CXPT
   291  	CDPT
   292  	CXSTR
   293  	CDSTR
   294  	CXUTR
   295  	CDUTR
   296  	CXZT
   297  	CDZT
   298  	TBEDR
   299  	TBDR
   300  	CVB
   301  	CVBY
   302  	CVBG
   303  	CVD
   304  	CVDY
   305  	CVDG
   306  	CFXBR
   307  	CFXBRA
   308  	CGXBR
   309  	CGXBRA
   310  	CFXTR
   311  	CGXTR
   312  	CGXTRA
   313  	CFXR
   314  	CGXR
   315  	CFDBR
   316  	CFDBRA
   317  	CGDBR
   318  	CGDBRA
   319  	CFDTR
   320  	CGDTR
   321  	CGDTRA
   322  	CFDR
   323  	CGDR
   324  	CFEBR
   325  	CFEBRA
   326  	CGEBR
   327  	CGEBRA
   328  	CFER
   329  	CGER
   330  	CLFXBR
   331  	CLGXBR
   332  	CLFXTR
   333  	CLGXTR
   334  	CLFDBR
   335  	CLGDBR
   336  	CLFDTR
   337  	CLGDTR
   338  	CLFEBR
   339  	CLGEBR
   340  	CPXT
   341  	CPDT
   342  	CSXTR
   343  	CSDTR
   344  	CUXTR
   345  	CUDTR
   346  	CZXT
   347  	CZDT
   348  	CU24
   349  	CU21
   350  	CU12
   351  	CU14
   352  	CU42
   353  	CU41
   354  	CPYA
   355  	CPSDR
   356  	VSCSHP
   357  	VSCHP
   358  	DFLTCC
   359  	D
   360  	DR
   361  	DXBR
   362  	DXTR
   363  	DXTRA
   364  	DXR
   365  	DDB
   366  	DDBR
   367  	DDTR
   368  	DDTRA
   369  	DD
   370  	DDR
   371  	DEB
   372  	DEBR
   373  	DE
   374  	DER
   375  	DP
   376  	DL
   377  	DLR
   378  	DLG
   379  	DLGR
   380  	DSG
   381  	DSGR
   382  	DSGF
   383  	DSGFR
   384  	DIDBR
   385  	DIEBR
   386  	ED
   387  	EDMK
   388  	X
   389  	XR
   390  	XRK
   391  	XY
   392  	XG
   393  	XGR
   394  	XGRK
   395  	XC
   396  	XI
   397  	XIY
   398  	XIHF
   399  	XILF
   400  	EX
   401  	EXRL
   402  	EAR
   403  	ESEA
   404  	EEXTR
   405  	EEDTR
   406  	ECAG
   407  	ECTG
   408  	EFPC
   409  	EPAR
   410  	EPAIR
   411  	EPSW
   412  	ESAR
   413  	ESAIR
   414  	ESXTR
   415  	ESDTR
   416  	EREG
   417  	EREGG
   418  	ESTA
   419  	ETND
   420  	FLOGR
   421  	HSCH
   422  	HDR
   423  	HER
   424  	IAC
   425  	IEXTR
   426  	IEDTR
   427  	IC
   428  	ICY
   429  	ICMH
   430  	ICM
   431  	ICMY
   432  	IIHH
   433  	IIHL
   434  	IIHF
   435  	IILH
   436  	IILL
   437  	IILF
   438  	IPM
   439  	IPK
   440  	IRBM
   441  	ISKE
   442  	IVSK
   443  	IDTE
   444  	IPTE
   445  	L
   446  	LR
   447  	LY
   448  	LG
   449  	LGR
   450  	LGF
   451  	LGFR
   452  	LXR
   453  	LD
   454  	LDR
   455  	LDY
   456  	LE
   457  	LER
   458  	LEY
   459  	LAM
   460  	LAMY
   461  	LA
   462  	LAY
   463  	LAE
   464  	LAEY
   465  	LARL
   466  	LASP
   467  	LAA
   468  	LAAG
   469  	LAAL
   470  	LAALG
   471  	LAN
   472  	LANG
   473  	LAX
   474  	LAXG
   475  	LAO
   476  	LAOG
   477  	LT
   478  	LTR
   479  	LTG
   480  	LTGR
   481  	LTGF
   482  	LTGFR
   483  	LTXBR
   484  	LTXTR
   485  	LTXR
   486  	LTDBR
   487  	LTDTR
   488  	LTDR
   489  	LTEBR
   490  	LTER
   491  	LAT
   492  	LGAT
   493  	LZRF
   494  	LZRG
   495  	LBEAR
   496  	LB
   497  	LBR
   498  	LGB
   499  	LGBR
   500  	LBH
   501  	LCR
   502  	LCGR
   503  	LCGFR
   504  	LCXBR
   505  	LCXR
   506  	LCDBR
   507  	LCDR
   508  	LCDFR
   509  	LCEBR
   510  	LCER
   511  	LCTL
   512  	LCTLG
   513  	LCBB
   514  	FIXBR
   515  	FIXBRA
   516  	FIXTR
   517  	FIXR
   518  	FIDBR
   519  	FIDBRA
   520  	FIDTR
   521  	FIDR
   522  	FIEBR
   523  	FIEBRA
   524  	FIER
   525  	LFPC
   526  	LFAS
   527  	LDGR
   528  	LGDR
   529  	LGG
   530  	LGSC
   531  	LH
   532  	LHR
   533  	LHY
   534  	LGH
   535  	LGHR
   536  	LHH
   537  	LOCHHI
   538  	LHI
   539  	LGHI
   540  	LOCHI
   541  	LOCGHI
   542  	LHRL
   543  	LGHRL
   544  	LFH
   545  	LFHAT
   546  	LOCFH
   547  	LOCFHR
   548  	LGFI
   549  	LXDB
   550  	LXDBR
   551  	LXDTR
   552  	LXD
   553  	LXDR
   554  	LXEB
   555  	LXEBR
   556  	LXE
   557  	LXER
   558  	LDEB
   559  	LDEBR
   560  	LDETR
   561  	LDE
   562  	LDER
   563  	LLGF
   564  	LLGFR
   565  	LLGFSG
   566  	LLGFAT
   567  	LLZRGF
   568  	LLC
   569  	LLCR
   570  	LLGC
   571  	LLGCR
   572  	LLCH
   573  	LLH
   574  	LLHR
   575  	LLGH
   576  	LLGHR
   577  	LLHH
   578  	LLHRL
   579  	LLGHRL
   580  	LLIHH
   581  	LLIHL
   582  	LLIHF
   583  	LLILH
   584  	LLILL
   585  	LLILF
   586  	LLGFRL
   587  	LLGT
   588  	LLGTR
   589  	LLGTAT
   590  	LM
   591  	LMY
   592  	LMG
   593  	LMD
   594  	LMH
   595  	LNR
   596  	LNGR
   597  	LNGFR
   598  	LNXBR
   599  	LNXR
   600  	LNDBR
   601  	LNDR
   602  	LNDFR
   603  	LNEBR
   604  	LNER
   605  	LOC
   606  	LOCR
   607  	LOCG
   608  	LOCGR
   609  	LPTEA
   610  	LPD
   611  	LPDG
   612  	LPQ
   613  	LPR
   614  	LPGR
   615  	LPGFR
   616  	LPXBR
   617  	LPXR
   618  	LPDBR
   619  	LPDR
   620  	LPDFR
   621  	LPEBR
   622  	LPER
   623  	LPSW
   624  	LPSWE
   625  	LPSWEY
   626  	LRA
   627  	LRAY
   628  	LRAG
   629  	LRL
   630  	LGRL
   631  	LGFRL
   632  	LRVH
   633  	LRV
   634  	LRVR
   635  	LRVG
   636  	LRVGR
   637  	LDXBR
   638  	LDXBRA
   639  	LDXTR
   640  	LDXR
   641  	LRDR
   642  	LEXBR
   643  	LEXBRA
   644  	LEXR
   645  	LEDBR
   646  	LEDBRA
   647  	LEDTR
   648  	LEDR
   649  	LRER
   650  	LURA
   651  	LURAG
   652  	LZXR
   653  	LZDR
   654  	LZER
   655  	MSTA
   656  	MSCH
   657  	MC
   658  	MVHHI
   659  	MVHI
   660  	MVGHI
   661  	MVC
   662  	MVI
   663  	MVIY
   664  	MVCIN
   665  	MVCL
   666  	MVCLE
   667  	MVCLU
   668  	MVN
   669  	MVPG
   670  	MVCRL
   671  	MVST
   672  	MVCP
   673  	MVCS
   674  	MVCDK
   675  	MVCK
   676  	MVO
   677  	MVCOS
   678  	MVCSK
   679  	MVZ
   680  	MG
   681  	MGRK
   682  	M
   683  	MFY
   684  	MR
   685  	MXBR
   686  	MXTR
   687  	MXTRA
   688  	MXR
   689  	MDB
   690  	MDBR
   691  	MDTR
   692  	MDTRA
   693  	MD
   694  	MDR
   695  	MXDB
   696  	MXDBR
   697  	MXD
   698  	MXDR
   699  	MEEB
   700  	MEEBR
   701  	MEE
   702  	MEER
   703  	MDEB
   704  	MDEBR
   705  	MDE
   706  	MDER
   707  	ME
   708  	MER
   709  	MAY
   710  	MAYR
   711  	MADB
   712  	MADBR
   713  	MAD
   714  	MADR
   715  	MAEB
   716  	MAEBR
   717  	MAE
   718  	MAER
   719  	MAYH
   720  	MAYHR
   721  	MAYL
   722  	MAYLR
   723  	MSDB
   724  	MSDBR
   725  	MSD
   726  	MSDR
   727  	MSEB
   728  	MSEBR
   729  	MSE
   730  	MSER
   731  	MP
   732  	MH
   733  	MHY
   734  	MGH
   735  	MHI
   736  	MGHI
   737  	MLG
   738  	MLGR
   739  	ML
   740  	MLR
   741  	MS
   742  	MSC
   743  	MSR
   744  	MSRKC
   745  	MSY
   746  	MSG
   747  	MSGC
   748  	MSGR
   749  	MSGRKC
   750  	MSGF
   751  	MSGFR
   752  	MSFI
   753  	MSGFI
   754  	MYH
   755  	MYHR
   756  	MYL
   757  	MYLR
   758  	MY
   759  	MYR
   760  	NNRK
   761  	NNGRK
   762  	NNPA
   763  	NIAI
   764  	NTSTG
   765  	NORK
   766  	NOGRK
   767  	NXRK
   768  	NXGRK
   769  	O
   770  	OR
   771  	ORK
   772  	OY
   773  	OG
   774  	OGR
   775  	OGRK
   776  	OC
   777  	OI
   778  	OIY
   779  	OIHH
   780  	OIHL
   781  	OIHF
   782  	OILH
   783  	OILL
   784  	OILF
   785  	OCRK
   786  	OCGRK
   787  	PACK
   788  	PKA
   789  	PKU
   790  	PGIN
   791  	PGOUT
   792  	PCC
   793  	PCKMO
   794  	PFPO
   795  	PFMF
   796  	PLO
   797  	PPA
   798  	PRNO
   799  	PTFF
   800  	PTF
   801  	POPCNT
   802  	PFD
   803  	PFDRL
   804  	PC
   805  	PR
   806  	PT
   807  	PTI
   808  	PALB
   809  	PTLB
   810  	QAXTR
   811  	QADTR
   812  	QPACI
   813  	RRXTR
   814  	RRDTR
   815  	RCHP
   816  	RDP
   817  	RRBE
   818  	RRBM
   819  	RP
   820  	RSCH
   821  	RLL
   822  	RLLG
   823  	RNSBG
   824  	RXSBG
   825  	RISBG
   826  	RISBGN
   827  	RISBHG
   828  	RISBLG
   829  	ROSBG
   830  	SRST
   831  	SRSTU
   832  	SELR
   833  	SELGR
   834  	SELFHR
   835  	SAR
   836  	SAL
   837  	SAC
   838  	SACF
   839  	SAM24
   840  	SAM31
   841  	SAM64
   842  	SRNM
   843  	SRNMB
   844  	SCHM
   845  	SCK
   846  	SCKC
   847  	SCKPF
   848  	SPT
   849  	SRNMT
   850  	SFPC
   851  	SFASR
   852  	SPX
   853  	SPM
   854  	SPKA
   855  	SSAR
   856  	SSAIR
   857  	SSKE
   858  	SSM
   859  	SRP
   860  	SLDA
   861  	SLDL
   862  	SLA
   863  	SLAK
   864  	SLAG
   865  	SLL
   866  	SLLK
   867  	SLLG
   868  	SRDA
   869  	SRDL
   870  	SRA
   871  	SRAK
   872  	SRAG
   873  	SRL
   874  	SRLK
   875  	SRLG
   876  	SLXT
   877  	SLDT
   878  	SRXT
   879  	SRDT
   880  	SIGP
   881  	SORTL
   882  	SQXBR
   883  	SQXR
   884  	SQDB
   885  	SQDBR
   886  	SQD
   887  	SQDR
   888  	SQEB
   889  	SQEBR
   890  	SQE
   891  	SQER
   892  	SSCH
   893  	ST
   894  	STY
   895  	STG
   896  	STD
   897  	STDY
   898  	STE
   899  	STEY
   900  	STAM
   901  	STAMY
   902  	STBEAR
   903  	STCPS
   904  	STCRW
   905  	STC
   906  	STCY
   907  	STCH
   908  	STCMH
   909  	STCM
   910  	STCMY
   911  	STCK
   912  	STCKC
   913  	STCKE
   914  	STCKF
   915  	STCTL
   916  	STCTG
   917  	STAP
   918  	STIDP
   919  	STPT
   920  	STFL
   921  	STFLE
   922  	STFPC
   923  	STGSC
   924  	STH
   925  	STHY
   926  	STHH
   927  	STHRL
   928  	STFH
   929  	STOCFH
   930  	STM
   931  	STMY
   932  	STMG
   933  	STMH
   934  	STOC
   935  	STOCG
   936  	STPQ
   937  	STPX
   938  	STRAG
   939  	STRL
   940  	STGRL
   941  	STRVH
   942  	STRV
   943  	STRVG
   944  	STSCH
   945  	STSI
   946  	STNSM
   947  	STOSM
   948  	STURA
   949  	STURG
   950  	S
   951  	SR
   952  	SRK
   953  	SY
   954  	SG
   955  	SGR
   956  	SGRK
   957  	SGF
   958  	SGFR
   959  	SXBR
   960  	SXTR
   961  	SXTRA
   962  	SDB
   963  	SDBR
   964  	SDTR
   965  	SDTRA
   966  	SEB
   967  	SEBR
   968  	SP
   969  	SH
   970  	SHY
   971  	SGH
   972  	SHHHR
   973  	SHHLR
   974  	SL
   975  	SLR
   976  	SLRK
   977  	SLY
   978  	SLG
   979  	SLGR
   980  	SLGRK
   981  	SLGF
   982  	SLGFR
   983  	SLHHHR
   984  	SLHHLR
   985  	SLFI
   986  	SLGFI
   987  	SLB
   988  	SLBR
   989  	SLBG
   990  	SLBGR
   991  	SXR
   992  	SD
   993  	SDR
   994  	SE
   995  	SER
   996  	SW
   997  	SWR
   998  	SU
   999  	SUR
  1000  	SVC
  1001  	TAR
  1002  	TAM
  1003  	TS
  1004  	TB
  1005  	TCXB
  1006  	TDCXT
  1007  	TCDB
  1008  	TDCDT
  1009  	TCEB
  1010  	TDCET
  1011  	TDGXT
  1012  	TDGDT
  1013  	TDGET
  1014  	TP
  1015  	TPEI
  1016  	TPI
  1017  	TPROT
  1018  	TSCH
  1019  	TM
  1020  	TMY
  1021  	TMHH
  1022  	TMHL
  1023  	TMLH
  1024  	TMLL
  1025  	TMH
  1026  	TML
  1027  	TRACE
  1028  	TRACG
  1029  	TABORT
  1030  	TBEGINC
  1031  	TBEGIN
  1032  	TEND
  1033  	TR
  1034  	TRT
  1035  	TRTE
  1036  	TRTR
  1037  	TRTRE
  1038  	TRE
  1039  	TROO
  1040  	TROT
  1041  	TRTO
  1042  	TRTT
  1043  	TRAP2
  1044  	TRAP4
  1045  	UNPK
  1046  	UNPKA
  1047  	UNPKU
  1048  	UPT
  1049  	VA
  1050  	VACC
  1051  	VAP
  1052  	VAC
  1053  	VACCC
  1054  	VN
  1055  	VNC
  1056  	VAVG
  1057  	VAVGL
  1058  	VBPERM
  1059  	VCKSM
  1060  	VCP
  1061  	VCEQ
  1062  	VCH
  1063  	VCHL
  1064  	VCSPH
  1065  	VCVB
  1066  	VCVBG
  1067  	VCVD
  1068  	VCVDG
  1069  	VCLZDP
  1070  	VCLZ
  1071  	VCTZ
  1072  	VDP
  1073  	VEC
  1074  	VECL
  1075  	VERIM
  1076  	VERLL
  1077  	VERLLV
  1078  	VESLV
  1079  	VESL
  1080  	VESRA
  1081  	VESRAV
  1082  	VESRL
  1083  	VESRLV
  1084  	VX
  1085  	VFAE
  1086  	VFEE
  1087  	VFENE
  1088  	VFA
  1089  	WFK
  1090  	VFCE
  1091  	VFCH
  1092  	VFCHE
  1093  	WFC
  1094  	VCLFNH
  1095  	VCLFNL
  1096  	VCRNF
  1097  	VCFPS
  1098  	VCDG
  1099  	VCFPL
  1100  	VCDLG
  1101  	VCFN
  1102  	VCSFP
  1103  	VCGD
  1104  	VCLFP
  1105  	VCLGD
  1106  	VCNF
  1107  	VFD
  1108  	VFLL
  1109  	VFLR
  1110  	VFMAX
  1111  	VFMIN
  1112  	VFM
  1113  	VFMA
  1114  	VFMS
  1115  	VFNMA
  1116  	VFNMS
  1117  	VFPSO
  1118  	VFSQ
  1119  	VFS
  1120  	VFTCI
  1121  	VGFM
  1122  	VGFMA
  1123  	VGEF
  1124  	VGEG
  1125  	VGBM
  1126  	VGM
  1127  	VISTR
  1128  	VL
  1129  	VLR
  1130  	VLREP
  1131  	VLEBRH
  1132  	VLEBRF
  1133  	VLEBRG
  1134  	VLBRREP
  1135  	VLLEBRZ
  1136  	VLBR
  1137  	VLC
  1138  	VLEH
  1139  	VLEF
  1140  	VLEG
  1141  	VLEB
  1142  	VLEIH
  1143  	VLEIF
  1144  	VLEIG
  1145  	VLEIB
  1146  	VLER
  1147  	VFI
  1148  	VLGV
  1149  	VLIP
  1150  	VLLEZ
  1151  	VLM
  1152  	VLP
  1153  	VLRL
  1154  	VLRLR
  1155  	VLBB
  1156  	VLVG
  1157  	VLVGP
  1158  	VLL
  1159  	VMX
  1160  	VMXL
  1161  	VMRH
  1162  	VMRL
  1163  	VMN
  1164  	VMNL
  1165  	VMAE
  1166  	VMAH
  1167  	VMALE
  1168  	VMALH
  1169  	VMALO
  1170  	VMAL
  1171  	VMAO
  1172  	VMSP
  1173  	VMP
  1174  	VME
  1175  	VMH
  1176  	VMLE
  1177  	VMLH
  1178  	VMLO
  1179  	VML
  1180  	VMO
  1181  	VMSL
  1182  	VNN
  1183  	VNO
  1184  	VNX
  1185  	VO
  1186  	VOC
  1187  	VPK
  1188  	VPKLS
  1189  	VPKS
  1190  	VPKZ
  1191  	VPKZR
  1192  	VPSOP
  1193  	VPERM
  1194  	VPDI
  1195  	VPOPCT
  1196  	VRP
  1197  	VREP
  1198  	VREPI
  1199  	VSCEF
  1200  	VSCEG
  1201  	VSEL
  1202  	VSDP
  1203  	VSRP
  1204  	VSRPR
  1205  	VSL
  1206  	VSLB
  1207  	VSLD
  1208  	VSLDB
  1209  	VSRA
  1210  	VSRAB
  1211  	VSRD
  1212  	VSRL
  1213  	VSRLB
  1214  	VSEG
  1215  	VST
  1216  	VSTEBRH
  1217  	VSTEBRF
  1218  	VSTEBRG
  1219  	VSTBR
  1220  	VSTEH
  1221  	VSTEF
  1222  	VSTEG
  1223  	VSTEB
  1224  	VSTER
  1225  	VSTM
  1226  	VSTRL
  1227  	VSTRLR
  1228  	VSTL
  1229  	VSTRC
  1230  	VSTRS
  1231  	VS
  1232  	VSCBI
  1233  	VSP
  1234  	VSBCBI
  1235  	VSBI
  1236  	VSUMG
  1237  	VSUMQ
  1238  	VSUM
  1239  	VTP
  1240  	VTM
  1241  	VUPH
  1242  	VUPLH
  1243  	VUPLL
  1244  	VUPL
  1245  	VUPKZ
  1246  	VUPKZH
  1247  	VUPKZL
  1248  	ZAP
  1249  )
  1250  
  1251  var opstr = [...]string{
  1252  	A:       "a",
  1253  	AR:      "ar",
  1254  	ARK:     "ark",
  1255  	AY:      "ay",
  1256  	AG:      "ag",
  1257  	AGR:     "agr",
  1258  	AGRK:    "agrk",
  1259  	AGF:     "agf",
  1260  	AGFR:    "agfr",
  1261  	AXBR:    "axbr",
  1262  	AXTR:    "axtr",
  1263  	AXTRA:   "axtra",
  1264  	ADB:     "adb",
  1265  	ADBR:    "adbr",
  1266  	ADTR:    "adtr",
  1267  	ADTRA:   "adtra",
  1268  	AEB:     "aeb",
  1269  	AEBR:    "aebr",
  1270  	AP:      "ap",
  1271  	AH:      "ah",
  1272  	AHY:     "ahy",
  1273  	AGH:     "agh",
  1274  	AHI:     "ahi",
  1275  	AGHI:    "aghi",
  1276  	AHHHR:   "ahhhr",
  1277  	AHHLR:   "ahhlr",
  1278  	AFI:     "afi",
  1279  	AHIK:    "ahik",
  1280  	ASI:     "asi",
  1281  	AGHIK:   "aghik",
  1282  	AGFI:    "agfi",
  1283  	AGSI:    "agsi",
  1284  	AIH:     "aih",
  1285  	AL:      "al",
  1286  	ALR:     "alr",
  1287  	ALRK:    "alrk",
  1288  	ALY:     "aly",
  1289  	ALG:     "alg",
  1290  	ALGR:    "algr",
  1291  	ALGRK:   "algrk",
  1292  	ALGF:    "algf",
  1293  	ALGFR:   "algfr",
  1294  	ALHHHR:  "alhhhr",
  1295  	ALHHLR:  "alhhlr",
  1296  	ALFI:    "alfi",
  1297  	ALGFI:   "algfi",
  1298  	ALC:     "alc",
  1299  	ALCR:    "alcr",
  1300  	ALCG:    "alcg",
  1301  	ALCGR:   "alcgr",
  1302  	ALHSIK:  "alhsik",
  1303  	ALSI:    "alsi",
  1304  	ALGHSIK: "alghsik",
  1305  	ALGSI:   "algsi",
  1306  	ALSIH:   "alsih",
  1307  	ALSIHN:  "alsihn",
  1308  	AXR:     "axr",
  1309  	AD:      "ad",
  1310  	ADR:     "adr",
  1311  	AE:      "ae",
  1312  	AER:     "aer",
  1313  	AW:      "aw",
  1314  	AWR:     "awr",
  1315  	AU:      "au",
  1316  	AUR:     "aur",
  1317  	N:       "n",
  1318  	NR:      "nr",
  1319  	NRK:     "nrk",
  1320  	NY:      "ny",
  1321  	NG:      "ng",
  1322  	NGR:     "ngr",
  1323  	NGRK:    "ngrk",
  1324  	NC:      "nc",
  1325  	NI:      "ni",
  1326  	NIY:     "niy",
  1327  	NIHH:    "nihh",
  1328  	NIHL:    "nihl",
  1329  	NIHF:    "nihf",
  1330  	NILH:    "nilh",
  1331  	NILL:    "nill",
  1332  	NILF:    "nilf",
  1333  	NCRK:    "ncrk",
  1334  	NCGRK:   "ncgrk",
  1335  	BAL:     "bal",
  1336  	BALR:    "balr",
  1337  	BAS:     "bas",
  1338  	BASR:    "basr",
  1339  	BASSM:   "bassm",
  1340  	BSA:     "bsa",
  1341  	BSM:     "bsm",
  1342  	BAKR:    "bakr",
  1343  	BSG:     "bsg",
  1344  	BIC:     "bic",
  1345  	BC:      "bc",
  1346  	BCR:     "bcr",
  1347  	BCT:     "bct",
  1348  	BCTR:    "bctr",
  1349  	BCTG:    "bctg",
  1350  	BCTGR:   "bctgr",
  1351  	BXH:     "bxh",
  1352  	BXHG:    "bxhg",
  1353  	BXLE:    "bxle",
  1354  	BXLEG:   "bxleg",
  1355  	BPP:     "bpp",
  1356  	BPRP:    "bprp",
  1357  	BRAS:    "bras",
  1358  	BRASL:   "brasl",
  1359  	BRC:     "brc",
  1360  	BRCL:    "brcl",
  1361  	BRCT:    "brct",
  1362  	BRCTG:   "brctg",
  1363  	BRCTH:   "brcth",
  1364  	BRXH:    "brxh",
  1365  	BRXHG:   "brxhg",
  1366  	BRXLE:   "brxle",
  1367  	BRXLG:   "brxlg",
  1368  	XSCH:    "xsch",
  1369  	CKSM:    "cksm",
  1370  	KM:      "km",
  1371  	KMA:     "kma",
  1372  	KMC:     "kmc",
  1373  	KMF:     "kmf",
  1374  	KMCTR:   "kmctr",
  1375  	KMO:     "kmo",
  1376  	CSCH:    "csch",
  1377  	C:       "c",
  1378  	CR:      "cr",
  1379  	CY:      "cy",
  1380  	CG:      "cg",
  1381  	CGR:     "cgr",
  1382  	CGF:     "cgf",
  1383  	CGFR:    "cgfr",
  1384  	CXBR:    "cxbr",
  1385  	CXTR:    "cxtr",
  1386  	CXR:     "cxr",
  1387  	CDB:     "cdb",
  1388  	CDBR:    "cdbr",
  1389  	CDTR:    "cdtr",
  1390  	CD:      "cd",
  1391  	CDR:     "cdr",
  1392  	CEB:     "ceb",
  1393  	CEBR:    "cebr",
  1394  	CE:      "ce",
  1395  	CER:     "cer",
  1396  	CRB:     "crb",
  1397  	CGRB:    "cgrb",
  1398  	CRJ:     "crj",
  1399  	CGRJ:    "cgrj",
  1400  	CFC:     "cfc",
  1401  	CRDTE:   "crdte",
  1402  	KXBR:    "kxbr",
  1403  	KXTR:    "kxtr",
  1404  	KDB:     "kdb",
  1405  	KDBR:    "kdbr",
  1406  	KDTR:    "kdtr",
  1407  	KEB:     "keb",
  1408  	KEBR:    "kebr",
  1409  	CS:      "cs",
  1410  	CSY:     "csy",
  1411  	CSG:     "csg",
  1412  	CSP:     "csp",
  1413  	CSPG:    "cspg",
  1414  	CSST:    "csst",
  1415  	CRT:     "crt",
  1416  	CGRT:    "cgrt",
  1417  	CEXTR:   "cextr",
  1418  	CEDTR:   "cedtr",
  1419  	CP:      "cp",
  1420  	CDS:     "cds",
  1421  	CDSY:    "cdsy",
  1422  	CDSG:    "cdsg",
  1423  	CH:      "ch",
  1424  	CHY:     "chy",
  1425  	CGH:     "cgh",
  1426  	CHHSI:   "chhsi",
  1427  	CHI:     "chi",
  1428  	CHSI:    "chsi",
  1429  	CGHI:    "cghi",
  1430  	CGHSI:   "cghsi",
  1431  	CHRL:    "chrl",
  1432  	CGHRL:   "cghrl",
  1433  	CHF:     "chf",
  1434  	CHHR:    "chhr",
  1435  	CHLR:    "chlr",
  1436  	CFI:     "cfi",
  1437  	CGFI:    "cgfi",
  1438  	CIB:     "cib",
  1439  	CGIB:    "cgib",
  1440  	CIJ:     "cij",
  1441  	CGIJ:    "cgij",
  1442  	CIT:     "cit",
  1443  	CGIT:    "cgit",
  1444  	CIH:     "cih",
  1445  	CL:      "cl",
  1446  	CLR:     "clr",
  1447  	CLY:     "cly",
  1448  	CLG:     "clg",
  1449  	CLGR:    "clgr",
  1450  	CLGF:    "clgf",
  1451  	CLGFR:   "clgfr",
  1452  	CLC:     "clc",
  1453  	CLI:     "cli",
  1454  	CLIY:    "cliy",
  1455  	CLRB:    "clrb",
  1456  	CLGRB:   "clgrb",
  1457  	CLRJ:    "clrj",
  1458  	CLGRJ:   "clgrj",
  1459  	CLRT:    "clrt",
  1460  	CLT:     "clt",
  1461  	CLGRT:   "clgrt",
  1462  	CLGT:    "clgt",
  1463  	CLMH:    "clmh",
  1464  	CLM:     "clm",
  1465  	CLMY:    "clmy",
  1466  	CLHF:    "clhf",
  1467  	CLHHR:   "clhhr",
  1468  	CLHLR:   "clhlr",
  1469  	CLHHSI:  "clhhsi",
  1470  	CLFI:    "clfi",
  1471  	CLFHSI:  "clfhsi",
  1472  	CLGHSI:  "clghsi",
  1473  	CLGFI:   "clgfi",
  1474  	CLIB:    "clib",
  1475  	CLGIB:   "clgib",
  1476  	CLIJ:    "clij",
  1477  	CLGIJ:   "clgij",
  1478  	CLFIT:   "clfit",
  1479  	CLGIT:   "clgit",
  1480  	CLIH:    "clih",
  1481  	CLCL:    "clcl",
  1482  	CLCLE:   "clcle",
  1483  	CLCLU:   "clclu",
  1484  	CLRL:    "clrl",
  1485  	CLHRL:   "clhrl",
  1486  	CLGRL:   "clgrl",
  1487  	CLGHRL:  "clghrl",
  1488  	CLGFRL:  "clgfrl",
  1489  	CLST:    "clst",
  1490  	CRL:     "crl",
  1491  	CGRL:    "cgrl",
  1492  	CGFRL:   "cgfrl",
  1493  	CUSE:    "cuse",
  1494  	CMPSC:   "cmpsc",
  1495  	KDSA:    "kdsa",
  1496  	KIMD:    "kimd",
  1497  	KLMD:    "klmd",
  1498  	KMAC:    "kmac",
  1499  	THDR:    "thdr",
  1500  	THDER:   "thder",
  1501  	CXFBR:   "cxfbr",
  1502  	CXFBRA:  "cxfbra",
  1503  	CXFTR:   "cxftr",
  1504  	CXFR:    "cxfr",
  1505  	CDFBR:   "cdfbr",
  1506  	CDFBRA:  "cdfbra",
  1507  	CDFTR:   "cdftr",
  1508  	CDFR:    "cdfr",
  1509  	CEFBR:   "cefbr",
  1510  	CEFBRA:  "cefbra",
  1511  	CEFR:    "cefr",
  1512  	CXGBR:   "cxgbr",
  1513  	CXGBRA:  "cxgbra",
  1514  	CXGTR:   "cxgtr",
  1515  	CXGTRA:  "cxgtra",
  1516  	CXGR:    "cxgr",
  1517  	CDGBR:   "cdgbr",
  1518  	CDGBRA:  "cdgbra",
  1519  	CDGTR:   "cdgtr",
  1520  	CDGTRA:  "cdgtra",
  1521  	CDGR:    "cdgr",
  1522  	CEGBR:   "cegbr",
  1523  	CEGBRA:  "cegbra",
  1524  	CEGR:    "cegr",
  1525  	CXLFBR:  "cxlfbr",
  1526  	CXLFTR:  "cxlftr",
  1527  	CDLFBR:  "cdlfbr",
  1528  	CDLFTR:  "cdlftr",
  1529  	CELFBR:  "celfbr",
  1530  	CXLGBR:  "cxlgbr",
  1531  	CXLGTR:  "cxlgtr",
  1532  	CDLGBR:  "cdlgbr",
  1533  	CDLGTR:  "cdlgtr",
  1534  	CELGBR:  "celgbr",
  1535  	CXPT:    "cxpt",
  1536  	CDPT:    "cdpt",
  1537  	CXSTR:   "cxstr",
  1538  	CDSTR:   "cdstr",
  1539  	CXUTR:   "cxutr",
  1540  	CDUTR:   "cdutr",
  1541  	CXZT:    "cxzt",
  1542  	CDZT:    "cdzt",
  1543  	TBEDR:   "tbedr",
  1544  	TBDR:    "tbdr",
  1545  	CVB:     "cvb",
  1546  	CVBY:    "cvby",
  1547  	CVBG:    "cvbg",
  1548  	CVD:     "cvd",
  1549  	CVDY:    "cvdy",
  1550  	CVDG:    "cvdg",
  1551  	CFXBR:   "cfxbr",
  1552  	CFXBRA:  "cfxbra",
  1553  	CGXBR:   "cgxbr",
  1554  	CGXBRA:  "cgxbra",
  1555  	CFXTR:   "cfxtr",
  1556  	CGXTR:   "cgxtr",
  1557  	CGXTRA:  "cgxtra",
  1558  	CFXR:    "cfxr",
  1559  	CGXR:    "cgxr",
  1560  	CFDBR:   "cfdbr",
  1561  	CFDBRA:  "cfdbra",
  1562  	CGDBR:   "cgdbr",
  1563  	CGDBRA:  "cgdbra",
  1564  	CFDTR:   "cfdtr",
  1565  	CGDTR:   "cgdtr",
  1566  	CGDTRA:  "cgdtra",
  1567  	CFDR:    "cfdr",
  1568  	CGDR:    "cgdr",
  1569  	CFEBR:   "cfebr",
  1570  	CFEBRA:  "cfebra",
  1571  	CGEBR:   "cgebr",
  1572  	CGEBRA:  "cgebra",
  1573  	CFER:    "cfer",
  1574  	CGER:    "cger",
  1575  	CLFXBR:  "clfxbr",
  1576  	CLGXBR:  "clgxbr",
  1577  	CLFXTR:  "clfxtr",
  1578  	CLGXTR:  "clgxtr",
  1579  	CLFDBR:  "clfdbr",
  1580  	CLGDBR:  "clgdbr",
  1581  	CLFDTR:  "clfdtr",
  1582  	CLGDTR:  "clgdtr",
  1583  	CLFEBR:  "clfebr",
  1584  	CLGEBR:  "clgebr",
  1585  	CPXT:    "cpxt",
  1586  	CPDT:    "cpdt",
  1587  	CSXTR:   "csxtr",
  1588  	CSDTR:   "csdtr",
  1589  	CUXTR:   "cuxtr",
  1590  	CUDTR:   "cudtr",
  1591  	CZXT:    "czxt",
  1592  	CZDT:    "czdt",
  1593  	CU24:    "cu24",
  1594  	CU21:    "cu21",
  1595  	CU12:    "cu12",
  1596  	CU14:    "cu14",
  1597  	CU42:    "cu42",
  1598  	CU41:    "cu41",
  1599  	CPYA:    "cpya",
  1600  	CPSDR:   "cpsdr",
  1601  	VSCSHP:  "vscshp",
  1602  	VSCHP:   "vschp",
  1603  	DFLTCC:  "dfltcc",
  1604  	D:       "d",
  1605  	DR:      "dr",
  1606  	DXBR:    "dxbr",
  1607  	DXTR:    "dxtr",
  1608  	DXTRA:   "dxtra",
  1609  	DXR:     "dxr",
  1610  	DDB:     "ddb",
  1611  	DDBR:    "ddbr",
  1612  	DDTR:    "ddtr",
  1613  	DDTRA:   "ddtra",
  1614  	DD:      "dd",
  1615  	DDR:     "ddr",
  1616  	DEB:     "deb",
  1617  	DEBR:    "debr",
  1618  	DE:      "de",
  1619  	DER:     "der",
  1620  	DP:      "dp",
  1621  	DL:      "dl",
  1622  	DLR:     "dlr",
  1623  	DLG:     "dlg",
  1624  	DLGR:    "dlgr",
  1625  	DSG:     "dsg",
  1626  	DSGR:    "dsgr",
  1627  	DSGF:    "dsgf",
  1628  	DSGFR:   "dsgfr",
  1629  	DIDBR:   "didbr",
  1630  	DIEBR:   "diebr",
  1631  	ED:      "ed",
  1632  	EDMK:    "edmk",
  1633  	X:       "x",
  1634  	XR:      "xr",
  1635  	XRK:     "xrk",
  1636  	XY:      "xy",
  1637  	XG:      "xg",
  1638  	XGR:     "xgr",
  1639  	XGRK:    "xgrk",
  1640  	XC:      "xc",
  1641  	XI:      "xi",
  1642  	XIY:     "xiy",
  1643  	XIHF:    "xihf",
  1644  	XILF:    "xilf",
  1645  	EX:      "ex",
  1646  	EXRL:    "exrl",
  1647  	EAR:     "ear",
  1648  	ESEA:    "esea",
  1649  	EEXTR:   "eextr",
  1650  	EEDTR:   "eedtr",
  1651  	ECAG:    "ecag",
  1652  	ECTG:    "ectg",
  1653  	EFPC:    "efpc",
  1654  	EPAR:    "epar",
  1655  	EPAIR:   "epair",
  1656  	EPSW:    "epsw",
  1657  	ESAR:    "esar",
  1658  	ESAIR:   "esair",
  1659  	ESXTR:   "esxtr",
  1660  	ESDTR:   "esdtr",
  1661  	EREG:    "ereg",
  1662  	EREGG:   "eregg",
  1663  	ESTA:    "esta",
  1664  	ETND:    "etnd",
  1665  	FLOGR:   "flogr",
  1666  	HSCH:    "hsch",
  1667  	HDR:     "hdr",
  1668  	HER:     "her",
  1669  	IAC:     "iac",
  1670  	IEXTR:   "iextr",
  1671  	IEDTR:   "iedtr",
  1672  	IC:      "ic",
  1673  	ICY:     "icy",
  1674  	ICMH:    "icmh",
  1675  	ICM:     "icm",
  1676  	ICMY:    "icmy",
  1677  	IIHH:    "iihh",
  1678  	IIHL:    "iihl",
  1679  	IIHF:    "iihf",
  1680  	IILH:    "iilh",
  1681  	IILL:    "iill",
  1682  	IILF:    "iilf",
  1683  	IPM:     "ipm",
  1684  	IPK:     "ipk",
  1685  	IRBM:    "irbm",
  1686  	ISKE:    "iske",
  1687  	IVSK:    "ivsk",
  1688  	IDTE:    "idte",
  1689  	IPTE:    "ipte",
  1690  	L:       "l",
  1691  	LR:      "lr",
  1692  	LY:      "ly",
  1693  	LG:      "lg",
  1694  	LGR:     "lgr",
  1695  	LGF:     "lgf",
  1696  	LGFR:    "lgfr",
  1697  	LXR:     "lxr",
  1698  	LD:      "ld",
  1699  	LDR:     "ldr",
  1700  	LDY:     "ldy",
  1701  	LE:      "le",
  1702  	LER:     "ler",
  1703  	LEY:     "ley",
  1704  	LAM:     "lam",
  1705  	LAMY:    "lamy",
  1706  	LA:      "la",
  1707  	LAY:     "lay",
  1708  	LAE:     "lae",
  1709  	LAEY:    "laey",
  1710  	LARL:    "larl",
  1711  	LASP:    "lasp",
  1712  	LAA:     "laa",
  1713  	LAAG:    "laag",
  1714  	LAAL:    "laal",
  1715  	LAALG:   "laalg",
  1716  	LAN:     "lan",
  1717  	LANG:    "lang",
  1718  	LAX:     "lax",
  1719  	LAXG:    "laxg",
  1720  	LAO:     "lao",
  1721  	LAOG:    "laog",
  1722  	LT:      "lt",
  1723  	LTR:     "ltr",
  1724  	LTG:     "ltg",
  1725  	LTGR:    "ltgr",
  1726  	LTGF:    "ltgf",
  1727  	LTGFR:   "ltgfr",
  1728  	LTXBR:   "ltxbr",
  1729  	LTXTR:   "ltxtr",
  1730  	LTXR:    "ltxr",
  1731  	LTDBR:   "ltdbr",
  1732  	LTDTR:   "ltdtr",
  1733  	LTDR:    "ltdr",
  1734  	LTEBR:   "ltebr",
  1735  	LTER:    "lter",
  1736  	LAT:     "lat",
  1737  	LGAT:    "lgat",
  1738  	LZRF:    "lzrf",
  1739  	LZRG:    "lzrg",
  1740  	LBEAR:   "lbear",
  1741  	LB:      "lb",
  1742  	LBR:     "lbr",
  1743  	LGB:     "lgb",
  1744  	LGBR:    "lgbr",
  1745  	LBH:     "lbh",
  1746  	LCR:     "lcr",
  1747  	LCGR:    "lcgr",
  1748  	LCGFR:   "lcgfr",
  1749  	LCXBR:   "lcxbr",
  1750  	LCXR:    "lcxr",
  1751  	LCDBR:   "lcdbr",
  1752  	LCDR:    "lcdr",
  1753  	LCDFR:   "lcdfr",
  1754  	LCEBR:   "lcebr",
  1755  	LCER:    "lcer",
  1756  	LCTL:    "lctl",
  1757  	LCTLG:   "lctlg",
  1758  	LCBB:    "lcbb",
  1759  	FIXBR:   "fixbr",
  1760  	FIXBRA:  "fixbra",
  1761  	FIXTR:   "fixtr",
  1762  	FIXR:    "fixr",
  1763  	FIDBR:   "fidbr",
  1764  	FIDBRA:  "fidbra",
  1765  	FIDTR:   "fidtr",
  1766  	FIDR:    "fidr",
  1767  	FIEBR:   "fiebr",
  1768  	FIEBRA:  "fiebra",
  1769  	FIER:    "fier",
  1770  	LFPC:    "lfpc",
  1771  	LFAS:    "lfas",
  1772  	LDGR:    "ldgr",
  1773  	LGDR:    "lgdr",
  1774  	LGG:     "lgg",
  1775  	LGSC:    "lgsc",
  1776  	LH:      "lh",
  1777  	LHR:     "lhr",
  1778  	LHY:     "lhy",
  1779  	LGH:     "lgh",
  1780  	LGHR:    "lghr",
  1781  	LHH:     "lhh",
  1782  	LOCHHI:  "lochhi",
  1783  	LHI:     "lhi",
  1784  	LGHI:    "lghi",
  1785  	LOCHI:   "lochi",
  1786  	LOCGHI:  "locghi",
  1787  	LHRL:    "lhrl",
  1788  	LGHRL:   "lghrl",
  1789  	LFH:     "lfh",
  1790  	LFHAT:   "lfhat",
  1791  	LOCFH:   "locfh",
  1792  	LOCFHR:  "locfhr",
  1793  	LGFI:    "lgfi",
  1794  	LXDB:    "lxdb",
  1795  	LXDBR:   "lxdbr",
  1796  	LXDTR:   "lxdtr",
  1797  	LXD:     "lxd",
  1798  	LXDR:    "lxdr",
  1799  	LXEB:    "lxeb",
  1800  	LXEBR:   "lxebr",
  1801  	LXE:     "lxe",
  1802  	LXER:    "lxer",
  1803  	LDEB:    "ldeb",
  1804  	LDEBR:   "ldebr",
  1805  	LDETR:   "ldetr",
  1806  	LDE:     "lde",
  1807  	LDER:    "lder",
  1808  	LLGF:    "llgf",
  1809  	LLGFR:   "llgfr",
  1810  	LLGFSG:  "llgfsg",
  1811  	LLGFAT:  "llgfat",
  1812  	LLZRGF:  "llzrgf",
  1813  	LLC:     "llc",
  1814  	LLCR:    "llcr",
  1815  	LLGC:    "llgc",
  1816  	LLGCR:   "llgcr",
  1817  	LLCH:    "llch",
  1818  	LLH:     "llh",
  1819  	LLHR:    "llhr",
  1820  	LLGH:    "llgh",
  1821  	LLGHR:   "llghr",
  1822  	LLHH:    "llhh",
  1823  	LLHRL:   "llhrl",
  1824  	LLGHRL:  "llghrl",
  1825  	LLIHH:   "llihh",
  1826  	LLIHL:   "llihl",
  1827  	LLIHF:   "llihf",
  1828  	LLILH:   "llilh",
  1829  	LLILL:   "llill",
  1830  	LLILF:   "llilf",
  1831  	LLGFRL:  "llgfrl",
  1832  	LLGT:    "llgt",
  1833  	LLGTR:   "llgtr",
  1834  	LLGTAT:  "llgtat",
  1835  	LM:      "lm",
  1836  	LMY:     "lmy",
  1837  	LMG:     "lmg",
  1838  	LMD:     "lmd",
  1839  	LMH:     "lmh",
  1840  	LNR:     "lnr",
  1841  	LNGR:    "lngr",
  1842  	LNGFR:   "lngfr",
  1843  	LNXBR:   "lnxbr",
  1844  	LNXR:    "lnxr",
  1845  	LNDBR:   "lndbr",
  1846  	LNDR:    "lndr",
  1847  	LNDFR:   "lndfr",
  1848  	LNEBR:   "lnebr",
  1849  	LNER:    "lner",
  1850  	LOC:     "loc",
  1851  	LOCR:    "locr",
  1852  	LOCG:    "locg",
  1853  	LOCGR:   "locgr",
  1854  	LPTEA:   "lptea",
  1855  	LPD:     "lpd",
  1856  	LPDG:    "lpdg",
  1857  	LPQ:     "lpq",
  1858  	LPR:     "lpr",
  1859  	LPGR:    "lpgr",
  1860  	LPGFR:   "lpgfr",
  1861  	LPXBR:   "lpxbr",
  1862  	LPXR:    "lpxr",
  1863  	LPDBR:   "lpdbr",
  1864  	LPDR:    "lpdr",
  1865  	LPDFR:   "lpdfr",
  1866  	LPEBR:   "lpebr",
  1867  	LPER:    "lper",
  1868  	LPSW:    "lpsw",
  1869  	LPSWE:   "lpswe",
  1870  	LPSWEY:  "lpswey",
  1871  	LRA:     "lra",
  1872  	LRAY:    "lray",
  1873  	LRAG:    "lrag",
  1874  	LRL:     "lrl",
  1875  	LGRL:    "lgrl",
  1876  	LGFRL:   "lgfrl",
  1877  	LRVH:    "lrvh",
  1878  	LRV:     "lrv",
  1879  	LRVR:    "lrvr",
  1880  	LRVG:    "lrvg",
  1881  	LRVGR:   "lrvgr",
  1882  	LDXBR:   "ldxbr",
  1883  	LDXBRA:  "ldxbra",
  1884  	LDXTR:   "ldxtr",
  1885  	LDXR:    "ldxr",
  1886  	LRDR:    "lrdr",
  1887  	LEXBR:   "lexbr",
  1888  	LEXBRA:  "lexbra",
  1889  	LEXR:    "lexr",
  1890  	LEDBR:   "ledbr",
  1891  	LEDBRA:  "ledbra",
  1892  	LEDTR:   "ledtr",
  1893  	LEDR:    "ledr",
  1894  	LRER:    "lrer",
  1895  	LURA:    "lura",
  1896  	LURAG:   "lurag",
  1897  	LZXR:    "lzxr",
  1898  	LZDR:    "lzdr",
  1899  	LZER:    "lzer",
  1900  	MSTA:    "msta",
  1901  	MSCH:    "msch",
  1902  	MC:      "mc",
  1903  	MVHHI:   "mvhhi",
  1904  	MVHI:    "mvhi",
  1905  	MVGHI:   "mvghi",
  1906  	MVC:     "mvc",
  1907  	MVI:     "mvi",
  1908  	MVIY:    "mviy",
  1909  	MVCIN:   "mvcin",
  1910  	MVCL:    "mvcl",
  1911  	MVCLE:   "mvcle",
  1912  	MVCLU:   "mvclu",
  1913  	MVN:     "mvn",
  1914  	MVPG:    "mvpg",
  1915  	MVCRL:   "mvcrl",
  1916  	MVST:    "mvst",
  1917  	MVCP:    "mvcp",
  1918  	MVCS:    "mvcs",
  1919  	MVCDK:   "mvcdk",
  1920  	MVCK:    "mvck",
  1921  	MVO:     "mvo",
  1922  	MVCOS:   "mvcos",
  1923  	MVCSK:   "mvcsk",
  1924  	MVZ:     "mvz",
  1925  	MG:      "mg",
  1926  	MGRK:    "mgrk",
  1927  	M:       "m",
  1928  	MFY:     "mfy",
  1929  	MR:      "mr",
  1930  	MXBR:    "mxbr",
  1931  	MXTR:    "mxtr",
  1932  	MXTRA:   "mxtra",
  1933  	MXR:     "mxr",
  1934  	MDB:     "mdb",
  1935  	MDBR:    "mdbr",
  1936  	MDTR:    "mdtr",
  1937  	MDTRA:   "mdtra",
  1938  	MD:      "md",
  1939  	MDR:     "mdr",
  1940  	MXDB:    "mxdb",
  1941  	MXDBR:   "mxdbr",
  1942  	MXD:     "mxd",
  1943  	MXDR:    "mxdr",
  1944  	MEEB:    "meeb",
  1945  	MEEBR:   "meebr",
  1946  	MEE:     "mee",
  1947  	MEER:    "meer",
  1948  	MDEB:    "mdeb",
  1949  	MDEBR:   "mdebr",
  1950  	MDE:     "mde",
  1951  	MDER:    "mder",
  1952  	ME:      "me",
  1953  	MER:     "mer",
  1954  	MAY:     "may",
  1955  	MAYR:    "mayr",
  1956  	MADB:    "madb",
  1957  	MADBR:   "madbr",
  1958  	MAD:     "mad",
  1959  	MADR:    "madr",
  1960  	MAEB:    "maeb",
  1961  	MAEBR:   "maebr",
  1962  	MAE:     "mae",
  1963  	MAER:    "maer",
  1964  	MAYH:    "mayh",
  1965  	MAYHR:   "mayhr",
  1966  	MAYL:    "mayl",
  1967  	MAYLR:   "maylr",
  1968  	MSDB:    "msdb",
  1969  	MSDBR:   "msdbr",
  1970  	MSD:     "msd",
  1971  	MSDR:    "msdr",
  1972  	MSEB:    "mseb",
  1973  	MSEBR:   "msebr",
  1974  	MSE:     "mse",
  1975  	MSER:    "mser",
  1976  	MP:      "mp",
  1977  	MH:      "mh",
  1978  	MHY:     "mhy",
  1979  	MGH:     "mgh",
  1980  	MHI:     "mhi",
  1981  	MGHI:    "mghi",
  1982  	MLG:     "mlg",
  1983  	MLGR:    "mlgr",
  1984  	ML:      "ml",
  1985  	MLR:     "mlr",
  1986  	MS:      "ms",
  1987  	MSC:     "msc",
  1988  	MSR:     "msr",
  1989  	MSRKC:   "msrkc",
  1990  	MSY:     "msy",
  1991  	MSG:     "msg",
  1992  	MSGC:    "msgc",
  1993  	MSGR:    "msgr",
  1994  	MSGRKC:  "msgrkc",
  1995  	MSGF:    "msgf",
  1996  	MSGFR:   "msgfr",
  1997  	MSFI:    "msfi",
  1998  	MSGFI:   "msgfi",
  1999  	MYH:     "myh",
  2000  	MYHR:    "myhr",
  2001  	MYL:     "myl",
  2002  	MYLR:    "mylr",
  2003  	MY:      "my",
  2004  	MYR:     "myr",
  2005  	NNRK:    "nnrk",
  2006  	NNGRK:   "nngrk",
  2007  	NNPA:    "nnpa",
  2008  	NIAI:    "niai",
  2009  	NTSTG:   "ntstg",
  2010  	NORK:    "nork",
  2011  	NOGRK:   "nogrk",
  2012  	NXRK:    "nxrk",
  2013  	NXGRK:   "nxgrk",
  2014  	O:       "o",
  2015  	OR:      "or",
  2016  	ORK:     "ork",
  2017  	OY:      "oy",
  2018  	OG:      "og",
  2019  	OGR:     "ogr",
  2020  	OGRK:    "ogrk",
  2021  	OC:      "oc",
  2022  	OI:      "oi",
  2023  	OIY:     "oiy",
  2024  	OIHH:    "oihh",
  2025  	OIHL:    "oihl",
  2026  	OIHF:    "oihf",
  2027  	OILH:    "oilh",
  2028  	OILL:    "oill",
  2029  	OILF:    "oilf",
  2030  	OCRK:    "ocrk",
  2031  	OCGRK:   "ocgrk",
  2032  	PACK:    "pack",
  2033  	PKA:     "pka",
  2034  	PKU:     "pku",
  2035  	PGIN:    "pgin",
  2036  	PGOUT:   "pgout",
  2037  	PCC:     "pcc",
  2038  	PCKMO:   "pckmo",
  2039  	PFPO:    "pfpo",
  2040  	PFMF:    "pfmf",
  2041  	PLO:     "plo",
  2042  	PPA:     "ppa",
  2043  	PRNO:    "prno",
  2044  	PTFF:    "ptff",
  2045  	PTF:     "ptf",
  2046  	POPCNT:  "popcnt",
  2047  	PFD:     "pfd",
  2048  	PFDRL:   "pfdrl",
  2049  	PC:      "pc",
  2050  	PR:      "pr",
  2051  	PT:      "pt",
  2052  	PTI:     "pti",
  2053  	PALB:    "palb",
  2054  	PTLB:    "ptlb",
  2055  	QAXTR:   "qaxtr",
  2056  	QADTR:   "qadtr",
  2057  	QPACI:   "qpaci",
  2058  	RRXTR:   "rrxtr",
  2059  	RRDTR:   "rrdtr",
  2060  	RCHP:    "rchp",
  2061  	RDP:     "rdp",
  2062  	RRBE:    "rrbe",
  2063  	RRBM:    "rrbm",
  2064  	RP:      "rp",
  2065  	RSCH:    "rsch",
  2066  	RLL:     "rll",
  2067  	RLLG:    "rllg",
  2068  	RNSBG:   "rnsbg",
  2069  	RXSBG:   "rxsbg",
  2070  	RISBG:   "risbg",
  2071  	RISBGN:  "risbgn",
  2072  	RISBHG:  "risbhg",
  2073  	RISBLG:  "risblg",
  2074  	ROSBG:   "rosbg",
  2075  	SRST:    "srst",
  2076  	SRSTU:   "srstu",
  2077  	SELR:    "selr",
  2078  	SELGR:   "selgr",
  2079  	SELFHR:  "selfhr",
  2080  	SAR:     "sar",
  2081  	SAL:     "sal",
  2082  	SAC:     "sac",
  2083  	SACF:    "sacf",
  2084  	SAM24:   "sam24",
  2085  	SAM31:   "sam31",
  2086  	SAM64:   "sam64",
  2087  	SRNM:    "srnm",
  2088  	SRNMB:   "srnmb",
  2089  	SCHM:    "schm",
  2090  	SCK:     "sck",
  2091  	SCKC:    "sckc",
  2092  	SCKPF:   "sckpf",
  2093  	SPT:     "spt",
  2094  	SRNMT:   "srnmt",
  2095  	SFPC:    "sfpc",
  2096  	SFASR:   "sfasr",
  2097  	SPX:     "spx",
  2098  	SPM:     "spm",
  2099  	SPKA:    "spka",
  2100  	SSAR:    "ssar",
  2101  	SSAIR:   "ssair",
  2102  	SSKE:    "sske",
  2103  	SSM:     "ssm",
  2104  	SRP:     "srp",
  2105  	SLDA:    "slda",
  2106  	SLDL:    "sldl",
  2107  	SLA:     "sla",
  2108  	SLAK:    "slak",
  2109  	SLAG:    "slag",
  2110  	SLL:     "sll",
  2111  	SLLK:    "sllk",
  2112  	SLLG:    "sllg",
  2113  	SRDA:    "srda",
  2114  	SRDL:    "srdl",
  2115  	SRA:     "sra",
  2116  	SRAK:    "srak",
  2117  	SRAG:    "srag",
  2118  	SRL:     "srl",
  2119  	SRLK:    "srlk",
  2120  	SRLG:    "srlg",
  2121  	SLXT:    "slxt",
  2122  	SLDT:    "sldt",
  2123  	SRXT:    "srxt",
  2124  	SRDT:    "srdt",
  2125  	SIGP:    "sigp",
  2126  	SORTL:   "sortl",
  2127  	SQXBR:   "sqxbr",
  2128  	SQXR:    "sqxr",
  2129  	SQDB:    "sqdb",
  2130  	SQDBR:   "sqdbr",
  2131  	SQD:     "sqd",
  2132  	SQDR:    "sqdr",
  2133  	SQEB:    "sqeb",
  2134  	SQEBR:   "sqebr",
  2135  	SQE:     "sqe",
  2136  	SQER:    "sqer",
  2137  	SSCH:    "ssch",
  2138  	ST:      "st",
  2139  	STY:     "sty",
  2140  	STG:     "stg",
  2141  	STD:     "std",
  2142  	STDY:    "stdy",
  2143  	STE:     "ste",
  2144  	STEY:    "stey",
  2145  	STAM:    "stam",
  2146  	STAMY:   "stamy",
  2147  	STBEAR:  "stbear",
  2148  	STCPS:   "stcps",
  2149  	STCRW:   "stcrw",
  2150  	STC:     "stc",
  2151  	STCY:    "stcy",
  2152  	STCH:    "stch",
  2153  	STCMH:   "stcmh",
  2154  	STCM:    "stcm",
  2155  	STCMY:   "stcmy",
  2156  	STCK:    "stck",
  2157  	STCKC:   "stckc",
  2158  	STCKE:   "stcke",
  2159  	STCKF:   "stckf",
  2160  	STCTL:   "stctl",
  2161  	STCTG:   "stctg",
  2162  	STAP:    "stap",
  2163  	STIDP:   "stidp",
  2164  	STPT:    "stpt",
  2165  	STFL:    "stfl",
  2166  	STFLE:   "stfle",
  2167  	STFPC:   "stfpc",
  2168  	STGSC:   "stgsc",
  2169  	STH:     "sth",
  2170  	STHY:    "sthy",
  2171  	STHH:    "sthh",
  2172  	STHRL:   "sthrl",
  2173  	STFH:    "stfh",
  2174  	STOCFH:  "stocfh",
  2175  	STM:     "stm",
  2176  	STMY:    "stmy",
  2177  	STMG:    "stmg",
  2178  	STMH:    "stmh",
  2179  	STOC:    "stoc",
  2180  	STOCG:   "stocg",
  2181  	STPQ:    "stpq",
  2182  	STPX:    "stpx",
  2183  	STRAG:   "strag",
  2184  	STRL:    "strl",
  2185  	STGRL:   "stgrl",
  2186  	STRVH:   "strvh",
  2187  	STRV:    "strv",
  2188  	STRVG:   "strvg",
  2189  	STSCH:   "stsch",
  2190  	STSI:    "stsi",
  2191  	STNSM:   "stnsm",
  2192  	STOSM:   "stosm",
  2193  	STURA:   "stura",
  2194  	STURG:   "sturg",
  2195  	S:       "s",
  2196  	SR:      "sr",
  2197  	SRK:     "srk",
  2198  	SY:      "sy",
  2199  	SG:      "sg",
  2200  	SGR:     "sgr",
  2201  	SGRK:    "sgrk",
  2202  	SGF:     "sgf",
  2203  	SGFR:    "sgfr",
  2204  	SXBR:    "sxbr",
  2205  	SXTR:    "sxtr",
  2206  	SXTRA:   "sxtra",
  2207  	SDB:     "sdb",
  2208  	SDBR:    "sdbr",
  2209  	SDTR:    "sdtr",
  2210  	SDTRA:   "sdtra",
  2211  	SEB:     "seb",
  2212  	SEBR:    "sebr",
  2213  	SP:      "sp",
  2214  	SH:      "sh",
  2215  	SHY:     "shy",
  2216  	SGH:     "sgh",
  2217  	SHHHR:   "shhhr",
  2218  	SHHLR:   "shhlr",
  2219  	SL:      "sl",
  2220  	SLR:     "slr",
  2221  	SLRK:    "slrk",
  2222  	SLY:     "sly",
  2223  	SLG:     "slg",
  2224  	SLGR:    "slgr",
  2225  	SLGRK:   "slgrk",
  2226  	SLGF:    "slgf",
  2227  	SLGFR:   "slgfr",
  2228  	SLHHHR:  "slhhhr",
  2229  	SLHHLR:  "slhhlr",
  2230  	SLFI:    "slfi",
  2231  	SLGFI:   "slgfi",
  2232  	SLB:     "slb",
  2233  	SLBR:    "slbr",
  2234  	SLBG:    "slbg",
  2235  	SLBGR:   "slbgr",
  2236  	SXR:     "sxr",
  2237  	SD:      "sd",
  2238  	SDR:     "sdr",
  2239  	SE:      "se",
  2240  	SER:     "ser",
  2241  	SW:      "sw",
  2242  	SWR:     "swr",
  2243  	SU:      "su",
  2244  	SUR:     "sur",
  2245  	SVC:     "svc",
  2246  	TAR:     "tar",
  2247  	TAM:     "tam",
  2248  	TS:      "ts",
  2249  	TB:      "tb",
  2250  	TCXB:    "tcxb",
  2251  	TDCXT:   "tdcxt",
  2252  	TCDB:    "tcdb",
  2253  	TDCDT:   "tdcdt",
  2254  	TCEB:    "tceb",
  2255  	TDCET:   "tdcet",
  2256  	TDGXT:   "tdgxt",
  2257  	TDGDT:   "tdgdt",
  2258  	TDGET:   "tdget",
  2259  	TP:      "tp",
  2260  	TPEI:    "tpei",
  2261  	TPI:     "tpi",
  2262  	TPROT:   "tprot",
  2263  	TSCH:    "tsch",
  2264  	TM:      "tm",
  2265  	TMY:     "tmy",
  2266  	TMHH:    "tmhh",
  2267  	TMHL:    "tmhl",
  2268  	TMLH:    "tmlh",
  2269  	TMLL:    "tmll",
  2270  	TMH:     "tmh",
  2271  	TML:     "tml",
  2272  	TRACE:   "trace",
  2273  	TRACG:   "tracg",
  2274  	TABORT:  "tabort",
  2275  	TBEGINC: "tbeginc",
  2276  	TBEGIN:  "tbegin",
  2277  	TEND:    "tend",
  2278  	TR:      "tr",
  2279  	TRT:     "trt",
  2280  	TRTE:    "trte",
  2281  	TRTR:    "trtr",
  2282  	TRTRE:   "trtre",
  2283  	TRE:     "tre",
  2284  	TROO:    "troo",
  2285  	TROT:    "trot",
  2286  	TRTO:    "trto",
  2287  	TRTT:    "trtt",
  2288  	TRAP2:   "trap2",
  2289  	TRAP4:   "trap4",
  2290  	UNPK:    "unpk",
  2291  	UNPKA:   "unpka",
  2292  	UNPKU:   "unpku",
  2293  	UPT:     "upt",
  2294  	VA:      "va",
  2295  	VACC:    "vacc",
  2296  	VAP:     "vap",
  2297  	VAC:     "vac",
  2298  	VACCC:   "vaccc",
  2299  	VN:      "vn",
  2300  	VNC:     "vnc",
  2301  	VAVG:    "vavg",
  2302  	VAVGL:   "vavgl",
  2303  	VBPERM:  "vbperm",
  2304  	VCKSM:   "vcksm",
  2305  	VCP:     "vcp",
  2306  	VCEQ:    "vceq",
  2307  	VCH:     "vch",
  2308  	VCHL:    "vchl",
  2309  	VCSPH:   "vcsph",
  2310  	VCVB:    "vcvb",
  2311  	VCVBG:   "vcvbg",
  2312  	VCVD:    "vcvd",
  2313  	VCVDG:   "vcvdg",
  2314  	VCLZDP:  "vclzdp",
  2315  	VCLZ:    "vclz",
  2316  	VCTZ:    "vctz",
  2317  	VDP:     "vdp",
  2318  	VEC:     "vec",
  2319  	VECL:    "vecl",
  2320  	VERIM:   "verim",
  2321  	VERLL:   "verll",
  2322  	VERLLV:  "verllv",
  2323  	VESLV:   "veslv",
  2324  	VESL:    "vesl",
  2325  	VESRA:   "vesra",
  2326  	VESRAV:  "vesrav",
  2327  	VESRL:   "vesrl",
  2328  	VESRLV:  "vesrlv",
  2329  	VX:      "vx",
  2330  	VFAE:    "vfae",
  2331  	VFEE:    "vfee",
  2332  	VFENE:   "vfene",
  2333  	VFA:     "vfa",
  2334  	WFK:     "wfk",
  2335  	VFCE:    "vfce",
  2336  	VFCH:    "vfch",
  2337  	VFCHE:   "vfche",
  2338  	WFC:     "wfc",
  2339  	VCLFNH:  "vclfnh",
  2340  	VCLFNL:  "vclfnl",
  2341  	VCRNF:   "vcrnf",
  2342  	VCFPS:   "vcfps",
  2343  	VCDG:    "vcdg",
  2344  	VCFPL:   "vcfpl",
  2345  	VCDLG:   "vcdlg",
  2346  	VCFN:    "vcfn",
  2347  	VCSFP:   "vcsfp",
  2348  	VCGD:    "vcgd",
  2349  	VCLFP:   "vclfp",
  2350  	VCLGD:   "vclgd",
  2351  	VCNF:    "vcnf",
  2352  	VFD:     "vfd",
  2353  	VFLL:    "vfll",
  2354  	VFLR:    "vflr",
  2355  	VFMAX:   "vfmax",
  2356  	VFMIN:   "vfmin",
  2357  	VFM:     "vfm",
  2358  	VFMA:    "vfma",
  2359  	VFMS:    "vfms",
  2360  	VFNMA:   "vfnma",
  2361  	VFNMS:   "vfnms",
  2362  	VFPSO:   "vfpso",
  2363  	VFSQ:    "vfsq",
  2364  	VFS:     "vfs",
  2365  	VFTCI:   "vftci",
  2366  	VGFM:    "vgfm",
  2367  	VGFMA:   "vgfma",
  2368  	VGEF:    "vgef",
  2369  	VGEG:    "vgeg",
  2370  	VGBM:    "vgbm",
  2371  	VGM:     "vgm",
  2372  	VISTR:   "vistr",
  2373  	VL:      "vl",
  2374  	VLR:     "vlr",
  2375  	VLREP:   "vlrep",
  2376  	VLEBRH:  "vlebrh",
  2377  	VLEBRF:  "vlebrf",
  2378  	VLEBRG:  "vlebrg",
  2379  	VLBRREP: "vlbrrep",
  2380  	VLLEBRZ: "vllebrz",
  2381  	VLBR:    "vlbr",
  2382  	VLC:     "vlc",
  2383  	VLEH:    "vleh",
  2384  	VLEF:    "vlef",
  2385  	VLEG:    "vleg",
  2386  	VLEB:    "vleb",
  2387  	VLEIH:   "vleih",
  2388  	VLEIF:   "vleif",
  2389  	VLEIG:   "vleig",
  2390  	VLEIB:   "vleib",
  2391  	VLER:    "vler",
  2392  	VFI:     "vfi",
  2393  	VLGV:    "vlgv",
  2394  	VLIP:    "vlip",
  2395  	VLLEZ:   "vllez",
  2396  	VLM:     "vlm",
  2397  	VLP:     "vlp",
  2398  	VLRL:    "vlrl",
  2399  	VLRLR:   "vlrlr",
  2400  	VLBB:    "vlbb",
  2401  	VLVG:    "vlvg",
  2402  	VLVGP:   "vlvgp",
  2403  	VLL:     "vll",
  2404  	VMX:     "vmx",
  2405  	VMXL:    "vmxl",
  2406  	VMRH:    "vmrh",
  2407  	VMRL:    "vmrl",
  2408  	VMN:     "vmn",
  2409  	VMNL:    "vmnl",
  2410  	VMAE:    "vmae",
  2411  	VMAH:    "vmah",
  2412  	VMALE:   "vmale",
  2413  	VMALH:   "vmalh",
  2414  	VMALO:   "vmalo",
  2415  	VMAL:    "vmal",
  2416  	VMAO:    "vmao",
  2417  	VMSP:    "vmsp",
  2418  	VMP:     "vmp",
  2419  	VME:     "vme",
  2420  	VMH:     "vmh",
  2421  	VMLE:    "vmle",
  2422  	VMLH:    "vmlh",
  2423  	VMLO:    "vmlo",
  2424  	VML:     "vml",
  2425  	VMO:     "vmo",
  2426  	VMSL:    "vmsl",
  2427  	VNN:     "vnn",
  2428  	VNO:     "vno",
  2429  	VNX:     "vnx",
  2430  	VO:      "vo",
  2431  	VOC:     "voc",
  2432  	VPK:     "vpk",
  2433  	VPKLS:   "vpkls",
  2434  	VPKS:    "vpks",
  2435  	VPKZ:    "vpkz",
  2436  	VPKZR:   "vpkzr",
  2437  	VPSOP:   "vpsop",
  2438  	VPERM:   "vperm",
  2439  	VPDI:    "vpdi",
  2440  	VPOPCT:  "vpopct",
  2441  	VRP:     "vrp",
  2442  	VREP:    "vrep",
  2443  	VREPI:   "vrepi",
  2444  	VSCEF:   "vscef",
  2445  	VSCEG:   "vsceg",
  2446  	VSEL:    "vsel",
  2447  	VSDP:    "vsdp",
  2448  	VSRP:    "vsrp",
  2449  	VSRPR:   "vsrpr",
  2450  	VSL:     "vsl",
  2451  	VSLB:    "vslb",
  2452  	VSLD:    "vsld",
  2453  	VSLDB:   "vsldb",
  2454  	VSRA:    "vsra",
  2455  	VSRAB:   "vsrab",
  2456  	VSRD:    "vsrd",
  2457  	VSRL:    "vsrl",
  2458  	VSRLB:   "vsrlb",
  2459  	VSEG:    "vseg",
  2460  	VST:     "vst",
  2461  	VSTEBRH: "vstebrh",
  2462  	VSTEBRF: "vstebrf",
  2463  	VSTEBRG: "vstebrg",
  2464  	VSTBR:   "vstbr",
  2465  	VSTEH:   "vsteh",
  2466  	VSTEF:   "vstef",
  2467  	VSTEG:   "vsteg",
  2468  	VSTEB:   "vsteb",
  2469  	VSTER:   "vster",
  2470  	VSTM:    "vstm",
  2471  	VSTRL:   "vstrl",
  2472  	VSTRLR:  "vstrlr",
  2473  	VSTL:    "vstl",
  2474  	VSTRC:   "vstrc",
  2475  	VSTRS:   "vstrs",
  2476  	VS:      "vs",
  2477  	VSCBI:   "vscbi",
  2478  	VSP:     "vsp",
  2479  	VSBCBI:  "vsbcbi",
  2480  	VSBI:    "vsbi",
  2481  	VSUMG:   "vsumg",
  2482  	VSUMQ:   "vsumq",
  2483  	VSUM:    "vsum",
  2484  	VTP:     "vtp",
  2485  	VTM:     "vtm",
  2486  	VUPH:    "vuph",
  2487  	VUPLH:   "vuplh",
  2488  	VUPLL:   "vupll",
  2489  	VUPL:    "vupl",
  2490  	VUPKZ:   "vupkz",
  2491  	VUPKZH:  "vupkzh",
  2492  	VUPKZL:  "vupkzl",
  2493  	ZAP:     "zap",
  2494  }
  2495  
  2496  var (
  2497  	ap_Reg_8_11            = &argField{Type: TypeReg, flags: 0x1, BitField: BitField{8, 4}}
  2498  	ap_DispUnsigned_20_31  = &argField{Type: TypeDispUnsigned, flags: 0x10, BitField: BitField{20, 12}}
  2499  	ap_IndexReg_12_15      = &argField{Type: TypeIndexReg, flags: 0x41, BitField: BitField{12, 4}}
  2500  	ap_BaseReg_16_19       = &argField{Type: TypeBaseReg, flags: 0x21, BitField: BitField{16, 4}}
  2501  	ap_Reg_12_15           = &argField{Type: TypeReg, flags: 0x1, BitField: BitField{12, 4}}
  2502  	ap_Reg_24_27           = &argField{Type: TypeReg, flags: 0x1, BitField: BitField{24, 4}}
  2503  	ap_Reg_28_31           = &argField{Type: TypeReg, flags: 0x1, BitField: BitField{28, 4}}
  2504  	ap_Reg_16_19           = &argField{Type: TypeReg, flags: 0x1, BitField: BitField{16, 4}}
  2505  	ap_DispSigned20_20_39  = &argField{Type: TypeDispSigned20, flags: 0x10, BitField: BitField{20, 20}}
  2506  	ap_FPReg_24_27         = &argField{Type: TypeFPReg, flags: 0x2, BitField: BitField{24, 4}}
  2507  	ap_FPReg_28_31         = &argField{Type: TypeFPReg, flags: 0x2, BitField: BitField{28, 4}}
  2508  	ap_FPReg_16_19         = &argField{Type: TypeFPReg, flags: 0x2, BitField: BitField{16, 4}}
  2509  	ap_Mask_20_23          = &argField{Type: TypeMask, flags: 0x800, BitField: BitField{20, 4}}
  2510  	ap_FPReg_8_11          = &argField{Type: TypeFPReg, flags: 0x2, BitField: BitField{8, 4}}
  2511  	ap_Len_8_11            = &argField{Type: TypeLen, flags: 0x10, BitField: BitField{8, 4}}
  2512  	ap_DispUnsigned_36_47  = &argField{Type: TypeDispUnsigned, flags: 0x10, BitField: BitField{36, 12}}
  2513  	ap_Len_12_15           = &argField{Type: TypeLen, flags: 0x10, BitField: BitField{12, 4}}
  2514  	ap_BaseReg_32_35       = &argField{Type: TypeBaseReg, flags: 0x21, BitField: BitField{32, 4}}
  2515  	ap_ImmSigned16_16_31   = &argField{Type: TypeImmSigned16, flags: 0x0, BitField: BitField{16, 16}}
  2516  	ap_ImmSigned32_16_47   = &argField{Type: TypeImmSigned32, flags: 0x0, BitField: BitField{16, 32}}
  2517  	ap_ImmSigned8_8_15     = &argField{Type: TypeImmSigned8, flags: 0x0, BitField: BitField{8, 8}}
  2518  	ap_ImmUnsigned_16_47   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{16, 32}}
  2519  	ap_FPReg_12_15         = &argField{Type: TypeFPReg, flags: 0x2, BitField: BitField{12, 4}}
  2520  	ap_Len_8_15            = &argField{Type: TypeLen, flags: 0x10, BitField: BitField{8, 8}}
  2521  	ap_Mask_8_11           = &argField{Type: TypeMask, flags: 0x800, BitField: BitField{8, 4}}
  2522  	ap_RegImSigned16_32_47 = &argField{Type: TypeRegImSigned16, flags: 0x80, BitField: BitField{32, 16}}
  2523  	ap_RegImSigned12_12_23 = &argField{Type: TypeRegImSigned12, flags: 0x80, BitField: BitField{12, 12}}
  2524  	ap_RegImSigned24_24_47 = &argField{Type: TypeRegImSigned24, flags: 0x80, BitField: BitField{24, 24}}
  2525  	ap_RegImSigned16_16_31 = &argField{Type: TypeRegImSigned16, flags: 0x80, BitField: BitField{16, 16}}
  2526  	ap_RegImSigned32_16_47 = &argField{Type: TypeRegImSigned32, flags: 0x80, BitField: BitField{16, 32}}
  2527  	ap_Mask_32_35          = &argField{Type: TypeMask, flags: 0x800, BitField: BitField{32, 4}}
  2528  	ap_Mask_16_19          = &argField{Type: TypeMask, flags: 0x800, BitField: BitField{16, 4}}
  2529  	ap_ImmSigned16_32_47   = &argField{Type: TypeImmSigned16, flags: 0x0, BitField: BitField{32, 16}}
  2530  	ap_ImmSigned8_32_39    = &argField{Type: TypeImmSigned8, flags: 0x0, BitField: BitField{32, 8}}
  2531  	ap_Mask_12_15          = &argField{Type: TypeMask, flags: 0x800, BitField: BitField{12, 4}}
  2532  	ap_ImmUnsigned_8_15    = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{8, 8}}
  2533  	ap_ImmUnsigned_32_47   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{32, 16}}
  2534  	ap_ImmUnsigned_32_39   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{32, 8}}
  2535  	ap_ImmUnsigned_16_31   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{16, 16}}
  2536  	ap_FPReg_32_35         = &argField{Type: TypeFPReg, flags: 0x2, BitField: BitField{32, 4}}
  2537  	ap_Mask_36_39          = &argField{Type: TypeMask, flags: 0x800, BitField: BitField{36, 4}}
  2538  	ap_ACReg_24_27         = &argField{Type: TypeACReg, flags: 0x3, BitField: BitField{24, 4}}
  2539  	ap_ACReg_28_31         = &argField{Type: TypeACReg, flags: 0x3, BitField: BitField{28, 4}}
  2540  	ap_VecReg_8_11         = &argField{Type: TypeVecReg, flags: 0x8, BitField: BitField{8, 4}}
  2541  	ap_VecReg_12_15        = &argField{Type: TypeVecReg, flags: 0x8, BitField: BitField{12, 4}}
  2542  	ap_VecReg_16_19        = &argField{Type: TypeVecReg, flags: 0x8, BitField: BitField{16, 4}}
  2543  	ap_ImmUnsigned_36_39   = &argField{Type: TypeImmUnsigned, flags: 0xc00, BitField: BitField{36, 4}}
  2544  	ap_Mask_24_27          = &argField{Type: TypeMask, flags: 0x800, BitField: BitField{24, 4}}
  2545  	ap_ACReg_8_11          = &argField{Type: TypeACReg, flags: 0x3, BitField: BitField{8, 4}}
  2546  	ap_ACReg_12_15         = &argField{Type: TypeACReg, flags: 0x3, BitField: BitField{12, 4}}
  2547  	ap_CReg_8_11           = &argField{Type: TypeCReg, flags: 0x4, BitField: BitField{8, 4}}
  2548  	ap_CReg_12_15          = &argField{Type: TypeCReg, flags: 0x4, BitField: BitField{12, 4}}
  2549  	ap_ImmSigned32_16_31   = &argField{Type: TypeImmSigned32, flags: 0x0, BitField: BitField{16, 16}}
  2550  	ap_ImmUnsigned_24_27   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{24, 4}}
  2551  	ap_ImmUnsigned_28_31   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{28, 4}}
  2552  	ap_ImmUnsigned_16_23   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{16, 8}}
  2553  	ap_ImmUnsigned_24_31   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{24, 8}}
  2554  	ap_ImmUnsigned_12_15   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{12, 4}}
  2555  	ap_ImmUnsigned_28_35   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{28, 8}}
  2556  	ap_VecReg_32_35        = &argField{Type: TypeVecReg, flags: 0x8, BitField: BitField{32, 4}}
  2557  	ap_Mask_28_31          = &argField{Type: TypeMask, flags: 0x800, BitField: BitField{28, 4}}
  2558  	ap_ImmUnsigned_16_27   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{16, 12}}
  2559  	ap_ImmUnsigned_32_35   = &argField{Type: TypeImmUnsigned, flags: 0x0, BitField: BitField{32, 4}}
  2560  )
  2561  
  2562  var instFormats = [...]instFormat{
  2563  	{A, 0xff00000000000000, 0x5a00000000000000, 0x0, // ADD (32) (A R1,D2(X2,B2))
  2564  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2565  	{AR, 0xff00000000000000, 0x1a00000000000000, 0x0, // ADD (32) (AR R1,R2)
  2566  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  2567  	{ARK, 0xffff000000000000, 0xb9f8000000000000, 0xf0000000000, // ADD (32) (ARK R1,R2,R3)
  2568  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2569  	{AY, 0xff00000000ff0000, 0xe3000000005a0000, 0x0, // ADD (32) (AY R1,D2(X2,B2))
  2570  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2571  	{AG, 0xff00000000ff0000, 0xe300000000080000, 0x0, // ADD (64) (AG R1,D2(X2,B2))
  2572  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2573  	{AGR, 0xffff000000000000, 0xb908000000000000, 0xff0000000000, // ADD (64) (AGR R1,R2)
  2574  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2575  	{AGRK, 0xffff000000000000, 0xb9e8000000000000, 0xf0000000000, // ADD (64) (AGRK R1,R2,R3)
  2576  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2577  	{AGF, 0xff00000000ff0000, 0xe300000000180000, 0x0, // ADD (64←32) (AGF R1,D2(X2,B2))
  2578  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2579  	{AGFR, 0xffff000000000000, 0xb918000000000000, 0xff0000000000, // ADD (64←32) (AGFR R1,R2)
  2580  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2581  	{AXBR, 0xffff000000000000, 0xb34a000000000000, 0xff0000000000, // ADD (extended BFP) (AXBR R1,R2)
  2582  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2583  	{AXTR, 0xffff000000000000, 0xb3da000000000000, 0xf0000000000, // ADD (extended DFP) (AXTR R1,R2,R3)
  2584  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19}},
  2585  	{AXTRA, 0xffff000000000000, 0xb3da000000000000, 0x0, // ADD (extended DFP) (AXTRA R1,R2,R3,M4)
  2586  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19, ap_Mask_20_23}},
  2587  	{ADB, 0xff00000000ff0000, 0xed000000001a0000, 0xff000000, // ADD (long BFP) (ADB R1,D2(X2,B2))
  2588  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2589  	{ADBR, 0xffff000000000000, 0xb31a000000000000, 0xff0000000000, // ADD (long BFP) (ADBR R1,R2)
  2590  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2591  	{ADTR, 0xffff000000000000, 0xb3d2000000000000, 0xf0000000000, // ADD (long DFP) (ADTR R1,R2,R3)
  2592  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19}},
  2593  	{ADTRA, 0xffff000000000000, 0xb3d2000000000000, 0x0, // ADD (long DFP) (ADTRA R1,R2,R3,M4)
  2594  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19, ap_Mask_20_23}},
  2595  	{AEB, 0xff00000000ff0000, 0xed000000000a0000, 0xff000000, // ADD (short BFP) (AEB R1,D2(X2,B2))
  2596  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2597  	{AEBR, 0xffff000000000000, 0xb30a000000000000, 0xff0000000000, // ADD (short BFP) (AEBR R1,R2)
  2598  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2599  	{AP, 0xff00000000000000, 0xfa00000000000000, 0x0, // ADD DECIMAL (AP D1(L1,B1),D2(L2,B2))
  2600  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_12_15, ap_BaseReg_32_35}},
  2601  	{AH, 0xff00000000000000, 0x4a00000000000000, 0x0, // ADD HALFWORD (32←16) (AH R1,D2(X2,B2))
  2602  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2603  	{AHY, 0xff00000000ff0000, 0xe3000000007a0000, 0x0, // ADD HALFWORD (32←16) (AHY R1,D2(X2,B2))
  2604  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2605  	{AGH, 0xff00000000ff0000, 0xe300000000380000, 0x0, // ADD HALFWORD (64→16) (AGH R1,D2(X2,B2))
  2606  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2607  	{AHI, 0xff0f000000000000, 0xa70a000000000000, 0x0, // ADD HALFWORD IMMEDIATE (32←16) (AHI R1,I2)
  2608  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  2609  	{AGHI, 0xff0f000000000000, 0xa70b000000000000, 0x0, // ADD HALFWORD IMMEDIATE (64←16) (AGHI R1,I2)
  2610  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  2611  	{AHHHR, 0xffff000000000000, 0xb9c8000000000000, 0xf0000000000, // ADD HIGH (32) (AHHHR R1,R2,R3)
  2612  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2613  	{AHHLR, 0xffff000000000000, 0xb9d8000000000000, 0xf0000000000, // ADD HIGH (32) (AHHLR R1,R2,R3)
  2614  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2615  	{AFI, 0xff0f000000000000, 0xc209000000000000, 0x0, // ADD IMMEDIATE (32) (AFI R1,I2)
  2616  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  2617  	{AHIK, 0xff00000000ff0000, 0xec00000000d80000, 0xff000000, // ADD IMMEDIATE (32←16) (AHIK R1,R3,I2)
  2618  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmSigned16_16_31}},
  2619  	{ASI, 0xff00000000ff0000, 0xeb000000006a0000, 0x0, // ADD IMMEDIATE (32←8) (ASI D1(B1),I2)
  2620  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_ImmSigned8_8_15}},
  2621  	{AGHIK, 0xff00000000ff0000, 0xec00000000d90000, 0xff000000, // ADD IMMEDIATE (64←16) (AGHIK R1,R3,I2)
  2622  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmSigned16_16_31}},
  2623  	{AGFI, 0xff0f000000000000, 0xc208000000000000, 0x0, // ADD IMMEDIATE (64←32) (AGFI R1,I2)
  2624  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  2625  	{AGSI, 0xff00000000ff0000, 0xeb000000007a0000, 0x0, // ADD IMMEDIATE (64←8) (AGSI D1(B1),I2)
  2626  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_ImmSigned8_8_15}},
  2627  	{AIH, 0xff0f000000000000, 0xcc08000000000000, 0x0, // ADD IMMEDIATE HIGH (32) (AIH R1,I2)
  2628  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  2629  	{AL, 0xff00000000000000, 0x5e00000000000000, 0x0, // ADD LOGICAL (32) (AL R1,D2(X2,B2))
  2630  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2631  	{ALR, 0xff00000000000000, 0x1e00000000000000, 0x0, // ADD LOGICAL (32) (ALR R1,R2)
  2632  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  2633  	{ALRK, 0xffff000000000000, 0xb9fa000000000000, 0xf0000000000, // ADD LOGICAL (32) (ALRK R1,R2,R3)
  2634  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2635  	{ALY, 0xff00000000ff0000, 0xe3000000005e0000, 0x0, // ADD LOGICAL (32) (ALY R1,D2(X2,B2))
  2636  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2637  	{ALG, 0xff00000000ff0000, 0xe3000000000a0000, 0x0, // ADD LOGICAL (64) (ALG R1,D2(X2,B2))
  2638  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2639  	{ALGR, 0xffff000000000000, 0xb90a000000000000, 0xff0000000000, // ADD LOGICAL (64) (ALGR R1,R2)
  2640  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2641  	{ALGRK, 0xffff000000000000, 0xb9ea000000000000, 0xf0000000000, // ADD LOGICAL (64) (ALGRK R1,R2,R3)
  2642  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2643  	{ALGF, 0xff00000000ff0000, 0xe3000000001a0000, 0x0, // ADD LOGICAL (64←32) (ALGF R1,D2(X2,B2))
  2644  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2645  	{ALGFR, 0xffff000000000000, 0xb91a000000000000, 0xff0000000000, // ADD LOGICAL (64←32) (ALGFR R1,R2)
  2646  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2647  	{ALHHHR, 0xffff000000000000, 0xb9ca000000000000, 0xf0000000000, // ADD LOGICAL HIGH (32) (ALHHHR R1,R2,R3)
  2648  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2649  	{ALHHLR, 0xffff000000000000, 0xb9da000000000000, 0xf0000000000, // ADD LOGICAL HIGH (32) (ALHHLR R1,R2,R3)
  2650  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2651  	{ALFI, 0xff0f000000000000, 0xc20b000000000000, 0x0, // ADD LOGICAL IMMEDIATE (32) (ALFI R1,I2)
  2652  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  2653  	{ALGFI, 0xff0f000000000000, 0xc20a000000000000, 0x0, // ADD LOGICAL IMMEDIATE (64←32) (ALGFI R1,I2)
  2654  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  2655  	{ALC, 0xff00000000ff0000, 0xe300000000980000, 0x0, // ADD LOGICAL WITH CARRY (32) (ALC R1,D2(X2,B2))
  2656  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2657  	{ALCR, 0xffff000000000000, 0xb998000000000000, 0xff0000000000, // ADD LOGICAL WITH CARRY (32) (ALCR R1,R2)
  2658  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2659  	{ALCG, 0xff00000000ff0000, 0xe300000000880000, 0x0, // ADD LOGICAL WITH CARRY (64) (ALCG R1,D2(X2,B2))
  2660  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2661  	{ALCGR, 0xffff000000000000, 0xb988000000000000, 0xff0000000000, // ADD LOGICAL WITH CARRY (64) (ALCGR R1,R2)
  2662  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2663  	{ALHSIK, 0xff00000000ff0000, 0xec00000000da0000, 0xff000000, // ADD LOGICAL WITH SIGNED IMMEDIATE(32→16) (ALHSIK R1,R3,I2)
  2664  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmSigned16_16_31}},
  2665  	{ALSI, 0xff00000000ff0000, 0xeb000000006e0000, 0x0, // ADD LOGICAL WITH SIGNED IMMEDIATE (32←8) (ALSI D1(B1),I2)
  2666  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_ImmSigned8_8_15}},
  2667  	{ALGHSIK, 0xff00000000ff0000, 0xec00000000db0000, 0xff000000, // ADD LOGICAL WITH SIGNED IMMEDIATE(64→16) (ALGHSIK R1,R3,I2)
  2668  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmSigned16_16_31}},
  2669  	{ALGSI, 0xff00000000ff0000, 0xeb000000007e0000, 0x0, // ADD LOGICAL WITH SIGNED IMMEDIATE (64→8) (ALGSI D1(B1),I2)
  2670  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_ImmSigned8_8_15}},
  2671  	{ALSIH, 0xff0f000000000000, 0xcc0a000000000000, 0x0, // ADD LOGICAL WITH SIGNED IMMEDIATE HIGH(32) (ALSIH R1,I2)
  2672  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  2673  	{ALSIHN, 0xff0f000000000000, 0xcc0b000000000000, 0x0, // ADD LOGICAL WITH SIGNED IMMEDIATE HIGH(32) (ALSIHN R1,I2)
  2674  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  2675  	{AXR, 0xff00000000000000, 0x3600000000000000, 0x0, // ADD NORMALIZED (extended HFP) (AXR R1,R2)
  2676  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  2677  	{AD, 0xff00000000000000, 0x6a00000000000000, 0x0, // ADD NORMALIZED (long HFP) (AD R1,D2(X2,B2))
  2678  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2679  	{ADR, 0xff00000000000000, 0x2a00000000000000, 0x0, // ADD NORMALIZED (long HFP) (ADR R1,R2)
  2680  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  2681  	{AE, 0xff00000000000000, 0x7a00000000000000, 0x0, // ADD NORMALIZED (short HFP) (AE R1,D2(X2,B2))
  2682  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2683  	{AER, 0xff00000000000000, 0x3a00000000000000, 0x0, // ADD NORMALIZED (short HFP) (AER R1,R2)
  2684  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  2685  	{AW, 0xff00000000000000, 0x6e00000000000000, 0x0, // ADD UNNORMALIZED (long HFP) (AW R1,D2(X2,B2))
  2686  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2687  	{AWR, 0xff00000000000000, 0x2e00000000000000, 0x0, // ADD UNNORMALIZED (long HFP) (AWR R1,R2)
  2688  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  2689  	{AU, 0xff00000000000000, 0x7e00000000000000, 0x0, // ADD UNNORMALIZED (short HFP) (AU R1,D2(X2,B2))
  2690  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2691  	{AUR, 0xff00000000000000, 0x3e00000000000000, 0x0, // ADD UNNORMALIZED (short HFP) (AUR R1,R2)
  2692  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  2693  	{N, 0xff00000000000000, 0x5400000000000000, 0x0, // AND (32) (N R1,D2(X2,B2))
  2694  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2695  	{NR, 0xff00000000000000, 0x1400000000000000, 0x0, // AND (32) (NR R1,R2)
  2696  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  2697  	{NRK, 0xffff000000000000, 0xb9f4000000000000, 0xf0000000000, // AND (32) (NRK R1,R2,R3)
  2698  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2699  	{NY, 0xff00000000ff0000, 0xe300000000540000, 0x0, // AND (32) (NY R1,D2(X2,B2))
  2700  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2701  	{NG, 0xff00000000ff0000, 0xe300000000800000, 0x0, // AND (64) (NG R1,D2(X2,B2))
  2702  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2703  	{NGR, 0xffff000000000000, 0xb980000000000000, 0xff0000000000, // AND (64) (NGR R1,R2)
  2704  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2705  	{NGRK, 0xffff000000000000, 0xb9e4000000000000, 0xf0000000000, // AND (64) (NGRK R1,R2,R3)
  2706  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2707  	{NC, 0xff00000000000000, 0xd400000000000000, 0x0, // AND (character) (NC D1(L1,B1),D2(B2))
  2708  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  2709  	{NI, 0xff00000000000000, 0x9400000000000000, 0x0, // AND (immediate) (NI D1(B1),I2)
  2710  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmSigned8_8_15}},
  2711  	{NIY, 0xff00000000ff0000, 0xeb00000000540000, 0x0, // AND (immediate) (NIY D1(B1),I2)
  2712  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_ImmSigned8_8_15}},
  2713  	{NIHH, 0xff0f000000000000, 0xa504000000000000, 0x0, // AND IMMEDIATE (high high) (NIHH R1,I2)
  2714  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  2715  	{NIHL, 0xff0f000000000000, 0xa505000000000000, 0x0, // AND IMMEDIATE (high low) (NIHL R1,I2)
  2716  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  2717  	{NIHF, 0xff0f000000000000, 0xc00a000000000000, 0x0, // AND IMMEDIATE (high) (NIHF R1,I2)
  2718  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  2719  	{NILH, 0xff0f000000000000, 0xa506000000000000, 0x0, // AND IMMEDIATE (low high) (NILH R1,I2)
  2720  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  2721  	{NILL, 0xff0f000000000000, 0xa507000000000000, 0x0, // AND IMMEDIATE (low low) (NILL R1,I2)
  2722  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  2723  	{NILF, 0xff0f000000000000, 0xc00b000000000000, 0x0, // AND IMMEDIATE (low) (NILF R1,I2)
  2724  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  2725  	{NCRK, 0xffff000000000000, 0xb9f5000000000000, 0xf0000000000, // AND WITH COMPLEMENT(32) (NCRK R1,R2,R3)
  2726  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2727  	{NCGRK, 0xffff000000000000, 0xb9e5000000000000, 0xf0000000000, // AND WITH COMPLEMENT(64) (NCGRK R1,R2,R3)
  2728  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  2729  	{BAL, 0xff00000000000000, 0x4500000000000000, 0x0, // BRANCH AND LINK (BAL R1,D2(X2,B2))
  2730  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2731  	{BALR, 0xff00000000000000, 0x500000000000000, 0x0, // BRANCH AND LINK (BALR R1,R2)
  2732  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  2733  	{BAS, 0xff00000000000000, 0x4d00000000000000, 0x0, // BRANCH AND SAVE (BAS R1,D2(X2,B2))
  2734  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2735  	{BASR, 0xff00000000000000, 0xd00000000000000, 0x0, // BRANCH AND SAVE (BASR R1,R2)
  2736  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  2737  	{BASSM, 0xff00000000000000, 0xc00000000000000, 0x0, // BRANCH AND SAVE AND SET MODE (BASSM R1,R2)
  2738  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  2739  	{BSA, 0xffff000000000000, 0xb25a000000000000, 0xff0000000000, // BRANCH AND SET AUTHORITY (BSA R1,R2)
  2740  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2741  	{BSM, 0xff00000000000000, 0xb00000000000000, 0x0, // BRANCH AND SET MODE (BSM R1,R2)
  2742  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  2743  	{BAKR, 0xffff000000000000, 0xb240000000000000, 0xff0000000000, // BRANCH AND STACK (BAKR R1,R2)
  2744  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2745  	{BSG, 0xffff000000000000, 0xb258000000000000, 0xff0000000000, // BRANCH IN SUBSPACE GROUP (BSG R1,R2)
  2746  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2747  	{BIC, 0xff00000000ff0000, 0xe300000000470000, 0x0, // BRANCH INDIRECT ON CONDITION (BIC M1,D2(X2,B2))
  2748  		[8]*argField{ap_Mask_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2749  	{BC, 0xff00000000000000, 0x4700000000000000, 0x0, // BRANCH ON CONDITION (BC M1,D2(X2,B2))
  2750  		[8]*argField{ap_Mask_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2751  	{BCR, 0xff00000000000000, 0x700000000000000, 0x0, // BRANCH ON CONDITION (BCR M1,R2)
  2752  		[8]*argField{ap_Mask_8_11, ap_Reg_12_15}},
  2753  	{BCT, 0xff00000000000000, 0x4600000000000000, 0x0, // BRANCH ON COUNT (32) (BCT R1,D2(X2,B2))
  2754  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2755  	{BCTR, 0xff00000000000000, 0x600000000000000, 0x0, // BRANCH ON COUNT (32) (BCTR R1,R2)
  2756  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  2757  	{BCTG, 0xff00000000ff0000, 0xe300000000460000, 0x0, // BRANCH ON COUNT (64) (BCTG R1,D2(X2,B2))
  2758  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2759  	{BCTGR, 0xffff000000000000, 0xb946000000000000, 0xff0000000000, // BRANCH ON COUNT (64) (BCTGR R1,R2)
  2760  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2761  	{BXH, 0xff00000000000000, 0x8600000000000000, 0x0, // BRANCH ON INDEX HIGH (32) (BXH R1,R3,D2(B2))
  2762  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2763  	{BXHG, 0xff00000000ff0000, 0xeb00000000440000, 0x0, // BRANCH ON INDEX HIGH (64) (BXHG R1,R3,D2(B2))
  2764  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  2765  	{BXLE, 0xff00000000000000, 0x8700000000000000, 0x0, // BRANCH ON INDEX LOW OR EQUAL (32) (BXLE R1,R3,D2(B2))
  2766  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2767  	{BXLEG, 0xff00000000ff0000, 0xeb00000000450000, 0x0, // BRANCH ON INDEX LOW OR EQUAL (64) (BXLEG R1,R3,D2(B2))
  2768  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  2769  	{BPP, 0xff00000000000000, 0xc700000000000000, 0xf000000000000, // BRANCH PREDICTION PRELOAD (BPP M1,RI2,D3(B3))
  2770  		[8]*argField{ap_Mask_8_11, ap_RegImSigned16_32_47, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2771  	{BPRP, 0xff00000000000000, 0xc500000000000000, 0x0, // BRANCH PREDICTION RELATIVE PRELOAD (BPRP M1,RI2,RI3)
  2772  		[8]*argField{ap_Mask_8_11, ap_RegImSigned12_12_23, ap_RegImSigned24_24_47}},
  2773  	{BRAS, 0xff0f000000000000, 0xa705000000000000, 0x0, // BRANCH RELATIVE AND SAVE (BRAS R1,RI2)
  2774  		[8]*argField{ap_Reg_8_11, ap_RegImSigned16_16_31}},
  2775  	{BRASL, 0xff0f000000000000, 0xc005000000000000, 0x0, // BRANCH RELATIVE AND SAVE LONG (BRASL R1,RI2)
  2776  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  2777  	{BRC, 0xff0f000000000000, 0xa704000000000000, 0x0, // BRANCH RELATIVE ON CONDITION (BRC M1,RI2)
  2778  		[8]*argField{ap_Mask_8_11, ap_RegImSigned16_16_31}},
  2779  	{BRCL, 0xff0f000000000000, 0xc004000000000000, 0x0, // BRANCH RELATIVE ON CONDITION LONG (BRCL M1,RI2)
  2780  		[8]*argField{ap_Mask_8_11, ap_RegImSigned32_16_47}},
  2781  	{BRCT, 0xff0f000000000000, 0xa706000000000000, 0x0, // BRANCH RELATIVE ON COUNT (32) (BRCT R1,RI2)
  2782  		[8]*argField{ap_Reg_8_11, ap_RegImSigned16_16_31}},
  2783  	{BRCTG, 0xff0f000000000000, 0xa707000000000000, 0x0, // BRANCH RELATIVE ON COUNT (64) (BRCTG R1,RI2)
  2784  		[8]*argField{ap_Reg_8_11, ap_RegImSigned16_16_31}},
  2785  	{BRCTH, 0xff0f000000000000, 0xcc06000000000000, 0x0, // BRANCH RELATIVE ON COUNT HIGH (32) (BRCTH R1,RI2)
  2786  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  2787  	{BRXH, 0xff00000000000000, 0x8400000000000000, 0x0, // BRANCH RELATIVE ON INDEX HIGH (32) (BRXH R1,R3,RI2)
  2788  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_RegImSigned16_16_31}},
  2789  	{BRXHG, 0xff00000000ff0000, 0xec00000000440000, 0xff000000, // BRANCH RELATIVE ON INDEX HIGH (64) (BRXHG R1,R3,RI2)
  2790  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_RegImSigned16_16_31}},
  2791  	{BRXLE, 0xff00000000000000, 0x8500000000000000, 0x0, // BRANCH RELATIVE ON INDEX LOW OR EQ. (32) (BRXLE R1,R3,RI2)
  2792  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_RegImSigned16_16_31}},
  2793  	{BRXLG, 0xff00000000ff0000, 0xec00000000450000, 0xff000000, // BRANCH RELATIVE ON INDEX LOW OR EQ. (64) (BRXLG R1,R3,RI2)
  2794  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_RegImSigned16_16_31}},
  2795  	{XSCH, 0xffff000000000000, 0xb276000000000000, 0xffff00000000, // CANCEL SUBCHANNEL (XSCH)
  2796  		[8]*argField{}},
  2797  	{CKSM, 0xffff000000000000, 0xb241000000000000, 0xff0000000000, // CHECKSUM (CKSM R1,R2)
  2798  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2799  	{KM, 0xffff000000000000, 0xb92e000000000000, 0xff0000000000, // CIPHER MESSAGE (KM R1,R2)
  2800  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2801  	{KMA, 0xffff000000000000, 0xb929000000000000, 0xf0000000000, // CIPHER MESSAGE WITH AUTHENTICATION (KMA R1,R3,R2)
  2802  		[8]*argField{ap_Reg_24_27, ap_Reg_16_19, ap_Reg_28_31}},
  2803  	{KMC, 0xffff000000000000, 0xb92f000000000000, 0xff0000000000, // CIPHER MESSAGE WITH CHAINING (KMC R1,R2)
  2804  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2805  	{KMF, 0xffff000000000000, 0xb92a000000000000, 0xff0000000000, // CIPHER MESSAGE WITH CIPHER FEEDBACK (KMF R1,R2)
  2806  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2807  	{KMCTR, 0xffff000000000000, 0xb92d000000000000, 0xf0000000000, // CIPHER MESSAGE WITH COUNTER (KMCTR R1,R3,R2)
  2808  		[8]*argField{ap_Reg_24_27, ap_Reg_16_19, ap_Reg_28_31}},
  2809  	{KMO, 0xffff000000000000, 0xb92b000000000000, 0xff0000000000, // CIPHER MESSAGE WITH OUTPUT FEEDBACK (KMO R1,R2)
  2810  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2811  	{CSCH, 0xffff000000000000, 0xb230000000000000, 0xffff00000000, // CLEAR SUBCHANNEL (CSCH)
  2812  		[8]*argField{}},
  2813  	{C, 0xff00000000000000, 0x5900000000000000, 0x0, // COMPARE (32) (C R1,D2(X2,B2))
  2814  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2815  	{CR, 0xff00000000000000, 0x1900000000000000, 0x0, // COMPARE (32) (CR R1,R2)
  2816  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  2817  	{CY, 0xff00000000ff0000, 0xe300000000590000, 0x0, // COMPARE (32) (CY R1,D2(X2,B2))
  2818  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2819  	{CG, 0xff00000000ff0000, 0xe300000000200000, 0x0, // COMPARE (64) (CG R1,D2(X2,B2))
  2820  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2821  	{CGR, 0xffff000000000000, 0xb920000000000000, 0xff0000000000, // COMPARE (64) (CGR R1,R2)
  2822  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2823  	{CGF, 0xff00000000ff0000, 0xe300000000300000, 0x0, // COMPARE (64←32) (CGF R1,D2(X2,B2))
  2824  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2825  	{CGFR, 0xffff000000000000, 0xb930000000000000, 0xff0000000000, // COMPARE (64←32) (CGFR R1,R2)
  2826  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2827  	{CXBR, 0xffff000000000000, 0xb349000000000000, 0xff0000000000, // COMPARE (extended BFP) (CXBR R1,R2)
  2828  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2829  	{CXTR, 0xffff000000000000, 0xb3ec000000000000, 0xff0000000000, // COMPARE (extended DFP) (CXTR R1,R2)
  2830  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2831  	{CXR, 0xffff000000000000, 0xb369000000000000, 0xff0000000000, // COMPARE (extended HFP) (CXR R1,R2)
  2832  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2833  	{CDB, 0xff00000000ff0000, 0xed00000000190000, 0xff000000, // COMPARE (long BFP) (CDB R1,D2(X2,B2))
  2834  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2835  	{CDBR, 0xffff000000000000, 0xb319000000000000, 0xff0000000000, // COMPARE (long BFP) (CDBR R1,R2)
  2836  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2837  	{CDTR, 0xffff000000000000, 0xb3e4000000000000, 0xff0000000000, // COMPARE (long DFP) (CDTR R1,R2)
  2838  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2839  	{CD, 0xff00000000000000, 0x6900000000000000, 0x0, // COMPARE (long HFP) (CD R1,D2(X2,B2))
  2840  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2841  	{CDR, 0xff00000000000000, 0x2900000000000000, 0x0, // COMPARE (long HFP) (CDR R1,R2)
  2842  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  2843  	{CEB, 0xff00000000ff0000, 0xed00000000090000, 0xff000000, // COMPARE (short BFP) (CEB R1,D2(X2,B2))
  2844  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2845  	{CEBR, 0xffff000000000000, 0xb309000000000000, 0xff0000000000, // COMPARE (short BFP) (CEBR R1,R2)
  2846  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2847  	{CE, 0xff00000000000000, 0x7900000000000000, 0x0, // COMPARE (short HFP) (CE R1,D2(X2,B2))
  2848  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2849  	{CER, 0xff00000000000000, 0x3900000000000000, 0x0, // COMPARE (short HFP) (CER R1,R2)
  2850  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  2851  	{CRB, 0xff00000000ff0000, 0xec00000000f60000, 0xf000000, // COMPARE AND BRANCH (32) (CRB R1,R2,M3,D4(B4))
  2852  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_Mask_32_35, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2853  	{CGRB, 0xff00000000ff0000, 0xec00000000e40000, 0xf000000, // COMPARE AND BRANCH (64) (CGRB R1,R2,M3,D4(B4))
  2854  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_Mask_32_35, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2855  	{CRJ, 0xff00000000ff0000, 0xec00000000760000, 0xf000000, // COMPARE AND BRANCH RELATIVE (32) (CRJ R1,R2,M3,RI4)
  2856  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_Mask_32_35, ap_RegImSigned16_16_31}},
  2857  	{CGRJ, 0xff00000000ff0000, 0xec00000000640000, 0xf000000, // COMPARE AND BRANCH RELATIVE (64) (CGRJ R1,R2,M3,RI4)
  2858  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_Mask_32_35, ap_RegImSigned16_16_31}},
  2859  	{CFC, 0xffff000000000000, 0xb21a000000000000, 0x0, // COMPARE AND FORM CODEWORD (CFC D2(B2))
  2860  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2861  	{CRDTE, 0xffff000000000000, 0xb98f000000000000, 0x0, // COMPARE AND REPLACE DAT TABLE ENTRY (CRDTE R1,R3,R2,M4)
  2862  		[8]*argField{ap_Reg_24_27, ap_Reg_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  2863  	{KXBR, 0xffff000000000000, 0xb348000000000000, 0xff0000000000, // COMPARE AND SIGNAL (extended BFP) (KXBR R1,R2)
  2864  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2865  	{KXTR, 0xffff000000000000, 0xb3e8000000000000, 0xff0000000000, // COMPARE AND SIGNAL (extended DFP) (KXTR R1,R2)
  2866  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2867  	{KDB, 0xff00000000ff0000, 0xed00000000180000, 0xff000000, // COMPARE AND SIGNAL (long BFP) (KDB R1,D2(X2,B2))
  2868  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2869  	{KDBR, 0xffff000000000000, 0xb318000000000000, 0xff0000000000, // COMPARE AND SIGNAL (long BFP) (KDBR R1,R2)
  2870  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2871  	{KDTR, 0xffff000000000000, 0xb3e0000000000000, 0xff0000000000, // COMPARE AND SIGNAL (long DFP) (KDTR R1,R2)
  2872  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2873  	{KEB, 0xff00000000ff0000, 0xed00000000080000, 0xff000000, // COMPARE AND SIGNAL (short BFP) (KEB R1,D2(X2,B2))
  2874  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2875  	{KEBR, 0xffff000000000000, 0xb308000000000000, 0xff0000000000, // COMPARE AND SIGNAL (short BFP) (KEBR R1,R2)
  2876  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2877  	{CS, 0xff00000000000000, 0xba00000000000000, 0x0, // COMPARE AND SWAP (32) (CS R1,R3,D2(B2))
  2878  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2879  	{CSY, 0xff00000000ff0000, 0xeb00000000140000, 0x0, // COMPARE AND SWAP (32) (CSY R1,R3,D2(B2))
  2880  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  2881  	{CSG, 0xff00000000ff0000, 0xeb00000000300000, 0x0, // COMPARE AND SWAP (64) (CSG R1,R3,D2(B2))
  2882  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  2883  	{CSP, 0xffff000000000000, 0xb250000000000000, 0xff0000000000, // COMPARE AND SWAP AND PURGE (32) (CSP R1,R2)
  2884  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2885  	{CSPG, 0xffff000000000000, 0xb98a000000000000, 0xff0000000000, // COMPARE AND SWAP AND PURGE (64) (CSPG R1,R2)
  2886  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2887  	{CSST, 0xff0f000000000000, 0xc802000000000000, 0x0, // COMPARE AND SWAP AND STORE (CSST D1(B1),D2(B2),R3)
  2888  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35, ap_Reg_8_11}},
  2889  	{CRT, 0xffff000000000000, 0xb972000000000000, 0xf0000000000, // COMPARE AND TRAP (32) (CRT R1,R2,M3)
  2890  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  2891  	{CGRT, 0xffff000000000000, 0xb960000000000000, 0xf0000000000, // COMPARE AND TRAP (64) (CGRT R1,R2,M3)
  2892  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  2893  	{CEXTR, 0xffff000000000000, 0xb3fc000000000000, 0xff0000000000, // COMPARE BIASED EXPONENT (extended DFP) (CEXTR R1,R2)
  2894  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2895  	{CEDTR, 0xffff000000000000, 0xb3f4000000000000, 0xff0000000000, // COMPARE BIASED EXPONENT (long DFP) (CEDTR R1,R2)
  2896  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  2897  	{CP, 0xff00000000000000, 0xf900000000000000, 0x0, // COMPARE DECIMAL (CP D1(L1,B1),D2(L2,B2))
  2898  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_12_15, ap_BaseReg_32_35}},
  2899  	{CDS, 0xff00000000000000, 0xbb00000000000000, 0x0, // COMPARE DOUBLE AND SWAP (32) (CDS R1,R3,D2(B2))
  2900  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2901  	{CDSY, 0xff00000000ff0000, 0xeb00000000310000, 0x0, // COMPARE DOUBLE AND SWAP (32) (CDSY R1,R3,D2(B2))
  2902  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  2903  	{CDSG, 0xff00000000ff0000, 0xeb000000003e0000, 0x0, // COMPARE DOUBLE AND SWAP (64) (CDSG R1,R3,D2(B2))
  2904  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  2905  	{CH, 0xff00000000000000, 0x4900000000000000, 0x0, // COMPARE HALFWORD (32→16) (CH R1,D2(X2,B2))
  2906  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2907  	{CHY, 0xff00000000ff0000, 0xe300000000790000, 0x0, // COMPARE HALFWORD (32→16) (CHY R1,D2(X2,B2))
  2908  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2909  	{CGH, 0xff00000000ff0000, 0xe300000000340000, 0x0, // COMPARE HALFWORD (64←16) (CGH R1,D2(X2,B2))
  2910  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2911  	{CHHSI, 0xffff000000000000, 0xe554000000000000, 0x0, // COMPARE HALFWORD IMMEDIATE (16→16) (CHHSI D1(B1),I2)
  2912  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmSigned16_32_47}},
  2913  	{CHI, 0xff0f000000000000, 0xa70e000000000000, 0x0, // COMPARE HALFWORD IMMEDIATE (32←16) (CHI R1,I2)
  2914  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  2915  	{CHSI, 0xffff000000000000, 0xe55c000000000000, 0x0, // COMPARE HALFWORD IMMEDIATE (32←16) (CHSI D1(B1),I2)
  2916  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmSigned16_32_47}},
  2917  	{CGHI, 0xff0f000000000000, 0xa70f000000000000, 0x0, // COMPARE HALFWORD IMMEDIATE (64←16) (CGHI R1,I2)
  2918  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  2919  	{CGHSI, 0xffff000000000000, 0xe558000000000000, 0x0, // COMPARE HALFWORD IMMEDIATE (64←16) (CGHSI D1(B1),I2)
  2920  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmSigned16_32_47}},
  2921  	{CHRL, 0xff0f000000000000, 0xc605000000000000, 0x0, // COMPAREHALFWORDRELATIVE LONG (32→16) (CHRL R1,RI2)
  2922  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  2923  	{CGHRL, 0xff0f000000000000, 0xc604000000000000, 0x0, // COMPAREHALFWORDRELATIVE LONG (64←16) (CGHRL R1,RI2)
  2924  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  2925  	{CHF, 0xff00000000ff0000, 0xe300000000cd0000, 0x0, // COMPARE HIGH (32) (CHF R1,D2(X2,B2))
  2926  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2927  	{CHHR, 0xffff000000000000, 0xb9cd000000000000, 0xff0000000000, // COMPARE HIGH (32) (CHHR R1,R2)
  2928  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2929  	{CHLR, 0xffff000000000000, 0xb9dd000000000000, 0xff0000000000, // COMPARE HIGH (32) (CHLR R1,R2)
  2930  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2931  	{CFI, 0xff0f000000000000, 0xc20d000000000000, 0x0, // COMPARE IMMEDIATE (32) (CFI R1,I2)
  2932  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  2933  	{CGFI, 0xff0f000000000000, 0xc20c000000000000, 0x0, // COMPARE IMMEDIATE (64←32) (CGFI R1,I2)
  2934  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  2935  	{CIB, 0xff00000000ff0000, 0xec00000000fe0000, 0x0, // COMPARE IMMEDIATE AND BRANCH (32←8) (CIB R1,I2,M3,D4(B4))
  2936  		[8]*argField{ap_Reg_8_11, ap_ImmSigned8_32_39, ap_Mask_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2937  	{CGIB, 0xff00000000ff0000, 0xec00000000fc0000, 0x0, // COMPARE IMMEDIATE AND BRANCH (64←8) (CGIB R1,I2,M3,D4(B4))
  2938  		[8]*argField{ap_Reg_8_11, ap_ImmSigned8_32_39, ap_Mask_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2939  	{CIJ, 0xff00000000ff0000, 0xec000000007e0000, 0x0, // COMPARE IMMEDIATE AND BRANCH RELATIVE(32→8) (CIJ R1,I2,M3,RI4)
  2940  		[8]*argField{ap_Reg_8_11, ap_ImmSigned8_32_39, ap_Mask_12_15, ap_RegImSigned16_16_31}},
  2941  	{CGIJ, 0xff00000000ff0000, 0xec000000007c0000, 0x0, // COMPARE IMMEDIATE AND BRANCH RELATIVE(64→8) (CGIJ R1,I2,M3,RI4)
  2942  		[8]*argField{ap_Reg_8_11, ap_ImmSigned8_32_39, ap_Mask_12_15, ap_RegImSigned16_16_31}},
  2943  	{CIT, 0xff00000000ff0000, 0xec00000000720000, 0xf00000f000000, // COMPARE IMMEDIATE AND TRAP (32→16) (CIT R1,I2,M3)
  2944  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31, ap_Mask_32_35}},
  2945  	{CGIT, 0xff00000000ff0000, 0xec00000000700000, 0xf00000f000000, // COMPARE IMMEDIATE AND TRAP (64←16) (CGIT R1,I2,M3)
  2946  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31, ap_Mask_32_35}},
  2947  	{CIH, 0xff0f000000000000, 0xcc0d000000000000, 0x0, // COMPARE IMMEDIATE HIGH (32) (CIH R1,I2)
  2948  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  2949  	{CL, 0xff00000000000000, 0x5500000000000000, 0x0, // COMPARE LOGICAL (32) (CL R1,D2(X2,B2))
  2950  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2951  	{CLR, 0xff00000000000000, 0x1500000000000000, 0x0, // COMPARE LOGICAL (32) (CLR R1,R2)
  2952  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  2953  	{CLY, 0xff00000000ff0000, 0xe300000000550000, 0x0, // COMPARE LOGICAL (32) (CLY R1,D2(X2,B2))
  2954  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2955  	{CLG, 0xff00000000ff0000, 0xe300000000210000, 0x0, // COMPARE LOGICAL (64) (CLG R1,D2(X2,B2))
  2956  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2957  	{CLGR, 0xffff000000000000, 0xb921000000000000, 0xff0000000000, // COMPARE LOGICAL (64) (CLGR R1,R2)
  2958  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2959  	{CLGF, 0xff00000000ff0000, 0xe300000000310000, 0x0, // COMPARE LOGICAL (64→32) (CLGF R1,D2(X2,B2))
  2960  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2961  	{CLGFR, 0xffff000000000000, 0xb931000000000000, 0xff0000000000, // COMPARE LOGICAL (64→32) (CLGFR R1,R2)
  2962  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2963  	{CLC, 0xff00000000000000, 0xd500000000000000, 0x0, // COMPARE LOGICAL (character) (CLC D1(L1,B1),D2(B2))
  2964  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  2965  	{CLI, 0xff00000000000000, 0x9500000000000000, 0x0, // COMPARE LOGICAL (immediate) (CLI D1(B1),I2)
  2966  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_8_15}},
  2967  	{CLIY, 0xff00000000ff0000, 0xeb00000000550000, 0x0, // COMPARE LOGICAL (immediate) (CLIY D1(B1),I2)
  2968  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_ImmUnsigned_8_15}},
  2969  	{CLRB, 0xff00000000ff0000, 0xec00000000f70000, 0xf000000, // COMPARE LOGICAL AND BRANCH (32) (CLRB R1,R2,M3,D4(B4))
  2970  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_Mask_32_35, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2971  	{CLGRB, 0xff00000000ff0000, 0xec00000000e50000, 0xf000000, // COMPARE LOGICAL AND BRANCH (64) (CLGRB R1,R2,M3,D4(B4))
  2972  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_Mask_32_35, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2973  	{CLRJ, 0xff00000000ff0000, 0xec00000000770000, 0xf000000, // COMPARE LOGICAL AND BRANCH RELATIVE(32) (CLRJ R1,R2,M3,RI4)
  2974  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_Mask_32_35, ap_RegImSigned16_16_31}},
  2975  	{CLGRJ, 0xff00000000ff0000, 0xec00000000650000, 0xf000000, // COMPARE LOGICAL AND BRANCH RELATIVE(64) (CLGRJ R1,R2,M3,RI4)
  2976  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_Mask_32_35, ap_RegImSigned16_16_31}},
  2977  	{CLRT, 0xffff000000000000, 0xb973000000000000, 0xf0000000000, // COMPARE LOGICAL AND TRAP (32) (CLRT R1,R2,M3)
  2978  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  2979  	{CLT, 0xff00000000ff0000, 0xeb00000000230000, 0x0, // COMPARE LOGICAL AND TRAP (32) (CLT R1,M3,D2(B2))
  2980  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  2981  	{CLGRT, 0xffff000000000000, 0xb961000000000000, 0xf0000000000, // COMPARE LOGICAL AND TRAP (64) (CLGRT R1,R2,M3)
  2982  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  2983  	{CLGT, 0xff00000000ff0000, 0xeb000000002b0000, 0x0, // COMPARE LOGICAL AND TRAP (64) (CLGT R1,M3,D2(B2))
  2984  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  2985  	{CLMH, 0xff00000000ff0000, 0xeb00000000200000, 0x0, // COMPARE LOGICAL CHAR. UNDER MASK (high) (CLMH R1,M3,D2(B2))
  2986  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  2987  	{CLM, 0xff00000000000000, 0xbd00000000000000, 0x0, // COMPARE LOGICAL CHAR. UNDER MASK (low) (CLM R1,M3,D2(B2))
  2988  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  2989  	{CLMY, 0xff00000000ff0000, 0xeb00000000210000, 0x0, // COMPARE LOGICAL CHAR. UNDER MASK (low) (CLMY R1,M3,D2(B2))
  2990  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  2991  	{CLHF, 0xff00000000ff0000, 0xe300000000cf0000, 0x0, // COMPARE LOGICAL HIGH (32) (CLHF R1,D2(X2,B2))
  2992  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  2993  	{CLHHR, 0xffff000000000000, 0xb9cf000000000000, 0xff0000000000, // COMPARE LOGICAL HIGH (32) (CLHHR R1,R2)
  2994  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2995  	{CLHLR, 0xffff000000000000, 0xb9df000000000000, 0xff0000000000, // COMPARE LOGICAL HIGH (32) (CLHLR R1,R2)
  2996  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  2997  	{CLHHSI, 0xffff000000000000, 0xe555000000000000, 0x0, // COMPARE LOGICAL IMMEDIATE (16←16) (CLHHSI D1(B1),I2)
  2998  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_32_47}},
  2999  	{CLFI, 0xff0f000000000000, 0xc20f000000000000, 0x0, // COMPARE LOGICAL IMMEDIATE (32) (CLFI R1,I2)
  3000  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  3001  	{CLFHSI, 0xffff000000000000, 0xe55d000000000000, 0x0, // COMPARE LOGICAL IMMEDIATE (32←16) (CLFHSI D1(B1),I2)
  3002  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_32_47}},
  3003  	{CLGHSI, 0xffff000000000000, 0xe559000000000000, 0x0, // COMPARE LOGICAL IMMEDIATE (64←16) (CLGHSI D1(B1),I2)
  3004  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_32_47}},
  3005  	{CLGFI, 0xff0f000000000000, 0xc20e000000000000, 0x0, // COMPARE LOGICAL IMMEDIATE (64←32) (CLGFI R1,I2)
  3006  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  3007  	{CLIB, 0xff00000000ff0000, 0xec00000000ff0000, 0x0, // COMPARE LOGICAL IMMEDIATE AND BRANCH(32←8) (CLIB R1,I2,M3,D4(B4))
  3008  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_32_39, ap_Mask_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3009  	{CLGIB, 0xff00000000ff0000, 0xec00000000fd0000, 0x0, // COMPARE LOGICAL IMMEDIATE AND BRANCH(64→8) (CLGIB R1,I2,M3,D4(B4))
  3010  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_32_39, ap_Mask_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3011  	{CLIJ, 0xff00000000ff0000, 0xec000000007f0000, 0x0, // COMPARE LOGICAL IMMEDIATE AND BRANCH (CLIJ R1,I2,M3,RI4)
  3012  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_32_39, ap_Mask_12_15, ap_RegImSigned16_16_31}},
  3013  	{CLGIJ, 0xff00000000ff0000, 0xec000000007d0000, 0x0, // RELATIVE (32→8)10COMPARE LOGICAL IMMEDIATE AND BRANCH (CLGIJ R1,I2,M3,RI4)
  3014  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_32_39, ap_Mask_12_15, ap_RegImSigned16_16_31}},
  3015  	{CLFIT, 0xff00000000ff0000, 0xec00000000730000, 0xf00000f000000, // RELATIVE (64→8)COMPARE LOGICAL IMMEDIATE AND TRAP(32→16) (CLFIT R1,I2,M3)
  3016  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31, ap_Mask_32_35}},
  3017  	{CLGIT, 0xff00000000ff0000, 0xec00000000710000, 0xf00000f000000, // COMPARE LOGICAL IMMEDIATE AND TRAP(64←16) (CLGIT R1,I2,M3)
  3018  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31, ap_Mask_32_35}},
  3019  	{CLIH, 0xff0f000000000000, 0xcc0f000000000000, 0x0, // COMPARE LOGICAL IMMEDIATE HIGH (32) (CLIH R1,I2)
  3020  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  3021  	{CLCL, 0xff00000000000000, 0xf00000000000000, 0x0, // COMPARE LOGICAL LONG (CLCL R1,R2)
  3022  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  3023  	{CLCLE, 0xff00000000000000, 0xa900000000000000, 0x0, // COMPARE LOGICAL LONG EXTENDED (CLCLE R1,R3,D2(B2))
  3024  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3025  	{CLCLU, 0xff00000000ff0000, 0xeb000000008f0000, 0x0, // COMPARE LOGICAL LONG UNICODE (CLCLU R1,R3,D2(B2))
  3026  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3027  	{CLRL, 0xff0f000000000000, 0xc60f000000000000, 0x0, // COMPARE LOGICAL RELATIVE LONG (32) (CLRL R1,RI2)
  3028  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3029  	{CLHRL, 0xff0f000000000000, 0xc607000000000000, 0x0, // COMPARE LOGICAL RELATIVE LONG (32→16) (CLHRL R1,RI2)
  3030  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3031  	{CLGRL, 0xff0f000000000000, 0xc60a000000000000, 0x0, // COMPARE LOGICAL RELATIVE LONG (64) (CLGRL R1,RI2)
  3032  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3033  	{CLGHRL, 0xff0f000000000000, 0xc606000000000000, 0x0, // COMPARE LOGICAL RELATIVE LONG (64→16) (CLGHRL R1,RI2)
  3034  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3035  	{CLGFRL, 0xff0f000000000000, 0xc60e000000000000, 0x0, // COMPARE LOGICAL RELATIVE LONG (64→32) (CLGFRL R1,RI2)
  3036  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3037  	{CLST, 0xffff000000000000, 0xb25d000000000000, 0xff0000000000, // COMPARE LOGICAL STRING (CLST R1,R2)
  3038  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3039  	{CRL, 0xff0f000000000000, 0xc60d000000000000, 0x0, // COMPARE RELATIVE LONG (32) (CRL R1,RI2)
  3040  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3041  	{CGRL, 0xff0f000000000000, 0xc608000000000000, 0x0, // COMPARE RELATIVE LONG (64) (CGRL R1,RI2)
  3042  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3043  	{CGFRL, 0xff0f000000000000, 0xc60c000000000000, 0x0, // COMPARE RELATIVE LONG (64←32) (CGFRL R1,RI2)
  3044  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3045  	{CUSE, 0xffff000000000000, 0xb257000000000000, 0xff0000000000, // COMPARE UNTIL SUBSTRING EQUAL (CUSE R1,R2)
  3046  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3047  	{CMPSC, 0xffff000000000000, 0xb263000000000000, 0xff0000000000, // COMPRESSION CALL (CMPSC R1,R2)
  3048  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3049  	{KDSA, 0xffff000000000000, 0xb93a000000000000, 0xff0000000000, // COMPUTE DIGITAL SIGNATURE AUTHENTICATION (KDSA R1,R2)
  3050  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3051  	{KIMD, 0xffff000000000000, 0xb93e000000000000, 0xff0000000000, // COMPUTE INTERMEDIATE MESSAGE DIGEST (KIMD R1,R2)
  3052  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3053  	{KLMD, 0xffff000000000000, 0xb93f000000000000, 0xff0000000000, // COMPUTE LAST MESSAGE DIGEST (KLMD R1,R2)
  3054  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3055  	{KMAC, 0xffff000000000000, 0xb91e000000000000, 0xff0000000000, // COMPUTE MESSAGE AUTHENTICATION CODE (KMAC R1,R2)
  3056  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3057  	{THDR, 0xffff000000000000, 0xb359000000000000, 0xff0000000000, // CONVERT BFP TO HFP (long) (THDR R1,R2)
  3058  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3059  	{THDER, 0xffff000000000000, 0xb358000000000000, 0xff0000000000, // CONVERT BFP TO HFP (short to long) (THDER R1,R2)
  3060  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3061  	{CXFBR, 0xffff000000000000, 0xb396000000000000, 0xff0000000000, // CONVERT FROM FIXED (32 to extended BFP) (CXFBR R1,R2)
  3062  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3063  	{CXFBRA, 0xffff000000000000, 0xb396000000000000, 0x0, // CONVERT FROM FIXED (32 to extended BFP) (CXFBRA R1,M3,R2,M4)
  3064  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3065  	{CXFTR, 0xffff000000000000, 0xb959000000000000, 0x0, // CONVERT FROM FIXED (32 to extended DFP) (CXFTR R1,M3,R2,M4)
  3066  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3067  	{CXFR, 0xffff000000000000, 0xb3b6000000000000, 0xff0000000000, // CONVERT FROM FIXED (32 to extended HFP) (CXFR R1,R2)
  3068  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3069  	{CDFBR, 0xffff000000000000, 0xb395000000000000, 0xff0000000000, // CONVERT FROM FIXED (32 to long BFP) (CDFBR R1,R2)
  3070  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3071  	{CDFBRA, 0xffff000000000000, 0xb395000000000000, 0x0, // CONVERT FROM FIXED (32 to long BFP) (CDFBRA R1,M3,R2,M4)
  3072  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3073  	{CDFTR, 0xffff000000000000, 0xb951000000000000, 0x0, // CONVERT FROM FIXED (32 to long DFP) (CDFTR R1,M3,R2,M4)
  3074  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3075  	{CDFR, 0xffff000000000000, 0xb3b5000000000000, 0xff0000000000, // CONVERT FROM FIXED (32 to long HFP) (CDFR R1,R2)
  3076  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3077  	{CEFBR, 0xffff000000000000, 0xb394000000000000, 0xff0000000000, // CONVERT FROM FIXED (32 to short BFP) (CEFBR R1,R2)
  3078  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3079  	{CEFBRA, 0xffff000000000000, 0xb394000000000000, 0x0, // CONVERT FROM FIXED (32 to short BFP) (CEFBRA R1,M3,R2,M4)
  3080  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3081  	{CEFR, 0xffff000000000000, 0xb3b4000000000000, 0xff0000000000, // CONVERT FROM FIXED (32 to short HFP) (CEFR R1,R2)
  3082  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3083  	{CXGBR, 0xffff000000000000, 0xb3a6000000000000, 0xff0000000000, // CONVERT FROM FIXED (64 to extended BFP) (CXGBR R1,R2)
  3084  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3085  	{CXGBRA, 0xffff000000000000, 0xb3a6000000000000, 0x0, // CONVERT FROM FIXED (64 to extended BFP) (CXGBRA R1,M3,R2,M4)
  3086  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3087  	{CXGTR, 0xffff000000000000, 0xb3f9000000000000, 0xff0000000000, // CONVERT FROM FIXED (64 to extended DFP) (CXGTR R1,R2)
  3088  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3089  	{CXGTRA, 0xffff000000000000, 0xb3f9000000000000, 0x0, // CONVERT FROM FIXED (64 to extended DFP) (CXGTRA R1,M3,R2,M4)
  3090  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3091  	{CXGR, 0xffff000000000000, 0xb3c6000000000000, 0xff0000000000, // CONVERT FROM FIXED (64 to extended HFP) (CXGR R1,R2)
  3092  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3093  	{CDGBR, 0xffff000000000000, 0xb3a5000000000000, 0xff0000000000, // CONVERT FROM FIXED (64 to long BFP) (CDGBR R1,R2)
  3094  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3095  	{CDGBRA, 0xffff000000000000, 0xb3a5000000000000, 0x0, // CONVERT FROM FIXED (64 to long BFP) (CDGBRA R1,M3,R2,M4)
  3096  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3097  	{CDGTR, 0xffff000000000000, 0xb3f1000000000000, 0xff0000000000, // CONVERT FROM FIXED (64 to long DFP) (CDGTR R1,R2)
  3098  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3099  	{CDGTRA, 0xffff000000000000, 0xb3f1000000000000, 0x0, // CONVERT FROM FIXED (64 to long DFP) (CDGTRA R1,M3,R2,M4)
  3100  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3101  	{CDGR, 0xffff000000000000, 0xb3c5000000000000, 0xff0000000000, // CONVERT FROM FIXED (64 to long HFP) (CDGR R1,R2)
  3102  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3103  	{CEGBR, 0xffff000000000000, 0xb3a4000000000000, 0xff0000000000, // CONVERT FROM FIXED (64 to short BFP) (CEGBR R1,R2)
  3104  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3105  	{CEGBRA, 0xffff000000000000, 0xb3a4000000000000, 0x0, // CONVERT FROM FIXED (64 to short BFP) (CEGBRA R1,M3,R2,M4)
  3106  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3107  	{CEGR, 0xffff000000000000, 0xb3c4000000000000, 0xff0000000000, // CONVERT FROM FIXED (64 to short HFP) (CEGR R1,R2)
  3108  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3109  	{CXLFBR, 0xffff000000000000, 0xb392000000000000, 0x0, // CONVERT FROM LOGICAL (32 to extended BFP) (CXLFBR R1,M3,R2,M4)
  3110  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3111  	{CXLFTR, 0xffff000000000000, 0xb95b000000000000, 0x0, // CONVERT FROM LOGICAL (32 to extended DFP) (CXLFTR R1,M3,R2,M4)
  3112  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3113  	{CDLFBR, 0xffff000000000000, 0xb391000000000000, 0x0, // CONVERT FROM LOGICAL (32 to long BFP) (CDLFBR R1,M3,R2,M4)
  3114  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3115  	{CDLFTR, 0xffff000000000000, 0xb953000000000000, 0x0, // CONVERT FROM LOGICAL (32 to long DFP) (CDLFTR R1,M3,R2,M4)
  3116  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3117  	{CELFBR, 0xffff000000000000, 0xb390000000000000, 0x0, // CONVERT FROM LOGICAL (32 to short BFP) (CELFBR R1,M3,R2,M4)
  3118  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3119  	{CXLGBR, 0xffff000000000000, 0xb3a2000000000000, 0x0, // CONVERT FROM LOGICAL (64 to extended BFP) (CXLGBR R1,M3,R2,M4)
  3120  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3121  	{CXLGTR, 0xffff000000000000, 0xb95a000000000000, 0x0, // CONVERT FROM LOGICAL (64 to extended DFP) (CXLGTR R1,M3,R2,M4)
  3122  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3123  	{CDLGBR, 0xffff000000000000, 0xb3a1000000000000, 0x0, // CONVERT FROM LOGICAL (64 to long BFP) (CDLGBR R1,M3,R2,M4)
  3124  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3125  	{CDLGTR, 0xffff000000000000, 0xb952000000000000, 0x0, // CONVERT FROM LOGICAL (64 to long DFP) (CDLGTR R1,M3,R2,M4)
  3126  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3127  	{CELGBR, 0xffff000000000000, 0xb3a0000000000000, 0x0, // CONVERT FROM LOGICAL (64 to short BFP) (CELGBR R1,M3,R2,M4)
  3128  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3129  	{CXPT, 0xff00000000ff0000, 0xed00000000af0000, 0x0, // CONVERT FROM PACKED (to extended DFP) (CXPT R1,D2(L2,B2),M3)
  3130  		[8]*argField{ap_FPReg_32_35, ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_Mask_36_39}},
  3131  	{CDPT, 0xff00000000ff0000, 0xed00000000ae0000, 0x0, // CONVERT FROM PACKED (to long DFP) (CDPT R1,D2(L2,B2),M3)
  3132  		[8]*argField{ap_FPReg_32_35, ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_Mask_36_39}},
  3133  	{CXSTR, 0xffff000000000000, 0xb3fb000000000000, 0xff0000000000, // CONVERT FROM SIGNED PACKED (128 to extended DFP) (CXSTR R1,R2)
  3134  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3135  	{CDSTR, 0xffff000000000000, 0xb3f3000000000000, 0xff0000000000, // CONVERT FROM SIGNED PACKED (64 to long DFP) (CDSTR R1,R2)
  3136  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3137  	{CXUTR, 0xffff000000000000, 0xb3fa000000000000, 0xff0000000000, // CONVERT FROM UNSIGNED PACKED (128 to ext. DFP) (CXUTR R1,R2)
  3138  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3139  	{CDUTR, 0xffff000000000000, 0xb3f2000000000000, 0xff0000000000, // CONVERT FROM UNSIGNED PACKED (64 to long DFP) (CDUTR R1,R2)
  3140  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3141  	{CXZT, 0xff00000000ff0000, 0xed00000000ab0000, 0x0, // CONVERT FROM ZONED (to extended DFP) (CXZT R1,D2(L2,B2),M3)
  3142  		[8]*argField{ap_FPReg_32_35, ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_Mask_36_39}},
  3143  	{CDZT, 0xff00000000ff0000, 0xed00000000aa0000, 0x0, // CONVERT FROM ZONED (to long DFP) (CDZT R1,D2(L2,B2),M3)
  3144  		[8]*argField{ap_FPReg_32_35, ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_Mask_36_39}},
  3145  	{TBEDR, 0xffff000000000000, 0xb350000000000000, 0xf0000000000, // CONVERT HFP TO BFP (long to short) (TBEDR R1,M3,R2)
  3146  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3147  	{TBDR, 0xffff000000000000, 0xb351000000000000, 0xf0000000000, // CONVERT HFP TO BFP (long) (TBDR R1,M3,R2)
  3148  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3149  	{CVB, 0xff00000000000000, 0x4f00000000000000, 0x0, // CONVERT TO BINARY (32) (CVB R1,D2(X2,B2))
  3150  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3151  	{CVBY, 0xff00000000ff0000, 0xe300000000060000, 0x0, // CONVERT TO BINARY (32) (CVBY R1,D2(X2,B2))
  3152  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3153  	{CVBG, 0xff00000000ff0000, 0xe3000000000e0000, 0x0, // CONVERT TO BINARY (64) (CVBG R1,D2(X2,B2))
  3154  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3155  	{CVD, 0xff00000000000000, 0x4e00000000000000, 0x0, // CONVERT TO DECIMAL (32) (CVD R1,D2(X2,B2))
  3156  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3157  	{CVDY, 0xff00000000ff0000, 0xe300000000260000, 0x0, // CONVERT TO DECIMAL (32) (CVDY R1,D2(X2,B2))
  3158  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3159  	{CVDG, 0xff00000000ff0000, 0xe3000000002e0000, 0x0, // CONVERT TO DECIMAL (64) (CVDG R1,D2(X2,B2))
  3160  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3161  	{CFXBR, 0xffff000000000000, 0xb39a000000000000, 0xf0000000000, // CONVERT TO FIXED (extended BFP to 32) (CFXBR R1,M3,R2)
  3162  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3163  	{CFXBRA, 0xffff000000000000, 0xb39a000000000000, 0x0, // CONVERT TO FIXED (extended BFP to 32) (CFXBRA R1,M3,R2,M4)
  3164  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3165  	{CGXBR, 0xffff000000000000, 0xb3aa000000000000, 0xf0000000000, // CONVERT TO FIXED (extended BFP to 64) (CGXBR R1,M3,R2)
  3166  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3167  	{CGXBRA, 0xffff000000000000, 0xb3aa000000000000, 0x0, // CONVERT TO FIXED (extended BFP to 64) (CGXBRA R1,M3,R2,M4)
  3168  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3169  	{CFXTR, 0xffff000000000000, 0xb949000000000000, 0x0, // CONVERT TO FIXED (extended DFP to 32) (CFXTR R1,M3,R2,M4)
  3170  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3171  	{CGXTR, 0xffff000000000000, 0xb3e9000000000000, 0xf0000000000, // CONVERT TO FIXED (extended DFP to 64) (CGXTR R1,M3,R2)
  3172  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3173  	{CGXTRA, 0xffff000000000000, 0xb3e9000000000000, 0x0, // CONVERT TO FIXED (extended DFP to 64) (CGXTRA R1,M3,R2,M4)
  3174  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3175  	{CFXR, 0xffff000000000000, 0xb3ba000000000000, 0xf0000000000, // CONVERT TO FIXED (extended HFP to 32) (CFXR R1,M3,R2)
  3176  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3177  	{CGXR, 0xffff000000000000, 0xb3ca000000000000, 0xf0000000000, // CONVERT TO FIXED (extended HFP to 64) (CGXR R1,M3,R2)
  3178  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3179  	{CFDBR, 0xffff000000000000, 0xb399000000000000, 0xf0000000000, // CONVERT TO FIXED (long BFP to 32) (CFDBR R1,M3,R2)
  3180  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3181  	{CFDBRA, 0xffff000000000000, 0xb399000000000000, 0x0, // CONVERT TO FIXED (long BFP to 32) (CFDBRA R1,M3,R2,M4)
  3182  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3183  	{CGDBR, 0xffff000000000000, 0xb3a9000000000000, 0xf0000000000, // CONVERT TO FIXED (long BFP to 64) (CGDBR R1,M3,R2)
  3184  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3185  	{CGDBRA, 0xffff000000000000, 0xb3a9000000000000, 0x0, // CONVERT TO FIXED (long BFP to 64) (CGDBRA R1,M3,R2,M4)
  3186  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3187  	{CFDTR, 0xffff000000000000, 0xb941000000000000, 0x0, // CONVERT TO FIXED (long DFP to 32) (CFDTR R1,M3,R2,M4)
  3188  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3189  	{CGDTR, 0xffff000000000000, 0xb3e1000000000000, 0xf0000000000, // CONVERT TO FIXED (long DFP to 64) (CGDTR R1,M3,R2)
  3190  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3191  	{CGDTRA, 0xffff000000000000, 0xb3e1000000000000, 0x0, // CONVERT TO FIXED (long DFP to 64) (CGDTRA R1,M3,R2,M4)
  3192  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3193  	{CFDR, 0xffff000000000000, 0xb3b9000000000000, 0xf0000000000, // CONVERT TO FIXED (long HFP to 32) (CFDR R1,M3,R2)
  3194  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3195  	{CGDR, 0xffff000000000000, 0xb3c9000000000000, 0xf0000000000, // CONVERT TO FIXED (long HFP to 64) (CGDR R1,M3,R2)
  3196  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3197  	{CFEBR, 0xffff000000000000, 0xb398000000000000, 0xf0000000000, // CONVERT TO FIXED (short BFP to 32) (CFEBR R1,M3,R2)
  3198  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3199  	{CFEBRA, 0xffff000000000000, 0xb398000000000000, 0x0, // CONVERT TO FIXED (short BFP to 32) (CFEBRA R1,M3,R2,M4)
  3200  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3201  	{CGEBR, 0xffff000000000000, 0xb3a8000000000000, 0xf0000000000, // CONVERT TO FIXED (short BFP to 64) (CGEBR R1,M3,R2)
  3202  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3203  	{CGEBRA, 0xffff000000000000, 0xb3a8000000000000, 0x0, // CONVERT TO FIXED (short BFP to 64) (CGEBRA R1,M3,R2,M4)
  3204  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3205  	{CFER, 0xffff000000000000, 0xb3b8000000000000, 0xf0000000000, // CONVERT TO FIXED (short HFP to 32) (CFER R1,M3,R2)
  3206  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3207  	{CGER, 0xffff000000000000, 0xb3c8000000000000, 0xf0000000000, // CONVERT TO FIXED (short HFP to 64) (CGER R1,M3,R2)
  3208  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3209  	{CLFXBR, 0xffff000000000000, 0xb39e000000000000, 0x0, // CONVERT TO LOGICAL (extended BFP to 32) (CLFXBR R1,M3,R2,M4)
  3210  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3211  	{CLGXBR, 0xffff000000000000, 0xb3ae000000000000, 0x0, // CONVERT TO LOGICAL (extended BFP to 64) (CLGXBR R1,M3,R2,M4)
  3212  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3213  	{CLFXTR, 0xffff000000000000, 0xb94b000000000000, 0x0, // CONVERT TO LOGICAL (extended DFP to 32) (CLFXTR R1,M3,R2,M4)
  3214  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3215  	{CLGXTR, 0xffff000000000000, 0xb94a000000000000, 0x0, // CONVERT TO LOGICAL (extended DFP to 64) (CLGXTR R1,M3,R2,M4)
  3216  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3217  	{CLFDBR, 0xffff000000000000, 0xb39d000000000000, 0x0, // CONVERT TO LOGICAL (long BFP to 32) (CLFDBR R1,M3,R2,M4)
  3218  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3219  	{CLGDBR, 0xffff000000000000, 0xb3ad000000000000, 0x0, // CONVERT TO LOGICAL (long BFP to 64) (CLGDBR R1,M3,R2,M4)
  3220  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3221  	{CLFDTR, 0xffff000000000000, 0xb943000000000000, 0x0, // CONVERT TO LOGICAL (long DFP to 32) (CLFDTR R1,M3,R2,M4)
  3222  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3223  	{CLGDTR, 0xffff000000000000, 0xb942000000000000, 0x0, // CONVERT TO LOGICAL (long DFP to 64) (CLGDTR R1,M3,R2,M4)
  3224  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3225  	{CLFEBR, 0xffff000000000000, 0xb39c000000000000, 0x0, // CONVERT TO LOGICAL (short BFP to 32) (CLFEBR R1,M3,R2,M4)
  3226  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3227  	{CLGEBR, 0xffff000000000000, 0xb3ac000000000000, 0x0, // CONVERT TO LOGICAL (short BFP to 64) (CLGEBR R1,M3,R2,M4)
  3228  		[8]*argField{ap_Reg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3229  	{CPXT, 0xff00000000ff0000, 0xed00000000ad0000, 0x0, // CONVERT TO PACKED (from extended DFP) (CPXT R1,D2(L2,B2),M3)
  3230  		[8]*argField{ap_FPReg_32_35, ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_Mask_36_39}},
  3231  	{CPDT, 0xff00000000ff0000, 0xed00000000ac0000, 0x0, // CONVERT TO PACKED (from long DFP) (CPDT R1,D2(L2,B2),M3)
  3232  		[8]*argField{ap_FPReg_32_35, ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_Mask_36_39}},
  3233  	{CSXTR, 0xffff000000000000, 0xb3eb000000000000, 0xf00000000000, // CONVERT TO SIGNED PACKED (extended DFP to 128) (CSXTR R1,R2,M4)
  3234  		[8]*argField{ap_Reg_24_27, ap_FPReg_28_31, ap_Mask_20_23}},
  3235  	{CSDTR, 0xffff000000000000, 0xb3e3000000000000, 0xf00000000000, // CONVERT TO SIGNED PACKED (long DFP to 64) (CSDTR R1,R2,M4)
  3236  		[8]*argField{ap_Reg_24_27, ap_FPReg_28_31, ap_Mask_20_23}},
  3237  	{CUXTR, 0xffff000000000000, 0xb3ea000000000000, 0xff0000000000, // CONVERTTOUNSIGNEDPACKED(extendedDFP to 128) (CUXTR R1,R2)
  3238  		[8]*argField{ap_Reg_24_27, ap_FPReg_28_31}},
  3239  	{CUDTR, 0xffff000000000000, 0xb3e2000000000000, 0xff0000000000, // CONVERT TO UNSIGNED PACKED (long DFP to 64) (CUDTR R1,R2)
  3240  		[8]*argField{ap_Reg_24_27, ap_FPReg_28_31}},
  3241  	{CZXT, 0xff00000000ff0000, 0xed00000000a90000, 0x0, // CONVERT TO ZONED (from extended DFP) (CZXT R1,D2(L2,B2),M3)
  3242  		[8]*argField{ap_FPReg_32_35, ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_Mask_36_39}},
  3243  	{CZDT, 0xff00000000ff0000, 0xed00000000a80000, 0x0, // CONVERT TO ZONED (from long DFP) (CZDT R1,D2(L2,B2),M3)
  3244  		[8]*argField{ap_FPReg_32_35, ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_Mask_36_39}},
  3245  	{CU24, 0xffff000000000000, 0xb9b1000000000000, 0xf0000000000, // CONVERT UTF-16 TO UTF-32 (CU24 R1,R2,M3)
  3246  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  3247  	{CU21, 0xffff000000000000, 0xb2a6000000000000, 0xf0000000000, // CONVERT UTF-16 TO UTF-8 (CU21 R1,R2,M3)
  3248  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  3249  	{CU12, 0xffff000000000000, 0xb2a7000000000000, 0xf0000000000, // CONVERT UTF-8 TO UTF-16 (CU12 R1,R2,M3)
  3250  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  3251  	{CU14, 0xffff000000000000, 0xb9b0000000000000, 0xf0000000000, // CONVERT UTF-8 TO UTF-32 (CU14 R1,R2,M3)
  3252  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  3253  	{CU42, 0xffff000000000000, 0xb9b3000000000000, 0xff0000000000, // CONVERT UTF-32 TO UTF-16 (CU42 R1,R2)
  3254  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3255  	{CU41, 0xffff000000000000, 0xb9b2000000000000, 0xff0000000000, // CONVERT UTF-32 TO UTF-8 (CU41 R1,R2)
  3256  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3257  	{CPYA, 0xffff000000000000, 0xb24d000000000000, 0xff0000000000, // COPY ACCESS (CPYA R1,R2)
  3258  		[8]*argField{ap_ACReg_24_27, ap_ACReg_28_31}},
  3259  	{CPSDR, 0xffff000000000000, 0xb372000000000000, 0xf0000000000, // COPY SIGN (long) (CPSDR R1,R3,R2)
  3260  		[8]*argField{ap_FPReg_24_27, ap_FPReg_16_19, ap_FPReg_28_31}},
  3261  	{VSCSHP, 0xff00000000ff0000, 0xe6000000007c0000, 0xffff0000000, // DECIMAL SCALE AND CONVERT AND SPLIT TO HFP (VSCSHP V1,V2,V3)
  3262  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  3263  	{VSCHP, 0xff00000000ff0000, 0xe600000000740000, 0xf0f00000000, // DECIMAL SCALE AND CONVERT TO HFP (VSCHP V1,V2,V3,M4,M5)
  3264  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  3265  	{DFLTCC, 0xffff000000000000, 0xb939000000000000, 0xf0000000000, // DEFLATE CONVERSION CALL (DFLTCC R1,R2,R3)
  3266  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  3267  	{D, 0xff00000000000000, 0x5d00000000000000, 0x0, // DIVIDE (32→64) (D R1,D2(X2,B2))
  3268  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3269  	{DR, 0xff00000000000000, 0x1d00000000000000, 0x0, // DIVIDE (32←64) (DR R1,R2)
  3270  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  3271  	{DXBR, 0xffff000000000000, 0xb34d000000000000, 0xff0000000000, // DIVIDE (extended BFP) (DXBR R1,R2)
  3272  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3273  	{DXTR, 0xffff000000000000, 0xb3d9000000000000, 0xf0000000000, // DIVIDE (extended DFP) (DXTR R1,R2,R3)
  3274  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19}},
  3275  	{DXTRA, 0xffff000000000000, 0xb3d9000000000000, 0x0, // DIVIDE (extended DFP) (DXTRA R1,R2,R3,M4)
  3276  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19, ap_Mask_20_23}},
  3277  	{DXR, 0xffff000000000000, 0xb22d000000000000, 0xff0000000000, // DIVIDE (extended HFP) (DXR R1,R2)
  3278  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3279  	{DDB, 0xff00000000ff0000, 0xed000000001d0000, 0xff000000, // DIVIDE (long BFP) (DDB R1,D2(X2,B2))
  3280  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3281  	{DDBR, 0xffff000000000000, 0xb31d000000000000, 0xff0000000000, // DIVIDE (long BFP) (DDBR R1,R2)
  3282  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3283  	{DDTR, 0xffff000000000000, 0xb3d1000000000000, 0xf0000000000, // DIVIDE (long DFP) (DDTR R1,R2,R3)
  3284  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19}},
  3285  	{DDTRA, 0xffff000000000000, 0xb3d1000000000000, 0x0, // DIVIDE (long DFP) (DDTRA R1,R2,R3,M4)
  3286  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19, ap_Mask_20_23}},
  3287  	{DD, 0xff00000000000000, 0x6d00000000000000, 0x0, // DIVIDE (long HFP) (DD R1,D2(X2,B2))
  3288  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3289  	{DDR, 0xff00000000000000, 0x2d00000000000000, 0x0, // DIVIDE (long HFP) (DDR R1,R2)
  3290  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3291  	{DEB, 0xff00000000ff0000, 0xed000000000d0000, 0xff000000, // DIVIDE (short BFP) (DEB R1,D2(X2,B2))
  3292  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3293  	{DEBR, 0xffff000000000000, 0xb30d000000000000, 0xff0000000000, // DIVIDE (short BFP) (DEBR R1,R2)
  3294  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3295  	{DE, 0xff00000000000000, 0x7d00000000000000, 0x0, // DIVIDE (short HFP) (DE R1,D2(X2,B2))
  3296  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3297  	{DER, 0xff00000000000000, 0x3d00000000000000, 0x0, // DIVIDE (short HFP) (DER R1,R2)
  3298  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3299  	{DP, 0xff00000000000000, 0xfd00000000000000, 0x0, // DIVIDE DECIMAL (DP D1(L1,B1),D2(L2,B2))
  3300  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_12_15, ap_BaseReg_32_35}},
  3301  	{DL, 0xff00000000ff0000, 0xe300000000970000, 0x0, // DIVIDE LOGICAL (32→64) (DL R1,D2(X2,B2))
  3302  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3303  	{DLR, 0xffff000000000000, 0xb997000000000000, 0xff0000000000, // DIVIDE LOGICAL (32←64) (DLR R1,R2)
  3304  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3305  	{DLG, 0xff00000000ff0000, 0xe300000000870000, 0x0, // DIVIDE LOGICAL (64←128) (DLG R1,D2(X2,B2))
  3306  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3307  	{DLGR, 0xffff000000000000, 0xb987000000000000, 0xff0000000000, // DIVIDE LOGICAL (64→128) (DLGR R1,R2)
  3308  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3309  	{DSG, 0xff00000000ff0000, 0xe3000000000d0000, 0x0, // DIVIDE SINGLE (64) (DSG R1,D2(X2,B2))
  3310  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3311  	{DSGR, 0xffff000000000000, 0xb90d000000000000, 0xff0000000000, // DIVIDE SINGLE (64) (DSGR R1,R2)
  3312  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3313  	{DSGF, 0xff00000000ff0000, 0xe3000000001d0000, 0x0, // DIVIDE SINGLE (64←32) (DSGF R1,D2(X2,B2))
  3314  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3315  	{DSGFR, 0xffff000000000000, 0xb91d000000000000, 0xff0000000000, // DIVIDE SINGLE (64→32) (DSGFR R1,R2)
  3316  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3317  	{DIDBR, 0xffff000000000000, 0xb35b000000000000, 0x0, // DIVIDE TO INTEGER (long BFP) (DIDBR R1,R3,R2,M4)
  3318  		[8]*argField{ap_FPReg_24_27, ap_FPReg_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3319  	{DIEBR, 0xffff000000000000, 0xb353000000000000, 0x0, // DIVIDE TO INTEGER (short BFP) (DIEBR R1,R3,R2,M4)
  3320  		[8]*argField{ap_FPReg_24_27, ap_FPReg_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3321  	{ED, 0xff00000000000000, 0xde00000000000000, 0x0, // EDIT (ED D1(L1,B1),D2(B2))
  3322  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3323  	{EDMK, 0xff00000000000000, 0xdf00000000000000, 0x0, // EDIT AND MARK (EDMK D1(L1,B1),D2(B2))
  3324  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3325  	{X, 0xff00000000000000, 0x5700000000000000, 0x0, // EXCLUSIVE OR (32) (X R1,D2(X2,B2))
  3326  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3327  	{XR, 0xff00000000000000, 0x1700000000000000, 0x0, // EXCLUSIVE OR (32) (XR R1,R2)
  3328  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  3329  	{XRK, 0xffff000000000000, 0xb9f7000000000000, 0xf0000000000, // EXCLUSIVE OR (32) (XRK R1,R2,R3)
  3330  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  3331  	{XY, 0xff00000000ff0000, 0xe300000000570000, 0x0, // EXCLUSIVE OR (32) (XY R1,D2(X2,B2))
  3332  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3333  	{XG, 0xff00000000ff0000, 0xe300000000820000, 0x0, // EXCLUSIVE OR (64) (XG R1,D2(X2,B2))
  3334  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3335  	{XGR, 0xffff000000000000, 0xb982000000000000, 0xff0000000000, // EXCLUSIVE OR (64) (XGR R1,R2)
  3336  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3337  	{XGRK, 0xffff000000000000, 0xb9e7000000000000, 0xf0000000000, // EXCLUSIVE OR (64) (XGRK R1,R2,R3)
  3338  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  3339  	{XC, 0xff00000000000000, 0xd700000000000000, 0x0, // EXCLUSIVE OR (character) (XC D1(L1,B1),D2(B2))
  3340  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3341  	{XI, 0xff00000000000000, 0x9700000000000000, 0x0, // EXCLUSIVE OR (immediate) (XI D1(B1),I2)
  3342  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmSigned8_8_15}},
  3343  	{XIY, 0xff00000000ff0000, 0xeb00000000570000, 0x0, // EXCLUSIVE OR (immediate) (XIY D1(B1),I2)
  3344  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_ImmSigned8_8_15}},
  3345  	{XIHF, 0xff0f000000000000, 0xc006000000000000, 0x0, // EXCLUSIVE OR IMMEDIATE (high) (XIHF R1,I2)
  3346  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  3347  	{XILF, 0xff0f000000000000, 0xc007000000000000, 0x0, // EXCLUSIVE OR IMMEDIATE (low) (XILF R1,I2)
  3348  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  3349  	{EX, 0xff00000000000000, 0x4400000000000000, 0x0, // EXECUTE (EX R1,D2(X2,B2))
  3350  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3351  	{EXRL, 0xff0f000000000000, 0xc600000000000000, 0x0, // EXECUTE RELATIVE LONG (EXRL R1,RI2)
  3352  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3353  	{EAR, 0xffff000000000000, 0xb24f000000000000, 0xff0000000000, // EXTRACT ACCESS (EAR R1,R2)
  3354  		[8]*argField{ap_Reg_24_27, ap_ACReg_28_31}},
  3355  	{ESEA, 0xffff000000000000, 0xb99d000000000000, 0xff0f00000000, // EXTRACT AND SET EXTENDED AUTHORITY (ESEA R1)
  3356  		[8]*argField{ap_Reg_24_27}},
  3357  	{EEXTR, 0xffff000000000000, 0xb3ed000000000000, 0xff0000000000, // EXTRACT BIASED EXPONENT (extended DFP to 64) (EEXTR R1,R2)
  3358  		[8]*argField{ap_Reg_24_27, ap_FPReg_28_31}},
  3359  	{EEDTR, 0xffff000000000000, 0xb3e5000000000000, 0xff0000000000, // EXTRACT BIASED EXPONENT (long DFP to 64) (EEDTR R1,R2)
  3360  		[8]*argField{ap_Reg_24_27, ap_FPReg_28_31}},
  3361  	{ECAG, 0xff00000000ff0000, 0xeb000000004c0000, 0x0, // EXTRACT CPU ATTRIBUTE (ECAG R1,R3,D2(B2))
  3362  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3363  	{ECTG, 0xff0f000000000000, 0xc801000000000000, 0x0, // EXTRACT CPU TIME (ECTG D1(B1),D2(B2),R3)
  3364  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35, ap_Reg_8_11}},
  3365  	{EFPC, 0xffff000000000000, 0xb38c000000000000, 0xff0f00000000, // EXTRACT FPC (EFPC R1)
  3366  		[8]*argField{ap_Reg_24_27}},
  3367  	{EPAR, 0xffff000000000000, 0xb226000000000000, 0xff0f00000000, // EXTRACT PRIMARY ASN (EPAR R1)
  3368  		[8]*argField{ap_Reg_24_27}},
  3369  	{EPAIR, 0xffff000000000000, 0xb99a000000000000, 0xff0f00000000, // EXTRACT PRIMARY ASN AND INSTANCE (EPAIR R1)
  3370  		[8]*argField{ap_Reg_24_27}},
  3371  	{EPSW, 0xffff000000000000, 0xb98d000000000000, 0xff0000000000, // EXTRACT PSW (EPSW R1,R2)
  3372  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3373  	{ESAR, 0xffff000000000000, 0xb227000000000000, 0xff0f00000000, // EXTRACT SECONDARY ASN (ESAR R1)
  3374  		[8]*argField{ap_Reg_24_27}},
  3375  	{ESAIR, 0xffff000000000000, 0xb99b000000000000, 0xff0f00000000, // EXTRACT SECONDARY ASN AND INSTANCE (ESAIR R1)
  3376  		[8]*argField{ap_Reg_24_27}},
  3377  	{ESXTR, 0xffff000000000000, 0xb3ef000000000000, 0xff0000000000, // EXTRACT SIGNIFICANCE (extended DFP to 64) (ESXTR R1,R2)
  3378  		[8]*argField{ap_Reg_24_27, ap_FPReg_28_31}},
  3379  	{ESDTR, 0xffff000000000000, 0xb3e7000000000000, 0xff0000000000, // EXTRACT SIGNIFICANCE (long DFP to 64) (ESDTR R1,R2)
  3380  		[8]*argField{ap_Reg_24_27, ap_FPReg_28_31}},
  3381  	{EREG, 0xffff000000000000, 0xb249000000000000, 0xff0000000000, // EXTRACT STACKED REGISTERS (32) (EREG R1,R2)
  3382  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3383  	{EREGG, 0xffff000000000000, 0xb90e000000000000, 0xff0000000000, // EXTRACT STACKED REGISTERS (64) (EREGG R1,R2)
  3384  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3385  	{ESTA, 0xffff000000000000, 0xb24a000000000000, 0xff0000000000, // EXTRACT STACKED STATE (ESTA R1,R2)
  3386  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3387  	{ETND, 0xffff000000000000, 0xb2ec000000000000, 0xff0f00000000, // EXTRACT TRANSACTION NESTING DEPTH (ETND R1)
  3388  		[8]*argField{ap_Reg_24_27}},
  3389  	{FLOGR, 0xffff000000000000, 0xb983000000000000, 0xff0000000000, // FIND LEFTMOST ONE (FLOGR R1,R2)
  3390  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3391  	{HSCH, 0xffff000000000000, 0xb231000000000000, 0xffff00000000, // HALT SUBCHANNEL (HSCH)
  3392  		[8]*argField{}},
  3393  	{HDR, 0xff00000000000000, 0x2400000000000000, 0x0, // HALVE (long HFP) (HDR R1,R2)
  3394  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3395  	{HER, 0xff00000000000000, 0x3400000000000000, 0x0, // HALVE (short HFP) (HER R1,R2)
  3396  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3397  	{IAC, 0xffff000000000000, 0xb224000000000000, 0xff0f00000000, // INSERT ADDRESS SPACE CONTROL (IAC R1)
  3398  		[8]*argField{ap_Reg_24_27}},
  3399  	{IEXTR, 0xffff000000000000, 0xb3fe000000000000, 0xf0000000000, // INSERT BIASED EXPONENT (64 to extended DFP) (IEXTR R1,R3,R2)
  3400  		[8]*argField{ap_FPReg_24_27, ap_FPReg_16_19, ap_Reg_28_31}},
  3401  	{IEDTR, 0xffff000000000000, 0xb3f6000000000000, 0xf0000000000, // INSERT BIASED EXPONENT (64 to long DFP) (IEDTR R1,R3,R2)
  3402  		[8]*argField{ap_FPReg_24_27, ap_FPReg_16_19, ap_Reg_28_31}},
  3403  	{IC, 0xff00000000000000, 0x4300000000000000, 0x0, // INSERT CHARACTER (IC R1,D2(X2,B2))
  3404  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3405  	{ICY, 0xff00000000ff0000, 0xe300000000730000, 0x0, // INSERT CHARACTER (ICY R1,D2(X2,B2))
  3406  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3407  	{ICMH, 0xff00000000ff0000, 0xeb00000000800000, 0x0, // INSERT CHARACTERS UNDER MASK (high) (ICMH R1,M3,D2(B2))
  3408  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3409  	{ICM, 0xff00000000000000, 0xbf00000000000000, 0x0, // INSERT CHARACTERS UNDER MASK (low) (ICM R1,M3,D2(B2))
  3410  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3411  	{ICMY, 0xff00000000ff0000, 0xeb00000000810000, 0x0, // INSERT CHARACTERS UNDER MASK (low) (ICMY R1,M3,D2(B2))
  3412  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3413  	{IIHH, 0xff0f000000000000, 0xa500000000000000, 0x0, // INSERT IMMEDIATE (high high) (IIHH R1,I2)
  3414  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31}},
  3415  	{IIHL, 0xff0f000000000000, 0xa501000000000000, 0x0, // INSERT IMMEDIATE (high low) (IIHL R1,I2)
  3416  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31}},
  3417  	{IIHF, 0xff0f000000000000, 0xc008000000000000, 0x0, // INSERT IMMEDIATE (high) (IIHF R1,I2)
  3418  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  3419  	{IILH, 0xff0f000000000000, 0xa502000000000000, 0x0, // INSERT IMMEDIATE (low high) (IILH R1,I2)
  3420  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31}},
  3421  	{IILL, 0xff0f000000000000, 0xa503000000000000, 0x0, // INSERT IMMEDIATE (low low) (IILL R1,I2)
  3422  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31}},
  3423  	{IILF, 0xff0f000000000000, 0xc009000000000000, 0x0, // INSERT IMMEDIATE (low) (IILF R1,I2)
  3424  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  3425  	{IPM, 0xffff000000000000, 0xb222000000000000, 0xff0f00000000, // INSERT PROGRAM MASK (IPM R1)
  3426  		[8]*argField{ap_Reg_24_27}},
  3427  	{IPK, 0xffff000000000000, 0xb20b000000000000, 0xffff00000000, // INSERT PSW KEY (IPK)
  3428  		[8]*argField{}},
  3429  	{IRBM, 0xffff000000000000, 0xb9ac000000000000, 0xff0000000000, // INSERT REFERENCE BITS MULTIPLE (IRBM R1,R2)
  3430  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3431  	{ISKE, 0xffff000000000000, 0xb229000000000000, 0xff0000000000, // INSERT STORAGE KEY EXTENDED (ISKE R1,R2)
  3432  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3433  	{IVSK, 0xffff000000000000, 0xb223000000000000, 0xff0000000000, // INSERT VIRTUAL STORAGE KEY (IVSK R1,R2)
  3434  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3435  	{IDTE, 0xffff000000000000, 0xb98e000000000000, 0x0, // INVALIDATE DAT TABLE ENTRY (IDTE R1,R3,R2,M4)
  3436  		[8]*argField{ap_Reg_24_27, ap_Reg_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3437  	{IPTE, 0xffff000000000000, 0xb221000000000000, 0x0, // INVALIDATE PAGE TABLE ENTRY (IPTE R1,R2,R3,M4)
  3438  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19, ap_Mask_20_23}},
  3439  	{L, 0xff00000000000000, 0x5800000000000000, 0x0, // LOAD (32) (L R1,D2(X2,B2))
  3440  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3441  	{LR, 0xff00000000000000, 0x1800000000000000, 0x0, // LOAD (32) (LR R1,R2)
  3442  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  3443  	{LY, 0xff00000000ff0000, 0xe300000000580000, 0x0, // LOAD (32) (LY R1,D2(X2,B2))
  3444  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3445  	{LG, 0xff00000000ff0000, 0xe300000000040000, 0x0, // LOAD (64) (LG R1,D2(X2,B2))
  3446  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3447  	{LGR, 0xffff000000000000, 0xb904000000000000, 0xff0000000000, // LOAD (64) (LGR R1,R2)
  3448  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3449  	{LGF, 0xff00000000ff0000, 0xe300000000140000, 0x0, // LOAD (64←32) (LGF R1,D2(X2,B2))
  3450  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3451  	{LGFR, 0xffff000000000000, 0xb914000000000000, 0xff0000000000, // LOAD (64←32) (LGFR R1,R2)
  3452  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3453  	{LXR, 0xffff000000000000, 0xb365000000000000, 0xff0000000000, // LOAD (extended) (LXR R1,R2)
  3454  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3455  	{LD, 0xff00000000000000, 0x6800000000000000, 0x0, // LOAD (long) (LD R1,D2(X2,B2))
  3456  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3457  	{LDR, 0xff00000000000000, 0x2800000000000000, 0x0, // LOAD (long) (LDR R1,R2)
  3458  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3459  	{LDY, 0xff00000000ff0000, 0xed00000000650000, 0x0, // LOAD (long) (LDY R1,D2(X2,B2))
  3460  		[8]*argField{ap_FPReg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3461  	{LE, 0xff00000000000000, 0x7800000000000000, 0x0, // LOAD (short) (LE R1,D2(X2,B2))
  3462  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3463  	{LER, 0xff00000000000000, 0x3800000000000000, 0x0, // LOAD (short) (LER R1,R2)
  3464  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3465  	{LEY, 0xff00000000ff0000, 0xed00000000640000, 0x0, // LOAD (short) (LEY R1,D2(X2,B2))
  3466  		[8]*argField{ap_FPReg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3467  	{LAM, 0xff00000000000000, 0x9a00000000000000, 0x0, // LOAD ACCESS MULTIPLE 7-268 (LAM R1,R3,D2(B2))
  3468  		[8]*argField{ap_ACReg_8_11, ap_ACReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3469  	{LAMY, 0xff00000000ff0000, 0xeb000000009a0000, 0x0, // LOAD ACCESS MULTIPLE 7-268 (LAMY R1,R3,D2(B2))
  3470  		[8]*argField{ap_ACReg_8_11, ap_ACReg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3471  	{LA, 0xff00000000000000, 0x4100000000000000, 0x0, // LOAD ADDRESS (LA R1,D2(X2,B2))
  3472  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3473  	{LAY, 0xff00000000ff0000, 0xe300000000710000, 0x0, // LOAD ADDRESS (LAY R1,D2(X2,B2))
  3474  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3475  	{LAE, 0xff00000000000000, 0x5100000000000000, 0x0, // LOAD ADDRESS EXTENDED (LAE R1,D2(X2,B2))
  3476  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3477  	{LAEY, 0xff00000000ff0000, 0xe300000000750000, 0x0, // LOAD ADDRESS EXTENDED (LAEY R1,D2(X2,B2))
  3478  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3479  	{LARL, 0xff0f000000000000, 0xc000000000000000, 0x0, // LOAD ADDRESS RELATIVE LONG (LARL R1,RI2)
  3480  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3481  	{LASP, 0xffff000000000000, 0xe500000000000000, 0x0, // LOAD ADDRESS SPACE PARAMETERS (LASP D1(B1),D2(B2))
  3482  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3483  	{LAA, 0xff00000000ff0000, 0xeb00000000f80000, 0x0, // LOAD AND ADD (32) (LAA R1,R3,D2(B2))
  3484  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3485  	{LAAG, 0xff00000000ff0000, 0xeb00000000e80000, 0x0, // LOAD AND ADD (64) (LAAG R1,R3,D2(B2))
  3486  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3487  	{LAAL, 0xff00000000ff0000, 0xeb00000000fa0000, 0x0, // LOAD AND ADD LOGICAL (32) (LAAL R1,R3,D2(B2))
  3488  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3489  	{LAALG, 0xff00000000ff0000, 0xeb00000000ea0000, 0x0, // LOAD AND ADD LOGICAL (64) (LAALG R1,R3,D2(B2))
  3490  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3491  	{LAN, 0xff00000000ff0000, 0xeb00000000f40000, 0x0, // LOAD AND AND (32) (LAN R1,R3,D2(B2))
  3492  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3493  	{LANG, 0xff00000000ff0000, 0xeb00000000e40000, 0x0, // LOAD AND AND (64) (LANG R1,R3,D2(B2))
  3494  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3495  	{LAX, 0xff00000000ff0000, 0xeb00000000f70000, 0x0, // LOAD AND EXCLUSIVE OR (32) (LAX R1,R3,D2(B2))
  3496  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3497  	{LAXG, 0xff00000000ff0000, 0xeb00000000e70000, 0x0, // LOAD AND EXCLUSIVE OR (64) (LAXG R1,R3,D2(B2))
  3498  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3499  	{LAO, 0xff00000000ff0000, 0xeb00000000f60000, 0x0, // LOAD AND OR (32) (LAO R1,R3,D2(B2))
  3500  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3501  	{LAOG, 0xff00000000ff0000, 0xeb00000000e60000, 0x0, // LOAD AND OR (64) (LAOG R1,R3,D2(B2))
  3502  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3503  	{LT, 0xff00000000ff0000, 0xe300000000120000, 0x0, // LOAD AND TEST (32) (LT R1,D2(X2,B2))
  3504  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3505  	{LTR, 0xff00000000000000, 0x1200000000000000, 0x0, // LOAD AND TEST (32) (LTR R1,R2)
  3506  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  3507  	{LTG, 0xff00000000ff0000, 0xe300000000020000, 0x0, // LOAD AND TEST (64) (LTG R1,D2(X2,B2))
  3508  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3509  	{LTGR, 0xffff000000000000, 0xb902000000000000, 0xff0000000000, // LOAD AND TEST (64) (LTGR R1,R2)
  3510  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3511  	{LTGF, 0xff00000000ff0000, 0xe300000000320000, 0x0, // LOAD AND TEST (64→32) (LTGF R1,D2(X2,B2))
  3512  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3513  	{LTGFR, 0xffff000000000000, 0xb912000000000000, 0xff0000000000, // LOAD AND TEST (64→32) (LTGFR R1,R2)
  3514  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3515  	{LTXBR, 0xffff000000000000, 0xb342000000000000, 0xff0000000000, // LOAD AND TEST (extended BFP) (LTXBR R1,R2)
  3516  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3517  	{LTXTR, 0xffff000000000000, 0xb3de000000000000, 0xff0000000000, // LOAD AND TEST (extended DFP) (LTXTR R1,R2)
  3518  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3519  	{LTXR, 0xffff000000000000, 0xb362000000000000, 0xff0000000000, // LOAD AND TEST (extended HFP) (LTXR R1,R2)
  3520  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3521  	{LTDBR, 0xffff000000000000, 0xb312000000000000, 0xff0000000000, // LOAD AND TEST (long BFP) (LTDBR R1,R2)
  3522  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3523  	{LTDTR, 0xffff000000000000, 0xb3d6000000000000, 0xff0000000000, // LOAD AND TEST (long DFP) (LTDTR R1,R2)
  3524  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3525  	{LTDR, 0xff00000000000000, 0x2200000000000000, 0x0, // LOAD AND TEST (long HFP) (LTDR R1,R2)
  3526  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3527  	{LTEBR, 0xffff000000000000, 0xb302000000000000, 0xff0000000000, // LOAD AND TEST (short BFP) (LTEBR R1,R2)
  3528  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3529  	{LTER, 0xff00000000000000, 0x3200000000000000, 0x0, // LOAD AND TEST (short HFP) (LTER R1,R2)
  3530  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3531  	{LAT, 0xff00000000ff0000, 0xe3000000009f0000, 0x0, // LOAD AND TRAP (32L→32) (LAT R1,D2(X2,B2))
  3532  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3533  	{LGAT, 0xff00000000ff0000, 0xe300000000850000, 0x0, // LOAD AND TRAP (64) (LGAT R1,D2(X2,B2))
  3534  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3535  	{LZRF, 0xff00000000ff0000, 0xe3000000003b0000, 0x0, // LOAD AND ZERO RIGHTMOST BYTE (32) (LZRF R1,D2(X2,B2))
  3536  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3537  	{LZRG, 0xff00000000ff0000, 0xe3000000002a0000, 0x0, // LOAD AND ZERO RIGHTMOST BYTE (64) (LZRG R1,D2(X2,B2))
  3538  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3539  	{LBEAR, 0xffff000000000000, 0xb200000000000000, 0x0, // LOAD BEAR (LBEAR D2(B2))
  3540  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3541  	{LB, 0xff00000000ff0000, 0xe300000000760000, 0x0, // LOAD BYTE (32→8) (LB R1,D2(X2,B2))
  3542  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3543  	{LBR, 0xffff000000000000, 0xb926000000000000, 0xff0000000000, // LOAD BYTE (32←8) (LBR R1,R2)
  3544  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3545  	{LGB, 0xff00000000ff0000, 0xe300000000770000, 0x0, // LOAD BYTE (64→8) (LGB R1,D2(X2,B2))
  3546  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3547  	{LGBR, 0xffff000000000000, 0xb906000000000000, 0xff0000000000, // LOAD BYTE (64←8) (LGBR R1,R2)
  3548  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3549  	{LBH, 0xff00000000ff0000, 0xe300000000c00000, 0x0, // LOAD BYTE HIGH (32←8) (LBH R1,D2(X2,B2))
  3550  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3551  	{LCR, 0xff00000000000000, 0x1300000000000000, 0x0, // LOAD COMPLEMENT (32) (LCR R1,R2)
  3552  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  3553  	{LCGR, 0xffff000000000000, 0xb903000000000000, 0xff0000000000, // LOAD COMPLEMENT (64) (LCGR R1,R2)
  3554  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3555  	{LCGFR, 0xffff000000000000, 0xb913000000000000, 0xff0000000000, // LOAD COMPLEMENT (64←32) (LCGFR R1,R2)
  3556  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3557  	{LCXBR, 0xffff000000000000, 0xb343000000000000, 0xff0000000000, // LOAD COMPLEMENT (extended BFP) (LCXBR R1,R2)
  3558  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3559  	{LCXR, 0xffff000000000000, 0xb363000000000000, 0xff0000000000, // LOAD COMPLEMENT (extended HFP) (LCXR R1,R2)
  3560  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3561  	{LCDBR, 0xffff000000000000, 0xb313000000000000, 0xff0000000000, // LOAD COMPLEMENT (long BFP) (LCDBR R1,R2)
  3562  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3563  	{LCDR, 0xff00000000000000, 0x2300000000000000, 0x0, // LOAD COMPLEMENT (long HFP) (LCDR R1,R2)
  3564  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3565  	{LCDFR, 0xffff000000000000, 0xb373000000000000, 0xff0000000000, // LOAD COMPLEMENT (long) (LCDFR R1,R2)
  3566  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3567  	{LCEBR, 0xffff000000000000, 0xb303000000000000, 0xff0000000000, // LOAD COMPLEMENT (short BFP) (LCEBR R1,R2)
  3568  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3569  	{LCER, 0xff00000000000000, 0x3300000000000000, 0x0, // LOAD COMPLEMENT (short HFP) (LCER R1,R2)
  3570  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3571  	{LCTL, 0xff00000000000000, 0xb700000000000000, 0x0, // LOAD CONTROL (32) (LCTL R1,R3,D2(B2))
  3572  		[8]*argField{ap_CReg_8_11, ap_CReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3573  	{LCTLG, 0xff00000000ff0000, 0xeb000000002f0000, 0x0, // LOAD CONTROL (64) (LCTLG R1,R3,D2(B2))
  3574  		[8]*argField{ap_CReg_8_11, ap_CReg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3575  	{LCBB, 0xff00000000ff0000, 0xe700000000270000, 0xf000000, // LOAD COUNT TO BLOCK BOUNDARY (LCBB R1,D2(X2,B2),M3)
  3576  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35}},
  3577  	{FIXBR, 0xffff000000000000, 0xb347000000000000, 0xf0000000000, // LOAD FP INTEGER (extended BFP) (FIXBR R1,M3,R2)
  3578  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3579  	{FIXBRA, 0xffff000000000000, 0xb347000000000000, 0x0, // LOAD FP INTEGER (extended BFP) (FIXBRA R1,M3,R2,M4)
  3580  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3581  	{FIXTR, 0xffff000000000000, 0xb3df000000000000, 0x0, // LOAD FP INTEGER (extended DFP) (FIXTR R1,M3,R2,M4)
  3582  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3583  	{FIXR, 0xffff000000000000, 0xb367000000000000, 0xff0000000000, // LOAD FP INTEGER (extended HFP) (FIXR R1,R2)
  3584  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3585  	{FIDBR, 0xffff000000000000, 0xb35f000000000000, 0xf0000000000, // LOAD FP INTEGER (long BFP) (FIDBR R1,M3,R2)
  3586  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3587  	{FIDBRA, 0xffff000000000000, 0xb35f000000000000, 0x0, // LOAD FP INTEGER (long BFP) (FIDBRA R1,M3,R2,M4)
  3588  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3589  	{FIDTR, 0xffff000000000000, 0xb3d7000000000000, 0x0, // LOAD FP INTEGER (long DFP) (FIDTR R1,M3,R2,M4)
  3590  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3591  	{FIDR, 0xffff000000000000, 0xb37f000000000000, 0xff0000000000, // LOAD FP INTEGER (long HFP) (FIDR R1,R2)
  3592  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3593  	{FIEBR, 0xffff000000000000, 0xb357000000000000, 0xf0000000000, // LOAD FP INTEGER (short BFP) (FIEBR R1,M3,R2)
  3594  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31}},
  3595  	{FIEBRA, 0xffff000000000000, 0xb357000000000000, 0x0, // LOAD FP INTEGER (short BFP) (FIEBRA R1,M3,R2,M4)
  3596  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3597  	{FIER, 0xffff000000000000, 0xb377000000000000, 0xff0000000000, // LOAD FP INTEGER (short HFP) (FIER R1,R2)
  3598  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3599  	{LFPC, 0xffff000000000000, 0xb29d000000000000, 0x0, // LOAD FPC (LFPC D2(B2))
  3600  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3601  	{LFAS, 0xffff000000000000, 0xb2bd000000000000, 0x0, // LOAD FPC AND SIGNAL (LFAS D2(B2))
  3602  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3603  	{LDGR, 0xffff000000000000, 0xb3c1000000000000, 0xff0000000000, // LOAD FPR FROM GR (64 to long) (LDGR R1,R2)
  3604  		[8]*argField{ap_FPReg_24_27, ap_Reg_28_31}},
  3605  	{LGDR, 0xffff000000000000, 0xb3cd000000000000, 0xff0000000000, // LOAD GR FROM FPR (long to 64) (LGDR R1,R2)
  3606  		[8]*argField{ap_Reg_24_27, ap_FPReg_28_31}},
  3607  	{LGG, 0xff00000000ff0000, 0xe3000000004c0000, 0x0, // LOAD GUARDED (64) (LGG R1,D2(X2,B2))
  3608  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3609  	{LGSC, 0xff00000000ff0000, 0xe3000000004d0000, 0x0, // LOAD GUARDED STORAGE CONTROLS (LGSC R1,D2(X2,B2))
  3610  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3611  	{LH, 0xff00000000000000, 0x4800000000000000, 0x0, // LOAD HALFWORD (32→16) (LH R1,D2(X2,B2))
  3612  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3613  	{LHR, 0xffff000000000000, 0xb927000000000000, 0xff0000000000, // LOAD HALFWORD (32←16) (LHR R1,R2)
  3614  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3615  	{LHY, 0xff00000000ff0000, 0xe300000000780000, 0x0, // LOAD HALFWORD (32←16) (LHY R1,D2(X2,B2))
  3616  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3617  	{LGH, 0xff00000000ff0000, 0xe300000000150000, 0x0, // LOAD HALFWORD (64←16) (LGH R1,D2(X2,B2))
  3618  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3619  	{LGHR, 0xffff000000000000, 0xb907000000000000, 0xff0000000000, // LOAD HALFWORD (64←16) (LGHR R1,R2)
  3620  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3621  	{LHH, 0xff00000000ff0000, 0xe300000000c40000, 0x0, // LOAD HALFWORD HIGH (32→16) (LHH R1,D2(X2,B2))
  3622  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3623  	{LOCHHI, 0xff00000000ff0000, 0xec000000004e0000, 0xff000000, // LOAD HALFWORD HIGH IMMEDIATE ON (LOCHHI R1,I2,M3)
  3624  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31, ap_Mask_12_15}},
  3625  	{LHI, 0xff0f000000000000, 0xa708000000000000, 0x0, // CONDITION (32←16)LOAD HALFWORD IMMEDIATE (32)←16 (LHI R1,I2)
  3626  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  3627  	{LGHI, 0xff0f000000000000, 0xa709000000000000, 0x0, // LOAD HALFWORD IMMEDIATE (64→16) (LGHI R1,I2)
  3628  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  3629  	{LOCHI, 0xff00000000ff0000, 0xec00000000420000, 0xff000000, // LOAD HALFWORD IMMEDIATE ON CONDITION(32←16) (LOCHI R1,I2,M3)
  3630  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31, ap_Mask_12_15}},
  3631  	{LOCGHI, 0xff00000000ff0000, 0xec00000000460000, 0xff000000, // LOAD HALFWORD IMMEDIATE ON CONDITION(64→16) (LOCGHI R1,I2,M3)
  3632  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31, ap_Mask_12_15}},
  3633  	{LHRL, 0xff0f000000000000, 0xc405000000000000, 0x0, // LOAD HALFWORD RELATIVE LONG (32←16) (LHRL R1,RI2)
  3634  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3635  	{LGHRL, 0xff0f000000000000, 0xc404000000000000, 0x0, // LOAD HALFWORD RELATIVE LONG (64←16) (LGHRL R1,RI2)
  3636  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3637  	{LFH, 0xff00000000ff0000, 0xe300000000ca0000, 0x0, // LOAD HIGH (32) (LFH R1,D2(X2,B2))
  3638  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3639  	{LFHAT, 0xff00000000ff0000, 0xe300000000c80000, 0x0, // LOAD HIGH AND TRAP (32H←32) (LFHAT R1,D2(X2,B2))
  3640  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3641  	{LOCFH, 0xff00000000ff0000, 0xeb00000000e00000, 0x0, // LOAD HIGH ON CONDITION (32) (LOCFH R1,D2(B2),M3)
  3642  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_Mask_12_15}},
  3643  	{LOCFHR, 0xffff000000000000, 0xb9e0000000000000, 0xf0000000000, // LOAD HIGH ON CONDITION (32) (LOCFHR R1,R2,M3)
  3644  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  3645  	{LGFI, 0xff0f000000000000, 0xc001000000000000, 0x0, // LOAD IMMEDIATE (64→32) (LGFI R1,I2)
  3646  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  3647  	{LXDB, 0xff00000000ff0000, 0xed00000000050000, 0xff000000, // LOAD LENGTHENED (long to extended BFP) (LXDB R1,D2(X2,B2))
  3648  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3649  	{LXDBR, 0xffff000000000000, 0xb305000000000000, 0xff0000000000, // LOAD LENGTHENED (long to extended BFP) (LXDBR R1,R2)
  3650  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3651  	{LXDTR, 0xffff000000000000, 0xb3dc000000000000, 0xf00000000000, // LOAD LENGTHENED (long to extended DFP) (LXDTR R1,R2,M4)
  3652  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_Mask_20_23}},
  3653  	{LXD, 0xff00000000ff0000, 0xed00000000250000, 0xff000000, // LOAD LENGTHENED (long to extended HFP) (LXD R1,D2(X2,B2))
  3654  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3655  	{LXDR, 0xffff000000000000, 0xb325000000000000, 0xff0000000000, // LOAD LENGTHENED (long to extended HFP) (LXDR R1,R2)
  3656  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3657  	{LXEB, 0xff00000000ff0000, 0xed00000000060000, 0xff000000, // LOAD LENGTHENED (short to extended BFP) (LXEB R1,D2(X2,B2))
  3658  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3659  	{LXEBR, 0xffff000000000000, 0xb306000000000000, 0xff0000000000, // LOAD LENGTHENED (short to extended BFP) (LXEBR R1,R2)
  3660  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3661  	{LXE, 0xff00000000ff0000, 0xed00000000260000, 0xff000000, // LOAD LENGTHENED (short to extended HFP) (LXE R1,D2(X2,B2))
  3662  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3663  	{LXER, 0xffff000000000000, 0xb326000000000000, 0xff0000000000, // LOAD LENGTHENED (short to extended HFP) (LXER R1,R2)
  3664  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3665  	{LDEB, 0xff00000000ff0000, 0xed00000000040000, 0xff000000, // LOAD LENGTHENED (short to long BFP) (LDEB R1,D2(X2,B2))
  3666  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3667  	{LDEBR, 0xffff000000000000, 0xb304000000000000, 0xff0000000000, // LOAD LENGTHENED (short to long BFP) (LDEBR R1,R2)
  3668  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3669  	{LDETR, 0xffff000000000000, 0xb3d4000000000000, 0xf00000000000, // LOAD LENGTHENED (short to long DFP) (LDETR R1,R2,M4)
  3670  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_Mask_20_23}},
  3671  	{LDE, 0xff00000000ff0000, 0xed00000000240000, 0xff000000, // LOAD LENGTHENED (short to long HFP) (LDE R1,D2(X2,B2))
  3672  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3673  	{LDER, 0xffff000000000000, 0xb324000000000000, 0xff0000000000, // LOAD LENGTHENED (short to long HFP) (LDER R1,R2)
  3674  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3675  	{LLGF, 0xff00000000ff0000, 0xe300000000160000, 0x0, // LOAD LOGICAL (64←32) (LLGF R1,D2(X2,B2))
  3676  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3677  	{LLGFR, 0xffff000000000000, 0xb916000000000000, 0xff0000000000, // LOAD LOGICAL (64←32) (LLGFR R1,R2)
  3678  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3679  	{LLGFSG, 0xff00000000ff0000, 0xe300000000480000, 0x0, // LOAD LOGICAL AND SHIFT GUARDED (64←32) (LLGFSG R1,D2(X2,B2))
  3680  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3681  	{LLGFAT, 0xff00000000ff0000, 0xe3000000009d0000, 0x0, // LOAD LOGICAL AND TRAP (64→32) (LLGFAT R1,D2(X2,B2))
  3682  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3683  	{LLZRGF, 0xff00000000ff0000, 0xe3000000003a0000, 0x0, // LOAD LOGICAL AND ZERO RIGHTMOST BYTE(64→32) (LLZRGF R1,D2(X2,B2))
  3684  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3685  	{LLC, 0xff00000000ff0000, 0xe300000000940000, 0x0, // LOAD LOGICAL CHARACTER (32→8) (LLC R1,D2(X2,B2))
  3686  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3687  	{LLCR, 0xffff000000000000, 0xb994000000000000, 0xff0000000000, // LOAD LOGICAL CHARACTER (32←8) (LLCR R1,R2)
  3688  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3689  	{LLGC, 0xff00000000ff0000, 0xe300000000900000, 0x0, // LOAD LOGICAL CHARACTER (64←8) (LLGC R1,D2(X2,B2))
  3690  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3691  	{LLGCR, 0xffff000000000000, 0xb984000000000000, 0xff0000000000, // LOAD LOGICAL CHARACTER (64←8) (LLGCR R1,R2)
  3692  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3693  	{LLCH, 0xff00000000ff0000, 0xe300000000c20000, 0x0, // LOAD LOGICAL CHARACTER HIGH (32←8) (LLCH R1,D2(X2,B2))
  3694  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3695  	{LLH, 0xff00000000ff0000, 0xe300000000950000, 0x0, // LOAD LOGICAL HALFWORD (32←16) (LLH R1,D2(X2,B2))
  3696  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3697  	{LLHR, 0xffff000000000000, 0xb995000000000000, 0xff0000000000, // LOAD LOGICAL HALFWORD (32←16) (LLHR R1,R2)
  3698  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3699  	{LLGH, 0xff00000000ff0000, 0xe300000000910000, 0x0, // LOAD LOGICAL HALFWORD (64→16) (LLGH R1,D2(X2,B2))
  3700  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3701  	{LLGHR, 0xffff000000000000, 0xb985000000000000, 0xff0000000000, // LOAD LOGICAL HALFWORD (64←16) (LLGHR R1,R2)
  3702  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3703  	{LLHH, 0xff00000000ff0000, 0xe300000000c60000, 0x0, // LOAD LOGICAL HALFWORD HIGH (32→16) (LLHH R1,D2(X2,B2))
  3704  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3705  	{LLHRL, 0xff0f000000000000, 0xc402000000000000, 0x0, // LOAD LOGICAL HALFWORD RELATIVE LONG(32←16) (LLHRL R1,RI2)
  3706  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3707  	{LLGHRL, 0xff0f000000000000, 0xc406000000000000, 0x0, // LOAD LOGICAL HALFWORD RELATIVE LONG(64→16) (LLGHRL R1,RI2)
  3708  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3709  	{LLIHH, 0xff0f000000000000, 0xa50c000000000000, 0x0, // LOAD LOGICAL IMMEDIATE (high high) (LLIHH R1,I2)
  3710  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  3711  	{LLIHL, 0xff0f000000000000, 0xa50d000000000000, 0x0, // LOAD LOGICAL IMMEDIATE (high low) (LLIHL R1,I2)
  3712  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  3713  	{LLIHF, 0xff0f000000000000, 0xc00e000000000000, 0x0, // LOAD LOGICAL IMMEDIATE (high) (LLIHF R1,I2)
  3714  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  3715  	{LLILH, 0xff0f000000000000, 0xa50e000000000000, 0x0, // LOAD LOGICAL IMMEDIATE (low high) (LLILH R1,I2)
  3716  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  3717  	{LLILL, 0xff0f000000000000, 0xa50f000000000000, 0x0, // LOAD LOGICAL IMMEDIATE (low low) (LLILL R1,I2)
  3718  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  3719  	{LLILF, 0xff0f000000000000, 0xc00f000000000000, 0x0, // LOAD LOGICAL IMMEDIATE (low) (LLILF R1,I2)
  3720  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  3721  	{LLGFRL, 0xff0f000000000000, 0xc40e000000000000, 0x0, // LOAD LOGICAL RELATIVE LONG (64→32) (LLGFRL R1,RI2)
  3722  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3723  	{LLGT, 0xff00000000ff0000, 0xe300000000170000, 0x0, // LOAD LOGICAL THIRTY ONE BITS (64→31) (LLGT R1,D2(X2,B2))
  3724  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3725  	{LLGTR, 0xffff000000000000, 0xb917000000000000, 0xff0000000000, // LOAD LOGICAL THIRTY ONE BITS (64→31) (LLGTR R1,R2)
  3726  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3727  	{LLGTAT, 0xff00000000ff0000, 0xe3000000009c0000, 0x0, // LOAD LOGICAL THIRTY ONE BITS AND TRAP(64←31) (LLGTAT R1,D2(X2,B2))
  3728  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3729  	{LM, 0xff00000000000000, 0x9800000000000000, 0x0, // LOAD MULTIPLE (32) (LM R1,R3,D2(B2))
  3730  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3731  	{LMY, 0xff00000000ff0000, 0xeb00000000980000, 0x0, // LOAD MULTIPLE (32) (LMY R1,R3,D2(B2))
  3732  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3733  	{LMG, 0xff00000000ff0000, 0xeb00000000040000, 0x0, // LOAD MULTIPLE (64) (LMG R1,R3,D2(B2))
  3734  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3735  	{LMD, 0xff00000000000000, 0xef00000000000000, 0x0, // LOAD MULTIPLE DISJOINT (64→32&32) (LMD R1,R3,D2(B2),D4(B4))
  3736  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3737  	{LMH, 0xff00000000ff0000, 0xeb00000000960000, 0x0, // LOAD MULTIPLE HIGH (32) (LMH R1,R3,D2(B2))
  3738  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3739  	{LNR, 0xff00000000000000, 0x1100000000000000, 0x0, // LOAD NEGATIVE (32) (LNR R1,R2)
  3740  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  3741  	{LNGR, 0xffff000000000000, 0xb901000000000000, 0xff0000000000, // LOAD NEGATIVE (64) (LNGR R1,R2)
  3742  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3743  	{LNGFR, 0xffff000000000000, 0xb911000000000000, 0xff0000000000, // LOAD NEGATIVE (64→32) (LNGFR R1,R2)
  3744  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3745  	{LNXBR, 0xffff000000000000, 0xb341000000000000, 0xff0000000000, // LOAD NEGATIVE (extended BFP) (LNXBR R1,R2)
  3746  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3747  	{LNXR, 0xffff000000000000, 0xb361000000000000, 0xff0000000000, // LOAD NEGATIVE (extended HFP) (LNXR R1,R2)
  3748  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3749  	{LNDBR, 0xffff000000000000, 0xb311000000000000, 0xff0000000000, // LOAD NEGATIVE (long BFP) (LNDBR R1,R2)
  3750  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3751  	{LNDR, 0xff00000000000000, 0x2100000000000000, 0x0, // LOAD NEGATIVE (long HFP) (LNDR R1,R2)
  3752  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3753  	{LNDFR, 0xffff000000000000, 0xb371000000000000, 0xff0000000000, // LOAD NEGATIVE (long) (LNDFR R1,R2)
  3754  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3755  	{LNEBR, 0xffff000000000000, 0xb301000000000000, 0xff0000000000, // LOAD NEGATIVE (short BFP) (LNEBR R1,R2)
  3756  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3757  	{LNER, 0xff00000000000000, 0x3100000000000000, 0x0, // LOAD NEGATIVE (short HFP) (LNER R1,R2)
  3758  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3759  	{LOC, 0xff00000000ff0000, 0xeb00000000f20000, 0x0, // LOAD ON CONDITION (32) (LOC R1,D2(B2),M3)
  3760  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_Mask_12_15}},
  3761  	{LOCR, 0xffff000000000000, 0xb9f2000000000000, 0xf0000000000, // LOAD ON CONDITION (32) (LOCR R1,R2,M3)
  3762  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  3763  	{LOCG, 0xff00000000ff0000, 0xeb00000000e20000, 0x0, // LOAD ON CONDITION (64) (LOCG R1,D2(B2),M3)
  3764  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_Mask_12_15}},
  3765  	{LOCGR, 0xffff000000000000, 0xb9e2000000000000, 0xf0000000000, // LOAD ON CONDITION (64) (LOCGR R1,R2,M3)
  3766  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  3767  	{LPTEA, 0xffff000000000000, 0xb9aa000000000000, 0x0, // LOAD PAGE TABLE ENTRY ADDRESS (LPTEA R1,R3,R2,M4)
  3768  		[8]*argField{ap_Reg_24_27, ap_Reg_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  3769  	{LPD, 0xff0f000000000000, 0xc804000000000000, 0x0, // LOAD PAIR DISJOINT (32) (LPD R3,D1(B1),D2(B2))
  3770  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3771  	{LPDG, 0xff0f000000000000, 0xc805000000000000, 0x0, // LOAD PAIR DISJOINT (64) (LPDG R3,D1(B1),D2(B2))
  3772  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3773  	{LPQ, 0xff00000000ff0000, 0xe3000000008f0000, 0x0, // LOAD PAIR FROM QUADWORD (64&64←128) (LPQ R1,D2(X2,B2))
  3774  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3775  	{LPR, 0xff00000000000000, 0x1000000000000000, 0x0, // LOAD POSITIVE (32) (LPR R1,R2)
  3776  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  3777  	{LPGR, 0xffff000000000000, 0xb900000000000000, 0xff0000000000, // LOAD POSITIVE (64) (LPGR R1,R2)
  3778  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3779  	{LPGFR, 0xffff000000000000, 0xb910000000000000, 0xff0000000000, // LOAD POSITIVE (64→32) (LPGFR R1,R2)
  3780  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3781  	{LPXBR, 0xffff000000000000, 0xb340000000000000, 0xff0000000000, // LOAD POSITIVE (extended BFP) (LPXBR R1,R2)
  3782  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3783  	{LPXR, 0xffff000000000000, 0xb360000000000000, 0xff0000000000, // LOAD POSITIVE (extended HFP) (LPXR R1,R2)
  3784  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3785  	{LPDBR, 0xffff000000000000, 0xb310000000000000, 0xff0000000000, // LOAD POSITIVE (long BFP) (LPDBR R1,R2)
  3786  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3787  	{LPDR, 0xff00000000000000, 0x2000000000000000, 0x0, // LOAD POSITIVE (long HFP) (LPDR R1,R2)
  3788  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3789  	{LPDFR, 0xffff000000000000, 0xb370000000000000, 0xff0000000000, // LOAD POSITIVE (long) (LPDFR R1,R2)
  3790  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3791  	{LPEBR, 0xffff000000000000, 0xb300000000000000, 0xff0000000000, // LOAD POSITIVE (short BFP) (LPEBR R1,R2)
  3792  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3793  	{LPER, 0xff00000000000000, 0x3000000000000000, 0x0, // LOAD POSITIVE (short HFP) (LPER R1,R2)
  3794  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3795  	{LPSW, 0xff00000000000000, 0x8200000000000000, 0x0, // LOAD PSW (LPSW D1(B1))
  3796  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3797  	{LPSWE, 0xffff000000000000, 0xb2b2000000000000, 0x0, // LOAD PSW EXTENDED (LPSWE D2(B2))
  3798  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3799  	{LPSWEY, 0xff00000000ff0000, 0xeb00000000710000, 0xff000000000000, // LOAD PSW EXTENDED (LPSWEY D1(B1))
  3800  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3801  	{LRA, 0xff00000000000000, 0xb100000000000000, 0x0, // LOAD REAL ADDRESS (32) (LRA R1,D2(X2,B2))
  3802  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3803  	{LRAY, 0xff00000000ff0000, 0xe300000000130000, 0x0, // LOAD REAL ADDRESS (32) (LRAY R1,D2(X2,B2))
  3804  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3805  	{LRAG, 0xff00000000ff0000, 0xe300000000030000, 0x0, // LOAD REAL ADDRESS (64) (LRAG R1,D2(X2,B2))
  3806  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3807  	{LRL, 0xff0f000000000000, 0xc40d000000000000, 0x0, // LOAD RELATIVE LONG (32) (LRL R1,RI2)
  3808  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3809  	{LGRL, 0xff0f000000000000, 0xc408000000000000, 0x0, // LOAD RELATIVE LONG (64) (LGRL R1,RI2)
  3810  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3811  	{LGFRL, 0xff0f000000000000, 0xc40c000000000000, 0x0, // LOAD RELATIVE LONG (64→32) (LGFRL R1,RI2)
  3812  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  3813  	{LRVH, 0xff00000000ff0000, 0xe3000000001f0000, 0x0, // LOAD REVERSED (16) (LRVH R1,D2(X2,B2))
  3814  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3815  	{LRV, 0xff00000000ff0000, 0xe3000000001e0000, 0x0, // LOAD REVERSED (32) (LRV R1,D2(X2,B2))
  3816  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3817  	{LRVR, 0xffff000000000000, 0xb91f000000000000, 0xff0000000000, // LOAD REVERSED (32) (LRVR R1,R2)
  3818  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3819  	{LRVG, 0xff00000000ff0000, 0xe3000000000f0000, 0x0, // LOAD REVERSED (64) (LRVG R1,D2(X2,B2))
  3820  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3821  	{LRVGR, 0xffff000000000000, 0xb90f000000000000, 0xff0000000000, // LOAD REVERSED (64) (LRVGR R1,R2)
  3822  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3823  	{LDXBR, 0xffff000000000000, 0xb345000000000000, 0xff0000000000, // LOAD ROUNDED (extended to long BFP) (LDXBR R1,R2)
  3824  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3825  	{LDXBRA, 0xffff000000000000, 0xb345000000000000, 0x0, // LOAD ROUNDED (extended to long BFP) (LDXBRA R1,M3,R2,M4)
  3826  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3827  	{LDXTR, 0xffff000000000000, 0xb3dd000000000000, 0x0, // LOAD ROUNDED (extended to long DFP) (LDXTR R1,M3,R2,M4)
  3828  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3829  	{LDXR, 0xff00000000000000, 0x2500000000000000, 0x0, // LOAD ROUNDED (extended to long HFP) (LDXR R1,R2)
  3830  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3831  	{LRDR, 0xff00000000000000, 0x2500000000000000, 0x0, // LOAD ROUNDED (extended to long HFP) (LRDR R1,R2)
  3832  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3833  	{LEXBR, 0xffff000000000000, 0xb346000000000000, 0xff0000000000, // LOAD ROUNDED (extended to short BFP) (LEXBR R1,R2)
  3834  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3835  	{LEXBRA, 0xffff000000000000, 0xb346000000000000, 0x0, // LOAD ROUNDED (extended to short BFP) (LEXBRA R1,M3,R2,M4)
  3836  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3837  	{LEXR, 0xffff000000000000, 0xb366000000000000, 0xff0000000000, // LOAD ROUNDED (extended to short HFP) (LEXR R1,R2)
  3838  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3839  	{LEDBR, 0xffff000000000000, 0xb344000000000000, 0xff0000000000, // LOAD ROUNDED (long to short BFP) (LEDBR R1,R2)
  3840  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3841  	{LEDBRA, 0xffff000000000000, 0xb344000000000000, 0x0, // LOAD ROUNDED (long to short BFP) (LEDBRA R1,M3,R2,M4)
  3842  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3843  	{LEDTR, 0xffff000000000000, 0xb3d5000000000000, 0x0, // LOAD ROUNDED (long to short DFP) (LEDTR R1,M3,R2,M4)
  3844  		[8]*argField{ap_FPReg_24_27, ap_Mask_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  3845  	{LEDR, 0xff00000000000000, 0x3500000000000000, 0x0, // LOAD ROUNDED (long to short HFP) (LEDR R1,R2)
  3846  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3847  	{LRER, 0xff00000000000000, 0x3500000000000000, 0x0, // LOAD ROUNDED (long to short HFP) (LRER R1,R2)
  3848  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3849  	{LURA, 0xffff000000000000, 0xb24b000000000000, 0xff0000000000, // LOAD USING REAL ADDRESS (32) (LURA R1,R2)
  3850  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3851  	{LURAG, 0xffff000000000000, 0xb905000000000000, 0xff0000000000, // LOAD USING REAL ADDRESS (64) (LURAG R1,R2)
  3852  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3853  	{LZXR, 0xffff000000000000, 0xb376000000000000, 0xff0f00000000, // LOAD ZERO (extended) (LZXR R1)
  3854  		[8]*argField{ap_FPReg_24_27}},
  3855  	{LZDR, 0xffff000000000000, 0xb375000000000000, 0xff0f00000000, // LOAD ZERO (long) (LZDR R1)
  3856  		[8]*argField{ap_FPReg_24_27}},
  3857  	{LZER, 0xffff000000000000, 0xb374000000000000, 0xff0f00000000, // LOAD ZERO (short) (LZER R1)
  3858  		[8]*argField{ap_FPReg_24_27}},
  3859  	{MSTA, 0xffff000000000000, 0xb247000000000000, 0xff0f00000000, // MODIFY STACKED STATE (MSTA R1)
  3860  		[8]*argField{ap_Reg_24_27}},
  3861  	{MSCH, 0xffff000000000000, 0xb232000000000000, 0x0, // MODIFY SUBCHANNEL (MSCH D2(B2))
  3862  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3863  	{MC, 0xff00000000000000, 0xaf00000000000000, 0x0, // MONITOR CALL (MC D1(B1),I2)
  3864  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_8_15}},
  3865  	{MVHHI, 0xffff000000000000, 0xe544000000000000, 0x0, // MOVE (16←16) (MVHHI D1(B1),I2)
  3866  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_32_47}},
  3867  	{MVHI, 0xffff000000000000, 0xe54c000000000000, 0x0, // MOVE (32→16) (MVHI D1(B1),I2)
  3868  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_32_47}},
  3869  	{MVGHI, 0xffff000000000000, 0xe548000000000000, 0x0, // MOVE (64←16) (MVGHI D1(B1),I2)
  3870  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmSigned16_32_47}},
  3871  	{MVC, 0xff00000000000000, 0xd200000000000000, 0x0, // MOVE (character) (MVC D1(L1,B1),D2(B2))
  3872  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3873  	{MVI, 0xff00000000000000, 0x9200000000000000, 0x0, // MOVE (immediate) (MVI D1(B1),I2)
  3874  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_8_15}},
  3875  	{MVIY, 0xff00000000ff0000, 0xeb00000000520000, 0x0, // MOVE (immediate) (MVIY D1(B1),I2)
  3876  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_ImmUnsigned_8_15}},
  3877  	{MVCIN, 0xff00000000000000, 0xe800000000000000, 0x0, // MOVE INVERSE (MVCIN D1(L1,B1),D2(B2))
  3878  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3879  	{MVCL, 0xff00000000000000, 0xe00000000000000, 0x0, // MOVE LONG (MVCL R1,R2)
  3880  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  3881  	{MVCLE, 0xff00000000000000, 0xa800000000000000, 0x0, // MOVE LONG EXTENDED (MVCLE R1,R3,D2(B2))
  3882  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  3883  	{MVCLU, 0xff00000000ff0000, 0xeb000000008e0000, 0x0, // MOVE LONG UNICODE (MVCLU R1,R3,D2(B2))
  3884  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  3885  	{MVN, 0xff00000000000000, 0xd100000000000000, 0x0, // MOVE NUMERICS (MVN D1(L1,B1),D2(B2))
  3886  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3887  	{MVPG, 0xffff000000000000, 0xb254000000000000, 0xff0000000000, // MOVE PAGE (MVPG R1,R2)
  3888  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3889  	{MVCRL, 0xffff000000000000, 0xe50a000000000000, 0x0, // MOVE RIGHT TO LEFT (MVCRL D1(B1),D2(B2))
  3890  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3891  	{MVST, 0xffff000000000000, 0xb255000000000000, 0xff0000000000, // MOVE STRING (MVST R1,R2)
  3892  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  3893  	{MVCP, 0xff00000000000000, 0xda00000000000000, 0x0, // MOVE TO PRIMARY (MVCP D1(R1,B1),D2(B2),R3)
  3894  		[8]*argField{ap_DispUnsigned_20_31, ap_Reg_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35, ap_Reg_12_15}},
  3895  	{MVCS, 0xff00000000000000, 0xdb00000000000000, 0x0, // MOVE TO SECONDARY (MVCS D1(R1,B1),D2(B2),R3)
  3896  		[8]*argField{ap_DispUnsigned_20_31, ap_Reg_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35, ap_Reg_12_15}},
  3897  	{MVCDK, 0xffff000000000000, 0xe50f000000000000, 0x0, // MOVE WITH DESTINATION KEY (MVCDK D1(B1),D2(B2))
  3898  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3899  	{MVCK, 0xff00000000000000, 0xd900000000000000, 0x0, // MOVE WITH KEY (MVCK D1(R1,B1),D2(B2),R3)
  3900  		[8]*argField{ap_DispUnsigned_20_31, ap_Reg_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35, ap_Reg_12_15}},
  3901  	{MVO, 0xff00000000000000, 0xf100000000000000, 0x0, // MOVE WITH OFFSET (MVO D1(L1,B1),D2(L2,B2))
  3902  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_12_15, ap_BaseReg_32_35}},
  3903  	{MVCOS, 0xff0f000000000000, 0xc800000000000000, 0x0, // MOVE WITH OPTIONAL SPECIFICATIONS (MVCOS D1(B1),D2(B2),R3)
  3904  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35, ap_Reg_8_11}},
  3905  	{MVCSK, 0xffff000000000000, 0xe50e000000000000, 0x0, // MOVE WITH SOURCE KEY (MVCSK D1(B1),D2(B2))
  3906  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3907  	{MVZ, 0xff00000000000000, 0xd300000000000000, 0x0, // MOVE ZONES (MVZ D1(L1,B1),D2(B2))
  3908  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  3909  	{MG, 0xff00000000ff0000, 0xe300000000840000, 0x0, // MULTIPLY (128←64) (MG R1,D2(X2,B2))
  3910  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3911  	{MGRK, 0xffff000000000000, 0xb9ec000000000000, 0xf0000000000, // MULTIPLY (128←64) (MGRK R1,R2,R3)
  3912  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  3913  	{M, 0xff00000000000000, 0x5c00000000000000, 0x0, // MULTIPLY (64←32) (M R1,D2(X2,B2))
  3914  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3915  	{MFY, 0xff00000000ff0000, 0xe3000000005c0000, 0x0, // MULTIPLY (64←32) (MFY R1,D2(X2,B2))
  3916  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3917  	{MR, 0xff00000000000000, 0x1c00000000000000, 0x0, // MULTIPLY (64←32) (MR R1,R2)
  3918  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  3919  	{MXBR, 0xffff000000000000, 0xb34c000000000000, 0xff0000000000, // MULTIPLY (extended BFP) (MXBR R1,R2)
  3920  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3921  	{MXTR, 0xffff000000000000, 0xb3d8000000000000, 0xf0000000000, // MULTIPLY (extended DFP) (MXTR R1,R2,R3)
  3922  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19}},
  3923  	{MXTRA, 0xffff000000000000, 0xb3d8000000000000, 0x0, // MULTIPLY (extended DFP) (MXTRA R1,R2,R3,M4)
  3924  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19, ap_Mask_20_23}},
  3925  	{MXR, 0xff00000000000000, 0x2600000000000000, 0x0, // MULTIPLY (extended HFP) (MXR R1,R2)
  3926  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3927  	{MDB, 0xff00000000ff0000, 0xed000000001c0000, 0xff000000, // MULTIPLY (long BFP) (MDB R1,D2(X2,B2))
  3928  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3929  	{MDBR, 0xffff000000000000, 0xb31c000000000000, 0xff0000000000, // MULTIPLY (long BFP) (MDBR R1,R2)
  3930  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3931  	{MDTR, 0xffff000000000000, 0xb3d0000000000000, 0xf0000000000, // MULTIPLY (long DFP) (MDTR R1,R2,R3)
  3932  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19}},
  3933  	{MDTRA, 0xffff000000000000, 0xb3d0000000000000, 0x0, // MULTIPLY (long DFP) (MDTRA R1,R2,R3,M4)
  3934  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19, ap_Mask_20_23}},
  3935  	{MD, 0xff00000000000000, 0x6c00000000000000, 0x0, // MULTIPLY (long HFP) (MD R1,D2(X2,B2))
  3936  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3937  	{MDR, 0xff00000000000000, 0x2c00000000000000, 0x0, // MULTIPLY (long HFP) (MDR R1,R2)
  3938  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3939  	{MXDB, 0xff00000000ff0000, 0xed00000000070000, 0xff000000, // MULTIPLY (long to extended BFP) (MXDB R1,D2(X2,B2))
  3940  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3941  	{MXDBR, 0xffff000000000000, 0xb307000000000000, 0xff0000000000, // MULTIPLY (long to extended BFP) (MXDBR R1,R2)
  3942  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3943  	{MXD, 0xff00000000000000, 0x6700000000000000, 0x0, // MULTIPLY (long to extended HFP) (MXD R1,D2(X2,B2))
  3944  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3945  	{MXDR, 0xff00000000000000, 0x2700000000000000, 0x0, // MULTIPLY (long to extended HFP) (MXDR R1,R2)
  3946  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3947  	{MEEB, 0xff00000000ff0000, 0xed00000000170000, 0xff000000, // MULTIPLY (short BFP) (MEEB R1,D2(X2,B2))
  3948  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3949  	{MEEBR, 0xffff000000000000, 0xb317000000000000, 0xff0000000000, // MULTIPLY (short BFP) (MEEBR R1,R2)
  3950  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3951  	{MEE, 0xff00000000ff0000, 0xed00000000370000, 0xff000000, // MULTIPLY (short HFP) (MEE R1,D2(X2,B2))
  3952  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3953  	{MEER, 0xffff000000000000, 0xb337000000000000, 0xff0000000000, // MULTIPLY (short HFP) (MEER R1,R2)
  3954  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3955  	{MDEB, 0xff00000000ff0000, 0xed000000000c0000, 0xff000000, // MULTIPLY (short to long BFP) (MDEB R1,D2(X2,B2))
  3956  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3957  	{MDEBR, 0xffff000000000000, 0xb30c000000000000, 0xff0000000000, // MULTIPLY (short to long BFP) (MDEBR R1,R2)
  3958  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  3959  	{MDE, 0xff00000000000000, 0x7c00000000000000, 0x0, // MULTIPLY (short to long HFP) (MDE R1,D2(X2,B2))
  3960  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3961  	{MDER, 0xff00000000000000, 0x3c00000000000000, 0x0, // MULTIPLY (short to long HFP) (MDER R1,R2)
  3962  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3963  	{ME, 0xff00000000000000, 0x7c00000000000000, 0x0, // MULTIPLY (short to long HFP) (ME R1,D2(X2,B2))
  3964  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3965  	{MER, 0xff00000000000000, 0x3c00000000000000, 0x0, // MULTIPLY (short to long HFP) (MER R1,R2)
  3966  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  3967  	{MAY, 0xff00000000ff0000, 0xed000000003a0000, 0xf000000, // MULTIPLY & ADD UNNORMALIZED (long to ext. HFP) (MAY R1,R3,D2(X2,B2))
  3968  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3969  	{MAYR, 0xffff000000000000, 0xb33a000000000000, 0xf0000000000, // MULTIPLY & ADD UNNORMALIZED (long to ext. HFP) (MAYR R1,R3,R2)
  3970  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  3971  	{MADB, 0xff00000000ff0000, 0xed000000001e0000, 0xf000000, // MULTIPLY AND ADD (long BFP) (MADB R1,R3,D2(X2,B2))
  3972  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3973  	{MADBR, 0xffff000000000000, 0xb31e000000000000, 0xf0000000000, // MULTIPLY AND ADD (long BFP) (MADBR R1,R3,R2)
  3974  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  3975  	{MAD, 0xff00000000ff0000, 0xed000000003e0000, 0xf000000, // MULTIPLY AND ADD (long HFP) (MAD R1,R3,D2(X2,B2))
  3976  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3977  	{MADR, 0xffff000000000000, 0xb33e000000000000, 0xf0000000000, // MULTIPLY AND ADD (long HFP) (MADR R1,R3,R2)
  3978  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  3979  	{MAEB, 0xff00000000ff0000, 0xed000000000e0000, 0xf000000, // MULTIPLY AND ADD (short BFP) (MAEB R1,R3,D2(X2,B2))
  3980  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3981  	{MAEBR, 0xffff000000000000, 0xb30e000000000000, 0xf0000000000, // MULTIPLY AND ADD (short BFP) (MAEBR R1,R3,R2)
  3982  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  3983  	{MAE, 0xff00000000ff0000, 0xed000000002e0000, 0xf000000, // MULTIPLY AND ADD (short HFP) (MAE R1,R3,D2(X2,B2))
  3984  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3985  	{MAER, 0xffff000000000000, 0xb32e000000000000, 0xf0000000000, // MULTIPLY AND ADD (short HFP) (MAER R1,R3,R2)
  3986  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  3987  	{MAYH, 0xff00000000ff0000, 0xed000000003c0000, 0xf000000, // MULTIPLY AND ADD UNNRM. (long to ext. high HFP) (MAYH R1,R3,D2(X2,B2))
  3988  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3989  	{MAYHR, 0xffff000000000000, 0xb33c000000000000, 0xf0000000000, // MULTIPLY AND ADD UNNRM. (long to ext. high HFP) (MAYHR R1,R3,R2)
  3990  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  3991  	{MAYL, 0xff00000000ff0000, 0xed00000000380000, 0xf000000, // MULTIPLY AND ADD UNNRM. (long to ext. low HFP) (MAYL R1,R3,D2(X2,B2))
  3992  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3993  	{MAYLR, 0xffff000000000000, 0xb338000000000000, 0xf0000000000, // MULTIPLY AND ADD UNNRM. (long to ext. low HFP) (MAYLR R1,R3,R2)
  3994  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  3995  	{MSDB, 0xff00000000ff0000, 0xed000000001f0000, 0xf000000, // MULTIPLY AND SUBTRACT (long BFP) (MSDB R1,R3,D2(X2,B2))
  3996  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  3997  	{MSDBR, 0xffff000000000000, 0xb31f000000000000, 0xf0000000000, // MULTIPLY AND SUBTRACT (long BFP) (MSDBR R1,R3,R2)
  3998  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  3999  	{MSD, 0xff00000000ff0000, 0xed000000003f0000, 0xf000000, // MULTIPLY AND SUBTRACT (long HFP) (MSD R1,R3,D2(X2,B2))
  4000  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4001  	{MSDR, 0xffff000000000000, 0xb33f000000000000, 0xf0000000000, // MULTIPLY AND SUBTRACT (long HFP) (MSDR R1,R3,R2)
  4002  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  4003  	{MSEB, 0xff00000000ff0000, 0xed000000000f0000, 0xf000000, // MULTIPLY AND SUBTRACT (short BFP) (MSEB R1,R3,D2(X2,B2))
  4004  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4005  	{MSEBR, 0xffff000000000000, 0xb30f000000000000, 0xf0000000000, // MULTIPLY AND SUBTRACT (short BFP) (MSEBR R1,R3,R2)
  4006  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  4007  	{MSE, 0xff00000000ff0000, 0xed000000002f0000, 0xf000000, // MULTIPLY AND SUBTRACT (short HFP) (MSE R1,R3,D2(X2,B2))
  4008  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4009  	{MSER, 0xffff000000000000, 0xb32f000000000000, 0xf0000000000, // MULTIPLY AND SUBTRACT (short HFP) (MSER R1,R3,R2)
  4010  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  4011  	{MP, 0xff00000000000000, 0xfc00000000000000, 0x0, // MULTIPLY DECIMAL (MP D1(L1,B1),D2(L2,B2))
  4012  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_12_15, ap_BaseReg_32_35}},
  4013  	{MH, 0xff00000000000000, 0x4c00000000000000, 0x0, // MULTIPLY HALFWORD (32←16) (MH R1,D2(X2,B2))
  4014  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4015  	{MHY, 0xff00000000ff0000, 0xe3000000007c0000, 0x0, // MULTIPLY HALFWORD (32←16) (MHY R1,D2(X2,B2))
  4016  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4017  	{MGH, 0xff00000000ff0000, 0xe3000000003c0000, 0x0, // MULTIPLY HALFWORD (64→16) (MGH R1,D2(X2,B2))
  4018  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4019  	{MHI, 0xff0f000000000000, 0xa70c000000000000, 0x0, // MULTIPLY HALFWORD IMMEDIATE (32→16) (MHI R1,I2)
  4020  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_31}},
  4021  	{MGHI, 0xff0f000000000000, 0xa70d000000000000, 0x0, // MULTIPLY HALFWORD IMMEDIATE (64→16) (MGHI R1,I2)
  4022  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_31}},
  4023  	{MLG, 0xff00000000ff0000, 0xe300000000860000, 0x0, // MULTIPLY LOGICAL (128→64) (MLG R1,D2(X2,B2))
  4024  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4025  	{MLGR, 0xffff000000000000, 0xb986000000000000, 0xff0000000000, // MULTIPLY LOGICAL (128→64) (MLGR R1,R2)
  4026  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4027  	{ML, 0xff00000000ff0000, 0xe300000000960000, 0x0, // MULTIPLY LOGICAL (64←32) (ML R1,D2(X2,B2))
  4028  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4029  	{MLR, 0xffff000000000000, 0xb996000000000000, 0xff0000000000, // MULTIPLY LOGICAL (64←32) (MLR R1,R2)
  4030  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4031  	{MS, 0xff00000000000000, 0x7100000000000000, 0x0, // MULTIPLY SINGLE (32) (MS R1,D2(X2,B2))
  4032  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4033  	{MSC, 0xff00000000ff0000, 0xe300000000530000, 0x0, // MULTIPLY SINGLE (32) (MSC R1,D2(X2,B2))
  4034  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4035  	{MSR, 0xffff000000000000, 0xb252000000000000, 0xff0000000000, // MULTIPLY SINGLE (32) (MSR R1,R2)
  4036  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4037  	{MSRKC, 0xffff000000000000, 0xb9fd000000000000, 0xf0000000000, // MULTIPLY SINGLE (32) (MSRKC R1,R2,R3)
  4038  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4039  	{MSY, 0xff00000000ff0000, 0xe300000000510000, 0x0, // MULTIPLY SINGLE (32) (MSY R1,D2(X2,B2))
  4040  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4041  	{MSG, 0xff00000000ff0000, 0xe3000000000c0000, 0x0, // MULTIPLY SINGLE (64) (MSG R1,D2(X2,B2))
  4042  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4043  	{MSGC, 0xff00000000ff0000, 0xe300000000830000, 0x0, // MULTIPLY SINGLE (64) (MSGC R1,D2(X2,B2))
  4044  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4045  	{MSGR, 0xffff000000000000, 0xb90c000000000000, 0xff0000000000, // MULTIPLY SINGLE (64) (MSGR R1,R2)
  4046  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4047  	{MSGRKC, 0xffff000000000000, 0xb9ed000000000000, 0xf0000000000, // MULTIPLY SINGLE (64) (MSGRKC R1,R2,R3)
  4048  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4049  	{MSGF, 0xff00000000ff0000, 0xe3000000001c0000, 0x0, // MULTIPLY SINGLE (64←32) (MSGF R1,D2(X2,B2))
  4050  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4051  	{MSGFR, 0xffff000000000000, 0xb91c000000000000, 0xff0000000000, // MULTIPLY SINGLE (64←32) (MSGFR R1,R2)
  4052  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4053  	{MSFI, 0xff0f000000000000, 0xc201000000000000, 0x0, // MULTIPLY SINGLE IMMEDIATE (32) (MSFI R1,I2)
  4054  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  4055  	{MSGFI, 0xff0f000000000000, 0xc200000000000000, 0x0, // MULTIPLY SINGLE IMMEDIATE (64←32) (MSGFI R1,I2)
  4056  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  4057  	{MYH, 0xff00000000ff0000, 0xed000000003d0000, 0xf000000, // MULTIPLY UNNORM. (long to ext. high HFP) (MYH R1,R3,D2(X2,B2))
  4058  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4059  	{MYHR, 0xffff000000000000, 0xb33d000000000000, 0xf0000000000, // MULTIPLY UNNORM. (long to ext. high HFP) (MYHR R1,R3,R2)
  4060  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  4061  	{MYL, 0xff00000000ff0000, 0xed00000000390000, 0xf000000, // MULTIPLY UNNORM. (long to ext. low HFP) (MYL R1,R3,D2(X2,B2))
  4062  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4063  	{MYLR, 0xffff000000000000, 0xb339000000000000, 0xf0000000000, // MULTIPLY UNNORM. (long to ext. low HFP) (MYLR R1,R3,R2)
  4064  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  4065  	{MY, 0xff00000000ff0000, 0xed000000003b0000, 0xf000000, // MULTIPLY UNNORMALIZED (long to ext. HFP) (MY R1,R3,D2(X2,B2))
  4066  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4067  	{MYR, 0xffff000000000000, 0xb33b000000000000, 0xf0000000000, // MULTIPLY UNNORMALIZED (long to ext. HFP) (MYR R1,R3,R2)
  4068  		[8]*argField{ap_FPReg_16_19, ap_FPReg_24_27, ap_FPReg_28_31}},
  4069  	{NNRK, 0xffff000000000000, 0xb974000000000000, 0xf0000000000, // NAND (32) (NNRK R1,R2,R3)
  4070  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4071  	{NNGRK, 0xffff000000000000, 0xb964000000000000, 0xf0000000000, // NAND (64) (NNGRK R1,R2,R3)
  4072  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4073  	{NNPA, 0xffff000000000000, 0xb93b000000000000, 0xffff00000000, // NEURAL NETWORK PROCESSING ASSIST (NNPA)
  4074  		[8]*argField{}},
  4075  	{NIAI, 0xffff000000000000, 0xb2fa000000000000, 0xff0000000000, // NEXT INSTRUCTION ACCESS INTENT (NIAI I1,I2)
  4076  		[8]*argField{ap_ImmUnsigned_24_27, ap_ImmUnsigned_28_31}},
  4077  	{NTSTG, 0xff00000000ff0000, 0xe300000000250000, 0x0, // NONTRANSACTIONAL STORE (64) (NTSTG R1,D2(X2,B2))
  4078  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4079  	{NORK, 0xffff000000000000, 0xb976000000000000, 0xf0000000000, // NOR (32) (NORK R1,R2,R3)
  4080  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4081  	{NOGRK, 0xffff000000000000, 0xb966000000000000, 0xf0000000000, // NOR (64) (NOGRK R1,R2,R3)
  4082  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4083  	{NXRK, 0xffff000000000000, 0xb977000000000000, 0xf0000000000, // NOT EXCLUSIVE OR (32) (NXRK R1,R2,R3)
  4084  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4085  	{NXGRK, 0xffff000000000000, 0xb967000000000000, 0xf0000000000, // NOT EXCLUSIVE OR (64) (NXGRK R1,R2,R3)
  4086  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4087  	{O, 0xff00000000000000, 0x5600000000000000, 0x0, // OR (32) (O R1,D2(X2,B2))
  4088  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4089  	{OR, 0xff00000000000000, 0x1600000000000000, 0x0, // OR (32) (OR R1,R2)
  4090  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  4091  	{ORK, 0xffff000000000000, 0xb9f6000000000000, 0xf0000000000, // OR (32) (ORK R1,R2,R3)
  4092  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4093  	{OY, 0xff00000000ff0000, 0xe300000000560000, 0x0, // OR (32) (OY R1,D2(X2,B2))
  4094  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4095  	{OG, 0xff00000000ff0000, 0xe300000000810000, 0x0, // OR (64) (OG R1,D2(X2,B2))
  4096  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4097  	{OGR, 0xffff000000000000, 0xb981000000000000, 0xff0000000000, // OR (64) (OGR R1,R2)
  4098  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4099  	{OGRK, 0xffff000000000000, 0xb9e6000000000000, 0xf0000000000, // OR (64) (OGRK R1,R2,R3)
  4100  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4101  	{OC, 0xff00000000000000, 0xd600000000000000, 0x0, // OR (character) (OC D1(L1,B1),D2(B2))
  4102  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  4103  	{OI, 0xff00000000000000, 0x9600000000000000, 0x0, // OR (immediate) (OI D1(B1),I2)
  4104  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmSigned8_8_15}},
  4105  	{OIY, 0xff00000000ff0000, 0xeb00000000560000, 0x0, // OR (immediate) (OIY D1(B1),I2)
  4106  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_ImmSigned8_8_15}},
  4107  	{OIHH, 0xff0f000000000000, 0xa508000000000000, 0x0, // OR IMMEDIATE (high high) (OIHH R1,I2)
  4108  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  4109  	{OIHL, 0xff0f000000000000, 0xa509000000000000, 0x0, // OR IMMEDIATE (high low) (OIHL R1,I2)
  4110  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  4111  	{OIHF, 0xff0f000000000000, 0xc00c000000000000, 0x0, // OR IMMEDIATE (high) (OIHF R1,I2)
  4112  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  4113  	{OILH, 0xff0f000000000000, 0xa50a000000000000, 0x0, // OR IMMEDIATE (low high) (OILH R1,I2)
  4114  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  4115  	{OILL, 0xff0f000000000000, 0xa50b000000000000, 0x0, // OR IMMEDIATE (low low) (OILL R1,I2)
  4116  		[8]*argField{ap_Reg_8_11, ap_ImmSigned16_16_31}},
  4117  	{OILF, 0xff0f000000000000, 0xc00d000000000000, 0x0, // OR IMMEDIATE (low) (OILF R1,I2)
  4118  		[8]*argField{ap_Reg_8_11, ap_ImmSigned32_16_47}},
  4119  	{OCRK, 0xffff000000000000, 0xb975000000000000, 0xf0000000000, // OR WITH COMPLEMENT (32) (OCRK R1,R2,R3)
  4120  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4121  	{OCGRK, 0xffff000000000000, 0xb965000000000000, 0xf0000000000, // OR WITH COMPLEMENT (64) (OCGRK R1,R2,R3)
  4122  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4123  	{PACK, 0xff00000000000000, 0xf200000000000000, 0x0, // PACK (PACK D1(L1,B1),D2(L2,B2))
  4124  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_12_15, ap_BaseReg_32_35}},
  4125  	{PKA, 0xff00000000000000, 0xe900000000000000, 0x0, // PACK ASCII (PKA D1(B1),D2(L2,B2))
  4126  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_8_15, ap_BaseReg_32_35}},
  4127  	{PKU, 0xff00000000000000, 0xe100000000000000, 0x0, // PACK UNICODE (PKU D1(B1),D2(L2,B2))
  4128  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_8_15, ap_BaseReg_32_35}},
  4129  	{PGIN, 0xffff000000000000, 0xb22e000000000000, 0xff0000000000, // PAGE IN (PGIN R1,R2)
  4130  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4131  	{PGOUT, 0xffff000000000000, 0xb22f000000000000, 0xff0000000000, // PAGE OUT (PGOUT R1,R2)
  4132  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4133  	{PCC, 0xffff000000000000, 0xb92c000000000000, 0xffff00000000, // PERFORM CRYPTOGRAPHIC COMPUTATION (PCC)
  4134  		[8]*argField{}},
  4135  	{PCKMO, 0xffff000000000000, 0xb928000000000000, 0xffff00000000, // PERFORM CRYPTOGRAPHIC KEY MGMT. OPERATIONS (PCKMO)
  4136  		[8]*argField{}},
  4137  	{PFPO, 0xffff000000000000, 0x10a000000000000, 0x0, // PERFORM FLOATING-POINT OPERATION (PFPO)
  4138  		[8]*argField{}},
  4139  	{PFMF, 0xffff000000000000, 0xb9af000000000000, 0xff0000000000, // PERFORM FRAME MANAGEMENT FUNCTION (PFMF R1,R2)
  4140  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4141  	{PLO, 0xff00000000000000, 0xee00000000000000, 0x0, // PERFORM LOCKED OPERATION (PLO R1,D2(B2),R3,D4(B4))
  4142  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_Reg_12_15, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  4143  	{PPA, 0xffff000000000000, 0xb2e8000000000000, 0xf0000000000, // PERFORM PROCESSOR ASSIST (PPA R1,R2,M3)
  4144  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  4145  	{PRNO, 0xffff000000000000, 0xb93c000000000000, 0xff0000000000, // PERFORM RANDOM NUMBER OPERATION (PRNO R1,R2)
  4146  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4147  	{PTFF, 0xffff000000000000, 0x104000000000000, 0x0, // PERFORM TIMING FACILITY FUNCTION (PTFF)
  4148  		[8]*argField{}},
  4149  	{PTF, 0xffff000000000000, 0xb9a2000000000000, 0xff0f00000000, // PERFORM TOPOLOGY FUNCTION (PTF R1)
  4150  		[8]*argField{ap_Reg_24_27}},
  4151  	{POPCNT, 0xffff000000000000, 0xb9e1000000000000, 0xf0000000000, // POPULATION COUNT (POPCNT R1,R2,M3)
  4152  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  4153  	{PFD, 0xff00000000ff0000, 0xe300000000360000, 0x0, // PREFETCH DATA (PFD M1,D2(X2,B2))
  4154  		[8]*argField{ap_Mask_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4155  	{PFDRL, 0xff0f000000000000, 0xc602000000000000, 0x0, // PREFETCH DATA RELATIVE LONG (PFDRL M1,RI2)
  4156  		[8]*argField{ap_Mask_8_11, ap_RegImSigned32_16_47}},
  4157  	{PC, 0xffff000000000000, 0xb218000000000000, 0x0, // PROGRAM CALL (PC D2(B2))
  4158  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4159  	{PR, 0xffff000000000000, 0x101000000000000, 0x0, // PROGRAM RETURN (PR)
  4160  		[8]*argField{}},
  4161  	{PT, 0xffff000000000000, 0xb228000000000000, 0xff0000000000, // PROGRAM TRANSFER (PT R1,R2)
  4162  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4163  	{PTI, 0xffff000000000000, 0xb99e000000000000, 0xff0000000000, // PROGRAM TRANSFER WITH INSTANCE (PTI R1,R2)
  4164  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4165  	{PALB, 0xffff000000000000, 0xb248000000000000, 0xffff00000000, // PURGE ALB (PALB)
  4166  		[8]*argField{}},
  4167  	{PTLB, 0xffff000000000000, 0xb20d000000000000, 0xffff00000000, // PURGE TLB (PTLB)
  4168  		[8]*argField{}},
  4169  	{QAXTR, 0xffff000000000000, 0xb3fd000000000000, 0x0, // QUANTIZE (extended DFP) (QAXTR R1,R3,R2,M4)
  4170  		[8]*argField{ap_FPReg_24_27, ap_FPReg_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  4171  	{QADTR, 0xffff000000000000, 0xb3f5000000000000, 0x0, // QUANTIZE (long DFP) (QADTR R1,R3,R2,M4)
  4172  		[8]*argField{ap_FPReg_24_27, ap_FPReg_16_19, ap_FPReg_28_31, ap_Mask_20_23}},
  4173  	{QPACI, 0xffff000000000000, 0xb28f000000000000, 0x0, // QUERY PROCESSOR ACTIVITY COUNTER INFORMATION (QPACI D2(B2))
  4174  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4175  	{RRXTR, 0xffff000000000000, 0xb3ff000000000000, 0x0, // REROUND (extended DFP) (RRXTR R1,R3,R2,M4)
  4176  		[8]*argField{ap_FPReg_24_27, ap_FPReg_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  4177  	{RRDTR, 0xffff000000000000, 0xb3f7000000000000, 0x0, // REROUND (long DFP) (RRDTR R1,R3,R2,M4)
  4178  		[8]*argField{ap_FPReg_24_27, ap_FPReg_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  4179  	{RCHP, 0xffff000000000000, 0xb23b000000000000, 0xffff00000000, // RESET CHANNEL PATH (RCHP)
  4180  		[8]*argField{}},
  4181  	{RDP, 0xffff000000000000, 0xb98b000000000000, 0x0, // RESET DAT PROTECTION (RDP R1,R3,R2,M4)
  4182  		[8]*argField{ap_Reg_24_27, ap_Reg_16_19, ap_Reg_28_31, ap_Mask_20_23}},
  4183  	{RRBE, 0xffff000000000000, 0xb22a000000000000, 0xff0000000000, // RESET REFERENCE BIT EXTENDED (RRBE R1,R2)
  4184  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4185  	{RRBM, 0xffff000000000000, 0xb9ae000000000000, 0xff0000000000, // RESET REFERENCE BITS MULTIPLE (RRBM R1,R2)
  4186  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4187  	{RP, 0xffff000000000000, 0xb277000000000000, 0x0, // RESUME PROGRAM (RP D2(B2))
  4188  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4189  	{RSCH, 0xffff000000000000, 0xb238000000000000, 0xffff00000000, // RESUME SUBCHANNEL (RSCH)
  4190  		[8]*argField{}},
  4191  	{RLL, 0xff00000000ff0000, 0xeb000000001d0000, 0x0, // ROTATE LEFT SINGLE LOGICAL (32) (RLL R1,R3,D2(B2))
  4192  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4193  	{RLLG, 0xff00000000ff0000, 0xeb000000001c0000, 0x0, // ROTATE LEFT SINGLE LOGICAL (64) (RLLG R1,R3,D2(B2))
  4194  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4195  	{RNSBG, 0xff00000000ff0000, 0xec00000000540000, 0x0, // ROTATE THEN AND SELECTED BITS (64) (RNSBG R1,R2,I3,I4,I5)
  4196  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmUnsigned_16_23, ap_ImmUnsigned_24_31, ap_ImmUnsigned_32_39}},
  4197  	{RXSBG, 0xff00000000ff0000, 0xec00000000570000, 0x0, // ROTATETHENEXCLUSIVEORSELECT.BITS(64) (RXSBG R1,R2,I3,I4,I5)
  4198  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmUnsigned_16_23, ap_ImmUnsigned_24_31, ap_ImmUnsigned_32_39}},
  4199  	{RISBG, 0xff00000000ff0000, 0xec00000000550000, 0x0, // ROTATE THEN INSERT SELECTED BITS (64) (RISBG R1,R2,I3,I4,I5)
  4200  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmUnsigned_16_23, ap_ImmUnsigned_24_31, ap_ImmUnsigned_32_39}},
  4201  	{RISBGN, 0xff00000000ff0000, 0xec00000000590000, 0x0, // ROTATE THEN INSERT SELECTED BITS (64) (RISBGN R1,R2,I3,I4,I5)
  4202  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmUnsigned_16_23, ap_ImmUnsigned_24_31, ap_ImmUnsigned_32_39}},
  4203  	{RISBHG, 0xff00000000ff0000, 0xec000000005d0000, 0x0, // ROTATE THEN INSERT SELECTED BITS HIGH(64) (RISBHG R1,R2,I3,I4,I5)
  4204  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmUnsigned_16_23, ap_ImmUnsigned_24_31, ap_ImmUnsigned_32_39}},
  4205  	{RISBLG, 0xff00000000ff0000, 0xec00000000510000, 0x0, // ROTATE THEN INSERT SELECTED BITS LOW (64) (RISBLG R1,R2,I3,I4,I5)
  4206  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmUnsigned_16_23, ap_ImmUnsigned_24_31, ap_ImmUnsigned_32_39}},
  4207  	{ROSBG, 0xff00000000ff0000, 0xec00000000560000, 0x0, // ROTATE THEN OR SELECTED BITS (64) (ROSBG R1,R2,I3,I4,I5)
  4208  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_ImmUnsigned_16_23, ap_ImmUnsigned_24_31, ap_ImmUnsigned_32_39}},
  4209  	{SRST, 0xffff000000000000, 0xb25e000000000000, 0xff0000000000, // SEARCH STRING (SRST R1,R2)
  4210  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4211  	{SRSTU, 0xffff000000000000, 0xb9be000000000000, 0xff0000000000, // SEARCH STRING UNICODE (SRSTU R1,R2)
  4212  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4213  	{SELR, 0xffff000000000000, 0xb9f0000000000000, 0x0, // SELECT (32) (SELR R1,R2,R3,M4)
  4214  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19, ap_Mask_20_23}},
  4215  	{SELGR, 0xffff000000000000, 0xb9e3000000000000, 0x0, // SELECT (64) (SELGR R1,R2,R3,M4)
  4216  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19, ap_Mask_20_23}},
  4217  	{SELFHR, 0xffff000000000000, 0xb9c0000000000000, 0x0, // SELECT HIGH (32) (SELFHR R1,R2,R3,M4)
  4218  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19, ap_Mask_20_23}},
  4219  	{SAR, 0xffff000000000000, 0xb24e000000000000, 0xff0000000000, // SET ACCESS (SAR R1,R2)
  4220  		[8]*argField{ap_ACReg_24_27, ap_Reg_28_31}},
  4221  	{SAL, 0xffff000000000000, 0xb237000000000000, 0xffff00000000, // SET ADDRESS LIMIT (SAL)
  4222  		[8]*argField{}},
  4223  	{SAC, 0xffff000000000000, 0xb219000000000000, 0x0, // SET ADDRESS SPACE CONTROL (SAC D2(B2))
  4224  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4225  	{SACF, 0xffff000000000000, 0xb279000000000000, 0x0, // SET ADDRESS SPACE CONTROL FAST (SACF D2(B2))
  4226  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4227  	{SAM24, 0xffff000000000000, 0x10c000000000000, 0x0, // SET ADDRESSING MODE (24) (SAM24)
  4228  		[8]*argField{}},
  4229  	{SAM31, 0xffff000000000000, 0x10d000000000000, 0x0, // SET ADDRESSING MODE (31) (SAM31)
  4230  		[8]*argField{}},
  4231  	{SAM64, 0xffff000000000000, 0x10e000000000000, 0x0, // SET ADDRESSING MODE (64) (SAM64)
  4232  		[8]*argField{}},
  4233  	{SRNM, 0xffff000000000000, 0xb299000000000000, 0x0, // SET BFP ROUNDING MODE (2 bit) (SRNM D2(B2))
  4234  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4235  	{SRNMB, 0xffff000000000000, 0xb2b8000000000000, 0x0, // SET BFP ROUNDING MODE (3 bit) (SRNMB D2(B2))
  4236  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4237  	{SCHM, 0xffff000000000000, 0xb23c000000000000, 0xffff00000000, // SET CHANNEL MONITOR (SCHM)
  4238  		[8]*argField{}},
  4239  	{SCK, 0xffff000000000000, 0xb204000000000000, 0x0, // SET CLOCK (SCK D2(B2))
  4240  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4241  	{SCKC, 0xffff000000000000, 0xb206000000000000, 0x0, // SET CLOCK COMPARATOR (SCKC D2(B2))
  4242  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4243  	{SCKPF, 0xffff000000000000, 0x107000000000000, 0x0, // SET CLOCK PROGRAMMABLE FIELD (SCKPF)
  4244  		[8]*argField{}},
  4245  	{SPT, 0xffff000000000000, 0xb208000000000000, 0x0, // SET CPU TIMER (SPT D2(B2))
  4246  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4247  	{SRNMT, 0xffff000000000000, 0xb2b9000000000000, 0x0, // SET DFP ROUNDING MODE (SRNMT D2(B2))
  4248  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4249  	{SFPC, 0xffff000000000000, 0xb384000000000000, 0xff0f00000000, // SET FPC (SFPC R1)
  4250  		[8]*argField{ap_Reg_24_27}},
  4251  	{SFASR, 0xffff000000000000, 0xb385000000000000, 0xff0f00000000, // SET FPC AND SIGNAL (SFASR R1)
  4252  		[8]*argField{ap_Reg_24_27}},
  4253  	{SPX, 0xffff000000000000, 0xb210000000000000, 0x0, // SET PREFIX (SPX D2(B2))
  4254  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4255  	{SPM, 0xff00000000000000, 0x400000000000000, 0xf000000000000, // SET PROGRAM MASK (SPM R1)
  4256  		[8]*argField{ap_Reg_8_11}},
  4257  	{SPKA, 0xffff000000000000, 0xb20a000000000000, 0x0, // SET PSW KEY FROM ADDRESS (SPKA D2(B2))
  4258  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4259  	{SSAR, 0xffff000000000000, 0xb225000000000000, 0xff0f00000000, // SET SECONDARY ASN (SSAR R1)
  4260  		[8]*argField{ap_Reg_24_27}},
  4261  	{SSAIR, 0xffff000000000000, 0xb99f000000000000, 0xff0f00000000, // SET SECONDARY ASN WITH INSTANCE (SSAIR R1)
  4262  		[8]*argField{ap_Reg_24_27}},
  4263  	{SSKE, 0xffff000000000000, 0xb22b000000000000, 0xf0000000000, // SET STORAGE KEY EXTENDED (SSKE R1,R2,M3)
  4264  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  4265  	{SSM, 0xff00000000000000, 0x8000000000000000, 0x0, // SET SYSTEM MASK (SSM D1(B1))
  4266  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4267  	{SRP, 0xff00000000000000, 0xf000000000000000, 0x0, // SHIFT AND ROUND DECIMAL (SRP D1(L1,B1),D2(B2),I3)
  4268  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35, ap_ImmUnsigned_12_15}},
  4269  	{SLDA, 0xff00000000000000, 0x8f00000000000000, 0xf000000000000, // SHIFT LEFT DOUBLE (64) (SLDA R1,D2(B2))
  4270  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4271  	{SLDL, 0xff00000000000000, 0x8d00000000000000, 0xf000000000000, // SHIFT LEFT DOUBLE LOGICAL (64) (SLDL R1,D2(B2))
  4272  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4273  	{SLA, 0xff00000000000000, 0x8b00000000000000, 0xf000000000000, // SHIFT LEFT SINGLE (32) (SLA R1,D2(B2))
  4274  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4275  	{SLAK, 0xff00000000ff0000, 0xeb00000000dd0000, 0x0, // SHIFT LEFT SINGLE (32) (SLAK R1,R3,D2(B2))
  4276  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4277  	{SLAG, 0xff00000000ff0000, 0xeb000000000b0000, 0x0, // SHIFT LEFT SINGLE (64) (SLAG R1,R3,D2(B2))
  4278  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4279  	{SLL, 0xff00000000000000, 0x8900000000000000, 0xf000000000000, // SHIFT LEFT SINGLE LOGICAL (32) (SLL R1,D2(B2))
  4280  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4281  	{SLLK, 0xff00000000ff0000, 0xeb00000000df0000, 0x0, // SHIFT LEFT SINGLE LOGICAL (32) (SLLK R1,R3,D2(B2))
  4282  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4283  	{SLLG, 0xff00000000ff0000, 0xeb000000000d0000, 0x0, // SHIFT LEFT SINGLE LOGICAL (64) (SLLG R1,R3,D2(B2))
  4284  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4285  	{SRDA, 0xff00000000000000, 0x8e00000000000000, 0xf000000000000, // SHIFT RIGHT DOUBLE (64) (SRDA R1,D2(B2))
  4286  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4287  	{SRDL, 0xff00000000000000, 0x8c00000000000000, 0xf000000000000, // SHIFT RIGHT DOUBLE LOGICAL (64) (SRDL R1,D2(B2))
  4288  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4289  	{SRA, 0xff00000000000000, 0x8a00000000000000, 0xf000000000000, // SHIFT RIGHT SINGLE (32) (SRA R1,D2(B2))
  4290  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4291  	{SRAK, 0xff00000000ff0000, 0xeb00000000dc0000, 0x0, // SHIFT RIGHT SINGLE (32) (SRAK R1,R3,D2(B2))
  4292  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4293  	{SRAG, 0xff00000000ff0000, 0xeb000000000a0000, 0x0, // SHIFT RIGHT SINGLE (64) (SRAG R1,R3,D2(B2))
  4294  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4295  	{SRL, 0xff00000000000000, 0x8800000000000000, 0xf000000000000, // SHIFT RIGHT SINGLE LOGICAL (32) (SRL R1,D2(B2))
  4296  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4297  	{SRLK, 0xff00000000ff0000, 0xeb00000000de0000, 0x0, // SHIFT RIGHT SINGLE LOGICAL (32) (SRLK R1,R3,D2(B2))
  4298  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4299  	{SRLG, 0xff00000000ff0000, 0xeb000000000c0000, 0x0, // SHIFT RIGHT SINGLE LOGICAL (64) (SRLG R1,R3,D2(B2))
  4300  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4301  	{SLXT, 0xff00000000ff0000, 0xed00000000480000, 0xf000000, // SHIFT SIGNIFICAND LEFT (extended DFP) (SLXT R1,R3,D2(X2,B2))
  4302  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4303  	{SLDT, 0xff00000000ff0000, 0xed00000000400000, 0xf000000, // SHIFT SIGNIFICAND LEFT (long DFP) (SLDT R1,R3,D2(X2,B2))
  4304  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4305  	{SRXT, 0xff00000000ff0000, 0xed00000000490000, 0xf000000, // SHIFT SIGNIFICAND RIGHT (extended DFP) (SRXT R1,R3,D2(X2,B2))
  4306  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4307  	{SRDT, 0xff00000000ff0000, 0xed00000000410000, 0xf000000, // SHIFT SIGNIFICAND RIGHT (long DFP) (SRDT R1,R3,D2(X2,B2))
  4308  		[8]*argField{ap_FPReg_32_35, ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4309  	{SIGP, 0xff00000000000000, 0xae00000000000000, 0x0, // SIGNAL PROCESSOR (SIGP R1,R3,D2(B2))
  4310  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4311  	{SORTL, 0xffff000000000000, 0xb938000000000000, 0xff0000000000, // SORT LISTS (SORTL R1,R2)
  4312  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4313  	{SQXBR, 0xffff000000000000, 0xb316000000000000, 0xff0000000000, // SQUARE ROOT (extended BFP) (SQXBR R1,R2)
  4314  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  4315  	{SQXR, 0xffff000000000000, 0xb336000000000000, 0xff0000000000, // SQUARE ROOT (extended HFP) (SQXR R1,R2)
  4316  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  4317  	{SQDB, 0xff00000000ff0000, 0xed00000000150000, 0xff000000, // SQUARE ROOT (long BFP) (SQDB R1,D2(X2,B2))
  4318  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4319  	{SQDBR, 0xffff000000000000, 0xb315000000000000, 0xff0000000000, // SQUARE ROOT (long BFP) (SQDBR R1,R2)
  4320  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  4321  	{SQD, 0xff00000000ff0000, 0xed00000000350000, 0xff000000, // SQUARE ROOT (long HFP) (SQD R1,D2(X2,B2))
  4322  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4323  	{SQDR, 0xffff000000000000, 0xb244000000000000, 0xff0000000000, // SQUARE ROOT (long HFP) (SQDR R1,R2)
  4324  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  4325  	{SQEB, 0xff00000000ff0000, 0xed00000000140000, 0xff000000, // SQUARE ROOT (short BFP) (SQEB R1,D2(X2,B2))
  4326  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4327  	{SQEBR, 0xffff000000000000, 0xb314000000000000, 0xff0000000000, // SQUARE ROOT (short BFP) (SQEBR R1,R2)
  4328  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  4329  	{SQE, 0xff00000000ff0000, 0xed00000000340000, 0xff000000, // SQUARE ROOT (short HFP) (SQE R1,D2(X2,B2))
  4330  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4331  	{SQER, 0xffff000000000000, 0xb245000000000000, 0xff0000000000, // SQUARE ROOT (short HFP) (SQER R1,R2)
  4332  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  4333  	{SSCH, 0xffff000000000000, 0xb233000000000000, 0x0, // START SUBCHANNEL (SSCH D2(B2))
  4334  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4335  	{ST, 0xff00000000000000, 0x5000000000000000, 0x0, // STORE (32) (ST R1,D2(X2,B2))
  4336  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4337  	{STY, 0xff00000000ff0000, 0xe300000000500000, 0x0, // STORE (32) (STY R1,D2(X2,B2))
  4338  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4339  	{STG, 0xff00000000ff0000, 0xe300000000240000, 0x0, // STORE (64) (STG R1,D2(X2,B2))
  4340  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4341  	{STD, 0xff00000000000000, 0x6000000000000000, 0x0, // STORE (long) (STD R1,D2(X2,B2))
  4342  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4343  	{STDY, 0xff00000000ff0000, 0xed00000000670000, 0x0, // STORE (long) (STDY R1,D2(X2,B2))
  4344  		[8]*argField{ap_FPReg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4345  	{STE, 0xff00000000000000, 0x7000000000000000, 0x0, // STORE (short) (STE R1,D2(X2,B2))
  4346  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4347  	{STEY, 0xff00000000ff0000, 0xed00000000660000, 0x0, // STORE (short) (STEY R1,D2(X2,B2))
  4348  		[8]*argField{ap_FPReg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4349  	{STAM, 0xff00000000000000, 0x9b00000000000000, 0x0, // STORE ACCESS MULTIPLE 7-389 (STAM R1,R3,D2(B2))
  4350  		[8]*argField{ap_ACReg_8_11, ap_ACReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4351  	{STAMY, 0xff00000000ff0000, 0xeb000000009b0000, 0x0, // STORE ACCESS MULTIPLE 7-389 (STAMY R1,R3,D2(B2))
  4352  		[8]*argField{ap_ACReg_8_11, ap_ACReg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4353  	{STBEAR, 0xffff000000000000, 0xb201000000000000, 0x0, // STORE BEAR (STBEAR D2(B2))
  4354  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4355  	{STCPS, 0xffff000000000000, 0xb23a000000000000, 0x0, // STORE CHANNEL PATH STATUS (STCPS D2(B2))
  4356  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4357  	{STCRW, 0xffff000000000000, 0xb239000000000000, 0x0, // STORE CHANNEL REPORT WORD (STCRW D2(B2))
  4358  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4359  	{STC, 0xff00000000000000, 0x4200000000000000, 0x0, // STORE CHARACTER (STC R1,D2(X2,B2))
  4360  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4361  	{STCY, 0xff00000000ff0000, 0xe300000000720000, 0x0, // STORE CHARACTER (STCY R1,D2(X2,B2))
  4362  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4363  	{STCH, 0xff00000000ff0000, 0xe300000000c30000, 0x0, // STORE CHARACTER HIGH (8) (STCH R1,D2(X2,B2))
  4364  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4365  	{STCMH, 0xff00000000ff0000, 0xeb000000002c0000, 0x0, // STORE CHARACTERS UNDER MASK (high) (STCMH R1,M3,D2(B2))
  4366  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4367  	{STCM, 0xff00000000000000, 0xbe00000000000000, 0x0, // STORE CHARACTERS UNDER MASK (low) (STCM R1,M3,D2(B2))
  4368  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4369  	{STCMY, 0xff00000000ff0000, 0xeb000000002d0000, 0x0, // STORE CHARACTERS UNDER MASK (low) (STCMY R1,M3,D2(B2))
  4370  		[8]*argField{ap_Reg_8_11, ap_Mask_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4371  	{STCK, 0xffff000000000000, 0xb205000000000000, 0x0, // STORE CLOCK (STCK D2(B2))
  4372  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4373  	{STCKC, 0xffff000000000000, 0xb207000000000000, 0x0, // STORE CLOCK COMPARATOR (STCKC D2(B2))
  4374  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4375  	{STCKE, 0xffff000000000000, 0xb278000000000000, 0x0, // STORE CLOCK EXTENDED (STCKE D2(B2))
  4376  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4377  	{STCKF, 0xffff000000000000, 0xb27c000000000000, 0x0, // STORE CLOCK FAST (STCKF D2(B2))
  4378  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4379  	{STCTL, 0xff00000000000000, 0xb600000000000000, 0x0, // STORE CONTROL (32) (STCTL R1,R3,D2(B2))
  4380  		[8]*argField{ap_CReg_8_11, ap_CReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4381  	{STCTG, 0xff00000000ff0000, 0xeb00000000250000, 0x0, // STORE CONTROL (64) (STCTG R1,R3,D2(B2))
  4382  		[8]*argField{ap_CReg_8_11, ap_CReg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4383  	{STAP, 0xffff000000000000, 0xb212000000000000, 0x0, // STORE CPU ADDRESS (STAP D2(B2))
  4384  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4385  	{STIDP, 0xffff000000000000, 0xb202000000000000, 0x0, // STORE CPU ID (STIDP D2(B2))
  4386  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4387  	{STPT, 0xffff000000000000, 0xb209000000000000, 0x0, // STORE CPU TIMER (STPT D2(B2))
  4388  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4389  	{STFL, 0xffff000000000000, 0xb2b1000000000000, 0x0, // STORE FACILITY LIST (STFL D2(B2))
  4390  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4391  	{STFLE, 0xffff000000000000, 0xb2b0000000000000, 0x0, // STORE FACILITY LIST EXTENDED (STFLE D2(B2))
  4392  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4393  	{STFPC, 0xffff000000000000, 0xb29c000000000000, 0x0, // STORE FPC (STFPC D2(B2))
  4394  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4395  	{STGSC, 0xff00000000ff0000, 0xe300000000490000, 0x0, // STORE GUARDED STORAGE CONTROLS (STGSC R1,D2(X2,B2))
  4396  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4397  	{STH, 0xff00000000000000, 0x4000000000000000, 0x0, // STORE HALFWORD (16) (STH R1,D2(X2,B2))
  4398  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4399  	{STHY, 0xff00000000ff0000, 0xe300000000700000, 0x0, // STORE HALFWORD (16) (STHY R1,D2(X2,B2))
  4400  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4401  	{STHH, 0xff00000000ff0000, 0xe300000000c70000, 0x0, // STORE HALFWORD HIGH (16) (STHH R1,D2(X2,B2))
  4402  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4403  	{STHRL, 0xff0f000000000000, 0xc407000000000000, 0x0, // STORE HALFWORD RELATIVE LONG (16) (STHRL R1,RI2)
  4404  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  4405  	{STFH, 0xff00000000ff0000, 0xe300000000cb0000, 0x0, // STORE HIGH (32) (STFH R1,D2(X2,B2))
  4406  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4407  	{STOCFH, 0xff00000000ff0000, 0xeb00000000e10000, 0x0, // STORE HIGH ON CONDITION (STOCFH R1,D2(B2),M3)
  4408  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_Mask_12_15}},
  4409  	{STM, 0xff00000000000000, 0x9000000000000000, 0x0, // STORE MULTIPLE (32) (STM R1,R3,D2(B2))
  4410  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4411  	{STMY, 0xff00000000ff0000, 0xeb00000000900000, 0x0, // STORE MULTIPLE (32) (STMY R1,R3,D2(B2))
  4412  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4413  	{STMG, 0xff00000000ff0000, 0xeb00000000240000, 0x0, // STORE MULTIPLE (64) (STMG R1,R3,D2(B2))
  4414  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4415  	{STMH, 0xff00000000ff0000, 0xeb00000000260000, 0x0, // STORE MULTIPLE HIGH (32) (STMH R1,R3,D2(B2))
  4416  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4417  	{STOC, 0xff00000000ff0000, 0xeb00000000f30000, 0x0, // STORE ON CONDITION (32) (STOC R1,D2(B2),M3)
  4418  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_Mask_12_15}},
  4419  	{STOCG, 0xff00000000ff0000, 0xeb00000000e30000, 0x0, // STORE ON CONDITION (64) (STOCG R1,D2(B2),M3)
  4420  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_Mask_12_15}},
  4421  	{STPQ, 0xff00000000ff0000, 0xe3000000008e0000, 0x0, // STORE PAIR TO QUADWORD (STPQ R1,D2(X2,B2))
  4422  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4423  	{STPX, 0xffff000000000000, 0xb211000000000000, 0x0, // STORE PREFIX (STPX D2(B2))
  4424  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4425  	{STRAG, 0xffff000000000000, 0xe502000000000000, 0x0, // STORE REAL ADDRESS (STRAG D1(B1),D2(B2))
  4426  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  4427  	{STRL, 0xff0f000000000000, 0xc40f000000000000, 0x0, // STORE RELATIVE LONG (32) (STRL R1,RI2)
  4428  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  4429  	{STGRL, 0xff0f000000000000, 0xc40b000000000000, 0x0, // STORE RELATIVE LONG (64) (STGRL R1,RI2)
  4430  		[8]*argField{ap_Reg_8_11, ap_RegImSigned32_16_47}},
  4431  	{STRVH, 0xff00000000ff0000, 0xe3000000003f0000, 0x0, // STORE REVERSED (16) (STRVH R1,D2(X2,B2))
  4432  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4433  	{STRV, 0xff00000000ff0000, 0xe3000000003e0000, 0x0, // STORE REVERSED (32) (STRV R1,D2(X2,B2))
  4434  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4435  	{STRVG, 0xff00000000ff0000, 0xe3000000002f0000, 0x0, // STORE REVERSED (64) (STRVG R1,D2(X2,B2))
  4436  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4437  	{STSCH, 0xffff000000000000, 0xb234000000000000, 0x0, // STORE SUBCHANNEL (STSCH D2(B2))
  4438  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4439  	{STSI, 0xffff000000000000, 0xb27d000000000000, 0x0, // STORE SYSTEM INFORMATION (STSI D2(B2))
  4440  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4441  	{STNSM, 0xff00000000000000, 0xac00000000000000, 0x0, // STORE THEN AND SYSTEM MASK (STNSM D1(B1),I2)
  4442  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_8_15}},
  4443  	{STOSM, 0xff00000000000000, 0xad00000000000000, 0x0, // STORE THEN OR SYSTEM MASK (STOSM D1(B1),I2)
  4444  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_8_15}},
  4445  	{STURA, 0xffff000000000000, 0xb246000000000000, 0xff0000000000, // STORE USING REAL ADDRESS (32) (STURA R1,R2)
  4446  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4447  	{STURG, 0xffff000000000000, 0xb925000000000000, 0xff0000000000, // STORE USING REAL ADDRESS (64) (STURG R1,R2)
  4448  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4449  	{S, 0xff00000000000000, 0x5b00000000000000, 0x0, // SUBTRACT (32) (S R1,D2(X2,B2))
  4450  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4451  	{SR, 0xff00000000000000, 0x1b00000000000000, 0x0, // SUBTRACT (32) (SR R1,R2)
  4452  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  4453  	{SRK, 0xffff000000000000, 0xb9f9000000000000, 0xf0000000000, // SUBTRACT (32) (SRK R1,R2,R3)
  4454  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4455  	{SY, 0xff00000000ff0000, 0xe3000000005b0000, 0x0, // SUBTRACT (32) (SY R1,D2(X2,B2))
  4456  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4457  	{SG, 0xff00000000ff0000, 0xe300000000090000, 0x0, // SUBTRACT (64) (SG R1,D2(X2,B2))
  4458  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4459  	{SGR, 0xffff000000000000, 0xb909000000000000, 0xff0000000000, // SUBTRACT (64) (SGR R1,R2)
  4460  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4461  	{SGRK, 0xffff000000000000, 0xb9e9000000000000, 0xf0000000000, // SUBTRACT (64) (SGRK R1,R2,R3)
  4462  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4463  	{SGF, 0xff00000000ff0000, 0xe300000000190000, 0x0, // SUBTRACT (64←32) (SGF R1,D2(X2,B2))
  4464  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4465  	{SGFR, 0xffff000000000000, 0xb919000000000000, 0xff0000000000, // SUBTRACT (64→32) (SGFR R1,R2)
  4466  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4467  	{SXBR, 0xffff000000000000, 0xb34b000000000000, 0xff0000000000, // SUBTRACT (extended BFP) (SXBR R1,R2)
  4468  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  4469  	{SXTR, 0xffff000000000000, 0xb3db000000000000, 0xf0000000000, // SUBTRACT (extended DFP) (SXTR R1,R2,R3)
  4470  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19}},
  4471  	{SXTRA, 0xffff000000000000, 0xb3db000000000000, 0x0, // SUBTRACT (extended DFP) (SXTRA R1,R2,R3,M4)
  4472  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19, ap_Mask_20_23}},
  4473  	{SDB, 0xff00000000ff0000, 0xed000000001b0000, 0xff000000, // SUBTRACT (long BFP) (SDB R1,D2(X2,B2))
  4474  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4475  	{SDBR, 0xffff000000000000, 0xb31b000000000000, 0xff0000000000, // SUBTRACT (long BFP) (SDBR R1,R2)
  4476  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  4477  	{SDTR, 0xffff000000000000, 0xb3d3000000000000, 0xf0000000000, // SUBTRACT (long DFP) (SDTR R1,R2,R3)
  4478  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19}},
  4479  	{SDTRA, 0xffff000000000000, 0xb3d3000000000000, 0x0, // SUBTRACT (long DFP) (SDTRA R1,R2,R3,M4)
  4480  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31, ap_FPReg_16_19, ap_Mask_20_23}},
  4481  	{SEB, 0xff00000000ff0000, 0xed000000000b0000, 0xff000000, // SUBTRACT (short BFP) (SEB R1,D2(X2,B2))
  4482  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4483  	{SEBR, 0xffff000000000000, 0xb30b000000000000, 0xff0000000000, // SUBTRACT (short BFP) (SEBR R1,R2)
  4484  		[8]*argField{ap_FPReg_24_27, ap_FPReg_28_31}},
  4485  	{SP, 0xff00000000000000, 0xfb00000000000000, 0x0, // SUBTRACT DECIMAL (SP D1(L1,B1),D2(L2,B2))
  4486  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_12_15, ap_BaseReg_32_35}},
  4487  	{SH, 0xff00000000000000, 0x4b00000000000000, 0x0, // SUBTRACT HALFWORD (32←16) (SH R1,D2(X2,B2))
  4488  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4489  	{SHY, 0xff00000000ff0000, 0xe3000000007b0000, 0x0, // SUBTRACT HALFWORD (32→16) (SHY R1,D2(X2,B2))
  4490  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4491  	{SGH, 0xff00000000ff0000, 0xe300000000390000, 0x0, // SUBTRACT HALFWORD (64→16) (SGH R1,D2(X2,B2))
  4492  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4493  	{SHHHR, 0xffff000000000000, 0xb9c9000000000000, 0xf0000000000, // SUBTRACT HIGH (32) (SHHHR R1,R2,R3)
  4494  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4495  	{SHHLR, 0xffff000000000000, 0xb9d9000000000000, 0xf0000000000, // SUBTRACT HIGH (32) (SHHLR R1,R2,R3)
  4496  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4497  	{SL, 0xff00000000000000, 0x5f00000000000000, 0x0, // SUBTRACT LOGICAL (32) (SL R1,D2(X2,B2))
  4498  		[8]*argField{ap_Reg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4499  	{SLR, 0xff00000000000000, 0x1f00000000000000, 0x0, // SUBTRACT LOGICAL (32) (SLR R1,R2)
  4500  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15}},
  4501  	{SLRK, 0xffff000000000000, 0xb9fb000000000000, 0xf0000000000, // SUBTRACT LOGICAL (32) (SLRK R1,R2,R3)
  4502  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4503  	{SLY, 0xff00000000ff0000, 0xe3000000005f0000, 0x0, // SUBTRACT LOGICAL (32) (SLY R1,D2(X2,B2))
  4504  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4505  	{SLG, 0xff00000000ff0000, 0xe3000000000b0000, 0x0, // SUBTRACT LOGICAL (64) (SLG R1,D2(X2,B2))
  4506  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4507  	{SLGR, 0xffff000000000000, 0xb90b000000000000, 0xff0000000000, // SUBTRACT LOGICAL (64) (SLGR R1,R2)
  4508  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4509  	{SLGRK, 0xffff000000000000, 0xb9eb000000000000, 0xf0000000000, // SUBTRACT LOGICAL (64) (SLGRK R1,R2,R3)
  4510  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4511  	{SLGF, 0xff00000000ff0000, 0xe3000000001b0000, 0x0, // SUBTRACT LOGICAL (64←32) (SLGF R1,D2(X2,B2))
  4512  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4513  	{SLGFR, 0xffff000000000000, 0xb91b000000000000, 0xff0000000000, // SUBTRACT LOGICAL (64←32) (SLGFR R1,R2)
  4514  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4515  	{SLHHHR, 0xffff000000000000, 0xb9cb000000000000, 0xf0000000000, // SUBTRACT LOGICAL HIGH (32) (SLHHHR R1,R2,R3)
  4516  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4517  	{SLHHLR, 0xffff000000000000, 0xb9db000000000000, 0xf0000000000, // SUBTRACT LOGICAL HIGH (32) (SLHHLR R1,R2,R3)
  4518  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Reg_16_19}},
  4519  	{SLFI, 0xff0f000000000000, 0xc205000000000000, 0x0, // SUBTRACT LOGICAL IMMEDIATE (32) (SLFI R1,I2)
  4520  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  4521  	{SLGFI, 0xff0f000000000000, 0xc204000000000000, 0x0, // SUBTRACT LOGICAL IMMEDIATE (64→32) (SLGFI R1,I2)
  4522  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_47}},
  4523  	{SLB, 0xff00000000ff0000, 0xe300000000990000, 0x0, // SUBTRACT LOGICAL WITH BORROW (32) (SLB R1,D2(X2,B2))
  4524  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4525  	{SLBR, 0xffff000000000000, 0xb999000000000000, 0xff0000000000, // SUBTRACT LOGICAL WITH BORROW (32) (SLBR R1,R2)
  4526  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4527  	{SLBG, 0xff00000000ff0000, 0xe300000000890000, 0x0, // SUBTRACT LOGICAL WITH BORROW (64) (SLBG R1,D2(X2,B2))
  4528  		[8]*argField{ap_Reg_8_11, ap_DispSigned20_20_39, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4529  	{SLBGR, 0xffff000000000000, 0xb989000000000000, 0xff0000000000, // SUBTRACT LOGICAL WITH BORROW (64) (SLBGR R1,R2)
  4530  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4531  	{SXR, 0xff00000000000000, 0x3700000000000000, 0x0, // SUBTRACT NORMALIZED (extended HFP) (SXR R1,R2)
  4532  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  4533  	{SD, 0xff00000000000000, 0x6b00000000000000, 0x0, // SUBTRACT NORMALIZED (long HFP) (SD R1,D2(X2,B2))
  4534  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4535  	{SDR, 0xff00000000000000, 0x2b00000000000000, 0x0, // SUBTRACT NORMALIZED (long HFP) (SDR R1,R2)
  4536  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  4537  	{SE, 0xff00000000000000, 0x7b00000000000000, 0x0, // SUBTRACT NORMALIZED (short HFP) (SE R1,D2(X2,B2))
  4538  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4539  	{SER, 0xff00000000000000, 0x3b00000000000000, 0x0, // SUBTRACT NORMALIZED (short HFP) (SER R1,R2)
  4540  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  4541  	{SW, 0xff00000000000000, 0x6f00000000000000, 0x0, // SUBTRACT UNNORMALIZED (long HFP) (SW R1,D2(X2,B2))
  4542  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4543  	{SWR, 0xff00000000000000, 0x2f00000000000000, 0x0, // SUBTRACT UNNORMALIZED (long HFP) (SWR R1,R2)
  4544  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  4545  	{SU, 0xff00000000000000, 0x7f00000000000000, 0x0, // SUBTRACT UNNORMALIZED (short HFP) (SU R1,D2(X2,B2))
  4546  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4547  	{SUR, 0xff00000000000000, 0x3f00000000000000, 0x0, // SUBTRACT UNNORMALIZED (short HFP) (SUR R1,R2)
  4548  		[8]*argField{ap_FPReg_8_11, ap_FPReg_12_15}},
  4549  	{SVC, 0xff00000000000000, 0xa00000000000000, 0x0, // SUPERVISOR CALL (SVC I)
  4550  		[8]*argField{ap_ImmUnsigned_8_15}},
  4551  	{TAR, 0xffff000000000000, 0xb24c000000000000, 0xff0000000000, // TEST ACCESS (TAR R1,R2)
  4552  		[8]*argField{ap_ACReg_24_27, ap_Reg_28_31}},
  4553  	{TAM, 0xffff000000000000, 0x10b000000000000, 0x0, // TEST ADDRESSING MODE (TAM)
  4554  		[8]*argField{}},
  4555  	{TS, 0xff00000000000000, 0x9300000000000000, 0x0, // TEST AND SET (TS D1(B1))
  4556  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4557  	{TB, 0xffff000000000000, 0xb22c000000000000, 0xff0000000000, // TEST BLOCK (TB R1,R2)
  4558  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4559  	{TCXB, 0xff00000000ff0000, 0xed00000000120000, 0xff000000, // TEST DATA CLASS (extended BFP) (TCXB R1,D2(X2,B2))
  4560  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4561  	{TDCXT, 0xff00000000ff0000, 0xed00000000580000, 0xff000000, // TEST DATA CLASS (extended DFP) (TDCXT R1,D2(X2,B2))
  4562  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4563  	{TCDB, 0xff00000000ff0000, 0xed00000000110000, 0xff000000, // TEST DATA CLASS (long BFP) (TCDB R1,D2(X2,B2))
  4564  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4565  	{TDCDT, 0xff00000000ff0000, 0xed00000000540000, 0xff000000, // TEST DATA CLASS (long DFP) (TDCDT R1,D2(X2,B2))
  4566  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4567  	{TCEB, 0xff00000000ff0000, 0xed00000000100000, 0xff000000, // TEST DATA CLASS (short BFP) (TCEB R1,D2(X2,B2))
  4568  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4569  	{TDCET, 0xff00000000ff0000, 0xed00000000500000, 0xff000000, // TEST DATA CLASS (short DFP) (TDCET R1,D2(X2,B2))
  4570  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4571  	{TDGXT, 0xff00000000ff0000, 0xed00000000590000, 0xff000000, // TEST DATA GROUP (extended DFP) (TDGXT R1,D2(X2,B2))
  4572  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4573  	{TDGDT, 0xff00000000ff0000, 0xed00000000550000, 0xff000000, // TEST DATA GROUP (long DFP) (TDGDT R1,D2(X2,B2))
  4574  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4575  	{TDGET, 0xff00000000ff0000, 0xed00000000510000, 0xff000000, // TEST DATA GROUP (short DFP) (TDGET R1,D2(X2,B2))
  4576  		[8]*argField{ap_FPReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19}},
  4577  	{TP, 0xff00000000ff0000, 0xeb00000000c00000, 0xf0000ff000000, // TEST DECIMAL (TP D1(L1,B1))
  4578  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19}},
  4579  	{TPEI, 0xffff000000000000, 0xb9a1000000000000, 0xff0000000000, // TEST PENDING EXTERNAL INTERRUPTION (TPEI R1,R2)
  4580  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4581  	{TPI, 0xffff000000000000, 0xb236000000000000, 0x0, // TEST PENDING INTERRUPTION (TPI D2(B2))
  4582  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4583  	{TPROT, 0xffff000000000000, 0xe501000000000000, 0x0, // TEST PROTECTION (TPROT D1(B1),D2(B2))
  4584  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  4585  	{TSCH, 0xffff000000000000, 0xb235000000000000, 0x0, // TEST SUBCHANNEL (TSCH D2(B2))
  4586  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4587  	{TM, 0xff00000000000000, 0x9100000000000000, 0x0, // TEST UNDER MASK (TM D1(B1),I2)
  4588  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_8_15}},
  4589  	{TMY, 0xff00000000ff0000, 0xeb00000000510000, 0x0, // TEST UNDER MASK (TMY D1(B1),I2)
  4590  		[8]*argField{ap_DispSigned20_20_39, ap_BaseReg_16_19, ap_ImmUnsigned_8_15}},
  4591  	{TMHH, 0xff0f000000000000, 0xa702000000000000, 0x0, // TEST UNDER MASK (high high) (TMHH R1,I2)
  4592  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31}},
  4593  	{TMHL, 0xff0f000000000000, 0xa703000000000000, 0x0, // TEST UNDER MASK (high low) (TMHL R1,I2)
  4594  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31}},
  4595  	{TMLH, 0xff0f000000000000, 0xa700000000000000, 0x0, // TEST UNDER MASK (low high) (TMLH R1,I2)
  4596  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31}},
  4597  	{TMLL, 0xff0f000000000000, 0xa701000000000000, 0x0, // TEST UNDER MASK (low low) (TMLL R1,I2)
  4598  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31}},
  4599  	{TMH, 0xff0f000000000000, 0xa700000000000000, 0x0, // TEST UNDER MASK HIGH (TMH R1,I2)
  4600  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31}},
  4601  	{TML, 0xff0f000000000000, 0xa701000000000000, 0x0, // TEST UNDER MASK LOW (TML R1,I2)
  4602  		[8]*argField{ap_Reg_8_11, ap_ImmUnsigned_16_31}},
  4603  	{TRACE, 0xff00000000000000, 0x9900000000000000, 0x0, // TRACE (32) (TRACE R1,R3,D2(B2))
  4604  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4605  	{TRACG, 0xff00000000ff0000, 0xeb000000000f0000, 0x0, // TRACE (64) (TRACG R1,R3,D2(B2))
  4606  		[8]*argField{ap_Reg_8_11, ap_Reg_12_15, ap_DispSigned20_20_39, ap_BaseReg_16_19}},
  4607  	{TABORT, 0xffff000000000000, 0xb2fc000000000000, 0x0, // TRANSACTION ABORT (TABORT D2(B2))
  4608  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4609  	{TBEGINC, 0xffff000000000000, 0xe561000000000000, 0x0, // TRANSACTION BEGIN (constrained) (TBEGINC D1(B1),I2)
  4610  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_32_47}},
  4611  	{TBEGIN, 0xffff000000000000, 0xe560000000000000, 0x0, // TRANSACTION BEGIN (nonconstrained) (TBEGIN D1(B1),I2)
  4612  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_32_47}},
  4613  	{TEND, 0xffff000000000000, 0xb2f8000000000000, 0xffff00000000, // TRANSACTION END (TEND)
  4614  		[8]*argField{}},
  4615  	{TR, 0xff00000000000000, 0xdc00000000000000, 0x0, // TRANSLATE (TR D1(L1,B1),D2(B2))
  4616  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  4617  	{TRT, 0xff00000000000000, 0xdd00000000000000, 0x0, // TRANSLATE AND TEST (TRT D1(L1,B1),D2(B2))
  4618  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  4619  	{TRTE, 0xffff000000000000, 0xb9bf000000000000, 0xf0000000000, // TRANSLATE AND TEST EXTENDED (TRTE R1,R2,M3)
  4620  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  4621  	{TRTR, 0xff00000000000000, 0xd000000000000000, 0x0, // TRANSLATE AND TEST REVERSE (TRTR D1(L1,B1),D2(B2))
  4622  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  4623  	{TRTRE, 0xffff000000000000, 0xb9bd000000000000, 0xf0000000000, // TRANSLATE AND TEST REVERSE EXTENDED (TRTRE R1,R2,M3)
  4624  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  4625  	{TRE, 0xffff000000000000, 0xb2a5000000000000, 0xff0000000000, // TRANSLATE EXTENDED (TRE R1,R2)
  4626  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31}},
  4627  	{TROO, 0xffff000000000000, 0xb993000000000000, 0xf0000000000, // TRANSLATE ONE TO ONE (TROO R1,R2,M3)
  4628  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  4629  	{TROT, 0xffff000000000000, 0xb992000000000000, 0xf0000000000, // TRANSLATE ONE TO TWO (TROT R1,R2,M3)
  4630  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  4631  	{TRTO, 0xffff000000000000, 0xb991000000000000, 0xf0000000000, // TRANSLATE TWO TO ONE (TRTO R1,R2,M3)
  4632  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  4633  	{TRTT, 0xffff000000000000, 0xb990000000000000, 0xf0000000000, // TRANSLATE TWO TO TWO (TRTT R1,R2,M3)
  4634  		[8]*argField{ap_Reg_24_27, ap_Reg_28_31, ap_Mask_16_19}},
  4635  	{TRAP2, 0xffff000000000000, 0x1ff000000000000, 0x0, // TRAP (TRAP2)
  4636  		[8]*argField{}},
  4637  	{TRAP4, 0xffff000000000000, 0xb2ff000000000000, 0x0, // TRAP (TRAP4 D2(B2))
  4638  		[8]*argField{ap_DispUnsigned_20_31, ap_BaseReg_16_19}},
  4639  	{UNPK, 0xff00000000000000, 0xf300000000000000, 0x0, // UNPACK (UNPK D1(L1,B1),D2(L2,B2))
  4640  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_12_15, ap_BaseReg_32_35}},
  4641  	{UNPKA, 0xff00000000000000, 0xea00000000000000, 0x0, // UNPACK ASCII (UNPKA D1(L1,B1),D2(B2))
  4642  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  4643  	{UNPKU, 0xff00000000000000, 0xe200000000000000, 0x0, // UNPACK UNICODE (UNPKU D1(L1,B1),D2(B2))
  4644  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_15, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_BaseReg_32_35}},
  4645  	{UPT, 0xffff000000000000, 0x102000000000000, 0x0, // UPDATE TREE (UPT)
  4646  		[8]*argField{}},
  4647  	{VA, 0xff00000000ff0000, 0xe700000000f30000, 0xfff00000000, // VECTOR ADD (VA V1,V2,V3,M4)
  4648  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4649  	{VACC, 0xff00000000ff0000, 0xe700000000f10000, 0xfff00000000, // VECTOR ADD COMPUTE CARRY (VACC V1,V2,V3,M4)
  4650  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4651  	{VAP, 0xff00000000ff0000, 0xe600000000710000, 0xf0000000000, // VECTOR ADD DECIMAL (VAP V1,V2,V3,I4,M5)
  4652  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4653  	{VAC, 0xff00000000ff0000, 0xe700000000bb0000, 0xff00000000, // VECTOR ADD WITH CARRY (VAC V1,V2,V3,V4,M5)
  4654  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4655  	{VACCC, 0xff00000000ff0000, 0xe700000000b90000, 0xff00000000, // VECTOR ADD WITH CARRY COMPUTE CARRY (VACCC V1,V2,V3,V4,M5)
  4656  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4657  	{VN, 0xff00000000ff0000, 0xe700000000680000, 0xffff0000000, // VECTOR AND (VN V1,V2,V3)
  4658  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4659  	{VNC, 0xff00000000ff0000, 0xe700000000690000, 0xffff0000000, // VECTOR AND WITH COMPLEMENT (VNC V1,V2,V3)
  4660  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4661  	{VAVG, 0xff00000000ff0000, 0xe700000000f20000, 0xfff00000000, // VECTOR AVERAGE (VAVG V1,V2,V3,M4)
  4662  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4663  	{VAVGL, 0xff00000000ff0000, 0xe700000000f00000, 0xfff00000000, // VECTOR AVERAGE LOGICAL (VAVGL V1,V2,V3,M4)
  4664  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4665  	{VBPERM, 0xff00000000ff0000, 0xe700000000850000, 0xffff0000000, // VECTOR BIT PERMUTE (VBPERM V1,V2,V3)
  4666  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4667  	{VCKSM, 0xff00000000ff0000, 0xe700000000660000, 0xffff0000000, // VECTOR CHECKSUM (VCKSM V1,V2,V3)
  4668  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4669  	{VCP, 0xff00000000ff0000, 0xe600000000770000, 0xf00f0ff0000000, // VECTOR COMPARE DECIMAL (VCP V1,V2,M3)
  4670  		[8]*argField{ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4671  	{VCEQ, 0xff00000000ff0000, 0xe700000000f80000, 0xf0f00000000, // VECTOR COMPARE EQUAL (VCEQ V1,V2,V3,M4,M5)
  4672  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4673  	{VCH, 0xff00000000ff0000, 0xe700000000fb0000, 0xf0f00000000, // VECTOR COMPARE HIGH (VCH V1,V2,V3,M4,M5)
  4674  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4675  	{VCHL, 0xff00000000ff0000, 0xe700000000f90000, 0xf0f00000000, // VECTOR COMPARE HIGH LOGICAL (VCHL V1,V2,V3,M4,M5)
  4676  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4677  	{VCSPH, 0xff00000000ff0000, 0xe6000000007d0000, 0xf0ff0000000, // VECTOR CONVERT HFP TO SCALED DECIMAL (VCSPH V1,V2,V3,M4)
  4678  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4679  	{VCVB, 0xff00000000ff0000, 0xe600000000500000, 0xff00f0000000, // VECTOR CONVERT TO BINARY (VCVB R1,V2,M3,M4)
  4680  		[8]*argField{ap_Reg_8_11, ap_VecReg_12_15, ap_Mask_24_27, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4681  	{VCVBG, 0xff00000000ff0000, 0xe600000000520000, 0xff00f0000000, // VECTOR CONVERT TO BINARY (VCVBG R1,V2,M3,M4)
  4682  		[8]*argField{ap_Reg_8_11, ap_VecReg_12_15, ap_Mask_24_27, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4683  	{VCVD, 0xff00000000ff0000, 0xe600000000580000, 0xff0000000000, // VECTOR CONVERT TO DECIMAL (VCVD V1,R2,I3,M4)
  4684  		[8]*argField{ap_VecReg_8_11, ap_Reg_12_15, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4685  	{VCVDG, 0xff00000000ff0000, 0xe6000000005a0000, 0xff0000000000, // VECTOR CONVERT TO DECIMAL (VCVDG V1,R2,I3,M4)
  4686  		[8]*argField{ap_VecReg_8_11, ap_Reg_12_15, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4687  	{VCLZDP, 0xff00000000ff0000, 0xe600000000510000, 0xff0ff0000000, // VECTOR COUNT LEADING ZERO DIGITS (VCLZDP V1,V2,M3)
  4688  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4689  	{VCLZ, 0xff00000000ff0000, 0xe700000000530000, 0xffff00000000, // VECTOR COUNT LEADING ZEROS (VCLZ V1,V2,M3)
  4690  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4691  	{VCTZ, 0xff00000000ff0000, 0xe700000000520000, 0xffff00000000, // VECTOR COUNT TRAILING ZEROS (VCTZ V1,V2,M3)
  4692  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4693  	{VDP, 0xff00000000ff0000, 0xe6000000007a0000, 0xf0000000000, // VECTOR DIVIDE DECIMAL (VDP V1,V2,V3,I4,M5)
  4694  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4695  	{VEC, 0xff00000000ff0000, 0xe700000000db0000, 0xffff00000000, // VECTOR ELEMENT COMPARE (VEC V1,V2,M3)
  4696  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4697  	{VECL, 0xff00000000ff0000, 0xe700000000d90000, 0xffff00000000, // VECTOR ELEMENT COMPARE LOGICAL (VECL V1,V2,M3)
  4698  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4699  	{VERIM, 0xff00000000ff0000, 0xe700000000720000, 0xf0000000000, // VECTORELEMENTROTATEANDINSERTUNDER MASK (VERIM V1,V2,V3,I4,M5)
  4700  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_24_31, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4701  	{VERLL, 0xff00000000ff0000, 0xe700000000330000, 0x0, // VECTOR ELEMENT ROTATE LEFT LOGICAL (VERLL V1,V3,D2(B2),M4)
  4702  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4703  	{VERLLV, 0xff00000000ff0000, 0xe700000000730000, 0xfff00000000, // VECTOR ELEMENT ROTATE LEFT LOGICAL (VERLLV V1,V2,V3,M4)
  4704  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4705  	{VESLV, 0xff00000000ff0000, 0xe700000000700000, 0xfff00000000, // VECTOR ELEMENT SHIFT LEFT (VESLV V1,V2,V3,M4)
  4706  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4707  	{VESL, 0xff00000000ff0000, 0xe700000000300000, 0x0, // VECTOR ELEMENT SHIFT LEFT (VESL V1,V3,D2(B2),M4)
  4708  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4709  	{VESRA, 0xff00000000ff0000, 0xe7000000003a0000, 0x0, // VECTOR ELEMENT SHIFT RIGHT ARITHMETIC (VESRA V1,V3,D2(B2),M4)
  4710  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4711  	{VESRAV, 0xff00000000ff0000, 0xe7000000007a0000, 0xfff00000000, // VECTOR ELEMENT SHIFT RIGHT ARITHMETIC (VESRAV V1,V2,V3,M4)
  4712  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4713  	{VESRL, 0xff00000000ff0000, 0xe700000000380000, 0x0, // VECTOR ELEMENT SHIFT RIGHT LOGICAL (VESRL V1,V3,D2(B2),M4)
  4714  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4715  	{VESRLV, 0xff00000000ff0000, 0xe700000000780000, 0xfff00000000, // VECTOR ELEMENT SHIFT RIGHT LOGICAL (VESRLV V1,V2,V3,M4)
  4716  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4717  	{VX, 0xff00000000ff0000, 0xe7000000006d0000, 0xffff0000000, // VECTOR EXCLUSIVE OR (VX V1,V2,V3)
  4718  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4719  	{VFAE, 0xff00000000ff0000, 0xe700000000820000, 0xf0f00000000, // VECTOR FIND ANY ELEMENT EQUAL (VFAE V1,V2,V3,M4,M5)
  4720  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4721  	{VFEE, 0xff00000000ff0000, 0xe700000000800000, 0xf0f00000000, // VECTOR FIND ELEMENT EQUAL (VFEE V1,V2,V3,M4,M5)
  4722  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4723  	{VFENE, 0xff00000000ff0000, 0xe700000000810000, 0xf0f00000000, // VECTOR FIND ELEMENT NOT EQUAL (VFENE V1,V2,V3,M4,M5)
  4724  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4725  	{VFA, 0xff00000000ff0000, 0xe700000000e30000, 0xff000000000, // VECTOR FP ADD (VFA V1,V2,V3,M4,M5)
  4726  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4727  	{WFK, 0xff00000000ff0000, 0xe700000000ca0000, 0xfff000000000, // VECTOR FP COMPARE AND SIGNAL SCALAR (WFK V1,V2,M3,M4)
  4728  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4729  	{VFCE, 0xff00000000ff0000, 0xe700000000e80000, 0xf0000000000, // VECTOR FP COMPARE EQUAL (VFCE V1,V2,V3,M4,M5,M6)
  4730  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4731  	{VFCH, 0xff00000000ff0000, 0xe700000000eb0000, 0xf0000000000, // VECTOR FP COMPARE HIGH (VFCH V1,V2,V3,M4,M5,M6)
  4732  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4733  	{VFCHE, 0xff00000000ff0000, 0xe700000000ea0000, 0xf0000000000, // VECTOR FP COMPARE HIGH OR EQUAL (VFCHE V1,V2,V3,M4,M5,M6)
  4734  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4735  	{WFC, 0xff00000000ff0000, 0xe700000000cb0000, 0xfff000000000, // VECTOR FP COMPARE SCALAR (WFC V1,V2,M3,M4)
  4736  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4737  	{VCLFNH, 0xff00000000ff0000, 0xe600000000560000, 0xfff000000000, // VECTOR FP CONVERT AND LENGTHEN FROM NNP HIGH (VCLFNH V1,V2,M3,M4)
  4738  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4739  	{VCLFNL, 0xff00000000ff0000, 0xe6000000005e0000, 0xfff000000000, // VECTOR FP CONVERT AND LENGTHEN FROM NNP LOW (VCLFNL V1,V2,M3,M4)
  4740  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4741  	{VCRNF, 0xff00000000ff0000, 0xe600000000750000, 0xff000000000, // VECTOR FP CONVERT AND ROUND TO NNP (VCRNF V1,V2,V3,M4,M5)
  4742  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4743  	{VCFPS, 0xff00000000ff0000, 0xe700000000c30000, 0xff0000000000, // VECTOR FP CONVERT FROM FIXED (VCFPS V1,V2,M3,M4,M5)
  4744  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4745  	{VCDG, 0xff00000000ff0000, 0xe700000000c30000, 0xff0000000000, // VECTOR FP CONVERT FROM FIXED 64-BIT (VCDG V1,V2,M3,M4,M5)
  4746  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4747  	{VCFPL, 0xff00000000ff0000, 0xe700000000c10000, 0xff0000000000, // VECTOR FP CONVERT FROM LOGICAL (VCFPL V1,V2,M3,M4,M5)
  4748  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4749  	{VCDLG, 0xff00000000ff0000, 0xe700000000c10000, 0xff0000000000, // VECTOR FP CONVERT FROM LOGICAL 64-BIT (VCDLG V1,V2,M3,M4,M5)
  4750  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4751  	{VCFN, 0xff00000000ff0000, 0xe6000000005d0000, 0xfff000000000, // VECTOR FP CONVERT FROM NNP (VCFN V1,V2,M3,M4)
  4752  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4753  	{VCSFP, 0xff00000000ff0000, 0xe700000000c20000, 0xff0000000000, // VECTOR FP CONVERT TO FIXED (VCSFP V1,V2,M3,M4,M5)
  4754  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4755  	{VCGD, 0xff00000000ff0000, 0xe700000000c20000, 0xff0000000000, // VECTOR FP CONVERT TO FIXED 64-BIT (VCGD V1,V2,M3,M4,M5)
  4756  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4757  	{VCLFP, 0xff00000000ff0000, 0xe700000000c00000, 0xff0000000000, // VECTOR FP CONVERT TO LOGICAL (VCLFP V1,V2,M3,M4,M5)
  4758  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4759  	{VCLGD, 0xff00000000ff0000, 0xe700000000c00000, 0xff0000000000, // VECTOR FP CONVERT TO LOGICAL 64-BIT (VCLGD V1,V2,M3,M4,M5)
  4760  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4761  	{VCNF, 0xff00000000ff0000, 0xe600000000550000, 0xfff000000000, // VECTOR FP CONVERT TO NNP (VCNF V1,V2,M3,M4)
  4762  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4763  	{VFD, 0xff00000000ff0000, 0xe700000000e50000, 0xff000000000, // VECTOR FP DIVIDE (VFD V1,V2,V3,M4,M5)
  4764  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4765  	{VFLL, 0xff00000000ff0000, 0xe700000000c40000, 0xfff000000000, // VECTOR FP LOAD LENGTHENED (VFLL V1,V2,M3,M4)
  4766  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4767  	{VFLR, 0xff00000000ff0000, 0xe700000000c50000, 0xff0000000000, // VECTOR FP LOAD ROUNDED (VFLR V1,V2,M3,M4,M5)
  4768  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4769  	{VFMAX, 0xff00000000ff0000, 0xe700000000ef0000, 0xf0000000000, // VECTOR FP MAXIMUM (VFMAX V1,V2,V3,M4,M5,M6)
  4770  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4771  	{VFMIN, 0xff00000000ff0000, 0xe700000000ee0000, 0xf0000000000, // VECTOR FP MINIMUM (VFMIN V1,V2,V3,M4,M5,M6)
  4772  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4773  	{VFM, 0xff00000000ff0000, 0xe700000000e70000, 0xff000000000, // VECTOR FP MULTIPLY (VFM V1,V2,V3,M4,M5)
  4774  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4775  	{VFMA, 0xff00000000ff0000, 0xe7000000008f0000, 0xf000000000, // VECTOR FP MULTIPLY AND ADD (VFMA V1,V2,V3,V4,M5,M6)
  4776  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_28_31, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4777  	{VFMS, 0xff00000000ff0000, 0xe7000000008e0000, 0xf000000000, // VECTOR FP MULTIPLY AND SUBTRACT (VFMS V1,V2,V3,V4,M5,M6)
  4778  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_28_31, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4779  	{VFNMA, 0xff00000000ff0000, 0xe7000000009f0000, 0xf000000000, // VECTOR FP NEGATIVE MULTIPLY AND ADD (VFNMA V1,V2,V3,V4,M5,M6)
  4780  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_28_31, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4781  	{VFNMS, 0xff00000000ff0000, 0xe7000000009e0000, 0xf000000000, // VECTOR FP NEGATIVE MULTIPLY AND SUBTRACT (VFNMS V1,V2,V3,V4,M5,M6)
  4782  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_28_31, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4783  	{VFPSO, 0xff00000000ff0000, 0xe700000000cc0000, 0xff0000000000, // VECTOR FP PERFORM SIGN OPERATION (VFPSO V1,V2,M3,M4,M5)
  4784  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4785  	{VFSQ, 0xff00000000ff0000, 0xe700000000ce0000, 0xfff000000000, // VECTOR FP SQUARE ROOT (VFSQ V1,V2,M3,M4)
  4786  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4787  	{VFS, 0xff00000000ff0000, 0xe700000000e20000, 0xff000000000, // VECTOR FP SUBTRACT (VFS V1,V2,V3,M4,M5)
  4788  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4789  	{VFTCI, 0xff00000000ff0000, 0xe7000000004a0000, 0x0, // VECTOR FP TEST DATA CLASS IMMEDIATE (VFTCI V1,V2,I3,M4,M5)
  4790  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_ImmUnsigned_16_27, ap_Mask_32_35, ap_Mask_28_31, ap_ImmUnsigned_36_39}},
  4791  	{VGFM, 0xff00000000ff0000, 0xe700000000b40000, 0xfff00000000, // VECTOR GALOIS FIELD MULTIPLY SUM (VGFM V1,V2,V3,M4)
  4792  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4793  	{VGFMA, 0xff00000000ff0000, 0xe700000000bc0000, 0xff00000000, // VECTOR GALOIS FIELD MULTIPLY SUM AND ACCUMULATE (VGFMA V1,V2,V3,V4,M5)
  4794  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4795  	{VGEF, 0xff00000000ff0000, 0xe700000000130000, 0x0, // VECTOR GATHER ELEMENT (32) (VGEF V1,D2(V2,B2),M3)
  4796  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_VecReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4797  	{VGEG, 0xff00000000ff0000, 0xe700000000120000, 0x0, // VECTOR GATHER ELEMENT (64) (VGEG V1,D2(V2,B2),M3)
  4798  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_VecReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4799  	{VGBM, 0xff00000000ff0000, 0xe700000000440000, 0xf0000f0000000, // VECTOR GENERATE BYTE MASK (VGBM V1,I2)
  4800  		[8]*argField{ap_VecReg_8_11, ap_ImmUnsigned_16_31, ap_ImmUnsigned_36_39}},
  4801  	{VGM, 0xff00000000ff0000, 0xe700000000460000, 0xf000000000000, // VECTOR GENERATE MASK (VGM V1,I2,I3,M4)
  4802  		[8]*argField{ap_VecReg_8_11, ap_ImmUnsigned_16_23, ap_ImmUnsigned_24_31, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4803  	{VISTR, 0xff00000000ff0000, 0xe7000000005c0000, 0xff0f00000000, // VECTOR ISOLATE STRING (VISTR V1,V2,M3,M5)
  4804  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4805  	{VL, 0xff00000000ff0000, 0xe700000000060000, 0x0, // VECTOR LOAD (VL V1,D2(X2,B2),M3)
  4806  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4807  	{VLR, 0xff00000000ff0000, 0xe700000000560000, 0xfffff0000000, // VECTOR LOAD (VLR V1,V2)
  4808  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_ImmUnsigned_36_39}},
  4809  	{VLREP, 0xff00000000ff0000, 0xe700000000050000, 0x0, // VECTOR LOAD AND REPLICATE (VLREP V1,D2(X2,B2),M3)
  4810  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4811  	{VLEBRH, 0xff00000000ff0000, 0xe600000000010000, 0x0, // VECTOR LOAD BYTE REVERSED ELEMENT (16) (VLEBRH V1,D2(X2,B2),M3)
  4812  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4813  	{VLEBRF, 0xff00000000ff0000, 0xe600000000030000, 0x0, // VECTOR LOAD BYTE REVERSED ELEMENT (32) (VLEBRF V1,D2(X2,B2),M3)
  4814  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4815  	{VLEBRG, 0xff00000000ff0000, 0xe600000000020000, 0x0, // VECTOR LOAD BYTE REVERSED ELEMENT (64) (VLEBRG V1,D2(X2,B2),M3)
  4816  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4817  	{VLBRREP, 0xff00000000ff0000, 0xe600000000050000, 0x0, // VECTOR LOAD BYTE REVERSED ELEMENT AND REPLICATE (VLBRREP V1,D2(X2,B2),M3)
  4818  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4819  	{VLLEBRZ, 0xff00000000ff0000, 0xe600000000040000, 0x0, // VECTOR LOAD BYTE REVERSED ELEMENT AND ZERO (VLLEBRZ V1,D2(X2,B2),M3)
  4820  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4821  	{VLBR, 0xff00000000ff0000, 0xe600000000060000, 0x0, // VECTOR LOAD BYTE REVERSED ELEMENTS (VLBR V1,D2(X2,B2),M3)
  4822  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4823  	{VLC, 0xff00000000ff0000, 0xe700000000de0000, 0xffff00000000, // VECTOR LOAD COMPLEMENT (VLC V1,V2,M3)
  4824  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4825  	{VLEH, 0xff00000000ff0000, 0xe700000000010000, 0x0, // VECTOR LOAD ELEMENT (16) (VLEH V1,D2(X2,B2),M3)
  4826  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4827  	{VLEF, 0xff00000000ff0000, 0xe700000000030000, 0x0, // VECTOR LOAD ELEMENT (32) (VLEF V1,D2(X2,B2),M3)
  4828  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4829  	{VLEG, 0xff00000000ff0000, 0xe700000000020000, 0x0, // VECTOR LOAD ELEMENT (64) (VLEG V1,D2(X2,B2),M3)
  4830  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4831  	{VLEB, 0xff00000000ff0000, 0xe700000000000000, 0x0, // VECTOR LOAD ELEMENT (8) (VLEB V1,D2(X2,B2),M3)
  4832  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4833  	{VLEIH, 0xff00000000ff0000, 0xe700000000410000, 0xf000000000000, // VECTOR LOAD ELEMENT IMMEDIATE (16) (VLEIH V1,I2,M3)
  4834  		[8]*argField{ap_VecReg_8_11, ap_ImmSigned16_16_31, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4835  	{VLEIF, 0xff00000000ff0000, 0xe700000000430000, 0xf000000000000, // VECTOR LOAD ELEMENT IMMEDIATE (32) (VLEIF V1,I2,M3)
  4836  		[8]*argField{ap_VecReg_8_11, ap_ImmSigned16_16_31, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4837  	{VLEIG, 0xff00000000ff0000, 0xe700000000420000, 0xf000000000000, // VECTOR LOAD ELEMENT IMMEDIATE (64) (VLEIG V1,I2,M3)
  4838  		[8]*argField{ap_VecReg_8_11, ap_ImmSigned16_16_31, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4839  	{VLEIB, 0xff00000000ff0000, 0xe700000000400000, 0xf000000000000, // VECTOR LOAD ELEMENT IMMEDIATE (8) (VLEIB V1,I2,M3)
  4840  		[8]*argField{ap_VecReg_8_11, ap_ImmSigned16_16_31, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4841  	{VLER, 0xff00000000ff0000, 0xe600000000070000, 0x0, // VECTOR LOAD ELEMENTS REVERSED (VLER V1,D2(X2,B2),M3)
  4842  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4843  	{VFI, 0xff00000000ff0000, 0xe700000000c70000, 0xff0000000000, // VECTOR LOAD FP INTEGER (VFI V1,V2,M3,M4,M5)
  4844  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_Mask_28_31, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4845  	{VLGV, 0xff00000000ff0000, 0xe700000000210000, 0x0, // VECTOR LOAD GR FROM VR ELEMENT (VLGV R1,V3,D2(B2),M4)
  4846  		[8]*argField{ap_Reg_8_11, ap_VecReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4847  	{VLIP, 0xff00000000ff0000, 0xe600000000490000, 0xf000000000000, // VECTOR LOAD IMMEDIATE DECIMAL (VLIP V1,I2,I3)
  4848  		[8]*argField{ap_VecReg_8_11, ap_ImmUnsigned_16_31, ap_ImmUnsigned_32_35, ap_ImmUnsigned_36_39}},
  4849  	{VLLEZ, 0xff00000000ff0000, 0xe700000000040000, 0x0, // VECTOR LOAD LOGICAL ELEMENT AND ZERO (VLLEZ V1,D2(X2,B2),M3)
  4850  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4851  	{VLM, 0xff00000000ff0000, 0xe700000000360000, 0x0, // VECTOR LOAD MULTIPLE (VLM V1,V3,D2(B2),M4)
  4852  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4853  	{VLP, 0xff00000000ff0000, 0xe700000000df0000, 0xffff00000000, // VECTOR LOAD POSITIVE (VLP V1,V2,M3)
  4854  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4855  	{VLRL, 0xff00000000ff0000, 0xe600000000350000, 0x0, // VECTOR LOAD RIGHTMOST WITH LENGTH (VLRL V1,D2(B2),I3)
  4856  		[8]*argField{ap_VecReg_32_35, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_8_15, ap_ImmUnsigned_36_39}},
  4857  	{VLRLR, 0xff00000000ff0000, 0xe600000000370000, 0xf0000000000000, // VECTOR LOAD RIGHTMOST WITH LENGTH (VLRLR V1,R3,D2(B2))
  4858  		[8]*argField{ap_VecReg_32_35, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_36_39}},
  4859  	{VLBB, 0xff00000000ff0000, 0xe700000000070000, 0x0, // VECTOR LOAD TO BLOCK BOUNDARY (VLBB V1,D2(X2,B2),M3)
  4860  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4861  	{VLVG, 0xff00000000ff0000, 0xe700000000220000, 0x0, // VECTOR LOAD VR ELEMENT FROM GR (VLVG V1,R3,D2(B2),M4)
  4862  		[8]*argField{ap_VecReg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4863  	{VLVGP, 0xff00000000ff0000, 0xe700000000620000, 0xffff0000000, // VECTOR LOAD VR FROM GRS DISJOINT (VLVGP V1,R2,R3)
  4864  		[8]*argField{ap_VecReg_8_11, ap_Reg_12_15, ap_Reg_16_19, ap_ImmUnsigned_36_39}},
  4865  	{VLL, 0xff00000000ff0000, 0xe700000000370000, 0xf0000000, // VECTOR LOAD WITH LENGTH (VLL V1,R3,D2(B2))
  4866  		[8]*argField{ap_VecReg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_36_39}},
  4867  	{VMX, 0xff00000000ff0000, 0xe700000000ff0000, 0xfff00000000, // VECTOR MAXIMUM (VMX V1,V2,V3,M4)
  4868  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4869  	{VMXL, 0xff00000000ff0000, 0xe700000000fd0000, 0xfff00000000, // VECTOR MAXIMUM LOGICAL (VMXL V1,V2,V3,M4)
  4870  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4871  	{VMRH, 0xff00000000ff0000, 0xe700000000610000, 0xfff00000000, // VECTOR MERGE HIGH (VMRH V1,V2,V3,M4)
  4872  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4873  	{VMRL, 0xff00000000ff0000, 0xe700000000600000, 0xfff00000000, // VECTOR MERGE LOW (VMRL V1,V2,V3,M4)
  4874  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4875  	{VMN, 0xff00000000ff0000, 0xe700000000fe0000, 0xfff00000000, // VECTOR MINIMUM (VMN V1,V2,V3,M4)
  4876  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4877  	{VMNL, 0xff00000000ff0000, 0xe700000000fc0000, 0xfff00000000, // VECTOR MINIMUM LOGICAL (VMNL V1,V2,V3,M4)
  4878  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4879  	{VMAE, 0xff00000000ff0000, 0xe700000000ae0000, 0xff00000000, // VECTOR MULTIPLY AND ADD EVEN (VMAE V1,V2,V3,V4,M5)
  4880  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4881  	{VMAH, 0xff00000000ff0000, 0xe700000000ab0000, 0xff00000000, // VECTOR MULTIPLY AND ADD HIGH (VMAH V1,V2,V3,V4,M5)
  4882  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4883  	{VMALE, 0xff00000000ff0000, 0xe700000000ac0000, 0xff00000000, // VECTOR MULTIPLY AND ADD LOGICAL EVEN (VMALE V1,V2,V3,V4,M5)
  4884  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4885  	{VMALH, 0xff00000000ff0000, 0xe700000000a90000, 0xff00000000, // VECTOR MULTIPLY AND ADD LOGICAL HIGH (VMALH V1,V2,V3,V4,M5)
  4886  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4887  	{VMALO, 0xff00000000ff0000, 0xe700000000ad0000, 0xff00000000, // VECTOR MULTIPLY AND ADD LOGICAL ODD (VMALO V1,V2,V3,V4,M5)
  4888  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4889  	{VMAL, 0xff00000000ff0000, 0xe700000000aa0000, 0xff00000000, // VECTOR MULTIPLY AND ADD LOW (VMAL V1,V2,V3,V4,M5)
  4890  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4891  	{VMAO, 0xff00000000ff0000, 0xe700000000af0000, 0xff00000000, // VECTOR MULTIPLY AND ADD ODD (VMAO V1,V2,V3,V4,M5)
  4892  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  4893  	{VMSP, 0xff00000000ff0000, 0xe600000000790000, 0xf0000000000, // VECTOR MULTIPLY AND SHIFT DECIMAL (VMSP V1,V2,V3,I4,M5)
  4894  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4895  	{VMP, 0xff00000000ff0000, 0xe600000000780000, 0xf0000000000, // VECTOR MULTIPLY DECIMAL (VMP V1,V2,V3,I4,M5)
  4896  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4897  	{VME, 0xff00000000ff0000, 0xe700000000a60000, 0xfff00000000, // VECTOR MULTIPLY EVEN (VME V1,V2,V3,M4)
  4898  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4899  	{VMH, 0xff00000000ff0000, 0xe700000000a30000, 0xfff00000000, // VECTOR MULTIPLY HIGH (VMH V1,V2,V3,M4)
  4900  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4901  	{VMLE, 0xff00000000ff0000, 0xe700000000a40000, 0xfff00000000, // VECTOR MULTIPLY LOGICAL EVEN (VMLE V1,V2,V3,M4)
  4902  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4903  	{VMLH, 0xff00000000ff0000, 0xe700000000a10000, 0xfff00000000, // VECTOR MULTIPLY LOGICAL HIGH (VMLH V1,V2,V3,M4)
  4904  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4905  	{VMLO, 0xff00000000ff0000, 0xe700000000a50000, 0xfff00000000, // VECTOR MULTIPLY LOGICAL ODD (VMLO V1,V2,V3,M4)
  4906  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4907  	{VML, 0xff00000000ff0000, 0xe700000000a20000, 0xfff00000000, // VECTOR MULTIPLY LOW (VML V1,V2,V3,M4)
  4908  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4909  	{VMO, 0xff00000000ff0000, 0xe700000000a70000, 0xfff00000000, // VECTOR MULTIPLY ODD (VMO V1,V2,V3,M4)
  4910  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4911  	{VMSL, 0xff00000000ff0000, 0xe700000000b80000, 0xf00000000, // VECTOR MULTIPLY SUM LOGICAL (VMSL V1,V2,V3,V4,M5,M6)
  4912  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4913  	{VNN, 0xff00000000ff0000, 0xe7000000006e0000, 0xffff0000000, // VECTOR NAND (VNN V1,V2,V3)
  4914  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4915  	{VNO, 0xff00000000ff0000, 0xe7000000006b0000, 0xffff0000000, // VECTOR NOR (VNO V1,V2,V3)
  4916  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4917  	{VNX, 0xff00000000ff0000, 0xe7000000006c0000, 0xffff0000000, // VECTOR NOT EXCLUSIVE OR (VNX V1,V2,V3)
  4918  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4919  	{VO, 0xff00000000ff0000, 0xe7000000006a0000, 0xffff0000000, // VECTOR OR (VO V1,V2,V3)
  4920  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4921  	{VOC, 0xff00000000ff0000, 0xe7000000006f0000, 0xffff0000000, // VECTOR OR WITH COMPLEMENT (VOC V1,V2,V3)
  4922  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4923  	{VPK, 0xff00000000ff0000, 0xe700000000940000, 0xfff00000000, // VECTOR PACK (VPK V1,V2,V3,M4)
  4924  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4925  	{VPKLS, 0xff00000000ff0000, 0xe700000000950000, 0xf0f00000000, // VECTOR PACK LOGICAL SATURATE (VPKLS V1,V2,V3,M4,M5)
  4926  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4927  	{VPKS, 0xff00000000ff0000, 0xe700000000970000, 0xf0f00000000, // VECTOR PACK SATURATE (VPKS V1,V2,V3,M4,M5)
  4928  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4929  	{VPKZ, 0xff00000000ff0000, 0xe600000000340000, 0x0, // VECTOR PACK ZONED (VPKZ V1,D2(B2),I3)
  4930  		[8]*argField{ap_VecReg_32_35, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_8_15, ap_ImmUnsigned_36_39}},
  4931  	{VPKZR, 0xff00000000ff0000, 0xe600000000700000, 0xf0000000000, // VECTOR PACK ZONED REGISTER (VPKZR V1,V2,V3,I4,M5)
  4932  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4933  	{VPSOP, 0xff00000000ff0000, 0xe6000000005b0000, 0x0, // VECTOR PERFORM SIGN OPERATION DECIMAL (VPSOP V1,V2,I3,I4,M5)
  4934  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_ImmUnsigned_28_35, ap_ImmUnsigned_16_23, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4935  	{VPERM, 0xff00000000ff0000, 0xe7000000008c0000, 0xfff00000000, // VECTOR PERMUTE (VPERM V1,V2,V3,V4)
  4936  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_ImmUnsigned_36_39}},
  4937  	{VPDI, 0xff00000000ff0000, 0xe700000000840000, 0xfff00000000, // VECTOR PERMUTE DOUBLEWORD IMMEDIATE (VPDI V1,V2,V3,M4)
  4938  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4939  	{VPOPCT, 0xff00000000ff0000, 0xe700000000500000, 0xffff00000000, // VECTOR POPULATION COUNT (VPOPCT V1,V2,M3)
  4940  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4941  	{VRP, 0xff00000000ff0000, 0xe6000000007b0000, 0xf0000000000, // VECTOR REMAINDER DECIMAL (VRP V1,V2,V3,I4,M5)
  4942  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4943  	{VREP, 0xff00000000ff0000, 0xe7000000004d0000, 0x0, // VECTOR REPLICATE (VREP V1,V3,I2,M4)
  4944  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_ImmUnsigned_16_31, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4945  	{VREPI, 0xff00000000ff0000, 0xe700000000450000, 0xf000000000000, // VECTOR REPLICATE IMMEDIATE (VREPI V1,I2,M3)
  4946  		[8]*argField{ap_VecReg_8_11, ap_ImmUnsigned_16_31, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4947  	{VSCEF, 0xff00000000ff0000, 0xe7000000001b0000, 0x0, // VECTOR SCATTER ELEMENT (32) (VSCEF V1,D2(V2,B2),M3)
  4948  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_VecReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4949  	{VSCEG, 0xff00000000ff0000, 0xe7000000001a0000, 0x0, // VECTOR SCATTER ELEMENT (64) (VSCEG V1,D2(V2,B2),M3)
  4950  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_VecReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4951  	{VSEL, 0xff00000000ff0000, 0xe7000000008d0000, 0xfff00000000, // VECTOR SELECT (VSEL V1,V2,V3,V4)
  4952  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_ImmUnsigned_36_39}},
  4953  	{VSDP, 0xff00000000ff0000, 0xe6000000007e0000, 0xf0000000000, // VECTOR SHIFT AND DIVIDE DECIMAL (VSDP V1,V2,V3,I4,M5)
  4954  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4955  	{VSRP, 0xff00000000ff0000, 0xe600000000590000, 0x0, // VECTOR SHIFT AND ROUND DECIMAL (VSRP V1,V2,I3,I4,M5)
  4956  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_ImmUnsigned_28_35, ap_ImmUnsigned_16_23, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4957  	{VSRPR, 0xff00000000ff0000, 0xe600000000720000, 0xf0000000000, // VECTOR SHIFT AND ROUND DECIMAL REGISTER (VSRPR V1,V2,V3,I4,M5)
  4958  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  4959  	{VSL, 0xff00000000ff0000, 0xe700000000740000, 0xffff0000000, // VECTOR SHIFT LEFT (VSL V1,V2,V3)
  4960  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4961  	{VSLB, 0xff00000000ff0000, 0xe700000000750000, 0xffff0000000, // VECTOR SHIFT LEFT BY BYTE (VSLB V1,V2,V3)
  4962  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4963  	{VSLD, 0xff00000000ff0000, 0xe700000000860000, 0xf00f0000000, // VECTOR SHIFT LEFT DOUBLE BY BIT (VSLD V1,V2,V3,I4)
  4964  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_24_31, ap_ImmUnsigned_36_39}},
  4965  	{VSLDB, 0xff00000000ff0000, 0xe700000000770000, 0xf00f0000000, // VECTOR SHIFT LEFT DOUBLE BY BYTE (VSLDB V1,V2,V3,I4)
  4966  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_24_31, ap_ImmUnsigned_36_39}},
  4967  	{VSRA, 0xff00000000ff0000, 0xe7000000007e0000, 0xffff0000000, // VECTOR SHIFT RIGHT ARITHMETIC (VSRA V1,V2,V3)
  4968  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4969  	{VSRAB, 0xff00000000ff0000, 0xe7000000007f0000, 0xffff0000000, // VECTOR SHIFT RIGHT ARITHMETIC BY BYTE (VSRAB V1,V2,V3)
  4970  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4971  	{VSRD, 0xff00000000ff0000, 0xe700000000870000, 0xf00f0000000, // VECTOR SHIFT RIGHT DOUBLE BY BIT (VSRD V1,V2,V3,I4)
  4972  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_24_31, ap_ImmUnsigned_36_39}},
  4973  	{VSRL, 0xff00000000ff0000, 0xe7000000007c0000, 0xffff0000000, // VECTOR SHIFT RIGHT LOGICAL (VSRL V1,V2,V3)
  4974  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4975  	{VSRLB, 0xff00000000ff0000, 0xe7000000007d0000, 0xffff0000000, // VECTOR SHIFT RIGHT LOGICAL BY BYTE (VSRLB V1,V2,V3)
  4976  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_36_39}},
  4977  	{VSEG, 0xff00000000ff0000, 0xe7000000005f0000, 0xffff00000000, // VECTOR SIGN EXTEND TO DOUBLEWORD (VSEG V1,V2,M3)
  4978  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4979  	{VST, 0xff00000000ff0000, 0xe7000000000e0000, 0x0, // VECTOR STORE (VST V1,D2(X2,B2),M3)
  4980  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4981  	{VSTEBRH, 0xff00000000ff0000, 0xe600000000090000, 0x0, // VECTOR STORE BYTE REVERSED ELEMENT(16) (VSTEBRH V1,D2(X2,B2),M3)
  4982  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4983  	{VSTEBRF, 0xff00000000ff0000, 0xe6000000000b0000, 0x0, // VECTOR STORE BYTE REVERSED ELEMENT(32) (VSTEBRF V1,D2(X2,B2),M3)
  4984  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4985  	{VSTEBRG, 0xff00000000ff0000, 0xe6000000000a0000, 0x0, // VECTOR STORE BYTE REVERSED ELEMENT(64) (VSTEBRG V1,D2(X2,B2),M3)
  4986  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4987  	{VSTBR, 0xff00000000ff0000, 0xe6000000000e0000, 0x0, // VECTOR STORE BYTE REVERSED ELEMENTS (VSTBR V1,D2(X2,B2),M3)
  4988  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4989  	{VSTEH, 0xff00000000ff0000, 0xe700000000090000, 0x0, // VECTOR STORE ELEMENT (16) (VSTEH V1,D2(X2,B2),M3)
  4990  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4991  	{VSTEF, 0xff00000000ff0000, 0xe7000000000b0000, 0x0, // VECTOR STORE ELEMENT (32) (VSTEF V1,D2(X2,B2),M3)
  4992  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4993  	{VSTEG, 0xff00000000ff0000, 0xe7000000000a0000, 0x0, // VECTOR STORE ELEMENT (64) (VSTEG V1,D2(X2,B2),M3)
  4994  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4995  	{VSTEB, 0xff00000000ff0000, 0xe700000000080000, 0x0, // VECTOR STORE ELEMENT (8) (VSTEB V1,D2(X2,B2),M3)
  4996  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4997  	{VSTER, 0xff00000000ff0000, 0xe6000000000f0000, 0x0, // VECTOR STORE ELEMENTS REVERSED (VSTER V1,D2(X2,B2),M3)
  4998  		[8]*argField{ap_VecReg_8_11, ap_DispUnsigned_20_31, ap_IndexReg_12_15, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  4999  	{VSTM, 0xff00000000ff0000, 0xe7000000003e0000, 0x0, // VECTOR STORE MULTIPLE (VSTM V1,V3,D2(B2),M4)
  5000  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  5001  	{VSTRL, 0xff00000000ff0000, 0xe6000000003d0000, 0x0, // VECTOR STORE RIGHTMOST WITH LENGTH (VSTRL V1,D2(B2),I3)
  5002  		[8]*argField{ap_VecReg_32_35, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_8_15, ap_ImmUnsigned_36_39}},
  5003  	{VSTRLR, 0xff00000000ff0000, 0xe6000000003f0000, 0xf0000000000000, // VECTOR STORE RIGHTMOST WITH LENGTH (VSTRLR V1,R3,D2(B2))
  5004  		[8]*argField{ap_VecReg_32_35, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_36_39}},
  5005  	{VSTL, 0xff00000000ff0000, 0xe7000000003f0000, 0xf0000000, // VECTOR STORE WITH LENGTH (VSTL V1,R3,D2(B2))
  5006  		[8]*argField{ap_VecReg_8_11, ap_Reg_12_15, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_36_39}},
  5007  	{VSTRC, 0xff00000000ff0000, 0xe7000000008a0000, 0xf00000000, // VECTOR STRING RANGE COMPARE (VSTRC V1,V2,V3,V4,M5,M6)
  5008  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  5009  	{VSTRS, 0xff00000000ff0000, 0xe7000000008b0000, 0xf00000000, // VECTOR STRING SEARCH (VSTRS V1,V2,V3,V4,M5,M6)
  5010  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  5011  	{VS, 0xff00000000ff0000, 0xe700000000f70000, 0xfff00000000, // VECTOR SUBTRACT (VS V1,V2,V3,M4)
  5012  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  5013  	{VSCBI, 0xff00000000ff0000, 0xe700000000f50000, 0xfff00000000, // VECTOR SUBTRACT COMPUTE BORROW INDICATION (VSCBI V1,V2,V3,M4)
  5014  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  5015  	{VSP, 0xff00000000ff0000, 0xe600000000730000, 0xf0000000000, // VECTOR SUBTRACT DECIMAL (VSP V1,V2,V3,I4,M5)
  5016  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_ImmUnsigned_28_35, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  5017  	{VSBCBI, 0xff00000000ff0000, 0xe700000000bd0000, 0xff00000000, // VECTOR SUBTRACT WITH BORROW COMPUTE BORROW INDICATION (VSBCBI V1,V2,V3,V4,M5)
  5018  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  5019  	{VSBI, 0xff00000000ff0000, 0xe700000000bf0000, 0xff00000000, // VECTOR SUBTRACT WITH BORROW INDICATION (VSBI V1,V2,V3,V4,M5)
  5020  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_VecReg_32_35, ap_Mask_20_23, ap_ImmUnsigned_36_39}},
  5021  	{VSUMG, 0xff00000000ff0000, 0xe700000000650000, 0xfff00000000, // VECTOR SUM ACROSS DOUBLEWORD (VSUMG V1,V2,V3,M4)
  5022  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  5023  	{VSUMQ, 0xff00000000ff0000, 0xe700000000670000, 0xfff00000000, // VECTOR SUM ACROSS QUADWORD (VSUMQ V1,V2,V3,M4)
  5024  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  5025  	{VSUM, 0xff00000000ff0000, 0xe700000000640000, 0xfff00000000, // VECTOR SUM ACROSS WORD (VSUM V1,V2,V3,M4)
  5026  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_VecReg_16_19, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  5027  	{VTP, 0xff00000000ff0000, 0xe6000000005f0000, 0xf0fffff0000000, // VECTOR TEST DECIMAL (VTP V1)
  5028  		[8]*argField{ap_VecReg_12_15, ap_ImmUnsigned_36_39}},
  5029  	{VTM, 0xff00000000ff0000, 0xe700000000d80000, 0xfffff0000000, // VECTOR TEST UNDER MASK (VTM V1,V2)
  5030  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_ImmUnsigned_36_39}},
  5031  	{VUPH, 0xff00000000ff0000, 0xe700000000d70000, 0xffff00000000, // VECTOR UNPACK HIGH (VUPH V1,V2,M3)
  5032  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  5033  	{VUPLH, 0xff00000000ff0000, 0xe700000000d50000, 0xffff00000000, // VECTOR UNPACK LOGICAL HIGH (VUPLH V1,V2,M3)
  5034  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  5035  	{VUPLL, 0xff00000000ff0000, 0xe700000000d40000, 0xffff00000000, // VECTOR UNPACK LOGICAL LOW (VUPLL V1,V2,M3)
  5036  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  5037  	{VUPL, 0xff00000000ff0000, 0xe700000000d60000, 0xffff00000000, // VECTOR UNPACK LOW (VUPL V1,V2,M3)
  5038  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_32_35, ap_ImmUnsigned_36_39}},
  5039  	{VUPKZ, 0xff00000000ff0000, 0xe6000000003c0000, 0x0, // VECTOR UNPACK ZONED (VUPKZ V1,D2(B2),I3)
  5040  		[8]*argField{ap_VecReg_32_35, ap_DispUnsigned_20_31, ap_BaseReg_16_19, ap_ImmUnsigned_8_15, ap_ImmUnsigned_36_39}},
  5041  	{VUPKZH, 0xff00000000ff0000, 0xe600000000540000, 0xff0ff0000000, // VECTOR UNPACK ZONED HIGH (VUPKZH V1,V2,M3)
  5042  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  5043  	{VUPKZL, 0xff00000000ff0000, 0xe6000000005c0000, 0xff0ff0000000, // VECTOR UNPACK ZONED LOW (VUPKZL V1,V2,M3)
  5044  		[8]*argField{ap_VecReg_8_11, ap_VecReg_12_15, ap_Mask_24_27, ap_ImmUnsigned_36_39}},
  5045  	{ZAP, 0xff00000000000000, 0xf800000000000000, 0x0, // ZERO AND ADD (ZAP D1(L1,B1),D2(L2,B2))
  5046  		[8]*argField{ap_DispUnsigned_20_31, ap_Len_8_11, ap_BaseReg_16_19, ap_DispUnsigned_36_47, ap_Len_12_15, ap_BaseReg_32_35}},
  5047  }
  5048  

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