1 !sum
2 # And — bitwise AND, both signednesses. The unpredicated ZAND is a single
3 # width-agnostic .D encoding that the loader emits at every element width; its
4 # predicated sibling merges per <T>, so the merging machine ops stay per width.
5 - go: And
6 asm: "ZAND"
7 in:
8 - &int
9 go: $t
10 base: int
11 - *int
12 out:
13 - *int
14
15 - go: And
16 asm: "ZAND"
17 in:
18 - &uint
19 go: $t
20 base: uint
21 - *uint
22 out:
23 - *uint
24
25 # Or — bitwise inclusive OR, ZORR. Width-agnostic like ZAND.
26 - go: Or
27 asm: "ZORR"
28 in:
29 - *int
30 - *int
31 out:
32 - *int
33
34 - go: Or
35 asm: "ZORR"
36 in:
37 - *uint
38 - *uint
39 out:
40 - *uint
41
42 # Xor — bitwise exclusive OR, ZEOR. Width-agnostic like ZAND.
43 - go: Xor
44 asm: "ZEOR"
45 in:
46 - *int
47 - *int
48 out:
49 - *int
50
51 - go: Xor
52 asm: "ZEOR"
53 in:
54 - *uint
55 - *uint
56 out:
57 - *uint
58
59 # AndNot — bitwise x &^ y, ZBIC. Width-agnostic like ZAND.
60 - go: AndNot
61 asm: "ZBIC"
62 in:
63 - *int
64 - *int
65 out:
66 - *int
67
68 - go: AndNot
69 asm: "ZBIC"
70 in:
71 - *uint
72 - *uint
73 out:
74 - *uint
75
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